19c20346bSAnirudh Venkataramanan /* SPDX-License-Identifier: GPL-2.0 */
29c20346bSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */
39c20346bSAnirudh Venkataramanan 
49c20346bSAnirudh Venkataramanan #ifndef _ICE_SCHED_H_
59c20346bSAnirudh Venkataramanan #define _ICE_SCHED_H_
69c20346bSAnirudh Venkataramanan 
79c20346bSAnirudh Venkataramanan #include "ice_common.h"
89c20346bSAnirudh Venkataramanan 
916dfa494SMichal Wilczynski #define SCHED_NODE_NAME_MAX_LEN 32
1016dfa494SMichal Wilczynski 
11cdedef59SAnirudh Venkataramanan #define ICE_QGRP_LAYER_OFFSET	2
125513b920SAnirudh Venkataramanan #define ICE_VSI_LAYER_OFFSET	4
13b126bd6bSKiran Patil #define ICE_AGG_LAYER_OFFSET	6
141ddef455SUsha Ketineni #define ICE_SCHED_INVAL_LAYER_NUM	0xFF
151ddef455SUsha Ketineni /* Burst size is a 12 bits register that is configured while creating the RL
161ddef455SUsha Ketineni  * profile(s). MSB is a granularity bit and tells the granularity type
171ddef455SUsha Ketineni  * 0 - LSB bits are in 64 bytes granularity
181ddef455SUsha Ketineni  * 1 - LSB bits are in 1K bytes granularity
191ddef455SUsha Ketineni  */
201ddef455SUsha Ketineni #define ICE_64_BYTE_GRANULARITY			0
211ddef455SUsha Ketineni #define ICE_KBYTE_GRANULARITY			BIT(11)
221ddef455SUsha Ketineni #define ICE_MIN_BURST_SIZE_ALLOWED		64 /* In Bytes */
231ddef455SUsha Ketineni #define ICE_MAX_BURST_SIZE_ALLOWED \
241ddef455SUsha Ketineni 	((BIT(11) - 1) * 1024) /* In Bytes */
251ddef455SUsha Ketineni #define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \
261ddef455SUsha Ketineni 	((BIT(11) - 1) * 64) /* In Bytes */
271ddef455SUsha Ketineni #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY	ICE_MAX_BURST_SIZE_ALLOWED
281ddef455SUsha Ketineni 
291ddef455SUsha Ketineni #define ICE_RL_PROF_ACCURACY_BYTES 128
301ddef455SUsha Ketineni #define ICE_RL_PROF_MULTIPLIER 10000
311ddef455SUsha Ketineni #define ICE_RL_PROF_TS_MULTIPLIER 32
321ddef455SUsha Ketineni #define ICE_RL_PROF_FRACTION 512
331ddef455SUsha Ketineni 
344f8a1497SBen Shelton #define ICE_PSM_CLK_367MHZ_IN_HZ 367647059
354f8a1497SBen Shelton #define ICE_PSM_CLK_416MHZ_IN_HZ 416666667
364f8a1497SBen Shelton #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571
374f8a1497SBen Shelton #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000
384f8a1497SBen Shelton 
391ddef455SUsha Ketineni /* BW rate limit profile parameters list entry along
401ddef455SUsha Ketineni  * with bandwidth maintained per layer in port info
411ddef455SUsha Ketineni  */
421ddef455SUsha Ketineni struct ice_aqc_rl_profile_info {
431ddef455SUsha Ketineni 	struct ice_aqc_rl_profile_elem profile;
441ddef455SUsha Ketineni 	struct list_head list_entry;
451ddef455SUsha Ketineni 	u32 bw;			/* requested */
461ddef455SUsha Ketineni 	u16 prof_id_ref;	/* profile ID to node association ref count */
471ddef455SUsha Ketineni };
48cdedef59SAnirudh Venkataramanan 
499c20346bSAnirudh Venkataramanan struct ice_sched_agg_vsi_info {
509c20346bSAnirudh Venkataramanan 	struct list_head list_entry;
519c20346bSAnirudh Venkataramanan 	DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
5210e03a22SAnirudh Venkataramanan 	u16 vsi_handle;
53b126bd6bSKiran Patil 	/* save aggregator VSI TC bitmap */
54b126bd6bSKiran Patil 	DECLARE_BITMAP(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
559c20346bSAnirudh Venkataramanan };
569c20346bSAnirudh Venkataramanan 
579c20346bSAnirudh Venkataramanan struct ice_sched_agg_info {
589c20346bSAnirudh Venkataramanan 	struct list_head agg_vsi_list;
599c20346bSAnirudh Venkataramanan 	struct list_head list_entry;
609c20346bSAnirudh Venkataramanan 	DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
619c20346bSAnirudh Venkataramanan 	u32 agg_id;
629c20346bSAnirudh Venkataramanan 	enum ice_agg_type agg_type;
630754d65bSKiran Patil 	/* bw_t_info saves aggregator BW information */
640754d65bSKiran Patil 	struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
65b126bd6bSKiran Patil 	/* save aggregator TC bitmap */
66b126bd6bSKiran Patil 	DECLARE_BITMAP(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
679c20346bSAnirudh Venkataramanan };
689c20346bSAnirudh Venkataramanan 
699c20346bSAnirudh Venkataramanan /* FW AQ command calls */
705e24d598STony Nguyen int
717b9ffc76SAnirudh Venkataramanan ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
72b3c38904SBruce Allan 			 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
737b9ffc76SAnirudh Venkataramanan 			 u16 *elems_ret, struct ice_sq_cd *cd);
7416dfa494SMichal Wilczynski 
7516dfa494SMichal Wilczynski int
7616dfa494SMichal Wilczynski ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
7716dfa494SMichal Wilczynski 			  enum ice_rl_type rl_type, u32 bw);
7816dfa494SMichal Wilczynski 
7916dfa494SMichal Wilczynski int
8016dfa494SMichal Wilczynski ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
8116dfa494SMichal Wilczynski 		      enum ice_rl_type rl_type, u32 bw, u8 layer_num);
8216dfa494SMichal Wilczynski 
8316dfa494SMichal Wilczynski int
8416dfa494SMichal Wilczynski ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
8516dfa494SMichal Wilczynski 		    struct ice_sched_node *parent, u8 layer, u16 num_nodes,
86bdf96d96SMichal Wilczynski 		    u16 *num_nodes_added, u32 *first_node_teid,
87bdf96d96SMichal Wilczynski 		    struct ice_sched_node **prealloc_node);
8816dfa494SMichal Wilczynski 
8916dfa494SMichal Wilczynski int
9016dfa494SMichal Wilczynski ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
9116dfa494SMichal Wilczynski 		     u16 num_items, u32 *list);
9216dfa494SMichal Wilczynski 
9316dfa494SMichal Wilczynski int ice_sched_set_node_priority(struct ice_port_info *pi, struct ice_sched_node *node,
9416dfa494SMichal Wilczynski 				u16 priority);
9516dfa494SMichal Wilczynski int ice_sched_set_node_weight(struct ice_port_info *pi, struct ice_sched_node *node, u16 weight);
9616dfa494SMichal Wilczynski 
975e24d598STony Nguyen int ice_sched_init_port(struct ice_port_info *pi);
985e24d598STony Nguyen int ice_sched_query_res_alloc(struct ice_hw *hw);
994f8a1497SBen Shelton void ice_sched_get_psm_clk_freq(struct ice_hw *hw);
1004f8a1497SBen Shelton 
101c5a2a4a3SUsha Ketineni void ice_sched_clear_port(struct ice_port_info *pi);
1029c20346bSAnirudh Venkataramanan void ice_sched_cleanup_all(struct ice_hw *hw);
1039be1d6f8SAnirudh Venkataramanan void ice_sched_clear_agg(struct ice_hw *hw);
1049be1d6f8SAnirudh Venkataramanan 
105dc49c772SAnirudh Venkataramanan struct ice_sched_node *
106dc49c772SAnirudh Venkataramanan ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
1075e24d598STony Nguyen int
108dc49c772SAnirudh Venkataramanan ice_sched_add_node(struct ice_port_info *pi, u8 layer,
109bdf96d96SMichal Wilczynski 		   struct ice_aqc_txsched_elem_data *info,
110bdf96d96SMichal Wilczynski 		   struct ice_sched_node *prealloc_node);
11116dfa494SMichal Wilczynski void
11216dfa494SMichal Wilczynski ice_sched_update_parent(struct ice_sched_node *new_parent,
11316dfa494SMichal Wilczynski 			struct ice_sched_node *node);
1149c20346bSAnirudh Venkataramanan void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node);
1159c20346bSAnirudh Venkataramanan struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);
116cdedef59SAnirudh Venkataramanan struct ice_sched_node *
1174fb33f31SAnirudh Venkataramanan ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
118cdedef59SAnirudh Venkataramanan 			   u8 owner);
1195e24d598STony Nguyen int
1204fb33f31SAnirudh Venkataramanan ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1215513b920SAnirudh Venkataramanan 		  u8 owner, bool enable);
1225e24d598STony Nguyen int ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
1235e24d598STony Nguyen int ice_rm_vsi_rdma_cfg(struct ice_port_info *pi, u16 vsi_handle);
124b126bd6bSKiran Patil 
125b126bd6bSKiran Patil /* Tx scheduler rate limiter functions */
1265e24d598STony Nguyen int
127b126bd6bSKiran Patil ice_cfg_agg(struct ice_port_info *pi, u32 agg_id,
128b126bd6bSKiran Patil 	    enum ice_agg_type agg_type, u8 tc_bitmap);
1295e24d598STony Nguyen int
130b126bd6bSKiran Patil ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
131b126bd6bSKiran Patil 		    u8 tc_bitmap);
1325e24d598STony Nguyen int
1331ddef455SUsha Ketineni ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1341ddef455SUsha Ketineni 		 u16 q_handle, enum ice_rl_type rl_type, u32 bw);
1355e24d598STony Nguyen int
1361ddef455SUsha Ketineni ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1371ddef455SUsha Ketineni 		      u16 q_handle, enum ice_rl_type rl_type);
1385e24d598STony Nguyen int
1394ecc8633SBrett Creeley ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1404ecc8633SBrett Creeley 			  enum ice_rl_type rl_type, u32 bw);
1415e24d598STony Nguyen int
1424ecc8633SBrett Creeley ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1434ecc8633SBrett Creeley 			       enum ice_rl_type rl_type);
1445e24d598STony Nguyen int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
145*23ccae5cSDave Ertman int
146*23ccae5cSDave Ertman ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
147*23ccae5cSDave Ertman 			       bool suspend);
148*23ccae5cSDave Ertman struct ice_sched_node *
149*23ccae5cSDave Ertman ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
150*23ccae5cSDave Ertman 		       u32 agg_id);
151*23ccae5cSDave Ertman u8 ice_sched_get_agg_layer(struct ice_hw *hw);
152*23ccae5cSDave Ertman u8 ice_sched_get_vsi_layer(struct ice_hw *hw);
153*23ccae5cSDave Ertman struct ice_sched_node *
154*23ccae5cSDave Ertman ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
155*23ccae5cSDave Ertman 			      u16 *num_nodes);
156*23ccae5cSDave Ertman int
157*23ccae5cSDave Ertman ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
158*23ccae5cSDave Ertman 			     struct ice_sched_node *tc_node,
159*23ccae5cSDave Ertman 			     struct ice_sched_node *parent, u8 layer,
160*23ccae5cSDave Ertman 			     u16 num_nodes, u32 *first_node_teid,
161*23ccae5cSDave Ertman 			     u16 *num_nodes_added);
162b126bd6bSKiran Patil void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
163b126bd6bSKiran Patil void ice_sched_replay_agg(struct ice_hw *hw);
164*23ccae5cSDave Ertman int
165*23ccae5cSDave Ertman ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
166*23ccae5cSDave Ertman 			struct ice_aqc_move_elem *buf, u16 buf_size,
167*23ccae5cSDave Ertman 			u16 *grps_movd, struct ice_sq_cd *cd);
1685e24d598STony Nguyen int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
1695518ac2aSTony Nguyen int ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
1709c20346bSAnirudh Venkataramanan #endif /* _ICE_SCHED_H_ */
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