1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice_sched.h" 5 6 /** 7 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB 8 * @pi: port information structure 9 * @info: Scheduler element information from firmware 10 * 11 * This function inserts the root node of the scheduling tree topology 12 * to the SW DB. 13 */ 14 static enum ice_status 15 ice_sched_add_root_node(struct ice_port_info *pi, 16 struct ice_aqc_txsched_elem_data *info) 17 { 18 struct ice_sched_node *root; 19 struct ice_hw *hw; 20 21 if (!pi) 22 return ICE_ERR_PARAM; 23 24 hw = pi->hw; 25 26 root = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*root), GFP_KERNEL); 27 if (!root) 28 return ICE_ERR_NO_MEMORY; 29 30 /* coverity[suspicious_sizeof] */ 31 root->children = devm_kcalloc(ice_hw_to_dev(hw), hw->max_children[0], 32 sizeof(*root), GFP_KERNEL); 33 if (!root->children) { 34 devm_kfree(ice_hw_to_dev(hw), root); 35 return ICE_ERR_NO_MEMORY; 36 } 37 38 memcpy(&root->info, info, sizeof(*info)); 39 pi->root = root; 40 return 0; 41 } 42 43 /** 44 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB 45 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree 46 * @teid: node TEID to search 47 * 48 * This function searches for a node matching the TEID in the scheduling tree 49 * from the SW DB. The search is recursive and is restricted by the number of 50 * layers it has searched through; stopping at the max supported layer. 51 * 52 * This function needs to be called when holding the port_info->sched_lock 53 */ 54 struct ice_sched_node * 55 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid) 56 { 57 u16 i; 58 59 /* The TEID is same as that of the start_node */ 60 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid) 61 return start_node; 62 63 /* The node has no children or is at the max layer */ 64 if (!start_node->num_children || 65 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM || 66 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) 67 return NULL; 68 69 /* Check if TEID matches to any of the children nodes */ 70 for (i = 0; i < start_node->num_children; i++) 71 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid) 72 return start_node->children[i]; 73 74 /* Search within each child's sub-tree */ 75 for (i = 0; i < start_node->num_children; i++) { 76 struct ice_sched_node *tmp; 77 78 tmp = ice_sched_find_node_by_teid(start_node->children[i], 79 teid); 80 if (tmp) 81 return tmp; 82 } 83 84 return NULL; 85 } 86 87 /** 88 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd 89 * @hw: pointer to the HW struct 90 * @cmd_opc: cmd opcode 91 * @elems_req: number of elements to request 92 * @buf: pointer to buffer 93 * @buf_size: buffer size in bytes 94 * @elems_resp: returns total number of elements response 95 * @cd: pointer to command details structure or NULL 96 * 97 * This function sends a scheduling elements cmd (cmd_opc) 98 */ 99 static enum ice_status 100 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc, 101 u16 elems_req, void *buf, u16 buf_size, 102 u16 *elems_resp, struct ice_sq_cd *cd) 103 { 104 struct ice_aqc_sched_elem_cmd *cmd; 105 struct ice_aq_desc desc; 106 enum ice_status status; 107 108 cmd = &desc.params.sched_elem_cmd; 109 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc); 110 cmd->num_elem_req = cpu_to_le16(elems_req); 111 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 112 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 113 if (!status && elems_resp) 114 *elems_resp = le16_to_cpu(cmd->num_elem_resp); 115 116 return status; 117 } 118 119 /** 120 * ice_aq_query_sched_elems - query scheduler elements 121 * @hw: pointer to the HW struct 122 * @elems_req: number of elements to query 123 * @buf: pointer to buffer 124 * @buf_size: buffer size in bytes 125 * @elems_ret: returns total number of elements returned 126 * @cd: pointer to command details structure or NULL 127 * 128 * Query scheduling elements (0x0404) 129 */ 130 enum ice_status 131 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 132 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 133 u16 *elems_ret, struct ice_sq_cd *cd) 134 { 135 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems, 136 elems_req, (void *)buf, buf_size, 137 elems_ret, cd); 138 } 139 140 /** 141 * ice_sched_add_node - Insert the Tx scheduler node in SW DB 142 * @pi: port information structure 143 * @layer: Scheduler layer of the node 144 * @info: Scheduler element information from firmware 145 * 146 * This function inserts a scheduler node to the SW DB. 147 */ 148 enum ice_status 149 ice_sched_add_node(struct ice_port_info *pi, u8 layer, 150 struct ice_aqc_txsched_elem_data *info) 151 { 152 struct ice_aqc_txsched_elem_data elem; 153 struct ice_sched_node *parent; 154 struct ice_sched_node *node; 155 enum ice_status status; 156 struct ice_hw *hw; 157 158 if (!pi) 159 return ICE_ERR_PARAM; 160 161 hw = pi->hw; 162 163 /* A valid parent node should be there */ 164 parent = ice_sched_find_node_by_teid(pi->root, 165 le32_to_cpu(info->parent_teid)); 166 if (!parent) { 167 ice_debug(hw, ICE_DBG_SCHED, 168 "Parent Node not found for parent_teid=0x%x\n", 169 le32_to_cpu(info->parent_teid)); 170 return ICE_ERR_PARAM; 171 } 172 173 /* query the current node information from FW before additing it 174 * to the SW DB 175 */ 176 status = ice_sched_query_elem(hw, le32_to_cpu(info->node_teid), &elem); 177 if (status) 178 return status; 179 180 node = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*node), GFP_KERNEL); 181 if (!node) 182 return ICE_ERR_NO_MEMORY; 183 if (hw->max_children[layer]) { 184 /* coverity[suspicious_sizeof] */ 185 node->children = devm_kcalloc(ice_hw_to_dev(hw), 186 hw->max_children[layer], 187 sizeof(*node), GFP_KERNEL); 188 if (!node->children) { 189 devm_kfree(ice_hw_to_dev(hw), node); 190 return ICE_ERR_NO_MEMORY; 191 } 192 } 193 194 node->in_use = true; 195 node->parent = parent; 196 node->tx_sched_layer = layer; 197 parent->children[parent->num_children++] = node; 198 node->info = elem; 199 return 0; 200 } 201 202 /** 203 * ice_aq_delete_sched_elems - delete scheduler elements 204 * @hw: pointer to the HW struct 205 * @grps_req: number of groups to delete 206 * @buf: pointer to buffer 207 * @buf_size: buffer size in bytes 208 * @grps_del: returns total number of elements deleted 209 * @cd: pointer to command details structure or NULL 210 * 211 * Delete scheduling elements (0x040F) 212 */ 213 static enum ice_status 214 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req, 215 struct ice_aqc_delete_elem *buf, u16 buf_size, 216 u16 *grps_del, struct ice_sq_cd *cd) 217 { 218 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems, 219 grps_req, (void *)buf, buf_size, 220 grps_del, cd); 221 } 222 223 /** 224 * ice_sched_remove_elems - remove nodes from HW 225 * @hw: pointer to the HW struct 226 * @parent: pointer to the parent node 227 * @num_nodes: number of nodes 228 * @node_teids: array of node teids to be deleted 229 * 230 * This function remove nodes from HW 231 */ 232 static enum ice_status 233 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent, 234 u16 num_nodes, u32 *node_teids) 235 { 236 struct ice_aqc_delete_elem *buf; 237 u16 i, num_groups_removed = 0; 238 enum ice_status status; 239 u16 buf_size; 240 241 buf_size = struct_size(buf, teid, num_nodes); 242 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 243 if (!buf) 244 return ICE_ERR_NO_MEMORY; 245 246 buf->hdr.parent_teid = parent->info.node_teid; 247 buf->hdr.num_elems = cpu_to_le16(num_nodes); 248 for (i = 0; i < num_nodes; i++) 249 buf->teid[i] = cpu_to_le32(node_teids[i]); 250 251 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size, 252 &num_groups_removed, NULL); 253 if (status || num_groups_removed != 1) 254 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n", 255 hw->adminq.sq_last_status); 256 257 devm_kfree(ice_hw_to_dev(hw), buf); 258 return status; 259 } 260 261 /** 262 * ice_sched_get_first_node - get the first node of the given layer 263 * @pi: port information structure 264 * @parent: pointer the base node of the subtree 265 * @layer: layer number 266 * 267 * This function retrieves the first node of the given layer from the subtree 268 */ 269 static struct ice_sched_node * 270 ice_sched_get_first_node(struct ice_port_info *pi, 271 struct ice_sched_node *parent, u8 layer) 272 { 273 return pi->sib_head[parent->tc_num][layer]; 274 } 275 276 /** 277 * ice_sched_get_tc_node - get pointer to TC node 278 * @pi: port information structure 279 * @tc: TC number 280 * 281 * This function returns the TC node pointer 282 */ 283 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc) 284 { 285 u8 i; 286 287 if (!pi || !pi->root) 288 return NULL; 289 for (i = 0; i < pi->root->num_children; i++) 290 if (pi->root->children[i]->tc_num == tc) 291 return pi->root->children[i]; 292 return NULL; 293 } 294 295 /** 296 * ice_free_sched_node - Free a Tx scheduler node from SW DB 297 * @pi: port information structure 298 * @node: pointer to the ice_sched_node struct 299 * 300 * This function frees up a node from SW DB as well as from HW 301 * 302 * This function needs to be called with the port_info->sched_lock held 303 */ 304 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node) 305 { 306 struct ice_sched_node *parent; 307 struct ice_hw *hw = pi->hw; 308 u8 i, j; 309 310 /* Free the children before freeing up the parent node 311 * The parent array is updated below and that shifts the nodes 312 * in the array. So always pick the first child if num children > 0 313 */ 314 while (node->num_children) 315 ice_free_sched_node(pi, node->children[0]); 316 317 /* Leaf, TC and root nodes can't be deleted by SW */ 318 if (node->tx_sched_layer >= hw->sw_entry_point_layer && 319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT && 321 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) { 322 u32 teid = le32_to_cpu(node->info.node_teid); 323 324 ice_sched_remove_elems(hw, node->parent, 1, &teid); 325 } 326 parent = node->parent; 327 /* root has no parent */ 328 if (parent) { 329 struct ice_sched_node *p; 330 331 /* update the parent */ 332 for (i = 0; i < parent->num_children; i++) 333 if (parent->children[i] == node) { 334 for (j = i + 1; j < parent->num_children; j++) 335 parent->children[j - 1] = 336 parent->children[j]; 337 parent->num_children--; 338 break; 339 } 340 341 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer); 342 while (p) { 343 if (p->sibling == node) { 344 p->sibling = node->sibling; 345 break; 346 } 347 p = p->sibling; 348 } 349 350 /* update the sibling head if head is getting removed */ 351 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node) 352 pi->sib_head[node->tc_num][node->tx_sched_layer] = 353 node->sibling; 354 } 355 356 /* leaf nodes have no children */ 357 if (node->children) 358 devm_kfree(ice_hw_to_dev(hw), node->children); 359 devm_kfree(ice_hw_to_dev(hw), node); 360 } 361 362 /** 363 * ice_aq_get_dflt_topo - gets default scheduler topology 364 * @hw: pointer to the HW struct 365 * @lport: logical port number 366 * @buf: pointer to buffer 367 * @buf_size: buffer size in bytes 368 * @num_branches: returns total number of queue to port branches 369 * @cd: pointer to command details structure or NULL 370 * 371 * Get default scheduler topology (0x400) 372 */ 373 static enum ice_status 374 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport, 375 struct ice_aqc_get_topo_elem *buf, u16 buf_size, 376 u8 *num_branches, struct ice_sq_cd *cd) 377 { 378 struct ice_aqc_get_topo *cmd; 379 struct ice_aq_desc desc; 380 enum ice_status status; 381 382 cmd = &desc.params.get_topo; 383 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo); 384 cmd->port_num = lport; 385 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 386 if (!status && num_branches) 387 *num_branches = cmd->num_branches; 388 389 return status; 390 } 391 392 /** 393 * ice_aq_add_sched_elems - adds scheduling element 394 * @hw: pointer to the HW struct 395 * @grps_req: the number of groups that are requested to be added 396 * @buf: pointer to buffer 397 * @buf_size: buffer size in bytes 398 * @grps_added: returns total number of groups added 399 * @cd: pointer to command details structure or NULL 400 * 401 * Add scheduling elements (0x0401) 402 */ 403 static enum ice_status 404 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req, 405 struct ice_aqc_add_elem *buf, u16 buf_size, 406 u16 *grps_added, struct ice_sq_cd *cd) 407 { 408 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems, 409 grps_req, (void *)buf, buf_size, 410 grps_added, cd); 411 } 412 413 /** 414 * ice_aq_cfg_sched_elems - configures scheduler elements 415 * @hw: pointer to the HW struct 416 * @elems_req: number of elements to configure 417 * @buf: pointer to buffer 418 * @buf_size: buffer size in bytes 419 * @elems_cfgd: returns total number of elements configured 420 * @cd: pointer to command details structure or NULL 421 * 422 * Configure scheduling elements (0x0403) 423 */ 424 static enum ice_status 425 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req, 426 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 427 u16 *elems_cfgd, struct ice_sq_cd *cd) 428 { 429 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems, 430 elems_req, (void *)buf, buf_size, 431 elems_cfgd, cd); 432 } 433 434 /** 435 * ice_aq_suspend_sched_elems - suspend scheduler elements 436 * @hw: pointer to the HW struct 437 * @elems_req: number of elements to suspend 438 * @buf: pointer to buffer 439 * @buf_size: buffer size in bytes 440 * @elems_ret: returns total number of elements suspended 441 * @cd: pointer to command details structure or NULL 442 * 443 * Suspend scheduling elements (0x0409) 444 */ 445 static enum ice_status 446 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 447 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 448 { 449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems, 450 elems_req, (void *)buf, buf_size, 451 elems_ret, cd); 452 } 453 454 /** 455 * ice_aq_resume_sched_elems - resume scheduler elements 456 * @hw: pointer to the HW struct 457 * @elems_req: number of elements to resume 458 * @buf: pointer to buffer 459 * @buf_size: buffer size in bytes 460 * @elems_ret: returns total number of elements resumed 461 * @cd: pointer to command details structure or NULL 462 * 463 * resume scheduling elements (0x040A) 464 */ 465 static enum ice_status 466 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 467 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 468 { 469 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems, 470 elems_req, (void *)buf, buf_size, 471 elems_ret, cd); 472 } 473 474 /** 475 * ice_aq_query_sched_res - query scheduler resource 476 * @hw: pointer to the HW struct 477 * @buf_size: buffer size in bytes 478 * @buf: pointer to buffer 479 * @cd: pointer to command details structure or NULL 480 * 481 * Query scheduler resource allocation (0x0412) 482 */ 483 static enum ice_status 484 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size, 485 struct ice_aqc_query_txsched_res_resp *buf, 486 struct ice_sq_cd *cd) 487 { 488 struct ice_aq_desc desc; 489 490 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res); 491 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 492 } 493 494 /** 495 * ice_sched_suspend_resume_elems - suspend or resume HW nodes 496 * @hw: pointer to the HW struct 497 * @num_nodes: number of nodes 498 * @node_teids: array of node teids to be suspended or resumed 499 * @suspend: true means suspend / false means resume 500 * 501 * This function suspends or resumes HW nodes 502 */ 503 static enum ice_status 504 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids, 505 bool suspend) 506 { 507 u16 i, buf_size, num_elem_ret = 0; 508 enum ice_status status; 509 __le32 *buf; 510 511 buf_size = sizeof(*buf) * num_nodes; 512 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 513 if (!buf) 514 return ICE_ERR_NO_MEMORY; 515 516 for (i = 0; i < num_nodes; i++) 517 buf[i] = cpu_to_le32(node_teids[i]); 518 519 if (suspend) 520 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf, 521 buf_size, &num_elem_ret, 522 NULL); 523 else 524 status = ice_aq_resume_sched_elems(hw, num_nodes, buf, 525 buf_size, &num_elem_ret, 526 NULL); 527 if (status || num_elem_ret != num_nodes) 528 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n"); 529 530 devm_kfree(ice_hw_to_dev(hw), buf); 531 return status; 532 } 533 534 /** 535 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC 536 * @hw: pointer to the HW struct 537 * @vsi_handle: VSI handle 538 * @tc: TC number 539 * @new_numqs: number of queues 540 */ 541 static enum ice_status 542 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs) 543 { 544 struct ice_vsi_ctx *vsi_ctx; 545 struct ice_q_ctx *q_ctx; 546 547 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 548 if (!vsi_ctx) 549 return ICE_ERR_PARAM; 550 /* allocate LAN queue contexts */ 551 if (!vsi_ctx->lan_q_ctx[tc]) { 552 vsi_ctx->lan_q_ctx[tc] = devm_kcalloc(ice_hw_to_dev(hw), 553 new_numqs, 554 sizeof(*q_ctx), 555 GFP_KERNEL); 556 if (!vsi_ctx->lan_q_ctx[tc]) 557 return ICE_ERR_NO_MEMORY; 558 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 559 return 0; 560 } 561 /* num queues are increased, update the queue contexts */ 562 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) { 563 u16 prev_num = vsi_ctx->num_lan_q_entries[tc]; 564 565 q_ctx = devm_kcalloc(ice_hw_to_dev(hw), new_numqs, 566 sizeof(*q_ctx), GFP_KERNEL); 567 if (!q_ctx) 568 return ICE_ERR_NO_MEMORY; 569 memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc], 570 prev_num * sizeof(*q_ctx)); 571 devm_kfree(ice_hw_to_dev(hw), vsi_ctx->lan_q_ctx[tc]); 572 vsi_ctx->lan_q_ctx[tc] = q_ctx; 573 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 574 } 575 return 0; 576 } 577 578 /** 579 * ice_aq_rl_profile - performs a rate limiting task 580 * @hw: pointer to the HW struct 581 * @opcode:opcode for add, query, or remove profile(s) 582 * @num_profiles: the number of profiles 583 * @buf: pointer to buffer 584 * @buf_size: buffer size in bytes 585 * @num_processed: number of processed add or remove profile(s) to return 586 * @cd: pointer to command details structure 587 * 588 * RL profile function to add, query, or remove profile(s) 589 */ 590 static enum ice_status 591 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode, 592 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf, 593 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd) 594 { 595 struct ice_aqc_rl_profile *cmd; 596 struct ice_aq_desc desc; 597 enum ice_status status; 598 599 cmd = &desc.params.rl_profile; 600 601 ice_fill_dflt_direct_cmd_desc(&desc, opcode); 602 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 603 cmd->num_profiles = cpu_to_le16(num_profiles); 604 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 605 if (!status && num_processed) 606 *num_processed = le16_to_cpu(cmd->num_processed); 607 return status; 608 } 609 610 /** 611 * ice_aq_add_rl_profile - adds rate limiting profile(s) 612 * @hw: pointer to the HW struct 613 * @num_profiles: the number of profile(s) to be add 614 * @buf: pointer to buffer 615 * @buf_size: buffer size in bytes 616 * @num_profiles_added: total number of profiles added to return 617 * @cd: pointer to command details structure 618 * 619 * Add RL profile (0x0410) 620 */ 621 static enum ice_status 622 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles, 623 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 624 u16 *num_profiles_added, struct ice_sq_cd *cd) 625 { 626 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles, 627 buf, buf_size, num_profiles_added, cd); 628 } 629 630 /** 631 * ice_aq_remove_rl_profile - removes RL profile(s) 632 * @hw: pointer to the HW struct 633 * @num_profiles: the number of profile(s) to remove 634 * @buf: pointer to buffer 635 * @buf_size: buffer size in bytes 636 * @num_profiles_removed: total number of profiles removed to return 637 * @cd: pointer to command details structure or NULL 638 * 639 * Remove RL profile (0x0415) 640 */ 641 static enum ice_status 642 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles, 643 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 644 u16 *num_profiles_removed, struct ice_sq_cd *cd) 645 { 646 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles, 647 num_profiles, buf, buf_size, 648 num_profiles_removed, cd); 649 } 650 651 /** 652 * ice_sched_del_rl_profile - remove RL profile 653 * @hw: pointer to the HW struct 654 * @rl_info: rate limit profile information 655 * 656 * If the profile ID is not referenced anymore, it removes profile ID with 657 * its associated parameters from HW DB,and locally. The caller needs to 658 * hold scheduler lock. 659 */ 660 static enum ice_status 661 ice_sched_del_rl_profile(struct ice_hw *hw, 662 struct ice_aqc_rl_profile_info *rl_info) 663 { 664 struct ice_aqc_rl_profile_elem *buf; 665 u16 num_profiles_removed; 666 enum ice_status status; 667 u16 num_profiles = 1; 668 669 if (rl_info->prof_id_ref != 0) 670 return ICE_ERR_IN_USE; 671 672 /* Safe to remove profile ID */ 673 buf = &rl_info->profile; 674 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf), 675 &num_profiles_removed, NULL); 676 if (status || num_profiles_removed != num_profiles) 677 return ICE_ERR_CFG; 678 679 /* Delete stale entry now */ 680 list_del(&rl_info->list_entry); 681 devm_kfree(ice_hw_to_dev(hw), rl_info); 682 return status; 683 } 684 685 /** 686 * ice_sched_clear_rl_prof - clears RL prof entries 687 * @pi: port information structure 688 * 689 * This function removes all RL profile from HW as well as from SW DB. 690 */ 691 static void ice_sched_clear_rl_prof(struct ice_port_info *pi) 692 { 693 u16 ln; 694 695 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 696 struct ice_aqc_rl_profile_info *rl_prof_elem; 697 struct ice_aqc_rl_profile_info *rl_prof_tmp; 698 699 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 700 &pi->rl_prof_list[ln], list_entry) { 701 struct ice_hw *hw = pi->hw; 702 enum ice_status status; 703 704 rl_prof_elem->prof_id_ref = 0; 705 status = ice_sched_del_rl_profile(hw, rl_prof_elem); 706 if (status) { 707 ice_debug(hw, ICE_DBG_SCHED, 708 "Remove rl profile failed\n"); 709 /* On error, free mem required */ 710 list_del(&rl_prof_elem->list_entry); 711 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 712 } 713 } 714 } 715 } 716 717 /** 718 * ice_sched_clear_agg - clears the aggregator related information 719 * @hw: pointer to the hardware structure 720 * 721 * This function removes aggregator list and free up aggregator related memory 722 * previously allocated. 723 */ 724 void ice_sched_clear_agg(struct ice_hw *hw) 725 { 726 struct ice_sched_agg_info *agg_info; 727 struct ice_sched_agg_info *atmp; 728 729 list_for_each_entry_safe(agg_info, atmp, &hw->agg_list, list_entry) { 730 struct ice_sched_agg_vsi_info *agg_vsi_info; 731 struct ice_sched_agg_vsi_info *vtmp; 732 733 list_for_each_entry_safe(agg_vsi_info, vtmp, 734 &agg_info->agg_vsi_list, list_entry) { 735 list_del(&agg_vsi_info->list_entry); 736 devm_kfree(ice_hw_to_dev(hw), agg_vsi_info); 737 } 738 list_del(&agg_info->list_entry); 739 devm_kfree(ice_hw_to_dev(hw), agg_info); 740 } 741 } 742 743 /** 744 * ice_sched_clear_tx_topo - clears the scheduler tree nodes 745 * @pi: port information structure 746 * 747 * This function removes all the nodes from HW as well as from SW DB. 748 */ 749 static void ice_sched_clear_tx_topo(struct ice_port_info *pi) 750 { 751 if (!pi) 752 return; 753 /* remove RL profiles related lists */ 754 ice_sched_clear_rl_prof(pi); 755 if (pi->root) { 756 ice_free_sched_node(pi, pi->root); 757 pi->root = NULL; 758 } 759 } 760 761 /** 762 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port 763 * @pi: port information structure 764 * 765 * Cleanup scheduling elements from SW DB 766 */ 767 void ice_sched_clear_port(struct ice_port_info *pi) 768 { 769 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 770 return; 771 772 pi->port_state = ICE_SCHED_PORT_STATE_INIT; 773 mutex_lock(&pi->sched_lock); 774 ice_sched_clear_tx_topo(pi); 775 mutex_unlock(&pi->sched_lock); 776 mutex_destroy(&pi->sched_lock); 777 } 778 779 /** 780 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports 781 * @hw: pointer to the HW struct 782 * 783 * Cleanup scheduling elements from SW DB for all the ports 784 */ 785 void ice_sched_cleanup_all(struct ice_hw *hw) 786 { 787 if (!hw) 788 return; 789 790 if (hw->layer_info) { 791 devm_kfree(ice_hw_to_dev(hw), hw->layer_info); 792 hw->layer_info = NULL; 793 } 794 795 ice_sched_clear_port(hw->port_info); 796 797 hw->num_tx_sched_layers = 0; 798 hw->num_tx_sched_phys_layers = 0; 799 hw->flattened_layers = 0; 800 hw->max_cgds = 0; 801 } 802 803 /** 804 * ice_sched_add_elems - add nodes to HW and SW DB 805 * @pi: port information structure 806 * @tc_node: pointer to the branch node 807 * @parent: pointer to the parent node 808 * @layer: layer number to add nodes 809 * @num_nodes: number of nodes 810 * @num_nodes_added: pointer to num nodes added 811 * @first_node_teid: if new nodes are added then return the TEID of first node 812 * 813 * This function add nodes to HW as well as to SW DB for a given layer 814 */ 815 static enum ice_status 816 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node, 817 struct ice_sched_node *parent, u8 layer, u16 num_nodes, 818 u16 *num_nodes_added, u32 *first_node_teid) 819 { 820 struct ice_sched_node *prev, *new_node; 821 struct ice_aqc_add_elem *buf; 822 u16 i, num_groups_added = 0; 823 enum ice_status status = 0; 824 struct ice_hw *hw = pi->hw; 825 size_t buf_size; 826 u32 teid; 827 828 buf_size = struct_size(buf, generic, num_nodes); 829 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 830 if (!buf) 831 return ICE_ERR_NO_MEMORY; 832 833 buf->hdr.parent_teid = parent->info.node_teid; 834 buf->hdr.num_elems = cpu_to_le16(num_nodes); 835 for (i = 0; i < num_nodes; i++) { 836 buf->generic[i].parent_teid = parent->info.node_teid; 837 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC; 838 buf->generic[i].data.valid_sections = 839 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR | 840 ICE_AQC_ELEM_VALID_EIR; 841 buf->generic[i].data.generic = 0; 842 buf->generic[i].data.cir_bw.bw_profile_idx = 843 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 844 buf->generic[i].data.cir_bw.bw_alloc = 845 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 846 buf->generic[i].data.eir_bw.bw_profile_idx = 847 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 848 buf->generic[i].data.eir_bw.bw_alloc = 849 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 850 } 851 852 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size, 853 &num_groups_added, NULL); 854 if (status || num_groups_added != 1) { 855 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n", 856 hw->adminq.sq_last_status); 857 devm_kfree(ice_hw_to_dev(hw), buf); 858 return ICE_ERR_CFG; 859 } 860 861 *num_nodes_added = num_nodes; 862 /* add nodes to the SW DB */ 863 for (i = 0; i < num_nodes; i++) { 864 status = ice_sched_add_node(pi, layer, &buf->generic[i]); 865 if (status) { 866 ice_debug(hw, ICE_DBG_SCHED, 867 "add nodes in SW DB failed status =%d\n", 868 status); 869 break; 870 } 871 872 teid = le32_to_cpu(buf->generic[i].node_teid); 873 new_node = ice_sched_find_node_by_teid(parent, teid); 874 if (!new_node) { 875 ice_debug(hw, ICE_DBG_SCHED, 876 "Node is missing for teid =%d\n", teid); 877 break; 878 } 879 880 new_node->sibling = NULL; 881 new_node->tc_num = tc_node->tc_num; 882 883 /* add it to previous node sibling pointer */ 884 /* Note: siblings are not linked across branches */ 885 prev = ice_sched_get_first_node(pi, tc_node, layer); 886 if (prev && prev != new_node) { 887 while (prev->sibling) 888 prev = prev->sibling; 889 prev->sibling = new_node; 890 } 891 892 /* initialize the sibling head */ 893 if (!pi->sib_head[tc_node->tc_num][layer]) 894 pi->sib_head[tc_node->tc_num][layer] = new_node; 895 896 if (i == 0) 897 *first_node_teid = teid; 898 } 899 900 devm_kfree(ice_hw_to_dev(hw), buf); 901 return status; 902 } 903 904 /** 905 * ice_sched_add_nodes_to_layer - Add nodes to a given layer 906 * @pi: port information structure 907 * @tc_node: pointer to TC node 908 * @parent: pointer to parent node 909 * @layer: layer number to add nodes 910 * @num_nodes: number of nodes to be added 911 * @first_node_teid: pointer to the first node TEID 912 * @num_nodes_added: pointer to number of nodes added 913 * 914 * This function add nodes to a given layer. 915 */ 916 static enum ice_status 917 ice_sched_add_nodes_to_layer(struct ice_port_info *pi, 918 struct ice_sched_node *tc_node, 919 struct ice_sched_node *parent, u8 layer, 920 u16 num_nodes, u32 *first_node_teid, 921 u16 *num_nodes_added) 922 { 923 u32 *first_teid_ptr = first_node_teid; 924 u16 new_num_nodes, max_child_nodes; 925 enum ice_status status = 0; 926 struct ice_hw *hw = pi->hw; 927 u16 num_added = 0; 928 u32 temp; 929 930 *num_nodes_added = 0; 931 932 if (!num_nodes) 933 return status; 934 935 if (!parent || layer < hw->sw_entry_point_layer) 936 return ICE_ERR_PARAM; 937 938 /* max children per node per layer */ 939 max_child_nodes = hw->max_children[parent->tx_sched_layer]; 940 941 /* current number of children + required nodes exceed max children ? */ 942 if ((parent->num_children + num_nodes) > max_child_nodes) { 943 /* Fail if the parent is a TC node */ 944 if (parent == tc_node) 945 return ICE_ERR_CFG; 946 947 /* utilize all the spaces if the parent is not full */ 948 if (parent->num_children < max_child_nodes) { 949 new_num_nodes = max_child_nodes - parent->num_children; 950 /* this recursion is intentional, and wouldn't 951 * go more than 2 calls 952 */ 953 status = ice_sched_add_nodes_to_layer(pi, tc_node, 954 parent, layer, 955 new_num_nodes, 956 first_node_teid, 957 &num_added); 958 if (status) 959 return status; 960 961 *num_nodes_added += num_added; 962 } 963 /* Don't modify the first node TEID memory if the first node was 964 * added already in the above call. Instead send some temp 965 * memory for all other recursive calls. 966 */ 967 if (num_added) 968 first_teid_ptr = &temp; 969 970 new_num_nodes = num_nodes - num_added; 971 972 /* This parent is full, try the next sibling */ 973 parent = parent->sibling; 974 975 /* this recursion is intentional, for 1024 queues 976 * per VSI, it goes max of 16 iterations. 977 * 1024 / 8 = 128 layer 8 nodes 978 * 128 /8 = 16 (add 8 nodes per iteration) 979 */ 980 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 981 layer, new_num_nodes, 982 first_teid_ptr, 983 &num_added); 984 *num_nodes_added += num_added; 985 return status; 986 } 987 988 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes, 989 num_nodes_added, first_node_teid); 990 return status; 991 } 992 993 /** 994 * ice_sched_get_qgrp_layer - get the current queue group layer number 995 * @hw: pointer to the HW struct 996 * 997 * This function returns the current queue group layer number 998 */ 999 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw) 1000 { 1001 /* It's always total layers - 1, the array is 0 relative so -2 */ 1002 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET; 1003 } 1004 1005 /** 1006 * ice_sched_get_vsi_layer - get the current VSI layer number 1007 * @hw: pointer to the HW struct 1008 * 1009 * This function returns the current VSI layer number 1010 */ 1011 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw) 1012 { 1013 /* Num Layers VSI layer 1014 * 9 6 1015 * 7 4 1016 * 5 or less sw_entry_point_layer 1017 */ 1018 /* calculate the VSI layer based on number of layers. */ 1019 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) { 1020 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET; 1021 1022 if (layer > hw->sw_entry_point_layer) 1023 return layer; 1024 } 1025 return hw->sw_entry_point_layer; 1026 } 1027 1028 /** 1029 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree 1030 * @pi: port information structure 1031 * 1032 * This function removes the leaf node that was created by the FW 1033 * during initialization 1034 */ 1035 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi) 1036 { 1037 struct ice_sched_node *node; 1038 1039 node = pi->root; 1040 while (node) { 1041 if (!node->num_children) 1042 break; 1043 node = node->children[0]; 1044 } 1045 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) { 1046 u32 teid = le32_to_cpu(node->info.node_teid); 1047 enum ice_status status; 1048 1049 /* remove the default leaf node */ 1050 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid); 1051 if (!status) 1052 ice_free_sched_node(pi, node); 1053 } 1054 } 1055 1056 /** 1057 * ice_sched_rm_dflt_nodes - free the default nodes in the tree 1058 * @pi: port information structure 1059 * 1060 * This function frees all the nodes except root and TC that were created by 1061 * the FW during initialization 1062 */ 1063 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi) 1064 { 1065 struct ice_sched_node *node; 1066 1067 ice_rm_dflt_leaf_node(pi); 1068 1069 /* remove the default nodes except TC and root nodes */ 1070 node = pi->root; 1071 while (node) { 1072 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer && 1073 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 1074 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) { 1075 ice_free_sched_node(pi, node); 1076 break; 1077 } 1078 1079 if (!node->num_children) 1080 break; 1081 node = node->children[0]; 1082 } 1083 } 1084 1085 /** 1086 * ice_sched_init_port - Initialize scheduler by querying information from FW 1087 * @pi: port info structure for the tree to cleanup 1088 * 1089 * This function is the initial call to find the total number of Tx scheduler 1090 * resources, default topology created by firmware and storing the information 1091 * in SW DB. 1092 */ 1093 enum ice_status ice_sched_init_port(struct ice_port_info *pi) 1094 { 1095 struct ice_aqc_get_topo_elem *buf; 1096 enum ice_status status; 1097 struct ice_hw *hw; 1098 u8 num_branches; 1099 u16 num_elems; 1100 u8 i, j; 1101 1102 if (!pi) 1103 return ICE_ERR_PARAM; 1104 hw = pi->hw; 1105 1106 /* Query the Default Topology from FW */ 1107 buf = devm_kzalloc(ice_hw_to_dev(hw), ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); 1108 if (!buf) 1109 return ICE_ERR_NO_MEMORY; 1110 1111 /* Query default scheduling tree topology */ 1112 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN, 1113 &num_branches, NULL); 1114 if (status) 1115 goto err_init_port; 1116 1117 /* num_branches should be between 1-8 */ 1118 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) { 1119 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n", 1120 num_branches); 1121 status = ICE_ERR_PARAM; 1122 goto err_init_port; 1123 } 1124 1125 /* get the number of elements on the default/first branch */ 1126 num_elems = le16_to_cpu(buf[0].hdr.num_elems); 1127 1128 /* num_elems should always be between 1-9 */ 1129 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) { 1130 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n", 1131 num_elems); 1132 status = ICE_ERR_PARAM; 1133 goto err_init_port; 1134 } 1135 1136 /* If the last node is a leaf node then the index of the queue group 1137 * layer is two less than the number of elements. 1138 */ 1139 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type == 1140 ICE_AQC_ELEM_TYPE_LEAF) 1141 pi->last_node_teid = 1142 le32_to_cpu(buf[0].generic[num_elems - 2].node_teid); 1143 else 1144 pi->last_node_teid = 1145 le32_to_cpu(buf[0].generic[num_elems - 1].node_teid); 1146 1147 /* Insert the Tx Sched root node */ 1148 status = ice_sched_add_root_node(pi, &buf[0].generic[0]); 1149 if (status) 1150 goto err_init_port; 1151 1152 /* Parse the default tree and cache the information */ 1153 for (i = 0; i < num_branches; i++) { 1154 num_elems = le16_to_cpu(buf[i].hdr.num_elems); 1155 1156 /* Skip root element as already inserted */ 1157 for (j = 1; j < num_elems; j++) { 1158 /* update the sw entry point */ 1159 if (buf[0].generic[j].data.elem_type == 1160 ICE_AQC_ELEM_TYPE_ENTRY_POINT) 1161 hw->sw_entry_point_layer = j; 1162 1163 status = ice_sched_add_node(pi, j, &buf[i].generic[j]); 1164 if (status) 1165 goto err_init_port; 1166 } 1167 } 1168 1169 /* Remove the default nodes. */ 1170 if (pi->root) 1171 ice_sched_rm_dflt_nodes(pi); 1172 1173 /* initialize the port for handling the scheduler tree */ 1174 pi->port_state = ICE_SCHED_PORT_STATE_READY; 1175 mutex_init(&pi->sched_lock); 1176 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++) 1177 INIT_LIST_HEAD(&pi->rl_prof_list[i]); 1178 1179 err_init_port: 1180 if (status && pi->root) { 1181 ice_free_sched_node(pi, pi->root); 1182 pi->root = NULL; 1183 } 1184 1185 devm_kfree(ice_hw_to_dev(hw), buf); 1186 return status; 1187 } 1188 1189 /** 1190 * ice_sched_query_res_alloc - query the FW for num of logical sched layers 1191 * @hw: pointer to the HW struct 1192 * 1193 * query FW for allocated scheduler resources and store in HW struct 1194 */ 1195 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) 1196 { 1197 struct ice_aqc_query_txsched_res_resp *buf; 1198 enum ice_status status = 0; 1199 __le16 max_sibl; 1200 u16 i; 1201 1202 if (hw->layer_info) 1203 return status; 1204 1205 buf = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*buf), GFP_KERNEL); 1206 if (!buf) 1207 return ICE_ERR_NO_MEMORY; 1208 1209 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL); 1210 if (status) 1211 goto sched_query_out; 1212 1213 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels); 1214 hw->num_tx_sched_phys_layers = 1215 le16_to_cpu(buf->sched_props.phys_levels); 1216 hw->flattened_layers = buf->sched_props.flattening_bitmap; 1217 hw->max_cgds = buf->sched_props.max_pf_cgds; 1218 1219 /* max sibling group size of current layer refers to the max children 1220 * of the below layer node. 1221 * layer 1 node max children will be layer 2 max sibling group size 1222 * layer 2 node max children will be layer 3 max sibling group size 1223 * and so on. This array will be populated from root (index 0) to 1224 * qgroup layer 7. Leaf node has no children. 1225 */ 1226 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) { 1227 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz; 1228 hw->max_children[i] = le16_to_cpu(max_sibl); 1229 } 1230 1231 hw->layer_info = devm_kmemdup(ice_hw_to_dev(hw), buf->layer_props, 1232 (hw->num_tx_sched_layers * 1233 sizeof(*hw->layer_info)), 1234 GFP_KERNEL); 1235 if (!hw->layer_info) { 1236 status = ICE_ERR_NO_MEMORY; 1237 goto sched_query_out; 1238 } 1239 1240 sched_query_out: 1241 devm_kfree(ice_hw_to_dev(hw), buf); 1242 return status; 1243 } 1244 1245 /** 1246 * ice_sched_find_node_in_subtree - Find node in part of base node subtree 1247 * @hw: pointer to the HW struct 1248 * @base: pointer to the base node 1249 * @node: pointer to the node to search 1250 * 1251 * This function checks whether a given node is part of the base node 1252 * subtree or not 1253 */ 1254 static bool 1255 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 1256 struct ice_sched_node *node) 1257 { 1258 u8 i; 1259 1260 for (i = 0; i < base->num_children; i++) { 1261 struct ice_sched_node *child = base->children[i]; 1262 1263 if (node == child) 1264 return true; 1265 1266 if (child->tx_sched_layer > node->tx_sched_layer) 1267 return false; 1268 1269 /* this recursion is intentional, and wouldn't 1270 * go more than 8 calls 1271 */ 1272 if (ice_sched_find_node_in_subtree(hw, child, node)) 1273 return true; 1274 } 1275 return false; 1276 } 1277 1278 /** 1279 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node 1280 * @pi: port information structure 1281 * @vsi_handle: software VSI handle 1282 * @tc: branch number 1283 * @owner: LAN or RDMA 1284 * 1285 * This function retrieves a free LAN or RDMA queue group node 1286 */ 1287 struct ice_sched_node * 1288 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 1289 u8 owner) 1290 { 1291 struct ice_sched_node *vsi_node, *qgrp_node = NULL; 1292 struct ice_vsi_ctx *vsi_ctx; 1293 u16 max_children; 1294 u8 qgrp_layer; 1295 1296 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw); 1297 max_children = pi->hw->max_children[qgrp_layer]; 1298 1299 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1300 if (!vsi_ctx) 1301 return NULL; 1302 vsi_node = vsi_ctx->sched.vsi_node[tc]; 1303 /* validate invalid VSI ID */ 1304 if (!vsi_node) 1305 goto lan_q_exit; 1306 1307 /* get the first queue group node from VSI sub-tree */ 1308 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer); 1309 while (qgrp_node) { 1310 /* make sure the qgroup node is part of the VSI subtree */ 1311 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node)) 1312 if (qgrp_node->num_children < max_children && 1313 qgrp_node->owner == owner) 1314 break; 1315 qgrp_node = qgrp_node->sibling; 1316 } 1317 1318 lan_q_exit: 1319 return qgrp_node; 1320 } 1321 1322 /** 1323 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID 1324 * @hw: pointer to the HW struct 1325 * @tc_node: pointer to the TC node 1326 * @vsi_handle: software VSI handle 1327 * 1328 * This function retrieves a VSI node for a given VSI ID from a given 1329 * TC branch 1330 */ 1331 static struct ice_sched_node * 1332 ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node, 1333 u16 vsi_handle) 1334 { 1335 struct ice_sched_node *node; 1336 u8 vsi_layer; 1337 1338 vsi_layer = ice_sched_get_vsi_layer(hw); 1339 node = ice_sched_get_first_node(hw->port_info, tc_node, vsi_layer); 1340 1341 /* Check whether it already exists */ 1342 while (node) { 1343 if (node->vsi_handle == vsi_handle) 1344 return node; 1345 node = node->sibling; 1346 } 1347 1348 return node; 1349 } 1350 1351 /** 1352 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes 1353 * @hw: pointer to the HW struct 1354 * @num_qs: number of queues 1355 * @num_nodes: num nodes array 1356 * 1357 * This function calculates the number of VSI child nodes based on the 1358 * number of queues. 1359 */ 1360 static void 1361 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes) 1362 { 1363 u16 num = num_qs; 1364 u8 i, qgl, vsil; 1365 1366 qgl = ice_sched_get_qgrp_layer(hw); 1367 vsil = ice_sched_get_vsi_layer(hw); 1368 1369 /* calculate num nodes from queue group to VSI layer */ 1370 for (i = qgl; i > vsil; i--) { 1371 /* round to the next integer if there is a remainder */ 1372 num = DIV_ROUND_UP(num, hw->max_children[i]); 1373 1374 /* need at least one node */ 1375 num_nodes[i] = num ? num : 1; 1376 } 1377 } 1378 1379 /** 1380 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree 1381 * @pi: port information structure 1382 * @vsi_handle: software VSI handle 1383 * @tc_node: pointer to the TC node 1384 * @num_nodes: pointer to the num nodes that needs to be added per layer 1385 * @owner: node owner (LAN or RDMA) 1386 * 1387 * This function adds the VSI child nodes to tree. It gets called for 1388 * LAN and RDMA separately. 1389 */ 1390 static enum ice_status 1391 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1392 struct ice_sched_node *tc_node, u16 *num_nodes, 1393 u8 owner) 1394 { 1395 struct ice_sched_node *parent, *node; 1396 struct ice_hw *hw = pi->hw; 1397 enum ice_status status; 1398 u32 first_node_teid; 1399 u16 num_added = 0; 1400 u8 i, qgl, vsil; 1401 1402 qgl = ice_sched_get_qgrp_layer(hw); 1403 vsil = ice_sched_get_vsi_layer(hw); 1404 parent = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1405 for (i = vsil + 1; i <= qgl; i++) { 1406 if (!parent) 1407 return ICE_ERR_CFG; 1408 1409 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, 1410 num_nodes[i], 1411 &first_node_teid, 1412 &num_added); 1413 if (status || num_nodes[i] != num_added) 1414 return ICE_ERR_CFG; 1415 1416 /* The newly added node can be a new parent for the next 1417 * layer nodes 1418 */ 1419 if (num_added) { 1420 parent = ice_sched_find_node_by_teid(tc_node, 1421 first_node_teid); 1422 node = parent; 1423 while (node) { 1424 node->owner = owner; 1425 node = node->sibling; 1426 } 1427 } else { 1428 parent = parent->children[0]; 1429 } 1430 } 1431 1432 return 0; 1433 } 1434 1435 /** 1436 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes 1437 * @hw: pointer to the HW struct 1438 * @tc_node: pointer to TC node 1439 * @num_nodes: pointer to num nodes array 1440 * 1441 * This function calculates the number of supported nodes needed to add this 1442 * VSI into Tx tree including the VSI, parent and intermediate nodes in below 1443 * layers 1444 */ 1445 static void 1446 ice_sched_calc_vsi_support_nodes(struct ice_hw *hw, 1447 struct ice_sched_node *tc_node, u16 *num_nodes) 1448 { 1449 struct ice_sched_node *node; 1450 u8 vsil; 1451 int i; 1452 1453 vsil = ice_sched_get_vsi_layer(hw); 1454 for (i = vsil; i >= hw->sw_entry_point_layer; i--) 1455 /* Add intermediate nodes if TC has no children and 1456 * need at least one node for VSI 1457 */ 1458 if (!tc_node->num_children || i == vsil) { 1459 num_nodes[i]++; 1460 } else { 1461 /* If intermediate nodes are reached max children 1462 * then add a new one. 1463 */ 1464 node = ice_sched_get_first_node(hw->port_info, tc_node, 1465 (u8)i); 1466 /* scan all the siblings */ 1467 while (node) { 1468 if (node->num_children < hw->max_children[i]) 1469 break; 1470 node = node->sibling; 1471 } 1472 1473 /* tree has one intermediate node to add this new VSI. 1474 * So no need to calculate supported nodes for below 1475 * layers. 1476 */ 1477 if (node) 1478 break; 1479 /* all the nodes are full, allocate a new one */ 1480 num_nodes[i]++; 1481 } 1482 } 1483 1484 /** 1485 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree 1486 * @pi: port information structure 1487 * @vsi_handle: software VSI handle 1488 * @tc_node: pointer to TC node 1489 * @num_nodes: pointer to num nodes array 1490 * 1491 * This function adds the VSI supported nodes into Tx tree including the 1492 * VSI, its parent and intermediate nodes in below layers 1493 */ 1494 static enum ice_status 1495 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle, 1496 struct ice_sched_node *tc_node, u16 *num_nodes) 1497 { 1498 struct ice_sched_node *parent = tc_node; 1499 enum ice_status status; 1500 u32 first_node_teid; 1501 u16 num_added = 0; 1502 u8 i, vsil; 1503 1504 if (!pi) 1505 return ICE_ERR_PARAM; 1506 1507 vsil = ice_sched_get_vsi_layer(pi->hw); 1508 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) { 1509 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 1510 i, num_nodes[i], 1511 &first_node_teid, 1512 &num_added); 1513 if (status || num_nodes[i] != num_added) 1514 return ICE_ERR_CFG; 1515 1516 /* The newly added node can be a new parent for the next 1517 * layer nodes 1518 */ 1519 if (num_added) 1520 parent = ice_sched_find_node_by_teid(tc_node, 1521 first_node_teid); 1522 else 1523 parent = parent->children[0]; 1524 1525 if (!parent) 1526 return ICE_ERR_CFG; 1527 1528 if (i == vsil) 1529 parent->vsi_handle = vsi_handle; 1530 } 1531 1532 return 0; 1533 } 1534 1535 /** 1536 * ice_sched_add_vsi_to_topo - add a new VSI into tree 1537 * @pi: port information structure 1538 * @vsi_handle: software VSI handle 1539 * @tc: TC number 1540 * 1541 * This function adds a new VSI into scheduler tree 1542 */ 1543 static enum ice_status 1544 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc) 1545 { 1546 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1547 struct ice_sched_node *tc_node; 1548 struct ice_hw *hw = pi->hw; 1549 1550 tc_node = ice_sched_get_tc_node(pi, tc); 1551 if (!tc_node) 1552 return ICE_ERR_PARAM; 1553 1554 /* calculate number of supported nodes needed for this VSI */ 1555 ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes); 1556 1557 /* add VSI supported nodes to TC subtree */ 1558 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node, 1559 num_nodes); 1560 } 1561 1562 /** 1563 * ice_sched_update_vsi_child_nodes - update VSI child nodes 1564 * @pi: port information structure 1565 * @vsi_handle: software VSI handle 1566 * @tc: TC number 1567 * @new_numqs: new number of max queues 1568 * @owner: owner of this subtree 1569 * 1570 * This function updates the VSI child nodes based on the number of queues 1571 */ 1572 static enum ice_status 1573 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1574 u8 tc, u16 new_numqs, u8 owner) 1575 { 1576 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1577 struct ice_sched_node *vsi_node; 1578 struct ice_sched_node *tc_node; 1579 struct ice_vsi_ctx *vsi_ctx; 1580 enum ice_status status = 0; 1581 struct ice_hw *hw = pi->hw; 1582 u16 prev_numqs; 1583 1584 tc_node = ice_sched_get_tc_node(pi, tc); 1585 if (!tc_node) 1586 return ICE_ERR_CFG; 1587 1588 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1589 if (!vsi_node) 1590 return ICE_ERR_CFG; 1591 1592 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1593 if (!vsi_ctx) 1594 return ICE_ERR_PARAM; 1595 1596 prev_numqs = vsi_ctx->sched.max_lanq[tc]; 1597 /* num queues are not changed or less than the previous number */ 1598 if (new_numqs <= prev_numqs) 1599 return status; 1600 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs); 1601 if (status) 1602 return status; 1603 1604 if (new_numqs) 1605 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes); 1606 /* Keep the max number of queue configuration all the time. Update the 1607 * tree only if number of queues > previous number of queues. This may 1608 * leave some extra nodes in the tree if number of queues < previous 1609 * number but that wouldn't harm anything. Removing those extra nodes 1610 * may complicate the code if those nodes are part of SRL or 1611 * individually rate limited. 1612 */ 1613 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node, 1614 new_num_nodes, owner); 1615 if (status) 1616 return status; 1617 vsi_ctx->sched.max_lanq[tc] = new_numqs; 1618 1619 return 0; 1620 } 1621 1622 /** 1623 * ice_sched_cfg_vsi - configure the new/existing VSI 1624 * @pi: port information structure 1625 * @vsi_handle: software VSI handle 1626 * @tc: TC number 1627 * @maxqs: max number of queues 1628 * @owner: LAN or RDMA 1629 * @enable: TC enabled or disabled 1630 * 1631 * This function adds/updates VSI nodes based on the number of queues. If TC is 1632 * enabled and VSI is in suspended state then resume the VSI back. If TC is 1633 * disabled then suspend the VSI if it is not already. 1634 */ 1635 enum ice_status 1636 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 1637 u8 owner, bool enable) 1638 { 1639 struct ice_sched_node *vsi_node, *tc_node; 1640 struct ice_vsi_ctx *vsi_ctx; 1641 enum ice_status status = 0; 1642 struct ice_hw *hw = pi->hw; 1643 1644 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle); 1645 tc_node = ice_sched_get_tc_node(pi, tc); 1646 if (!tc_node) 1647 return ICE_ERR_PARAM; 1648 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1649 if (!vsi_ctx) 1650 return ICE_ERR_PARAM; 1651 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1652 1653 /* suspend the VSI if TC is not enabled */ 1654 if (!enable) { 1655 if (vsi_node && vsi_node->in_use) { 1656 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1657 1658 status = ice_sched_suspend_resume_elems(hw, 1, &teid, 1659 true); 1660 if (!status) 1661 vsi_node->in_use = false; 1662 } 1663 return status; 1664 } 1665 1666 /* TC is enabled, if it is a new VSI then add it to the tree */ 1667 if (!vsi_node) { 1668 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc); 1669 if (status) 1670 return status; 1671 1672 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1673 if (!vsi_node) 1674 return ICE_ERR_CFG; 1675 1676 vsi_ctx->sched.vsi_node[tc] = vsi_node; 1677 vsi_node->in_use = true; 1678 /* invalidate the max queues whenever VSI gets added first time 1679 * into the scheduler tree (boot or after reset). We need to 1680 * recreate the child nodes all the time in these cases. 1681 */ 1682 vsi_ctx->sched.max_lanq[tc] = 0; 1683 } 1684 1685 /* update the VSI child nodes */ 1686 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs, 1687 owner); 1688 if (status) 1689 return status; 1690 1691 /* TC is enabled, resume the VSI if it is in the suspend state */ 1692 if (!vsi_node->in_use) { 1693 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1694 1695 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false); 1696 if (!status) 1697 vsi_node->in_use = true; 1698 } 1699 1700 return status; 1701 } 1702 1703 /** 1704 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry 1705 * @pi: port information structure 1706 * @vsi_handle: software VSI handle 1707 * 1708 * This function removes single aggregator VSI info entry from 1709 * aggregator list. 1710 */ 1711 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle) 1712 { 1713 struct ice_sched_agg_info *agg_info; 1714 struct ice_sched_agg_info *atmp; 1715 1716 list_for_each_entry_safe(agg_info, atmp, &pi->hw->agg_list, 1717 list_entry) { 1718 struct ice_sched_agg_vsi_info *agg_vsi_info; 1719 struct ice_sched_agg_vsi_info *vtmp; 1720 1721 list_for_each_entry_safe(agg_vsi_info, vtmp, 1722 &agg_info->agg_vsi_list, list_entry) 1723 if (agg_vsi_info->vsi_handle == vsi_handle) { 1724 list_del(&agg_vsi_info->list_entry); 1725 devm_kfree(ice_hw_to_dev(pi->hw), 1726 agg_vsi_info); 1727 return; 1728 } 1729 } 1730 } 1731 1732 /** 1733 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree 1734 * @node: pointer to the sub-tree node 1735 * 1736 * This function checks for a leaf node presence in a given sub-tree node. 1737 */ 1738 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node) 1739 { 1740 u8 i; 1741 1742 for (i = 0; i < node->num_children; i++) 1743 if (ice_sched_is_leaf_node_present(node->children[i])) 1744 return true; 1745 /* check for a leaf node */ 1746 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF); 1747 } 1748 1749 /** 1750 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes 1751 * @pi: port information structure 1752 * @vsi_handle: software VSI handle 1753 * @owner: LAN or RDMA 1754 * 1755 * This function removes the VSI and its LAN or RDMA children nodes from the 1756 * scheduler tree. 1757 */ 1758 static enum ice_status 1759 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner) 1760 { 1761 enum ice_status status = ICE_ERR_PARAM; 1762 struct ice_vsi_ctx *vsi_ctx; 1763 u8 i; 1764 1765 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle); 1766 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 1767 return status; 1768 mutex_lock(&pi->sched_lock); 1769 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1770 if (!vsi_ctx) 1771 goto exit_sched_rm_vsi_cfg; 1772 1773 ice_for_each_traffic_class(i) { 1774 struct ice_sched_node *vsi_node, *tc_node; 1775 u8 j = 0; 1776 1777 tc_node = ice_sched_get_tc_node(pi, i); 1778 if (!tc_node) 1779 continue; 1780 1781 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle); 1782 if (!vsi_node) 1783 continue; 1784 1785 if (ice_sched_is_leaf_node_present(vsi_node)) { 1786 ice_debug(pi->hw, ICE_DBG_SCHED, 1787 "VSI has leaf nodes in TC %d\n", i); 1788 status = ICE_ERR_IN_USE; 1789 goto exit_sched_rm_vsi_cfg; 1790 } 1791 while (j < vsi_node->num_children) { 1792 if (vsi_node->children[j]->owner == owner) { 1793 ice_free_sched_node(pi, vsi_node->children[j]); 1794 1795 /* reset the counter again since the num 1796 * children will be updated after node removal 1797 */ 1798 j = 0; 1799 } else { 1800 j++; 1801 } 1802 } 1803 /* remove the VSI if it has no children */ 1804 if (!vsi_node->num_children) { 1805 ice_free_sched_node(pi, vsi_node); 1806 vsi_ctx->sched.vsi_node[i] = NULL; 1807 1808 /* clean up aggregator related VSI info if any */ 1809 ice_sched_rm_agg_vsi_info(pi, vsi_handle); 1810 } 1811 if (owner == ICE_SCHED_NODE_OWNER_LAN) 1812 vsi_ctx->sched.max_lanq[i] = 0; 1813 } 1814 status = 0; 1815 1816 exit_sched_rm_vsi_cfg: 1817 mutex_unlock(&pi->sched_lock); 1818 return status; 1819 } 1820 1821 /** 1822 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes 1823 * @pi: port information structure 1824 * @vsi_handle: software VSI handle 1825 * 1826 * This function clears the VSI and its LAN children nodes from scheduler tree 1827 * for all TCs. 1828 */ 1829 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) 1830 { 1831 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); 1832 } 1833 1834 /** 1835 * ice_sched_rm_unused_rl_prof - remove unused RL profile 1836 * @pi: port information structure 1837 * 1838 * This function removes unused rate limit profiles from the HW and 1839 * SW DB. The caller needs to hold scheduler lock. 1840 */ 1841 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi) 1842 { 1843 u16 ln; 1844 1845 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 1846 struct ice_aqc_rl_profile_info *rl_prof_elem; 1847 struct ice_aqc_rl_profile_info *rl_prof_tmp; 1848 1849 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 1850 &pi->rl_prof_list[ln], list_entry) { 1851 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem)) 1852 ice_debug(pi->hw, ICE_DBG_SCHED, 1853 "Removed rl profile\n"); 1854 } 1855 } 1856 } 1857 1858 /** 1859 * ice_sched_update_elem - update element 1860 * @hw: pointer to the HW struct 1861 * @node: pointer to node 1862 * @info: node info to update 1863 * 1864 * Update the HW DB, and local SW DB of node. Update the scheduling 1865 * parameters of node from argument info data buffer (Info->data buf) and 1866 * returns success or error on config sched element failure. The caller 1867 * needs to hold scheduler lock. 1868 */ 1869 static enum ice_status 1870 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node, 1871 struct ice_aqc_txsched_elem_data *info) 1872 { 1873 struct ice_aqc_txsched_elem_data buf; 1874 enum ice_status status; 1875 u16 elem_cfgd = 0; 1876 u16 num_elems = 1; 1877 1878 buf = *info; 1879 /* Parent TEID is reserved field in this aq call */ 1880 buf.parent_teid = 0; 1881 /* Element type is reserved field in this aq call */ 1882 buf.data.elem_type = 0; 1883 /* Flags is reserved field in this aq call */ 1884 buf.data.flags = 0; 1885 1886 /* Update HW DB */ 1887 /* Configure element node */ 1888 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf), 1889 &elem_cfgd, NULL); 1890 if (status || elem_cfgd != num_elems) { 1891 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n"); 1892 return ICE_ERR_CFG; 1893 } 1894 1895 /* Config success case */ 1896 /* Now update local SW DB */ 1897 /* Only copy the data portion of info buffer */ 1898 node->info.data = info->data; 1899 return status; 1900 } 1901 1902 /** 1903 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params 1904 * @hw: pointer to the HW struct 1905 * @node: sched node to configure 1906 * @rl_type: rate limit type CIR, EIR, or shared 1907 * @bw_alloc: BW weight/allocation 1908 * 1909 * This function configures node element's BW allocation. 1910 */ 1911 static enum ice_status 1912 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node, 1913 enum ice_rl_type rl_type, u16 bw_alloc) 1914 { 1915 struct ice_aqc_txsched_elem_data buf; 1916 struct ice_aqc_txsched_elem *data; 1917 enum ice_status status; 1918 1919 buf = node->info; 1920 data = &buf.data; 1921 if (rl_type == ICE_MIN_BW) { 1922 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 1923 data->cir_bw.bw_alloc = cpu_to_le16(bw_alloc); 1924 } else if (rl_type == ICE_MAX_BW) { 1925 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 1926 data->eir_bw.bw_alloc = cpu_to_le16(bw_alloc); 1927 } else { 1928 return ICE_ERR_PARAM; 1929 } 1930 1931 /* Configure element */ 1932 status = ice_sched_update_elem(hw, node, &buf); 1933 return status; 1934 } 1935 1936 /** 1937 * ice_set_clear_cir_bw - set or clear CIR BW 1938 * @bw_t_info: bandwidth type information structure 1939 * @bw: bandwidth in Kbps - Kilo bits per sec 1940 * 1941 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info. 1942 */ 1943 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 1944 { 1945 if (bw == ICE_SCHED_DFLT_BW) { 1946 clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 1947 bw_t_info->cir_bw.bw = 0; 1948 } else { 1949 /* Save type of BW information */ 1950 set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 1951 bw_t_info->cir_bw.bw = bw; 1952 } 1953 } 1954 1955 /** 1956 * ice_set_clear_eir_bw - set or clear EIR BW 1957 * @bw_t_info: bandwidth type information structure 1958 * @bw: bandwidth in Kbps - Kilo bits per sec 1959 * 1960 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info. 1961 */ 1962 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 1963 { 1964 if (bw == ICE_SCHED_DFLT_BW) { 1965 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 1966 bw_t_info->eir_bw.bw = 0; 1967 } else { 1968 /* EIR BW and Shared BW profiles are mutually exclusive and 1969 * hence only one of them may be set for any given element. 1970 * First clear earlier saved shared BW information. 1971 */ 1972 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 1973 bw_t_info->shared_bw = 0; 1974 /* save EIR BW information */ 1975 set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 1976 bw_t_info->eir_bw.bw = bw; 1977 } 1978 } 1979 1980 /** 1981 * ice_set_clear_shared_bw - set or clear shared BW 1982 * @bw_t_info: bandwidth type information structure 1983 * @bw: bandwidth in Kbps - Kilo bits per sec 1984 * 1985 * Save or clear shared bandwidth (BW) in the passed param bw_t_info. 1986 */ 1987 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 1988 { 1989 if (bw == ICE_SCHED_DFLT_BW) { 1990 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 1991 bw_t_info->shared_bw = 0; 1992 } else { 1993 /* EIR BW and Shared BW profiles are mutually exclusive and 1994 * hence only one of them may be set for any given element. 1995 * First clear earlier saved EIR BW information. 1996 */ 1997 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 1998 bw_t_info->eir_bw.bw = 0; 1999 /* save shared BW information */ 2000 set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2001 bw_t_info->shared_bw = bw; 2002 } 2003 } 2004 2005 /** 2006 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter 2007 * @bw: bandwidth in Kbps 2008 * 2009 * This function calculates the wakeup parameter of RL profile. 2010 */ 2011 static u16 ice_sched_calc_wakeup(s32 bw) 2012 { 2013 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f; 2014 s32 wakeup_f_int; 2015 u16 wakeup = 0; 2016 2017 /* Get the wakeup integer value */ 2018 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2019 wakeup_int = div64_long(ICE_RL_PROF_FREQUENCY, bytes_per_sec); 2020 if (wakeup_int > 63) { 2021 wakeup = (u16)((1 << 15) | wakeup_int); 2022 } else { 2023 /* Calculate fraction value up to 4 decimals 2024 * Convert Integer value to a constant multiplier 2025 */ 2026 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int; 2027 wakeup_a = div64_long((s64)ICE_RL_PROF_MULTIPLIER * 2028 ICE_RL_PROF_FREQUENCY, 2029 bytes_per_sec); 2030 2031 /* Get Fraction value */ 2032 wakeup_f = wakeup_a - wakeup_b; 2033 2034 /* Round up the Fractional value via Ceil(Fractional value) */ 2035 if (wakeup_f > div64_long(ICE_RL_PROF_MULTIPLIER, 2)) 2036 wakeup_f += 1; 2037 2038 wakeup_f_int = (s32)div64_long(wakeup_f * ICE_RL_PROF_FRACTION, 2039 ICE_RL_PROF_MULTIPLIER); 2040 wakeup |= (u16)(wakeup_int << 9); 2041 wakeup |= (u16)(0x1ff & wakeup_f_int); 2042 } 2043 2044 return wakeup; 2045 } 2046 2047 /** 2048 * ice_sched_bw_to_rl_profile - convert BW to profile parameters 2049 * @bw: bandwidth in Kbps 2050 * @profile: profile parameters to return 2051 * 2052 * This function converts the BW to profile structure format. 2053 */ 2054 static enum ice_status 2055 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile) 2056 { 2057 enum ice_status status = ICE_ERR_PARAM; 2058 s64 bytes_per_sec, ts_rate, mv_tmp; 2059 bool found = false; 2060 s32 encode = 0; 2061 s64 mv = 0; 2062 s32 i; 2063 2064 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */ 2065 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW) 2066 return status; 2067 2068 /* Bytes per second from Kbps */ 2069 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2070 2071 /* encode is 6 bits but really useful are 5 bits */ 2072 for (i = 0; i < 64; i++) { 2073 u64 pow_result = BIT_ULL(i); 2074 2075 ts_rate = div64_long((s64)ICE_RL_PROF_FREQUENCY, 2076 pow_result * ICE_RL_PROF_TS_MULTIPLIER); 2077 if (ts_rate <= 0) 2078 continue; 2079 2080 /* Multiplier value */ 2081 mv_tmp = div64_long(bytes_per_sec * ICE_RL_PROF_MULTIPLIER, 2082 ts_rate); 2083 2084 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */ 2085 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER); 2086 2087 /* First multiplier value greater than the given 2088 * accuracy bytes 2089 */ 2090 if (mv > ICE_RL_PROF_ACCURACY_BYTES) { 2091 encode = i; 2092 found = true; 2093 break; 2094 } 2095 } 2096 if (found) { 2097 u16 wm; 2098 2099 wm = ice_sched_calc_wakeup(bw); 2100 profile->rl_multiply = cpu_to_le16(mv); 2101 profile->wake_up_calc = cpu_to_le16(wm); 2102 profile->rl_encode = cpu_to_le16(encode); 2103 status = 0; 2104 } else { 2105 status = ICE_ERR_DOES_NOT_EXIST; 2106 } 2107 2108 return status; 2109 } 2110 2111 /** 2112 * ice_sched_add_rl_profile - add RL profile 2113 * @pi: port information structure 2114 * @rl_type: type of rate limit BW - min, max, or shared 2115 * @bw: bandwidth in Kbps - Kilo bits per sec 2116 * @layer_num: specifies in which layer to create profile 2117 * 2118 * This function first checks the existing list for corresponding BW 2119 * parameter. If it exists, it returns the associated profile otherwise 2120 * it creates a new rate limit profile for requested BW, and adds it to 2121 * the HW DB and local list. It returns the new profile or null on error. 2122 * The caller needs to hold the scheduler lock. 2123 */ 2124 static struct ice_aqc_rl_profile_info * 2125 ice_sched_add_rl_profile(struct ice_port_info *pi, 2126 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 2127 { 2128 struct ice_aqc_rl_profile_info *rl_prof_elem; 2129 u16 profiles_added = 0, num_profiles = 1; 2130 struct ice_aqc_rl_profile_elem *buf; 2131 enum ice_status status; 2132 struct ice_hw *hw; 2133 u8 profile_type; 2134 2135 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 2136 return NULL; 2137 switch (rl_type) { 2138 case ICE_MIN_BW: 2139 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 2140 break; 2141 case ICE_MAX_BW: 2142 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 2143 break; 2144 case ICE_SHARED_BW: 2145 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 2146 break; 2147 default: 2148 return NULL; 2149 } 2150 2151 if (!pi) 2152 return NULL; 2153 hw = pi->hw; 2154 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 2155 list_entry) 2156 if (rl_prof_elem->profile.flags == profile_type && 2157 rl_prof_elem->bw == bw) 2158 /* Return existing profile ID info */ 2159 return rl_prof_elem; 2160 2161 /* Create new profile ID */ 2162 rl_prof_elem = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*rl_prof_elem), 2163 GFP_KERNEL); 2164 2165 if (!rl_prof_elem) 2166 return NULL; 2167 2168 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile); 2169 if (status) 2170 goto exit_add_rl_prof; 2171 2172 rl_prof_elem->bw = bw; 2173 /* layer_num is zero relative, and fw expects level from 1 to 9 */ 2174 rl_prof_elem->profile.level = layer_num + 1; 2175 rl_prof_elem->profile.flags = profile_type; 2176 rl_prof_elem->profile.max_burst_size = cpu_to_le16(hw->max_burst_size); 2177 2178 /* Create new entry in HW DB */ 2179 buf = &rl_prof_elem->profile; 2180 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf), 2181 &profiles_added, NULL); 2182 if (status || profiles_added != num_profiles) 2183 goto exit_add_rl_prof; 2184 2185 /* Good entry - add in the list */ 2186 rl_prof_elem->prof_id_ref = 0; 2187 list_add(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]); 2188 return rl_prof_elem; 2189 2190 exit_add_rl_prof: 2191 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 2192 return NULL; 2193 } 2194 2195 /** 2196 * ice_sched_cfg_node_bw_lmt - configure node sched params 2197 * @hw: pointer to the HW struct 2198 * @node: sched node to configure 2199 * @rl_type: rate limit type CIR, EIR, or shared 2200 * @rl_prof_id: rate limit profile ID 2201 * 2202 * This function configures node element's BW limit. 2203 */ 2204 static enum ice_status 2205 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node, 2206 enum ice_rl_type rl_type, u16 rl_prof_id) 2207 { 2208 struct ice_aqc_txsched_elem_data buf; 2209 struct ice_aqc_txsched_elem *data; 2210 2211 buf = node->info; 2212 data = &buf.data; 2213 switch (rl_type) { 2214 case ICE_MIN_BW: 2215 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 2216 data->cir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 2217 break; 2218 case ICE_MAX_BW: 2219 /* EIR BW and Shared BW profiles are mutually exclusive and 2220 * hence only one of them may be set for any given element 2221 */ 2222 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 2223 return ICE_ERR_CFG; 2224 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 2225 data->eir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 2226 break; 2227 case ICE_SHARED_BW: 2228 /* Check for removing shared BW */ 2229 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) { 2230 /* remove shared profile */ 2231 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED; 2232 data->srl_id = 0; /* clear SRL field */ 2233 2234 /* enable back EIR to default profile */ 2235 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 2236 data->eir_bw.bw_profile_idx = 2237 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 2238 break; 2239 } 2240 /* EIR BW and Shared BW profiles are mutually exclusive and 2241 * hence only one of them may be set for any given element 2242 */ 2243 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) && 2244 (le16_to_cpu(data->eir_bw.bw_profile_idx) != 2245 ICE_SCHED_DFLT_RL_PROF_ID)) 2246 return ICE_ERR_CFG; 2247 /* EIR BW is set to default, disable it */ 2248 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR; 2249 /* Okay to enable shared BW now */ 2250 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED; 2251 data->srl_id = cpu_to_le16(rl_prof_id); 2252 break; 2253 default: 2254 /* Unknown rate limit type */ 2255 return ICE_ERR_PARAM; 2256 } 2257 2258 /* Configure element */ 2259 return ice_sched_update_elem(hw, node, &buf); 2260 } 2261 2262 /** 2263 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID 2264 * @node: sched node 2265 * @rl_type: rate limit type 2266 * 2267 * If existing profile matches, it returns the corresponding rate 2268 * limit profile ID, otherwise it returns an invalid ID as error. 2269 */ 2270 static u16 2271 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node, 2272 enum ice_rl_type rl_type) 2273 { 2274 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID; 2275 struct ice_aqc_txsched_elem *data; 2276 2277 data = &node->info.data; 2278 switch (rl_type) { 2279 case ICE_MIN_BW: 2280 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR) 2281 rl_prof_id = le16_to_cpu(data->cir_bw.bw_profile_idx); 2282 break; 2283 case ICE_MAX_BW: 2284 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR) 2285 rl_prof_id = le16_to_cpu(data->eir_bw.bw_profile_idx); 2286 break; 2287 case ICE_SHARED_BW: 2288 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 2289 rl_prof_id = le16_to_cpu(data->srl_id); 2290 break; 2291 default: 2292 break; 2293 } 2294 2295 return rl_prof_id; 2296 } 2297 2298 /** 2299 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer 2300 * @pi: port information structure 2301 * @rl_type: type of rate limit BW - min, max, or shared 2302 * @layer_index: layer index 2303 * 2304 * This function returns requested profile creation layer. 2305 */ 2306 static u8 2307 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type, 2308 u8 layer_index) 2309 { 2310 struct ice_hw *hw = pi->hw; 2311 2312 if (layer_index >= hw->num_tx_sched_layers) 2313 return ICE_SCHED_INVAL_LAYER_NUM; 2314 switch (rl_type) { 2315 case ICE_MIN_BW: 2316 if (hw->layer_info[layer_index].max_cir_rl_profiles) 2317 return layer_index; 2318 break; 2319 case ICE_MAX_BW: 2320 if (hw->layer_info[layer_index].max_eir_rl_profiles) 2321 return layer_index; 2322 break; 2323 case ICE_SHARED_BW: 2324 /* if current layer doesn't support SRL profile creation 2325 * then try a layer up or down. 2326 */ 2327 if (hw->layer_info[layer_index].max_srl_profiles) 2328 return layer_index; 2329 else if (layer_index < hw->num_tx_sched_layers - 1 && 2330 hw->layer_info[layer_index + 1].max_srl_profiles) 2331 return layer_index + 1; 2332 else if (layer_index > 0 && 2333 hw->layer_info[layer_index - 1].max_srl_profiles) 2334 return layer_index - 1; 2335 break; 2336 default: 2337 break; 2338 } 2339 return ICE_SCHED_INVAL_LAYER_NUM; 2340 } 2341 2342 /** 2343 * ice_sched_get_srl_node - get shared rate limit node 2344 * @node: tree node 2345 * @srl_layer: shared rate limit layer 2346 * 2347 * This function returns SRL node to be used for shared rate limit purpose. 2348 * The caller needs to hold scheduler lock. 2349 */ 2350 static struct ice_sched_node * 2351 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer) 2352 { 2353 if (srl_layer > node->tx_sched_layer) 2354 return node->children[0]; 2355 else if (srl_layer < node->tx_sched_layer) 2356 /* Node can't be created without a parent. It will always 2357 * have a valid parent except root node. 2358 */ 2359 return node->parent; 2360 else 2361 return node; 2362 } 2363 2364 /** 2365 * ice_sched_rm_rl_profile - remove RL profile ID 2366 * @pi: port information structure 2367 * @layer_num: layer number where profiles are saved 2368 * @profile_type: profile type like EIR, CIR, or SRL 2369 * @profile_id: profile ID to remove 2370 * 2371 * This function removes rate limit profile from layer 'layer_num' of type 2372 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold 2373 * scheduler lock. 2374 */ 2375 static enum ice_status 2376 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type, 2377 u16 profile_id) 2378 { 2379 struct ice_aqc_rl_profile_info *rl_prof_elem; 2380 enum ice_status status = 0; 2381 2382 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 2383 return ICE_ERR_PARAM; 2384 /* Check the existing list for RL profile */ 2385 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 2386 list_entry) 2387 if (rl_prof_elem->profile.flags == profile_type && 2388 le16_to_cpu(rl_prof_elem->profile.profile_id) == 2389 profile_id) { 2390 if (rl_prof_elem->prof_id_ref) 2391 rl_prof_elem->prof_id_ref--; 2392 2393 /* Remove old profile ID from database */ 2394 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem); 2395 if (status && status != ICE_ERR_IN_USE) 2396 ice_debug(pi->hw, ICE_DBG_SCHED, 2397 "Remove rl profile failed\n"); 2398 break; 2399 } 2400 if (status == ICE_ERR_IN_USE) 2401 status = 0; 2402 return status; 2403 } 2404 2405 /** 2406 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default 2407 * @pi: port information structure 2408 * @node: pointer to node structure 2409 * @rl_type: rate limit type min, max, or shared 2410 * @layer_num: layer number where RL profiles are saved 2411 * 2412 * This function configures node element's BW rate limit profile ID of 2413 * type CIR, EIR, or SRL to default. This function needs to be called 2414 * with the scheduler lock held. 2415 */ 2416 static enum ice_status 2417 ice_sched_set_node_bw_dflt(struct ice_port_info *pi, 2418 struct ice_sched_node *node, 2419 enum ice_rl_type rl_type, u8 layer_num) 2420 { 2421 enum ice_status status; 2422 struct ice_hw *hw; 2423 u8 profile_type; 2424 u16 rl_prof_id; 2425 u16 old_id; 2426 2427 hw = pi->hw; 2428 switch (rl_type) { 2429 case ICE_MIN_BW: 2430 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 2431 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 2432 break; 2433 case ICE_MAX_BW: 2434 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 2435 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 2436 break; 2437 case ICE_SHARED_BW: 2438 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 2439 /* No SRL is configured for default case */ 2440 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID; 2441 break; 2442 default: 2443 return ICE_ERR_PARAM; 2444 } 2445 /* Save existing RL prof ID for later clean up */ 2446 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 2447 /* Configure BW scheduling parameters */ 2448 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 2449 if (status) 2450 return status; 2451 2452 /* Remove stale RL profile ID */ 2453 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID || 2454 old_id == ICE_SCHED_INVAL_PROF_ID) 2455 return 0; 2456 2457 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id); 2458 } 2459 2460 /** 2461 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness 2462 * @pi: port information structure 2463 * @node: pointer to node structure 2464 * @layer_num: layer number where rate limit profiles are saved 2465 * @rl_type: rate limit type min, max, or shared 2466 * @bw: bandwidth value 2467 * 2468 * This function prepares node element's bandwidth to SRL or EIR exclusively. 2469 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of 2470 * them may be set for any given element. This function needs to be called 2471 * with the scheduler lock held. 2472 */ 2473 static enum ice_status 2474 ice_sched_set_eir_srl_excl(struct ice_port_info *pi, 2475 struct ice_sched_node *node, 2476 u8 layer_num, enum ice_rl_type rl_type, u32 bw) 2477 { 2478 if (rl_type == ICE_SHARED_BW) { 2479 /* SRL node passed in this case, it may be different node */ 2480 if (bw == ICE_SCHED_DFLT_BW) 2481 /* SRL being removed, ice_sched_cfg_node_bw_lmt() 2482 * enables EIR to default. EIR is not set in this 2483 * case, so no additional action is required. 2484 */ 2485 return 0; 2486 2487 /* SRL being configured, set EIR to default here. 2488 * ice_sched_cfg_node_bw_lmt() disables EIR when it 2489 * configures SRL 2490 */ 2491 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW, 2492 layer_num); 2493 } else if (rl_type == ICE_MAX_BW && 2494 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) { 2495 /* Remove Shared profile. Set default shared BW call 2496 * removes shared profile for a node. 2497 */ 2498 return ice_sched_set_node_bw_dflt(pi, node, 2499 ICE_SHARED_BW, 2500 layer_num); 2501 } 2502 return 0; 2503 } 2504 2505 /** 2506 * ice_sched_set_node_bw - set node's bandwidth 2507 * @pi: port information structure 2508 * @node: tree node 2509 * @rl_type: rate limit type min, max, or shared 2510 * @bw: bandwidth in Kbps - Kilo bits per sec 2511 * @layer_num: layer number 2512 * 2513 * This function adds new profile corresponding to requested BW, configures 2514 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile 2515 * ID from local database. The caller needs to hold scheduler lock. 2516 */ 2517 static enum ice_status 2518 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, 2519 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 2520 { 2521 struct ice_aqc_rl_profile_info *rl_prof_info; 2522 enum ice_status status = ICE_ERR_PARAM; 2523 struct ice_hw *hw = pi->hw; 2524 u16 old_id, rl_prof_id; 2525 2526 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num); 2527 if (!rl_prof_info) 2528 return status; 2529 2530 rl_prof_id = le16_to_cpu(rl_prof_info->profile.profile_id); 2531 2532 /* Save existing RL prof ID for later clean up */ 2533 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 2534 /* Configure BW scheduling parameters */ 2535 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 2536 if (status) 2537 return status; 2538 2539 /* New changes has been applied */ 2540 /* Increment the profile ID reference count */ 2541 rl_prof_info->prof_id_ref++; 2542 2543 /* Check for old ID removal */ 2544 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) || 2545 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id) 2546 return 0; 2547 2548 return ice_sched_rm_rl_profile(pi, layer_num, 2549 rl_prof_info->profile.flags, 2550 old_id); 2551 } 2552 2553 /** 2554 * ice_sched_set_node_bw_lmt - set node's BW limit 2555 * @pi: port information structure 2556 * @node: tree node 2557 * @rl_type: rate limit type min, max, or shared 2558 * @bw: bandwidth in Kbps - Kilo bits per sec 2559 * 2560 * It updates node's BW limit parameters like BW RL profile ID of type CIR, 2561 * EIR, or SRL. The caller needs to hold scheduler lock. 2562 */ 2563 static enum ice_status 2564 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, 2565 enum ice_rl_type rl_type, u32 bw) 2566 { 2567 struct ice_sched_node *cfg_node = node; 2568 enum ice_status status; 2569 2570 struct ice_hw *hw; 2571 u8 layer_num; 2572 2573 if (!pi) 2574 return ICE_ERR_PARAM; 2575 hw = pi->hw; 2576 /* Remove unused RL profile IDs from HW and SW DB */ 2577 ice_sched_rm_unused_rl_prof(pi); 2578 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type, 2579 node->tx_sched_layer); 2580 if (layer_num >= hw->num_tx_sched_layers) 2581 return ICE_ERR_PARAM; 2582 2583 if (rl_type == ICE_SHARED_BW) { 2584 /* SRL node may be different */ 2585 cfg_node = ice_sched_get_srl_node(node, layer_num); 2586 if (!cfg_node) 2587 return ICE_ERR_CFG; 2588 } 2589 /* EIR BW and Shared BW profiles are mutually exclusive and 2590 * hence only one of them may be set for any given element 2591 */ 2592 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type, 2593 bw); 2594 if (status) 2595 return status; 2596 if (bw == ICE_SCHED_DFLT_BW) 2597 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type, 2598 layer_num); 2599 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num); 2600 } 2601 2602 /** 2603 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default 2604 * @pi: port information structure 2605 * @node: pointer to node structure 2606 * @rl_type: rate limit type min, max, or shared 2607 * 2608 * This function configures node element's BW rate limit profile ID of 2609 * type CIR, EIR, or SRL to default. This function needs to be called 2610 * with the scheduler lock held. 2611 */ 2612 static enum ice_status 2613 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi, 2614 struct ice_sched_node *node, 2615 enum ice_rl_type rl_type) 2616 { 2617 return ice_sched_set_node_bw_lmt(pi, node, rl_type, 2618 ICE_SCHED_DFLT_BW); 2619 } 2620 2621 /** 2622 * ice_sched_validate_srl_node - Check node for SRL applicability 2623 * @node: sched node to configure 2624 * @sel_layer: selected SRL layer 2625 * 2626 * This function checks if the SRL can be applied to a selected layer node on 2627 * behalf of the requested node (first argument). This function needs to be 2628 * called with scheduler lock held. 2629 */ 2630 static enum ice_status 2631 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer) 2632 { 2633 /* SRL profiles are not available on all layers. Check if the 2634 * SRL profile can be applied to a node above or below the 2635 * requested node. SRL configuration is possible only if the 2636 * selected layer's node has single child. 2637 */ 2638 if (sel_layer == node->tx_sched_layer || 2639 ((sel_layer == node->tx_sched_layer + 1) && 2640 node->num_children == 1) || 2641 ((sel_layer == node->tx_sched_layer - 1) && 2642 (node->parent && node->parent->num_children == 1))) 2643 return 0; 2644 2645 return ICE_ERR_CFG; 2646 } 2647 2648 /** 2649 * ice_sched_save_q_bw - save queue node's BW information 2650 * @q_ctx: queue context structure 2651 * @rl_type: rate limit type min, max, or shared 2652 * @bw: bandwidth in Kbps - Kilo bits per sec 2653 * 2654 * Save BW information of queue type node for post replay use. 2655 */ 2656 static enum ice_status 2657 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw) 2658 { 2659 switch (rl_type) { 2660 case ICE_MIN_BW: 2661 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw); 2662 break; 2663 case ICE_MAX_BW: 2664 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw); 2665 break; 2666 case ICE_SHARED_BW: 2667 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw); 2668 break; 2669 default: 2670 return ICE_ERR_PARAM; 2671 } 2672 return 0; 2673 } 2674 2675 /** 2676 * ice_sched_set_q_bw_lmt - sets queue BW limit 2677 * @pi: port information structure 2678 * @vsi_handle: sw VSI handle 2679 * @tc: traffic class 2680 * @q_handle: software queue handle 2681 * @rl_type: min, max, or shared 2682 * @bw: bandwidth in Kbps 2683 * 2684 * This function sets BW limit of queue scheduling node. 2685 */ 2686 static enum ice_status 2687 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2688 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 2689 { 2690 enum ice_status status = ICE_ERR_PARAM; 2691 struct ice_sched_node *node; 2692 struct ice_q_ctx *q_ctx; 2693 2694 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 2695 return ICE_ERR_PARAM; 2696 mutex_lock(&pi->sched_lock); 2697 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle); 2698 if (!q_ctx) 2699 goto exit_q_bw_lmt; 2700 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 2701 if (!node) { 2702 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n"); 2703 goto exit_q_bw_lmt; 2704 } 2705 2706 /* Return error if it is not a leaf node */ 2707 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) 2708 goto exit_q_bw_lmt; 2709 2710 /* SRL bandwidth layer selection */ 2711 if (rl_type == ICE_SHARED_BW) { 2712 u8 sel_layer; /* selected layer */ 2713 2714 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type, 2715 node->tx_sched_layer); 2716 if (sel_layer >= pi->hw->num_tx_sched_layers) { 2717 status = ICE_ERR_PARAM; 2718 goto exit_q_bw_lmt; 2719 } 2720 status = ice_sched_validate_srl_node(node, sel_layer); 2721 if (status) 2722 goto exit_q_bw_lmt; 2723 } 2724 2725 if (bw == ICE_SCHED_DFLT_BW) 2726 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type); 2727 else 2728 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw); 2729 2730 if (!status) 2731 status = ice_sched_save_q_bw(q_ctx, rl_type, bw); 2732 2733 exit_q_bw_lmt: 2734 mutex_unlock(&pi->sched_lock); 2735 return status; 2736 } 2737 2738 /** 2739 * ice_cfg_q_bw_lmt - configure queue BW limit 2740 * @pi: port information structure 2741 * @vsi_handle: sw VSI handle 2742 * @tc: traffic class 2743 * @q_handle: software queue handle 2744 * @rl_type: min, max, or shared 2745 * @bw: bandwidth in Kbps 2746 * 2747 * This function configures BW limit of queue scheduling node. 2748 */ 2749 enum ice_status 2750 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2751 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 2752 { 2753 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 2754 bw); 2755 } 2756 2757 /** 2758 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit 2759 * @pi: port information structure 2760 * @vsi_handle: sw VSI handle 2761 * @tc: traffic class 2762 * @q_handle: software queue handle 2763 * @rl_type: min, max, or shared 2764 * 2765 * This function configures BW default limit of queue scheduling node. 2766 */ 2767 enum ice_status 2768 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2769 u16 q_handle, enum ice_rl_type rl_type) 2770 { 2771 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 2772 ICE_SCHED_DFLT_BW); 2773 } 2774 2775 /** 2776 * ice_cfg_rl_burst_size - Set burst size value 2777 * @hw: pointer to the HW struct 2778 * @bytes: burst size in bytes 2779 * 2780 * This function configures/set the burst size to requested new value. The new 2781 * burst size value is used for future rate limit calls. It doesn't change the 2782 * existing or previously created RL profiles. 2783 */ 2784 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes) 2785 { 2786 u16 burst_size_to_prog; 2787 2788 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED || 2789 bytes > ICE_MAX_BURST_SIZE_ALLOWED) 2790 return ICE_ERR_PARAM; 2791 if (ice_round_to_num(bytes, 64) <= 2792 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) { 2793 /* 64 byte granularity case */ 2794 /* Disable MSB granularity bit */ 2795 burst_size_to_prog = ICE_64_BYTE_GRANULARITY; 2796 /* round number to nearest 64 byte granularity */ 2797 bytes = ice_round_to_num(bytes, 64); 2798 /* The value is in 64 byte chunks */ 2799 burst_size_to_prog |= (u16)(bytes / 64); 2800 } else { 2801 /* k bytes granularity case */ 2802 /* Enable MSB granularity bit */ 2803 burst_size_to_prog = ICE_KBYTE_GRANULARITY; 2804 /* round number to nearest 1024 granularity */ 2805 bytes = ice_round_to_num(bytes, 1024); 2806 /* check rounding doesn't go beyond allowed */ 2807 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY) 2808 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY; 2809 /* The value is in k bytes */ 2810 burst_size_to_prog |= (u16)(bytes / 1024); 2811 } 2812 hw->max_burst_size = burst_size_to_prog; 2813 return 0; 2814 } 2815 2816 /** 2817 * ice_sched_replay_node_prio - re-configure node priority 2818 * @hw: pointer to the HW struct 2819 * @node: sched node to configure 2820 * @priority: priority value 2821 * 2822 * This function configures node element's priority value. It 2823 * needs to be called with scheduler lock held. 2824 */ 2825 static enum ice_status 2826 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node, 2827 u8 priority) 2828 { 2829 struct ice_aqc_txsched_elem_data buf; 2830 struct ice_aqc_txsched_elem *data; 2831 enum ice_status status; 2832 2833 buf = node->info; 2834 data = &buf.data; 2835 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC; 2836 data->generic = priority; 2837 2838 /* Configure element */ 2839 status = ice_sched_update_elem(hw, node, &buf); 2840 return status; 2841 } 2842 2843 /** 2844 * ice_sched_replay_node_bw - replay node(s) BW 2845 * @hw: pointer to the HW struct 2846 * @node: sched node to configure 2847 * @bw_t_info: BW type information 2848 * 2849 * This function restores node's BW from bw_t_info. The caller needs 2850 * to hold the scheduler lock. 2851 */ 2852 static enum ice_status 2853 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node, 2854 struct ice_bw_type_info *bw_t_info) 2855 { 2856 struct ice_port_info *pi = hw->port_info; 2857 enum ice_status status = ICE_ERR_PARAM; 2858 u16 bw_alloc; 2859 2860 if (!node) 2861 return status; 2862 if (bitmap_empty(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT)) 2863 return 0; 2864 if (test_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap)) { 2865 status = ice_sched_replay_node_prio(hw, node, 2866 bw_t_info->generic); 2867 if (status) 2868 return status; 2869 } 2870 if (test_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap)) { 2871 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW, 2872 bw_t_info->cir_bw.bw); 2873 if (status) 2874 return status; 2875 } 2876 if (test_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap)) { 2877 bw_alloc = bw_t_info->cir_bw.bw_alloc; 2878 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW, 2879 bw_alloc); 2880 if (status) 2881 return status; 2882 } 2883 if (test_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap)) { 2884 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW, 2885 bw_t_info->eir_bw.bw); 2886 if (status) 2887 return status; 2888 } 2889 if (test_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap)) { 2890 bw_alloc = bw_t_info->eir_bw.bw_alloc; 2891 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW, 2892 bw_alloc); 2893 if (status) 2894 return status; 2895 } 2896 if (test_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap)) 2897 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW, 2898 bw_t_info->shared_bw); 2899 return status; 2900 } 2901 2902 /** 2903 * ice_sched_replay_q_bw - replay queue type node BW 2904 * @pi: port information structure 2905 * @q_ctx: queue context structure 2906 * 2907 * This function replays queue type node bandwidth. This function needs to be 2908 * called with scheduler lock held. 2909 */ 2910 enum ice_status 2911 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx) 2912 { 2913 struct ice_sched_node *q_node; 2914 2915 /* Following also checks the presence of node in tree */ 2916 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 2917 if (!q_node) 2918 return ICE_ERR_PARAM; 2919 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info); 2920 } 2921