1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice_sched.h" 5 6 /** 7 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB 8 * @pi: port information structure 9 * @info: Scheduler element information from firmware 10 * 11 * This function inserts the root node of the scheduling tree topology 12 * to the SW DB. 13 */ 14 static enum ice_status 15 ice_sched_add_root_node(struct ice_port_info *pi, 16 struct ice_aqc_txsched_elem_data *info) 17 { 18 struct ice_sched_node *root; 19 struct ice_hw *hw; 20 21 if (!pi) 22 return ICE_ERR_PARAM; 23 24 hw = pi->hw; 25 26 root = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*root), GFP_KERNEL); 27 if (!root) 28 return ICE_ERR_NO_MEMORY; 29 30 /* coverity[suspicious_sizeof] */ 31 root->children = devm_kcalloc(ice_hw_to_dev(hw), hw->max_children[0], 32 sizeof(*root), GFP_KERNEL); 33 if (!root->children) { 34 devm_kfree(ice_hw_to_dev(hw), root); 35 return ICE_ERR_NO_MEMORY; 36 } 37 38 memcpy(&root->info, info, sizeof(*info)); 39 pi->root = root; 40 return 0; 41 } 42 43 /** 44 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB 45 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree 46 * @teid: node TEID to search 47 * 48 * This function searches for a node matching the TEID in the scheduling tree 49 * from the SW DB. The search is recursive and is restricted by the number of 50 * layers it has searched through; stopping at the max supported layer. 51 * 52 * This function needs to be called when holding the port_info->sched_lock 53 */ 54 struct ice_sched_node * 55 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid) 56 { 57 u16 i; 58 59 /* The TEID is same as that of the start_node */ 60 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid) 61 return start_node; 62 63 /* The node has no children or is at the max layer */ 64 if (!start_node->num_children || 65 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM || 66 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) 67 return NULL; 68 69 /* Check if TEID matches to any of the children nodes */ 70 for (i = 0; i < start_node->num_children; i++) 71 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid) 72 return start_node->children[i]; 73 74 /* Search within each child's sub-tree */ 75 for (i = 0; i < start_node->num_children; i++) { 76 struct ice_sched_node *tmp; 77 78 tmp = ice_sched_find_node_by_teid(start_node->children[i], 79 teid); 80 if (tmp) 81 return tmp; 82 } 83 84 return NULL; 85 } 86 87 /** 88 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd 89 * @hw: pointer to the HW struct 90 * @cmd_opc: cmd opcode 91 * @elems_req: number of elements to request 92 * @buf: pointer to buffer 93 * @buf_size: buffer size in bytes 94 * @elems_resp: returns total number of elements response 95 * @cd: pointer to command details structure or NULL 96 * 97 * This function sends a scheduling elements cmd (cmd_opc) 98 */ 99 static enum ice_status 100 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc, 101 u16 elems_req, void *buf, u16 buf_size, 102 u16 *elems_resp, struct ice_sq_cd *cd) 103 { 104 struct ice_aqc_sched_elem_cmd *cmd; 105 struct ice_aq_desc desc; 106 enum ice_status status; 107 108 cmd = &desc.params.sched_elem_cmd; 109 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc); 110 cmd->num_elem_req = cpu_to_le16(elems_req); 111 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 112 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 113 if (!status && elems_resp) 114 *elems_resp = le16_to_cpu(cmd->num_elem_resp); 115 116 return status; 117 } 118 119 /** 120 * ice_aq_query_sched_elems - query scheduler elements 121 * @hw: pointer to the HW struct 122 * @elems_req: number of elements to query 123 * @buf: pointer to buffer 124 * @buf_size: buffer size in bytes 125 * @elems_ret: returns total number of elements returned 126 * @cd: pointer to command details structure or NULL 127 * 128 * Query scheduling elements (0x0404) 129 */ 130 enum ice_status 131 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 132 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 133 u16 *elems_ret, struct ice_sq_cd *cd) 134 { 135 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems, 136 elems_req, (void *)buf, buf_size, 137 elems_ret, cd); 138 } 139 140 /** 141 * ice_sched_add_node - Insert the Tx scheduler node in SW DB 142 * @pi: port information structure 143 * @layer: Scheduler layer of the node 144 * @info: Scheduler element information from firmware 145 * 146 * This function inserts a scheduler node to the SW DB. 147 */ 148 enum ice_status 149 ice_sched_add_node(struct ice_port_info *pi, u8 layer, 150 struct ice_aqc_txsched_elem_data *info) 151 { 152 struct ice_aqc_txsched_elem_data elem; 153 struct ice_sched_node *parent; 154 struct ice_sched_node *node; 155 enum ice_status status; 156 struct ice_hw *hw; 157 158 if (!pi) 159 return ICE_ERR_PARAM; 160 161 hw = pi->hw; 162 163 /* A valid parent node should be there */ 164 parent = ice_sched_find_node_by_teid(pi->root, 165 le32_to_cpu(info->parent_teid)); 166 if (!parent) { 167 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n", 168 le32_to_cpu(info->parent_teid)); 169 return ICE_ERR_PARAM; 170 } 171 172 /* query the current node information from FW before adding it 173 * to the SW DB 174 */ 175 status = ice_sched_query_elem(hw, le32_to_cpu(info->node_teid), &elem); 176 if (status) 177 return status; 178 179 node = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*node), GFP_KERNEL); 180 if (!node) 181 return ICE_ERR_NO_MEMORY; 182 if (hw->max_children[layer]) { 183 /* coverity[suspicious_sizeof] */ 184 node->children = devm_kcalloc(ice_hw_to_dev(hw), 185 hw->max_children[layer], 186 sizeof(*node), GFP_KERNEL); 187 if (!node->children) { 188 devm_kfree(ice_hw_to_dev(hw), node); 189 return ICE_ERR_NO_MEMORY; 190 } 191 } 192 193 node->in_use = true; 194 node->parent = parent; 195 node->tx_sched_layer = layer; 196 parent->children[parent->num_children++] = node; 197 node->info = elem; 198 return 0; 199 } 200 201 /** 202 * ice_aq_delete_sched_elems - delete scheduler elements 203 * @hw: pointer to the HW struct 204 * @grps_req: number of groups to delete 205 * @buf: pointer to buffer 206 * @buf_size: buffer size in bytes 207 * @grps_del: returns total number of elements deleted 208 * @cd: pointer to command details structure or NULL 209 * 210 * Delete scheduling elements (0x040F) 211 */ 212 static enum ice_status 213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req, 214 struct ice_aqc_delete_elem *buf, u16 buf_size, 215 u16 *grps_del, struct ice_sq_cd *cd) 216 { 217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems, 218 grps_req, (void *)buf, buf_size, 219 grps_del, cd); 220 } 221 222 /** 223 * ice_sched_remove_elems - remove nodes from HW 224 * @hw: pointer to the HW struct 225 * @parent: pointer to the parent node 226 * @num_nodes: number of nodes 227 * @node_teids: array of node teids to be deleted 228 * 229 * This function remove nodes from HW 230 */ 231 static enum ice_status 232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent, 233 u16 num_nodes, u32 *node_teids) 234 { 235 struct ice_aqc_delete_elem *buf; 236 u16 i, num_groups_removed = 0; 237 enum ice_status status; 238 u16 buf_size; 239 240 buf_size = struct_size(buf, teid, num_nodes); 241 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 242 if (!buf) 243 return ICE_ERR_NO_MEMORY; 244 245 buf->hdr.parent_teid = parent->info.node_teid; 246 buf->hdr.num_elems = cpu_to_le16(num_nodes); 247 for (i = 0; i < num_nodes; i++) 248 buf->teid[i] = cpu_to_le32(node_teids[i]); 249 250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size, 251 &num_groups_removed, NULL); 252 if (status || num_groups_removed != 1) 253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n", 254 hw->adminq.sq_last_status); 255 256 devm_kfree(ice_hw_to_dev(hw), buf); 257 return status; 258 } 259 260 /** 261 * ice_sched_get_first_node - get the first node of the given layer 262 * @pi: port information structure 263 * @parent: pointer the base node of the subtree 264 * @layer: layer number 265 * 266 * This function retrieves the first node of the given layer from the subtree 267 */ 268 static struct ice_sched_node * 269 ice_sched_get_first_node(struct ice_port_info *pi, 270 struct ice_sched_node *parent, u8 layer) 271 { 272 return pi->sib_head[parent->tc_num][layer]; 273 } 274 275 /** 276 * ice_sched_get_tc_node - get pointer to TC node 277 * @pi: port information structure 278 * @tc: TC number 279 * 280 * This function returns the TC node pointer 281 */ 282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc) 283 { 284 u8 i; 285 286 if (!pi || !pi->root) 287 return NULL; 288 for (i = 0; i < pi->root->num_children; i++) 289 if (pi->root->children[i]->tc_num == tc) 290 return pi->root->children[i]; 291 return NULL; 292 } 293 294 /** 295 * ice_free_sched_node - Free a Tx scheduler node from SW DB 296 * @pi: port information structure 297 * @node: pointer to the ice_sched_node struct 298 * 299 * This function frees up a node from SW DB as well as from HW 300 * 301 * This function needs to be called with the port_info->sched_lock held 302 */ 303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node) 304 { 305 struct ice_sched_node *parent; 306 struct ice_hw *hw = pi->hw; 307 u8 i, j; 308 309 /* Free the children before freeing up the parent node 310 * The parent array is updated below and that shifts the nodes 311 * in the array. So always pick the first child if num children > 0 312 */ 313 while (node->num_children) 314 ice_free_sched_node(pi, node->children[0]); 315 316 /* Leaf, TC and root nodes can't be deleted by SW */ 317 if (node->tx_sched_layer >= hw->sw_entry_point_layer && 318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT && 320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) { 321 u32 teid = le32_to_cpu(node->info.node_teid); 322 323 ice_sched_remove_elems(hw, node->parent, 1, &teid); 324 } 325 parent = node->parent; 326 /* root has no parent */ 327 if (parent) { 328 struct ice_sched_node *p; 329 330 /* update the parent */ 331 for (i = 0; i < parent->num_children; i++) 332 if (parent->children[i] == node) { 333 for (j = i + 1; j < parent->num_children; j++) 334 parent->children[j - 1] = 335 parent->children[j]; 336 parent->num_children--; 337 break; 338 } 339 340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer); 341 while (p) { 342 if (p->sibling == node) { 343 p->sibling = node->sibling; 344 break; 345 } 346 p = p->sibling; 347 } 348 349 /* update the sibling head if head is getting removed */ 350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node) 351 pi->sib_head[node->tc_num][node->tx_sched_layer] = 352 node->sibling; 353 } 354 355 /* leaf nodes have no children */ 356 if (node->children) 357 devm_kfree(ice_hw_to_dev(hw), node->children); 358 devm_kfree(ice_hw_to_dev(hw), node); 359 } 360 361 /** 362 * ice_aq_get_dflt_topo - gets default scheduler topology 363 * @hw: pointer to the HW struct 364 * @lport: logical port number 365 * @buf: pointer to buffer 366 * @buf_size: buffer size in bytes 367 * @num_branches: returns total number of queue to port branches 368 * @cd: pointer to command details structure or NULL 369 * 370 * Get default scheduler topology (0x400) 371 */ 372 static enum ice_status 373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport, 374 struct ice_aqc_get_topo_elem *buf, u16 buf_size, 375 u8 *num_branches, struct ice_sq_cd *cd) 376 { 377 struct ice_aqc_get_topo *cmd; 378 struct ice_aq_desc desc; 379 enum ice_status status; 380 381 cmd = &desc.params.get_topo; 382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo); 383 cmd->port_num = lport; 384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 385 if (!status && num_branches) 386 *num_branches = cmd->num_branches; 387 388 return status; 389 } 390 391 /** 392 * ice_aq_add_sched_elems - adds scheduling element 393 * @hw: pointer to the HW struct 394 * @grps_req: the number of groups that are requested to be added 395 * @buf: pointer to buffer 396 * @buf_size: buffer size in bytes 397 * @grps_added: returns total number of groups added 398 * @cd: pointer to command details structure or NULL 399 * 400 * Add scheduling elements (0x0401) 401 */ 402 static enum ice_status 403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req, 404 struct ice_aqc_add_elem *buf, u16 buf_size, 405 u16 *grps_added, struct ice_sq_cd *cd) 406 { 407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems, 408 grps_req, (void *)buf, buf_size, 409 grps_added, cd); 410 } 411 412 /** 413 * ice_aq_cfg_sched_elems - configures scheduler elements 414 * @hw: pointer to the HW struct 415 * @elems_req: number of elements to configure 416 * @buf: pointer to buffer 417 * @buf_size: buffer size in bytes 418 * @elems_cfgd: returns total number of elements configured 419 * @cd: pointer to command details structure or NULL 420 * 421 * Configure scheduling elements (0x0403) 422 */ 423 static enum ice_status 424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req, 425 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 426 u16 *elems_cfgd, struct ice_sq_cd *cd) 427 { 428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems, 429 elems_req, (void *)buf, buf_size, 430 elems_cfgd, cd); 431 } 432 433 /** 434 * ice_aq_move_sched_elems - move scheduler elements 435 * @hw: pointer to the HW struct 436 * @grps_req: number of groups to move 437 * @buf: pointer to buffer 438 * @buf_size: buffer size in bytes 439 * @grps_movd: returns total number of groups moved 440 * @cd: pointer to command details structure or NULL 441 * 442 * Move scheduling elements (0x0408) 443 */ 444 static enum ice_status 445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req, 446 struct ice_aqc_move_elem *buf, u16 buf_size, 447 u16 *grps_movd, struct ice_sq_cd *cd) 448 { 449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems, 450 grps_req, (void *)buf, buf_size, 451 grps_movd, cd); 452 } 453 454 /** 455 * ice_aq_suspend_sched_elems - suspend scheduler elements 456 * @hw: pointer to the HW struct 457 * @elems_req: number of elements to suspend 458 * @buf: pointer to buffer 459 * @buf_size: buffer size in bytes 460 * @elems_ret: returns total number of elements suspended 461 * @cd: pointer to command details structure or NULL 462 * 463 * Suspend scheduling elements (0x0409) 464 */ 465 static enum ice_status 466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 467 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 468 { 469 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems, 470 elems_req, (void *)buf, buf_size, 471 elems_ret, cd); 472 } 473 474 /** 475 * ice_aq_resume_sched_elems - resume scheduler elements 476 * @hw: pointer to the HW struct 477 * @elems_req: number of elements to resume 478 * @buf: pointer to buffer 479 * @buf_size: buffer size in bytes 480 * @elems_ret: returns total number of elements resumed 481 * @cd: pointer to command details structure or NULL 482 * 483 * resume scheduling elements (0x040A) 484 */ 485 static enum ice_status 486 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 487 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 488 { 489 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems, 490 elems_req, (void *)buf, buf_size, 491 elems_ret, cd); 492 } 493 494 /** 495 * ice_aq_query_sched_res - query scheduler resource 496 * @hw: pointer to the HW struct 497 * @buf_size: buffer size in bytes 498 * @buf: pointer to buffer 499 * @cd: pointer to command details structure or NULL 500 * 501 * Query scheduler resource allocation (0x0412) 502 */ 503 static enum ice_status 504 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size, 505 struct ice_aqc_query_txsched_res_resp *buf, 506 struct ice_sq_cd *cd) 507 { 508 struct ice_aq_desc desc; 509 510 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res); 511 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 512 } 513 514 /** 515 * ice_sched_suspend_resume_elems - suspend or resume HW nodes 516 * @hw: pointer to the HW struct 517 * @num_nodes: number of nodes 518 * @node_teids: array of node teids to be suspended or resumed 519 * @suspend: true means suspend / false means resume 520 * 521 * This function suspends or resumes HW nodes 522 */ 523 static enum ice_status 524 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids, 525 bool suspend) 526 { 527 u16 i, buf_size, num_elem_ret = 0; 528 enum ice_status status; 529 __le32 *buf; 530 531 buf_size = sizeof(*buf) * num_nodes; 532 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 533 if (!buf) 534 return ICE_ERR_NO_MEMORY; 535 536 for (i = 0; i < num_nodes; i++) 537 buf[i] = cpu_to_le32(node_teids[i]); 538 539 if (suspend) 540 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf, 541 buf_size, &num_elem_ret, 542 NULL); 543 else 544 status = ice_aq_resume_sched_elems(hw, num_nodes, buf, 545 buf_size, &num_elem_ret, 546 NULL); 547 if (status || num_elem_ret != num_nodes) 548 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n"); 549 550 devm_kfree(ice_hw_to_dev(hw), buf); 551 return status; 552 } 553 554 /** 555 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC 556 * @hw: pointer to the HW struct 557 * @vsi_handle: VSI handle 558 * @tc: TC number 559 * @new_numqs: number of queues 560 */ 561 static enum ice_status 562 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs) 563 { 564 struct ice_vsi_ctx *vsi_ctx; 565 struct ice_q_ctx *q_ctx; 566 567 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 568 if (!vsi_ctx) 569 return ICE_ERR_PARAM; 570 /* allocate LAN queue contexts */ 571 if (!vsi_ctx->lan_q_ctx[tc]) { 572 vsi_ctx->lan_q_ctx[tc] = devm_kcalloc(ice_hw_to_dev(hw), 573 new_numqs, 574 sizeof(*q_ctx), 575 GFP_KERNEL); 576 if (!vsi_ctx->lan_q_ctx[tc]) 577 return ICE_ERR_NO_MEMORY; 578 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 579 return 0; 580 } 581 /* num queues are increased, update the queue contexts */ 582 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) { 583 u16 prev_num = vsi_ctx->num_lan_q_entries[tc]; 584 585 q_ctx = devm_kcalloc(ice_hw_to_dev(hw), new_numqs, 586 sizeof(*q_ctx), GFP_KERNEL); 587 if (!q_ctx) 588 return ICE_ERR_NO_MEMORY; 589 memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc], 590 prev_num * sizeof(*q_ctx)); 591 devm_kfree(ice_hw_to_dev(hw), vsi_ctx->lan_q_ctx[tc]); 592 vsi_ctx->lan_q_ctx[tc] = q_ctx; 593 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 594 } 595 return 0; 596 } 597 598 /** 599 * ice_aq_rl_profile - performs a rate limiting task 600 * @hw: pointer to the HW struct 601 * @opcode: opcode for add, query, or remove profile(s) 602 * @num_profiles: the number of profiles 603 * @buf: pointer to buffer 604 * @buf_size: buffer size in bytes 605 * @num_processed: number of processed add or remove profile(s) to return 606 * @cd: pointer to command details structure 607 * 608 * RL profile function to add, query, or remove profile(s) 609 */ 610 static enum ice_status 611 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode, 612 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf, 613 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd) 614 { 615 struct ice_aqc_rl_profile *cmd; 616 struct ice_aq_desc desc; 617 enum ice_status status; 618 619 cmd = &desc.params.rl_profile; 620 621 ice_fill_dflt_direct_cmd_desc(&desc, opcode); 622 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 623 cmd->num_profiles = cpu_to_le16(num_profiles); 624 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 625 if (!status && num_processed) 626 *num_processed = le16_to_cpu(cmd->num_processed); 627 return status; 628 } 629 630 /** 631 * ice_aq_add_rl_profile - adds rate limiting profile(s) 632 * @hw: pointer to the HW struct 633 * @num_profiles: the number of profile(s) to be add 634 * @buf: pointer to buffer 635 * @buf_size: buffer size in bytes 636 * @num_profiles_added: total number of profiles added to return 637 * @cd: pointer to command details structure 638 * 639 * Add RL profile (0x0410) 640 */ 641 static enum ice_status 642 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles, 643 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 644 u16 *num_profiles_added, struct ice_sq_cd *cd) 645 { 646 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles, 647 buf, buf_size, num_profiles_added, cd); 648 } 649 650 /** 651 * ice_aq_remove_rl_profile - removes RL profile(s) 652 * @hw: pointer to the HW struct 653 * @num_profiles: the number of profile(s) to remove 654 * @buf: pointer to buffer 655 * @buf_size: buffer size in bytes 656 * @num_profiles_removed: total number of profiles removed to return 657 * @cd: pointer to command details structure or NULL 658 * 659 * Remove RL profile (0x0415) 660 */ 661 static enum ice_status 662 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles, 663 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 664 u16 *num_profiles_removed, struct ice_sq_cd *cd) 665 { 666 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles, 667 num_profiles, buf, buf_size, 668 num_profiles_removed, cd); 669 } 670 671 /** 672 * ice_sched_del_rl_profile - remove RL profile 673 * @hw: pointer to the HW struct 674 * @rl_info: rate limit profile information 675 * 676 * If the profile ID is not referenced anymore, it removes profile ID with 677 * its associated parameters from HW DB,and locally. The caller needs to 678 * hold scheduler lock. 679 */ 680 static enum ice_status 681 ice_sched_del_rl_profile(struct ice_hw *hw, 682 struct ice_aqc_rl_profile_info *rl_info) 683 { 684 struct ice_aqc_rl_profile_elem *buf; 685 u16 num_profiles_removed; 686 enum ice_status status; 687 u16 num_profiles = 1; 688 689 if (rl_info->prof_id_ref != 0) 690 return ICE_ERR_IN_USE; 691 692 /* Safe to remove profile ID */ 693 buf = &rl_info->profile; 694 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf), 695 &num_profiles_removed, NULL); 696 if (status || num_profiles_removed != num_profiles) 697 return ICE_ERR_CFG; 698 699 /* Delete stale entry now */ 700 list_del(&rl_info->list_entry); 701 devm_kfree(ice_hw_to_dev(hw), rl_info); 702 return status; 703 } 704 705 /** 706 * ice_sched_clear_rl_prof - clears RL prof entries 707 * @pi: port information structure 708 * 709 * This function removes all RL profile from HW as well as from SW DB. 710 */ 711 static void ice_sched_clear_rl_prof(struct ice_port_info *pi) 712 { 713 u16 ln; 714 715 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 716 struct ice_aqc_rl_profile_info *rl_prof_elem; 717 struct ice_aqc_rl_profile_info *rl_prof_tmp; 718 719 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 720 &pi->rl_prof_list[ln], list_entry) { 721 struct ice_hw *hw = pi->hw; 722 enum ice_status status; 723 724 rl_prof_elem->prof_id_ref = 0; 725 status = ice_sched_del_rl_profile(hw, rl_prof_elem); 726 if (status) { 727 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n"); 728 /* On error, free mem required */ 729 list_del(&rl_prof_elem->list_entry); 730 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 731 } 732 } 733 } 734 } 735 736 /** 737 * ice_sched_clear_agg - clears the aggregator related information 738 * @hw: pointer to the hardware structure 739 * 740 * This function removes aggregator list and free up aggregator related memory 741 * previously allocated. 742 */ 743 void ice_sched_clear_agg(struct ice_hw *hw) 744 { 745 struct ice_sched_agg_info *agg_info; 746 struct ice_sched_agg_info *atmp; 747 748 list_for_each_entry_safe(agg_info, atmp, &hw->agg_list, list_entry) { 749 struct ice_sched_agg_vsi_info *agg_vsi_info; 750 struct ice_sched_agg_vsi_info *vtmp; 751 752 list_for_each_entry_safe(agg_vsi_info, vtmp, 753 &agg_info->agg_vsi_list, list_entry) { 754 list_del(&agg_vsi_info->list_entry); 755 devm_kfree(ice_hw_to_dev(hw), agg_vsi_info); 756 } 757 list_del(&agg_info->list_entry); 758 devm_kfree(ice_hw_to_dev(hw), agg_info); 759 } 760 } 761 762 /** 763 * ice_sched_clear_tx_topo - clears the scheduler tree nodes 764 * @pi: port information structure 765 * 766 * This function removes all the nodes from HW as well as from SW DB. 767 */ 768 static void ice_sched_clear_tx_topo(struct ice_port_info *pi) 769 { 770 if (!pi) 771 return; 772 /* remove RL profiles related lists */ 773 ice_sched_clear_rl_prof(pi); 774 if (pi->root) { 775 ice_free_sched_node(pi, pi->root); 776 pi->root = NULL; 777 } 778 } 779 780 /** 781 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port 782 * @pi: port information structure 783 * 784 * Cleanup scheduling elements from SW DB 785 */ 786 void ice_sched_clear_port(struct ice_port_info *pi) 787 { 788 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 789 return; 790 791 pi->port_state = ICE_SCHED_PORT_STATE_INIT; 792 mutex_lock(&pi->sched_lock); 793 ice_sched_clear_tx_topo(pi); 794 mutex_unlock(&pi->sched_lock); 795 mutex_destroy(&pi->sched_lock); 796 } 797 798 /** 799 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports 800 * @hw: pointer to the HW struct 801 * 802 * Cleanup scheduling elements from SW DB for all the ports 803 */ 804 void ice_sched_cleanup_all(struct ice_hw *hw) 805 { 806 if (!hw) 807 return; 808 809 if (hw->layer_info) { 810 devm_kfree(ice_hw_to_dev(hw), hw->layer_info); 811 hw->layer_info = NULL; 812 } 813 814 ice_sched_clear_port(hw->port_info); 815 816 hw->num_tx_sched_layers = 0; 817 hw->num_tx_sched_phys_layers = 0; 818 hw->flattened_layers = 0; 819 hw->max_cgds = 0; 820 } 821 822 /** 823 * ice_sched_add_elems - add nodes to HW and SW DB 824 * @pi: port information structure 825 * @tc_node: pointer to the branch node 826 * @parent: pointer to the parent node 827 * @layer: layer number to add nodes 828 * @num_nodes: number of nodes 829 * @num_nodes_added: pointer to num nodes added 830 * @first_node_teid: if new nodes are added then return the TEID of first node 831 * 832 * This function add nodes to HW as well as to SW DB for a given layer 833 */ 834 static enum ice_status 835 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node, 836 struct ice_sched_node *parent, u8 layer, u16 num_nodes, 837 u16 *num_nodes_added, u32 *first_node_teid) 838 { 839 struct ice_sched_node *prev, *new_node; 840 struct ice_aqc_add_elem *buf; 841 u16 i, num_groups_added = 0; 842 enum ice_status status = 0; 843 struct ice_hw *hw = pi->hw; 844 size_t buf_size; 845 u32 teid; 846 847 buf_size = struct_size(buf, generic, num_nodes); 848 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 849 if (!buf) 850 return ICE_ERR_NO_MEMORY; 851 852 buf->hdr.parent_teid = parent->info.node_teid; 853 buf->hdr.num_elems = cpu_to_le16(num_nodes); 854 for (i = 0; i < num_nodes; i++) { 855 buf->generic[i].parent_teid = parent->info.node_teid; 856 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC; 857 buf->generic[i].data.valid_sections = 858 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR | 859 ICE_AQC_ELEM_VALID_EIR; 860 buf->generic[i].data.generic = 0; 861 buf->generic[i].data.cir_bw.bw_profile_idx = 862 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 863 buf->generic[i].data.cir_bw.bw_alloc = 864 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 865 buf->generic[i].data.eir_bw.bw_profile_idx = 866 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 867 buf->generic[i].data.eir_bw.bw_alloc = 868 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 869 } 870 871 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size, 872 &num_groups_added, NULL); 873 if (status || num_groups_added != 1) { 874 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n", 875 hw->adminq.sq_last_status); 876 devm_kfree(ice_hw_to_dev(hw), buf); 877 return ICE_ERR_CFG; 878 } 879 880 *num_nodes_added = num_nodes; 881 /* add nodes to the SW DB */ 882 for (i = 0; i < num_nodes; i++) { 883 status = ice_sched_add_node(pi, layer, &buf->generic[i]); 884 if (status) { 885 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n", 886 status); 887 break; 888 } 889 890 teid = le32_to_cpu(buf->generic[i].node_teid); 891 new_node = ice_sched_find_node_by_teid(parent, teid); 892 if (!new_node) { 893 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid); 894 break; 895 } 896 897 new_node->sibling = NULL; 898 new_node->tc_num = tc_node->tc_num; 899 900 /* add it to previous node sibling pointer */ 901 /* Note: siblings are not linked across branches */ 902 prev = ice_sched_get_first_node(pi, tc_node, layer); 903 if (prev && prev != new_node) { 904 while (prev->sibling) 905 prev = prev->sibling; 906 prev->sibling = new_node; 907 } 908 909 /* initialize the sibling head */ 910 if (!pi->sib_head[tc_node->tc_num][layer]) 911 pi->sib_head[tc_node->tc_num][layer] = new_node; 912 913 if (i == 0) 914 *first_node_teid = teid; 915 } 916 917 devm_kfree(ice_hw_to_dev(hw), buf); 918 return status; 919 } 920 921 /** 922 * ice_sched_add_nodes_to_layer - Add nodes to a given layer 923 * @pi: port information structure 924 * @tc_node: pointer to TC node 925 * @parent: pointer to parent node 926 * @layer: layer number to add nodes 927 * @num_nodes: number of nodes to be added 928 * @first_node_teid: pointer to the first node TEID 929 * @num_nodes_added: pointer to number of nodes added 930 * 931 * This function add nodes to a given layer. 932 */ 933 static enum ice_status 934 ice_sched_add_nodes_to_layer(struct ice_port_info *pi, 935 struct ice_sched_node *tc_node, 936 struct ice_sched_node *parent, u8 layer, 937 u16 num_nodes, u32 *first_node_teid, 938 u16 *num_nodes_added) 939 { 940 u32 *first_teid_ptr = first_node_teid; 941 u16 new_num_nodes, max_child_nodes; 942 enum ice_status status = 0; 943 struct ice_hw *hw = pi->hw; 944 u16 num_added = 0; 945 u32 temp; 946 947 *num_nodes_added = 0; 948 949 if (!num_nodes) 950 return status; 951 952 if (!parent || layer < hw->sw_entry_point_layer) 953 return ICE_ERR_PARAM; 954 955 /* max children per node per layer */ 956 max_child_nodes = hw->max_children[parent->tx_sched_layer]; 957 958 /* current number of children + required nodes exceed max children ? */ 959 if ((parent->num_children + num_nodes) > max_child_nodes) { 960 /* Fail if the parent is a TC node */ 961 if (parent == tc_node) 962 return ICE_ERR_CFG; 963 964 /* utilize all the spaces if the parent is not full */ 965 if (parent->num_children < max_child_nodes) { 966 new_num_nodes = max_child_nodes - parent->num_children; 967 /* this recursion is intentional, and wouldn't 968 * go more than 2 calls 969 */ 970 status = ice_sched_add_nodes_to_layer(pi, tc_node, 971 parent, layer, 972 new_num_nodes, 973 first_node_teid, 974 &num_added); 975 if (status) 976 return status; 977 978 *num_nodes_added += num_added; 979 } 980 /* Don't modify the first node TEID memory if the first node was 981 * added already in the above call. Instead send some temp 982 * memory for all other recursive calls. 983 */ 984 if (num_added) 985 first_teid_ptr = &temp; 986 987 new_num_nodes = num_nodes - num_added; 988 989 /* This parent is full, try the next sibling */ 990 parent = parent->sibling; 991 992 /* this recursion is intentional, for 1024 queues 993 * per VSI, it goes max of 16 iterations. 994 * 1024 / 8 = 128 layer 8 nodes 995 * 128 /8 = 16 (add 8 nodes per iteration) 996 */ 997 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 998 layer, new_num_nodes, 999 first_teid_ptr, 1000 &num_added); 1001 *num_nodes_added += num_added; 1002 return status; 1003 } 1004 1005 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes, 1006 num_nodes_added, first_node_teid); 1007 return status; 1008 } 1009 1010 /** 1011 * ice_sched_get_qgrp_layer - get the current queue group layer number 1012 * @hw: pointer to the HW struct 1013 * 1014 * This function returns the current queue group layer number 1015 */ 1016 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw) 1017 { 1018 /* It's always total layers - 1, the array is 0 relative so -2 */ 1019 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET; 1020 } 1021 1022 /** 1023 * ice_sched_get_vsi_layer - get the current VSI layer number 1024 * @hw: pointer to the HW struct 1025 * 1026 * This function returns the current VSI layer number 1027 */ 1028 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw) 1029 { 1030 /* Num Layers VSI layer 1031 * 9 6 1032 * 7 4 1033 * 5 or less sw_entry_point_layer 1034 */ 1035 /* calculate the VSI layer based on number of layers. */ 1036 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) { 1037 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET; 1038 1039 if (layer > hw->sw_entry_point_layer) 1040 return layer; 1041 } 1042 return hw->sw_entry_point_layer; 1043 } 1044 1045 /** 1046 * ice_sched_get_agg_layer - get the current aggregator layer number 1047 * @hw: pointer to the HW struct 1048 * 1049 * This function returns the current aggregator layer number 1050 */ 1051 static u8 ice_sched_get_agg_layer(struct ice_hw *hw) 1052 { 1053 /* Num Layers aggregator layer 1054 * 9 4 1055 * 7 or less sw_entry_point_layer 1056 */ 1057 /* calculate the aggregator layer based on number of layers. */ 1058 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) { 1059 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET; 1060 1061 if (layer > hw->sw_entry_point_layer) 1062 return layer; 1063 } 1064 return hw->sw_entry_point_layer; 1065 } 1066 1067 /** 1068 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree 1069 * @pi: port information structure 1070 * 1071 * This function removes the leaf node that was created by the FW 1072 * during initialization 1073 */ 1074 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi) 1075 { 1076 struct ice_sched_node *node; 1077 1078 node = pi->root; 1079 while (node) { 1080 if (!node->num_children) 1081 break; 1082 node = node->children[0]; 1083 } 1084 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) { 1085 u32 teid = le32_to_cpu(node->info.node_teid); 1086 enum ice_status status; 1087 1088 /* remove the default leaf node */ 1089 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid); 1090 if (!status) 1091 ice_free_sched_node(pi, node); 1092 } 1093 } 1094 1095 /** 1096 * ice_sched_rm_dflt_nodes - free the default nodes in the tree 1097 * @pi: port information structure 1098 * 1099 * This function frees all the nodes except root and TC that were created by 1100 * the FW during initialization 1101 */ 1102 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi) 1103 { 1104 struct ice_sched_node *node; 1105 1106 ice_rm_dflt_leaf_node(pi); 1107 1108 /* remove the default nodes except TC and root nodes */ 1109 node = pi->root; 1110 while (node) { 1111 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer && 1112 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 1113 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) { 1114 ice_free_sched_node(pi, node); 1115 break; 1116 } 1117 1118 if (!node->num_children) 1119 break; 1120 node = node->children[0]; 1121 } 1122 } 1123 1124 /** 1125 * ice_sched_init_port - Initialize scheduler by querying information from FW 1126 * @pi: port info structure for the tree to cleanup 1127 * 1128 * This function is the initial call to find the total number of Tx scheduler 1129 * resources, default topology created by firmware and storing the information 1130 * in SW DB. 1131 */ 1132 enum ice_status ice_sched_init_port(struct ice_port_info *pi) 1133 { 1134 struct ice_aqc_get_topo_elem *buf; 1135 enum ice_status status; 1136 struct ice_hw *hw; 1137 u8 num_branches; 1138 u16 num_elems; 1139 u8 i, j; 1140 1141 if (!pi) 1142 return ICE_ERR_PARAM; 1143 hw = pi->hw; 1144 1145 /* Query the Default Topology from FW */ 1146 buf = devm_kzalloc(ice_hw_to_dev(hw), ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); 1147 if (!buf) 1148 return ICE_ERR_NO_MEMORY; 1149 1150 /* Query default scheduling tree topology */ 1151 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN, 1152 &num_branches, NULL); 1153 if (status) 1154 goto err_init_port; 1155 1156 /* num_branches should be between 1-8 */ 1157 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) { 1158 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n", 1159 num_branches); 1160 status = ICE_ERR_PARAM; 1161 goto err_init_port; 1162 } 1163 1164 /* get the number of elements on the default/first branch */ 1165 num_elems = le16_to_cpu(buf[0].hdr.num_elems); 1166 1167 /* num_elems should always be between 1-9 */ 1168 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) { 1169 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n", 1170 num_elems); 1171 status = ICE_ERR_PARAM; 1172 goto err_init_port; 1173 } 1174 1175 /* If the last node is a leaf node then the index of the queue group 1176 * layer is two less than the number of elements. 1177 */ 1178 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type == 1179 ICE_AQC_ELEM_TYPE_LEAF) 1180 pi->last_node_teid = 1181 le32_to_cpu(buf[0].generic[num_elems - 2].node_teid); 1182 else 1183 pi->last_node_teid = 1184 le32_to_cpu(buf[0].generic[num_elems - 1].node_teid); 1185 1186 /* Insert the Tx Sched root node */ 1187 status = ice_sched_add_root_node(pi, &buf[0].generic[0]); 1188 if (status) 1189 goto err_init_port; 1190 1191 /* Parse the default tree and cache the information */ 1192 for (i = 0; i < num_branches; i++) { 1193 num_elems = le16_to_cpu(buf[i].hdr.num_elems); 1194 1195 /* Skip root element as already inserted */ 1196 for (j = 1; j < num_elems; j++) { 1197 /* update the sw entry point */ 1198 if (buf[0].generic[j].data.elem_type == 1199 ICE_AQC_ELEM_TYPE_ENTRY_POINT) 1200 hw->sw_entry_point_layer = j; 1201 1202 status = ice_sched_add_node(pi, j, &buf[i].generic[j]); 1203 if (status) 1204 goto err_init_port; 1205 } 1206 } 1207 1208 /* Remove the default nodes. */ 1209 if (pi->root) 1210 ice_sched_rm_dflt_nodes(pi); 1211 1212 /* initialize the port for handling the scheduler tree */ 1213 pi->port_state = ICE_SCHED_PORT_STATE_READY; 1214 mutex_init(&pi->sched_lock); 1215 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++) 1216 INIT_LIST_HEAD(&pi->rl_prof_list[i]); 1217 1218 err_init_port: 1219 if (status && pi->root) { 1220 ice_free_sched_node(pi, pi->root); 1221 pi->root = NULL; 1222 } 1223 1224 devm_kfree(ice_hw_to_dev(hw), buf); 1225 return status; 1226 } 1227 1228 /** 1229 * ice_sched_query_res_alloc - query the FW for num of logical sched layers 1230 * @hw: pointer to the HW struct 1231 * 1232 * query FW for allocated scheduler resources and store in HW struct 1233 */ 1234 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) 1235 { 1236 struct ice_aqc_query_txsched_res_resp *buf; 1237 enum ice_status status = 0; 1238 __le16 max_sibl; 1239 u16 i; 1240 1241 if (hw->layer_info) 1242 return status; 1243 1244 buf = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*buf), GFP_KERNEL); 1245 if (!buf) 1246 return ICE_ERR_NO_MEMORY; 1247 1248 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL); 1249 if (status) 1250 goto sched_query_out; 1251 1252 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels); 1253 hw->num_tx_sched_phys_layers = 1254 le16_to_cpu(buf->sched_props.phys_levels); 1255 hw->flattened_layers = buf->sched_props.flattening_bitmap; 1256 hw->max_cgds = buf->sched_props.max_pf_cgds; 1257 1258 /* max sibling group size of current layer refers to the max children 1259 * of the below layer node. 1260 * layer 1 node max children will be layer 2 max sibling group size 1261 * layer 2 node max children will be layer 3 max sibling group size 1262 * and so on. This array will be populated from root (index 0) to 1263 * qgroup layer 7. Leaf node has no children. 1264 */ 1265 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) { 1266 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz; 1267 hw->max_children[i] = le16_to_cpu(max_sibl); 1268 } 1269 1270 hw->layer_info = devm_kmemdup(ice_hw_to_dev(hw), buf->layer_props, 1271 (hw->num_tx_sched_layers * 1272 sizeof(*hw->layer_info)), 1273 GFP_KERNEL); 1274 if (!hw->layer_info) { 1275 status = ICE_ERR_NO_MEMORY; 1276 goto sched_query_out; 1277 } 1278 1279 sched_query_out: 1280 devm_kfree(ice_hw_to_dev(hw), buf); 1281 return status; 1282 } 1283 1284 /** 1285 * ice_sched_find_node_in_subtree - Find node in part of base node subtree 1286 * @hw: pointer to the HW struct 1287 * @base: pointer to the base node 1288 * @node: pointer to the node to search 1289 * 1290 * This function checks whether a given node is part of the base node 1291 * subtree or not 1292 */ 1293 static bool 1294 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 1295 struct ice_sched_node *node) 1296 { 1297 u8 i; 1298 1299 for (i = 0; i < base->num_children; i++) { 1300 struct ice_sched_node *child = base->children[i]; 1301 1302 if (node == child) 1303 return true; 1304 1305 if (child->tx_sched_layer > node->tx_sched_layer) 1306 return false; 1307 1308 /* this recursion is intentional, and wouldn't 1309 * go more than 8 calls 1310 */ 1311 if (ice_sched_find_node_in_subtree(hw, child, node)) 1312 return true; 1313 } 1314 return false; 1315 } 1316 1317 /** 1318 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node 1319 * @pi: port information structure 1320 * @vsi_node: software VSI handle 1321 * @qgrp_node: first queue group node identified for scanning 1322 * @owner: LAN or RDMA 1323 * 1324 * This function retrieves a free LAN or RDMA queue group node by scanning 1325 * qgrp_node and its siblings for the queue group with the fewest number 1326 * of queues currently assigned. 1327 */ 1328 static struct ice_sched_node * 1329 ice_sched_get_free_qgrp(struct ice_port_info *pi, 1330 struct ice_sched_node *vsi_node, 1331 struct ice_sched_node *qgrp_node, u8 owner) 1332 { 1333 struct ice_sched_node *min_qgrp; 1334 u8 min_children; 1335 1336 if (!qgrp_node) 1337 return qgrp_node; 1338 min_children = qgrp_node->num_children; 1339 if (!min_children) 1340 return qgrp_node; 1341 min_qgrp = qgrp_node; 1342 /* scan all queue groups until find a node which has less than the 1343 * minimum number of children. This way all queue group nodes get 1344 * equal number of shares and active. The bandwidth will be equally 1345 * distributed across all queues. 1346 */ 1347 while (qgrp_node) { 1348 /* make sure the qgroup node is part of the VSI subtree */ 1349 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node)) 1350 if (qgrp_node->num_children < min_children && 1351 qgrp_node->owner == owner) { 1352 /* replace the new min queue group node */ 1353 min_qgrp = qgrp_node; 1354 min_children = min_qgrp->num_children; 1355 /* break if it has no children, */ 1356 if (!min_children) 1357 break; 1358 } 1359 qgrp_node = qgrp_node->sibling; 1360 } 1361 return min_qgrp; 1362 } 1363 1364 /** 1365 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node 1366 * @pi: port information structure 1367 * @vsi_handle: software VSI handle 1368 * @tc: branch number 1369 * @owner: LAN or RDMA 1370 * 1371 * This function retrieves a free LAN or RDMA queue group node 1372 */ 1373 struct ice_sched_node * 1374 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 1375 u8 owner) 1376 { 1377 struct ice_sched_node *vsi_node, *qgrp_node; 1378 struct ice_vsi_ctx *vsi_ctx; 1379 u16 max_children; 1380 u8 qgrp_layer; 1381 1382 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw); 1383 max_children = pi->hw->max_children[qgrp_layer]; 1384 1385 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1386 if (!vsi_ctx) 1387 return NULL; 1388 vsi_node = vsi_ctx->sched.vsi_node[tc]; 1389 /* validate invalid VSI ID */ 1390 if (!vsi_node) 1391 return NULL; 1392 1393 /* get the first queue group node from VSI sub-tree */ 1394 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer); 1395 while (qgrp_node) { 1396 /* make sure the qgroup node is part of the VSI subtree */ 1397 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node)) 1398 if (qgrp_node->num_children < max_children && 1399 qgrp_node->owner == owner) 1400 break; 1401 qgrp_node = qgrp_node->sibling; 1402 } 1403 1404 /* Select the best queue group */ 1405 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner); 1406 } 1407 1408 /** 1409 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID 1410 * @pi: pointer to the port information structure 1411 * @tc_node: pointer to the TC node 1412 * @vsi_handle: software VSI handle 1413 * 1414 * This function retrieves a VSI node for a given VSI ID from a given 1415 * TC branch 1416 */ 1417 static struct ice_sched_node * 1418 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node, 1419 u16 vsi_handle) 1420 { 1421 struct ice_sched_node *node; 1422 u8 vsi_layer; 1423 1424 vsi_layer = ice_sched_get_vsi_layer(pi->hw); 1425 node = ice_sched_get_first_node(pi, tc_node, vsi_layer); 1426 1427 /* Check whether it already exists */ 1428 while (node) { 1429 if (node->vsi_handle == vsi_handle) 1430 return node; 1431 node = node->sibling; 1432 } 1433 1434 return node; 1435 } 1436 1437 /** 1438 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID 1439 * @pi: pointer to the port information structure 1440 * @tc_node: pointer to the TC node 1441 * @agg_id: aggregator ID 1442 * 1443 * This function retrieves an aggregator node for a given aggregator ID from 1444 * a given TC branch 1445 */ 1446 static struct ice_sched_node * 1447 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node, 1448 u32 agg_id) 1449 { 1450 struct ice_sched_node *node; 1451 struct ice_hw *hw = pi->hw; 1452 u8 agg_layer; 1453 1454 if (!hw) 1455 return NULL; 1456 agg_layer = ice_sched_get_agg_layer(hw); 1457 node = ice_sched_get_first_node(pi, tc_node, agg_layer); 1458 1459 /* Check whether it already exists */ 1460 while (node) { 1461 if (node->agg_id == agg_id) 1462 return node; 1463 node = node->sibling; 1464 } 1465 1466 return node; 1467 } 1468 1469 /** 1470 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes 1471 * @hw: pointer to the HW struct 1472 * @num_qs: number of queues 1473 * @num_nodes: num nodes array 1474 * 1475 * This function calculates the number of VSI child nodes based on the 1476 * number of queues. 1477 */ 1478 static void 1479 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes) 1480 { 1481 u16 num = num_qs; 1482 u8 i, qgl, vsil; 1483 1484 qgl = ice_sched_get_qgrp_layer(hw); 1485 vsil = ice_sched_get_vsi_layer(hw); 1486 1487 /* calculate num nodes from queue group to VSI layer */ 1488 for (i = qgl; i > vsil; i--) { 1489 /* round to the next integer if there is a remainder */ 1490 num = DIV_ROUND_UP(num, hw->max_children[i]); 1491 1492 /* need at least one node */ 1493 num_nodes[i] = num ? num : 1; 1494 } 1495 } 1496 1497 /** 1498 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree 1499 * @pi: port information structure 1500 * @vsi_handle: software VSI handle 1501 * @tc_node: pointer to the TC node 1502 * @num_nodes: pointer to the num nodes that needs to be added per layer 1503 * @owner: node owner (LAN or RDMA) 1504 * 1505 * This function adds the VSI child nodes to tree. It gets called for 1506 * LAN and RDMA separately. 1507 */ 1508 static enum ice_status 1509 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1510 struct ice_sched_node *tc_node, u16 *num_nodes, 1511 u8 owner) 1512 { 1513 struct ice_sched_node *parent, *node; 1514 struct ice_hw *hw = pi->hw; 1515 enum ice_status status; 1516 u32 first_node_teid; 1517 u16 num_added = 0; 1518 u8 i, qgl, vsil; 1519 1520 qgl = ice_sched_get_qgrp_layer(hw); 1521 vsil = ice_sched_get_vsi_layer(hw); 1522 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 1523 for (i = vsil + 1; i <= qgl; i++) { 1524 if (!parent) 1525 return ICE_ERR_CFG; 1526 1527 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, 1528 num_nodes[i], 1529 &first_node_teid, 1530 &num_added); 1531 if (status || num_nodes[i] != num_added) 1532 return ICE_ERR_CFG; 1533 1534 /* The newly added node can be a new parent for the next 1535 * layer nodes 1536 */ 1537 if (num_added) { 1538 parent = ice_sched_find_node_by_teid(tc_node, 1539 first_node_teid); 1540 node = parent; 1541 while (node) { 1542 node->owner = owner; 1543 node = node->sibling; 1544 } 1545 } else { 1546 parent = parent->children[0]; 1547 } 1548 } 1549 1550 return 0; 1551 } 1552 1553 /** 1554 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes 1555 * @pi: pointer to the port info structure 1556 * @tc_node: pointer to TC node 1557 * @num_nodes: pointer to num nodes array 1558 * 1559 * This function calculates the number of supported nodes needed to add this 1560 * VSI into Tx tree including the VSI, parent and intermediate nodes in below 1561 * layers 1562 */ 1563 static void 1564 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi, 1565 struct ice_sched_node *tc_node, u16 *num_nodes) 1566 { 1567 struct ice_sched_node *node; 1568 u8 vsil; 1569 int i; 1570 1571 vsil = ice_sched_get_vsi_layer(pi->hw); 1572 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--) 1573 /* Add intermediate nodes if TC has no children and 1574 * need at least one node for VSI 1575 */ 1576 if (!tc_node->num_children || i == vsil) { 1577 num_nodes[i]++; 1578 } else { 1579 /* If intermediate nodes are reached max children 1580 * then add a new one. 1581 */ 1582 node = ice_sched_get_first_node(pi, tc_node, (u8)i); 1583 /* scan all the siblings */ 1584 while (node) { 1585 if (node->num_children < pi->hw->max_children[i]) 1586 break; 1587 node = node->sibling; 1588 } 1589 1590 /* tree has one intermediate node to add this new VSI. 1591 * So no need to calculate supported nodes for below 1592 * layers. 1593 */ 1594 if (node) 1595 break; 1596 /* all the nodes are full, allocate a new one */ 1597 num_nodes[i]++; 1598 } 1599 } 1600 1601 /** 1602 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree 1603 * @pi: port information structure 1604 * @vsi_handle: software VSI handle 1605 * @tc_node: pointer to TC node 1606 * @num_nodes: pointer to num nodes array 1607 * 1608 * This function adds the VSI supported nodes into Tx tree including the 1609 * VSI, its parent and intermediate nodes in below layers 1610 */ 1611 static enum ice_status 1612 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle, 1613 struct ice_sched_node *tc_node, u16 *num_nodes) 1614 { 1615 struct ice_sched_node *parent = tc_node; 1616 enum ice_status status; 1617 u32 first_node_teid; 1618 u16 num_added = 0; 1619 u8 i, vsil; 1620 1621 if (!pi) 1622 return ICE_ERR_PARAM; 1623 1624 vsil = ice_sched_get_vsi_layer(pi->hw); 1625 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) { 1626 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 1627 i, num_nodes[i], 1628 &first_node_teid, 1629 &num_added); 1630 if (status || num_nodes[i] != num_added) 1631 return ICE_ERR_CFG; 1632 1633 /* The newly added node can be a new parent for the next 1634 * layer nodes 1635 */ 1636 if (num_added) 1637 parent = ice_sched_find_node_by_teid(tc_node, 1638 first_node_teid); 1639 else 1640 parent = parent->children[0]; 1641 1642 if (!parent) 1643 return ICE_ERR_CFG; 1644 1645 if (i == vsil) 1646 parent->vsi_handle = vsi_handle; 1647 } 1648 1649 return 0; 1650 } 1651 1652 /** 1653 * ice_sched_add_vsi_to_topo - add a new VSI into tree 1654 * @pi: port information structure 1655 * @vsi_handle: software VSI handle 1656 * @tc: TC number 1657 * 1658 * This function adds a new VSI into scheduler tree 1659 */ 1660 static enum ice_status 1661 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc) 1662 { 1663 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1664 struct ice_sched_node *tc_node; 1665 1666 tc_node = ice_sched_get_tc_node(pi, tc); 1667 if (!tc_node) 1668 return ICE_ERR_PARAM; 1669 1670 /* calculate number of supported nodes needed for this VSI */ 1671 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes); 1672 1673 /* add VSI supported nodes to TC subtree */ 1674 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node, 1675 num_nodes); 1676 } 1677 1678 /** 1679 * ice_sched_update_vsi_child_nodes - update VSI child nodes 1680 * @pi: port information structure 1681 * @vsi_handle: software VSI handle 1682 * @tc: TC number 1683 * @new_numqs: new number of max queues 1684 * @owner: owner of this subtree 1685 * 1686 * This function updates the VSI child nodes based on the number of queues 1687 */ 1688 static enum ice_status 1689 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1690 u8 tc, u16 new_numqs, u8 owner) 1691 { 1692 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1693 struct ice_sched_node *vsi_node; 1694 struct ice_sched_node *tc_node; 1695 struct ice_vsi_ctx *vsi_ctx; 1696 enum ice_status status = 0; 1697 struct ice_hw *hw = pi->hw; 1698 u16 prev_numqs; 1699 1700 tc_node = ice_sched_get_tc_node(pi, tc); 1701 if (!tc_node) 1702 return ICE_ERR_CFG; 1703 1704 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 1705 if (!vsi_node) 1706 return ICE_ERR_CFG; 1707 1708 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1709 if (!vsi_ctx) 1710 return ICE_ERR_PARAM; 1711 1712 prev_numqs = vsi_ctx->sched.max_lanq[tc]; 1713 /* num queues are not changed or less than the previous number */ 1714 if (new_numqs <= prev_numqs) 1715 return status; 1716 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs); 1717 if (status) 1718 return status; 1719 1720 if (new_numqs) 1721 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes); 1722 /* Keep the max number of queue configuration all the time. Update the 1723 * tree only if number of queues > previous number of queues. This may 1724 * leave some extra nodes in the tree if number of queues < previous 1725 * number but that wouldn't harm anything. Removing those extra nodes 1726 * may complicate the code if those nodes are part of SRL or 1727 * individually rate limited. 1728 */ 1729 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node, 1730 new_num_nodes, owner); 1731 if (status) 1732 return status; 1733 vsi_ctx->sched.max_lanq[tc] = new_numqs; 1734 1735 return 0; 1736 } 1737 1738 /** 1739 * ice_sched_cfg_vsi - configure the new/existing VSI 1740 * @pi: port information structure 1741 * @vsi_handle: software VSI handle 1742 * @tc: TC number 1743 * @maxqs: max number of queues 1744 * @owner: LAN or RDMA 1745 * @enable: TC enabled or disabled 1746 * 1747 * This function adds/updates VSI nodes based on the number of queues. If TC is 1748 * enabled and VSI is in suspended state then resume the VSI back. If TC is 1749 * disabled then suspend the VSI if it is not already. 1750 */ 1751 enum ice_status 1752 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 1753 u8 owner, bool enable) 1754 { 1755 struct ice_sched_node *vsi_node, *tc_node; 1756 struct ice_vsi_ctx *vsi_ctx; 1757 enum ice_status status = 0; 1758 struct ice_hw *hw = pi->hw; 1759 1760 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle); 1761 tc_node = ice_sched_get_tc_node(pi, tc); 1762 if (!tc_node) 1763 return ICE_ERR_PARAM; 1764 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1765 if (!vsi_ctx) 1766 return ICE_ERR_PARAM; 1767 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 1768 1769 /* suspend the VSI if TC is not enabled */ 1770 if (!enable) { 1771 if (vsi_node && vsi_node->in_use) { 1772 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1773 1774 status = ice_sched_suspend_resume_elems(hw, 1, &teid, 1775 true); 1776 if (!status) 1777 vsi_node->in_use = false; 1778 } 1779 return status; 1780 } 1781 1782 /* TC is enabled, if it is a new VSI then add it to the tree */ 1783 if (!vsi_node) { 1784 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc); 1785 if (status) 1786 return status; 1787 1788 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 1789 if (!vsi_node) 1790 return ICE_ERR_CFG; 1791 1792 vsi_ctx->sched.vsi_node[tc] = vsi_node; 1793 vsi_node->in_use = true; 1794 /* invalidate the max queues whenever VSI gets added first time 1795 * into the scheduler tree (boot or after reset). We need to 1796 * recreate the child nodes all the time in these cases. 1797 */ 1798 vsi_ctx->sched.max_lanq[tc] = 0; 1799 } 1800 1801 /* update the VSI child nodes */ 1802 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs, 1803 owner); 1804 if (status) 1805 return status; 1806 1807 /* TC is enabled, resume the VSI if it is in the suspend state */ 1808 if (!vsi_node->in_use) { 1809 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1810 1811 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false); 1812 if (!status) 1813 vsi_node->in_use = true; 1814 } 1815 1816 return status; 1817 } 1818 1819 /** 1820 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry 1821 * @pi: port information structure 1822 * @vsi_handle: software VSI handle 1823 * 1824 * This function removes single aggregator VSI info entry from 1825 * aggregator list. 1826 */ 1827 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle) 1828 { 1829 struct ice_sched_agg_info *agg_info; 1830 struct ice_sched_agg_info *atmp; 1831 1832 list_for_each_entry_safe(agg_info, atmp, &pi->hw->agg_list, 1833 list_entry) { 1834 struct ice_sched_agg_vsi_info *agg_vsi_info; 1835 struct ice_sched_agg_vsi_info *vtmp; 1836 1837 list_for_each_entry_safe(agg_vsi_info, vtmp, 1838 &agg_info->agg_vsi_list, list_entry) 1839 if (agg_vsi_info->vsi_handle == vsi_handle) { 1840 list_del(&agg_vsi_info->list_entry); 1841 devm_kfree(ice_hw_to_dev(pi->hw), 1842 agg_vsi_info); 1843 return; 1844 } 1845 } 1846 } 1847 1848 /** 1849 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree 1850 * @node: pointer to the sub-tree node 1851 * 1852 * This function checks for a leaf node presence in a given sub-tree node. 1853 */ 1854 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node) 1855 { 1856 u8 i; 1857 1858 for (i = 0; i < node->num_children; i++) 1859 if (ice_sched_is_leaf_node_present(node->children[i])) 1860 return true; 1861 /* check for a leaf node */ 1862 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF); 1863 } 1864 1865 /** 1866 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes 1867 * @pi: port information structure 1868 * @vsi_handle: software VSI handle 1869 * @owner: LAN or RDMA 1870 * 1871 * This function removes the VSI and its LAN or RDMA children nodes from the 1872 * scheduler tree. 1873 */ 1874 static enum ice_status 1875 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner) 1876 { 1877 enum ice_status status = ICE_ERR_PARAM; 1878 struct ice_vsi_ctx *vsi_ctx; 1879 u8 i; 1880 1881 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle); 1882 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 1883 return status; 1884 mutex_lock(&pi->sched_lock); 1885 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1886 if (!vsi_ctx) 1887 goto exit_sched_rm_vsi_cfg; 1888 1889 ice_for_each_traffic_class(i) { 1890 struct ice_sched_node *vsi_node, *tc_node; 1891 u8 j = 0; 1892 1893 tc_node = ice_sched_get_tc_node(pi, i); 1894 if (!tc_node) 1895 continue; 1896 1897 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 1898 if (!vsi_node) 1899 continue; 1900 1901 if (ice_sched_is_leaf_node_present(vsi_node)) { 1902 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i); 1903 status = ICE_ERR_IN_USE; 1904 goto exit_sched_rm_vsi_cfg; 1905 } 1906 while (j < vsi_node->num_children) { 1907 if (vsi_node->children[j]->owner == owner) { 1908 ice_free_sched_node(pi, vsi_node->children[j]); 1909 1910 /* reset the counter again since the num 1911 * children will be updated after node removal 1912 */ 1913 j = 0; 1914 } else { 1915 j++; 1916 } 1917 } 1918 /* remove the VSI if it has no children */ 1919 if (!vsi_node->num_children) { 1920 ice_free_sched_node(pi, vsi_node); 1921 vsi_ctx->sched.vsi_node[i] = NULL; 1922 1923 /* clean up aggregator related VSI info if any */ 1924 ice_sched_rm_agg_vsi_info(pi, vsi_handle); 1925 } 1926 if (owner == ICE_SCHED_NODE_OWNER_LAN) 1927 vsi_ctx->sched.max_lanq[i] = 0; 1928 } 1929 status = 0; 1930 1931 exit_sched_rm_vsi_cfg: 1932 mutex_unlock(&pi->sched_lock); 1933 return status; 1934 } 1935 1936 /** 1937 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes 1938 * @pi: port information structure 1939 * @vsi_handle: software VSI handle 1940 * 1941 * This function clears the VSI and its LAN children nodes from scheduler tree 1942 * for all TCs. 1943 */ 1944 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) 1945 { 1946 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); 1947 } 1948 1949 /** 1950 * ice_get_agg_info - get the aggregator ID 1951 * @hw: pointer to the hardware structure 1952 * @agg_id: aggregator ID 1953 * 1954 * This function validates aggregator ID. The function returns info if 1955 * aggregator ID is present in list otherwise it returns null. 1956 */ 1957 static struct ice_sched_agg_info * 1958 ice_get_agg_info(struct ice_hw *hw, u32 agg_id) 1959 { 1960 struct ice_sched_agg_info *agg_info; 1961 1962 list_for_each_entry(agg_info, &hw->agg_list, list_entry) 1963 if (agg_info->agg_id == agg_id) 1964 return agg_info; 1965 1966 return NULL; 1967 } 1968 1969 /** 1970 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree 1971 * @hw: pointer to the HW struct 1972 * @node: pointer to a child node 1973 * @num_nodes: num nodes count array 1974 * 1975 * This function walks through the aggregator subtree to find a free parent 1976 * node 1977 */ 1978 static struct ice_sched_node * 1979 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node, 1980 u16 *num_nodes) 1981 { 1982 u8 l = node->tx_sched_layer; 1983 u8 vsil, i; 1984 1985 vsil = ice_sched_get_vsi_layer(hw); 1986 1987 /* Is it VSI parent layer ? */ 1988 if (l == vsil - 1) 1989 return (node->num_children < hw->max_children[l]) ? node : NULL; 1990 1991 /* We have intermediate nodes. Let's walk through the subtree. If the 1992 * intermediate node has space to add a new node then clear the count 1993 */ 1994 if (node->num_children < hw->max_children[l]) 1995 num_nodes[l] = 0; 1996 /* The below recursive call is intentional and wouldn't go more than 1997 * 2 or 3 iterations. 1998 */ 1999 2000 for (i = 0; i < node->num_children; i++) { 2001 struct ice_sched_node *parent; 2002 2003 parent = ice_sched_get_free_vsi_parent(hw, node->children[i], 2004 num_nodes); 2005 if (parent) 2006 return parent; 2007 } 2008 2009 return NULL; 2010 } 2011 2012 /** 2013 * ice_sched_update_parent - update the new parent in SW DB 2014 * @new_parent: pointer to a new parent node 2015 * @node: pointer to a child node 2016 * 2017 * This function removes the child from the old parent and adds it to a new 2018 * parent 2019 */ 2020 static void 2021 ice_sched_update_parent(struct ice_sched_node *new_parent, 2022 struct ice_sched_node *node) 2023 { 2024 struct ice_sched_node *old_parent; 2025 u8 i, j; 2026 2027 old_parent = node->parent; 2028 2029 /* update the old parent children */ 2030 for (i = 0; i < old_parent->num_children; i++) 2031 if (old_parent->children[i] == node) { 2032 for (j = i + 1; j < old_parent->num_children; j++) 2033 old_parent->children[j - 1] = 2034 old_parent->children[j]; 2035 old_parent->num_children--; 2036 break; 2037 } 2038 2039 /* now move the node to a new parent */ 2040 new_parent->children[new_parent->num_children++] = node; 2041 node->parent = new_parent; 2042 node->info.parent_teid = new_parent->info.node_teid; 2043 } 2044 2045 /** 2046 * ice_sched_move_nodes - move child nodes to a given parent 2047 * @pi: port information structure 2048 * @parent: pointer to parent node 2049 * @num_items: number of child nodes to be moved 2050 * @list: pointer to child node teids 2051 * 2052 * This function move the child nodes to a given parent. 2053 */ 2054 static enum ice_status 2055 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent, 2056 u16 num_items, u32 *list) 2057 { 2058 struct ice_aqc_move_elem *buf; 2059 struct ice_sched_node *node; 2060 enum ice_status status = 0; 2061 u16 i, grps_movd = 0; 2062 struct ice_hw *hw; 2063 u16 buf_len; 2064 2065 hw = pi->hw; 2066 2067 if (!parent || !num_items) 2068 return ICE_ERR_PARAM; 2069 2070 /* Does parent have enough space */ 2071 if (parent->num_children + num_items > 2072 hw->max_children[parent->tx_sched_layer]) 2073 return ICE_ERR_AQ_FULL; 2074 2075 buf_len = struct_size(buf, teid, 1); 2076 buf = kzalloc(buf_len, GFP_KERNEL); 2077 if (!buf) 2078 return ICE_ERR_NO_MEMORY; 2079 2080 for (i = 0; i < num_items; i++) { 2081 node = ice_sched_find_node_by_teid(pi->root, list[i]); 2082 if (!node) { 2083 status = ICE_ERR_PARAM; 2084 goto move_err_exit; 2085 } 2086 2087 buf->hdr.src_parent_teid = node->info.parent_teid; 2088 buf->hdr.dest_parent_teid = parent->info.node_teid; 2089 buf->teid[0] = node->info.node_teid; 2090 buf->hdr.num_elems = cpu_to_le16(1); 2091 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len, 2092 &grps_movd, NULL); 2093 if (status && grps_movd != 1) { 2094 status = ICE_ERR_CFG; 2095 goto move_err_exit; 2096 } 2097 2098 /* update the SW DB */ 2099 ice_sched_update_parent(parent, node); 2100 } 2101 2102 move_err_exit: 2103 kfree(buf); 2104 return status; 2105 } 2106 2107 /** 2108 * ice_sched_move_vsi_to_agg - move VSI to aggregator node 2109 * @pi: port information structure 2110 * @vsi_handle: software VSI handle 2111 * @agg_id: aggregator ID 2112 * @tc: TC number 2113 * 2114 * This function moves a VSI to an aggregator node or its subtree. 2115 * Intermediate nodes may be created if required. 2116 */ 2117 static enum ice_status 2118 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id, 2119 u8 tc) 2120 { 2121 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent; 2122 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 2123 u32 first_node_teid, vsi_teid; 2124 enum ice_status status; 2125 u16 num_nodes_added; 2126 u8 aggl, vsil, i; 2127 2128 tc_node = ice_sched_get_tc_node(pi, tc); 2129 if (!tc_node) 2130 return ICE_ERR_CFG; 2131 2132 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id); 2133 if (!agg_node) 2134 return ICE_ERR_DOES_NOT_EXIST; 2135 2136 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); 2137 if (!vsi_node) 2138 return ICE_ERR_DOES_NOT_EXIST; 2139 2140 /* Is this VSI already part of given aggregator? */ 2141 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node)) 2142 return 0; 2143 2144 aggl = ice_sched_get_agg_layer(pi->hw); 2145 vsil = ice_sched_get_vsi_layer(pi->hw); 2146 2147 /* set intermediate node count to 1 between aggregator and VSI layers */ 2148 for (i = aggl + 1; i < vsil; i++) 2149 num_nodes[i] = 1; 2150 2151 /* Check if the aggregator subtree has any free node to add the VSI */ 2152 for (i = 0; i < agg_node->num_children; i++) { 2153 parent = ice_sched_get_free_vsi_parent(pi->hw, 2154 agg_node->children[i], 2155 num_nodes); 2156 if (parent) 2157 goto move_nodes; 2158 } 2159 2160 /* add new nodes */ 2161 parent = agg_node; 2162 for (i = aggl + 1; i < vsil; i++) { 2163 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, 2164 num_nodes[i], 2165 &first_node_teid, 2166 &num_nodes_added); 2167 if (status || num_nodes[i] != num_nodes_added) 2168 return ICE_ERR_CFG; 2169 2170 /* The newly added node can be a new parent for the next 2171 * layer nodes 2172 */ 2173 if (num_nodes_added) 2174 parent = ice_sched_find_node_by_teid(tc_node, 2175 first_node_teid); 2176 else 2177 parent = parent->children[0]; 2178 2179 if (!parent) 2180 return ICE_ERR_CFG; 2181 } 2182 2183 move_nodes: 2184 vsi_teid = le32_to_cpu(vsi_node->info.node_teid); 2185 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid); 2186 } 2187 2188 /** 2189 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator 2190 * @pi: port information structure 2191 * @agg_info: aggregator info 2192 * @tc: traffic class number 2193 * @rm_vsi_info: true or false 2194 * 2195 * This function move all the VSI(s) to the default aggregator and delete 2196 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The 2197 * caller holds the scheduler lock. 2198 */ 2199 static enum ice_status 2200 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi, 2201 struct ice_sched_agg_info *agg_info, u8 tc, 2202 bool rm_vsi_info) 2203 { 2204 struct ice_sched_agg_vsi_info *agg_vsi_info; 2205 struct ice_sched_agg_vsi_info *tmp; 2206 enum ice_status status = 0; 2207 2208 list_for_each_entry_safe(agg_vsi_info, tmp, &agg_info->agg_vsi_list, 2209 list_entry) { 2210 u16 vsi_handle = agg_vsi_info->vsi_handle; 2211 2212 /* Move VSI to default aggregator */ 2213 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc)) 2214 continue; 2215 2216 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, 2217 ICE_DFLT_AGG_ID, tc); 2218 if (status) 2219 break; 2220 2221 clear_bit(tc, agg_vsi_info->tc_bitmap); 2222 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) { 2223 list_del(&agg_vsi_info->list_entry); 2224 devm_kfree(ice_hw_to_dev(pi->hw), agg_vsi_info); 2225 } 2226 } 2227 2228 return status; 2229 } 2230 2231 /** 2232 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not 2233 * @pi: port information structure 2234 * @node: node pointer 2235 * 2236 * This function checks whether the aggregator is attached with any VSI or not. 2237 */ 2238 static bool 2239 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node) 2240 { 2241 u8 vsil, i; 2242 2243 vsil = ice_sched_get_vsi_layer(pi->hw); 2244 if (node->tx_sched_layer < vsil - 1) { 2245 for (i = 0; i < node->num_children; i++) 2246 if (ice_sched_is_agg_inuse(pi, node->children[i])) 2247 return true; 2248 return false; 2249 } else { 2250 return node->num_children ? true : false; 2251 } 2252 } 2253 2254 /** 2255 * ice_sched_rm_agg_cfg - remove the aggregator node 2256 * @pi: port information structure 2257 * @agg_id: aggregator ID 2258 * @tc: TC number 2259 * 2260 * This function removes the aggregator node and intermediate nodes if any 2261 * from the given TC 2262 */ 2263 static enum ice_status 2264 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc) 2265 { 2266 struct ice_sched_node *tc_node, *agg_node; 2267 struct ice_hw *hw = pi->hw; 2268 2269 tc_node = ice_sched_get_tc_node(pi, tc); 2270 if (!tc_node) 2271 return ICE_ERR_CFG; 2272 2273 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id); 2274 if (!agg_node) 2275 return ICE_ERR_DOES_NOT_EXIST; 2276 2277 /* Can't remove the aggregator node if it has children */ 2278 if (ice_sched_is_agg_inuse(pi, agg_node)) 2279 return ICE_ERR_IN_USE; 2280 2281 /* need to remove the whole subtree if aggregator node is the 2282 * only child. 2283 */ 2284 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) { 2285 struct ice_sched_node *parent = agg_node->parent; 2286 2287 if (!parent) 2288 return ICE_ERR_CFG; 2289 2290 if (parent->num_children > 1) 2291 break; 2292 2293 agg_node = parent; 2294 } 2295 2296 ice_free_sched_node(pi, agg_node); 2297 return 0; 2298 } 2299 2300 /** 2301 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC 2302 * @pi: port information structure 2303 * @agg_info: aggregator ID 2304 * @tc: TC number 2305 * @rm_vsi_info: bool value true or false 2306 * 2307 * This function removes aggregator reference to VSI of given TC. It removes 2308 * the aggregator configuration completely for requested TC. The caller needs 2309 * to hold the scheduler lock. 2310 */ 2311 static enum ice_status 2312 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info, 2313 u8 tc, bool rm_vsi_info) 2314 { 2315 enum ice_status status = 0; 2316 2317 /* If nothing to remove - return success */ 2318 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc)) 2319 goto exit_rm_agg_cfg_tc; 2320 2321 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info); 2322 if (status) 2323 goto exit_rm_agg_cfg_tc; 2324 2325 /* Delete aggregator node(s) */ 2326 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc); 2327 if (status) 2328 goto exit_rm_agg_cfg_tc; 2329 2330 clear_bit(tc, agg_info->tc_bitmap); 2331 exit_rm_agg_cfg_tc: 2332 return status; 2333 } 2334 2335 /** 2336 * ice_save_agg_tc_bitmap - save aggregator TC bitmap 2337 * @pi: port information structure 2338 * @agg_id: aggregator ID 2339 * @tc_bitmap: 8 bits TC bitmap 2340 * 2341 * Save aggregator TC bitmap. This function needs to be called with scheduler 2342 * lock held. 2343 */ 2344 static enum ice_status 2345 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id, 2346 unsigned long *tc_bitmap) 2347 { 2348 struct ice_sched_agg_info *agg_info; 2349 2350 agg_info = ice_get_agg_info(pi->hw, agg_id); 2351 if (!agg_info) 2352 return ICE_ERR_PARAM; 2353 bitmap_copy(agg_info->replay_tc_bitmap, tc_bitmap, 2354 ICE_MAX_TRAFFIC_CLASS); 2355 return 0; 2356 } 2357 2358 /** 2359 * ice_sched_add_agg_cfg - create an aggregator node 2360 * @pi: port information structure 2361 * @agg_id: aggregator ID 2362 * @tc: TC number 2363 * 2364 * This function creates an aggregator node and intermediate nodes if required 2365 * for the given TC 2366 */ 2367 static enum ice_status 2368 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc) 2369 { 2370 struct ice_sched_node *parent, *agg_node, *tc_node; 2371 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 2372 enum ice_status status = 0; 2373 struct ice_hw *hw = pi->hw; 2374 u32 first_node_teid; 2375 u16 num_nodes_added; 2376 u8 i, aggl; 2377 2378 tc_node = ice_sched_get_tc_node(pi, tc); 2379 if (!tc_node) 2380 return ICE_ERR_CFG; 2381 2382 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id); 2383 /* Does Agg node already exist ? */ 2384 if (agg_node) 2385 return status; 2386 2387 aggl = ice_sched_get_agg_layer(hw); 2388 2389 /* need one node in Agg layer */ 2390 num_nodes[aggl] = 1; 2391 2392 /* Check whether the intermediate nodes have space to add the 2393 * new aggregator. If they are full, then SW needs to allocate a new 2394 * intermediate node on those layers 2395 */ 2396 for (i = hw->sw_entry_point_layer; i < aggl; i++) { 2397 parent = ice_sched_get_first_node(pi, tc_node, i); 2398 2399 /* scan all the siblings */ 2400 while (parent) { 2401 if (parent->num_children < hw->max_children[i]) 2402 break; 2403 parent = parent->sibling; 2404 } 2405 2406 /* all the nodes are full, reserve one for this layer */ 2407 if (!parent) 2408 num_nodes[i]++; 2409 } 2410 2411 /* add the aggregator node */ 2412 parent = tc_node; 2413 for (i = hw->sw_entry_point_layer; i <= aggl; i++) { 2414 if (!parent) 2415 return ICE_ERR_CFG; 2416 2417 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, 2418 num_nodes[i], 2419 &first_node_teid, 2420 &num_nodes_added); 2421 if (status || num_nodes[i] != num_nodes_added) 2422 return ICE_ERR_CFG; 2423 2424 /* The newly added node can be a new parent for the next 2425 * layer nodes 2426 */ 2427 if (num_nodes_added) { 2428 parent = ice_sched_find_node_by_teid(tc_node, 2429 first_node_teid); 2430 /* register aggregator ID with the aggregator node */ 2431 if (parent && i == aggl) 2432 parent->agg_id = agg_id; 2433 } else { 2434 parent = parent->children[0]; 2435 } 2436 } 2437 2438 return 0; 2439 } 2440 2441 /** 2442 * ice_sched_cfg_agg - configure aggregator node 2443 * @pi: port information structure 2444 * @agg_id: aggregator ID 2445 * @agg_type: aggregator type queue, VSI, or aggregator group 2446 * @tc_bitmap: bits TC bitmap 2447 * 2448 * It registers a unique aggregator node into scheduler services. It 2449 * allows a user to register with a unique ID to track it's resources. 2450 * The aggregator type determines if this is a queue group, VSI group 2451 * or aggregator group. It then creates the aggregator node(s) for requested 2452 * TC(s) or removes an existing aggregator node including its configuration 2453 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator 2454 * resources and remove aggregator ID. 2455 * This function needs to be called with scheduler lock held. 2456 */ 2457 static enum ice_status 2458 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id, 2459 enum ice_agg_type agg_type, unsigned long *tc_bitmap) 2460 { 2461 struct ice_sched_agg_info *agg_info; 2462 enum ice_status status = 0; 2463 struct ice_hw *hw = pi->hw; 2464 u8 tc; 2465 2466 agg_info = ice_get_agg_info(hw, agg_id); 2467 if (!agg_info) { 2468 /* Create new entry for new aggregator ID */ 2469 agg_info = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*agg_info), 2470 GFP_KERNEL); 2471 if (!agg_info) 2472 return ICE_ERR_NO_MEMORY; 2473 2474 agg_info->agg_id = agg_id; 2475 agg_info->agg_type = agg_type; 2476 agg_info->tc_bitmap[0] = 0; 2477 2478 /* Initialize the aggregator VSI list head */ 2479 INIT_LIST_HEAD(&agg_info->agg_vsi_list); 2480 2481 /* Add new entry in aggregator list */ 2482 list_add(&agg_info->list_entry, &hw->agg_list); 2483 } 2484 /* Create aggregator node(s) for requested TC(s) */ 2485 ice_for_each_traffic_class(tc) { 2486 if (!ice_is_tc_ena(*tc_bitmap, tc)) { 2487 /* Delete aggregator cfg TC if it exists previously */ 2488 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false); 2489 if (status) 2490 break; 2491 continue; 2492 } 2493 2494 /* Check if aggregator node for TC already exists */ 2495 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc)) 2496 continue; 2497 2498 /* Create new aggregator node for TC */ 2499 status = ice_sched_add_agg_cfg(pi, agg_id, tc); 2500 if (status) 2501 break; 2502 2503 /* Save aggregator node's TC information */ 2504 set_bit(tc, agg_info->tc_bitmap); 2505 } 2506 2507 return status; 2508 } 2509 2510 /** 2511 * ice_cfg_agg - config aggregator node 2512 * @pi: port information structure 2513 * @agg_id: aggregator ID 2514 * @agg_type: aggregator type queue, VSI, or aggregator group 2515 * @tc_bitmap: bits TC bitmap 2516 * 2517 * This function configures aggregator node(s). 2518 */ 2519 enum ice_status 2520 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type, 2521 u8 tc_bitmap) 2522 { 2523 unsigned long bitmap = tc_bitmap; 2524 enum ice_status status; 2525 2526 mutex_lock(&pi->sched_lock); 2527 status = ice_sched_cfg_agg(pi, agg_id, agg_type, 2528 (unsigned long *)&bitmap); 2529 if (!status) 2530 status = ice_save_agg_tc_bitmap(pi, agg_id, 2531 (unsigned long *)&bitmap); 2532 mutex_unlock(&pi->sched_lock); 2533 return status; 2534 } 2535 2536 /** 2537 * ice_get_agg_vsi_info - get the aggregator ID 2538 * @agg_info: aggregator info 2539 * @vsi_handle: software VSI handle 2540 * 2541 * The function returns aggregator VSI info based on VSI handle. This function 2542 * needs to be called with scheduler lock held. 2543 */ 2544 static struct ice_sched_agg_vsi_info * 2545 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle) 2546 { 2547 struct ice_sched_agg_vsi_info *agg_vsi_info; 2548 2549 list_for_each_entry(agg_vsi_info, &agg_info->agg_vsi_list, list_entry) 2550 if (agg_vsi_info->vsi_handle == vsi_handle) 2551 return agg_vsi_info; 2552 2553 return NULL; 2554 } 2555 2556 /** 2557 * ice_get_vsi_agg_info - get the aggregator info of VSI 2558 * @hw: pointer to the hardware structure 2559 * @vsi_handle: Sw VSI handle 2560 * 2561 * The function returns aggregator info of VSI represented via vsi_handle. The 2562 * VSI has in this case a different aggregator than the default one. This 2563 * function needs to be called with scheduler lock held. 2564 */ 2565 static struct ice_sched_agg_info * 2566 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle) 2567 { 2568 struct ice_sched_agg_info *agg_info; 2569 2570 list_for_each_entry(agg_info, &hw->agg_list, list_entry) { 2571 struct ice_sched_agg_vsi_info *agg_vsi_info; 2572 2573 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle); 2574 if (agg_vsi_info) 2575 return agg_info; 2576 } 2577 return NULL; 2578 } 2579 2580 /** 2581 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap 2582 * @pi: port information structure 2583 * @agg_id: aggregator ID 2584 * @vsi_handle: software VSI handle 2585 * @tc_bitmap: TC bitmap of enabled TC(s) 2586 * 2587 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler 2588 * lock held. 2589 */ 2590 static enum ice_status 2591 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle, 2592 unsigned long *tc_bitmap) 2593 { 2594 struct ice_sched_agg_vsi_info *agg_vsi_info; 2595 struct ice_sched_agg_info *agg_info; 2596 2597 agg_info = ice_get_agg_info(pi->hw, agg_id); 2598 if (!agg_info) 2599 return ICE_ERR_PARAM; 2600 /* check if entry already exist */ 2601 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle); 2602 if (!agg_vsi_info) 2603 return ICE_ERR_PARAM; 2604 bitmap_copy(agg_vsi_info->replay_tc_bitmap, tc_bitmap, 2605 ICE_MAX_TRAFFIC_CLASS); 2606 return 0; 2607 } 2608 2609 /** 2610 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator 2611 * @pi: port information structure 2612 * @agg_id: aggregator ID 2613 * @vsi_handle: software VSI handle 2614 * @tc_bitmap: TC bitmap of enabled TC(s) 2615 * 2616 * This function moves VSI to a new or default aggregator node. If VSI is 2617 * already associated to the aggregator node then no operation is performed on 2618 * the tree. This function needs to be called with scheduler lock held. 2619 */ 2620 static enum ice_status 2621 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, 2622 u16 vsi_handle, unsigned long *tc_bitmap) 2623 { 2624 struct ice_sched_agg_vsi_info *agg_vsi_info; 2625 struct ice_sched_agg_info *agg_info; 2626 enum ice_status status = 0; 2627 struct ice_hw *hw = pi->hw; 2628 u8 tc; 2629 2630 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 2631 return ICE_ERR_PARAM; 2632 agg_info = ice_get_agg_info(hw, agg_id); 2633 if (!agg_info) 2634 return ICE_ERR_PARAM; 2635 /* check if entry already exist */ 2636 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle); 2637 if (!agg_vsi_info) { 2638 /* Create new entry for VSI under aggregator list */ 2639 agg_vsi_info = devm_kzalloc(ice_hw_to_dev(hw), 2640 sizeof(*agg_vsi_info), GFP_KERNEL); 2641 if (!agg_vsi_info) 2642 return ICE_ERR_PARAM; 2643 2644 /* add VSI ID into the aggregator list */ 2645 agg_vsi_info->vsi_handle = vsi_handle; 2646 list_add(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list); 2647 } 2648 /* Move VSI node to new aggregator node for requested TC(s) */ 2649 ice_for_each_traffic_class(tc) { 2650 if (!ice_is_tc_ena(*tc_bitmap, tc)) 2651 continue; 2652 2653 /* Move VSI to new aggregator */ 2654 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc); 2655 if (status) 2656 break; 2657 2658 set_bit(tc, agg_vsi_info->tc_bitmap); 2659 } 2660 return status; 2661 } 2662 2663 /** 2664 * ice_sched_rm_unused_rl_prof - remove unused RL profile 2665 * @pi: port information structure 2666 * 2667 * This function removes unused rate limit profiles from the HW and 2668 * SW DB. The caller needs to hold scheduler lock. 2669 */ 2670 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi) 2671 { 2672 u16 ln; 2673 2674 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 2675 struct ice_aqc_rl_profile_info *rl_prof_elem; 2676 struct ice_aqc_rl_profile_info *rl_prof_tmp; 2677 2678 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 2679 &pi->rl_prof_list[ln], list_entry) { 2680 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem)) 2681 ice_debug(pi->hw, ICE_DBG_SCHED, "Removed rl profile\n"); 2682 } 2683 } 2684 } 2685 2686 /** 2687 * ice_sched_update_elem - update element 2688 * @hw: pointer to the HW struct 2689 * @node: pointer to node 2690 * @info: node info to update 2691 * 2692 * Update the HW DB, and local SW DB of node. Update the scheduling 2693 * parameters of node from argument info data buffer (Info->data buf) and 2694 * returns success or error on config sched element failure. The caller 2695 * needs to hold scheduler lock. 2696 */ 2697 static enum ice_status 2698 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node, 2699 struct ice_aqc_txsched_elem_data *info) 2700 { 2701 struct ice_aqc_txsched_elem_data buf; 2702 enum ice_status status; 2703 u16 elem_cfgd = 0; 2704 u16 num_elems = 1; 2705 2706 buf = *info; 2707 /* Parent TEID is reserved field in this aq call */ 2708 buf.parent_teid = 0; 2709 /* Element type is reserved field in this aq call */ 2710 buf.data.elem_type = 0; 2711 /* Flags is reserved field in this aq call */ 2712 buf.data.flags = 0; 2713 2714 /* Update HW DB */ 2715 /* Configure element node */ 2716 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf), 2717 &elem_cfgd, NULL); 2718 if (status || elem_cfgd != num_elems) { 2719 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n"); 2720 return ICE_ERR_CFG; 2721 } 2722 2723 /* Config success case */ 2724 /* Now update local SW DB */ 2725 /* Only copy the data portion of info buffer */ 2726 node->info.data = info->data; 2727 return status; 2728 } 2729 2730 /** 2731 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params 2732 * @hw: pointer to the HW struct 2733 * @node: sched node to configure 2734 * @rl_type: rate limit type CIR, EIR, or shared 2735 * @bw_alloc: BW weight/allocation 2736 * 2737 * This function configures node element's BW allocation. 2738 */ 2739 static enum ice_status 2740 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node, 2741 enum ice_rl_type rl_type, u16 bw_alloc) 2742 { 2743 struct ice_aqc_txsched_elem_data buf; 2744 struct ice_aqc_txsched_elem *data; 2745 2746 buf = node->info; 2747 data = &buf.data; 2748 if (rl_type == ICE_MIN_BW) { 2749 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 2750 data->cir_bw.bw_alloc = cpu_to_le16(bw_alloc); 2751 } else if (rl_type == ICE_MAX_BW) { 2752 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 2753 data->eir_bw.bw_alloc = cpu_to_le16(bw_alloc); 2754 } else { 2755 return ICE_ERR_PARAM; 2756 } 2757 2758 /* Configure element */ 2759 return ice_sched_update_elem(hw, node, &buf); 2760 } 2761 2762 /** 2763 * ice_move_vsi_to_agg - moves VSI to new or default aggregator 2764 * @pi: port information structure 2765 * @agg_id: aggregator ID 2766 * @vsi_handle: software VSI handle 2767 * @tc_bitmap: TC bitmap of enabled TC(s) 2768 * 2769 * Move or associate VSI to a new or default aggregator node. 2770 */ 2771 enum ice_status 2772 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle, 2773 u8 tc_bitmap) 2774 { 2775 unsigned long bitmap = tc_bitmap; 2776 enum ice_status status; 2777 2778 mutex_lock(&pi->sched_lock); 2779 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle, 2780 (unsigned long *)&bitmap); 2781 if (!status) 2782 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle, 2783 (unsigned long *)&bitmap); 2784 mutex_unlock(&pi->sched_lock); 2785 return status; 2786 } 2787 2788 /** 2789 * ice_set_clear_cir_bw - set or clear CIR BW 2790 * @bw_t_info: bandwidth type information structure 2791 * @bw: bandwidth in Kbps - Kilo bits per sec 2792 * 2793 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info. 2794 */ 2795 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 2796 { 2797 if (bw == ICE_SCHED_DFLT_BW) { 2798 clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 2799 bw_t_info->cir_bw.bw = 0; 2800 } else { 2801 /* Save type of BW information */ 2802 set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 2803 bw_t_info->cir_bw.bw = bw; 2804 } 2805 } 2806 2807 /** 2808 * ice_set_clear_eir_bw - set or clear EIR BW 2809 * @bw_t_info: bandwidth type information structure 2810 * @bw: bandwidth in Kbps - Kilo bits per sec 2811 * 2812 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info. 2813 */ 2814 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 2815 { 2816 if (bw == ICE_SCHED_DFLT_BW) { 2817 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2818 bw_t_info->eir_bw.bw = 0; 2819 } else { 2820 /* EIR BW and Shared BW profiles are mutually exclusive and 2821 * hence only one of them may be set for any given element. 2822 * First clear earlier saved shared BW information. 2823 */ 2824 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2825 bw_t_info->shared_bw = 0; 2826 /* save EIR BW information */ 2827 set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2828 bw_t_info->eir_bw.bw = bw; 2829 } 2830 } 2831 2832 /** 2833 * ice_set_clear_shared_bw - set or clear shared BW 2834 * @bw_t_info: bandwidth type information structure 2835 * @bw: bandwidth in Kbps - Kilo bits per sec 2836 * 2837 * Save or clear shared bandwidth (BW) in the passed param bw_t_info. 2838 */ 2839 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 2840 { 2841 if (bw == ICE_SCHED_DFLT_BW) { 2842 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2843 bw_t_info->shared_bw = 0; 2844 } else { 2845 /* EIR BW and Shared BW profiles are mutually exclusive and 2846 * hence only one of them may be set for any given element. 2847 * First clear earlier saved EIR BW information. 2848 */ 2849 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2850 bw_t_info->eir_bw.bw = 0; 2851 /* save shared BW information */ 2852 set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2853 bw_t_info->shared_bw = bw; 2854 } 2855 } 2856 2857 /** 2858 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter 2859 * @bw: bandwidth in Kbps 2860 * 2861 * This function calculates the wakeup parameter of RL profile. 2862 */ 2863 static u16 ice_sched_calc_wakeup(s32 bw) 2864 { 2865 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f; 2866 s32 wakeup_f_int; 2867 u16 wakeup = 0; 2868 2869 /* Get the wakeup integer value */ 2870 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2871 wakeup_int = div64_long(ICE_RL_PROF_FREQUENCY, bytes_per_sec); 2872 if (wakeup_int > 63) { 2873 wakeup = (u16)((1 << 15) | wakeup_int); 2874 } else { 2875 /* Calculate fraction value up to 4 decimals 2876 * Convert Integer value to a constant multiplier 2877 */ 2878 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int; 2879 wakeup_a = div64_long((s64)ICE_RL_PROF_MULTIPLIER * 2880 ICE_RL_PROF_FREQUENCY, 2881 bytes_per_sec); 2882 2883 /* Get Fraction value */ 2884 wakeup_f = wakeup_a - wakeup_b; 2885 2886 /* Round up the Fractional value via Ceil(Fractional value) */ 2887 if (wakeup_f > div64_long(ICE_RL_PROF_MULTIPLIER, 2)) 2888 wakeup_f += 1; 2889 2890 wakeup_f_int = (s32)div64_long(wakeup_f * ICE_RL_PROF_FRACTION, 2891 ICE_RL_PROF_MULTIPLIER); 2892 wakeup |= (u16)(wakeup_int << 9); 2893 wakeup |= (u16)(0x1ff & wakeup_f_int); 2894 } 2895 2896 return wakeup; 2897 } 2898 2899 /** 2900 * ice_sched_bw_to_rl_profile - convert BW to profile parameters 2901 * @bw: bandwidth in Kbps 2902 * @profile: profile parameters to return 2903 * 2904 * This function converts the BW to profile structure format. 2905 */ 2906 static enum ice_status 2907 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile) 2908 { 2909 enum ice_status status = ICE_ERR_PARAM; 2910 s64 bytes_per_sec, ts_rate, mv_tmp; 2911 bool found = false; 2912 s32 encode = 0; 2913 s64 mv = 0; 2914 s32 i; 2915 2916 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */ 2917 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW) 2918 return status; 2919 2920 /* Bytes per second from Kbps */ 2921 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2922 2923 /* encode is 6 bits but really useful are 5 bits */ 2924 for (i = 0; i < 64; i++) { 2925 u64 pow_result = BIT_ULL(i); 2926 2927 ts_rate = div64_long((s64)ICE_RL_PROF_FREQUENCY, 2928 pow_result * ICE_RL_PROF_TS_MULTIPLIER); 2929 if (ts_rate <= 0) 2930 continue; 2931 2932 /* Multiplier value */ 2933 mv_tmp = div64_long(bytes_per_sec * ICE_RL_PROF_MULTIPLIER, 2934 ts_rate); 2935 2936 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */ 2937 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER); 2938 2939 /* First multiplier value greater than the given 2940 * accuracy bytes 2941 */ 2942 if (mv > ICE_RL_PROF_ACCURACY_BYTES) { 2943 encode = i; 2944 found = true; 2945 break; 2946 } 2947 } 2948 if (found) { 2949 u16 wm; 2950 2951 wm = ice_sched_calc_wakeup(bw); 2952 profile->rl_multiply = cpu_to_le16(mv); 2953 profile->wake_up_calc = cpu_to_le16(wm); 2954 profile->rl_encode = cpu_to_le16(encode); 2955 status = 0; 2956 } else { 2957 status = ICE_ERR_DOES_NOT_EXIST; 2958 } 2959 2960 return status; 2961 } 2962 2963 /** 2964 * ice_sched_add_rl_profile - add RL profile 2965 * @pi: port information structure 2966 * @rl_type: type of rate limit BW - min, max, or shared 2967 * @bw: bandwidth in Kbps - Kilo bits per sec 2968 * @layer_num: specifies in which layer to create profile 2969 * 2970 * This function first checks the existing list for corresponding BW 2971 * parameter. If it exists, it returns the associated profile otherwise 2972 * it creates a new rate limit profile for requested BW, and adds it to 2973 * the HW DB and local list. It returns the new profile or null on error. 2974 * The caller needs to hold the scheduler lock. 2975 */ 2976 static struct ice_aqc_rl_profile_info * 2977 ice_sched_add_rl_profile(struct ice_port_info *pi, 2978 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 2979 { 2980 struct ice_aqc_rl_profile_info *rl_prof_elem; 2981 u16 profiles_added = 0, num_profiles = 1; 2982 struct ice_aqc_rl_profile_elem *buf; 2983 enum ice_status status; 2984 struct ice_hw *hw; 2985 u8 profile_type; 2986 2987 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 2988 return NULL; 2989 switch (rl_type) { 2990 case ICE_MIN_BW: 2991 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 2992 break; 2993 case ICE_MAX_BW: 2994 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 2995 break; 2996 case ICE_SHARED_BW: 2997 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 2998 break; 2999 default: 3000 return NULL; 3001 } 3002 3003 if (!pi) 3004 return NULL; 3005 hw = pi->hw; 3006 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 3007 list_entry) 3008 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) == 3009 profile_type && rl_prof_elem->bw == bw) 3010 /* Return existing profile ID info */ 3011 return rl_prof_elem; 3012 3013 /* Create new profile ID */ 3014 rl_prof_elem = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*rl_prof_elem), 3015 GFP_KERNEL); 3016 3017 if (!rl_prof_elem) 3018 return NULL; 3019 3020 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile); 3021 if (status) 3022 goto exit_add_rl_prof; 3023 3024 rl_prof_elem->bw = bw; 3025 /* layer_num is zero relative, and fw expects level from 1 to 9 */ 3026 rl_prof_elem->profile.level = layer_num + 1; 3027 rl_prof_elem->profile.flags = profile_type; 3028 rl_prof_elem->profile.max_burst_size = cpu_to_le16(hw->max_burst_size); 3029 3030 /* Create new entry in HW DB */ 3031 buf = &rl_prof_elem->profile; 3032 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf), 3033 &profiles_added, NULL); 3034 if (status || profiles_added != num_profiles) 3035 goto exit_add_rl_prof; 3036 3037 /* Good entry - add in the list */ 3038 rl_prof_elem->prof_id_ref = 0; 3039 list_add(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]); 3040 return rl_prof_elem; 3041 3042 exit_add_rl_prof: 3043 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 3044 return NULL; 3045 } 3046 3047 /** 3048 * ice_sched_cfg_node_bw_lmt - configure node sched params 3049 * @hw: pointer to the HW struct 3050 * @node: sched node to configure 3051 * @rl_type: rate limit type CIR, EIR, or shared 3052 * @rl_prof_id: rate limit profile ID 3053 * 3054 * This function configures node element's BW limit. 3055 */ 3056 static enum ice_status 3057 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node, 3058 enum ice_rl_type rl_type, u16 rl_prof_id) 3059 { 3060 struct ice_aqc_txsched_elem_data buf; 3061 struct ice_aqc_txsched_elem *data; 3062 3063 buf = node->info; 3064 data = &buf.data; 3065 switch (rl_type) { 3066 case ICE_MIN_BW: 3067 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 3068 data->cir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 3069 break; 3070 case ICE_MAX_BW: 3071 /* EIR BW and Shared BW profiles are mutually exclusive and 3072 * hence only one of them may be set for any given element 3073 */ 3074 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 3075 return ICE_ERR_CFG; 3076 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 3077 data->eir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 3078 break; 3079 case ICE_SHARED_BW: 3080 /* Check for removing shared BW */ 3081 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) { 3082 /* remove shared profile */ 3083 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED; 3084 data->srl_id = 0; /* clear SRL field */ 3085 3086 /* enable back EIR to default profile */ 3087 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 3088 data->eir_bw.bw_profile_idx = 3089 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 3090 break; 3091 } 3092 /* EIR BW and Shared BW profiles are mutually exclusive and 3093 * hence only one of them may be set for any given element 3094 */ 3095 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) && 3096 (le16_to_cpu(data->eir_bw.bw_profile_idx) != 3097 ICE_SCHED_DFLT_RL_PROF_ID)) 3098 return ICE_ERR_CFG; 3099 /* EIR BW is set to default, disable it */ 3100 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR; 3101 /* Okay to enable shared BW now */ 3102 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED; 3103 data->srl_id = cpu_to_le16(rl_prof_id); 3104 break; 3105 default: 3106 /* Unknown rate limit type */ 3107 return ICE_ERR_PARAM; 3108 } 3109 3110 /* Configure element */ 3111 return ice_sched_update_elem(hw, node, &buf); 3112 } 3113 3114 /** 3115 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID 3116 * @node: sched node 3117 * @rl_type: rate limit type 3118 * 3119 * If existing profile matches, it returns the corresponding rate 3120 * limit profile ID, otherwise it returns an invalid ID as error. 3121 */ 3122 static u16 3123 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node, 3124 enum ice_rl_type rl_type) 3125 { 3126 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID; 3127 struct ice_aqc_txsched_elem *data; 3128 3129 data = &node->info.data; 3130 switch (rl_type) { 3131 case ICE_MIN_BW: 3132 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR) 3133 rl_prof_id = le16_to_cpu(data->cir_bw.bw_profile_idx); 3134 break; 3135 case ICE_MAX_BW: 3136 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR) 3137 rl_prof_id = le16_to_cpu(data->eir_bw.bw_profile_idx); 3138 break; 3139 case ICE_SHARED_BW: 3140 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 3141 rl_prof_id = le16_to_cpu(data->srl_id); 3142 break; 3143 default: 3144 break; 3145 } 3146 3147 return rl_prof_id; 3148 } 3149 3150 /** 3151 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer 3152 * @pi: port information structure 3153 * @rl_type: type of rate limit BW - min, max, or shared 3154 * @layer_index: layer index 3155 * 3156 * This function returns requested profile creation layer. 3157 */ 3158 static u8 3159 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type, 3160 u8 layer_index) 3161 { 3162 struct ice_hw *hw = pi->hw; 3163 3164 if (layer_index >= hw->num_tx_sched_layers) 3165 return ICE_SCHED_INVAL_LAYER_NUM; 3166 switch (rl_type) { 3167 case ICE_MIN_BW: 3168 if (hw->layer_info[layer_index].max_cir_rl_profiles) 3169 return layer_index; 3170 break; 3171 case ICE_MAX_BW: 3172 if (hw->layer_info[layer_index].max_eir_rl_profiles) 3173 return layer_index; 3174 break; 3175 case ICE_SHARED_BW: 3176 /* if current layer doesn't support SRL profile creation 3177 * then try a layer up or down. 3178 */ 3179 if (hw->layer_info[layer_index].max_srl_profiles) 3180 return layer_index; 3181 else if (layer_index < hw->num_tx_sched_layers - 1 && 3182 hw->layer_info[layer_index + 1].max_srl_profiles) 3183 return layer_index + 1; 3184 else if (layer_index > 0 && 3185 hw->layer_info[layer_index - 1].max_srl_profiles) 3186 return layer_index - 1; 3187 break; 3188 default: 3189 break; 3190 } 3191 return ICE_SCHED_INVAL_LAYER_NUM; 3192 } 3193 3194 /** 3195 * ice_sched_get_srl_node - get shared rate limit node 3196 * @node: tree node 3197 * @srl_layer: shared rate limit layer 3198 * 3199 * This function returns SRL node to be used for shared rate limit purpose. 3200 * The caller needs to hold scheduler lock. 3201 */ 3202 static struct ice_sched_node * 3203 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer) 3204 { 3205 if (srl_layer > node->tx_sched_layer) 3206 return node->children[0]; 3207 else if (srl_layer < node->tx_sched_layer) 3208 /* Node can't be created without a parent. It will always 3209 * have a valid parent except root node. 3210 */ 3211 return node->parent; 3212 else 3213 return node; 3214 } 3215 3216 /** 3217 * ice_sched_rm_rl_profile - remove RL profile ID 3218 * @pi: port information structure 3219 * @layer_num: layer number where profiles are saved 3220 * @profile_type: profile type like EIR, CIR, or SRL 3221 * @profile_id: profile ID to remove 3222 * 3223 * This function removes rate limit profile from layer 'layer_num' of type 3224 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold 3225 * scheduler lock. 3226 */ 3227 static enum ice_status 3228 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type, 3229 u16 profile_id) 3230 { 3231 struct ice_aqc_rl_profile_info *rl_prof_elem; 3232 enum ice_status status = 0; 3233 3234 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 3235 return ICE_ERR_PARAM; 3236 /* Check the existing list for RL profile */ 3237 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 3238 list_entry) 3239 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) == 3240 profile_type && 3241 le16_to_cpu(rl_prof_elem->profile.profile_id) == 3242 profile_id) { 3243 if (rl_prof_elem->prof_id_ref) 3244 rl_prof_elem->prof_id_ref--; 3245 3246 /* Remove old profile ID from database */ 3247 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem); 3248 if (status && status != ICE_ERR_IN_USE) 3249 ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n"); 3250 break; 3251 } 3252 if (status == ICE_ERR_IN_USE) 3253 status = 0; 3254 return status; 3255 } 3256 3257 /** 3258 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default 3259 * @pi: port information structure 3260 * @node: pointer to node structure 3261 * @rl_type: rate limit type min, max, or shared 3262 * @layer_num: layer number where RL profiles are saved 3263 * 3264 * This function configures node element's BW rate limit profile ID of 3265 * type CIR, EIR, or SRL to default. This function needs to be called 3266 * with the scheduler lock held. 3267 */ 3268 static enum ice_status 3269 ice_sched_set_node_bw_dflt(struct ice_port_info *pi, 3270 struct ice_sched_node *node, 3271 enum ice_rl_type rl_type, u8 layer_num) 3272 { 3273 enum ice_status status; 3274 struct ice_hw *hw; 3275 u8 profile_type; 3276 u16 rl_prof_id; 3277 u16 old_id; 3278 3279 hw = pi->hw; 3280 switch (rl_type) { 3281 case ICE_MIN_BW: 3282 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 3283 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 3284 break; 3285 case ICE_MAX_BW: 3286 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 3287 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 3288 break; 3289 case ICE_SHARED_BW: 3290 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 3291 /* No SRL is configured for default case */ 3292 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID; 3293 break; 3294 default: 3295 return ICE_ERR_PARAM; 3296 } 3297 /* Save existing RL prof ID for later clean up */ 3298 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 3299 /* Configure BW scheduling parameters */ 3300 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 3301 if (status) 3302 return status; 3303 3304 /* Remove stale RL profile ID */ 3305 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID || 3306 old_id == ICE_SCHED_INVAL_PROF_ID) 3307 return 0; 3308 3309 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id); 3310 } 3311 3312 /** 3313 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness 3314 * @pi: port information structure 3315 * @node: pointer to node structure 3316 * @layer_num: layer number where rate limit profiles are saved 3317 * @rl_type: rate limit type min, max, or shared 3318 * @bw: bandwidth value 3319 * 3320 * This function prepares node element's bandwidth to SRL or EIR exclusively. 3321 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of 3322 * them may be set for any given element. This function needs to be called 3323 * with the scheduler lock held. 3324 */ 3325 static enum ice_status 3326 ice_sched_set_eir_srl_excl(struct ice_port_info *pi, 3327 struct ice_sched_node *node, 3328 u8 layer_num, enum ice_rl_type rl_type, u32 bw) 3329 { 3330 if (rl_type == ICE_SHARED_BW) { 3331 /* SRL node passed in this case, it may be different node */ 3332 if (bw == ICE_SCHED_DFLT_BW) 3333 /* SRL being removed, ice_sched_cfg_node_bw_lmt() 3334 * enables EIR to default. EIR is not set in this 3335 * case, so no additional action is required. 3336 */ 3337 return 0; 3338 3339 /* SRL being configured, set EIR to default here. 3340 * ice_sched_cfg_node_bw_lmt() disables EIR when it 3341 * configures SRL 3342 */ 3343 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW, 3344 layer_num); 3345 } else if (rl_type == ICE_MAX_BW && 3346 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) { 3347 /* Remove Shared profile. Set default shared BW call 3348 * removes shared profile for a node. 3349 */ 3350 return ice_sched_set_node_bw_dflt(pi, node, 3351 ICE_SHARED_BW, 3352 layer_num); 3353 } 3354 return 0; 3355 } 3356 3357 /** 3358 * ice_sched_set_node_bw - set node's bandwidth 3359 * @pi: port information structure 3360 * @node: tree node 3361 * @rl_type: rate limit type min, max, or shared 3362 * @bw: bandwidth in Kbps - Kilo bits per sec 3363 * @layer_num: layer number 3364 * 3365 * This function adds new profile corresponding to requested BW, configures 3366 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile 3367 * ID from local database. The caller needs to hold scheduler lock. 3368 */ 3369 static enum ice_status 3370 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, 3371 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 3372 { 3373 struct ice_aqc_rl_profile_info *rl_prof_info; 3374 enum ice_status status = ICE_ERR_PARAM; 3375 struct ice_hw *hw = pi->hw; 3376 u16 old_id, rl_prof_id; 3377 3378 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num); 3379 if (!rl_prof_info) 3380 return status; 3381 3382 rl_prof_id = le16_to_cpu(rl_prof_info->profile.profile_id); 3383 3384 /* Save existing RL prof ID for later clean up */ 3385 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 3386 /* Configure BW scheduling parameters */ 3387 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 3388 if (status) 3389 return status; 3390 3391 /* New changes has been applied */ 3392 /* Increment the profile ID reference count */ 3393 rl_prof_info->prof_id_ref++; 3394 3395 /* Check for old ID removal */ 3396 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) || 3397 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id) 3398 return 0; 3399 3400 return ice_sched_rm_rl_profile(pi, layer_num, 3401 rl_prof_info->profile.flags & 3402 ICE_AQC_RL_PROFILE_TYPE_M, old_id); 3403 } 3404 3405 /** 3406 * ice_sched_set_node_bw_lmt - set node's BW limit 3407 * @pi: port information structure 3408 * @node: tree node 3409 * @rl_type: rate limit type min, max, or shared 3410 * @bw: bandwidth in Kbps - Kilo bits per sec 3411 * 3412 * It updates node's BW limit parameters like BW RL profile ID of type CIR, 3413 * EIR, or SRL. The caller needs to hold scheduler lock. 3414 */ 3415 static enum ice_status 3416 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, 3417 enum ice_rl_type rl_type, u32 bw) 3418 { 3419 struct ice_sched_node *cfg_node = node; 3420 enum ice_status status; 3421 3422 struct ice_hw *hw; 3423 u8 layer_num; 3424 3425 if (!pi) 3426 return ICE_ERR_PARAM; 3427 hw = pi->hw; 3428 /* Remove unused RL profile IDs from HW and SW DB */ 3429 ice_sched_rm_unused_rl_prof(pi); 3430 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type, 3431 node->tx_sched_layer); 3432 if (layer_num >= hw->num_tx_sched_layers) 3433 return ICE_ERR_PARAM; 3434 3435 if (rl_type == ICE_SHARED_BW) { 3436 /* SRL node may be different */ 3437 cfg_node = ice_sched_get_srl_node(node, layer_num); 3438 if (!cfg_node) 3439 return ICE_ERR_CFG; 3440 } 3441 /* EIR BW and Shared BW profiles are mutually exclusive and 3442 * hence only one of them may be set for any given element 3443 */ 3444 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type, 3445 bw); 3446 if (status) 3447 return status; 3448 if (bw == ICE_SCHED_DFLT_BW) 3449 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type, 3450 layer_num); 3451 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num); 3452 } 3453 3454 /** 3455 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default 3456 * @pi: port information structure 3457 * @node: pointer to node structure 3458 * @rl_type: rate limit type min, max, or shared 3459 * 3460 * This function configures node element's BW rate limit profile ID of 3461 * type CIR, EIR, or SRL to default. This function needs to be called 3462 * with the scheduler lock held. 3463 */ 3464 static enum ice_status 3465 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi, 3466 struct ice_sched_node *node, 3467 enum ice_rl_type rl_type) 3468 { 3469 return ice_sched_set_node_bw_lmt(pi, node, rl_type, 3470 ICE_SCHED_DFLT_BW); 3471 } 3472 3473 /** 3474 * ice_sched_validate_srl_node - Check node for SRL applicability 3475 * @node: sched node to configure 3476 * @sel_layer: selected SRL layer 3477 * 3478 * This function checks if the SRL can be applied to a selected layer node on 3479 * behalf of the requested node (first argument). This function needs to be 3480 * called with scheduler lock held. 3481 */ 3482 static enum ice_status 3483 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer) 3484 { 3485 /* SRL profiles are not available on all layers. Check if the 3486 * SRL profile can be applied to a node above or below the 3487 * requested node. SRL configuration is possible only if the 3488 * selected layer's node has single child. 3489 */ 3490 if (sel_layer == node->tx_sched_layer || 3491 ((sel_layer == node->tx_sched_layer + 1) && 3492 node->num_children == 1) || 3493 ((sel_layer == node->tx_sched_layer - 1) && 3494 (node->parent && node->parent->num_children == 1))) 3495 return 0; 3496 3497 return ICE_ERR_CFG; 3498 } 3499 3500 /** 3501 * ice_sched_save_q_bw - save queue node's BW information 3502 * @q_ctx: queue context structure 3503 * @rl_type: rate limit type min, max, or shared 3504 * @bw: bandwidth in Kbps - Kilo bits per sec 3505 * 3506 * Save BW information of queue type node for post replay use. 3507 */ 3508 static enum ice_status 3509 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw) 3510 { 3511 switch (rl_type) { 3512 case ICE_MIN_BW: 3513 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw); 3514 break; 3515 case ICE_MAX_BW: 3516 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw); 3517 break; 3518 case ICE_SHARED_BW: 3519 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw); 3520 break; 3521 default: 3522 return ICE_ERR_PARAM; 3523 } 3524 return 0; 3525 } 3526 3527 /** 3528 * ice_sched_set_q_bw_lmt - sets queue BW limit 3529 * @pi: port information structure 3530 * @vsi_handle: sw VSI handle 3531 * @tc: traffic class 3532 * @q_handle: software queue handle 3533 * @rl_type: min, max, or shared 3534 * @bw: bandwidth in Kbps 3535 * 3536 * This function sets BW limit of queue scheduling node. 3537 */ 3538 static enum ice_status 3539 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 3540 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 3541 { 3542 enum ice_status status = ICE_ERR_PARAM; 3543 struct ice_sched_node *node; 3544 struct ice_q_ctx *q_ctx; 3545 3546 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 3547 return ICE_ERR_PARAM; 3548 mutex_lock(&pi->sched_lock); 3549 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle); 3550 if (!q_ctx) 3551 goto exit_q_bw_lmt; 3552 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 3553 if (!node) { 3554 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n"); 3555 goto exit_q_bw_lmt; 3556 } 3557 3558 /* Return error if it is not a leaf node */ 3559 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) 3560 goto exit_q_bw_lmt; 3561 3562 /* SRL bandwidth layer selection */ 3563 if (rl_type == ICE_SHARED_BW) { 3564 u8 sel_layer; /* selected layer */ 3565 3566 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type, 3567 node->tx_sched_layer); 3568 if (sel_layer >= pi->hw->num_tx_sched_layers) { 3569 status = ICE_ERR_PARAM; 3570 goto exit_q_bw_lmt; 3571 } 3572 status = ice_sched_validate_srl_node(node, sel_layer); 3573 if (status) 3574 goto exit_q_bw_lmt; 3575 } 3576 3577 if (bw == ICE_SCHED_DFLT_BW) 3578 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type); 3579 else 3580 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw); 3581 3582 if (!status) 3583 status = ice_sched_save_q_bw(q_ctx, rl_type, bw); 3584 3585 exit_q_bw_lmt: 3586 mutex_unlock(&pi->sched_lock); 3587 return status; 3588 } 3589 3590 /** 3591 * ice_cfg_q_bw_lmt - configure queue BW limit 3592 * @pi: port information structure 3593 * @vsi_handle: sw VSI handle 3594 * @tc: traffic class 3595 * @q_handle: software queue handle 3596 * @rl_type: min, max, or shared 3597 * @bw: bandwidth in Kbps 3598 * 3599 * This function configures BW limit of queue scheduling node. 3600 */ 3601 enum ice_status 3602 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 3603 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 3604 { 3605 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 3606 bw); 3607 } 3608 3609 /** 3610 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit 3611 * @pi: port information structure 3612 * @vsi_handle: sw VSI handle 3613 * @tc: traffic class 3614 * @q_handle: software queue handle 3615 * @rl_type: min, max, or shared 3616 * 3617 * This function configures BW default limit of queue scheduling node. 3618 */ 3619 enum ice_status 3620 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 3621 u16 q_handle, enum ice_rl_type rl_type) 3622 { 3623 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 3624 ICE_SCHED_DFLT_BW); 3625 } 3626 3627 /** 3628 * ice_cfg_rl_burst_size - Set burst size value 3629 * @hw: pointer to the HW struct 3630 * @bytes: burst size in bytes 3631 * 3632 * This function configures/set the burst size to requested new value. The new 3633 * burst size value is used for future rate limit calls. It doesn't change the 3634 * existing or previously created RL profiles. 3635 */ 3636 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes) 3637 { 3638 u16 burst_size_to_prog; 3639 3640 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED || 3641 bytes > ICE_MAX_BURST_SIZE_ALLOWED) 3642 return ICE_ERR_PARAM; 3643 if (ice_round_to_num(bytes, 64) <= 3644 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) { 3645 /* 64 byte granularity case */ 3646 /* Disable MSB granularity bit */ 3647 burst_size_to_prog = ICE_64_BYTE_GRANULARITY; 3648 /* round number to nearest 64 byte granularity */ 3649 bytes = ice_round_to_num(bytes, 64); 3650 /* The value is in 64 byte chunks */ 3651 burst_size_to_prog |= (u16)(bytes / 64); 3652 } else { 3653 /* k bytes granularity case */ 3654 /* Enable MSB granularity bit */ 3655 burst_size_to_prog = ICE_KBYTE_GRANULARITY; 3656 /* round number to nearest 1024 granularity */ 3657 bytes = ice_round_to_num(bytes, 1024); 3658 /* check rounding doesn't go beyond allowed */ 3659 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY) 3660 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY; 3661 /* The value is in k bytes */ 3662 burst_size_to_prog |= (u16)(bytes / 1024); 3663 } 3664 hw->max_burst_size = burst_size_to_prog; 3665 return 0; 3666 } 3667 3668 /** 3669 * ice_sched_replay_node_prio - re-configure node priority 3670 * @hw: pointer to the HW struct 3671 * @node: sched node to configure 3672 * @priority: priority value 3673 * 3674 * This function configures node element's priority value. It 3675 * needs to be called with scheduler lock held. 3676 */ 3677 static enum ice_status 3678 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node, 3679 u8 priority) 3680 { 3681 struct ice_aqc_txsched_elem_data buf; 3682 struct ice_aqc_txsched_elem *data; 3683 enum ice_status status; 3684 3685 buf = node->info; 3686 data = &buf.data; 3687 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC; 3688 data->generic = priority; 3689 3690 /* Configure element */ 3691 status = ice_sched_update_elem(hw, node, &buf); 3692 return status; 3693 } 3694 3695 /** 3696 * ice_sched_replay_node_bw - replay node(s) BW 3697 * @hw: pointer to the HW struct 3698 * @node: sched node to configure 3699 * @bw_t_info: BW type information 3700 * 3701 * This function restores node's BW from bw_t_info. The caller needs 3702 * to hold the scheduler lock. 3703 */ 3704 static enum ice_status 3705 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node, 3706 struct ice_bw_type_info *bw_t_info) 3707 { 3708 struct ice_port_info *pi = hw->port_info; 3709 enum ice_status status = ICE_ERR_PARAM; 3710 u16 bw_alloc; 3711 3712 if (!node) 3713 return status; 3714 if (bitmap_empty(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT)) 3715 return 0; 3716 if (test_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap)) { 3717 status = ice_sched_replay_node_prio(hw, node, 3718 bw_t_info->generic); 3719 if (status) 3720 return status; 3721 } 3722 if (test_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap)) { 3723 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW, 3724 bw_t_info->cir_bw.bw); 3725 if (status) 3726 return status; 3727 } 3728 if (test_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap)) { 3729 bw_alloc = bw_t_info->cir_bw.bw_alloc; 3730 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW, 3731 bw_alloc); 3732 if (status) 3733 return status; 3734 } 3735 if (test_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap)) { 3736 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW, 3737 bw_t_info->eir_bw.bw); 3738 if (status) 3739 return status; 3740 } 3741 if (test_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap)) { 3742 bw_alloc = bw_t_info->eir_bw.bw_alloc; 3743 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW, 3744 bw_alloc); 3745 if (status) 3746 return status; 3747 } 3748 if (test_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap)) 3749 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW, 3750 bw_t_info->shared_bw); 3751 return status; 3752 } 3753 3754 /** 3755 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap 3756 * @pi: port info struct 3757 * @tc_bitmap: 8 bits TC bitmap to check 3758 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return 3759 * 3760 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs 3761 * may be missing, it returns enabled TCs. This function needs to be called with 3762 * scheduler lock held. 3763 */ 3764 static void 3765 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, 3766 unsigned long *tc_bitmap, 3767 unsigned long *ena_tc_bitmap) 3768 { 3769 u8 tc; 3770 3771 /* Some TC(s) may be missing after reset, adjust for replay */ 3772 ice_for_each_traffic_class(tc) 3773 if (ice_is_tc_ena(*tc_bitmap, tc) && 3774 (ice_sched_get_tc_node(pi, tc))) 3775 set_bit(tc, ena_tc_bitmap); 3776 } 3777 3778 /** 3779 * ice_sched_replay_agg - recreate aggregator node(s) 3780 * @hw: pointer to the HW struct 3781 * 3782 * This function recreate aggregator type nodes which are not replayed earlier. 3783 * It also replay aggregator BW information. These aggregator nodes are not 3784 * associated with VSI type node yet. 3785 */ 3786 void ice_sched_replay_agg(struct ice_hw *hw) 3787 { 3788 struct ice_port_info *pi = hw->port_info; 3789 struct ice_sched_agg_info *agg_info; 3790 3791 mutex_lock(&pi->sched_lock); 3792 list_for_each_entry(agg_info, &hw->agg_list, list_entry) 3793 /* replay aggregator (re-create aggregator node) */ 3794 if (!bitmap_equal(agg_info->tc_bitmap, agg_info->replay_tc_bitmap, 3795 ICE_MAX_TRAFFIC_CLASS)) { 3796 DECLARE_BITMAP(replay_bitmap, ICE_MAX_TRAFFIC_CLASS); 3797 enum ice_status status; 3798 3799 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS); 3800 ice_sched_get_ena_tc_bitmap(pi, 3801 agg_info->replay_tc_bitmap, 3802 replay_bitmap); 3803 status = ice_sched_cfg_agg(hw->port_info, 3804 agg_info->agg_id, 3805 ICE_AGG_TYPE_AGG, 3806 replay_bitmap); 3807 if (status) { 3808 dev_info(ice_hw_to_dev(hw), 3809 "Replay agg id[%d] failed\n", 3810 agg_info->agg_id); 3811 /* Move on to next one */ 3812 continue; 3813 } 3814 } 3815 mutex_unlock(&pi->sched_lock); 3816 } 3817 3818 /** 3819 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization 3820 * @hw: pointer to the HW struct 3821 * 3822 * This function initialize aggregator(s) TC bitmap to zero. A required 3823 * preinit step for replaying aggregators. 3824 */ 3825 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw) 3826 { 3827 struct ice_port_info *pi = hw->port_info; 3828 struct ice_sched_agg_info *agg_info; 3829 3830 mutex_lock(&pi->sched_lock); 3831 list_for_each_entry(agg_info, &hw->agg_list, list_entry) { 3832 struct ice_sched_agg_vsi_info *agg_vsi_info; 3833 3834 agg_info->tc_bitmap[0] = 0; 3835 list_for_each_entry(agg_vsi_info, &agg_info->agg_vsi_list, 3836 list_entry) 3837 agg_vsi_info->tc_bitmap[0] = 0; 3838 } 3839 mutex_unlock(&pi->sched_lock); 3840 } 3841 3842 /** 3843 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s) 3844 * @hw: pointer to the HW struct 3845 * @vsi_handle: software VSI handle 3846 * 3847 * This function replays aggregator node, VSI to aggregator type nodes, and 3848 * their node bandwidth information. This function needs to be called with 3849 * scheduler lock held. 3850 */ 3851 static enum ice_status 3852 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle) 3853 { 3854 DECLARE_BITMAP(replay_bitmap, ICE_MAX_TRAFFIC_CLASS); 3855 struct ice_sched_agg_vsi_info *agg_vsi_info; 3856 struct ice_port_info *pi = hw->port_info; 3857 struct ice_sched_agg_info *agg_info; 3858 enum ice_status status; 3859 3860 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS); 3861 if (!ice_is_vsi_valid(hw, vsi_handle)) 3862 return ICE_ERR_PARAM; 3863 agg_info = ice_get_vsi_agg_info(hw, vsi_handle); 3864 if (!agg_info) 3865 return 0; /* Not present in list - default Agg case */ 3866 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle); 3867 if (!agg_vsi_info) 3868 return 0; /* Not present in list - default Agg case */ 3869 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap, 3870 replay_bitmap); 3871 /* Replay aggregator node associated to vsi_handle */ 3872 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id, 3873 ICE_AGG_TYPE_AGG, replay_bitmap); 3874 if (status) 3875 return status; 3876 3877 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS); 3878 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap, 3879 replay_bitmap); 3880 /* Move this VSI (vsi_handle) to above aggregator */ 3881 return ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle, 3882 replay_bitmap); 3883 } 3884 3885 /** 3886 * ice_replay_vsi_agg - replay VSI to aggregator node 3887 * @hw: pointer to the HW struct 3888 * @vsi_handle: software VSI handle 3889 * 3890 * This function replays association of VSI to aggregator type nodes, and 3891 * node bandwidth information. 3892 */ 3893 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle) 3894 { 3895 struct ice_port_info *pi = hw->port_info; 3896 enum ice_status status; 3897 3898 mutex_lock(&pi->sched_lock); 3899 status = ice_sched_replay_vsi_agg(hw, vsi_handle); 3900 mutex_unlock(&pi->sched_lock); 3901 return status; 3902 } 3903 3904 /** 3905 * ice_sched_replay_q_bw - replay queue type node BW 3906 * @pi: port information structure 3907 * @q_ctx: queue context structure 3908 * 3909 * This function replays queue type node bandwidth. This function needs to be 3910 * called with scheduler lock held. 3911 */ 3912 enum ice_status 3913 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx) 3914 { 3915 struct ice_sched_node *q_node; 3916 3917 /* Following also checks the presence of node in tree */ 3918 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 3919 if (!q_node) 3920 return ICE_ERR_PARAM; 3921 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info); 3922 } 3923