1*8f5ee3c4SJacob Keller /* SPDX-License-Identifier: GPL-2.0 */ 2*8f5ee3c4SJacob Keller /* Copyright (C) 2021, Intel Corporation. */ 3*8f5ee3c4SJacob Keller 4*8f5ee3c4SJacob Keller #ifndef _ICE_SBQ_CMD_H_ 5*8f5ee3c4SJacob Keller #define _ICE_SBQ_CMD_H_ 6*8f5ee3c4SJacob Keller 7*8f5ee3c4SJacob Keller /* This header file defines the Sideband Queue commands, error codes and 8*8f5ee3c4SJacob Keller * descriptor format. It is shared between Firmware and Software. 9*8f5ee3c4SJacob Keller */ 10*8f5ee3c4SJacob Keller 11*8f5ee3c4SJacob Keller /* Sideband Queue command structure and opcodes */ 12*8f5ee3c4SJacob Keller enum ice_sbq_opc { 13*8f5ee3c4SJacob Keller /* Sideband Queue commands */ 14*8f5ee3c4SJacob Keller ice_sbq_opc_neigh_dev_req = 0x0C00, 15*8f5ee3c4SJacob Keller ice_sbq_opc_neigh_dev_ev = 0x0C01 16*8f5ee3c4SJacob Keller }; 17*8f5ee3c4SJacob Keller 18*8f5ee3c4SJacob Keller /* Sideband Queue descriptor. Indirect command 19*8f5ee3c4SJacob Keller * and non posted 20*8f5ee3c4SJacob Keller */ 21*8f5ee3c4SJacob Keller struct ice_sbq_cmd_desc { 22*8f5ee3c4SJacob Keller __le16 flags; 23*8f5ee3c4SJacob Keller __le16 opcode; 24*8f5ee3c4SJacob Keller __le16 datalen; 25*8f5ee3c4SJacob Keller __le16 cmd_retval; 26*8f5ee3c4SJacob Keller 27*8f5ee3c4SJacob Keller /* Opaque message data */ 28*8f5ee3c4SJacob Keller __le32 cookie_high; 29*8f5ee3c4SJacob Keller __le32 cookie_low; 30*8f5ee3c4SJacob Keller 31*8f5ee3c4SJacob Keller union { 32*8f5ee3c4SJacob Keller __le16 cmd_len; 33*8f5ee3c4SJacob Keller __le16 cmpl_len; 34*8f5ee3c4SJacob Keller } param0; 35*8f5ee3c4SJacob Keller 36*8f5ee3c4SJacob Keller u8 reserved[6]; 37*8f5ee3c4SJacob Keller __le32 addr_high; 38*8f5ee3c4SJacob Keller __le32 addr_low; 39*8f5ee3c4SJacob Keller }; 40*8f5ee3c4SJacob Keller 41*8f5ee3c4SJacob Keller struct ice_sbq_evt_desc { 42*8f5ee3c4SJacob Keller __le16 flags; 43*8f5ee3c4SJacob Keller __le16 opcode; 44*8f5ee3c4SJacob Keller __le16 datalen; 45*8f5ee3c4SJacob Keller __le16 cmd_retval; 46*8f5ee3c4SJacob Keller u8 data[24]; 47*8f5ee3c4SJacob Keller }; 48*8f5ee3c4SJacob Keller 49*8f5ee3c4SJacob Keller enum ice_sbq_msg_dev { 50*8f5ee3c4SJacob Keller rmn_0 = 0x02, 51*8f5ee3c4SJacob Keller rmn_1 = 0x03, 52*8f5ee3c4SJacob Keller rmn_2 = 0x04, 53*8f5ee3c4SJacob Keller cgu = 0x06 54*8f5ee3c4SJacob Keller }; 55*8f5ee3c4SJacob Keller 56*8f5ee3c4SJacob Keller enum ice_sbq_msg_opcode { 57*8f5ee3c4SJacob Keller ice_sbq_msg_rd = 0x00, 58*8f5ee3c4SJacob Keller ice_sbq_msg_wr = 0x01 59*8f5ee3c4SJacob Keller }; 60*8f5ee3c4SJacob Keller 61*8f5ee3c4SJacob Keller #define ICE_SBQ_MSG_FLAGS 0x40 62*8f5ee3c4SJacob Keller #define ICE_SBQ_MSG_SBE_FBE 0x0F 63*8f5ee3c4SJacob Keller 64*8f5ee3c4SJacob Keller struct ice_sbq_msg_req { 65*8f5ee3c4SJacob Keller u8 dest_dev; 66*8f5ee3c4SJacob Keller u8 src_dev; 67*8f5ee3c4SJacob Keller u8 opcode; 68*8f5ee3c4SJacob Keller u8 flags; 69*8f5ee3c4SJacob Keller u8 sbe_fbe; 70*8f5ee3c4SJacob Keller u8 func_id; 71*8f5ee3c4SJacob Keller __le16 msg_addr_low; 72*8f5ee3c4SJacob Keller __le32 msg_addr_high; 73*8f5ee3c4SJacob Keller __le32 data; 74*8f5ee3c4SJacob Keller }; 75*8f5ee3c4SJacob Keller 76*8f5ee3c4SJacob Keller struct ice_sbq_msg_cmpl { 77*8f5ee3c4SJacob Keller u8 dest_dev; 78*8f5ee3c4SJacob Keller u8 src_dev; 79*8f5ee3c4SJacob Keller u8 opcode; 80*8f5ee3c4SJacob Keller u8 flags; 81*8f5ee3c4SJacob Keller __le32 data; 82*8f5ee3c4SJacob Keller }; 83*8f5ee3c4SJacob Keller 84*8f5ee3c4SJacob Keller /* Internal struct */ 85*8f5ee3c4SJacob Keller struct ice_sbq_msg_input { 86*8f5ee3c4SJacob Keller u8 dest_dev; 87*8f5ee3c4SJacob Keller u8 opcode; 88*8f5ee3c4SJacob Keller u16 msg_addr_low; 89*8f5ee3c4SJacob Keller u32 msg_addr_high; 90*8f5ee3c4SJacob Keller u32 data; 91*8f5ee3c4SJacob Keller }; 92*8f5ee3c4SJacob Keller #endif /* _ICE_SBQ_CMD_H_ */ 93