1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2021, Intel Corporation. */ 3 4 #ifndef _ICE_PTP_H_ 5 #define _ICE_PTP_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/kthread.h> 9 10 #include "ice_ptp_hw.h" 11 12 enum ice_ptp_pin_e810 { 13 GPIO_20 = 0, 14 GPIO_21, 15 GPIO_22, 16 GPIO_23, 17 NUM_PTP_PIN_E810 18 }; 19 20 enum ice_ptp_pin_e810t { 21 GNSS = 0, 22 SMA1, 23 UFL1, 24 SMA2, 25 UFL2, 26 NUM_PTP_PINS_E810T 27 }; 28 29 struct ice_perout_channel { 30 bool ena; 31 u32 gpio_pin; 32 u64 period; 33 u64 start_time; 34 }; 35 36 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp 37 * is stored in a buffer of registers. Depending on the specific hardware, 38 * this buffer might be shared across multiple PHY ports. 39 * 40 * On transmit of a packet to be timestamped, software is responsible for 41 * selecting an open index. Hardware makes no attempt to lock or prevent 42 * re-use of an index for multiple packets. 43 * 44 * To handle this, timestamp indexes must be tracked by software to ensure 45 * that an index is not re-used for multiple transmitted packets. The 46 * structures and functions declared in this file track the available Tx 47 * register indexes, as well as provide storage for the SKB pointers. 48 * 49 * To allow multiple ports to access the shared register block independently, 50 * the blocks are split up so that indexes are assigned to each port based on 51 * hardware logical port number. 52 * 53 * The timestamp blocks are handled differently for E810- and E822-based 54 * devices. In E810 devices, each port has its own block of timestamps, while in 55 * E822 there is a need to logically break the block of registers into smaller 56 * chunks based on the port number to avoid collisions. 57 * 58 * Example for port 5 in E810: 59 * +--------+--------+--------+--------+--------+--------+--------+--------+ 60 * |register|register|register|register|register|register|register|register| 61 * | block | block | block | block | block | block | block | block | 62 * | for | for | for | for | for | for | for | for | 63 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 | 64 * +--------+--------+--------+--------+--------+--------+--------+--------+ 65 * ^^ 66 * || 67 * |--- quad offset is always 0 68 * ---- quad number 69 * 70 * Example for port 5 in E822: 71 * +-----------------------------+-----------------------------+ 72 * | register block for quad 0 | register block for quad 1 | 73 * |+------+------+------+------+|+------+------+------+------+| 74 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3|| 75 * |+------+------+------+------+|+------+------+------+------+| 76 * +-----------------------------+-------^---------------------+ 77 * ^ | 78 * | --- quad offset* 79 * ---- quad number 80 * 81 * * PHY port 5 is port 1 in quad 1 82 * 83 */ 84 85 /** 86 * struct ice_tx_tstamp - Tracking for a single Tx timestamp 87 * @skb: pointer to the SKB for this timestamp request 88 * @start: jiffies when the timestamp was first requested 89 * @cached_tstamp: last read timestamp 90 * 91 * This structure tracks a single timestamp request. The SKB pointer is 92 * provided when initiating a request. The start time is used to ensure that 93 * we discard old requests that were not fulfilled within a 2 second time 94 * window. 95 * Timestamp values in the PHY are read only and do not get cleared except at 96 * hardware reset or when a new timestamp value is captured. The cached_tstamp 97 * field is used to detect the case where a new timestamp has not yet been 98 * captured, ensuring that we avoid sending stale timestamp data to the stack. 99 */ 100 struct ice_tx_tstamp { 101 struct sk_buff *skb; 102 unsigned long start; 103 u64 cached_tstamp; 104 }; 105 106 /** 107 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port 108 * @work: work function to handle processing of Tx timestamps 109 * @lock: lock to prevent concurrent write to in_use bitmap 110 * @tstamps: array of len to store outstanding requests 111 * @in_use: bitmap of len to indicate which slots are in use 112 * @quad: which quad the timestamps are captured in 113 * @quad_offset: offset into timestamp block of the quad to get the real index 114 * @len: length of the tstamps and in_use fields. 115 * @init: if true, the tracker is initialized; 116 * @calibrating: if true, the PHY is calibrating the Tx offset. During this 117 * window, timestamps are temporarily disabled. 118 */ 119 struct ice_ptp_tx { 120 struct kthread_work work; 121 spinlock_t lock; /* lock protecting in_use bitmap */ 122 struct ice_tx_tstamp *tstamps; 123 unsigned long *in_use; 124 u8 quad; 125 u8 quad_offset; 126 u8 len; 127 u8 init; 128 u8 calibrating; 129 }; 130 131 /* Quad and port information for initializing timestamp blocks */ 132 #define INDEX_PER_QUAD 64 133 #define INDEX_PER_PORT (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD) 134 135 /** 136 * struct ice_ptp_port - data used to initialize an external port for PTP 137 * 138 * This structure contains data indicating whether a single external port is 139 * ready for PTP functionality. It is used to track the port initialization 140 * and determine when the port's PHY offset is valid. 141 * 142 * @tx: Tx timestamp tracking for this port 143 * @ov_work: delayed work task for tracking when PHY offset is valid 144 * @ps_lock: mutex used to protect the overall PTP PHY start procedure 145 * @link_up: indicates whether the link is up 146 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy 147 * @port_num: the port number this structure represents 148 */ 149 struct ice_ptp_port { 150 struct ice_ptp_tx tx; 151 struct kthread_delayed_work ov_work; 152 struct mutex ps_lock; /* protects overall PTP PHY start procedure */ 153 bool link_up; 154 u8 tx_fifo_busy_cnt; 155 u8 port_num; 156 }; 157 158 #define GLTSYN_TGT_H_IDX_MAX 4 159 160 /** 161 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK 162 * @port: data for the PHY port initialization procedure 163 * @work: delayed work function for periodic tasks 164 * @extts_work: work function for handling external Tx timestamps 165 * @cached_phc_time: a cached copy of the PHC time for timestamp extension 166 * @ext_ts_chan: the external timestamp channel in use 167 * @ext_ts_irq: the external timestamp IRQ in use 168 * @kworker: kwork thread for handling periodic work 169 * @perout_channels: periodic output data 170 * @info: structure defining PTP hardware capabilities 171 * @clock: pointer to registered PTP clock device 172 * @tstamp_config: hardware timestamping configuration 173 * @reset_time: kernel time after clock stop on reset 174 */ 175 struct ice_ptp { 176 struct ice_ptp_port port; 177 struct kthread_delayed_work work; 178 struct kthread_work extts_work; 179 u64 cached_phc_time; 180 u8 ext_ts_chan; 181 u8 ext_ts_irq; 182 struct kthread_worker *kworker; 183 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX]; 184 struct ptp_clock_info info; 185 struct ptp_clock *clock; 186 struct hwtstamp_config tstamp_config; 187 u64 reset_time; 188 }; 189 190 #define __ptp_port_to_ptp(p) \ 191 container_of((p), struct ice_ptp, port) 192 #define ptp_port_to_pf(p) \ 193 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp) 194 195 #define __ptp_info_to_ptp(i) \ 196 container_of((i), struct ice_ptp, info) 197 #define ptp_info_to_pf(i) \ 198 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp) 199 200 #define PFTSYN_SEM_BYTES 4 201 #define PTP_SHARED_CLK_IDX_VALID BIT(31) 202 #define TS_CMD_MASK 0xF 203 #define SYNC_EXEC_CMD 0x3 204 #define ICE_PTP_TS_VALID BIT(0) 205 206 #define FIFO_EMPTY BIT(2) 207 #define FIFO_OK 0xFF 208 #define ICE_PTP_FIFO_NUM_CHECKS 5 209 /* Per-channel register definitions */ 210 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) 211 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) 212 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) 213 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) 214 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) 215 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) 216 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) 217 #define GLTSYN_EVNT_H_IDX_MAX 3 218 219 /* Pin definitions for PTP PPS out */ 220 #define PPS_CLK_GEN_CHAN 3 221 #define PPS_CLK_SRC_CHAN 2 222 #define PPS_PIN_INDEX 5 223 #define TIME_SYNC_PIN_INDEX 4 224 #define N_EXT_TS_E810 3 225 #define N_PER_OUT_E810 4 226 #define N_PER_OUT_E810T 3 227 #define N_PER_OUT_E810T_NO_SMA 2 228 #define N_EXT_TS_E810_NO_SMA 2 229 #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4)) 230 231 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 232 struct ice_pf; 233 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); 234 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); 235 void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); 236 int ice_get_ptp_clock_index(struct ice_pf *pf); 237 238 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); 239 void ice_ptp_process_ts(struct ice_pf *pf); 240 241 void 242 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, 243 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); 244 void ice_ptp_reset(struct ice_pf *pf); 245 void ice_ptp_prepare_for_reset(struct ice_pf *pf); 246 void ice_ptp_init(struct ice_pf *pf); 247 void ice_ptp_release(struct ice_pf *pf); 248 int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); 249 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 250 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) 251 { 252 return -EOPNOTSUPP; 253 } 254 255 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) 256 { 257 return -EOPNOTSUPP; 258 } 259 260 static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } 261 static inline int ice_get_ptp_clock_index(struct ice_pf *pf) 262 { 263 return -1; 264 } 265 266 static inline s8 267 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) 268 { 269 return -1; 270 } 271 272 static inline void ice_ptp_process_ts(struct ice_pf *pf) { } 273 static inline void 274 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, 275 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } 276 static inline void ice_ptp_reset(struct ice_pf *pf) { } 277 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { } 278 static inline void ice_ptp_init(struct ice_pf *pf) { } 279 static inline void ice_ptp_release(struct ice_pf *pf) { } 280 static inline int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) 281 { return 0; } 282 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 283 #endif /* _ICE_PTP_H_ */ 284