1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2021, Intel Corporation. */ 3 4 #ifndef _ICE_PTP_H_ 5 #define _ICE_PTP_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/kthread.h> 9 10 #include "ice_ptp_hw.h" 11 12 enum ice_ptp_pin_e810 { 13 GPIO_20 = 0, 14 GPIO_21, 15 GPIO_22, 16 GPIO_23, 17 NUM_PTP_PIN_E810 18 }; 19 20 enum ice_ptp_pin_e810t { 21 GNSS = 0, 22 SMA1, 23 UFL1, 24 SMA2, 25 UFL2, 26 NUM_PTP_PINS_E810T 27 }; 28 29 struct ice_perout_channel { 30 bool ena; 31 u32 gpio_pin; 32 u64 period; 33 u64 start_time; 34 }; 35 36 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp 37 * is stored in a buffer of registers. Depending on the specific hardware, 38 * this buffer might be shared across multiple PHY ports. 39 * 40 * On transmit of a packet to be timestamped, software is responsible for 41 * selecting an open index. Hardware makes no attempt to lock or prevent 42 * re-use of an index for multiple packets. 43 * 44 * To handle this, timestamp indexes must be tracked by software to ensure 45 * that an index is not re-used for multiple transmitted packets. The 46 * structures and functions declared in this file track the available Tx 47 * register indexes, as well as provide storage for the SKB pointers. 48 * 49 * To allow multiple ports to access the shared register block independently, 50 * the blocks are split up so that indexes are assigned to each port based on 51 * hardware logical port number. 52 */ 53 54 /** 55 * struct ice_tx_tstamp - Tracking for a single Tx timestamp 56 * @skb: pointer to the SKB for this timestamp request 57 * @start: jiffies when the timestamp was first requested 58 * @cached_tstamp: last read timestamp 59 * 60 * This structure tracks a single timestamp request. The SKB pointer is 61 * provided when initiating a request. The start time is used to ensure that 62 * we discard old requests that were not fulfilled within a 2 second time 63 * window. 64 * Timestamp values in the PHY are read only and do not get cleared except at 65 * hardware reset or when a new timestamp value is captured. The cached_tstamp 66 * field is used to detect the case where a new timestamp has not yet been 67 * captured, ensuring that we avoid sending stale timestamp data to the stack. 68 */ 69 struct ice_tx_tstamp { 70 struct sk_buff *skb; 71 unsigned long start; 72 u64 cached_tstamp; 73 }; 74 75 /** 76 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port 77 * @work: work function to handle processing of Tx timestamps 78 * @lock: lock to prevent concurrent write to in_use bitmap 79 * @tstamps: array of len to store outstanding requests 80 * @in_use: bitmap of len to indicate which slots are in use 81 * @quad: which quad the timestamps are captured in 82 * @quad_offset: offset into timestamp block of the quad to get the real index 83 * @len: length of the tstamps and in_use fields. 84 * @init: if true, the tracker is initialized; 85 * @calibrating: if true, the PHY is calibrating the Tx offset. During this 86 * window, timestamps are temporarily disabled. 87 */ 88 struct ice_ptp_tx { 89 struct kthread_work work; 90 spinlock_t lock; /* lock protecting in_use bitmap */ 91 struct ice_tx_tstamp *tstamps; 92 unsigned long *in_use; 93 u8 quad; 94 u8 quad_offset; 95 u8 len; 96 u8 init; 97 u8 calibrating; 98 }; 99 100 /* Quad and port information for initializing timestamp blocks */ 101 #define INDEX_PER_QUAD 64 102 #define INDEX_PER_PORT (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD) 103 104 /** 105 * struct ice_ptp_port - data used to initialize an external port for PTP 106 * 107 * This structure contains data indicating whether a single external port is 108 * ready for PTP functionality. It is used to track the port initialization 109 * and determine when the port's PHY offset is valid. 110 * 111 * @tx: Tx timestamp tracking for this port 112 * @ov_work: delayed work task for tracking when PHY offset is valid 113 * @ps_lock: mutex used to protect the overall PTP PHY start procedure 114 * @link_up: indicates whether the link is up 115 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy 116 * @port_num: the port number this structure represents 117 */ 118 struct ice_ptp_port { 119 struct ice_ptp_tx tx; 120 struct kthread_delayed_work ov_work; 121 struct mutex ps_lock; /* protects overall PTP PHY start procedure */ 122 bool link_up; 123 u8 tx_fifo_busy_cnt; 124 u8 port_num; 125 }; 126 127 #define GLTSYN_TGT_H_IDX_MAX 4 128 129 /** 130 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK 131 * @port: data for the PHY port initialization procedure 132 * @work: delayed work function for periodic tasks 133 * @extts_work: work function for handling external Tx timestamps 134 * @cached_phc_time: a cached copy of the PHC time for timestamp extension 135 * @ext_ts_chan: the external timestamp channel in use 136 * @ext_ts_irq: the external timestamp IRQ in use 137 * @kworker: kwork thread for handling periodic work 138 * @perout_channels: periodic output data 139 * @info: structure defining PTP hardware capabilities 140 * @clock: pointer to registered PTP clock device 141 * @tstamp_config: hardware timestamping configuration 142 * @reset_time: kernel time after clock stop on reset 143 */ 144 struct ice_ptp { 145 struct ice_ptp_port port; 146 struct kthread_delayed_work work; 147 struct kthread_work extts_work; 148 u64 cached_phc_time; 149 u8 ext_ts_chan; 150 u8 ext_ts_irq; 151 struct kthread_worker *kworker; 152 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX]; 153 struct ptp_clock_info info; 154 struct ptp_clock *clock; 155 struct hwtstamp_config tstamp_config; 156 u64 reset_time; 157 }; 158 159 #define __ptp_port_to_ptp(p) \ 160 container_of((p), struct ice_ptp, port) 161 #define ptp_port_to_pf(p) \ 162 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp) 163 164 #define __ptp_info_to_ptp(i) \ 165 container_of((i), struct ice_ptp, info) 166 #define ptp_info_to_pf(i) \ 167 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp) 168 169 #define PFTSYN_SEM_BYTES 4 170 #define PTP_SHARED_CLK_IDX_VALID BIT(31) 171 #define TS_CMD_MASK 0xF 172 #define SYNC_EXEC_CMD 0x3 173 #define ICE_PTP_TS_VALID BIT(0) 174 175 #define FIFO_EMPTY BIT(2) 176 #define FIFO_OK 0xFF 177 #define ICE_PTP_FIFO_NUM_CHECKS 5 178 /* Per-channel register definitions */ 179 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) 180 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) 181 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) 182 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) 183 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) 184 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) 185 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) 186 #define GLTSYN_EVNT_H_IDX_MAX 3 187 188 /* Pin definitions for PTP PPS out */ 189 #define PPS_CLK_GEN_CHAN 3 190 #define PPS_CLK_SRC_CHAN 2 191 #define PPS_PIN_INDEX 5 192 #define TIME_SYNC_PIN_INDEX 4 193 #define N_EXT_TS_E810 3 194 #define N_PER_OUT_E810 4 195 #define N_PER_OUT_E810T 3 196 #define N_PER_OUT_E810T_NO_SMA 2 197 #define N_EXT_TS_E810_NO_SMA 2 198 #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4)) 199 200 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 201 struct ice_pf; 202 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); 203 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); 204 void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); 205 int ice_get_ptp_clock_index(struct ice_pf *pf); 206 207 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); 208 void ice_ptp_process_ts(struct ice_pf *pf); 209 210 void 211 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, 212 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); 213 void ice_ptp_reset(struct ice_pf *pf); 214 void ice_ptp_prepare_for_reset(struct ice_pf *pf); 215 void ice_ptp_init(struct ice_pf *pf); 216 void ice_ptp_release(struct ice_pf *pf); 217 int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); 218 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 219 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) 220 { 221 return -EOPNOTSUPP; 222 } 223 224 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) 225 { 226 return -EOPNOTSUPP; 227 } 228 229 static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } 230 static inline int ice_get_ptp_clock_index(struct ice_pf *pf) 231 { 232 return -1; 233 } 234 235 static inline s8 236 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) 237 { 238 return -1; 239 } 240 241 static inline void ice_ptp_process_ts(struct ice_pf *pf) { } 242 static inline void 243 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, 244 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } 245 static inline void ice_ptp_reset(struct ice_pf *pf) { } 246 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { } 247 static inline void ice_ptp_init(struct ice_pf *pf) { } 248 static inline void ice_ptp_release(struct ice_pf *pf) { } 249 static inline int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) 250 { return 0; } 251 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 252 #endif /* _ICE_PTP_H_ */ 253