1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice.h" 5 #include "ice_base.h" 6 #include "ice_flow.h" 7 #include "ice_lib.h" 8 #include "ice_fltr.h" 9 #include "ice_dcb_lib.h" 10 #include "ice_devlink.h" 11 #include "ice_vsi_vlan_ops.h" 12 13 /** 14 * ice_vsi_type_str - maps VSI type enum to string equivalents 15 * @vsi_type: VSI type enum 16 */ 17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type) 18 { 19 switch (vsi_type) { 20 case ICE_VSI_PF: 21 return "ICE_VSI_PF"; 22 case ICE_VSI_VF: 23 return "ICE_VSI_VF"; 24 case ICE_VSI_CTRL: 25 return "ICE_VSI_CTRL"; 26 case ICE_VSI_CHNL: 27 return "ICE_VSI_CHNL"; 28 case ICE_VSI_LB: 29 return "ICE_VSI_LB"; 30 case ICE_VSI_SWITCHDEV_CTRL: 31 return "ICE_VSI_SWITCHDEV_CTRL"; 32 default: 33 return "unknown"; 34 } 35 } 36 37 /** 38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings 39 * @vsi: the VSI being configured 40 * @ena: start or stop the Rx rings 41 * 42 * First enable/disable all of the Rx rings, flush any remaining writes, and 43 * then verify that they have all been enabled/disabled successfully. This will 44 * let all of the register writes complete when enabling/disabling the Rx rings 45 * before waiting for the change in hardware to complete. 46 */ 47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena) 48 { 49 int ret = 0; 50 u16 i; 51 52 ice_for_each_rxq(vsi, i) 53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false); 54 55 ice_flush(&vsi->back->hw); 56 57 ice_for_each_rxq(vsi, i) { 58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i); 59 if (ret) 60 break; 61 } 62 63 return ret; 64 } 65 66 /** 67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI 68 * @vsi: VSI pointer 69 * 70 * On error: returns error code (negative) 71 * On success: returns 0 72 */ 73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi) 74 { 75 struct ice_pf *pf = vsi->back; 76 struct device *dev; 77 78 dev = ice_pf_to_dev(pf); 79 if (vsi->type == ICE_VSI_CHNL) 80 return 0; 81 82 /* allocate memory for both Tx and Rx ring pointers */ 83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, 84 sizeof(*vsi->tx_rings), GFP_KERNEL); 85 if (!vsi->tx_rings) 86 return -ENOMEM; 87 88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq, 89 sizeof(*vsi->rx_rings), GFP_KERNEL); 90 if (!vsi->rx_rings) 91 goto err_rings; 92 93 /* txq_map needs to have enough space to track both Tx (stack) rings 94 * and XDP rings; at this point vsi->num_xdp_txq might not be set, 95 * so use num_possible_cpus() as we want to always provide XDP ring 96 * per CPU, regardless of queue count settings from user that might 97 * have come from ethtool's set_channels() callback; 98 */ 99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()), 100 sizeof(*vsi->txq_map), GFP_KERNEL); 101 102 if (!vsi->txq_map) 103 goto err_txq_map; 104 105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq, 106 sizeof(*vsi->rxq_map), GFP_KERNEL); 107 if (!vsi->rxq_map) 108 goto err_rxq_map; 109 110 /* There is no need to allocate q_vectors for a loopback VSI. */ 111 if (vsi->type == ICE_VSI_LB) 112 return 0; 113 114 /* allocate memory for q_vector pointers */ 115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors, 116 sizeof(*vsi->q_vectors), GFP_KERNEL); 117 if (!vsi->q_vectors) 118 goto err_vectors; 119 120 vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL); 121 if (!vsi->af_xdp_zc_qps) 122 goto err_zc_qps; 123 124 return 0; 125 126 err_zc_qps: 127 devm_kfree(dev, vsi->q_vectors); 128 err_vectors: 129 devm_kfree(dev, vsi->rxq_map); 130 err_rxq_map: 131 devm_kfree(dev, vsi->txq_map); 132 err_txq_map: 133 devm_kfree(dev, vsi->rx_rings); 134 err_rings: 135 devm_kfree(dev, vsi->tx_rings); 136 return -ENOMEM; 137 } 138 139 /** 140 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI 141 * @vsi: the VSI being configured 142 */ 143 static void ice_vsi_set_num_desc(struct ice_vsi *vsi) 144 { 145 switch (vsi->type) { 146 case ICE_VSI_PF: 147 case ICE_VSI_SWITCHDEV_CTRL: 148 case ICE_VSI_CTRL: 149 case ICE_VSI_LB: 150 /* a user could change the values of num_[tr]x_desc using 151 * ethtool -G so we should keep those values instead of 152 * overwriting them with the defaults. 153 */ 154 if (!vsi->num_rx_desc) 155 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC; 156 if (!vsi->num_tx_desc) 157 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC; 158 break; 159 default: 160 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n", 161 vsi->type); 162 break; 163 } 164 } 165 166 /** 167 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI 168 * @vsi: the VSI being configured 169 * @vf: the VF associated with this VSI, if any 170 * 171 * Return 0 on success and a negative value on error 172 */ 173 static void ice_vsi_set_num_qs(struct ice_vsi *vsi, struct ice_vf *vf) 174 { 175 enum ice_vsi_type vsi_type = vsi->type; 176 struct ice_pf *pf = vsi->back; 177 178 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 179 return; 180 181 switch (vsi_type) { 182 case ICE_VSI_PF: 183 if (vsi->req_txq) { 184 vsi->alloc_txq = vsi->req_txq; 185 vsi->num_txq = vsi->req_txq; 186 } else { 187 vsi->alloc_txq = min3(pf->num_lan_msix, 188 ice_get_avail_txq_count(pf), 189 (u16)num_online_cpus()); 190 } 191 192 pf->num_lan_tx = vsi->alloc_txq; 193 194 /* only 1 Rx queue unless RSS is enabled */ 195 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 196 vsi->alloc_rxq = 1; 197 } else { 198 if (vsi->req_rxq) { 199 vsi->alloc_rxq = vsi->req_rxq; 200 vsi->num_rxq = vsi->req_rxq; 201 } else { 202 vsi->alloc_rxq = min3(pf->num_lan_msix, 203 ice_get_avail_rxq_count(pf), 204 (u16)num_online_cpus()); 205 } 206 } 207 208 pf->num_lan_rx = vsi->alloc_rxq; 209 210 vsi->num_q_vectors = min_t(int, pf->num_lan_msix, 211 max_t(int, vsi->alloc_rxq, 212 vsi->alloc_txq)); 213 break; 214 case ICE_VSI_SWITCHDEV_CTRL: 215 /* The number of queues for ctrl VSI is equal to number of VFs. 216 * Each ring is associated to the corresponding VF_PR netdev. 217 */ 218 vsi->alloc_txq = ice_get_num_vfs(pf); 219 vsi->alloc_rxq = vsi->alloc_txq; 220 vsi->num_q_vectors = 1; 221 break; 222 case ICE_VSI_VF: 223 if (vf->num_req_qs) 224 vf->num_vf_qs = vf->num_req_qs; 225 vsi->alloc_txq = vf->num_vf_qs; 226 vsi->alloc_rxq = vf->num_vf_qs; 227 /* pf->vfs.num_msix_per includes (VF miscellaneous vector + 228 * data queue interrupts). Since vsi->num_q_vectors is number 229 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the 230 * original vector count 231 */ 232 vsi->num_q_vectors = pf->vfs.num_msix_per - ICE_NONQ_VECS_VF; 233 break; 234 case ICE_VSI_CTRL: 235 vsi->alloc_txq = 1; 236 vsi->alloc_rxq = 1; 237 vsi->num_q_vectors = 1; 238 break; 239 case ICE_VSI_CHNL: 240 vsi->alloc_txq = 0; 241 vsi->alloc_rxq = 0; 242 break; 243 case ICE_VSI_LB: 244 vsi->alloc_txq = 1; 245 vsi->alloc_rxq = 1; 246 break; 247 default: 248 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type); 249 break; 250 } 251 252 ice_vsi_set_num_desc(vsi); 253 } 254 255 /** 256 * ice_get_free_slot - get the next non-NULL location index in array 257 * @array: array to search 258 * @size: size of the array 259 * @curr: last known occupied index to be used as a search hint 260 * 261 * void * is being used to keep the functionality generic. This lets us use this 262 * function on any array of pointers. 263 */ 264 static int ice_get_free_slot(void *array, int size, int curr) 265 { 266 int **tmp_array = (int **)array; 267 int next; 268 269 if (curr < (size - 1) && !tmp_array[curr + 1]) { 270 next = curr + 1; 271 } else { 272 int i = 0; 273 274 while ((i < size) && (tmp_array[i])) 275 i++; 276 if (i == size) 277 next = ICE_NO_VSI; 278 else 279 next = i; 280 } 281 return next; 282 } 283 284 /** 285 * ice_vsi_delete - delete a VSI from the switch 286 * @vsi: pointer to VSI being removed 287 */ 288 void ice_vsi_delete(struct ice_vsi *vsi) 289 { 290 struct ice_pf *pf = vsi->back; 291 struct ice_vsi_ctx *ctxt; 292 int status; 293 294 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 295 if (!ctxt) 296 return; 297 298 if (vsi->type == ICE_VSI_VF) 299 ctxt->vf_num = vsi->vf->vf_id; 300 ctxt->vsi_num = vsi->vsi_num; 301 302 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info)); 303 304 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL); 305 if (status) 306 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n", 307 vsi->vsi_num, status); 308 309 kfree(ctxt); 310 } 311 312 /** 313 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI 314 * @vsi: pointer to VSI being cleared 315 */ 316 static void ice_vsi_free_arrays(struct ice_vsi *vsi) 317 { 318 struct ice_pf *pf = vsi->back; 319 struct device *dev; 320 321 dev = ice_pf_to_dev(pf); 322 323 if (vsi->af_xdp_zc_qps) { 324 bitmap_free(vsi->af_xdp_zc_qps); 325 vsi->af_xdp_zc_qps = NULL; 326 } 327 /* free the ring and vector containers */ 328 if (vsi->q_vectors) { 329 devm_kfree(dev, vsi->q_vectors); 330 vsi->q_vectors = NULL; 331 } 332 if (vsi->tx_rings) { 333 devm_kfree(dev, vsi->tx_rings); 334 vsi->tx_rings = NULL; 335 } 336 if (vsi->rx_rings) { 337 devm_kfree(dev, vsi->rx_rings); 338 vsi->rx_rings = NULL; 339 } 340 if (vsi->txq_map) { 341 devm_kfree(dev, vsi->txq_map); 342 vsi->txq_map = NULL; 343 } 344 if (vsi->rxq_map) { 345 devm_kfree(dev, vsi->rxq_map); 346 vsi->rxq_map = NULL; 347 } 348 } 349 350 /** 351 * ice_vsi_clear - clean up and deallocate the provided VSI 352 * @vsi: pointer to VSI being cleared 353 * 354 * This deallocates the VSI's queue resources, removes it from the PF's 355 * VSI array if necessary, and deallocates the VSI 356 * 357 * Returns 0 on success, negative on failure 358 */ 359 int ice_vsi_clear(struct ice_vsi *vsi) 360 { 361 struct ice_pf *pf = NULL; 362 struct device *dev; 363 364 if (!vsi) 365 return 0; 366 367 if (!vsi->back) 368 return -EINVAL; 369 370 pf = vsi->back; 371 dev = ice_pf_to_dev(pf); 372 373 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) { 374 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx); 375 return -EINVAL; 376 } 377 378 mutex_lock(&pf->sw_mutex); 379 /* updates the PF for this cleared VSI */ 380 381 pf->vsi[vsi->idx] = NULL; 382 if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL) 383 pf->next_vsi = vsi->idx; 384 if (vsi->idx < pf->next_vsi && vsi->type == ICE_VSI_CTRL && vsi->vf) 385 pf->next_vsi = vsi->idx; 386 387 ice_vsi_free_arrays(vsi); 388 mutex_unlock(&pf->sw_mutex); 389 devm_kfree(dev, vsi); 390 391 return 0; 392 } 393 394 /** 395 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI 396 * @irq: interrupt number 397 * @data: pointer to a q_vector 398 */ 399 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data) 400 { 401 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 402 403 if (!q_vector->tx.tx_ring) 404 return IRQ_HANDLED; 405 406 #define FDIR_RX_DESC_CLEAN_BUDGET 64 407 ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET); 408 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring); 409 410 return IRQ_HANDLED; 411 } 412 413 /** 414 * ice_msix_clean_rings - MSIX mode Interrupt Handler 415 * @irq: interrupt number 416 * @data: pointer to a q_vector 417 */ 418 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data) 419 { 420 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 421 422 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 423 return IRQ_HANDLED; 424 425 q_vector->total_events++; 426 427 napi_schedule(&q_vector->napi); 428 429 return IRQ_HANDLED; 430 } 431 432 static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data) 433 { 434 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 435 struct ice_pf *pf = q_vector->vsi->back; 436 struct ice_vf *vf; 437 unsigned int bkt; 438 439 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 440 return IRQ_HANDLED; 441 442 rcu_read_lock(); 443 ice_for_each_vf_rcu(pf, bkt, vf) 444 napi_schedule(&vf->repr->q_vector->napi); 445 rcu_read_unlock(); 446 447 return IRQ_HANDLED; 448 } 449 450 /** 451 * ice_vsi_alloc - Allocates the next available struct VSI in the PF 452 * @pf: board private structure 453 * @vsi_type: type of VSI 454 * @ch: ptr to channel 455 * @vf: VF for ICE_VSI_VF and ICE_VSI_CTRL 456 * 457 * The VF pointer is used for ICE_VSI_VF and ICE_VSI_CTRL. For ICE_VSI_CTRL, 458 * it may be NULL in the case there is no association with a VF. For 459 * ICE_VSI_VF the VF pointer *must not* be NULL. 460 * 461 * returns a pointer to a VSI on success, NULL on failure. 462 */ 463 static struct ice_vsi * 464 ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type, 465 struct ice_channel *ch, struct ice_vf *vf) 466 { 467 struct device *dev = ice_pf_to_dev(pf); 468 struct ice_vsi *vsi = NULL; 469 470 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 471 return NULL; 472 473 /* Need to protect the allocation of the VSIs at the PF level */ 474 mutex_lock(&pf->sw_mutex); 475 476 /* If we have already allocated our maximum number of VSIs, 477 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index 478 * is available to be populated 479 */ 480 if (pf->next_vsi == ICE_NO_VSI) { 481 dev_dbg(dev, "out of VSI slots!\n"); 482 goto unlock_pf; 483 } 484 485 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL); 486 if (!vsi) 487 goto unlock_pf; 488 489 vsi->type = vsi_type; 490 vsi->back = pf; 491 set_bit(ICE_VSI_DOWN, vsi->state); 492 493 if (vsi_type == ICE_VSI_VF) 494 ice_vsi_set_num_qs(vsi, vf); 495 else if (vsi_type != ICE_VSI_CHNL) 496 ice_vsi_set_num_qs(vsi, NULL); 497 498 switch (vsi->type) { 499 case ICE_VSI_SWITCHDEV_CTRL: 500 if (ice_vsi_alloc_arrays(vsi)) 501 goto err_rings; 502 503 /* Setup eswitch MSIX irq handler for VSI */ 504 vsi->irq_handler = ice_eswitch_msix_clean_rings; 505 break; 506 case ICE_VSI_PF: 507 if (ice_vsi_alloc_arrays(vsi)) 508 goto err_rings; 509 510 /* Setup default MSIX irq handler for VSI */ 511 vsi->irq_handler = ice_msix_clean_rings; 512 break; 513 case ICE_VSI_CTRL: 514 if (ice_vsi_alloc_arrays(vsi)) 515 goto err_rings; 516 517 /* Setup ctrl VSI MSIX irq handler */ 518 vsi->irq_handler = ice_msix_clean_ctrl_vsi; 519 520 /* For the PF control VSI this is NULL, for the VF control VSI 521 * this will be the first VF to allocate it. 522 */ 523 vsi->vf = vf; 524 break; 525 case ICE_VSI_VF: 526 if (ice_vsi_alloc_arrays(vsi)) 527 goto err_rings; 528 vsi->vf = vf; 529 break; 530 case ICE_VSI_CHNL: 531 if (!ch) 532 goto err_rings; 533 vsi->num_rxq = ch->num_rxq; 534 vsi->num_txq = ch->num_txq; 535 vsi->next_base_q = ch->base_q; 536 break; 537 case ICE_VSI_LB: 538 if (ice_vsi_alloc_arrays(vsi)) 539 goto err_rings; 540 break; 541 default: 542 dev_warn(dev, "Unknown VSI type %d\n", vsi->type); 543 goto unlock_pf; 544 } 545 546 if (vsi->type == ICE_VSI_CTRL && !vf) { 547 /* Use the last VSI slot as the index for PF control VSI */ 548 vsi->idx = pf->num_alloc_vsi - 1; 549 pf->ctrl_vsi_idx = vsi->idx; 550 pf->vsi[vsi->idx] = vsi; 551 } else { 552 /* fill slot and make note of the index */ 553 vsi->idx = pf->next_vsi; 554 pf->vsi[pf->next_vsi] = vsi; 555 556 /* prepare pf->next_vsi for next use */ 557 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi, 558 pf->next_vsi); 559 } 560 561 if (vsi->type == ICE_VSI_CTRL && vf) 562 vf->ctrl_vsi_idx = vsi->idx; 563 goto unlock_pf; 564 565 err_rings: 566 devm_kfree(dev, vsi); 567 vsi = NULL; 568 unlock_pf: 569 mutex_unlock(&pf->sw_mutex); 570 return vsi; 571 } 572 573 /** 574 * ice_alloc_fd_res - Allocate FD resource for a VSI 575 * @vsi: pointer to the ice_vsi 576 * 577 * This allocates the FD resources 578 * 579 * Returns 0 on success, -EPERM on no-op or -EIO on failure 580 */ 581 static int ice_alloc_fd_res(struct ice_vsi *vsi) 582 { 583 struct ice_pf *pf = vsi->back; 584 u32 g_val, b_val; 585 586 /* Flow Director filters are only allocated/assigned to the PF VSI or 587 * CHNL VSI which passes the traffic. The CTRL VSI is only used to 588 * add/delete filters so resources are not allocated to it 589 */ 590 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags)) 591 return -EPERM; 592 593 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF || 594 vsi->type == ICE_VSI_CHNL)) 595 return -EPERM; 596 597 /* FD filters from guaranteed pool per VSI */ 598 g_val = pf->hw.func_caps.fd_fltr_guar; 599 if (!g_val) 600 return -EPERM; 601 602 /* FD filters from best effort pool */ 603 b_val = pf->hw.func_caps.fd_fltr_best_effort; 604 if (!b_val) 605 return -EPERM; 606 607 /* PF main VSI gets only 64 FD resources from guaranteed pool 608 * when ADQ is configured. 609 */ 610 #define ICE_PF_VSI_GFLTR 64 611 612 /* determine FD filter resources per VSI from shared(best effort) and 613 * dedicated pool 614 */ 615 if (vsi->type == ICE_VSI_PF) { 616 vsi->num_gfltr = g_val; 617 /* if MQPRIO is configured, main VSI doesn't get all FD 618 * resources from guaranteed pool. PF VSI gets 64 FD resources 619 */ 620 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) { 621 if (g_val < ICE_PF_VSI_GFLTR) 622 return -EPERM; 623 /* allow bare minimum entries for PF VSI */ 624 vsi->num_gfltr = ICE_PF_VSI_GFLTR; 625 } 626 627 /* each VSI gets same "best_effort" quota */ 628 vsi->num_bfltr = b_val; 629 } else if (vsi->type == ICE_VSI_VF) { 630 vsi->num_gfltr = 0; 631 632 /* each VSI gets same "best_effort" quota */ 633 vsi->num_bfltr = b_val; 634 } else { 635 struct ice_vsi *main_vsi; 636 int numtc; 637 638 main_vsi = ice_get_main_vsi(pf); 639 if (!main_vsi) 640 return -EPERM; 641 642 if (!main_vsi->all_numtc) 643 return -EINVAL; 644 645 /* figure out ADQ numtc */ 646 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC; 647 648 /* only one TC but still asking resources for channels, 649 * invalid config 650 */ 651 if (numtc < ICE_CHNL_START_TC) 652 return -EPERM; 653 654 g_val -= ICE_PF_VSI_GFLTR; 655 /* channel VSIs gets equal share from guaranteed pool */ 656 vsi->num_gfltr = g_val / numtc; 657 658 /* each VSI gets same "best_effort" quota */ 659 vsi->num_bfltr = b_val; 660 } 661 662 return 0; 663 } 664 665 /** 666 * ice_vsi_get_qs - Assign queues from PF to VSI 667 * @vsi: the VSI to assign queues to 668 * 669 * Returns 0 on success and a negative value on error 670 */ 671 static int ice_vsi_get_qs(struct ice_vsi *vsi) 672 { 673 struct ice_pf *pf = vsi->back; 674 struct ice_qs_cfg tx_qs_cfg = { 675 .qs_mutex = &pf->avail_q_mutex, 676 .pf_map = pf->avail_txqs, 677 .pf_map_size = pf->max_pf_txqs, 678 .q_count = vsi->alloc_txq, 679 .scatter_count = ICE_MAX_SCATTER_TXQS, 680 .vsi_map = vsi->txq_map, 681 .vsi_map_offset = 0, 682 .mapping_mode = ICE_VSI_MAP_CONTIG 683 }; 684 struct ice_qs_cfg rx_qs_cfg = { 685 .qs_mutex = &pf->avail_q_mutex, 686 .pf_map = pf->avail_rxqs, 687 .pf_map_size = pf->max_pf_rxqs, 688 .q_count = vsi->alloc_rxq, 689 .scatter_count = ICE_MAX_SCATTER_RXQS, 690 .vsi_map = vsi->rxq_map, 691 .vsi_map_offset = 0, 692 .mapping_mode = ICE_VSI_MAP_CONTIG 693 }; 694 int ret; 695 696 if (vsi->type == ICE_VSI_CHNL) 697 return 0; 698 699 ret = __ice_vsi_get_qs(&tx_qs_cfg); 700 if (ret) 701 return ret; 702 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode; 703 704 ret = __ice_vsi_get_qs(&rx_qs_cfg); 705 if (ret) 706 return ret; 707 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode; 708 709 return 0; 710 } 711 712 /** 713 * ice_vsi_put_qs - Release queues from VSI to PF 714 * @vsi: the VSI that is going to release queues 715 */ 716 static void ice_vsi_put_qs(struct ice_vsi *vsi) 717 { 718 struct ice_pf *pf = vsi->back; 719 int i; 720 721 mutex_lock(&pf->avail_q_mutex); 722 723 ice_for_each_alloc_txq(vsi, i) { 724 clear_bit(vsi->txq_map[i], pf->avail_txqs); 725 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; 726 } 727 728 ice_for_each_alloc_rxq(vsi, i) { 729 clear_bit(vsi->rxq_map[i], pf->avail_rxqs); 730 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX; 731 } 732 733 mutex_unlock(&pf->avail_q_mutex); 734 } 735 736 /** 737 * ice_is_safe_mode 738 * @pf: pointer to the PF struct 739 * 740 * returns true if driver is in safe mode, false otherwise 741 */ 742 bool ice_is_safe_mode(struct ice_pf *pf) 743 { 744 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags); 745 } 746 747 /** 748 * ice_is_rdma_ena 749 * @pf: pointer to the PF struct 750 * 751 * returns true if RDMA is currently supported, false otherwise 752 */ 753 bool ice_is_rdma_ena(struct ice_pf *pf) 754 { 755 return test_bit(ICE_FLAG_RDMA_ENA, pf->flags); 756 } 757 758 /** 759 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration 760 * @vsi: the VSI being cleaned up 761 * 762 * This function deletes RSS input set for all flows that were configured 763 * for this VSI 764 */ 765 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi) 766 { 767 struct ice_pf *pf = vsi->back; 768 int status; 769 770 if (ice_is_safe_mode(pf)) 771 return; 772 773 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx); 774 if (status) 775 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n", 776 vsi->vsi_num, status); 777 } 778 779 /** 780 * ice_rss_clean - Delete RSS related VSI structures and configuration 781 * @vsi: the VSI being removed 782 */ 783 static void ice_rss_clean(struct ice_vsi *vsi) 784 { 785 struct ice_pf *pf = vsi->back; 786 struct device *dev; 787 788 dev = ice_pf_to_dev(pf); 789 790 if (vsi->rss_hkey_user) 791 devm_kfree(dev, vsi->rss_hkey_user); 792 if (vsi->rss_lut_user) 793 devm_kfree(dev, vsi->rss_lut_user); 794 795 ice_vsi_clean_rss_flow_fld(vsi); 796 /* remove RSS replay list */ 797 if (!ice_is_safe_mode(pf)) 798 ice_rem_vsi_rss_list(&pf->hw, vsi->idx); 799 } 800 801 /** 802 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type 803 * @vsi: the VSI being configured 804 */ 805 static void ice_vsi_set_rss_params(struct ice_vsi *vsi) 806 { 807 struct ice_hw_common_caps *cap; 808 struct ice_pf *pf = vsi->back; 809 810 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 811 vsi->rss_size = 1; 812 return; 813 } 814 815 cap = &pf->hw.func_caps.common_cap; 816 switch (vsi->type) { 817 case ICE_VSI_CHNL: 818 case ICE_VSI_PF: 819 /* PF VSI will inherit RSS instance of PF */ 820 vsi->rss_table_size = (u16)cap->rss_table_size; 821 if (vsi->type == ICE_VSI_CHNL) 822 vsi->rss_size = min_t(u16, vsi->num_rxq, 823 BIT(cap->rss_table_entry_width)); 824 else 825 vsi->rss_size = min_t(u16, num_online_cpus(), 826 BIT(cap->rss_table_entry_width)); 827 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF; 828 break; 829 case ICE_VSI_SWITCHDEV_CTRL: 830 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE; 831 vsi->rss_size = min_t(u16, num_online_cpus(), 832 BIT(cap->rss_table_entry_width)); 833 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI; 834 break; 835 case ICE_VSI_VF: 836 /* VF VSI will get a small RSS table. 837 * For VSI_LUT, LUT size should be set to 64 bytes. 838 */ 839 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE; 840 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF; 841 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI; 842 break; 843 case ICE_VSI_LB: 844 break; 845 default: 846 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n", 847 ice_vsi_type_str(vsi->type)); 848 break; 849 } 850 } 851 852 /** 853 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI 854 * @hw: HW structure used to determine the VLAN mode of the device 855 * @ctxt: the VSI context being set 856 * 857 * This initializes a default VSI context for all sections except the Queues. 858 */ 859 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt) 860 { 861 u32 table = 0; 862 863 memset(&ctxt->info, 0, sizeof(ctxt->info)); 864 /* VSI's should be allocated from shared pool */ 865 ctxt->alloc_from_pool = true; 866 /* Src pruning enabled by default */ 867 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE; 868 /* Traffic from VSI can be sent to LAN */ 869 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; 870 /* allow all untagged/tagged packets by default on Tx */ 871 ctxt->info.inner_vlan_flags = ((ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL & 872 ICE_AQ_VSI_INNER_VLAN_TX_MODE_M) >> 873 ICE_AQ_VSI_INNER_VLAN_TX_MODE_S); 874 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which 875 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor. 876 * 877 * DVM - leave inner VLAN in packet by default 878 */ 879 if (ice_is_dvm_ena(hw)) { 880 ctxt->info.inner_vlan_flags |= 881 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING; 882 ctxt->info.outer_vlan_flags = 883 (ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL << 884 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) & 885 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M; 886 ctxt->info.outer_vlan_flags |= 887 (ICE_AQ_VSI_OUTER_TAG_VLAN_8100 << 888 ICE_AQ_VSI_OUTER_TAG_TYPE_S) & 889 ICE_AQ_VSI_OUTER_TAG_TYPE_M; 890 } 891 /* Have 1:1 UP mapping for both ingress/egress tables */ 892 table |= ICE_UP_TABLE_TRANSLATE(0, 0); 893 table |= ICE_UP_TABLE_TRANSLATE(1, 1); 894 table |= ICE_UP_TABLE_TRANSLATE(2, 2); 895 table |= ICE_UP_TABLE_TRANSLATE(3, 3); 896 table |= ICE_UP_TABLE_TRANSLATE(4, 4); 897 table |= ICE_UP_TABLE_TRANSLATE(5, 5); 898 table |= ICE_UP_TABLE_TRANSLATE(6, 6); 899 table |= ICE_UP_TABLE_TRANSLATE(7, 7); 900 ctxt->info.ingress_table = cpu_to_le32(table); 901 ctxt->info.egress_table = cpu_to_le32(table); 902 /* Have 1:1 UP mapping for outer to inner UP table */ 903 ctxt->info.outer_up_table = cpu_to_le32(table); 904 /* No Outer tag support outer_tag_flags remains to zero */ 905 } 906 907 /** 908 * ice_vsi_setup_q_map - Setup a VSI queue map 909 * @vsi: the VSI being configured 910 * @ctxt: VSI context structure 911 */ 912 static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 913 { 914 u16 offset = 0, qmap = 0, tx_count = 0, pow = 0; 915 u16 num_txq_per_tc, num_rxq_per_tc; 916 u16 qcount_tx = vsi->alloc_txq; 917 u16 qcount_rx = vsi->alloc_rxq; 918 u8 netdev_tc = 0; 919 int i; 920 921 if (!vsi->tc_cfg.numtc) { 922 /* at least TC0 should be enabled by default */ 923 vsi->tc_cfg.numtc = 1; 924 vsi->tc_cfg.ena_tc = 1; 925 } 926 927 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); 928 if (!num_rxq_per_tc) 929 num_rxq_per_tc = 1; 930 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; 931 if (!num_txq_per_tc) 932 num_txq_per_tc = 1; 933 934 /* find the (rounded up) power-of-2 of qcount */ 935 pow = (u16)order_base_2(num_rxq_per_tc); 936 937 /* TC mapping is a function of the number of Rx queues assigned to the 938 * VSI for each traffic class and the offset of these queues. 939 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of 940 * queues allocated to TC0. No:of queues is a power-of-2. 941 * 942 * If TC is not enabled, the queue offset is set to 0, and allocate one 943 * queue, this way, traffic for the given TC will be sent to the default 944 * queue. 945 * 946 * Setup number and offset of Rx queues for all TCs for the VSI 947 */ 948 ice_for_each_traffic_class(i) { 949 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 950 /* TC is not enabled */ 951 vsi->tc_cfg.tc_info[i].qoffset = 0; 952 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 953 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 954 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 955 ctxt->info.tc_mapping[i] = 0; 956 continue; 957 } 958 959 /* TC is enabled */ 960 vsi->tc_cfg.tc_info[i].qoffset = offset; 961 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc; 962 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc; 963 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 964 965 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) & 966 ICE_AQ_VSI_TC_Q_OFFSET_M) | 967 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) & 968 ICE_AQ_VSI_TC_Q_NUM_M); 969 offset += num_rxq_per_tc; 970 tx_count += num_txq_per_tc; 971 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 972 } 973 974 /* if offset is non-zero, means it is calculated correctly based on 975 * enabled TCs for a given VSI otherwise qcount_rx will always 976 * be correct and non-zero because it is based off - VSI's 977 * allocated Rx queues which is at least 1 (hence qcount_tx will be 978 * at least 1) 979 */ 980 if (offset) 981 vsi->num_rxq = offset; 982 else 983 vsi->num_rxq = num_rxq_per_tc; 984 985 vsi->num_txq = tx_count; 986 987 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) { 988 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n"); 989 /* since there is a chance that num_rxq could have been changed 990 * in the above for loop, make num_txq equal to num_rxq. 991 */ 992 vsi->num_txq = vsi->num_rxq; 993 } 994 995 /* Rx queue mapping */ 996 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 997 /* q_mapping buffer holds the info for the first queue allocated for 998 * this VSI in the PF space and also the number of queues associated 999 * with this VSI. 1000 */ 1001 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 1002 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq); 1003 } 1004 1005 /** 1006 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI 1007 * @ctxt: the VSI context being set 1008 * @vsi: the VSI being configured 1009 */ 1010 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1011 { 1012 u8 dflt_q_group, dflt_q_prio; 1013 u16 dflt_q, report_q, val; 1014 1015 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL && 1016 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL) 1017 return; 1018 1019 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; 1020 ctxt->info.valid_sections |= cpu_to_le16(val); 1021 dflt_q = 0; 1022 dflt_q_group = 0; 1023 report_q = 0; 1024 dflt_q_prio = 0; 1025 1026 /* enable flow director filtering/programming */ 1027 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; 1028 ctxt->info.fd_options = cpu_to_le16(val); 1029 /* max of allocated flow director filters */ 1030 ctxt->info.max_fd_fltr_dedicated = 1031 cpu_to_le16(vsi->num_gfltr); 1032 /* max of shared flow director filters any VSI may program */ 1033 ctxt->info.max_fd_fltr_shared = 1034 cpu_to_le16(vsi->num_bfltr); 1035 /* default queue index within the VSI of the default FD */ 1036 val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) & 1037 ICE_AQ_VSI_FD_DEF_Q_M); 1038 /* target queue or queue group to the FD filter */ 1039 val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) & 1040 ICE_AQ_VSI_FD_DEF_GRP_M); 1041 ctxt->info.fd_def_q = cpu_to_le16(val); 1042 /* queue index on which FD filter completion is reported */ 1043 val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) & 1044 ICE_AQ_VSI_FD_REPORT_Q_M); 1045 /* priority of the default qindex action */ 1046 val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) & 1047 ICE_AQ_VSI_FD_DEF_PRIORITY_M); 1048 ctxt->info.fd_report_opt = cpu_to_le16(val); 1049 } 1050 1051 /** 1052 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI 1053 * @ctxt: the VSI context being set 1054 * @vsi: the VSI being configured 1055 */ 1056 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1057 { 1058 u8 lut_type, hash_type; 1059 struct device *dev; 1060 struct ice_pf *pf; 1061 1062 pf = vsi->back; 1063 dev = ice_pf_to_dev(pf); 1064 1065 switch (vsi->type) { 1066 case ICE_VSI_CHNL: 1067 case ICE_VSI_PF: 1068 /* PF VSI will inherit RSS instance of PF */ 1069 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF; 1070 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ; 1071 break; 1072 case ICE_VSI_VF: 1073 /* VF VSI will gets a small RSS table which is a VSI LUT type */ 1074 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI; 1075 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ; 1076 break; 1077 default: 1078 dev_dbg(dev, "Unsupported VSI type %s\n", 1079 ice_vsi_type_str(vsi->type)); 1080 return; 1081 } 1082 1083 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) & 1084 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) | 1085 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) & 1086 ICE_AQ_VSI_Q_OPT_RSS_HASH_M); 1087 } 1088 1089 static void 1090 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1091 { 1092 struct ice_pf *pf = vsi->back; 1093 u16 qcount, qmap; 1094 u8 offset = 0; 1095 int pow; 1096 1097 qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix); 1098 1099 pow = order_base_2(qcount); 1100 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) & 1101 ICE_AQ_VSI_TC_Q_OFFSET_M) | 1102 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) & 1103 ICE_AQ_VSI_TC_Q_NUM_M); 1104 1105 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1106 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1107 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q); 1108 ctxt->info.q_mapping[1] = cpu_to_le16(qcount); 1109 } 1110 1111 /** 1112 * ice_vsi_init - Create and initialize a VSI 1113 * @vsi: the VSI being configured 1114 * @init_vsi: is this call creating a VSI 1115 * 1116 * This initializes a VSI context depending on the VSI type to be added and 1117 * passes it down to the add_vsi aq command to create a new VSI. 1118 */ 1119 static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi) 1120 { 1121 struct ice_pf *pf = vsi->back; 1122 struct ice_hw *hw = &pf->hw; 1123 struct ice_vsi_ctx *ctxt; 1124 struct device *dev; 1125 int ret = 0; 1126 1127 dev = ice_pf_to_dev(pf); 1128 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 1129 if (!ctxt) 1130 return -ENOMEM; 1131 1132 switch (vsi->type) { 1133 case ICE_VSI_CTRL: 1134 case ICE_VSI_LB: 1135 case ICE_VSI_PF: 1136 ctxt->flags = ICE_AQ_VSI_TYPE_PF; 1137 break; 1138 case ICE_VSI_SWITCHDEV_CTRL: 1139 case ICE_VSI_CHNL: 1140 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2; 1141 break; 1142 case ICE_VSI_VF: 1143 ctxt->flags = ICE_AQ_VSI_TYPE_VF; 1144 /* VF number here is the absolute VF number (0-255) */ 1145 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id; 1146 break; 1147 default: 1148 ret = -ENODEV; 1149 goto out; 1150 } 1151 1152 /* Handle VLAN pruning for channel VSI if main VSI has VLAN 1153 * prune enabled 1154 */ 1155 if (vsi->type == ICE_VSI_CHNL) { 1156 struct ice_vsi *main_vsi; 1157 1158 main_vsi = ice_get_main_vsi(pf); 1159 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi)) 1160 ctxt->info.sw_flags2 |= 1161 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1162 else 1163 ctxt->info.sw_flags2 &= 1164 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1165 } 1166 1167 ice_set_dflt_vsi_ctx(hw, ctxt); 1168 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) 1169 ice_set_fd_vsi_ctx(ctxt, vsi); 1170 /* if the switch is in VEB mode, allow VSI loopback */ 1171 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB) 1172 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB; 1173 1174 /* Set LUT type and HASH type if RSS is enabled */ 1175 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) && 1176 vsi->type != ICE_VSI_CTRL) { 1177 ice_set_rss_vsi_ctx(ctxt, vsi); 1178 /* if updating VSI context, make sure to set valid_section: 1179 * to indicate which section of VSI context being updated 1180 */ 1181 if (!init_vsi) 1182 ctxt->info.valid_sections |= 1183 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID); 1184 } 1185 1186 ctxt->info.sw_id = vsi->port_info->sw_id; 1187 if (vsi->type == ICE_VSI_CHNL) { 1188 ice_chnl_vsi_setup_q_map(vsi, ctxt); 1189 } else { 1190 ice_vsi_setup_q_map(vsi, ctxt); 1191 if (!init_vsi) /* means VSI being updated */ 1192 /* must to indicate which section of VSI context are 1193 * being modified 1194 */ 1195 ctxt->info.valid_sections |= 1196 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 1197 } 1198 1199 /* Allow control frames out of main VSI */ 1200 if (vsi->type == ICE_VSI_PF) { 1201 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 1202 ctxt->info.valid_sections |= 1203 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 1204 } 1205 1206 if (init_vsi) { 1207 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL); 1208 if (ret) { 1209 dev_err(dev, "Add VSI failed, err %d\n", ret); 1210 ret = -EIO; 1211 goto out; 1212 } 1213 } else { 1214 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL); 1215 if (ret) { 1216 dev_err(dev, "Update VSI failed, err %d\n", ret); 1217 ret = -EIO; 1218 goto out; 1219 } 1220 } 1221 1222 /* keep context for update VSI operations */ 1223 vsi->info = ctxt->info; 1224 1225 /* record VSI number returned */ 1226 vsi->vsi_num = ctxt->vsi_num; 1227 1228 out: 1229 kfree(ctxt); 1230 return ret; 1231 } 1232 1233 /** 1234 * ice_free_res - free a block of resources 1235 * @res: pointer to the resource 1236 * @index: starting index previously returned by ice_get_res 1237 * @id: identifier to track owner 1238 * 1239 * Returns number of resources freed 1240 */ 1241 int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id) 1242 { 1243 int count = 0; 1244 int i; 1245 1246 if (!res || index >= res->end) 1247 return -EINVAL; 1248 1249 id |= ICE_RES_VALID_BIT; 1250 for (i = index; i < res->end && res->list[i] == id; i++) { 1251 res->list[i] = 0; 1252 count++; 1253 } 1254 1255 return count; 1256 } 1257 1258 /** 1259 * ice_search_res - Search the tracker for a block of resources 1260 * @res: pointer to the resource 1261 * @needed: size of the block needed 1262 * @id: identifier to track owner 1263 * 1264 * Returns the base item index of the block, or -ENOMEM for error 1265 */ 1266 static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id) 1267 { 1268 u16 start = 0, end = 0; 1269 1270 if (needed > res->end) 1271 return -ENOMEM; 1272 1273 id |= ICE_RES_VALID_BIT; 1274 1275 do { 1276 /* skip already allocated entries */ 1277 if (res->list[end++] & ICE_RES_VALID_BIT) { 1278 start = end; 1279 if ((start + needed) > res->end) 1280 break; 1281 } 1282 1283 if (end == (start + needed)) { 1284 int i = start; 1285 1286 /* there was enough, so assign it to the requestor */ 1287 while (i != end) 1288 res->list[i++] = id; 1289 1290 return start; 1291 } 1292 } while (end < res->end); 1293 1294 return -ENOMEM; 1295 } 1296 1297 /** 1298 * ice_get_free_res_count - Get free count from a resource tracker 1299 * @res: Resource tracker instance 1300 */ 1301 static u16 ice_get_free_res_count(struct ice_res_tracker *res) 1302 { 1303 u16 i, count = 0; 1304 1305 for (i = 0; i < res->end; i++) 1306 if (!(res->list[i] & ICE_RES_VALID_BIT)) 1307 count++; 1308 1309 return count; 1310 } 1311 1312 /** 1313 * ice_get_res - get a block of resources 1314 * @pf: board private structure 1315 * @res: pointer to the resource 1316 * @needed: size of the block needed 1317 * @id: identifier to track owner 1318 * 1319 * Returns the base item index of the block, or negative for error 1320 */ 1321 int 1322 ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id) 1323 { 1324 if (!res || !pf) 1325 return -EINVAL; 1326 1327 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) { 1328 dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n", 1329 needed, res->num_entries, id); 1330 return -EINVAL; 1331 } 1332 1333 return ice_search_res(res, needed, id); 1334 } 1335 1336 /** 1337 * ice_get_vf_ctrl_res - Get VF control VSI resource 1338 * @pf: pointer to the PF structure 1339 * @vsi: the VSI to allocate a resource for 1340 * 1341 * Look up whether another VF has already allocated the control VSI resource. 1342 * If so, re-use this resource so that we share it among all VFs. 1343 * 1344 * Otherwise, allocate the resource and return it. 1345 */ 1346 static int ice_get_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi) 1347 { 1348 struct ice_vf *vf; 1349 unsigned int bkt; 1350 int base; 1351 1352 rcu_read_lock(); 1353 ice_for_each_vf_rcu(pf, bkt, vf) { 1354 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) { 1355 base = pf->vsi[vf->ctrl_vsi_idx]->base_vector; 1356 rcu_read_unlock(); 1357 return base; 1358 } 1359 } 1360 rcu_read_unlock(); 1361 1362 return ice_get_res(pf, pf->irq_tracker, vsi->num_q_vectors, 1363 ICE_RES_VF_CTRL_VEC_ID); 1364 } 1365 1366 /** 1367 * ice_vsi_setup_vector_base - Set up the base vector for the given VSI 1368 * @vsi: ptr to the VSI 1369 * 1370 * This should only be called after ice_vsi_alloc() which allocates the 1371 * corresponding SW VSI structure and initializes num_queue_pairs for the 1372 * newly allocated VSI. 1373 * 1374 * Returns 0 on success or negative on failure 1375 */ 1376 static int ice_vsi_setup_vector_base(struct ice_vsi *vsi) 1377 { 1378 struct ice_pf *pf = vsi->back; 1379 struct device *dev; 1380 u16 num_q_vectors; 1381 int base; 1382 1383 dev = ice_pf_to_dev(pf); 1384 /* SRIOV doesn't grab irq_tracker entries for each VSI */ 1385 if (vsi->type == ICE_VSI_VF) 1386 return 0; 1387 if (vsi->type == ICE_VSI_CHNL) 1388 return 0; 1389 1390 if (vsi->base_vector) { 1391 dev_dbg(dev, "VSI %d has non-zero base vector %d\n", 1392 vsi->vsi_num, vsi->base_vector); 1393 return -EEXIST; 1394 } 1395 1396 num_q_vectors = vsi->num_q_vectors; 1397 /* reserve slots from OS requested IRQs */ 1398 if (vsi->type == ICE_VSI_CTRL && vsi->vf) { 1399 base = ice_get_vf_ctrl_res(pf, vsi); 1400 } else { 1401 base = ice_get_res(pf, pf->irq_tracker, num_q_vectors, 1402 vsi->idx); 1403 } 1404 1405 if (base < 0) { 1406 dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n", 1407 ice_get_free_res_count(pf->irq_tracker), 1408 ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors); 1409 return -ENOENT; 1410 } 1411 vsi->base_vector = (u16)base; 1412 pf->num_avail_sw_msix -= num_q_vectors; 1413 1414 return 0; 1415 } 1416 1417 /** 1418 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI 1419 * @vsi: the VSI having rings deallocated 1420 */ 1421 static void ice_vsi_clear_rings(struct ice_vsi *vsi) 1422 { 1423 int i; 1424 1425 /* Avoid stale references by clearing map from vector to ring */ 1426 if (vsi->q_vectors) { 1427 ice_for_each_q_vector(vsi, i) { 1428 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1429 1430 if (q_vector) { 1431 q_vector->tx.tx_ring = NULL; 1432 q_vector->rx.rx_ring = NULL; 1433 } 1434 } 1435 } 1436 1437 if (vsi->tx_rings) { 1438 ice_for_each_alloc_txq(vsi, i) { 1439 if (vsi->tx_rings[i]) { 1440 kfree_rcu(vsi->tx_rings[i], rcu); 1441 WRITE_ONCE(vsi->tx_rings[i], NULL); 1442 } 1443 } 1444 } 1445 if (vsi->rx_rings) { 1446 ice_for_each_alloc_rxq(vsi, i) { 1447 if (vsi->rx_rings[i]) { 1448 kfree_rcu(vsi->rx_rings[i], rcu); 1449 WRITE_ONCE(vsi->rx_rings[i], NULL); 1450 } 1451 } 1452 } 1453 } 1454 1455 /** 1456 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI 1457 * @vsi: VSI which is having rings allocated 1458 */ 1459 static int ice_vsi_alloc_rings(struct ice_vsi *vsi) 1460 { 1461 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw); 1462 struct ice_pf *pf = vsi->back; 1463 struct device *dev; 1464 u16 i; 1465 1466 dev = ice_pf_to_dev(pf); 1467 /* Allocate Tx rings */ 1468 ice_for_each_alloc_txq(vsi, i) { 1469 struct ice_tx_ring *ring; 1470 1471 /* allocate with kzalloc(), free with kfree_rcu() */ 1472 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1473 1474 if (!ring) 1475 goto err_out; 1476 1477 ring->q_index = i; 1478 ring->reg_idx = vsi->txq_map[i]; 1479 ring->vsi = vsi; 1480 ring->tx_tstamps = &pf->ptp.port.tx; 1481 ring->dev = dev; 1482 ring->count = vsi->num_tx_desc; 1483 if (dvm_ena) 1484 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2; 1485 else 1486 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1; 1487 WRITE_ONCE(vsi->tx_rings[i], ring); 1488 } 1489 1490 /* Allocate Rx rings */ 1491 ice_for_each_alloc_rxq(vsi, i) { 1492 struct ice_rx_ring *ring; 1493 1494 /* allocate with kzalloc(), free with kfree_rcu() */ 1495 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1496 if (!ring) 1497 goto err_out; 1498 1499 ring->q_index = i; 1500 ring->reg_idx = vsi->rxq_map[i]; 1501 ring->vsi = vsi; 1502 ring->netdev = vsi->netdev; 1503 ring->dev = dev; 1504 ring->count = vsi->num_rx_desc; 1505 WRITE_ONCE(vsi->rx_rings[i], ring); 1506 } 1507 1508 return 0; 1509 1510 err_out: 1511 ice_vsi_clear_rings(vsi); 1512 return -ENOMEM; 1513 } 1514 1515 /** 1516 * ice_vsi_manage_rss_lut - disable/enable RSS 1517 * @vsi: the VSI being changed 1518 * @ena: boolean value indicating if this is an enable or disable request 1519 * 1520 * In the event of disable request for RSS, this function will zero out RSS 1521 * LUT, while in the event of enable request for RSS, it will reconfigure RSS 1522 * LUT. 1523 */ 1524 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena) 1525 { 1526 u8 *lut; 1527 1528 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1529 if (!lut) 1530 return; 1531 1532 if (ena) { 1533 if (vsi->rss_lut_user) 1534 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1535 else 1536 ice_fill_rss_lut(lut, vsi->rss_table_size, 1537 vsi->rss_size); 1538 } 1539 1540 ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1541 kfree(lut); 1542 } 1543 1544 /** 1545 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI 1546 * @vsi: VSI to be configured 1547 */ 1548 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi) 1549 { 1550 struct ice_pf *pf = vsi->back; 1551 struct device *dev; 1552 u8 *lut, *key; 1553 int err; 1554 1555 dev = ice_pf_to_dev(pf); 1556 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size && 1557 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) { 1558 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size); 1559 } else { 1560 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq); 1561 1562 /* If orig_rss_size is valid and it is less than determined 1563 * main VSI's rss_size, update main VSI's rss_size to be 1564 * orig_rss_size so that when tc-qdisc is deleted, main VSI 1565 * RSS table gets programmed to be correct (whatever it was 1566 * to begin with (prior to setup-tc for ADQ config) 1567 */ 1568 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size && 1569 vsi->orig_rss_size <= vsi->num_rxq) { 1570 vsi->rss_size = vsi->orig_rss_size; 1571 /* now orig_rss_size is used, reset it to zero */ 1572 vsi->orig_rss_size = 0; 1573 } 1574 } 1575 1576 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1577 if (!lut) 1578 return -ENOMEM; 1579 1580 if (vsi->rss_lut_user) 1581 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1582 else 1583 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); 1584 1585 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1586 if (err) { 1587 dev_err(dev, "set_rss_lut failed, error %d\n", err); 1588 goto ice_vsi_cfg_rss_exit; 1589 } 1590 1591 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL); 1592 if (!key) { 1593 err = -ENOMEM; 1594 goto ice_vsi_cfg_rss_exit; 1595 } 1596 1597 if (vsi->rss_hkey_user) 1598 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1599 else 1600 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1601 1602 err = ice_set_rss_key(vsi, key); 1603 if (err) 1604 dev_err(dev, "set_rss_key failed, error %d\n", err); 1605 1606 kfree(key); 1607 ice_vsi_cfg_rss_exit: 1608 kfree(lut); 1609 return err; 1610 } 1611 1612 /** 1613 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows 1614 * @vsi: VSI to be configured 1615 * 1616 * This function will only be called during the VF VSI setup. Upon successful 1617 * completion of package download, this function will configure default RSS 1618 * input sets for VF VSI. 1619 */ 1620 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi) 1621 { 1622 struct ice_pf *pf = vsi->back; 1623 struct device *dev; 1624 int status; 1625 1626 dev = ice_pf_to_dev(pf); 1627 if (ice_is_safe_mode(pf)) { 1628 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1629 vsi->vsi_num); 1630 return; 1631 } 1632 1633 status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA); 1634 if (status) 1635 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n", 1636 vsi->vsi_num, status); 1637 } 1638 1639 /** 1640 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows 1641 * @vsi: VSI to be configured 1642 * 1643 * This function will only be called after successful download package call 1644 * during initialization of PF. Since the downloaded package will erase the 1645 * RSS section, this function will configure RSS input sets for different 1646 * flow types. The last profile added has the highest priority, therefore 2 1647 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles 1648 * (i.e. IPv4 src/dst TCP src/dst port). 1649 */ 1650 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) 1651 { 1652 u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num; 1653 struct ice_pf *pf = vsi->back; 1654 struct ice_hw *hw = &pf->hw; 1655 struct device *dev; 1656 int status; 1657 1658 dev = ice_pf_to_dev(pf); 1659 if (ice_is_safe_mode(pf)) { 1660 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1661 vsi_num); 1662 return; 1663 } 1664 /* configure RSS for IPv4 with input set IP src/dst */ 1665 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4, 1666 ICE_FLOW_SEG_HDR_IPV4); 1667 if (status) 1668 dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %d\n", 1669 vsi_num, status); 1670 1671 /* configure RSS for IPv6 with input set IPv6 src/dst */ 1672 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6, 1673 ICE_FLOW_SEG_HDR_IPV6); 1674 if (status) 1675 dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %d\n", 1676 vsi_num, status); 1677 1678 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ 1679 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4, 1680 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4); 1681 if (status) 1682 dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %d\n", 1683 vsi_num, status); 1684 1685 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ 1686 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4, 1687 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4); 1688 if (status) 1689 dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %d\n", 1690 vsi_num, status); 1691 1692 /* configure RSS for sctp4 with input set IP src/dst */ 1693 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4, 1694 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4); 1695 if (status) 1696 dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %d\n", 1697 vsi_num, status); 1698 1699 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ 1700 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6, 1701 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6); 1702 if (status) 1703 dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %d\n", 1704 vsi_num, status); 1705 1706 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ 1707 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6, 1708 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6); 1709 if (status) 1710 dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %d\n", 1711 vsi_num, status); 1712 1713 /* configure RSS for sctp6 with input set IPv6 src/dst */ 1714 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6, 1715 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6); 1716 if (status) 1717 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n", 1718 vsi_num, status); 1719 1720 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_ESP_SPI, 1721 ICE_FLOW_SEG_HDR_ESP); 1722 if (status) 1723 dev_dbg(dev, "ice_add_rss_cfg failed for esp/spi flow, vsi = %d, error = %d\n", 1724 vsi_num, status); 1725 } 1726 1727 /** 1728 * ice_pf_state_is_nominal - checks the PF for nominal state 1729 * @pf: pointer to PF to check 1730 * 1731 * Check the PF's state for a collection of bits that would indicate 1732 * the PF is in a state that would inhibit normal operation for 1733 * driver functionality. 1734 * 1735 * Returns true if PF is in a nominal state, false otherwise 1736 */ 1737 bool ice_pf_state_is_nominal(struct ice_pf *pf) 1738 { 1739 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 }; 1740 1741 if (!pf) 1742 return false; 1743 1744 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS); 1745 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS)) 1746 return false; 1747 1748 return true; 1749 } 1750 1751 /** 1752 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters 1753 * @vsi: the VSI to be updated 1754 */ 1755 void ice_update_eth_stats(struct ice_vsi *vsi) 1756 { 1757 struct ice_eth_stats *prev_es, *cur_es; 1758 struct ice_hw *hw = &vsi->back->hw; 1759 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */ 1760 1761 prev_es = &vsi->eth_stats_prev; 1762 cur_es = &vsi->eth_stats; 1763 1764 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded, 1765 &prev_es->rx_bytes, &cur_es->rx_bytes); 1766 1767 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded, 1768 &prev_es->rx_unicast, &cur_es->rx_unicast); 1769 1770 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded, 1771 &prev_es->rx_multicast, &cur_es->rx_multicast); 1772 1773 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded, 1774 &prev_es->rx_broadcast, &cur_es->rx_broadcast); 1775 1776 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded, 1777 &prev_es->rx_discards, &cur_es->rx_discards); 1778 1779 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded, 1780 &prev_es->tx_bytes, &cur_es->tx_bytes); 1781 1782 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded, 1783 &prev_es->tx_unicast, &cur_es->tx_unicast); 1784 1785 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded, 1786 &prev_es->tx_multicast, &cur_es->tx_multicast); 1787 1788 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded, 1789 &prev_es->tx_broadcast, &cur_es->tx_broadcast); 1790 1791 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded, 1792 &prev_es->tx_errors, &cur_es->tx_errors); 1793 1794 vsi->stat_offsets_loaded = true; 1795 } 1796 1797 /** 1798 * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length 1799 * @vsi: VSI 1800 */ 1801 void ice_vsi_cfg_frame_size(struct ice_vsi *vsi) 1802 { 1803 if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) { 1804 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX; 1805 vsi->rx_buf_len = ICE_RXBUF_2048; 1806 #if (PAGE_SIZE < 8192) 1807 } else if (!ICE_2K_TOO_SMALL_WITH_PADDING && 1808 (vsi->netdev->mtu <= ETH_DATA_LEN)) { 1809 vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN; 1810 vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN; 1811 #endif 1812 } else { 1813 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX; 1814 #if (PAGE_SIZE < 8192) 1815 vsi->rx_buf_len = ICE_RXBUF_3072; 1816 #else 1817 vsi->rx_buf_len = ICE_RXBUF_2048; 1818 #endif 1819 } 1820 } 1821 1822 /** 1823 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register 1824 * @hw: HW pointer 1825 * @pf_q: index of the Rx queue in the PF's queue space 1826 * @rxdid: flexible descriptor RXDID 1827 * @prio: priority for the RXDID for this queue 1828 * @ena_ts: true to enable timestamp and false to disable timestamp 1829 */ 1830 void 1831 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, 1832 bool ena_ts) 1833 { 1834 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 1835 1836 /* clear any previous values */ 1837 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 1838 QRXFLXP_CNTXT_RXDID_PRIO_M | 1839 QRXFLXP_CNTXT_TS_M); 1840 1841 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) & 1842 QRXFLXP_CNTXT_RXDID_IDX_M; 1843 1844 regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) & 1845 QRXFLXP_CNTXT_RXDID_PRIO_M; 1846 1847 if (ena_ts) 1848 /* Enable TimeSync on this queue */ 1849 regval |= QRXFLXP_CNTXT_TS_M; 1850 1851 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 1852 } 1853 1854 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx) 1855 { 1856 if (q_idx >= vsi->num_rxq) 1857 return -EINVAL; 1858 1859 return ice_vsi_cfg_rxq(vsi->rx_rings[q_idx]); 1860 } 1861 1862 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, u16 q_idx) 1863 { 1864 struct ice_aqc_add_tx_qgrp *qg_buf; 1865 int err; 1866 1867 if (q_idx >= vsi->alloc_txq || !tx_rings || !tx_rings[q_idx]) 1868 return -EINVAL; 1869 1870 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL); 1871 if (!qg_buf) 1872 return -ENOMEM; 1873 1874 qg_buf->num_txqs = 1; 1875 1876 err = ice_vsi_cfg_txq(vsi, tx_rings[q_idx], qg_buf); 1877 kfree(qg_buf); 1878 return err; 1879 } 1880 1881 /** 1882 * ice_vsi_cfg_rxqs - Configure the VSI for Rx 1883 * @vsi: the VSI being configured 1884 * 1885 * Return 0 on success and a negative value on error 1886 * Configure the Rx VSI for operation. 1887 */ 1888 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi) 1889 { 1890 u16 i; 1891 1892 if (vsi->type == ICE_VSI_VF) 1893 goto setup_rings; 1894 1895 ice_vsi_cfg_frame_size(vsi); 1896 setup_rings: 1897 /* set up individual rings */ 1898 ice_for_each_rxq(vsi, i) { 1899 int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]); 1900 1901 if (err) 1902 return err; 1903 } 1904 1905 return 0; 1906 } 1907 1908 /** 1909 * ice_vsi_cfg_txqs - Configure the VSI for Tx 1910 * @vsi: the VSI being configured 1911 * @rings: Tx ring array to be configured 1912 * @count: number of Tx ring array elements 1913 * 1914 * Return 0 on success and a negative value on error 1915 * Configure the Tx VSI for operation. 1916 */ 1917 static int 1918 ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_tx_ring **rings, u16 count) 1919 { 1920 struct ice_aqc_add_tx_qgrp *qg_buf; 1921 u16 q_idx = 0; 1922 int err = 0; 1923 1924 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL); 1925 if (!qg_buf) 1926 return -ENOMEM; 1927 1928 qg_buf->num_txqs = 1; 1929 1930 for (q_idx = 0; q_idx < count; q_idx++) { 1931 err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf); 1932 if (err) 1933 goto err_cfg_txqs; 1934 } 1935 1936 err_cfg_txqs: 1937 kfree(qg_buf); 1938 return err; 1939 } 1940 1941 /** 1942 * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx 1943 * @vsi: the VSI being configured 1944 * 1945 * Return 0 on success and a negative value on error 1946 * Configure the Tx VSI for operation. 1947 */ 1948 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi) 1949 { 1950 return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, vsi->num_txq); 1951 } 1952 1953 /** 1954 * ice_vsi_cfg_xdp_txqs - Configure Tx queues dedicated for XDP in given VSI 1955 * @vsi: the VSI being configured 1956 * 1957 * Return 0 on success and a negative value on error 1958 * Configure the Tx queues dedicated for XDP in given VSI for operation. 1959 */ 1960 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi) 1961 { 1962 int ret; 1963 int i; 1964 1965 ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings, vsi->num_xdp_txq); 1966 if (ret) 1967 return ret; 1968 1969 ice_for_each_xdp_txq(vsi, i) 1970 vsi->xdp_rings[i]->xsk_pool = ice_tx_xsk_pool(vsi->xdp_rings[i]); 1971 1972 return ret; 1973 } 1974 1975 /** 1976 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value 1977 * @intrl: interrupt rate limit in usecs 1978 * @gran: interrupt rate limit granularity in usecs 1979 * 1980 * This function converts a decimal interrupt rate limit in usecs to the format 1981 * expected by firmware. 1982 */ 1983 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) 1984 { 1985 u32 val = intrl / gran; 1986 1987 if (val) 1988 return val | GLINT_RATE_INTRL_ENA_M; 1989 return 0; 1990 } 1991 1992 /** 1993 * ice_write_intrl - write throttle rate limit to interrupt specific register 1994 * @q_vector: pointer to interrupt specific structure 1995 * @intrl: throttle rate limit in microseconds to write 1996 */ 1997 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) 1998 { 1999 struct ice_hw *hw = &q_vector->vsi->back->hw; 2000 2001 wr32(hw, GLINT_RATE(q_vector->reg_idx), 2002 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); 2003 } 2004 2005 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc) 2006 { 2007 switch (rc->type) { 2008 case ICE_RX_CONTAINER: 2009 if (rc->rx_ring) 2010 return rc->rx_ring->q_vector; 2011 break; 2012 case ICE_TX_CONTAINER: 2013 if (rc->tx_ring) 2014 return rc->tx_ring->q_vector; 2015 break; 2016 default: 2017 break; 2018 } 2019 2020 return NULL; 2021 } 2022 2023 /** 2024 * __ice_write_itr - write throttle rate to register 2025 * @q_vector: pointer to interrupt data structure 2026 * @rc: pointer to ring container 2027 * @itr: throttle rate in microseconds to write 2028 */ 2029 static void __ice_write_itr(struct ice_q_vector *q_vector, 2030 struct ice_ring_container *rc, u16 itr) 2031 { 2032 struct ice_hw *hw = &q_vector->vsi->back->hw; 2033 2034 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx), 2035 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S); 2036 } 2037 2038 /** 2039 * ice_write_itr - write throttle rate to queue specific register 2040 * @rc: pointer to ring container 2041 * @itr: throttle rate in microseconds to write 2042 */ 2043 void ice_write_itr(struct ice_ring_container *rc, u16 itr) 2044 { 2045 struct ice_q_vector *q_vector; 2046 2047 q_vector = ice_pull_qvec_from_rc(rc); 2048 if (!q_vector) 2049 return; 2050 2051 __ice_write_itr(q_vector, rc, itr); 2052 } 2053 2054 /** 2055 * ice_set_q_vector_intrl - set up interrupt rate limiting 2056 * @q_vector: the vector to be configured 2057 * 2058 * Interrupt rate limiting is local to the vector, not per-queue so we must 2059 * detect if either ring container has dynamic moderation enabled to decide 2060 * what to set the interrupt rate limit to via INTRL settings. In the case that 2061 * dynamic moderation is disabled on both, write the value with the cached 2062 * setting to make sure INTRL register matches the user visible value. 2063 */ 2064 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector) 2065 { 2066 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) { 2067 /* in the case of dynamic enabled, cap each vector to no more 2068 * than (4 us) 250,000 ints/sec, which allows low latency 2069 * but still less than 500,000 interrupts per second, which 2070 * reduces CPU a bit in the case of the lowest latency 2071 * setting. The 4 here is a value in microseconds. 2072 */ 2073 ice_write_intrl(q_vector, 4); 2074 } else { 2075 ice_write_intrl(q_vector, q_vector->intrl); 2076 } 2077 } 2078 2079 /** 2080 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW 2081 * @vsi: the VSI being configured 2082 * 2083 * This configures MSIX mode interrupts for the PF VSI, and should not be used 2084 * for the VF VSI. 2085 */ 2086 void ice_vsi_cfg_msix(struct ice_vsi *vsi) 2087 { 2088 struct ice_pf *pf = vsi->back; 2089 struct ice_hw *hw = &pf->hw; 2090 u16 txq = 0, rxq = 0; 2091 int i, q; 2092 2093 ice_for_each_q_vector(vsi, i) { 2094 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2095 u16 reg_idx = q_vector->reg_idx; 2096 2097 ice_cfg_itr(hw, q_vector); 2098 2099 /* Both Transmit Queue Interrupt Cause Control register 2100 * and Receive Queue Interrupt Cause control register 2101 * expects MSIX_INDX field to be the vector index 2102 * within the function space and not the absolute 2103 * vector index across PF or across device. 2104 * For SR-IOV VF VSIs queue vector index always starts 2105 * with 1 since first vector index(0) is used for OICR 2106 * in VF space. Since VMDq and other PF VSIs are within 2107 * the PF function space, use the vector index that is 2108 * tracked for this PF. 2109 */ 2110 for (q = 0; q < q_vector->num_ring_tx; q++) { 2111 ice_cfg_txq_interrupt(vsi, txq, reg_idx, 2112 q_vector->tx.itr_idx); 2113 txq++; 2114 } 2115 2116 for (q = 0; q < q_vector->num_ring_rx; q++) { 2117 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx, 2118 q_vector->rx.itr_idx); 2119 rxq++; 2120 } 2121 } 2122 } 2123 2124 /** 2125 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings 2126 * @vsi: the VSI whose rings are to be enabled 2127 * 2128 * Returns 0 on success and a negative value on error 2129 */ 2130 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi) 2131 { 2132 return ice_vsi_ctrl_all_rx_rings(vsi, true); 2133 } 2134 2135 /** 2136 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings 2137 * @vsi: the VSI whose rings are to be disabled 2138 * 2139 * Returns 0 on success and a negative value on error 2140 */ 2141 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi) 2142 { 2143 return ice_vsi_ctrl_all_rx_rings(vsi, false); 2144 } 2145 2146 /** 2147 * ice_vsi_stop_tx_rings - Disable Tx rings 2148 * @vsi: the VSI being configured 2149 * @rst_src: reset source 2150 * @rel_vmvf_num: Relative ID of VF/VM 2151 * @rings: Tx ring array to be stopped 2152 * @count: number of Tx ring array elements 2153 */ 2154 static int 2155 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2156 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count) 2157 { 2158 u16 q_idx; 2159 2160 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS) 2161 return -EINVAL; 2162 2163 for (q_idx = 0; q_idx < count; q_idx++) { 2164 struct ice_txq_meta txq_meta = { }; 2165 int status; 2166 2167 if (!rings || !rings[q_idx]) 2168 return -EINVAL; 2169 2170 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta); 2171 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num, 2172 rings[q_idx], &txq_meta); 2173 2174 if (status) 2175 return status; 2176 } 2177 2178 return 0; 2179 } 2180 2181 /** 2182 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings 2183 * @vsi: the VSI being configured 2184 * @rst_src: reset source 2185 * @rel_vmvf_num: Relative ID of VF/VM 2186 */ 2187 int 2188 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2189 u16 rel_vmvf_num) 2190 { 2191 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq); 2192 } 2193 2194 /** 2195 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings 2196 * @vsi: the VSI being configured 2197 */ 2198 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi) 2199 { 2200 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq); 2201 } 2202 2203 /** 2204 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not 2205 * @vsi: VSI to check whether or not VLAN pruning is enabled. 2206 * 2207 * returns true if Rx VLAN pruning is enabled and false otherwise. 2208 */ 2209 bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi) 2210 { 2211 if (!vsi) 2212 return false; 2213 2214 return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA); 2215 } 2216 2217 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 2218 { 2219 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) { 2220 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 2221 vsi->tc_cfg.numtc = 1; 2222 return; 2223 } 2224 2225 /* set VSI TC information based on DCB config */ 2226 ice_vsi_set_dcb_tc_cfg(vsi); 2227 } 2228 2229 /** 2230 * ice_vsi_set_q_vectors_reg_idx - set the HW register index for all q_vectors 2231 * @vsi: VSI to set the q_vectors register index on 2232 */ 2233 static int 2234 ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi) 2235 { 2236 u16 i; 2237 2238 if (!vsi || !vsi->q_vectors) 2239 return -EINVAL; 2240 2241 ice_for_each_q_vector(vsi, i) { 2242 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2243 2244 if (!q_vector) { 2245 dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n", 2246 i, vsi->vsi_num); 2247 goto clear_reg_idx; 2248 } 2249 2250 if (vsi->type == ICE_VSI_VF) { 2251 struct ice_vf *vf = vsi->vf; 2252 2253 q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector); 2254 } else { 2255 q_vector->reg_idx = 2256 q_vector->v_idx + vsi->base_vector; 2257 } 2258 } 2259 2260 return 0; 2261 2262 clear_reg_idx: 2263 ice_for_each_q_vector(vsi, i) { 2264 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2265 2266 if (q_vector) 2267 q_vector->reg_idx = 0; 2268 } 2269 2270 return -EINVAL; 2271 } 2272 2273 /** 2274 * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling 2275 * @vsi: the VSI being configured 2276 * @tx: bool to determine Tx or Rx rule 2277 * @create: bool to determine create or remove Rule 2278 */ 2279 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create) 2280 { 2281 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag, 2282 enum ice_sw_fwd_act_type act); 2283 struct ice_pf *pf = vsi->back; 2284 struct device *dev; 2285 int status; 2286 2287 dev = ice_pf_to_dev(pf); 2288 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth; 2289 2290 if (tx) { 2291 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX, 2292 ICE_DROP_PACKET); 2293 } else { 2294 if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) { 2295 status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num, 2296 create); 2297 } else { 2298 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, 2299 ICE_FWD_TO_VSI); 2300 } 2301 } 2302 2303 if (status) 2304 dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n", 2305 create ? "adding" : "removing", tx ? "TX" : "RX", 2306 vsi->vsi_num, status); 2307 } 2308 2309 /** 2310 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it 2311 * @vsi: pointer to the VSI 2312 * 2313 * This function will allocate new scheduler aggregator now if needed and will 2314 * move specified VSI into it. 2315 */ 2316 static void ice_set_agg_vsi(struct ice_vsi *vsi) 2317 { 2318 struct device *dev = ice_pf_to_dev(vsi->back); 2319 struct ice_agg_node *agg_node_iter = NULL; 2320 u32 agg_id = ICE_INVALID_AGG_NODE_ID; 2321 struct ice_agg_node *agg_node = NULL; 2322 int node_offset, max_agg_nodes = 0; 2323 struct ice_port_info *port_info; 2324 struct ice_pf *pf = vsi->back; 2325 u32 agg_node_id_start = 0; 2326 int status; 2327 2328 /* create (as needed) scheduler aggregator node and move VSI into 2329 * corresponding aggregator node 2330 * - PF aggregator node to contains VSIs of type _PF and _CTRL 2331 * - VF aggregator nodes will contain VF VSI 2332 */ 2333 port_info = pf->hw.port_info; 2334 if (!port_info) 2335 return; 2336 2337 switch (vsi->type) { 2338 case ICE_VSI_CTRL: 2339 case ICE_VSI_CHNL: 2340 case ICE_VSI_LB: 2341 case ICE_VSI_PF: 2342 case ICE_VSI_SWITCHDEV_CTRL: 2343 max_agg_nodes = ICE_MAX_PF_AGG_NODES; 2344 agg_node_id_start = ICE_PF_AGG_NODE_ID_START; 2345 agg_node_iter = &pf->pf_agg_node[0]; 2346 break; 2347 case ICE_VSI_VF: 2348 /* user can create 'n' VFs on a given PF, but since max children 2349 * per aggregator node can be only 64. Following code handles 2350 * aggregator(s) for VF VSIs, either selects a agg_node which 2351 * was already created provided num_vsis < 64, otherwise 2352 * select next available node, which will be created 2353 */ 2354 max_agg_nodes = ICE_MAX_VF_AGG_NODES; 2355 agg_node_id_start = ICE_VF_AGG_NODE_ID_START; 2356 agg_node_iter = &pf->vf_agg_node[0]; 2357 break; 2358 default: 2359 /* other VSI type, handle later if needed */ 2360 dev_dbg(dev, "unexpected VSI type %s\n", 2361 ice_vsi_type_str(vsi->type)); 2362 return; 2363 } 2364 2365 /* find the appropriate aggregator node */ 2366 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) { 2367 /* see if we can find space in previously created 2368 * node if num_vsis < 64, otherwise skip 2369 */ 2370 if (agg_node_iter->num_vsis && 2371 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) { 2372 agg_node_iter++; 2373 continue; 2374 } 2375 2376 if (agg_node_iter->valid && 2377 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) { 2378 agg_id = agg_node_iter->agg_id; 2379 agg_node = agg_node_iter; 2380 break; 2381 } 2382 2383 /* find unclaimed agg_id */ 2384 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) { 2385 agg_id = node_offset + agg_node_id_start; 2386 agg_node = agg_node_iter; 2387 break; 2388 } 2389 /* move to next agg_node */ 2390 agg_node_iter++; 2391 } 2392 2393 if (!agg_node) 2394 return; 2395 2396 /* if selected aggregator node was not created, create it */ 2397 if (!agg_node->valid) { 2398 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG, 2399 (u8)vsi->tc_cfg.ena_tc); 2400 if (status) { 2401 dev_err(dev, "unable to create aggregator node with agg_id %u\n", 2402 agg_id); 2403 return; 2404 } 2405 /* aggregator node is created, store the neeeded info */ 2406 agg_node->valid = true; 2407 agg_node->agg_id = agg_id; 2408 } 2409 2410 /* move VSI to corresponding aggregator node */ 2411 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx, 2412 (u8)vsi->tc_cfg.ena_tc); 2413 if (status) { 2414 dev_err(dev, "unable to move VSI idx %u into aggregator %u node", 2415 vsi->idx, agg_id); 2416 return; 2417 } 2418 2419 /* keep active children count for aggregator node */ 2420 agg_node->num_vsis++; 2421 2422 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved 2423 * to aggregator node 2424 */ 2425 vsi->agg_node = agg_node; 2426 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n", 2427 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id, 2428 vsi->agg_node->num_vsis); 2429 } 2430 2431 /** 2432 * ice_vsi_setup - Set up a VSI by a given type 2433 * @pf: board private structure 2434 * @pi: pointer to the port_info instance 2435 * @vsi_type: VSI type 2436 * @vf: pointer to VF to which this VSI connects. This field is used primarily 2437 * for the ICE_VSI_VF type. Other VSI types should pass NULL. 2438 * @ch: ptr to channel 2439 * 2440 * This allocates the sw VSI structure and its queue resources. 2441 * 2442 * Returns pointer to the successfully allocated and configured VSI sw struct on 2443 * success, NULL on failure. 2444 */ 2445 struct ice_vsi * 2446 ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi, 2447 enum ice_vsi_type vsi_type, struct ice_vf *vf, 2448 struct ice_channel *ch) 2449 { 2450 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 2451 struct device *dev = ice_pf_to_dev(pf); 2452 struct ice_vsi *vsi; 2453 int ret, i; 2454 2455 if (vsi_type == ICE_VSI_CHNL) 2456 vsi = ice_vsi_alloc(pf, vsi_type, ch, NULL); 2457 else if (vsi_type == ICE_VSI_VF || vsi_type == ICE_VSI_CTRL) 2458 vsi = ice_vsi_alloc(pf, vsi_type, NULL, vf); 2459 else 2460 vsi = ice_vsi_alloc(pf, vsi_type, NULL, NULL); 2461 2462 if (!vsi) { 2463 dev_err(dev, "could not allocate VSI\n"); 2464 return NULL; 2465 } 2466 2467 vsi->port_info = pi; 2468 vsi->vsw = pf->first_sw; 2469 if (vsi->type == ICE_VSI_PF) 2470 vsi->ethtype = ETH_P_PAUSE; 2471 2472 ice_alloc_fd_res(vsi); 2473 2474 if (vsi_type != ICE_VSI_CHNL) { 2475 if (ice_vsi_get_qs(vsi)) { 2476 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n", 2477 vsi->idx); 2478 goto unroll_vsi_alloc; 2479 } 2480 } 2481 2482 /* set RSS capabilities */ 2483 ice_vsi_set_rss_params(vsi); 2484 2485 /* set TC configuration */ 2486 ice_vsi_set_tc_cfg(vsi); 2487 2488 /* create the VSI */ 2489 ret = ice_vsi_init(vsi, true); 2490 if (ret) 2491 goto unroll_get_qs; 2492 2493 ice_vsi_init_vlan_ops(vsi); 2494 2495 switch (vsi->type) { 2496 case ICE_VSI_CTRL: 2497 case ICE_VSI_SWITCHDEV_CTRL: 2498 case ICE_VSI_PF: 2499 ret = ice_vsi_alloc_q_vectors(vsi); 2500 if (ret) 2501 goto unroll_vsi_init; 2502 2503 ret = ice_vsi_setup_vector_base(vsi); 2504 if (ret) 2505 goto unroll_alloc_q_vector; 2506 2507 ret = ice_vsi_set_q_vectors_reg_idx(vsi); 2508 if (ret) 2509 goto unroll_vector_base; 2510 2511 ret = ice_vsi_alloc_rings(vsi); 2512 if (ret) 2513 goto unroll_vector_base; 2514 2515 ice_vsi_map_rings_to_vectors(vsi); 2516 2517 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 2518 if (vsi->type != ICE_VSI_CTRL) 2519 /* Do not exit if configuring RSS had an issue, at 2520 * least receive traffic on first queue. Hence no 2521 * need to capture return value 2522 */ 2523 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2524 ice_vsi_cfg_rss_lut_key(vsi); 2525 ice_vsi_set_rss_flow_fld(vsi); 2526 } 2527 ice_init_arfs(vsi); 2528 break; 2529 case ICE_VSI_CHNL: 2530 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2531 ice_vsi_cfg_rss_lut_key(vsi); 2532 ice_vsi_set_rss_flow_fld(vsi); 2533 } 2534 break; 2535 case ICE_VSI_VF: 2536 /* VF driver will take care of creating netdev for this type and 2537 * map queues to vectors through Virtchnl, PF driver only 2538 * creates a VSI and corresponding structures for bookkeeping 2539 * purpose 2540 */ 2541 ret = ice_vsi_alloc_q_vectors(vsi); 2542 if (ret) 2543 goto unroll_vsi_init; 2544 2545 ret = ice_vsi_alloc_rings(vsi); 2546 if (ret) 2547 goto unroll_alloc_q_vector; 2548 2549 ret = ice_vsi_set_q_vectors_reg_idx(vsi); 2550 if (ret) 2551 goto unroll_vector_base; 2552 2553 /* Do not exit if configuring RSS had an issue, at least 2554 * receive traffic on first queue. Hence no need to capture 2555 * return value 2556 */ 2557 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2558 ice_vsi_cfg_rss_lut_key(vsi); 2559 ice_vsi_set_vf_rss_flow_fld(vsi); 2560 } 2561 break; 2562 case ICE_VSI_LB: 2563 ret = ice_vsi_alloc_rings(vsi); 2564 if (ret) 2565 goto unroll_vsi_init; 2566 break; 2567 default: 2568 /* clean up the resources and exit */ 2569 goto unroll_vsi_init; 2570 } 2571 2572 /* configure VSI nodes based on number of queues and TC's */ 2573 ice_for_each_traffic_class(i) { 2574 if (!(vsi->tc_cfg.ena_tc & BIT(i))) 2575 continue; 2576 2577 if (vsi->type == ICE_VSI_CHNL) { 2578 if (!vsi->alloc_txq && vsi->num_txq) 2579 max_txqs[i] = vsi->num_txq; 2580 else 2581 max_txqs[i] = pf->num_lan_tx; 2582 } else { 2583 max_txqs[i] = vsi->alloc_txq; 2584 } 2585 } 2586 2587 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc); 2588 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, 2589 max_txqs); 2590 if (ret) { 2591 dev_err(dev, "VSI %d failed lan queue config, error %d\n", 2592 vsi->vsi_num, ret); 2593 goto unroll_clear_rings; 2594 } 2595 2596 /* Add switch rule to drop all Tx Flow Control Frames, of look up 2597 * type ETHERTYPE from VSIs, and restrict malicious VF from sending 2598 * out PAUSE or PFC frames. If enabled, FW can still send FC frames. 2599 * The rule is added once for PF VSI in order to create appropriate 2600 * recipe, since VSI/VSI list is ignored with drop action... 2601 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to 2602 * be dropped so that VFs cannot send LLDP packets to reconfig DCB 2603 * settings in the HW. 2604 */ 2605 if (!ice_is_safe_mode(pf)) 2606 if (vsi->type == ICE_VSI_PF) { 2607 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2608 ICE_DROP_PACKET); 2609 ice_cfg_sw_lldp(vsi, true, true); 2610 } 2611 2612 if (!vsi->agg_node) 2613 ice_set_agg_vsi(vsi); 2614 return vsi; 2615 2616 unroll_clear_rings: 2617 ice_vsi_clear_rings(vsi); 2618 unroll_vector_base: 2619 /* reclaim SW interrupts back to the common pool */ 2620 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx); 2621 pf->num_avail_sw_msix += vsi->num_q_vectors; 2622 unroll_alloc_q_vector: 2623 ice_vsi_free_q_vectors(vsi); 2624 unroll_vsi_init: 2625 ice_vsi_delete(vsi); 2626 unroll_get_qs: 2627 ice_vsi_put_qs(vsi); 2628 unroll_vsi_alloc: 2629 if (vsi_type == ICE_VSI_VF) 2630 ice_enable_lag(pf->lag); 2631 ice_vsi_clear(vsi); 2632 2633 return NULL; 2634 } 2635 2636 /** 2637 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW 2638 * @vsi: the VSI being cleaned up 2639 */ 2640 static void ice_vsi_release_msix(struct ice_vsi *vsi) 2641 { 2642 struct ice_pf *pf = vsi->back; 2643 struct ice_hw *hw = &pf->hw; 2644 u32 txq = 0; 2645 u32 rxq = 0; 2646 int i, q; 2647 2648 ice_for_each_q_vector(vsi, i) { 2649 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2650 2651 ice_write_intrl(q_vector, 0); 2652 for (q = 0; q < q_vector->num_ring_tx; q++) { 2653 ice_write_itr(&q_vector->tx, 0); 2654 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); 2655 if (ice_is_xdp_ena_vsi(vsi)) { 2656 u32 xdp_txq = txq + vsi->num_xdp_txq; 2657 2658 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0); 2659 } 2660 txq++; 2661 } 2662 2663 for (q = 0; q < q_vector->num_ring_rx; q++) { 2664 ice_write_itr(&q_vector->rx, 0); 2665 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0); 2666 rxq++; 2667 } 2668 } 2669 2670 ice_flush(hw); 2671 } 2672 2673 /** 2674 * ice_vsi_free_irq - Free the IRQ association with the OS 2675 * @vsi: the VSI being configured 2676 */ 2677 void ice_vsi_free_irq(struct ice_vsi *vsi) 2678 { 2679 struct ice_pf *pf = vsi->back; 2680 int base = vsi->base_vector; 2681 int i; 2682 2683 if (!vsi->q_vectors || !vsi->irqs_ready) 2684 return; 2685 2686 ice_vsi_release_msix(vsi); 2687 if (vsi->type == ICE_VSI_VF) 2688 return; 2689 2690 vsi->irqs_ready = false; 2691 ice_for_each_q_vector(vsi, i) { 2692 u16 vector = i + base; 2693 int irq_num; 2694 2695 irq_num = pf->msix_entries[vector].vector; 2696 2697 /* free only the irqs that were actually requested */ 2698 if (!vsi->q_vectors[i] || 2699 !(vsi->q_vectors[i]->num_ring_tx || 2700 vsi->q_vectors[i]->num_ring_rx)) 2701 continue; 2702 2703 /* clear the affinity notifier in the IRQ descriptor */ 2704 irq_set_affinity_notifier(irq_num, NULL); 2705 2706 /* clear the affinity_mask in the IRQ descriptor */ 2707 irq_set_affinity_hint(irq_num, NULL); 2708 synchronize_irq(irq_num); 2709 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]); 2710 } 2711 } 2712 2713 /** 2714 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues 2715 * @vsi: the VSI having resources freed 2716 */ 2717 void ice_vsi_free_tx_rings(struct ice_vsi *vsi) 2718 { 2719 int i; 2720 2721 if (!vsi->tx_rings) 2722 return; 2723 2724 ice_for_each_txq(vsi, i) 2725 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2726 ice_free_tx_ring(vsi->tx_rings[i]); 2727 } 2728 2729 /** 2730 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues 2731 * @vsi: the VSI having resources freed 2732 */ 2733 void ice_vsi_free_rx_rings(struct ice_vsi *vsi) 2734 { 2735 int i; 2736 2737 if (!vsi->rx_rings) 2738 return; 2739 2740 ice_for_each_rxq(vsi, i) 2741 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2742 ice_free_rx_ring(vsi->rx_rings[i]); 2743 } 2744 2745 /** 2746 * ice_vsi_close - Shut down a VSI 2747 * @vsi: the VSI being shut down 2748 */ 2749 void ice_vsi_close(struct ice_vsi *vsi) 2750 { 2751 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) 2752 ice_down(vsi); 2753 2754 ice_vsi_free_irq(vsi); 2755 ice_vsi_free_tx_rings(vsi); 2756 ice_vsi_free_rx_rings(vsi); 2757 } 2758 2759 /** 2760 * ice_ena_vsi - resume a VSI 2761 * @vsi: the VSI being resume 2762 * @locked: is the rtnl_lock already held 2763 */ 2764 int ice_ena_vsi(struct ice_vsi *vsi, bool locked) 2765 { 2766 int err = 0; 2767 2768 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state)) 2769 return 0; 2770 2771 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2772 2773 if (vsi->netdev && vsi->type == ICE_VSI_PF) { 2774 if (netif_running(vsi->netdev)) { 2775 if (!locked) 2776 rtnl_lock(); 2777 2778 err = ice_open_internal(vsi->netdev); 2779 2780 if (!locked) 2781 rtnl_unlock(); 2782 } 2783 } else if (vsi->type == ICE_VSI_CTRL) { 2784 err = ice_vsi_open_ctrl(vsi); 2785 } 2786 2787 return err; 2788 } 2789 2790 /** 2791 * ice_dis_vsi - pause a VSI 2792 * @vsi: the VSI being paused 2793 * @locked: is the rtnl_lock already held 2794 */ 2795 void ice_dis_vsi(struct ice_vsi *vsi, bool locked) 2796 { 2797 if (test_bit(ICE_VSI_DOWN, vsi->state)) 2798 return; 2799 2800 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2801 2802 if (vsi->type == ICE_VSI_PF && vsi->netdev) { 2803 if (netif_running(vsi->netdev)) { 2804 if (!locked) 2805 rtnl_lock(); 2806 2807 ice_vsi_close(vsi); 2808 2809 if (!locked) 2810 rtnl_unlock(); 2811 } else { 2812 ice_vsi_close(vsi); 2813 } 2814 } else if (vsi->type == ICE_VSI_CTRL || 2815 vsi->type == ICE_VSI_SWITCHDEV_CTRL) { 2816 ice_vsi_close(vsi); 2817 } 2818 } 2819 2820 /** 2821 * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI 2822 * @vsi: the VSI being un-configured 2823 */ 2824 void ice_vsi_dis_irq(struct ice_vsi *vsi) 2825 { 2826 int base = vsi->base_vector; 2827 struct ice_pf *pf = vsi->back; 2828 struct ice_hw *hw = &pf->hw; 2829 u32 val; 2830 int i; 2831 2832 /* disable interrupt causation from each queue */ 2833 if (vsi->tx_rings) { 2834 ice_for_each_txq(vsi, i) { 2835 if (vsi->tx_rings[i]) { 2836 u16 reg; 2837 2838 reg = vsi->tx_rings[i]->reg_idx; 2839 val = rd32(hw, QINT_TQCTL(reg)); 2840 val &= ~QINT_TQCTL_CAUSE_ENA_M; 2841 wr32(hw, QINT_TQCTL(reg), val); 2842 } 2843 } 2844 } 2845 2846 if (vsi->rx_rings) { 2847 ice_for_each_rxq(vsi, i) { 2848 if (vsi->rx_rings[i]) { 2849 u16 reg; 2850 2851 reg = vsi->rx_rings[i]->reg_idx; 2852 val = rd32(hw, QINT_RQCTL(reg)); 2853 val &= ~QINT_RQCTL_CAUSE_ENA_M; 2854 wr32(hw, QINT_RQCTL(reg), val); 2855 } 2856 } 2857 } 2858 2859 /* disable each interrupt */ 2860 ice_for_each_q_vector(vsi, i) { 2861 if (!vsi->q_vectors[i]) 2862 continue; 2863 wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); 2864 } 2865 2866 ice_flush(hw); 2867 2868 /* don't call synchronize_irq() for VF's from the host */ 2869 if (vsi->type == ICE_VSI_VF) 2870 return; 2871 2872 ice_for_each_q_vector(vsi, i) 2873 synchronize_irq(pf->msix_entries[i + base].vector); 2874 } 2875 2876 /** 2877 * ice_napi_del - Remove NAPI handler for the VSI 2878 * @vsi: VSI for which NAPI handler is to be removed 2879 */ 2880 void ice_napi_del(struct ice_vsi *vsi) 2881 { 2882 int v_idx; 2883 2884 if (!vsi->netdev) 2885 return; 2886 2887 ice_for_each_q_vector(vsi, v_idx) 2888 netif_napi_del(&vsi->q_vectors[v_idx]->napi); 2889 } 2890 2891 /** 2892 * ice_free_vf_ctrl_res - Free the VF control VSI resource 2893 * @pf: pointer to PF structure 2894 * @vsi: the VSI to free resources for 2895 * 2896 * Check if the VF control VSI resource is still in use. If no VF is using it 2897 * any more, release the VSI resource. Otherwise, leave it to be cleaned up 2898 * once no other VF uses it. 2899 */ 2900 static void ice_free_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi) 2901 { 2902 struct ice_vf *vf; 2903 unsigned int bkt; 2904 2905 rcu_read_lock(); 2906 ice_for_each_vf_rcu(pf, bkt, vf) { 2907 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) { 2908 rcu_read_unlock(); 2909 return; 2910 } 2911 } 2912 rcu_read_unlock(); 2913 2914 /* No other VFs left that have control VSI. It is now safe to reclaim 2915 * SW interrupts back to the common pool. 2916 */ 2917 ice_free_res(pf->irq_tracker, vsi->base_vector, 2918 ICE_RES_VF_CTRL_VEC_ID); 2919 pf->num_avail_sw_msix += vsi->num_q_vectors; 2920 } 2921 2922 /** 2923 * ice_vsi_release - Delete a VSI and free its resources 2924 * @vsi: the VSI being removed 2925 * 2926 * Returns 0 on success or < 0 on error 2927 */ 2928 int ice_vsi_release(struct ice_vsi *vsi) 2929 { 2930 struct ice_pf *pf; 2931 int err; 2932 2933 if (!vsi->back) 2934 return -ENODEV; 2935 pf = vsi->back; 2936 2937 /* do not unregister while driver is in the reset recovery pending 2938 * state. Since reset/rebuild happens through PF service task workqueue, 2939 * it's not a good idea to unregister netdev that is associated to the 2940 * PF that is running the work queue items currently. This is done to 2941 * avoid check_flush_dependency() warning on this wq 2942 */ 2943 if (vsi->netdev && !ice_is_reset_in_progress(pf->state) && 2944 (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state))) { 2945 unregister_netdev(vsi->netdev); 2946 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state); 2947 } 2948 2949 if (vsi->type == ICE_VSI_PF) 2950 ice_devlink_destroy_pf_port(pf); 2951 2952 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2953 ice_rss_clean(vsi); 2954 2955 /* Disable VSI and free resources */ 2956 if (vsi->type != ICE_VSI_LB) 2957 ice_vsi_dis_irq(vsi); 2958 ice_vsi_close(vsi); 2959 2960 /* SR-IOV determines needed MSIX resources all at once instead of per 2961 * VSI since when VFs are spawned we know how many VFs there are and how 2962 * many interrupts each VF needs. SR-IOV MSIX resources are also 2963 * cleared in the same manner. 2964 */ 2965 if (vsi->type == ICE_VSI_CTRL && vsi->vf) { 2966 ice_free_vf_ctrl_res(pf, vsi); 2967 } else if (vsi->type != ICE_VSI_VF) { 2968 /* reclaim SW interrupts back to the common pool */ 2969 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx); 2970 pf->num_avail_sw_msix += vsi->num_q_vectors; 2971 } 2972 2973 if (!ice_is_safe_mode(pf)) { 2974 if (vsi->type == ICE_VSI_PF) { 2975 ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2976 ICE_DROP_PACKET); 2977 ice_cfg_sw_lldp(vsi, true, false); 2978 /* The Rx rule will only exist to remove if the LLDP FW 2979 * engine is currently stopped 2980 */ 2981 if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags)) 2982 ice_cfg_sw_lldp(vsi, false, false); 2983 } 2984 } 2985 2986 ice_fltr_remove_all(vsi); 2987 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 2988 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 2989 if (err) 2990 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 2991 vsi->vsi_num, err); 2992 ice_vsi_delete(vsi); 2993 ice_vsi_free_q_vectors(vsi); 2994 2995 if (vsi->netdev) { 2996 if (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state)) { 2997 unregister_netdev(vsi->netdev); 2998 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state); 2999 } 3000 if (test_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state)) { 3001 free_netdev(vsi->netdev); 3002 vsi->netdev = NULL; 3003 clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state); 3004 } 3005 } 3006 3007 if (vsi->type == ICE_VSI_VF && 3008 vsi->agg_node && vsi->agg_node->valid) 3009 vsi->agg_node->num_vsis--; 3010 ice_vsi_clear_rings(vsi); 3011 3012 ice_vsi_put_qs(vsi); 3013 3014 /* retain SW VSI data structure since it is needed to unregister and 3015 * free VSI netdev when PF is not in reset recovery pending state,\ 3016 * for ex: during rmmod. 3017 */ 3018 if (!ice_is_reset_in_progress(pf->state)) 3019 ice_vsi_clear(vsi); 3020 3021 return 0; 3022 } 3023 3024 /** 3025 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors 3026 * @vsi: VSI connected with q_vectors 3027 * @coalesce: array of struct with stored coalesce 3028 * 3029 * Returns array size. 3030 */ 3031 static int 3032 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi, 3033 struct ice_coalesce_stored *coalesce) 3034 { 3035 int i; 3036 3037 ice_for_each_q_vector(vsi, i) { 3038 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 3039 3040 coalesce[i].itr_tx = q_vector->tx.itr_setting; 3041 coalesce[i].itr_rx = q_vector->rx.itr_setting; 3042 coalesce[i].intrl = q_vector->intrl; 3043 3044 if (i < vsi->num_txq) 3045 coalesce[i].tx_valid = true; 3046 if (i < vsi->num_rxq) 3047 coalesce[i].rx_valid = true; 3048 } 3049 3050 return vsi->num_q_vectors; 3051 } 3052 3053 /** 3054 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays 3055 * @vsi: VSI connected with q_vectors 3056 * @coalesce: pointer to array of struct with stored coalesce 3057 * @size: size of coalesce array 3058 * 3059 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save 3060 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce 3061 * to default value. 3062 */ 3063 static void 3064 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi, 3065 struct ice_coalesce_stored *coalesce, int size) 3066 { 3067 struct ice_ring_container *rc; 3068 int i; 3069 3070 if ((size && !coalesce) || !vsi) 3071 return; 3072 3073 /* There are a couple of cases that have to be handled here: 3074 * 1. The case where the number of queue vectors stays the same, but 3075 * the number of Tx or Rx rings changes (the first for loop) 3076 * 2. The case where the number of queue vectors increased (the 3077 * second for loop) 3078 */ 3079 for (i = 0; i < size && i < vsi->num_q_vectors; i++) { 3080 /* There are 2 cases to handle here and they are the same for 3081 * both Tx and Rx: 3082 * if the entry was valid previously (coalesce[i].[tr]x_valid 3083 * and the loop variable is less than the number of rings 3084 * allocated, then write the previous values 3085 * 3086 * if the entry was not valid previously, but the number of 3087 * rings is less than are allocated (this means the number of 3088 * rings increased from previously), then write out the 3089 * values in the first element 3090 * 3091 * Also, always write the ITR, even if in ITR_IS_DYNAMIC 3092 * as there is no harm because the dynamic algorithm 3093 * will just overwrite. 3094 */ 3095 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) { 3096 rc = &vsi->q_vectors[i]->rx; 3097 rc->itr_setting = coalesce[i].itr_rx; 3098 ice_write_itr(rc, rc->itr_setting); 3099 } else if (i < vsi->alloc_rxq) { 3100 rc = &vsi->q_vectors[i]->rx; 3101 rc->itr_setting = coalesce[0].itr_rx; 3102 ice_write_itr(rc, rc->itr_setting); 3103 } 3104 3105 if (i < vsi->alloc_txq && coalesce[i].tx_valid) { 3106 rc = &vsi->q_vectors[i]->tx; 3107 rc->itr_setting = coalesce[i].itr_tx; 3108 ice_write_itr(rc, rc->itr_setting); 3109 } else if (i < vsi->alloc_txq) { 3110 rc = &vsi->q_vectors[i]->tx; 3111 rc->itr_setting = coalesce[0].itr_tx; 3112 ice_write_itr(rc, rc->itr_setting); 3113 } 3114 3115 vsi->q_vectors[i]->intrl = coalesce[i].intrl; 3116 ice_set_q_vector_intrl(vsi->q_vectors[i]); 3117 } 3118 3119 /* the number of queue vectors increased so write whatever is in 3120 * the first element 3121 */ 3122 for (; i < vsi->num_q_vectors; i++) { 3123 /* transmit */ 3124 rc = &vsi->q_vectors[i]->tx; 3125 rc->itr_setting = coalesce[0].itr_tx; 3126 ice_write_itr(rc, rc->itr_setting); 3127 3128 /* receive */ 3129 rc = &vsi->q_vectors[i]->rx; 3130 rc->itr_setting = coalesce[0].itr_rx; 3131 ice_write_itr(rc, rc->itr_setting); 3132 3133 vsi->q_vectors[i]->intrl = coalesce[0].intrl; 3134 ice_set_q_vector_intrl(vsi->q_vectors[i]); 3135 } 3136 } 3137 3138 /** 3139 * ice_vsi_rebuild - Rebuild VSI after reset 3140 * @vsi: VSI to be rebuild 3141 * @init_vsi: is this an initialization or a reconfigure of the VSI 3142 * 3143 * Returns 0 on success and negative value on failure 3144 */ 3145 int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi) 3146 { 3147 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3148 struct ice_coalesce_stored *coalesce; 3149 int prev_num_q_vectors = 0; 3150 enum ice_vsi_type vtype; 3151 struct ice_pf *pf; 3152 int ret, i; 3153 3154 if (!vsi) 3155 return -EINVAL; 3156 3157 pf = vsi->back; 3158 vtype = vsi->type; 3159 if (WARN_ON(vtype == ICE_VSI_VF) && !vsi->vf) 3160 return -EINVAL; 3161 3162 ice_vsi_init_vlan_ops(vsi); 3163 3164 coalesce = kcalloc(vsi->num_q_vectors, 3165 sizeof(struct ice_coalesce_stored), GFP_KERNEL); 3166 if (!coalesce) 3167 return -ENOMEM; 3168 3169 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce); 3170 3171 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 3172 ret = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 3173 if (ret) 3174 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 3175 vsi->vsi_num, ret); 3176 ice_vsi_free_q_vectors(vsi); 3177 3178 /* SR-IOV determines needed MSIX resources all at once instead of per 3179 * VSI since when VFs are spawned we know how many VFs there are and how 3180 * many interrupts each VF needs. SR-IOV MSIX resources are also 3181 * cleared in the same manner. 3182 */ 3183 if (vtype != ICE_VSI_VF) { 3184 /* reclaim SW interrupts back to the common pool */ 3185 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx); 3186 pf->num_avail_sw_msix += vsi->num_q_vectors; 3187 vsi->base_vector = 0; 3188 } 3189 3190 if (ice_is_xdp_ena_vsi(vsi)) 3191 /* return value check can be skipped here, it always returns 3192 * 0 if reset is in progress 3193 */ 3194 ice_destroy_xdp_rings(vsi); 3195 ice_vsi_put_qs(vsi); 3196 ice_vsi_clear_rings(vsi); 3197 ice_vsi_free_arrays(vsi); 3198 if (vtype == ICE_VSI_VF) 3199 ice_vsi_set_num_qs(vsi, vsi->vf); 3200 else 3201 ice_vsi_set_num_qs(vsi, NULL); 3202 3203 ret = ice_vsi_alloc_arrays(vsi); 3204 if (ret < 0) 3205 goto err_vsi; 3206 3207 ice_vsi_get_qs(vsi); 3208 3209 ice_alloc_fd_res(vsi); 3210 ice_vsi_set_tc_cfg(vsi); 3211 3212 /* Initialize VSI struct elements and create VSI in FW */ 3213 ret = ice_vsi_init(vsi, init_vsi); 3214 if (ret < 0) 3215 goto err_vsi; 3216 3217 switch (vtype) { 3218 case ICE_VSI_CTRL: 3219 case ICE_VSI_SWITCHDEV_CTRL: 3220 case ICE_VSI_PF: 3221 ret = ice_vsi_alloc_q_vectors(vsi); 3222 if (ret) 3223 goto err_rings; 3224 3225 ret = ice_vsi_setup_vector_base(vsi); 3226 if (ret) 3227 goto err_vectors; 3228 3229 ret = ice_vsi_set_q_vectors_reg_idx(vsi); 3230 if (ret) 3231 goto err_vectors; 3232 3233 ret = ice_vsi_alloc_rings(vsi); 3234 if (ret) 3235 goto err_vectors; 3236 3237 ice_vsi_map_rings_to_vectors(vsi); 3238 if (ice_is_xdp_ena_vsi(vsi)) { 3239 ret = ice_vsi_determine_xdp_res(vsi); 3240 if (ret) 3241 goto err_vectors; 3242 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog); 3243 if (ret) 3244 goto err_vectors; 3245 } 3246 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 3247 if (vtype != ICE_VSI_CTRL) 3248 /* Do not exit if configuring RSS had an issue, at 3249 * least receive traffic on first queue. Hence no 3250 * need to capture return value 3251 */ 3252 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 3253 ice_vsi_cfg_rss_lut_key(vsi); 3254 break; 3255 case ICE_VSI_VF: 3256 ret = ice_vsi_alloc_q_vectors(vsi); 3257 if (ret) 3258 goto err_rings; 3259 3260 ret = ice_vsi_set_q_vectors_reg_idx(vsi); 3261 if (ret) 3262 goto err_vectors; 3263 3264 ret = ice_vsi_alloc_rings(vsi); 3265 if (ret) 3266 goto err_vectors; 3267 3268 break; 3269 case ICE_VSI_CHNL: 3270 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 3271 ice_vsi_cfg_rss_lut_key(vsi); 3272 ice_vsi_set_rss_flow_fld(vsi); 3273 } 3274 break; 3275 default: 3276 break; 3277 } 3278 3279 /* configure VSI nodes based on number of queues and TC's */ 3280 for (i = 0; i < vsi->tc_cfg.numtc; i++) { 3281 /* configure VSI nodes based on number of queues and TC's. 3282 * ADQ creates VSIs for each TC/Channel but doesn't 3283 * allocate queues instead it reconfigures the PF queues 3284 * as per the TC command. So max_txqs should point to the 3285 * PF Tx queues. 3286 */ 3287 if (vtype == ICE_VSI_CHNL) 3288 max_txqs[i] = pf->num_lan_tx; 3289 else 3290 max_txqs[i] = vsi->alloc_txq; 3291 3292 if (ice_is_xdp_ena_vsi(vsi)) 3293 max_txqs[i] += vsi->num_xdp_txq; 3294 } 3295 3296 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3297 /* If MQPRIO is set, means channel code path, hence for main 3298 * VSI's, use TC as 1 3299 */ 3300 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3301 else 3302 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3303 vsi->tc_cfg.ena_tc, max_txqs); 3304 3305 if (ret) { 3306 dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %d\n", 3307 vsi->vsi_num, ret); 3308 if (init_vsi) { 3309 ret = -EIO; 3310 goto err_vectors; 3311 } else { 3312 return ice_schedule_reset(pf, ICE_RESET_PFR); 3313 } 3314 } 3315 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors); 3316 kfree(coalesce); 3317 3318 return 0; 3319 3320 err_vectors: 3321 ice_vsi_free_q_vectors(vsi); 3322 err_rings: 3323 if (vsi->netdev) { 3324 vsi->current_netdev_flags = 0; 3325 unregister_netdev(vsi->netdev); 3326 free_netdev(vsi->netdev); 3327 vsi->netdev = NULL; 3328 } 3329 err_vsi: 3330 ice_vsi_clear(vsi); 3331 set_bit(ICE_RESET_FAILED, pf->state); 3332 kfree(coalesce); 3333 return ret; 3334 } 3335 3336 /** 3337 * ice_is_reset_in_progress - check for a reset in progress 3338 * @state: PF state field 3339 */ 3340 bool ice_is_reset_in_progress(unsigned long *state) 3341 { 3342 return test_bit(ICE_RESET_OICR_RECV, state) || 3343 test_bit(ICE_PFR_REQ, state) || 3344 test_bit(ICE_CORER_REQ, state) || 3345 test_bit(ICE_GLOBR_REQ, state); 3346 } 3347 3348 /** 3349 * ice_wait_for_reset - Wait for driver to finish reset and rebuild 3350 * @pf: pointer to the PF structure 3351 * @timeout: length of time to wait, in jiffies 3352 * 3353 * Wait (sleep) for a short time until the driver finishes cleaning up from 3354 * a device reset. The caller must be able to sleep. Use this to delay 3355 * operations that could fail while the driver is cleaning up after a device 3356 * reset. 3357 * 3358 * Returns 0 on success, -EBUSY if the reset is not finished within the 3359 * timeout, and -ERESTARTSYS if the thread was interrupted. 3360 */ 3361 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout) 3362 { 3363 long ret; 3364 3365 ret = wait_event_interruptible_timeout(pf->reset_wait_queue, 3366 !ice_is_reset_in_progress(pf->state), 3367 timeout); 3368 if (ret < 0) 3369 return ret; 3370 else if (!ret) 3371 return -EBUSY; 3372 else 3373 return 0; 3374 } 3375 3376 /** 3377 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map 3378 * @vsi: VSI being configured 3379 * @ctx: the context buffer returned from AQ VSI update command 3380 */ 3381 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx) 3382 { 3383 vsi->info.mapping_flags = ctx->info.mapping_flags; 3384 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping, 3385 sizeof(vsi->info.q_mapping)); 3386 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping, 3387 sizeof(vsi->info.tc_mapping)); 3388 } 3389 3390 /** 3391 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration 3392 * @vsi: the VSI being configured 3393 * @ena_tc: TC map to be enabled 3394 */ 3395 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc) 3396 { 3397 struct net_device *netdev = vsi->netdev; 3398 struct ice_pf *pf = vsi->back; 3399 int numtc = vsi->tc_cfg.numtc; 3400 struct ice_dcbx_cfg *dcbcfg; 3401 u8 netdev_tc; 3402 int i; 3403 3404 if (!netdev) 3405 return; 3406 3407 /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */ 3408 if (vsi->type == ICE_VSI_CHNL) 3409 return; 3410 3411 if (!ena_tc) { 3412 netdev_reset_tc(netdev); 3413 return; 3414 } 3415 3416 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf)) 3417 numtc = vsi->all_numtc; 3418 3419 if (netdev_set_num_tc(netdev, numtc)) 3420 return; 3421 3422 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; 3423 3424 ice_for_each_traffic_class(i) 3425 if (vsi->tc_cfg.ena_tc & BIT(i)) 3426 netdev_set_tc_queue(netdev, 3427 vsi->tc_cfg.tc_info[i].netdev_tc, 3428 vsi->tc_cfg.tc_info[i].qcount_tx, 3429 vsi->tc_cfg.tc_info[i].qoffset); 3430 /* setup TC queue map for CHNL TCs */ 3431 ice_for_each_chnl_tc(i) { 3432 if (!(vsi->all_enatc & BIT(i))) 3433 break; 3434 if (!vsi->mqprio_qopt.qopt.count[i]) 3435 break; 3436 netdev_set_tc_queue(netdev, i, 3437 vsi->mqprio_qopt.qopt.count[i], 3438 vsi->mqprio_qopt.qopt.offset[i]); 3439 } 3440 3441 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3442 return; 3443 3444 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) { 3445 u8 ets_tc = dcbcfg->etscfg.prio_table[i]; 3446 3447 /* Get the mapped netdev TC# for the UP */ 3448 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc; 3449 netdev_set_prio_tc_map(netdev, i, netdev_tc); 3450 } 3451 } 3452 3453 /** 3454 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config 3455 * @vsi: the VSI being configured, 3456 * @ctxt: VSI context structure 3457 * @ena_tc: number of traffic classes to enable 3458 * 3459 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 3460 */ 3461 static void 3462 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt, 3463 u8 ena_tc) 3464 { 3465 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap; 3466 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0]; 3467 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0]; 3468 u8 netdev_tc = 0; 3469 int i; 3470 3471 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1; 3472 3473 pow = order_base_2(tc0_qcount); 3474 qmap = ((tc0_offset << ICE_AQ_VSI_TC_Q_OFFSET_S) & 3475 ICE_AQ_VSI_TC_Q_OFFSET_M) | 3476 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) & ICE_AQ_VSI_TC_Q_NUM_M); 3477 3478 ice_for_each_traffic_class(i) { 3479 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 3480 /* TC is not enabled */ 3481 vsi->tc_cfg.tc_info[i].qoffset = 0; 3482 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 3483 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 3484 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 3485 ctxt->info.tc_mapping[i] = 0; 3486 continue; 3487 } 3488 3489 offset = vsi->mqprio_qopt.qopt.offset[i]; 3490 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3491 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3492 vsi->tc_cfg.tc_info[i].qoffset = offset; 3493 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx; 3494 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx; 3495 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 3496 } 3497 3498 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) { 3499 ice_for_each_chnl_tc(i) { 3500 if (!(vsi->all_enatc & BIT(i))) 3501 continue; 3502 offset = vsi->mqprio_qopt.qopt.offset[i]; 3503 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3504 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3505 } 3506 } 3507 3508 /* Set actual Tx/Rx queue pairs */ 3509 vsi->num_txq = offset + qcount_tx; 3510 vsi->num_rxq = offset + qcount_rx; 3511 3512 /* Setup queue TC[0].qmap for given VSI context */ 3513 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 3514 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 3515 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount); 3516 3517 /* Find queue count available for channel VSIs and starting offset 3518 * for channel VSIs 3519 */ 3520 if (tc0_qcount && tc0_qcount < vsi->num_rxq) { 3521 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount; 3522 vsi->next_base_q = tc0_qcount; 3523 } 3524 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq); 3525 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq); 3526 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n", 3527 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc); 3528 } 3529 3530 /** 3531 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map 3532 * @vsi: VSI to be configured 3533 * @ena_tc: TC bitmap 3534 * 3535 * VSI queues expected to be quiesced before calling this function 3536 */ 3537 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc) 3538 { 3539 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3540 struct ice_pf *pf = vsi->back; 3541 struct ice_vsi_ctx *ctx; 3542 struct device *dev; 3543 int i, ret = 0; 3544 u8 num_tc = 0; 3545 3546 dev = ice_pf_to_dev(pf); 3547 if (vsi->tc_cfg.ena_tc == ena_tc && 3548 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 3549 return ret; 3550 3551 ice_for_each_traffic_class(i) { 3552 /* build bitmap of enabled TCs */ 3553 if (ena_tc & BIT(i)) 3554 num_tc++; 3555 /* populate max_txqs per TC */ 3556 max_txqs[i] = vsi->alloc_txq; 3557 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are 3558 * zero for CHNL VSI, hence use num_txq instead as max_txqs 3559 */ 3560 if (vsi->type == ICE_VSI_CHNL && 3561 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3562 max_txqs[i] = vsi->num_txq; 3563 } 3564 3565 vsi->tc_cfg.ena_tc = ena_tc; 3566 vsi->tc_cfg.numtc = num_tc; 3567 3568 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 3569 if (!ctx) 3570 return -ENOMEM; 3571 3572 ctx->vf_num = 0; 3573 ctx->info = vsi->info; 3574 3575 if (vsi->type == ICE_VSI_PF && 3576 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3577 ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc); 3578 else 3579 ice_vsi_setup_q_map(vsi, ctx); 3580 3581 /* must to indicate which section of VSI context are being modified */ 3582 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 3583 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL); 3584 if (ret) { 3585 dev_info(dev, "Failed VSI Update\n"); 3586 goto out; 3587 } 3588 3589 if (vsi->type == ICE_VSI_PF && 3590 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3591 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3592 else 3593 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3594 vsi->tc_cfg.ena_tc, max_txqs); 3595 3596 if (ret) { 3597 dev_err(dev, "VSI %d failed TC config, error %d\n", 3598 vsi->vsi_num, ret); 3599 goto out; 3600 } 3601 ice_vsi_update_q_map(vsi, ctx); 3602 vsi->info.valid_sections = 0; 3603 3604 ice_vsi_cfg_netdev_tc(vsi, ena_tc); 3605 out: 3606 kfree(ctx); 3607 return ret; 3608 } 3609 3610 /** 3611 * ice_update_ring_stats - Update ring statistics 3612 * @stats: stats to be updated 3613 * @pkts: number of processed packets 3614 * @bytes: number of processed bytes 3615 * 3616 * This function assumes that caller has acquired a u64_stats_sync lock. 3617 */ 3618 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes) 3619 { 3620 stats->bytes += bytes; 3621 stats->pkts += pkts; 3622 } 3623 3624 /** 3625 * ice_update_tx_ring_stats - Update Tx ring specific counters 3626 * @tx_ring: ring to update 3627 * @pkts: number of processed packets 3628 * @bytes: number of processed bytes 3629 */ 3630 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes) 3631 { 3632 u64_stats_update_begin(&tx_ring->syncp); 3633 ice_update_ring_stats(&tx_ring->stats, pkts, bytes); 3634 u64_stats_update_end(&tx_ring->syncp); 3635 } 3636 3637 /** 3638 * ice_update_rx_ring_stats - Update Rx ring specific counters 3639 * @rx_ring: ring to update 3640 * @pkts: number of processed packets 3641 * @bytes: number of processed bytes 3642 */ 3643 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes) 3644 { 3645 u64_stats_update_begin(&rx_ring->syncp); 3646 ice_update_ring_stats(&rx_ring->stats, pkts, bytes); 3647 u64_stats_update_end(&rx_ring->syncp); 3648 } 3649 3650 /** 3651 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used 3652 * @sw: switch to check if its default forwarding VSI is free 3653 * 3654 * Return true if the default forwarding VSI is already being used, else returns 3655 * false signalling that it's available to use. 3656 */ 3657 bool ice_is_dflt_vsi_in_use(struct ice_sw *sw) 3658 { 3659 return (sw->dflt_vsi && sw->dflt_vsi_ena); 3660 } 3661 3662 /** 3663 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI 3664 * @sw: switch for the default forwarding VSI to compare against 3665 * @vsi: VSI to compare against default forwarding VSI 3666 * 3667 * If this VSI passed in is the default forwarding VSI then return true, else 3668 * return false 3669 */ 3670 bool ice_is_vsi_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi) 3671 { 3672 return (sw->dflt_vsi == vsi && sw->dflt_vsi_ena); 3673 } 3674 3675 /** 3676 * ice_set_dflt_vsi - set the default forwarding VSI 3677 * @sw: switch used to assign the default forwarding VSI 3678 * @vsi: VSI getting set as the default forwarding VSI on the switch 3679 * 3680 * If the VSI passed in is already the default VSI and it's enabled just return 3681 * success. 3682 * 3683 * If there is already a default VSI on the switch and it's enabled then return 3684 * -EEXIST since there can only be one default VSI per switch. 3685 * 3686 * Otherwise try to set the VSI passed in as the switch's default VSI and 3687 * return the result. 3688 */ 3689 int ice_set_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi) 3690 { 3691 struct device *dev; 3692 int status; 3693 3694 if (!sw || !vsi) 3695 return -EINVAL; 3696 3697 dev = ice_pf_to_dev(vsi->back); 3698 3699 /* the VSI passed in is already the default VSI */ 3700 if (ice_is_vsi_dflt_vsi(sw, vsi)) { 3701 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n", 3702 vsi->vsi_num); 3703 return 0; 3704 } 3705 3706 /* another VSI is already the default VSI for this switch */ 3707 if (ice_is_dflt_vsi_in_use(sw)) { 3708 dev_err(dev, "Default forwarding VSI %d already in use, disable it and try again\n", 3709 sw->dflt_vsi->vsi_num); 3710 return -EEXIST; 3711 } 3712 3713 status = ice_cfg_dflt_vsi(&vsi->back->hw, vsi->idx, true, ICE_FLTR_RX); 3714 if (status) { 3715 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n", 3716 vsi->vsi_num, status); 3717 return status; 3718 } 3719 3720 sw->dflt_vsi = vsi; 3721 sw->dflt_vsi_ena = true; 3722 3723 return 0; 3724 } 3725 3726 /** 3727 * ice_clear_dflt_vsi - clear the default forwarding VSI 3728 * @sw: switch used to clear the default VSI 3729 * 3730 * If the switch has no default VSI or it's not enabled then return error. 3731 * 3732 * Otherwise try to clear the default VSI and return the result. 3733 */ 3734 int ice_clear_dflt_vsi(struct ice_sw *sw) 3735 { 3736 struct ice_vsi *dflt_vsi; 3737 struct device *dev; 3738 int status; 3739 3740 if (!sw) 3741 return -EINVAL; 3742 3743 dev = ice_pf_to_dev(sw->pf); 3744 3745 dflt_vsi = sw->dflt_vsi; 3746 3747 /* there is no default VSI configured */ 3748 if (!ice_is_dflt_vsi_in_use(sw)) 3749 return -ENODEV; 3750 3751 status = ice_cfg_dflt_vsi(&dflt_vsi->back->hw, dflt_vsi->idx, false, 3752 ICE_FLTR_RX); 3753 if (status) { 3754 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n", 3755 dflt_vsi->vsi_num, status); 3756 return -EIO; 3757 } 3758 3759 sw->dflt_vsi = NULL; 3760 sw->dflt_vsi_ena = false; 3761 3762 return 0; 3763 } 3764 3765 /** 3766 * ice_get_link_speed_mbps - get link speed in Mbps 3767 * @vsi: the VSI whose link speed is being queried 3768 * 3769 * Return current VSI link speed and 0 if the speed is unknown. 3770 */ 3771 int ice_get_link_speed_mbps(struct ice_vsi *vsi) 3772 { 3773 switch (vsi->port_info->phy.link_info.link_speed) { 3774 case ICE_AQ_LINK_SPEED_100GB: 3775 return SPEED_100000; 3776 case ICE_AQ_LINK_SPEED_50GB: 3777 return SPEED_50000; 3778 case ICE_AQ_LINK_SPEED_40GB: 3779 return SPEED_40000; 3780 case ICE_AQ_LINK_SPEED_25GB: 3781 return SPEED_25000; 3782 case ICE_AQ_LINK_SPEED_20GB: 3783 return SPEED_20000; 3784 case ICE_AQ_LINK_SPEED_10GB: 3785 return SPEED_10000; 3786 case ICE_AQ_LINK_SPEED_5GB: 3787 return SPEED_5000; 3788 case ICE_AQ_LINK_SPEED_2500MB: 3789 return SPEED_2500; 3790 case ICE_AQ_LINK_SPEED_1000MB: 3791 return SPEED_1000; 3792 case ICE_AQ_LINK_SPEED_100MB: 3793 return SPEED_100; 3794 case ICE_AQ_LINK_SPEED_10MB: 3795 return SPEED_10; 3796 case ICE_AQ_LINK_SPEED_UNKNOWN: 3797 default: 3798 return 0; 3799 } 3800 } 3801 3802 /** 3803 * ice_get_link_speed_kbps - get link speed in Kbps 3804 * @vsi: the VSI whose link speed is being queried 3805 * 3806 * Return current VSI link speed and 0 if the speed is unknown. 3807 */ 3808 int ice_get_link_speed_kbps(struct ice_vsi *vsi) 3809 { 3810 int speed_mbps; 3811 3812 speed_mbps = ice_get_link_speed_mbps(vsi); 3813 3814 return speed_mbps * 1000; 3815 } 3816 3817 /** 3818 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate 3819 * @vsi: VSI to be configured 3820 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit 3821 * 3822 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit 3823 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI 3824 * on TC 0. 3825 */ 3826 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate) 3827 { 3828 struct ice_pf *pf = vsi->back; 3829 struct device *dev; 3830 int status; 3831 int speed; 3832 3833 dev = ice_pf_to_dev(pf); 3834 if (!vsi->port_info) { 3835 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3836 vsi->idx, vsi->type); 3837 return -EINVAL; 3838 } 3839 3840 speed = ice_get_link_speed_kbps(vsi); 3841 if (min_tx_rate > (u64)speed) { 3842 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3843 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3844 speed); 3845 return -EINVAL; 3846 } 3847 3848 /* Configure min BW for VSI limit */ 3849 if (min_tx_rate) { 3850 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3851 ICE_MIN_BW, min_tx_rate); 3852 if (status) { 3853 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n", 3854 min_tx_rate, ice_vsi_type_str(vsi->type), 3855 vsi->idx); 3856 return status; 3857 } 3858 3859 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n", 3860 min_tx_rate, ice_vsi_type_str(vsi->type)); 3861 } else { 3862 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3863 vsi->idx, 0, 3864 ICE_MIN_BW); 3865 if (status) { 3866 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n", 3867 ice_vsi_type_str(vsi->type), vsi->idx); 3868 return status; 3869 } 3870 3871 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n", 3872 ice_vsi_type_str(vsi->type), vsi->idx); 3873 } 3874 3875 return 0; 3876 } 3877 3878 /** 3879 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate 3880 * @vsi: VSI to be configured 3881 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit 3882 * 3883 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit 3884 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI 3885 * on TC 0. 3886 */ 3887 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate) 3888 { 3889 struct ice_pf *pf = vsi->back; 3890 struct device *dev; 3891 int status; 3892 int speed; 3893 3894 dev = ice_pf_to_dev(pf); 3895 if (!vsi->port_info) { 3896 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3897 vsi->idx, vsi->type); 3898 return -EINVAL; 3899 } 3900 3901 speed = ice_get_link_speed_kbps(vsi); 3902 if (max_tx_rate > (u64)speed) { 3903 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3904 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3905 speed); 3906 return -EINVAL; 3907 } 3908 3909 /* Configure max BW for VSI limit */ 3910 if (max_tx_rate) { 3911 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3912 ICE_MAX_BW, max_tx_rate); 3913 if (status) { 3914 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n", 3915 max_tx_rate, ice_vsi_type_str(vsi->type), 3916 vsi->idx); 3917 return status; 3918 } 3919 3920 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n", 3921 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx); 3922 } else { 3923 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3924 vsi->idx, 0, 3925 ICE_MAX_BW); 3926 if (status) { 3927 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n", 3928 ice_vsi_type_str(vsi->type), vsi->idx); 3929 return status; 3930 } 3931 3932 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n", 3933 ice_vsi_type_str(vsi->type), vsi->idx); 3934 } 3935 3936 return 0; 3937 } 3938 3939 /** 3940 * ice_set_link - turn on/off physical link 3941 * @vsi: VSI to modify physical link on 3942 * @ena: turn on/off physical link 3943 */ 3944 int ice_set_link(struct ice_vsi *vsi, bool ena) 3945 { 3946 struct device *dev = ice_pf_to_dev(vsi->back); 3947 struct ice_port_info *pi = vsi->port_info; 3948 struct ice_hw *hw = pi->hw; 3949 int status; 3950 3951 if (vsi->type != ICE_VSI_PF) 3952 return -EINVAL; 3953 3954 status = ice_aq_set_link_restart_an(pi, ena, NULL); 3955 3956 /* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE. 3957 * this is not a fatal error, so print a warning message and return 3958 * a success code. Return an error if FW returns an error code other 3959 * than ICE_AQ_RC_EMODE 3960 */ 3961 if (status == -EIO) { 3962 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE) 3963 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n", 3964 (ena ? "ON" : "OFF"), status, 3965 ice_aq_str(hw->adminq.sq_last_status)); 3966 } else if (status) { 3967 dev_err(dev, "can't set link to %s, err %d aq_err %s\n", 3968 (ena ? "ON" : "OFF"), status, 3969 ice_aq_str(hw->adminq.sq_last_status)); 3970 return status; 3971 } 3972 3973 return 0; 3974 } 3975 3976 /** 3977 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI 3978 * @vsi: VSI used to add VLAN filters 3979 * 3980 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based 3981 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't 3982 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via 3983 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID. 3984 * 3985 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic 3986 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged 3987 * traffic in SVM, since the VLAN TPID isn't part of filtering. 3988 * 3989 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be 3990 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is 3991 * part of filtering. 3992 */ 3993 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi) 3994 { 3995 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3996 struct ice_vlan vlan; 3997 int err; 3998 3999 vlan = ICE_VLAN(0, 0, 0); 4000 err = vlan_ops->add_vlan(vsi, &vlan); 4001 if (err && err != -EEXIST) 4002 return err; 4003 4004 /* in SVM both VLAN 0 filters are identical */ 4005 if (!ice_is_dvm_ena(&vsi->back->hw)) 4006 return 0; 4007 4008 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 4009 err = vlan_ops->add_vlan(vsi, &vlan); 4010 if (err && err != -EEXIST) 4011 return err; 4012 4013 return 0; 4014 } 4015 4016 /** 4017 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI 4018 * @vsi: VSI used to add VLAN filters 4019 * 4020 * Delete the VLAN 0 filters in the same manner that they were added in 4021 * ice_vsi_add_vlan_zero. 4022 */ 4023 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi) 4024 { 4025 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 4026 struct ice_vlan vlan; 4027 int err; 4028 4029 vlan = ICE_VLAN(0, 0, 0); 4030 err = vlan_ops->del_vlan(vsi, &vlan); 4031 if (err && err != -EEXIST) 4032 return err; 4033 4034 /* in SVM both VLAN 0 filters are identical */ 4035 if (!ice_is_dvm_ena(&vsi->back->hw)) 4036 return 0; 4037 4038 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 4039 err = vlan_ops->del_vlan(vsi, &vlan); 4040 if (err && err != -EEXIST) 4041 return err; 4042 4043 return 0; 4044 } 4045 4046 /** 4047 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode 4048 * @vsi: VSI used to get the VLAN mode 4049 * 4050 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled 4051 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details. 4052 */ 4053 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi) 4054 { 4055 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2 4056 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1 4057 /* no VLAN 0 filter is created when a port VLAN is active */ 4058 if (vsi->type == ICE_VSI_VF) { 4059 if (WARN_ON(!vsi->vf)) 4060 return 0; 4061 4062 if (ice_vf_is_port_vlan_ena(vsi->vf)) 4063 return 0; 4064 } 4065 4066 if (ice_is_dvm_ena(&vsi->back->hw)) 4067 return ICE_DVM_NUM_ZERO_VLAN_FLTRS; 4068 else 4069 return ICE_SVM_NUM_ZERO_VLAN_FLTRS; 4070 } 4071 4072 /** 4073 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs 4074 * @vsi: VSI used to determine if any non-zero VLANs have been added 4075 */ 4076 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi) 4077 { 4078 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi)); 4079 } 4080 4081 /** 4082 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI 4083 * @vsi: VSI used to get the number of non-zero VLANs added 4084 */ 4085 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi) 4086 { 4087 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi)); 4088 } 4089 4090 /** 4091 * ice_is_feature_supported 4092 * @pf: pointer to the struct ice_pf instance 4093 * @f: feature enum to be checked 4094 * 4095 * returns true if feature is supported, false otherwise 4096 */ 4097 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f) 4098 { 4099 if (f < 0 || f >= ICE_F_MAX) 4100 return false; 4101 4102 return test_bit(f, pf->features); 4103 } 4104 4105 /** 4106 * ice_set_feature_support 4107 * @pf: pointer to the struct ice_pf instance 4108 * @f: feature enum to set 4109 */ 4110 static void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f) 4111 { 4112 if (f < 0 || f >= ICE_F_MAX) 4113 return; 4114 4115 set_bit(f, pf->features); 4116 } 4117 4118 /** 4119 * ice_clear_feature_support 4120 * @pf: pointer to the struct ice_pf instance 4121 * @f: feature enum to clear 4122 */ 4123 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f) 4124 { 4125 if (f < 0 || f >= ICE_F_MAX) 4126 return; 4127 4128 clear_bit(f, pf->features); 4129 } 4130 4131 /** 4132 * ice_init_feature_support 4133 * @pf: pointer to the struct ice_pf instance 4134 * 4135 * called during init to setup supported feature 4136 */ 4137 void ice_init_feature_support(struct ice_pf *pf) 4138 { 4139 switch (pf->hw.device_id) { 4140 case ICE_DEV_ID_E810C_BACKPLANE: 4141 case ICE_DEV_ID_E810C_QSFP: 4142 case ICE_DEV_ID_E810C_SFP: 4143 ice_set_feature_support(pf, ICE_F_DSCP); 4144 if (ice_is_e810t(&pf->hw)) { 4145 ice_set_feature_support(pf, ICE_F_SMA_CTRL); 4146 if (ice_gnss_is_gps_present(&pf->hw)) 4147 ice_set_feature_support(pf, ICE_F_GNSS); 4148 } 4149 break; 4150 default: 4151 break; 4152 } 4153 } 4154 4155 /** 4156 * ice_vsi_update_security - update security block in VSI 4157 * @vsi: pointer to VSI structure 4158 * @fill: function pointer to fill ctx 4159 */ 4160 int 4161 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *)) 4162 { 4163 struct ice_vsi_ctx ctx = { 0 }; 4164 4165 ctx.info = vsi->info; 4166 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 4167 fill(&ctx); 4168 4169 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 4170 return -ENODEV; 4171 4172 vsi->info = ctx.info; 4173 return 0; 4174 } 4175 4176 /** 4177 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx 4178 * @ctx: pointer to VSI ctx structure 4179 */ 4180 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx) 4181 { 4182 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF | 4183 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 4184 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 4185 } 4186 4187 /** 4188 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx 4189 * @ctx: pointer to VSI ctx structure 4190 */ 4191 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx) 4192 { 4193 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF & 4194 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 4195 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 4196 } 4197 4198 /** 4199 * ice_vsi_ctx_set_allow_override - allow destination override on VSI 4200 * @ctx: pointer to VSI ctx structure 4201 */ 4202 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx) 4203 { 4204 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 4205 } 4206 4207 /** 4208 * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI 4209 * @ctx: pointer to VSI ctx structure 4210 */ 4211 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx) 4212 { 4213 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 4214 } 4215