1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 /* Machine-generated file */ 5 6 #ifndef _ICE_HW_AUTOGEN_H_ 7 #define _ICE_HW_AUTOGEN_H_ 8 9 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4)) 10 #define PF_FW_ARQBAH 0x00080180 11 #define PF_FW_ARQBAL 0x00080080 12 #define PF_FW_ARQH 0x00080380 13 #define PF_FW_ARQH_ARQH_M ICE_M(0x3FF, 0) 14 #define PF_FW_ARQLEN 0x00080280 15 #define PF_FW_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0) 16 #define PF_FW_ARQLEN_ARQVFE_M BIT(28) 17 #define PF_FW_ARQLEN_ARQOVFL_M BIT(29) 18 #define PF_FW_ARQLEN_ARQCRIT_M BIT(30) 19 #define PF_FW_ARQLEN_ARQENABLE_M BIT(31) 20 #define PF_FW_ARQT 0x00080480 21 #define PF_FW_ATQBAH 0x00080100 22 #define PF_FW_ATQBAL 0x00080000 23 #define PF_FW_ATQH 0x00080300 24 #define PF_FW_ATQH_ATQH_M ICE_M(0x3FF, 0) 25 #define PF_FW_ATQLEN 0x00080200 26 #define PF_FW_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0) 27 #define PF_FW_ATQLEN_ATQVFE_M BIT(28) 28 #define PF_FW_ATQLEN_ATQOVFL_M BIT(29) 29 #define PF_FW_ATQLEN_ATQCRIT_M BIT(30) 30 #define PF_FW_ATQLEN_ATQENABLE_M BIT(31) 31 #define PF_FW_ATQT 0x00080400 32 #define GLFLXP_RXDID_FLAGS(_i, _j) (0x0045D000 + ((_i) * 4 + (_j) * 256)) 33 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S 0 34 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M ICE_M(0x3F, 0) 35 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S 8 36 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M ICE_M(0x3F, 8) 37 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S 16 38 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M ICE_M(0x3F, 16) 39 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S 24 40 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M ICE_M(0x3F, 24) 41 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045c800 + ((_i) * 4)) 42 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S 0 43 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_M ICE_M(0xFF, 0) 44 #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_S 30 45 #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_M ICE_M(0x3, 30) 46 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045c900 + ((_i) * 4)) 47 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_S 0 48 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_M ICE_M(0xFF, 0) 49 #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_S 30 50 #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_M ICE_M(0x3, 30) 51 #define GLFLXP_RXDID_FLX_WRD_2(_i) (0x0045ca00 + ((_i) * 4)) 52 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_S 0 53 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_M ICE_M(0xFF, 0) 54 #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_S 30 55 #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_M ICE_M(0x3, 30) 56 #define GLFLXP_RXDID_FLX_WRD_3(_i) (0x0045cb00 + ((_i) * 4)) 57 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_S 0 58 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_M ICE_M(0xFF, 0) 59 #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_S 30 60 #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_M ICE_M(0x3, 30) 61 #define QRXFLXP_CNTXT(_QRX) (0x00480000 + ((_QRX) * 4)) 62 #define QRXFLXP_CNTXT_RXDID_IDX_S 0 63 #define QRXFLXP_CNTXT_RXDID_IDX_M ICE_M(0x3F, 0) 64 #define QRXFLXP_CNTXT_RXDID_PRIO_S 8 65 #define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8) 66 #define GLGEN_RSTAT 0x000B8188 67 #define GLGEN_RSTAT_DEVSTATE_M ICE_M(0x3, 0) 68 #define GLGEN_RSTCTL 0x000B8180 69 #define GLGEN_RSTCTL_GRSTDEL_S 0 70 #define GLGEN_RSTCTL_GRSTDEL_M ICE_M(0x3F, GLGEN_RSTCTL_GRSTDEL_S) 71 #define GLGEN_RSTAT_RESET_TYPE_S 2 72 #define GLGEN_RSTAT_RESET_TYPE_M ICE_M(0x3, 2) 73 #define GLGEN_RTRIG 0x000B8190 74 #define GLGEN_RTRIG_CORER_M BIT(0) 75 #define GLGEN_RTRIG_GLOBR_M BIT(1) 76 #define GLGEN_STAT 0x000B612C 77 #define PFGEN_CTRL 0x00091000 78 #define PFGEN_CTRL_PFSWR_M BIT(0) 79 #define PFGEN_STATE 0x00088000 80 #define PRTGEN_STATUS 0x000B8100 81 #define PFHMC_ERRORDATA 0x00520500 82 #define PFHMC_ERRORINFO 0x00520400 83 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4)) 84 #define GLINT_DYN_CTL_INTENA_M BIT(0) 85 #define GLINT_DYN_CTL_CLEARPBA_M BIT(1) 86 #define GLINT_DYN_CTL_SWINT_TRIG_M BIT(2) 87 #define GLINT_DYN_CTL_ITR_INDX_S 3 88 #define GLINT_DYN_CTL_SW_ITR_INDX_M ICE_M(0x3, 25) 89 #define GLINT_DYN_CTL_INTENA_MSK_M BIT(31) 90 #define GLINT_ITR(_i, _INT) (0x00154000 + ((_i) * 8192 + (_INT) * 4)) 91 #define PFINT_FW_CTL 0x0016C800 92 #define PFINT_FW_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) 93 #define PFINT_FW_CTL_ITR_INDX_S 11 94 #define PFINT_FW_CTL_ITR_INDX_M ICE_M(0x3, 11) 95 #define PFINT_FW_CTL_CAUSE_ENA_M BIT(30) 96 #define PFINT_OICR 0x0016CA00 97 #define PFINT_OICR_ECC_ERR_M BIT(16) 98 #define PFINT_OICR_MAL_DETECT_M BIT(19) 99 #define PFINT_OICR_GRST_M BIT(20) 100 #define PFINT_OICR_PCI_EXCEPTION_M BIT(21) 101 #define PFINT_OICR_HMC_ERR_M BIT(26) 102 #define PFINT_OICR_PE_CRITERR_M BIT(28) 103 #define PFINT_OICR_CTL 0x0016CA80 104 #define PFINT_OICR_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) 105 #define PFINT_OICR_CTL_ITR_INDX_S 11 106 #define PFINT_OICR_CTL_ITR_INDX_M ICE_M(0x3, 11) 107 #define PFINT_OICR_CTL_CAUSE_ENA_M BIT(30) 108 #define PFINT_OICR_ENA 0x0016C900 109 #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4)) 110 #define QINT_RQCTL_MSIX_INDX_S 0 111 #define QINT_RQCTL_ITR_INDX_S 11 112 #define QINT_RQCTL_CAUSE_ENA_M BIT(30) 113 #define QINT_TQCTL(_DBQM) (0x00140000 + ((_DBQM) * 4)) 114 #define QINT_TQCTL_MSIX_INDX_S 0 115 #define QINT_TQCTL_ITR_INDX_S 11 116 #define QINT_TQCTL_CAUSE_ENA_M BIT(30) 117 #define QRX_CONTEXT(_i, _QRX) (0x00280000 + ((_i) * 8192 + (_QRX) * 4)) 118 #define QRX_CTRL(_QRX) (0x00120000 + ((_QRX) * 4)) 119 #define QRX_CTRL_MAX_INDEX 2047 120 #define QRX_CTRL_QENA_REQ_S 0 121 #define QRX_CTRL_QENA_REQ_M BIT(0) 122 #define QRX_CTRL_QENA_STAT_S 2 123 #define QRX_CTRL_QENA_STAT_M BIT(2) 124 #define QRX_ITR(_QRX) (0x00292000 + ((_QRX) * 4)) 125 #define QRX_TAIL(_QRX) (0x00290000 + ((_QRX) * 4)) 126 #define QRX_TAIL_MAX_INDEX 2047 127 #define QRX_TAIL_TAIL_S 0 128 #define QRX_TAIL_TAIL_M ICE_M(0x1FFF, 0) 129 #define GL_MDET_RX 0x00294C00 130 #define GL_MDET_RX_QNUM_S 0 131 #define GL_MDET_RX_QNUM_M ICE_M(0x7FFF, 0) 132 #define GL_MDET_RX_VF_NUM_S 15 133 #define GL_MDET_RX_VF_NUM_M ICE_M(0xFF, 15) 134 #define GL_MDET_RX_PF_NUM_S 23 135 #define GL_MDET_RX_PF_NUM_M ICE_M(0x7, 23) 136 #define GL_MDET_RX_MAL_TYPE_S 26 137 #define GL_MDET_RX_MAL_TYPE_M ICE_M(0x1F, 26) 138 #define GL_MDET_RX_VALID_M BIT(31) 139 #define GL_MDET_TX_PQM 0x002D2E00 140 #define GL_MDET_TX_PQM_PF_NUM_S 0 141 #define GL_MDET_TX_PQM_PF_NUM_M ICE_M(0x7, 0) 142 #define GL_MDET_TX_PQM_VF_NUM_S 4 143 #define GL_MDET_TX_PQM_VF_NUM_M ICE_M(0xFF, 4) 144 #define GL_MDET_TX_PQM_QNUM_S 12 145 #define GL_MDET_TX_PQM_QNUM_M ICE_M(0x3FFF, 12) 146 #define GL_MDET_TX_PQM_MAL_TYPE_S 26 147 #define GL_MDET_TX_PQM_MAL_TYPE_M ICE_M(0x1F, 26) 148 #define GL_MDET_TX_PQM_VALID_M BIT(31) 149 #define GL_MDET_TX_TCLAN 0x000FC068 150 #define GL_MDET_TX_TCLAN_QNUM_S 0 151 #define GL_MDET_TX_TCLAN_QNUM_M ICE_M(0x7FFF, 0) 152 #define GL_MDET_TX_TCLAN_VF_NUM_S 15 153 #define GL_MDET_TX_TCLAN_VF_NUM_M ICE_M(0xFF, 15) 154 #define GL_MDET_TX_TCLAN_PF_NUM_S 23 155 #define GL_MDET_TX_TCLAN_PF_NUM_M ICE_M(0x7, 23) 156 #define GL_MDET_TX_TCLAN_MAL_TYPE_S 26 157 #define GL_MDET_TX_TCLAN_MAL_TYPE_M ICE_M(0x1F, 26) 158 #define GL_MDET_TX_TCLAN_VALID_M BIT(31) 159 #define PF_MDET_RX 0x00294280 160 #define PF_MDET_RX_VALID_M BIT(0) 161 #define PF_MDET_TX_PQM 0x002D2C80 162 #define PF_MDET_TX_PQM_VALID_M BIT(0) 163 #define PF_MDET_TX_TCLAN 0x000FC000 164 #define PF_MDET_TX_TCLAN_VALID_M BIT(0) 165 #define GLNVM_FLA 0x000B6108 166 #define GLNVM_FLA_LOCKED_M BIT(6) 167 #define GLNVM_GENS 0x000B6100 168 #define GLNVM_GENS_SR_SIZE_S 5 169 #define GLNVM_GENS_SR_SIZE_M ICE_M(0x7, 5) 170 #define GLNVM_ULD 0x000B6008 171 #define GLNVM_ULD_CORER_DONE_M BIT(3) 172 #define GLNVM_ULD_GLOBR_DONE_M BIT(4) 173 #define PF_FUNC_RID 0x0009E880 174 #define PF_FUNC_RID_FUNC_NUM_S 0 175 #define PF_FUNC_RID_FUNC_NUM_M ICE_M(0x7, 0) 176 #define GLPRT_BPRCH(_i) (0x00381384 + ((_i) * 8)) 177 #define GLPRT_BPRCL(_i) (0x00381380 + ((_i) * 8)) 178 #define GLPRT_BPTCH(_i) (0x00381244 + ((_i) * 8)) 179 #define GLPRT_BPTCL(_i) (0x00381240 + ((_i) * 8)) 180 #define GLPRT_CRCERRS(_i) (0x00380100 + ((_i) * 8)) 181 #define GLPRT_GORCH(_i) (0x00380004 + ((_i) * 8)) 182 #define GLPRT_GORCL(_i) (0x00380000 + ((_i) * 8)) 183 #define GLPRT_GOTCH(_i) (0x00380B44 + ((_i) * 8)) 184 #define GLPRT_GOTCL(_i) (0x00380B40 + ((_i) * 8)) 185 #define GLPRT_ILLERRC(_i) (0x003801C0 + ((_i) * 8)) 186 #define GLPRT_LXOFFRXC(_i) (0x003802C0 + ((_i) * 8)) 187 #define GLPRT_LXOFFTXC(_i) (0x00381180 + ((_i) * 8)) 188 #define GLPRT_LXONRXC(_i) (0x00380280 + ((_i) * 8)) 189 #define GLPRT_LXONTXC(_i) (0x00381140 + ((_i) * 8)) 190 #define GLPRT_MLFC(_i) (0x00380040 + ((_i) * 8)) 191 #define GLPRT_MPRCH(_i) (0x00381344 + ((_i) * 8)) 192 #define GLPRT_MPRCL(_i) (0x00381340 + ((_i) * 8)) 193 #define GLPRT_MPTCH(_i) (0x00381204 + ((_i) * 8)) 194 #define GLPRT_MPTCL(_i) (0x00381200 + ((_i) * 8)) 195 #define GLPRT_MRFC(_i) (0x00380080 + ((_i) * 8)) 196 #define GLPRT_PRC1023H(_i) (0x00380A04 + ((_i) * 8)) 197 #define GLPRT_PRC1023L(_i) (0x00380A00 + ((_i) * 8)) 198 #define GLPRT_PRC127H(_i) (0x00380944 + ((_i) * 8)) 199 #define GLPRT_PRC127L(_i) (0x00380940 + ((_i) * 8)) 200 #define GLPRT_PRC1522H(_i) (0x00380A44 + ((_i) * 8)) 201 #define GLPRT_PRC1522L(_i) (0x00380A40 + ((_i) * 8)) 202 #define GLPRT_PRC255H(_i) (0x00380984 + ((_i) * 8)) 203 #define GLPRT_PRC255L(_i) (0x00380980 + ((_i) * 8)) 204 #define GLPRT_PRC511H(_i) (0x003809C4 + ((_i) * 8)) 205 #define GLPRT_PRC511L(_i) (0x003809C0 + ((_i) * 8)) 206 #define GLPRT_PRC64H(_i) (0x00380904 + ((_i) * 8)) 207 #define GLPRT_PRC64L(_i) (0x00380900 + ((_i) * 8)) 208 #define GLPRT_PRC9522H(_i) (0x00380A84 + ((_i) * 8)) 209 #define GLPRT_PRC9522L(_i) (0x00380A80 + ((_i) * 8)) 210 #define GLPRT_PTC1023H(_i) (0x00380C84 + ((_i) * 8)) 211 #define GLPRT_PTC1023L(_i) (0x00380C80 + ((_i) * 8)) 212 #define GLPRT_PTC127H(_i) (0x00380BC4 + ((_i) * 8)) 213 #define GLPRT_PTC127L(_i) (0x00380BC0 + ((_i) * 8)) 214 #define GLPRT_PTC1522H(_i) (0x00380CC4 + ((_i) * 8)) 215 #define GLPRT_PTC1522L(_i) (0x00380CC0 + ((_i) * 8)) 216 #define GLPRT_PTC255H(_i) (0x00380C04 + ((_i) * 8)) 217 #define GLPRT_PTC255L(_i) (0x00380C00 + ((_i) * 8)) 218 #define GLPRT_PTC511H(_i) (0x00380C44 + ((_i) * 8)) 219 #define GLPRT_PTC511L(_i) (0x00380C40 + ((_i) * 8)) 220 #define GLPRT_PTC64H(_i) (0x00380B84 + ((_i) * 8)) 221 #define GLPRT_PTC64L(_i) (0x00380B80 + ((_i) * 8)) 222 #define GLPRT_PTC9522H(_i) (0x00380D04 + ((_i) * 8)) 223 #define GLPRT_PTC9522L(_i) (0x00380D00 + ((_i) * 8)) 224 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8)) 225 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8)) 226 #define GLPRT_RLEC(_i) (0x00380140 + ((_i) * 8)) 227 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8)) 228 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8)) 229 #define GLPRT_TDOLD(_i) (0x00381280 + ((_i) * 8)) 230 #define GLPRT_UPRCH(_i) (0x00381304 + ((_i) * 8)) 231 #define GLPRT_UPRCL(_i) (0x00381300 + ((_i) * 8)) 232 #define GLPRT_UPTCH(_i) (0x003811C4 + ((_i) * 8)) 233 #define GLPRT_UPTCL(_i) (0x003811C0 + ((_i) * 8)) 234 #define GLV_BPRCH(_i) (0x003B6004 + ((_i) * 8)) 235 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8)) 236 #define GLV_BPTCH(_i) (0x0030E004 + ((_i) * 8)) 237 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8)) 238 #define GLV_GORCH(_i) (0x003B0004 + ((_i) * 8)) 239 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8)) 240 #define GLV_GOTCH(_i) (0x00300004 + ((_i) * 8)) 241 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8)) 242 #define GLV_MPRCH(_i) (0x003B4004 + ((_i) * 8)) 243 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8)) 244 #define GLV_MPTCH(_i) (0x0030C004 + ((_i) * 8)) 245 #define GLV_MPTCL(_i) (0x0030C000 + ((_i) * 8)) 246 #define GLV_RDPC(_i) (0x00294C04 + ((_i) * 4)) 247 #define GLV_TEPC(_VSI) (0x00312000 + ((_VSI) * 4)) 248 #define GLV_UPRCH(_i) (0x003B2004 + ((_i) * 8)) 249 #define GLV_UPRCL(_i) (0x003B2000 + ((_i) * 8)) 250 #define GLV_UPTCH(_i) (0x0030A004 + ((_i) * 8)) 251 #define GLV_UPTCL(_i) (0x0030A000 + ((_i) * 8)) 252 #define VSIQF_HKEY_MAX_INDEX 12 253 254 #endif /* _ICE_HW_AUTOGEN_H_ */ 255