1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019, Intel Corporation. */ 3 4 #ifndef _ICE_FLOW_H_ 5 #define _ICE_FLOW_H_ 6 7 #define ICE_FLOW_ENTRY_HANDLE_INVAL 0 8 #define ICE_FLOW_FLD_OFF_INVAL 0xffff 9 10 /* Generate flow hash field from flow field type(s) */ 11 #define ICE_FLOW_HASH_IPV4 \ 12 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \ 13 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)) 14 #define ICE_FLOW_HASH_IPV6 \ 15 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \ 16 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)) 17 #define ICE_FLOW_HASH_TCP_PORT \ 18 (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \ 19 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)) 20 #define ICE_FLOW_HASH_UDP_PORT \ 21 (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \ 22 BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)) 23 #define ICE_FLOW_HASH_SCTP_PORT \ 24 (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \ 25 BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)) 26 27 #define ICE_HASH_INVALID 0 28 #define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT) 29 #define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT) 30 #define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT) 31 #define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT) 32 33 #define ICE_FLOW_HASH_GTP_TEID \ 34 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID)) 35 36 #define ICE_FLOW_HASH_GTP_IPV4_TEID \ 37 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_TEID) 38 #define ICE_FLOW_HASH_GTP_IPV6_TEID \ 39 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_TEID) 40 41 #define ICE_FLOW_HASH_GTP_U_TEID \ 42 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID)) 43 44 #define ICE_FLOW_HASH_GTP_U_IPV4_TEID \ 45 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_TEID) 46 #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \ 47 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID) 48 49 #define ICE_FLOW_HASH_GTP_U_EH_TEID \ 50 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID)) 51 52 #define ICE_FLOW_HASH_GTP_U_EH_QFI \ 53 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI)) 54 55 #define ICE_FLOW_HASH_GTP_U_IPV4_EH \ 56 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ 57 ICE_FLOW_HASH_GTP_U_EH_QFI) 58 #define ICE_FLOW_HASH_GTP_U_IPV6_EH \ 59 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ 60 ICE_FLOW_HASH_GTP_U_EH_QFI) 61 62 #define ICE_FLOW_HASH_PPPOE_SESS_ID \ 63 (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)) 64 65 #define ICE_FLOW_HASH_PPPOE_SESS_ID_ETH \ 66 (ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_PPPOE_SESS_ID) 67 #define ICE_FLOW_HASH_PPPOE_TCP_ID \ 68 (ICE_FLOW_HASH_TCP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID) 69 #define ICE_FLOW_HASH_PPPOE_UDP_ID \ 70 (ICE_FLOW_HASH_UDP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID) 71 72 #define ICE_FLOW_HASH_PFCP_SEID \ 73 (BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID)) 74 #define ICE_FLOW_HASH_PFCP_IPV4_SEID \ 75 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_PFCP_SEID) 76 #define ICE_FLOW_HASH_PFCP_IPV6_SEID \ 77 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_PFCP_SEID) 78 79 #define ICE_FLOW_HASH_L2TPV3_SESS_ID \ 80 (BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID)) 81 #define ICE_FLOW_HASH_L2TPV3_IPV4_SESS_ID \ 82 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_L2TPV3_SESS_ID) 83 #define ICE_FLOW_HASH_L2TPV3_IPV6_SESS_ID \ 84 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_L2TPV3_SESS_ID) 85 86 #define ICE_FLOW_HASH_ESP_SPI \ 87 (BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI)) 88 #define ICE_FLOW_HASH_ESP_IPV4_SPI \ 89 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_ESP_SPI) 90 #define ICE_FLOW_HASH_ESP_IPV6_SPI \ 91 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_ESP_SPI) 92 93 #define ICE_FLOW_HASH_AH_SPI \ 94 (BIT_ULL(ICE_FLOW_FIELD_IDX_AH_SPI)) 95 #define ICE_FLOW_HASH_AH_IPV4_SPI \ 96 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_AH_SPI) 97 #define ICE_FLOW_HASH_AH_IPV6_SPI \ 98 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_AH_SPI) 99 100 #define ICE_FLOW_HASH_NAT_T_ESP_SPI \ 101 (BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI)) 102 #define ICE_FLOW_HASH_NAT_T_ESP_IPV4_SPI \ 103 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_NAT_T_ESP_SPI) 104 #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \ 105 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI) 106 107 /* Protocol header fields within a packet segment. A segment consists of one or 108 * more protocol headers that make up a logical group of protocol headers. Each 109 * logical group of protocol headers encapsulates or is encapsulated using/by 110 * tunneling or encapsulation protocols for network virtualization such as GRE, 111 * VxLAN, etc. 112 */ 113 enum ice_flow_seg_hdr { 114 ICE_FLOW_SEG_HDR_NONE = 0x00000000, 115 ICE_FLOW_SEG_HDR_ETH = 0x00000001, 116 ICE_FLOW_SEG_HDR_VLAN = 0x00000002, 117 ICE_FLOW_SEG_HDR_IPV4 = 0x00000004, 118 ICE_FLOW_SEG_HDR_IPV6 = 0x00000008, 119 ICE_FLOW_SEG_HDR_ARP = 0x00000010, 120 ICE_FLOW_SEG_HDR_ICMP = 0x00000020, 121 ICE_FLOW_SEG_HDR_TCP = 0x00000040, 122 ICE_FLOW_SEG_HDR_UDP = 0x00000080, 123 ICE_FLOW_SEG_HDR_SCTP = 0x00000100, 124 ICE_FLOW_SEG_HDR_GRE = 0x00000200, 125 ICE_FLOW_SEG_HDR_GTPC = 0x00000400, 126 ICE_FLOW_SEG_HDR_GTPC_TEID = 0x00000800, 127 ICE_FLOW_SEG_HDR_GTPU_IP = 0x00001000, 128 ICE_FLOW_SEG_HDR_GTPU_EH = 0x00002000, 129 ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00004000, 130 ICE_FLOW_SEG_HDR_GTPU_UP = 0x00008000, 131 ICE_FLOW_SEG_HDR_PPPOE = 0x00010000, 132 ICE_FLOW_SEG_HDR_PFCP_NODE = 0x00020000, 133 ICE_FLOW_SEG_HDR_PFCP_SESSION = 0x00040000, 134 ICE_FLOW_SEG_HDR_L2TPV3 = 0x00080000, 135 ICE_FLOW_SEG_HDR_ESP = 0x00100000, 136 ICE_FLOW_SEG_HDR_AH = 0x00200000, 137 ICE_FLOW_SEG_HDR_NAT_T_ESP = 0x00400000, 138 ICE_FLOW_SEG_HDR_ETH_NON_IP = 0x00800000, 139 /* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and 140 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs 141 */ 142 ICE_FLOW_SEG_HDR_IPV_OTHER = 0x20000000, 143 }; 144 145 /* These segments all have the same PTYPES, but are otherwise distinguished by 146 * the value of the gtp_eh_pdu and gtp_eh_pdu_link flags: 147 * 148 * gtp_eh_pdu gtp_eh_pdu_link 149 * ICE_FLOW_SEG_HDR_GTPU_IP 0 0 150 * ICE_FLOW_SEG_HDR_GTPU_EH 1 don't care 151 * ICE_FLOW_SEG_HDR_GTPU_DWN 1 0 152 * ICE_FLOW_SEG_HDR_GTPU_UP 1 1 153 */ 154 #define ICE_FLOW_SEG_HDR_GTPU (ICE_FLOW_SEG_HDR_GTPU_IP | \ 155 ICE_FLOW_SEG_HDR_GTPU_EH | \ 156 ICE_FLOW_SEG_HDR_GTPU_DWN | \ 157 ICE_FLOW_SEG_HDR_GTPU_UP) 158 #define ICE_FLOW_SEG_HDR_PFCP (ICE_FLOW_SEG_HDR_PFCP_NODE | \ 159 ICE_FLOW_SEG_HDR_PFCP_SESSION) 160 161 enum ice_flow_field { 162 /* L2 */ 163 ICE_FLOW_FIELD_IDX_ETH_DA, 164 ICE_FLOW_FIELD_IDX_ETH_SA, 165 ICE_FLOW_FIELD_IDX_S_VLAN, 166 ICE_FLOW_FIELD_IDX_C_VLAN, 167 ICE_FLOW_FIELD_IDX_ETH_TYPE, 168 /* L3 */ 169 ICE_FLOW_FIELD_IDX_IPV4_DSCP, 170 ICE_FLOW_FIELD_IDX_IPV6_DSCP, 171 ICE_FLOW_FIELD_IDX_IPV4_TTL, 172 ICE_FLOW_FIELD_IDX_IPV4_PROT, 173 ICE_FLOW_FIELD_IDX_IPV6_TTL, 174 ICE_FLOW_FIELD_IDX_IPV6_PROT, 175 ICE_FLOW_FIELD_IDX_IPV4_SA, 176 ICE_FLOW_FIELD_IDX_IPV4_DA, 177 ICE_FLOW_FIELD_IDX_IPV6_SA, 178 ICE_FLOW_FIELD_IDX_IPV6_DA, 179 /* L4 */ 180 ICE_FLOW_FIELD_IDX_TCP_SRC_PORT, 181 ICE_FLOW_FIELD_IDX_TCP_DST_PORT, 182 ICE_FLOW_FIELD_IDX_UDP_SRC_PORT, 183 ICE_FLOW_FIELD_IDX_UDP_DST_PORT, 184 ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT, 185 ICE_FLOW_FIELD_IDX_SCTP_DST_PORT, 186 ICE_FLOW_FIELD_IDX_TCP_FLAGS, 187 /* ARP */ 188 ICE_FLOW_FIELD_IDX_ARP_SIP, 189 ICE_FLOW_FIELD_IDX_ARP_DIP, 190 ICE_FLOW_FIELD_IDX_ARP_SHA, 191 ICE_FLOW_FIELD_IDX_ARP_DHA, 192 ICE_FLOW_FIELD_IDX_ARP_OP, 193 /* ICMP */ 194 ICE_FLOW_FIELD_IDX_ICMP_TYPE, 195 ICE_FLOW_FIELD_IDX_ICMP_CODE, 196 /* GRE */ 197 ICE_FLOW_FIELD_IDX_GRE_KEYID, 198 /* GTPC_TEID */ 199 ICE_FLOW_FIELD_IDX_GTPC_TEID, 200 /* GTPU_IP */ 201 ICE_FLOW_FIELD_IDX_GTPU_IP_TEID, 202 /* GTPU_EH */ 203 ICE_FLOW_FIELD_IDX_GTPU_EH_TEID, 204 ICE_FLOW_FIELD_IDX_GTPU_EH_QFI, 205 /* GTPU_UP */ 206 ICE_FLOW_FIELD_IDX_GTPU_UP_TEID, 207 /* GTPU_DWN */ 208 ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID, 209 /* PPPoE */ 210 ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID, 211 /* PFCP */ 212 ICE_FLOW_FIELD_IDX_PFCP_SEID, 213 /* L2TPv3 */ 214 ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID, 215 /* ESP */ 216 ICE_FLOW_FIELD_IDX_ESP_SPI, 217 /* AH */ 218 ICE_FLOW_FIELD_IDX_AH_SPI, 219 /* NAT_T ESP */ 220 ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI, 221 /* The total number of enums must not exceed 64 */ 222 ICE_FLOW_FIELD_IDX_MAX 223 }; 224 225 /* Flow headers and fields for AVF support */ 226 enum ice_flow_avf_hdr_field { 227 /* Values 0 - 28 are reserved for future use */ 228 ICE_AVF_FLOW_FIELD_INVALID = 0, 229 ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29, 230 ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP, 231 ICE_AVF_FLOW_FIELD_IPV4_UDP, 232 ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK, 233 ICE_AVF_FLOW_FIELD_IPV4_TCP, 234 ICE_AVF_FLOW_FIELD_IPV4_SCTP, 235 ICE_AVF_FLOW_FIELD_IPV4_OTHER, 236 ICE_AVF_FLOW_FIELD_FRAG_IPV4, 237 /* Values 37-38 are reserved */ 238 ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39, 239 ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP, 240 ICE_AVF_FLOW_FIELD_IPV6_UDP, 241 ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK, 242 ICE_AVF_FLOW_FIELD_IPV6_TCP, 243 ICE_AVF_FLOW_FIELD_IPV6_SCTP, 244 ICE_AVF_FLOW_FIELD_IPV6_OTHER, 245 ICE_AVF_FLOW_FIELD_FRAG_IPV6, 246 ICE_AVF_FLOW_FIELD_RSVD47, 247 ICE_AVF_FLOW_FIELD_FCOE_OX, 248 ICE_AVF_FLOW_FIELD_FCOE_RX, 249 ICE_AVF_FLOW_FIELD_FCOE_OTHER, 250 /* Values 51-62 are reserved */ 251 ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63, 252 ICE_AVF_FLOW_FIELD_MAX 253 }; 254 255 /* Supported RSS offloads This macro is defined to support 256 * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware 257 * capabilities to the caller of this ops. 258 */ 259 #define ICE_DEFAULT_RSS_HENA ( \ 260 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \ 261 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \ 262 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \ 263 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ 264 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \ 265 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \ 266 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \ 267 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \ 268 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ 269 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \ 270 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ 271 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ 272 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ 273 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ 274 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ 275 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP)) 276 277 enum ice_flow_dir { 278 ICE_FLOW_RX = 0x02, 279 }; 280 281 enum ice_flow_priority { 282 ICE_FLOW_PRIO_LOW, 283 ICE_FLOW_PRIO_NORMAL, 284 ICE_FLOW_PRIO_HIGH 285 }; 286 287 #define ICE_FLOW_SEG_MAX 2 288 #define ICE_FLOW_SEG_RAW_FLD_MAX 2 289 #define ICE_FLOW_FV_EXTRACT_SZ 2 290 291 #define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val)) 292 293 struct ice_flow_seg_xtrct { 294 u8 prot_id; /* Protocol ID of extracted header field */ 295 u16 off; /* Starting offset of the field in header in bytes */ 296 u8 idx; /* Index of FV entry used */ 297 u8 disp; /* Displacement of field in bits fr. FV entry's start */ 298 u16 mask; /* Mask for field */ 299 }; 300 301 enum ice_flow_fld_match_type { 302 ICE_FLOW_FLD_TYPE_REG, /* Value, mask */ 303 ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */ 304 ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */ 305 ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */ 306 }; 307 308 struct ice_flow_fld_loc { 309 /* Describe offsets of field information relative to the beginning of 310 * input buffer provided when adding flow entries. 311 */ 312 u16 val; /* Offset where the value is located */ 313 u16 mask; /* Offset where the mask/prefix value is located */ 314 u16 last; /* Length or offset where the upper value is located */ 315 }; 316 317 struct ice_flow_fld_info { 318 enum ice_flow_fld_match_type type; 319 /* Location where to retrieve data from an input buffer */ 320 struct ice_flow_fld_loc src; 321 /* Location where to put the data into the final entry buffer */ 322 struct ice_flow_fld_loc entry; 323 struct ice_flow_seg_xtrct xtrct; 324 }; 325 326 struct ice_flow_seg_fld_raw { 327 struct ice_flow_fld_info info; 328 u16 off; /* Offset from the start of the segment */ 329 }; 330 331 struct ice_flow_seg_info { 332 u32 hdrs; /* Bitmask indicating protocol headers present */ 333 u64 match; /* Bitmask indicating header fields to be matched */ 334 u64 range; /* Bitmask indicating header fields matched as ranges */ 335 336 struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX]; 337 338 u8 raws_cnt; /* Number of raw fields to be matched */ 339 struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX]; 340 }; 341 342 /* This structure describes a flow entry, and is tracked only in this file */ 343 struct ice_flow_entry { 344 struct list_head l_entry; 345 346 u64 id; 347 struct ice_flow_prof *prof; 348 /* Flow entry's content */ 349 void *entry; 350 enum ice_flow_priority priority; 351 u16 vsi_handle; 352 u16 entry_sz; 353 }; 354 355 #define ICE_FLOW_ENTRY_HNDL(e) ((u64)(uintptr_t)e) 356 #define ICE_FLOW_ENTRY_PTR(h) ((struct ice_flow_entry *)(uintptr_t)(h)) 357 358 struct ice_flow_prof { 359 struct list_head l_entry; 360 361 u64 id; 362 enum ice_flow_dir dir; 363 u8 segs_cnt; 364 365 /* Keep track of flow entries associated with this flow profile */ 366 struct mutex entries_lock; 367 struct list_head entries; 368 369 struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX]; 370 371 /* software VSI handles referenced by this flow profile */ 372 DECLARE_BITMAP(vsis, ICE_MAX_VSI); 373 }; 374 375 struct ice_rss_cfg { 376 struct list_head l_entry; 377 /* bitmap of VSIs added to the RSS entry */ 378 DECLARE_BITMAP(vsis, ICE_MAX_VSI); 379 u64 hashed_flds; 380 u32 packet_hdr; 381 }; 382 383 enum ice_status 384 ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir, 385 u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt, 386 struct ice_flow_prof **prof); 387 enum ice_status 388 ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id); 389 enum ice_status 390 ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id, 391 u64 entry_id, u16 vsi, enum ice_flow_priority prio, 392 void *data, u64 *entry_h); 393 enum ice_status 394 ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h); 395 void 396 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld, 397 u16 val_loc, u16 mask_loc, u16 last_loc, bool range); 398 void 399 ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, 400 u16 val_loc, u16 mask_loc); 401 void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle); 402 enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 403 enum ice_status 404 ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); 405 enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 406 enum ice_status 407 ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, 408 u32 addl_hdrs); 409 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs); 410 #endif /* _ICE_FLOW_H_ */ 411