1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2019, Intel Corporation. */
3 
4 #ifndef _ICE_FLEX_TYPE_H_
5 #define _ICE_FLEX_TYPE_H_
6 
7 #define ICE_FV_OFFSET_INVAL	0x1FF
8 
9 /* Extraction Sequence (Field Vector) Table */
10 struct ice_fv_word {
11 	u8 prot_id;
12 	u16 off;		/* Offset within the protocol header */
13 	u8 resvrd;
14 } __packed;
15 
16 #define ICE_MAX_NUM_PROFILES 256
17 
18 #define ICE_MAX_FV_WORDS 48
19 struct ice_fv {
20 	struct ice_fv_word ew[ICE_MAX_FV_WORDS];
21 };
22 
23 /* Package and segment headers and tables */
24 struct ice_pkg_hdr {
25 	struct ice_pkg_ver pkg_format_ver;
26 	__le32 seg_count;
27 	__le32 seg_offset[];
28 };
29 
30 /* generic segment */
31 struct ice_generic_seg_hdr {
32 #define SEGMENT_TYPE_METADATA	0x00000001
33 #define SEGMENT_TYPE_ICE	0x00000010
34 	__le32 seg_type;
35 	struct ice_pkg_ver seg_format_ver;
36 	__le32 seg_size;
37 	char seg_id[ICE_PKG_NAME_SIZE];
38 };
39 
40 /* ice specific segment */
41 
42 union ice_device_id {
43 	struct {
44 		__le16 device_id;
45 		__le16 vendor_id;
46 	} dev_vend_id;
47 	__le32 id;
48 };
49 
50 struct ice_device_id_entry {
51 	union ice_device_id device;
52 	union ice_device_id sub_device;
53 };
54 
55 struct ice_seg {
56 	struct ice_generic_seg_hdr hdr;
57 	__le32 device_table_count;
58 	struct ice_device_id_entry device_table[];
59 };
60 
61 struct ice_nvm_table {
62 	__le32 table_count;
63 	__le32 vers[];
64 };
65 
66 struct ice_buf {
67 #define ICE_PKG_BUF_SIZE	4096
68 	u8 buf[ICE_PKG_BUF_SIZE];
69 };
70 
71 struct ice_buf_table {
72 	__le32 buf_count;
73 	struct ice_buf buf_array[];
74 };
75 
76 /* global metadata specific segment */
77 struct ice_global_metadata_seg {
78 	struct ice_generic_seg_hdr hdr;
79 	struct ice_pkg_ver pkg_ver;
80 	__le32 rsvd;
81 	char pkg_name[ICE_PKG_NAME_SIZE];
82 };
83 
84 #define ICE_MIN_S_OFF		12
85 #define ICE_MAX_S_OFF		4095
86 #define ICE_MIN_S_SZ		1
87 #define ICE_MAX_S_SZ		4084
88 
89 /* section information */
90 struct ice_section_entry {
91 	__le32 type;
92 	__le16 offset;
93 	__le16 size;
94 };
95 
96 #define ICE_MIN_S_COUNT		1
97 #define ICE_MAX_S_COUNT		511
98 #define ICE_MIN_S_DATA_END	12
99 #define ICE_MAX_S_DATA_END	4096
100 
101 #define ICE_METADATA_BUF	0x80000000
102 
103 struct ice_buf_hdr {
104 	__le16 section_count;
105 	__le16 data_end;
106 	struct ice_section_entry section_entry[];
107 };
108 
109 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \
110 	struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\
111 	(ent_sz))
112 
113 /* ice package section IDs */
114 #define ICE_SID_METADATA		1
115 #define ICE_SID_XLT0_SW			10
116 #define ICE_SID_XLT_KEY_BUILDER_SW	11
117 #define ICE_SID_XLT1_SW			12
118 #define ICE_SID_XLT2_SW			13
119 #define ICE_SID_PROFID_TCAM_SW		14
120 #define ICE_SID_PROFID_REDIR_SW		15
121 #define ICE_SID_FLD_VEC_SW		16
122 #define ICE_SID_CDID_KEY_BUILDER_SW	17
123 
124 struct ice_meta_sect {
125 	struct ice_pkg_ver ver;
126 #define ICE_META_SECT_NAME_SIZE	28
127 	char name[ICE_META_SECT_NAME_SIZE];
128 	__le32 track_id;
129 };
130 
131 #define ICE_SID_CDID_REDIR_SW		18
132 
133 #define ICE_SID_XLT0_ACL		20
134 #define ICE_SID_XLT_KEY_BUILDER_ACL	21
135 #define ICE_SID_XLT1_ACL		22
136 #define ICE_SID_XLT2_ACL		23
137 #define ICE_SID_PROFID_TCAM_ACL		24
138 #define ICE_SID_PROFID_REDIR_ACL	25
139 #define ICE_SID_FLD_VEC_ACL		26
140 #define ICE_SID_CDID_KEY_BUILDER_ACL	27
141 #define ICE_SID_CDID_REDIR_ACL		28
142 
143 #define ICE_SID_XLT0_FD			30
144 #define ICE_SID_XLT_KEY_BUILDER_FD	31
145 #define ICE_SID_XLT1_FD			32
146 #define ICE_SID_XLT2_FD			33
147 #define ICE_SID_PROFID_TCAM_FD		34
148 #define ICE_SID_PROFID_REDIR_FD		35
149 #define ICE_SID_FLD_VEC_FD		36
150 #define ICE_SID_CDID_KEY_BUILDER_FD	37
151 #define ICE_SID_CDID_REDIR_FD		38
152 
153 #define ICE_SID_XLT0_RSS		40
154 #define ICE_SID_XLT_KEY_BUILDER_RSS	41
155 #define ICE_SID_XLT1_RSS		42
156 #define ICE_SID_XLT2_RSS		43
157 #define ICE_SID_PROFID_TCAM_RSS		44
158 #define ICE_SID_PROFID_REDIR_RSS	45
159 #define ICE_SID_FLD_VEC_RSS		46
160 #define ICE_SID_CDID_KEY_BUILDER_RSS	47
161 #define ICE_SID_CDID_REDIR_RSS		48
162 
163 #define ICE_SID_RXPARSER_BOOST_TCAM	56
164 #define ICE_SID_TXPARSER_BOOST_TCAM	66
165 
166 #define ICE_SID_XLT0_PE			80
167 #define ICE_SID_XLT_KEY_BUILDER_PE	81
168 #define ICE_SID_XLT1_PE			82
169 #define ICE_SID_XLT2_PE			83
170 #define ICE_SID_PROFID_TCAM_PE		84
171 #define ICE_SID_PROFID_REDIR_PE		85
172 #define ICE_SID_FLD_VEC_PE		86
173 #define ICE_SID_CDID_KEY_BUILDER_PE	87
174 #define ICE_SID_CDID_REDIR_PE		88
175 
176 /* Label Metadata section IDs */
177 #define ICE_SID_LBL_FIRST		0x80000010
178 #define ICE_SID_LBL_RXPARSER_TMEM	0x80000018
179 /* The following define MUST be updated to reflect the last label section ID */
180 #define ICE_SID_LBL_LAST		0x80000038
181 
182 enum ice_block {
183 	ICE_BLK_SW = 0,
184 	ICE_BLK_ACL,
185 	ICE_BLK_FD,
186 	ICE_BLK_RSS,
187 	ICE_BLK_PE,
188 	ICE_BLK_COUNT
189 };
190 
191 enum ice_sect {
192 	ICE_XLT0 = 0,
193 	ICE_XLT_KB,
194 	ICE_XLT1,
195 	ICE_XLT2,
196 	ICE_PROF_TCAM,
197 	ICE_PROF_REDIR,
198 	ICE_VEC_TBL,
199 	ICE_CDID_KB,
200 	ICE_CDID_REDIR,
201 	ICE_SECT_COUNT
202 };
203 
204 #define ICE_MAC_IPV4_GTPU_IPV4_FRAG	331
205 #define ICE_MAC_IPV4_GTPU_IPV4_PAY	332
206 #define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY	333
207 #define ICE_MAC_IPV4_GTPU_IPV4_TCP	334
208 #define ICE_MAC_IPV4_GTPU_IPV4_ICMP	335
209 #define ICE_MAC_IPV6_GTPU_IPV4_FRAG	336
210 #define ICE_MAC_IPV6_GTPU_IPV4_PAY	337
211 #define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY	338
212 #define ICE_MAC_IPV6_GTPU_IPV4_TCP	339
213 #define ICE_MAC_IPV6_GTPU_IPV4_ICMP	340
214 #define ICE_MAC_IPV4_GTPU_IPV6_FRAG	341
215 #define ICE_MAC_IPV4_GTPU_IPV6_PAY	342
216 #define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY	343
217 #define ICE_MAC_IPV4_GTPU_IPV6_TCP	344
218 #define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6	345
219 #define ICE_MAC_IPV6_GTPU_IPV6_FRAG	346
220 #define ICE_MAC_IPV6_GTPU_IPV6_PAY	347
221 #define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY	348
222 #define ICE_MAC_IPV6_GTPU_IPV6_TCP	349
223 #define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6	350
224 
225 /* Attributes that can modify PTYPE definitions.
226  *
227  * These values will represent special attributes for PTYPEs, which will
228  * resolve into metadata packet flags definitions that can be used in the TCAM
229  * for identifying a PTYPE with specific characteristics.
230  */
231 enum ice_ptype_attrib_type {
232 	/* GTP PTYPEs */
233 	ICE_PTYPE_ATTR_GTP_PDU_EH,
234 	ICE_PTYPE_ATTR_GTP_SESSION,
235 	ICE_PTYPE_ATTR_GTP_DOWNLINK,
236 	ICE_PTYPE_ATTR_GTP_UPLINK,
237 };
238 
239 struct ice_ptype_attrib_info {
240 	u16 flags;
241 	u16 mask;
242 };
243 
244 /* TCAM flag definitions */
245 #define ICE_GTP_PDU			BIT(14)
246 #define ICE_GTP_PDU_LINK		BIT(13)
247 
248 /* GTP attributes */
249 #define ICE_GTP_PDU_FLAG_MASK		(ICE_GTP_PDU)
250 #define ICE_GTP_PDU_EH			ICE_GTP_PDU
251 
252 #define ICE_GTP_FLAGS_MASK		(ICE_GTP_PDU | ICE_GTP_PDU_LINK)
253 #define ICE_GTP_SESSION			0
254 #define ICE_GTP_DOWNLINK		ICE_GTP_PDU
255 #define ICE_GTP_UPLINK			(ICE_GTP_PDU | ICE_GTP_PDU_LINK)
256 
257 struct ice_ptype_attributes {
258 	u16 ptype;
259 	enum ice_ptype_attrib_type attrib;
260 };
261 
262 /* package labels */
263 struct ice_label {
264 	__le16 value;
265 #define ICE_PKG_LABEL_SIZE	64
266 	char name[ICE_PKG_LABEL_SIZE];
267 };
268 
269 struct ice_label_section {
270 	__le16 count;
271 	struct ice_label label[];
272 };
273 
274 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
275 	struct_size((struct ice_label_section *)0, label, 1) - \
276 	sizeof(struct ice_label), sizeof(struct ice_label))
277 
278 struct ice_sw_fv_section {
279 	__le16 count;
280 	__le16 base_offset;
281 	struct ice_fv fv[];
282 };
283 
284 struct ice_sw_fv_list_entry {
285 	struct list_head list_entry;
286 	u32 profile_id;
287 	struct ice_fv *fv_ptr;
288 };
289 
290 /* The BOOST TCAM stores the match packet header in reverse order, meaning
291  * the fields are reversed; in addition, this means that the normally big endian
292  * fields of the packet are now little endian.
293  */
294 struct ice_boost_key_value {
295 #define ICE_BOOST_REMAINING_HV_KEY	15
296 	u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY];
297 	__le16 hv_dst_port_key;
298 	__le16 hv_src_port_key;
299 	u8 tcam_search_key;
300 } __packed;
301 
302 struct ice_boost_key {
303 	struct ice_boost_key_value key;
304 	struct ice_boost_key_value key2;
305 };
306 
307 /* package Boost TCAM entry */
308 struct ice_boost_tcam_entry {
309 	__le16 addr;
310 	__le16 reserved;
311 	/* break up the 40 bytes of key into different fields */
312 	struct ice_boost_key key;
313 	u8 boost_hit_index_group;
314 	/* The following contains bitfields which are not on byte boundaries.
315 	 * These fields are currently unused by driver software.
316 	 */
317 #define ICE_BOOST_BIT_FIELDS		43
318 	u8 bit_fields[ICE_BOOST_BIT_FIELDS];
319 };
320 
321 struct ice_boost_tcam_section {
322 	__le16 count;
323 	__le16 reserved;
324 	struct ice_boost_tcam_entry tcam[];
325 };
326 
327 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
328 	struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \
329 	sizeof(struct ice_boost_tcam_entry), \
330 	sizeof(struct ice_boost_tcam_entry))
331 
332 struct ice_xlt1_section {
333 	__le16 count;
334 	__le16 offset;
335 	u8 value[];
336 };
337 
338 struct ice_xlt2_section {
339 	__le16 count;
340 	__le16 offset;
341 	__le16 value[];
342 };
343 
344 struct ice_prof_redir_section {
345 	__le16 count;
346 	__le16 offset;
347 	u8 redir_value[];
348 };
349 
350 /* package buffer building */
351 
352 struct ice_buf_build {
353 	struct ice_buf buf;
354 	u16 reserved_section_table_entries;
355 };
356 
357 struct ice_pkg_enum {
358 	struct ice_buf_table *buf_table;
359 	u32 buf_idx;
360 
361 	u32 type;
362 	struct ice_buf_hdr *buf;
363 	u32 sect_idx;
364 	void *sect;
365 	u32 sect_type;
366 
367 	u32 entry_idx;
368 	void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset);
369 };
370 
371 /* Tunnel enabling */
372 
373 enum ice_tunnel_type {
374 	TNL_VXLAN = 0,
375 	TNL_GENEVE,
376 	TNL_GRETAP,
377 	__TNL_TYPE_CNT,
378 	TNL_LAST = 0xFF,
379 	TNL_ALL = 0xFF,
380 };
381 
382 struct ice_tunnel_type_scan {
383 	enum ice_tunnel_type type;
384 	const char *label_prefix;
385 };
386 
387 struct ice_tunnel_entry {
388 	enum ice_tunnel_type type;
389 	u16 boost_addr;
390 	u16 port;
391 	struct ice_boost_tcam_entry *boost_entry;
392 	u8 valid;
393 };
394 
395 #define ICE_TUNNEL_MAX_ENTRIES	16
396 
397 struct ice_tunnel_table {
398 	struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];
399 	u16 count;
400 	u16 valid_count[__TNL_TYPE_CNT];
401 };
402 
403 struct ice_pkg_es {
404 	__le16 count;
405 	__le16 offset;
406 	struct ice_fv_word es[];
407 };
408 
409 struct ice_es {
410 	u32 sid;
411 	u16 count;
412 	u16 fvw;
413 	u16 *ref_count;
414 	u32 *mask_ena;
415 	struct list_head prof_map;
416 	struct ice_fv_word *t;
417 	struct mutex prof_map_lock;	/* protect access to profiles list */
418 	u8 *written;
419 	u8 reverse; /* set to true to reverse FV order */
420 };
421 
422 /* PTYPE Group management */
423 
424 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
425  * group (PTG) ID as output.
426  *
427  * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
428  * are a part of this group until moved to a new PTG.
429  */
430 #define ICE_DEFAULT_PTG	0
431 
432 struct ice_ptg_entry {
433 	struct ice_ptg_ptype *first_ptype;
434 	u8 in_use;
435 };
436 
437 struct ice_ptg_ptype {
438 	struct ice_ptg_ptype *next_ptype;
439 	u8 ptg;
440 };
441 
442 #define ICE_MAX_TCAM_PER_PROFILE	32
443 #define ICE_MAX_PTG_PER_PROFILE		32
444 
445 struct ice_prof_map {
446 	struct list_head list;
447 	u64 profile_cookie;
448 	u64 context;
449 	u8 prof_id;
450 	u8 ptg_cnt;
451 	u8 ptg[ICE_MAX_PTG_PER_PROFILE];
452 	struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE];
453 };
454 
455 #define ICE_INVALID_TCAM	0xFFFF
456 
457 struct ice_tcam_inf {
458 	u16 tcam_idx;
459 	struct ice_ptype_attrib_info attr;
460 	u8 ptg;
461 	u8 prof_id;
462 	u8 in_use;
463 };
464 
465 struct ice_vsig_prof {
466 	struct list_head list;
467 	u64 profile_cookie;
468 	u8 prof_id;
469 	u8 tcam_count;
470 	struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE];
471 };
472 
473 struct ice_vsig_entry {
474 	struct list_head prop_lst;
475 	struct ice_vsig_vsi *first_vsi;
476 	u8 in_use;
477 };
478 
479 struct ice_vsig_vsi {
480 	struct ice_vsig_vsi *next_vsi;
481 	u32 prop_mask;
482 	u16 changed;
483 	u16 vsig;
484 };
485 
486 #define ICE_XLT1_CNT	1024
487 #define ICE_MAX_PTGS	256
488 
489 /* XLT1 Table */
490 struct ice_xlt1 {
491 	struct ice_ptg_entry *ptg_tbl;
492 	struct ice_ptg_ptype *ptypes;
493 	u8 *t;
494 	u32 sid;
495 	u16 count;
496 };
497 
498 #define ICE_XLT2_CNT	768
499 #define ICE_MAX_VSIGS	768
500 
501 /* VSIG bit layout:
502  * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS
503  * [13:15]: PF number of device
504  */
505 #define ICE_VSIG_IDX_M	(0x1FFF)
506 #define ICE_PF_NUM_S	13
507 #define ICE_PF_NUM_M	(0x07 << ICE_PF_NUM_S)
508 #define ICE_VSIG_VALUE(vsig, pf_id) \
509 	((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \
510 	       (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)))
511 #define ICE_DEFAULT_VSIG	0
512 
513 /* XLT2 Table */
514 struct ice_xlt2 {
515 	struct ice_vsig_entry *vsig_tbl;
516 	struct ice_vsig_vsi *vsis;
517 	u16 *t;
518 	u32 sid;
519 	u16 count;
520 };
521 
522 /* Profile ID Management */
523 struct ice_prof_id_key {
524 	__le16 flags;
525 	u8 xlt1;
526 	__le16 xlt2_cdid;
527 } __packed;
528 
529 /* Keys are made up of two values, each one-half the size of the key.
530  * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values)
531  */
532 #define ICE_TCAM_KEY_VAL_SZ	5
533 #define ICE_TCAM_KEY_SZ		(2 * ICE_TCAM_KEY_VAL_SZ)
534 
535 struct ice_prof_tcam_entry {
536 	__le16 addr;
537 	u8 key[ICE_TCAM_KEY_SZ];
538 	u8 prof_id;
539 } __packed;
540 
541 struct ice_prof_id_section {
542 	__le16 count;
543 	struct ice_prof_tcam_entry entry[];
544 };
545 
546 struct ice_prof_tcam {
547 	u32 sid;
548 	u16 count;
549 	u16 max_prof_id;
550 	struct ice_prof_tcam_entry *t;
551 	u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */
552 };
553 
554 struct ice_prof_redir {
555 	u8 *t;
556 	u32 sid;
557 	u16 count;
558 };
559 
560 struct ice_mask {
561 	u16 mask;	/* 16-bit mask */
562 	u16 idx;	/* index */
563 	u16 ref;	/* reference count */
564 	u8 in_use;	/* non-zero if used */
565 };
566 
567 struct ice_masks {
568 	struct mutex lock; /* lock to protect this structure */
569 	u16 first;	/* first mask owned by the PF */
570 	u16 count;	/* number of masks owned by the PF */
571 #define ICE_PROF_MASK_COUNT 32
572 	struct ice_mask masks[ICE_PROF_MASK_COUNT];
573 };
574 
575 /* Tables per block */
576 struct ice_blk_info {
577 	struct ice_xlt1 xlt1;
578 	struct ice_xlt2 xlt2;
579 	struct ice_prof_tcam prof;
580 	struct ice_prof_redir prof_redir;
581 	struct ice_es es;
582 	struct ice_masks masks;
583 	u8 overwrite; /* set to true to allow overwrite of table entries */
584 	u8 is_list_init;
585 };
586 
587 enum ice_chg_type {
588 	ICE_TCAM_NONE = 0,
589 	ICE_PTG_ES_ADD,
590 	ICE_TCAM_ADD,
591 	ICE_VSIG_ADD,
592 	ICE_VSIG_REM,
593 	ICE_VSI_MOVE,
594 };
595 
596 struct ice_chs_chg {
597 	struct list_head list_entry;
598 	enum ice_chg_type type;
599 
600 	u8 add_ptg;
601 	u8 add_vsig;
602 	u8 add_tcam_idx;
603 	u8 add_prof;
604 	u16 ptype;
605 	u8 ptg;
606 	u8 prof_id;
607 	u16 vsi;
608 	u16 vsig;
609 	u16 orig_vsig;
610 	u16 tcam_idx;
611 	struct ice_ptype_attrib_info attr;
612 };
613 
614 #define ICE_FLOW_PTYPE_MAX		ICE_XLT1_CNT
615 
616 enum ice_prof_type {
617 	ICE_PROF_NON_TUN = 0x1,
618 	ICE_PROF_TUN_UDP = 0x2,
619 	ICE_PROF_TUN_GRE = 0x4,
620 	ICE_PROF_TUN_ALL = 0x6,
621 	ICE_PROF_ALL = 0xFF,
622 };
623 #endif /* _ICE_FLEX_TYPE_H_ */
624