1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019, Intel Corporation. */ 3 4 #ifndef _ICE_FLEX_TYPE_H_ 5 #define _ICE_FLEX_TYPE_H_ 6 7 #define ICE_FV_OFFSET_INVAL 0x1FF 8 9 /* Extraction Sequence (Field Vector) Table */ 10 struct ice_fv_word { 11 u8 prot_id; 12 u16 off; /* Offset within the protocol header */ 13 u8 resvrd; 14 } __packed; 15 16 #define ICE_MAX_FV_WORDS 48 17 struct ice_fv { 18 struct ice_fv_word ew[ICE_MAX_FV_WORDS]; 19 }; 20 21 /* Package and segment headers and tables */ 22 struct ice_pkg_hdr { 23 struct ice_pkg_ver format_ver; 24 __le32 seg_count; 25 __le32 seg_offset[1]; 26 }; 27 28 /* generic segment */ 29 struct ice_generic_seg_hdr { 30 #define SEGMENT_TYPE_METADATA 0x00000001 31 #define SEGMENT_TYPE_ICE 0x00000010 32 __le32 seg_type; 33 struct ice_pkg_ver seg_ver; 34 __le32 seg_size; 35 char seg_name[ICE_PKG_NAME_SIZE]; 36 }; 37 38 /* ice specific segment */ 39 40 union ice_device_id { 41 struct { 42 __le16 device_id; 43 __le16 vendor_id; 44 } dev_vend_id; 45 __le32 id; 46 }; 47 48 struct ice_device_id_entry { 49 union ice_device_id device; 50 union ice_device_id sub_device; 51 }; 52 53 struct ice_seg { 54 struct ice_generic_seg_hdr hdr; 55 __le32 device_table_count; 56 struct ice_device_id_entry device_table[1]; 57 }; 58 59 struct ice_nvm_table { 60 __le32 table_count; 61 __le32 vers[1]; 62 }; 63 64 struct ice_buf { 65 #define ICE_PKG_BUF_SIZE 4096 66 u8 buf[ICE_PKG_BUF_SIZE]; 67 }; 68 69 struct ice_buf_table { 70 __le32 buf_count; 71 struct ice_buf buf_array[1]; 72 }; 73 74 /* global metadata specific segment */ 75 struct ice_global_metadata_seg { 76 struct ice_generic_seg_hdr hdr; 77 struct ice_pkg_ver pkg_ver; 78 __le32 track_id; 79 char pkg_name[ICE_PKG_NAME_SIZE]; 80 }; 81 82 #define ICE_MIN_S_OFF 12 83 #define ICE_MAX_S_OFF 4095 84 #define ICE_MIN_S_SZ 1 85 #define ICE_MAX_S_SZ 4084 86 87 /* section information */ 88 struct ice_section_entry { 89 __le32 type; 90 __le16 offset; 91 __le16 size; 92 }; 93 94 #define ICE_MIN_S_COUNT 1 95 #define ICE_MAX_S_COUNT 511 96 #define ICE_MIN_S_DATA_END 12 97 #define ICE_MAX_S_DATA_END 4096 98 99 #define ICE_METADATA_BUF 0x80000000 100 101 struct ice_buf_hdr { 102 __le16 section_count; 103 __le16 data_end; 104 struct ice_section_entry section_entry[1]; 105 }; 106 107 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \ 108 sizeof(struct ice_buf_hdr) - (hd_sz)) / (ent_sz)) 109 110 /* ice package section IDs */ 111 #define ICE_SID_XLT0_SW 10 112 #define ICE_SID_XLT_KEY_BUILDER_SW 11 113 #define ICE_SID_XLT1_SW 12 114 #define ICE_SID_XLT2_SW 13 115 #define ICE_SID_PROFID_TCAM_SW 14 116 #define ICE_SID_PROFID_REDIR_SW 15 117 #define ICE_SID_FLD_VEC_SW 16 118 #define ICE_SID_CDID_KEY_BUILDER_SW 17 119 #define ICE_SID_CDID_REDIR_SW 18 120 121 #define ICE_SID_XLT0_ACL 20 122 #define ICE_SID_XLT_KEY_BUILDER_ACL 21 123 #define ICE_SID_XLT1_ACL 22 124 #define ICE_SID_XLT2_ACL 23 125 #define ICE_SID_PROFID_TCAM_ACL 24 126 #define ICE_SID_PROFID_REDIR_ACL 25 127 #define ICE_SID_FLD_VEC_ACL 26 128 #define ICE_SID_CDID_KEY_BUILDER_ACL 27 129 #define ICE_SID_CDID_REDIR_ACL 28 130 131 #define ICE_SID_XLT0_FD 30 132 #define ICE_SID_XLT_KEY_BUILDER_FD 31 133 #define ICE_SID_XLT1_FD 32 134 #define ICE_SID_XLT2_FD 33 135 #define ICE_SID_PROFID_TCAM_FD 34 136 #define ICE_SID_PROFID_REDIR_FD 35 137 #define ICE_SID_FLD_VEC_FD 36 138 #define ICE_SID_CDID_KEY_BUILDER_FD 37 139 #define ICE_SID_CDID_REDIR_FD 38 140 141 #define ICE_SID_XLT0_RSS 40 142 #define ICE_SID_XLT_KEY_BUILDER_RSS 41 143 #define ICE_SID_XLT1_RSS 42 144 #define ICE_SID_XLT2_RSS 43 145 #define ICE_SID_PROFID_TCAM_RSS 44 146 #define ICE_SID_PROFID_REDIR_RSS 45 147 #define ICE_SID_FLD_VEC_RSS 46 148 #define ICE_SID_CDID_KEY_BUILDER_RSS 47 149 #define ICE_SID_CDID_REDIR_RSS 48 150 151 #define ICE_SID_RXPARSER_BOOST_TCAM 56 152 153 #define ICE_SID_XLT0_PE 80 154 #define ICE_SID_XLT_KEY_BUILDER_PE 81 155 #define ICE_SID_XLT1_PE 82 156 #define ICE_SID_XLT2_PE 83 157 #define ICE_SID_PROFID_TCAM_PE 84 158 #define ICE_SID_PROFID_REDIR_PE 85 159 #define ICE_SID_FLD_VEC_PE 86 160 #define ICE_SID_CDID_KEY_BUILDER_PE 87 161 #define ICE_SID_CDID_REDIR_PE 88 162 163 /* Label Metadata section IDs */ 164 #define ICE_SID_LBL_FIRST 0x80000010 165 #define ICE_SID_LBL_RXPARSER_TMEM 0x80000018 166 /* The following define MUST be updated to reflect the last label section ID */ 167 #define ICE_SID_LBL_LAST 0x80000038 168 169 enum ice_block { 170 ICE_BLK_SW = 0, 171 ICE_BLK_ACL, 172 ICE_BLK_FD, 173 ICE_BLK_RSS, 174 ICE_BLK_PE, 175 ICE_BLK_COUNT 176 }; 177 178 enum ice_sect { 179 ICE_XLT0 = 0, 180 ICE_XLT_KB, 181 ICE_XLT1, 182 ICE_XLT2, 183 ICE_PROF_TCAM, 184 ICE_PROF_REDIR, 185 ICE_VEC_TBL, 186 ICE_CDID_KB, 187 ICE_CDID_REDIR, 188 ICE_SECT_COUNT 189 }; 190 191 /* package labels */ 192 struct ice_label { 193 __le16 value; 194 #define ICE_PKG_LABEL_SIZE 64 195 char name[ICE_PKG_LABEL_SIZE]; 196 }; 197 198 struct ice_label_section { 199 __le16 count; 200 struct ice_label label[1]; 201 }; 202 203 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 204 sizeof(struct ice_label_section) - sizeof(struct ice_label), \ 205 sizeof(struct ice_label)) 206 207 struct ice_sw_fv_section { 208 __le16 count; 209 __le16 base_offset; 210 struct ice_fv fv[1]; 211 }; 212 213 /* The BOOST TCAM stores the match packet header in reverse order, meaning 214 * the fields are reversed; in addition, this means that the normally big endian 215 * fields of the packet are now little endian. 216 */ 217 struct ice_boost_key_value { 218 #define ICE_BOOST_REMAINING_HV_KEY 15 219 u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY]; 220 __le16 hv_dst_port_key; 221 __le16 hv_src_port_key; 222 u8 tcam_search_key; 223 } __packed; 224 225 struct ice_boost_key { 226 struct ice_boost_key_value key; 227 struct ice_boost_key_value key2; 228 }; 229 230 /* package Boost TCAM entry */ 231 struct ice_boost_tcam_entry { 232 __le16 addr; 233 __le16 reserved; 234 /* break up the 40 bytes of key into different fields */ 235 struct ice_boost_key key; 236 u8 boost_hit_index_group; 237 /* The following contains bitfields which are not on byte boundaries. 238 * These fields are currently unused by driver software. 239 */ 240 #define ICE_BOOST_BIT_FIELDS 43 241 u8 bit_fields[ICE_BOOST_BIT_FIELDS]; 242 }; 243 244 struct ice_boost_tcam_section { 245 __le16 count; 246 __le16 reserved; 247 struct ice_boost_tcam_entry tcam[1]; 248 }; 249 250 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 251 sizeof(struct ice_boost_tcam_section) - \ 252 sizeof(struct ice_boost_tcam_entry), \ 253 sizeof(struct ice_boost_tcam_entry)) 254 255 struct ice_xlt1_section { 256 __le16 count; 257 __le16 offset; 258 u8 value[1]; 259 } __packed; 260 261 struct ice_xlt2_section { 262 __le16 count; 263 __le16 offset; 264 __le16 value[1]; 265 }; 266 267 struct ice_prof_redir_section { 268 __le16 count; 269 __le16 offset; 270 u8 redir_value[1]; 271 }; 272 273 /* package buffer building */ 274 275 struct ice_buf_build { 276 struct ice_buf buf; 277 u16 reserved_section_table_entries; 278 }; 279 280 struct ice_pkg_enum { 281 struct ice_buf_table *buf_table; 282 u32 buf_idx; 283 284 u32 type; 285 struct ice_buf_hdr *buf; 286 u32 sect_idx; 287 void *sect; 288 u32 sect_type; 289 290 u32 entry_idx; 291 void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset); 292 }; 293 294 struct ice_pkg_es { 295 __le16 count; 296 __le16 offset; 297 struct ice_fv_word es[1]; 298 }; 299 300 struct ice_es { 301 u32 sid; 302 u16 count; 303 u16 fvw; 304 u16 *ref_count; 305 struct list_head prof_map; 306 struct ice_fv_word *t; 307 struct mutex prof_map_lock; /* protect access to profiles list */ 308 u8 *written; 309 u8 reverse; /* set to true to reverse FV order */ 310 }; 311 312 /* PTYPE Group management */ 313 314 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type 315 * group (PTG) ID as output. 316 * 317 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE 318 * are a part of this group until moved to a new PTG. 319 */ 320 #define ICE_DEFAULT_PTG 0 321 322 struct ice_ptg_entry { 323 struct ice_ptg_ptype *first_ptype; 324 u8 in_use; 325 }; 326 327 struct ice_ptg_ptype { 328 struct ice_ptg_ptype *next_ptype; 329 u8 ptg; 330 }; 331 332 #define ICE_MAX_TCAM_PER_PROFILE 32 333 #define ICE_MAX_PTG_PER_PROFILE 32 334 335 struct ice_prof_map { 336 struct list_head list; 337 u64 profile_cookie; 338 u64 context; 339 u8 prof_id; 340 u8 ptg_cnt; 341 u8 ptg[ICE_MAX_PTG_PER_PROFILE]; 342 }; 343 344 #define ICE_INVALID_TCAM 0xFFFF 345 346 struct ice_tcam_inf { 347 u16 tcam_idx; 348 u8 ptg; 349 u8 prof_id; 350 u8 in_use; 351 }; 352 353 struct ice_vsig_prof { 354 struct list_head list; 355 u64 profile_cookie; 356 u8 prof_id; 357 u8 tcam_count; 358 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE]; 359 }; 360 361 struct ice_vsig_entry { 362 struct list_head prop_lst; 363 struct ice_vsig_vsi *first_vsi; 364 u8 in_use; 365 }; 366 367 struct ice_vsig_vsi { 368 struct ice_vsig_vsi *next_vsi; 369 u32 prop_mask; 370 u16 changed; 371 u16 vsig; 372 }; 373 374 #define ICE_XLT1_CNT 1024 375 #define ICE_MAX_PTGS 256 376 377 /* XLT1 Table */ 378 struct ice_xlt1 { 379 struct ice_ptg_entry *ptg_tbl; 380 struct ice_ptg_ptype *ptypes; 381 u8 *t; 382 u32 sid; 383 u16 count; 384 }; 385 386 #define ICE_XLT2_CNT 768 387 #define ICE_MAX_VSIGS 768 388 389 /* VSIG bit layout: 390 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS 391 * [13:15]: PF number of device 392 */ 393 #define ICE_VSIG_IDX_M (0x1FFF) 394 #define ICE_PF_NUM_S 13 395 #define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S) 396 #define ICE_VSIG_VALUE(vsig, pf_id) \ 397 (u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \ 398 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)) 399 #define ICE_DEFAULT_VSIG 0 400 401 /* XLT2 Table */ 402 struct ice_xlt2 { 403 struct ice_vsig_entry *vsig_tbl; 404 struct ice_vsig_vsi *vsis; 405 u16 *t; 406 u32 sid; 407 u16 count; 408 }; 409 410 /* Profile ID Management */ 411 struct ice_prof_id_key { 412 __le16 flags; 413 u8 xlt1; 414 __le16 xlt2_cdid; 415 } __packed; 416 417 /* Keys are made up of two values, each one-half the size of the key. 418 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values) 419 */ 420 #define ICE_TCAM_KEY_VAL_SZ 5 421 #define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ) 422 423 struct ice_prof_tcam_entry { 424 __le16 addr; 425 u8 key[ICE_TCAM_KEY_SZ]; 426 u8 prof_id; 427 } __packed; 428 429 struct ice_prof_id_section { 430 __le16 count; 431 struct ice_prof_tcam_entry entry[1]; 432 } __packed; 433 434 struct ice_prof_tcam { 435 u32 sid; 436 u16 count; 437 u16 max_prof_id; 438 struct ice_prof_tcam_entry *t; 439 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */ 440 }; 441 442 struct ice_prof_redir { 443 u8 *t; 444 u32 sid; 445 u16 count; 446 }; 447 448 /* Tables per block */ 449 struct ice_blk_info { 450 struct ice_xlt1 xlt1; 451 struct ice_xlt2 xlt2; 452 struct ice_prof_tcam prof; 453 struct ice_prof_redir prof_redir; 454 struct ice_es es; 455 u8 overwrite; /* set to true to allow overwrite of table entries */ 456 u8 is_list_init; 457 }; 458 459 enum ice_chg_type { 460 ICE_TCAM_NONE = 0, 461 ICE_PTG_ES_ADD, 462 ICE_TCAM_ADD, 463 ICE_VSIG_ADD, 464 ICE_VSIG_REM, 465 ICE_VSI_MOVE, 466 }; 467 468 struct ice_chs_chg { 469 struct list_head list_entry; 470 enum ice_chg_type type; 471 472 u8 add_ptg; 473 u8 add_vsig; 474 u8 add_tcam_idx; 475 u8 add_prof; 476 u16 ptype; 477 u8 ptg; 478 u8 prof_id; 479 u16 vsi; 480 u16 vsig; 481 u16 orig_vsig; 482 u16 tcam_idx; 483 }; 484 485 #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT 486 #endif /* _ICE_FLEX_TYPE_H_ */ 487