1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_COMMON_H_
5 #define _ICE_COMMON_H_
6 
7 #include <linux/bitfield.h>
8 
9 #include "ice_type.h"
10 #include "ice_nvm.h"
11 #include "ice_flex_pipe.h"
12 #include <linux/avf/virtchnl.h>
13 #include "ice_switch.h"
14 #include "ice_fdir.h"
15 
16 #define ICE_SQ_SEND_DELAY_TIME_MS	10
17 #define ICE_SQ_SEND_MAX_EXECUTE		3
18 
19 int ice_init_hw(struct ice_hw *hw);
20 void ice_deinit_hw(struct ice_hw *hw);
21 int ice_check_reset(struct ice_hw *hw);
22 int ice_reset(struct ice_hw *hw, enum ice_reset_req req);
23 int ice_create_all_ctrlq(struct ice_hw *hw);
24 int ice_init_all_ctrlq(struct ice_hw *hw);
25 void ice_shutdown_all_ctrlq(struct ice_hw *hw);
26 void ice_destroy_all_ctrlq(struct ice_hw *hw);
27 int
28 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
29 		  struct ice_rq_event_info *e, u16 *pending);
30 int
31 ice_get_link_status(struct ice_port_info *pi, bool *link_up);
32 int ice_update_link_info(struct ice_port_info *pi);
33 int
34 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
35 		enum ice_aq_res_access_type access, u32 timeout);
36 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
37 int
38 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
39 int
40 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
41 int
42 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
43 		      struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
44 		      enum ice_adminq_opc opc, struct ice_sq_cd *cd);
45 bool ice_is_sbq_supported(struct ice_hw *hw);
46 struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);
47 int
48 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
49 		struct ice_aq_desc *desc, void *buf, u16 buf_size,
50 		struct ice_sq_cd *cd);
51 void ice_clear_pxe_mode(struct ice_hw *hw);
52 int ice_get_caps(struct ice_hw *hw);
53 
54 void ice_set_safe_mode_caps(struct ice_hw *hw);
55 
56 int
57 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
58 		  u32 rxq_index);
59 
60 int
61 ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
62 int
63 ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
64 int
65 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
66 		   struct ice_aqc_get_set_rss_keys *keys);
67 int
68 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
69 		   struct ice_aqc_get_set_rss_keys *keys);
70 
71 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
72 int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
73 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
74 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
75 int
76 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
77 	    const struct ice_ctx_ele *ce_info);
78 
79 extern struct mutex ice_global_cfg_lock_sw;
80 
81 int
82 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
83 		void *buf, u16 buf_size, struct ice_sq_cd *cd);
84 int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
85 
86 int
87 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
88 		       struct ice_sq_cd *cd);
89 int
90 ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan,
91 		       struct ice_sq_cd *cd);
92 int
93 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
94 		    struct ice_aqc_get_phy_caps_data *caps,
95 		    struct ice_sq_cd *cd);
96 int
97 ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
98 		 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
99 int
100 ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);
101 void
102 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
103 		    u16 link_speeds_bitmap);
104 int
105 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
106 			struct ice_sq_cd *cd);
107 bool ice_is_e810(struct ice_hw *hw);
108 int ice_clear_pf_cfg(struct ice_hw *hw);
109 int
110 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
111 		   struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
112 bool ice_fw_supports_link_override(struct ice_hw *hw);
113 int
114 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
115 			      struct ice_port_info *pi);
116 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
117 
118 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
119 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
120 int
121 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
122 	   bool ena_auto_link_update);
123 int
124 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
125 	       enum ice_fc_mode fc);
126 bool
127 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
128 			struct ice_aqc_set_phy_cfg_data *cfg);
129 void
130 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
131 			 struct ice_aqc_get_phy_caps_data *caps,
132 			 struct ice_aqc_set_phy_cfg_data *cfg);
133 int
134 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
135 		enum ice_fec_mode fec);
136 int
137 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
138 			   struct ice_sq_cd *cd);
139 int
140 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
141 int
142 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
143 		     struct ice_link_status *link, struct ice_sq_cd *cd);
144 int
145 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
146 		      struct ice_sq_cd *cd);
147 int
148 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
149 
150 int
151 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
152 		       struct ice_sq_cd *cd);
153 int
154 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
155 		  u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
156 		  bool write, struct ice_sq_cd *cd);
157 
158 int
159 ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
160 		 u16 *max_rdmaqs);
161 int
162 ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
163 		      u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
164 int
165 ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
166 		      u16 *q_id);
167 int
168 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
169 		u16 *q_handle, u16 *q_ids, u32 *q_teids,
170 		enum ice_disq_rst_src rst_src, u16 vmvf_num,
171 		struct ice_sq_cd *cd);
172 int
173 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
174 		u16 *max_lanqs);
175 int
176 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
177 		u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
178 		struct ice_sq_cd *cd);
179 int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
180 void ice_replay_post(struct ice_hw *hw);
181 void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);
182 struct ice_q_ctx *
183 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
184 int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
185 void
186 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
187 		  u64 *prev_stat, u64 *cur_stat);
188 void
189 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
190 		  u64 *prev_stat, u64 *cur_stat);
191 bool ice_is_e810t(struct ice_hw *hw);
192 int
193 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
194 		     struct ice_aqc_txsched_elem_data *buf);
195 int
196 ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
197 			u32 value, struct ice_sq_cd *cd);
198 int
199 ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
200 			u32 *value, struct ice_sq_cd *cd);
201 int
202 ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
203 		struct ice_sq_cd *cd);
204 int
205 ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
206 		bool *value, struct ice_sq_cd *cd);
207 int
208 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
209 		    struct ice_sq_cd *cd);
210 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
211 int
212 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
213 int
214 ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
215 		u16 bus_addr, __le16 addr, u8 params, u8 *data,
216 		struct ice_sq_cd *cd);
217 int
218 ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
219 		 u16 bus_addr, __le16 addr, u8 params, u8 *data,
220 		 struct ice_sq_cd *cd);
221 bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
222 #endif /* _ICE_COMMON_H_ */
223