1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_COMMON_H_ 5 #define _ICE_COMMON_H_ 6 7 #include <linux/bitfield.h> 8 9 #include "ice_type.h" 10 #include "ice_nvm.h" 11 #include "ice_flex_pipe.h" 12 #include <linux/avf/virtchnl.h> 13 #include "ice_switch.h" 14 #include "ice_fdir.h" 15 16 #define ICE_SQ_SEND_DELAY_TIME_MS 10 17 #define ICE_SQ_SEND_MAX_EXECUTE 3 18 19 int ice_init_hw(struct ice_hw *hw); 20 void ice_deinit_hw(struct ice_hw *hw); 21 int ice_check_reset(struct ice_hw *hw); 22 int ice_reset(struct ice_hw *hw, enum ice_reset_req req); 23 int ice_create_all_ctrlq(struct ice_hw *hw); 24 int ice_init_all_ctrlq(struct ice_hw *hw); 25 void ice_shutdown_all_ctrlq(struct ice_hw *hw); 26 void ice_destroy_all_ctrlq(struct ice_hw *hw); 27 int 28 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 29 struct ice_rq_event_info *e, u16 *pending); 30 int 31 ice_get_link_status(struct ice_port_info *pi, bool *link_up); 32 int ice_update_link_info(struct ice_port_info *pi); 33 int 34 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res, 35 enum ice_aq_res_access_type access, u32 timeout); 36 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res); 37 int 38 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res); 39 int 40 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res); 41 int 42 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries, 43 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size, 44 enum ice_adminq_opc opc, struct ice_sq_cd *cd); 45 bool ice_is_sbq_supported(struct ice_hw *hw); 46 struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw); 47 int 48 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 49 struct ice_aq_desc *desc, void *buf, u16 buf_size, 50 struct ice_sq_cd *cd); 51 void ice_clear_pxe_mode(struct ice_hw *hw); 52 int ice_get_caps(struct ice_hw *hw); 53 54 void ice_set_safe_mode_caps(struct ice_hw *hw); 55 56 int 57 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, 58 u32 rxq_index); 59 60 int 61 ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params); 62 int 63 ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params); 64 int 65 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle, 66 struct ice_aqc_get_set_rss_keys *keys); 67 int 68 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle, 69 struct ice_aqc_get_set_rss_keys *keys); 70 71 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq); 72 int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading); 73 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode); 74 extern const struct ice_ctx_ele ice_tlan_ctx_info[]; 75 int 76 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, 77 const struct ice_ctx_ele *ce_info); 78 79 extern struct mutex ice_global_cfg_lock_sw; 80 81 int 82 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, 83 void *buf, u16 buf_size, struct ice_sq_cd *cd); 84 int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd); 85 86 int 87 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv, 88 struct ice_sq_cd *cd); 89 int 90 ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan, 91 struct ice_sq_cd *cd); 92 int 93 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, 94 struct ice_aqc_get_phy_caps_data *caps, 95 struct ice_sq_cd *cd); 96 bool ice_is_pf_c827(struct ice_hw *hw); 97 int 98 ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, 99 enum ice_adminq_opc opc, struct ice_sq_cd *cd); 100 int 101 ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps); 102 void 103 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high, 104 u16 link_speeds_bitmap); 105 int 106 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, 107 struct ice_sq_cd *cd); 108 bool ice_is_e810(struct ice_hw *hw); 109 int ice_clear_pf_cfg(struct ice_hw *hw); 110 int 111 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, 112 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd); 113 bool ice_fw_supports_link_override(struct ice_hw *hw); 114 int 115 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, 116 struct ice_port_info *pi); 117 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps); 118 119 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps); 120 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options); 121 int 122 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, 123 bool ena_auto_link_update); 124 int 125 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 126 enum ice_fc_mode req_mode); 127 bool 128 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps, 129 struct ice_aqc_set_phy_cfg_data *cfg); 130 void 131 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi, 132 struct ice_aqc_get_phy_caps_data *caps, 133 struct ice_aqc_set_phy_cfg_data *cfg); 134 int 135 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 136 enum ice_fec_mode fec); 137 int 138 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, 139 struct ice_sq_cd *cd); 140 int 141 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd); 142 int 143 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 144 struct ice_link_status *link, struct ice_sq_cd *cd); 145 int 146 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, 147 struct ice_sq_cd *cd); 148 int 149 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); 150 151 int 152 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, 153 struct ice_sq_cd *cd); 154 int 155 ice_aq_get_port_options(struct ice_hw *hw, 156 struct ice_aqc_get_port_options_elem *options, 157 u8 *option_count, u8 lport, bool lport_valid, 158 u8 *active_option_idx, bool *active_option_valid, 159 u8 *pending_option_idx, bool *pending_option_valid); 160 int 161 ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid, 162 u8 new_option); 163 int 164 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, 165 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, 166 bool write, struct ice_sq_cd *cd); 167 u32 ice_get_link_speed(u16 index); 168 169 int 170 ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, 171 u16 *max_rdmaqs); 172 int 173 ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 174 u16 *rdma_qset, u16 num_qsets, u32 *qset_teid); 175 int 176 ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, 177 u16 *q_id); 178 int 179 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues, 180 u16 *q_handle, u16 *q_ids, u32 *q_teids, 181 enum ice_disq_rst_src rst_src, u16 vmvf_num, 182 struct ice_sq_cd *cd); 183 int 184 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 185 u16 *max_lanqs); 186 int 187 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, 188 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size, 189 struct ice_sq_cd *cd); 190 int 191 ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf, 192 u16 buf_size, u16 num_qs, u8 oldport, u8 newport, 193 struct ice_sq_cd *cd); 194 int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle); 195 void ice_replay_post(struct ice_hw *hw); 196 void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); 197 struct ice_q_ctx * 198 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); 199 int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); 200 void 201 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 202 u64 *prev_stat, u64 *cur_stat); 203 void 204 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 205 u64 *prev_stat, u64 *cur_stat); 206 bool ice_is_e810t(struct ice_hw *hw); 207 bool ice_is_e823(struct ice_hw *hw); 208 int 209 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, 210 struct ice_aqc_txsched_elem_data *buf); 211 int 212 ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 213 u32 value, struct ice_sq_cd *cd); 214 int 215 ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 216 u32 *value, struct ice_sq_cd *cd); 217 int 218 ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, 219 struct ice_sq_cd *cd); 220 int 221 ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 222 bool *value, struct ice_sq_cd *cd); 223 bool ice_is_100m_speed_supported(struct ice_hw *hw); 224 int 225 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, 226 struct ice_sq_cd *cd); 227 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); 228 int 229 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); 230 int ice_lldp_execute_pending_mib(struct ice_hw *hw); 231 int 232 ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, 233 u16 bus_addr, __le16 addr, u8 params, u8 *data, 234 struct ice_sq_cd *cd); 235 int 236 ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, 237 u16 bus_addr, __le16 addr, u8 params, const u8 *data, 238 struct ice_sq_cd *cd); 239 bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); 240 #endif /* _ICE_COMMON_H_ */ 241