1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_COMMON_H_ 5 #define _ICE_COMMON_H_ 6 7 #include "ice.h" 8 #include "ice_type.h" 9 #include "ice_nvm.h" 10 #include "ice_flex_pipe.h" 11 #include "ice_switch.h" 12 #include <linux/avf/virtchnl.h> 13 14 #define ICE_SQ_SEND_DELAY_TIME_MS 10 15 #define ICE_SQ_SEND_MAX_EXECUTE 3 16 17 enum ice_status ice_init_hw(struct ice_hw *hw); 18 void ice_deinit_hw(struct ice_hw *hw); 19 enum ice_status ice_check_reset(struct ice_hw *hw); 20 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req); 21 enum ice_status ice_create_all_ctrlq(struct ice_hw *hw); 22 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw); 23 void ice_shutdown_all_ctrlq(struct ice_hw *hw); 24 void ice_destroy_all_ctrlq(struct ice_hw *hw); 25 enum ice_status 26 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 27 struct ice_rq_event_info *e, u16 *pending); 28 enum ice_status 29 ice_get_link_status(struct ice_port_info *pi, bool *link_up); 30 enum ice_status ice_update_link_info(struct ice_port_info *pi); 31 enum ice_status 32 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res, 33 enum ice_aq_res_access_type access, u32 timeout); 34 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res); 35 enum ice_status 36 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res); 37 enum ice_status 38 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res); 39 enum ice_status 40 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries, 41 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size, 42 enum ice_adminq_opc opc, struct ice_sq_cd *cd); 43 bool ice_is_sbq_supported(struct ice_hw *hw); 44 struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw); 45 enum ice_status 46 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 47 struct ice_aq_desc *desc, void *buf, u16 buf_size, 48 struct ice_sq_cd *cd); 49 void ice_clear_pxe_mode(struct ice_hw *hw); 50 enum ice_status ice_get_caps(struct ice_hw *hw); 51 52 void ice_set_safe_mode_caps(struct ice_hw *hw); 53 54 enum ice_status 55 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, 56 u32 rxq_index); 57 58 enum ice_status 59 ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params); 60 enum ice_status 61 ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params); 62 enum ice_status 63 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle, 64 struct ice_aqc_get_set_rss_keys *keys); 65 enum ice_status 66 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle, 67 struct ice_aqc_get_set_rss_keys *keys); 68 69 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq); 70 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading); 71 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode); 72 extern const struct ice_ctx_ele ice_tlan_ctx_info[]; 73 enum ice_status 74 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, 75 const struct ice_ctx_ele *ce_info); 76 77 extern struct mutex ice_global_cfg_lock_sw; 78 79 enum ice_status 80 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, 81 void *buf, u16 buf_size, struct ice_sq_cd *cd); 82 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd); 83 84 enum ice_status 85 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv, 86 struct ice_sq_cd *cd); 87 enum ice_status 88 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, 89 struct ice_aqc_get_phy_caps_data *caps, 90 struct ice_sq_cd *cd); 91 enum ice_status 92 ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, 93 enum ice_adminq_opc opc, struct ice_sq_cd *cd); 94 enum ice_status 95 ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps); 96 void 97 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high, 98 u16 link_speeds_bitmap); 99 enum ice_status 100 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, 101 struct ice_sq_cd *cd); 102 bool ice_is_e810(struct ice_hw *hw); 103 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw); 104 enum ice_status 105 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, 106 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd); 107 bool ice_fw_supports_link_override(struct ice_hw *hw); 108 enum ice_status 109 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, 110 struct ice_port_info *pi); 111 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps); 112 113 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps); 114 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options); 115 enum ice_status 116 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, 117 bool ena_auto_link_update); 118 enum ice_status 119 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 120 enum ice_fc_mode fc); 121 bool 122 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps, 123 struct ice_aqc_set_phy_cfg_data *cfg); 124 void 125 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi, 126 struct ice_aqc_get_phy_caps_data *caps, 127 struct ice_aqc_set_phy_cfg_data *cfg); 128 enum ice_status 129 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 130 enum ice_fec_mode fec); 131 enum ice_status 132 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, 133 struct ice_sq_cd *cd); 134 enum ice_status 135 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd); 136 enum ice_status 137 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 138 struct ice_link_status *link, struct ice_sq_cd *cd); 139 enum ice_status 140 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, 141 struct ice_sq_cd *cd); 142 enum ice_status 143 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); 144 145 enum ice_status 146 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, 147 struct ice_sq_cd *cd); 148 enum ice_status 149 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, 150 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, 151 bool write, struct ice_sq_cd *cd); 152 153 int 154 ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, 155 u16 *max_rdmaqs); 156 int 157 ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 158 u16 *rdma_qset, u16 num_qsets, u32 *qset_teid); 159 int 160 ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, 161 u16 *q_id); 162 enum ice_status 163 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues, 164 u16 *q_handle, u16 *q_ids, u32 *q_teids, 165 enum ice_disq_rst_src rst_src, u16 vmvf_num, 166 struct ice_sq_cd *cd); 167 enum ice_status 168 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 169 u16 *max_lanqs); 170 enum ice_status 171 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, 172 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size, 173 struct ice_sq_cd *cd); 174 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle); 175 void ice_replay_post(struct ice_hw *hw); 176 void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); 177 struct ice_q_ctx * 178 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); 179 int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); 180 void 181 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 182 u64 *prev_stat, u64 *cur_stat); 183 void 184 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 185 u64 *prev_stat, u64 *cur_stat); 186 bool ice_is_e810t(struct ice_hw *hw); 187 enum ice_status 188 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, 189 struct ice_aqc_txsched_elem_data *buf); 190 int 191 ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 192 u32 value, struct ice_sq_cd *cd); 193 int 194 ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 195 u32 *value, struct ice_sq_cd *cd); 196 int 197 ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, 198 struct ice_sq_cd *cd); 199 int 200 ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 201 bool *value, struct ice_sq_cd *cd); 202 enum ice_status 203 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, 204 struct ice_sq_cd *cd); 205 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); 206 enum ice_status 207 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); 208 bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); 209 #endif /* _ICE_COMMON_H_ */ 210