17ec59eeaSAnirudh Venkataramanan // SPDX-License-Identifier: GPL-2.0 27ec59eeaSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */ 37ec59eeaSAnirudh Venkataramanan 47ec59eeaSAnirudh Venkataramanan #include "ice_common.h" 59c20346bSAnirudh Venkataramanan #include "ice_sched.h" 67ec59eeaSAnirudh Venkataramanan #include "ice_adminq_cmd.h" 7c90ed40cSTony Nguyen #include "ice_flow.h" 87ec59eeaSAnirudh Venkataramanan 971245072SJacob Keller #define ICE_PF_RESET_WAIT_COUNT 300 10f31e4b6fSAnirudh Venkataramanan 11f31e4b6fSAnirudh Venkataramanan /** 12f31e4b6fSAnirudh Venkataramanan * ice_set_mac_type - Sets MAC type 13f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 14f31e4b6fSAnirudh Venkataramanan * 15f31e4b6fSAnirudh Venkataramanan * This function sets the MAC type of the adapter based on the 16f9867df6SAnirudh Venkataramanan * vendor ID and device ID stored in the HW structure. 17f31e4b6fSAnirudh Venkataramanan */ 185e24d598STony Nguyen static int ice_set_mac_type(struct ice_hw *hw) 19f31e4b6fSAnirudh Venkataramanan { 20f31e4b6fSAnirudh Venkataramanan if (hw->vendor_id != PCI_VENDOR_ID_INTEL) 21d54699e2STony Nguyen return -ENODEV; 22f31e4b6fSAnirudh Venkataramanan 23ea78ce4dSPaul Greenwalt switch (hw->device_id) { 24ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E810C_BACKPLANE: 25ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E810C_QSFP: 26ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E810C_SFP: 277dcf78b8STony Nguyen case ICE_DEV_ID_E810_XXV_BACKPLANE: 287dcf78b8STony Nguyen case ICE_DEV_ID_E810_XXV_QSFP: 29ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E810_XXV_SFP: 30ea78ce4dSPaul Greenwalt hw->mac_type = ICE_MAC_E810; 31ea78ce4dSPaul Greenwalt break; 32ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823C_10G_BASE_T: 33ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823C_BACKPLANE: 34ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823C_QSFP: 35ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823C_SFP: 36ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823C_SGMII: 37ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822C_10G_BASE_T: 38ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822C_BACKPLANE: 39ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822C_QSFP: 40ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822C_SFP: 41ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822C_SGMII: 42ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822L_10G_BASE_T: 43ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822L_BACKPLANE: 44ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822L_SFP: 45ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E822L_SGMII: 46ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823L_10G_BASE_T: 47ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823L_1GBE: 48ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823L_BACKPLANE: 49ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823L_QSFP: 50ea78ce4dSPaul Greenwalt case ICE_DEV_ID_E823L_SFP: 51f31e4b6fSAnirudh Venkataramanan hw->mac_type = ICE_MAC_GENERIC; 52ea78ce4dSPaul Greenwalt break; 53ea78ce4dSPaul Greenwalt default: 54ea78ce4dSPaul Greenwalt hw->mac_type = ICE_MAC_UNKNOWN; 55ea78ce4dSPaul Greenwalt break; 56ea78ce4dSPaul Greenwalt } 57ea78ce4dSPaul Greenwalt 58ea78ce4dSPaul Greenwalt ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type); 59f31e4b6fSAnirudh Venkataramanan return 0; 60f31e4b6fSAnirudh Venkataramanan } 61f31e4b6fSAnirudh Venkataramanan 62f31e4b6fSAnirudh Venkataramanan /** 6306c16d89SJacob Keller * ice_is_e810 6406c16d89SJacob Keller * @hw: pointer to the hardware structure 6506c16d89SJacob Keller * 6606c16d89SJacob Keller * returns true if the device is E810 based, false if not. 6706c16d89SJacob Keller */ 6806c16d89SJacob Keller bool ice_is_e810(struct ice_hw *hw) 6906c16d89SJacob Keller { 7006c16d89SJacob Keller return hw->mac_type == ICE_MAC_E810; 7106c16d89SJacob Keller } 7206c16d89SJacob Keller 7306c16d89SJacob Keller /** 74885fe693SMaciej Machnikowski * ice_is_e810t 75885fe693SMaciej Machnikowski * @hw: pointer to the hardware structure 76885fe693SMaciej Machnikowski * 77885fe693SMaciej Machnikowski * returns true if the device is E810T based, false if not. 78885fe693SMaciej Machnikowski */ 79885fe693SMaciej Machnikowski bool ice_is_e810t(struct ice_hw *hw) 80885fe693SMaciej Machnikowski { 81885fe693SMaciej Machnikowski switch (hw->device_id) { 82885fe693SMaciej Machnikowski case ICE_DEV_ID_E810C_SFP: 83885fe693SMaciej Machnikowski if (hw->subsystem_device_id == ICE_SUBDEV_ID_E810T || 84885fe693SMaciej Machnikowski hw->subsystem_device_id == ICE_SUBDEV_ID_E810T2) 85885fe693SMaciej Machnikowski return true; 86885fe693SMaciej Machnikowski break; 87885fe693SMaciej Machnikowski default: 88885fe693SMaciej Machnikowski break; 89885fe693SMaciej Machnikowski } 90885fe693SMaciej Machnikowski 91885fe693SMaciej Machnikowski return false; 92885fe693SMaciej Machnikowski } 93885fe693SMaciej Machnikowski 94885fe693SMaciej Machnikowski /** 95f31e4b6fSAnirudh Venkataramanan * ice_clear_pf_cfg - Clear PF configuration 96f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 973968540bSAnirudh Venkataramanan * 983968540bSAnirudh Venkataramanan * Clears any existing PF configuration (VSIs, VSI lists, switch rules, port 993968540bSAnirudh Venkataramanan * configuration, flow director filters, etc.). 100f31e4b6fSAnirudh Venkataramanan */ 1015e24d598STony Nguyen int ice_clear_pf_cfg(struct ice_hw *hw) 102f31e4b6fSAnirudh Venkataramanan { 103f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 104f31e4b6fSAnirudh Venkataramanan 105f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pf_cfg); 106f31e4b6fSAnirudh Venkataramanan 107f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 108f31e4b6fSAnirudh Venkataramanan } 109f31e4b6fSAnirudh Venkataramanan 110f31e4b6fSAnirudh Venkataramanan /** 111dc49c772SAnirudh Venkataramanan * ice_aq_manage_mac_read - manage MAC address read command 112f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 113dc49c772SAnirudh Venkataramanan * @buf: a virtual buffer to hold the manage MAC read response 114dc49c772SAnirudh Venkataramanan * @buf_size: Size of the virtual buffer 115dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 116dc49c772SAnirudh Venkataramanan * 117dc49c772SAnirudh Venkataramanan * This function is used to return per PF station MAC address (0x0107). 118dc49c772SAnirudh Venkataramanan * NOTE: Upon successful completion of this command, MAC address information 119dc49c772SAnirudh Venkataramanan * is returned in user specified buffer. Please interpret user specified 120dc49c772SAnirudh Venkataramanan * buffer as "manage_mac_read" response. 121dc49c772SAnirudh Venkataramanan * Response such as various MAC addresses are stored in HW struct (port.mac) 12281aed647SJacob Keller * ice_discover_dev_caps is expected to be called before this function is 12381aed647SJacob Keller * called. 124dc49c772SAnirudh Venkataramanan */ 1255e24d598STony Nguyen static int 126dc49c772SAnirudh Venkataramanan ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, 127dc49c772SAnirudh Venkataramanan struct ice_sq_cd *cd) 128dc49c772SAnirudh Venkataramanan { 129dc49c772SAnirudh Venkataramanan struct ice_aqc_manage_mac_read_resp *resp; 130dc49c772SAnirudh Venkataramanan struct ice_aqc_manage_mac_read *cmd; 131dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 1325e24d598STony Nguyen int status; 133dc49c772SAnirudh Venkataramanan u16 flags; 134d6fef10cSMd Fahad Iqbal Polash u8 i; 135dc49c772SAnirudh Venkataramanan 136dc49c772SAnirudh Venkataramanan cmd = &desc.params.mac_read; 137dc49c772SAnirudh Venkataramanan 138dc49c772SAnirudh Venkataramanan if (buf_size < sizeof(*resp)) 139d54699e2STony Nguyen return -EINVAL; 140dc49c772SAnirudh Venkataramanan 141dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_read); 142dc49c772SAnirudh Venkataramanan 143dc49c772SAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 144dc49c772SAnirudh Venkataramanan if (status) 145dc49c772SAnirudh Venkataramanan return status; 146dc49c772SAnirudh Venkataramanan 1477a63dae0SBruce Allan resp = buf; 148dc49c772SAnirudh Venkataramanan flags = le16_to_cpu(cmd->flags) & ICE_AQC_MAN_MAC_READ_M; 149dc49c772SAnirudh Venkataramanan 150dc49c772SAnirudh Venkataramanan if (!(flags & ICE_AQC_MAN_MAC_LAN_ADDR_VALID)) { 151dc49c772SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_LAN, "got invalid MAC address\n"); 152d54699e2STony Nguyen return -EIO; 153dc49c772SAnirudh Venkataramanan } 154dc49c772SAnirudh Venkataramanan 155d6fef10cSMd Fahad Iqbal Polash /* A single port can report up to two (LAN and WoL) addresses */ 156d6fef10cSMd Fahad Iqbal Polash for (i = 0; i < cmd->num_addr; i++) 157d6fef10cSMd Fahad Iqbal Polash if (resp[i].addr_type == ICE_AQC_MAN_MAC_ADDR_TYPE_LAN) { 158d6fef10cSMd Fahad Iqbal Polash ether_addr_copy(hw->port_info->mac.lan_addr, 159d6fef10cSMd Fahad Iqbal Polash resp[i].mac_addr); 160d6fef10cSMd Fahad Iqbal Polash ether_addr_copy(hw->port_info->mac.perm_addr, 161d6fef10cSMd Fahad Iqbal Polash resp[i].mac_addr); 162d6fef10cSMd Fahad Iqbal Polash break; 163d6fef10cSMd Fahad Iqbal Polash } 164d6fef10cSMd Fahad Iqbal Polash 165dc49c772SAnirudh Venkataramanan return 0; 166dc49c772SAnirudh Venkataramanan } 167dc49c772SAnirudh Venkataramanan 168dc49c772SAnirudh Venkataramanan /** 169dc49c772SAnirudh Venkataramanan * ice_aq_get_phy_caps - returns PHY capabilities 170dc49c772SAnirudh Venkataramanan * @pi: port information structure 171dc49c772SAnirudh Venkataramanan * @qual_mods: report qualified modules 172dc49c772SAnirudh Venkataramanan * @report_mode: report mode capabilities 173dc49c772SAnirudh Venkataramanan * @pcaps: structure for PHY capabilities to be filled 174dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 175dc49c772SAnirudh Venkataramanan * 176dc49c772SAnirudh Venkataramanan * Returns the various PHY capabilities supported on the Port (0x0600) 177dc49c772SAnirudh Venkataramanan */ 1785e24d598STony Nguyen int 179dc49c772SAnirudh Venkataramanan ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, 180dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps, 181dc49c772SAnirudh Venkataramanan struct ice_sq_cd *cd) 182dc49c772SAnirudh Venkataramanan { 183dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps *cmd; 184dc49c772SAnirudh Venkataramanan u16 pcaps_size = sizeof(*pcaps); 185dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 18655df52a0SPaul Greenwalt struct ice_hw *hw; 1875518ac2aSTony Nguyen int status; 188dc49c772SAnirudh Venkataramanan 189dc49c772SAnirudh Venkataramanan cmd = &desc.params.get_phy; 190dc49c772SAnirudh Venkataramanan 191dc49c772SAnirudh Venkataramanan if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi) 192d54699e2STony Nguyen return -EINVAL; 19355df52a0SPaul Greenwalt hw = pi->hw; 194dc49c772SAnirudh Venkataramanan 1950a02944fSAnirudh Venkataramanan if (report_mode == ICE_AQC_REPORT_DFLT_CFG && 1960a02944fSAnirudh Venkataramanan !ice_fw_supports_report_dflt_cfg(hw)) 197d54699e2STony Nguyen return -EINVAL; 1980a02944fSAnirudh Venkataramanan 199dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps); 200dc49c772SAnirudh Venkataramanan 201dc49c772SAnirudh Venkataramanan if (qual_mods) 202dc49c772SAnirudh Venkataramanan cmd->param0 |= cpu_to_le16(ICE_AQC_GET_PHY_RQM); 203dc49c772SAnirudh Venkataramanan 204dc49c772SAnirudh Venkataramanan cmd->param0 |= cpu_to_le16(report_mode); 20555df52a0SPaul Greenwalt status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd); 20655df52a0SPaul Greenwalt 20755df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, "get phy caps - report_mode = 0x%x\n", 20855df52a0SPaul Greenwalt report_mode); 20955df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n", 21055df52a0SPaul Greenwalt (unsigned long long)le64_to_cpu(pcaps->phy_type_low)); 21155df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", 21255df52a0SPaul Greenwalt (unsigned long long)le64_to_cpu(pcaps->phy_type_high)); 21355df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", pcaps->caps); 214bdeff971SLev Faerman ice_debug(hw, ICE_DBG_LINK, " low_power_ctrl_an = 0x%x\n", 215bdeff971SLev Faerman pcaps->low_power_ctrl_an); 21655df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", pcaps->eee_cap); 21755df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", 21855df52a0SPaul Greenwalt pcaps->eeer_value); 21955df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " link_fec_options = 0x%x\n", 22055df52a0SPaul Greenwalt pcaps->link_fec_options); 22155df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " module_compliance_enforcement = 0x%x\n", 22255df52a0SPaul Greenwalt pcaps->module_compliance_enforcement); 22355df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " extended_compliance_code = 0x%x\n", 22455df52a0SPaul Greenwalt pcaps->extended_compliance_code); 22555df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " module_type[0] = 0x%x\n", 22655df52a0SPaul Greenwalt pcaps->module_type[0]); 22755df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " module_type[1] = 0x%x\n", 22855df52a0SPaul Greenwalt pcaps->module_type[1]); 22955df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " module_type[2] = 0x%x\n", 23055df52a0SPaul Greenwalt pcaps->module_type[2]); 231dc49c772SAnirudh Venkataramanan 232d6730a87SAnirudh Venkataramanan if (!status && report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA) { 233dc49c772SAnirudh Venkataramanan pi->phy.phy_type_low = le64_to_cpu(pcaps->phy_type_low); 234aef74145SAnirudh Venkataramanan pi->phy.phy_type_high = le64_to_cpu(pcaps->phy_type_high); 235c2b35226SPaul M Stillwell Jr memcpy(pi->phy.link_info.module_type, &pcaps->module_type, 236c2b35226SPaul M Stillwell Jr sizeof(pi->phy.link_info.module_type)); 237aef74145SAnirudh Venkataramanan } 238dc49c772SAnirudh Venkataramanan 239dc49c772SAnirudh Venkataramanan return status; 240dc49c772SAnirudh Venkataramanan } 241dc49c772SAnirudh Venkataramanan 242dc49c772SAnirudh Venkataramanan /** 2438ea1da59SPaul Greenwalt * ice_aq_get_link_topo_handle - get link topology node return status 2448ea1da59SPaul Greenwalt * @pi: port information structure 2458ea1da59SPaul Greenwalt * @node_type: requested node type 2468ea1da59SPaul Greenwalt * @cd: pointer to command details structure or NULL 2478ea1da59SPaul Greenwalt * 2488ea1da59SPaul Greenwalt * Get link topology node return status for specified node type (0x06E0) 2498ea1da59SPaul Greenwalt * 2508ea1da59SPaul Greenwalt * Node type cage can be used to determine if cage is present. If AQC 2518ea1da59SPaul Greenwalt * returns error (ENOENT), then no cage present. If no cage present, then 2528ea1da59SPaul Greenwalt * connection type is backplane or BASE-T. 2538ea1da59SPaul Greenwalt */ 2545e24d598STony Nguyen static int 2558ea1da59SPaul Greenwalt ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, 2568ea1da59SPaul Greenwalt struct ice_sq_cd *cd) 2578ea1da59SPaul Greenwalt { 2588ea1da59SPaul Greenwalt struct ice_aqc_get_link_topo *cmd; 2598ea1da59SPaul Greenwalt struct ice_aq_desc desc; 2608ea1da59SPaul Greenwalt 2618ea1da59SPaul Greenwalt cmd = &desc.params.get_link_topo; 2628ea1da59SPaul Greenwalt 2638ea1da59SPaul Greenwalt ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); 2648ea1da59SPaul Greenwalt 265e00ae1a2SMaciej Machnikowski cmd->addr.topo_params.node_type_ctx = 266e00ae1a2SMaciej Machnikowski (ICE_AQC_LINK_TOPO_NODE_CTX_PORT << 2678ea1da59SPaul Greenwalt ICE_AQC_LINK_TOPO_NODE_CTX_S); 2688ea1da59SPaul Greenwalt 2698ea1da59SPaul Greenwalt /* set node type */ 270e00ae1a2SMaciej Machnikowski cmd->addr.topo_params.node_type_ctx |= 271e00ae1a2SMaciej Machnikowski (ICE_AQC_LINK_TOPO_NODE_TYPE_M & node_type); 2728ea1da59SPaul Greenwalt 2738ea1da59SPaul Greenwalt return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); 2748ea1da59SPaul Greenwalt } 2758ea1da59SPaul Greenwalt 2768ea1da59SPaul Greenwalt /** 2778ea1da59SPaul Greenwalt * ice_is_media_cage_present 2788ea1da59SPaul Greenwalt * @pi: port information structure 2798ea1da59SPaul Greenwalt * 2808ea1da59SPaul Greenwalt * Returns true if media cage is present, else false. If no cage, then 2818ea1da59SPaul Greenwalt * media type is backplane or BASE-T. 2828ea1da59SPaul Greenwalt */ 2838ea1da59SPaul Greenwalt static bool ice_is_media_cage_present(struct ice_port_info *pi) 2848ea1da59SPaul Greenwalt { 2858ea1da59SPaul Greenwalt /* Node type cage can be used to determine if cage is present. If AQC 2868ea1da59SPaul Greenwalt * returns error (ENOENT), then no cage present. If no cage present then 2878ea1da59SPaul Greenwalt * connection type is backplane or BASE-T. 2888ea1da59SPaul Greenwalt */ 2898ea1da59SPaul Greenwalt return !ice_aq_get_link_topo_handle(pi, 2908ea1da59SPaul Greenwalt ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE, 2918ea1da59SPaul Greenwalt NULL); 2928ea1da59SPaul Greenwalt } 2938ea1da59SPaul Greenwalt 2948ea1da59SPaul Greenwalt /** 295dc49c772SAnirudh Venkataramanan * ice_get_media_type - Gets media type 296dc49c772SAnirudh Venkataramanan * @pi: port information structure 297dc49c772SAnirudh Venkataramanan */ 298dc49c772SAnirudh Venkataramanan static enum ice_media_type ice_get_media_type(struct ice_port_info *pi) 299dc49c772SAnirudh Venkataramanan { 300dc49c772SAnirudh Venkataramanan struct ice_link_status *hw_link_info; 301dc49c772SAnirudh Venkataramanan 302dc49c772SAnirudh Venkataramanan if (!pi) 303dc49c772SAnirudh Venkataramanan return ICE_MEDIA_UNKNOWN; 304dc49c772SAnirudh Venkataramanan 305dc49c772SAnirudh Venkataramanan hw_link_info = &pi->phy.link_info; 306aef74145SAnirudh Venkataramanan if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) 307aef74145SAnirudh Venkataramanan /* If more than one media type is selected, report unknown */ 308aef74145SAnirudh Venkataramanan return ICE_MEDIA_UNKNOWN; 309dc49c772SAnirudh Venkataramanan 310dc49c772SAnirudh Venkataramanan if (hw_link_info->phy_type_low) { 311c2b35226SPaul M Stillwell Jr /* 1G SGMII is a special case where some DA cable PHYs 312c2b35226SPaul M Stillwell Jr * may show this as an option when it really shouldn't 313c2b35226SPaul M Stillwell Jr * be since SGMII is meant to be between a MAC and a PHY 314c2b35226SPaul M Stillwell Jr * in a backplane. Try to detect this case and handle it 315c2b35226SPaul M Stillwell Jr */ 316c2b35226SPaul M Stillwell Jr if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII && 317c2b35226SPaul M Stillwell Jr (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == 318c2b35226SPaul M Stillwell Jr ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE || 319c2b35226SPaul M Stillwell Jr hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == 320c2b35226SPaul M Stillwell Jr ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE)) 321c2b35226SPaul M Stillwell Jr return ICE_MEDIA_DA; 322c2b35226SPaul M Stillwell Jr 323dc49c772SAnirudh Venkataramanan switch (hw_link_info->phy_type_low) { 324dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_SX: 325dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_LX: 326dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_SR: 327dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_LR: 328dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10G_SFI_C2C: 329dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_SR: 330dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_LR: 331dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_SR4: 332dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_LR4: 333aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_SR2: 334aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_LR2: 335aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_SR: 336aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_FR: 337aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_LR: 338aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_SR4: 339aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_LR4: 340aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_SR2: 341aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_DR: 342c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC: 343c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC: 344c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC: 345c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC: 346c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC: 347c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC: 348c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC: 349c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC: 350dc49c772SAnirudh Venkataramanan return ICE_MEDIA_FIBER; 351dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100BASE_TX: 352dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_T: 353dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_T: 354dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_5GBASE_T: 355dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_T: 356dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_T: 357dc49c772SAnirudh Venkataramanan return ICE_MEDIA_BASET; 358dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10G_SFI_DA: 359dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR: 360dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR_S: 361dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR1: 362dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_CR4: 363aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_CR2: 364aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_CP: 365aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CR4: 366aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4: 367aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CP2: 368dc49c772SAnirudh Venkataramanan return ICE_MEDIA_DA; 3698ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_25G_AUI_C2C: 3708ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_40G_XLAUI: 3718ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_50G_LAUI2: 3728ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_50G_AUI2: 3738ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_50G_AUI1: 3748ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_100G_AUI4: 3758ea1da59SPaul Greenwalt case ICE_PHY_TYPE_LOW_100G_CAUI4: 3768ea1da59SPaul Greenwalt if (ice_is_media_cage_present(pi)) 3778ea1da59SPaul Greenwalt return ICE_MEDIA_DA; 3788ea1da59SPaul Greenwalt fallthrough; 379dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_KX: 380dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_KX: 381dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_X: 382dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_5GBASE_KR: 383dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1: 384dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR: 385dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR1: 386dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR_S: 387dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_KR4: 388aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4: 389aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_KR2: 390aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_KR4: 391aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4: 392aef74145SAnirudh Venkataramanan return ICE_MEDIA_BACKPLANE; 393aef74145SAnirudh Venkataramanan } 394aef74145SAnirudh Venkataramanan } else { 395aef74145SAnirudh Venkataramanan switch (hw_link_info->phy_type_high) { 3968ea1da59SPaul Greenwalt case ICE_PHY_TYPE_HIGH_100G_AUI2: 3978ea1da59SPaul Greenwalt case ICE_PHY_TYPE_HIGH_100G_CAUI2: 3988ea1da59SPaul Greenwalt if (ice_is_media_cage_present(pi)) 3998ea1da59SPaul Greenwalt return ICE_MEDIA_DA; 4008ea1da59SPaul Greenwalt fallthrough; 401aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4: 402dc49c772SAnirudh Venkataramanan return ICE_MEDIA_BACKPLANE; 403c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC: 404c1eb3b6bSDoug Dziggel case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC: 405c1eb3b6bSDoug Dziggel return ICE_MEDIA_FIBER; 406dc49c772SAnirudh Venkataramanan } 407dc49c772SAnirudh Venkataramanan } 408dc49c772SAnirudh Venkataramanan return ICE_MEDIA_UNKNOWN; 409dc49c772SAnirudh Venkataramanan } 410dc49c772SAnirudh Venkataramanan 411dc49c772SAnirudh Venkataramanan /** 412dc49c772SAnirudh Venkataramanan * ice_aq_get_link_info 413dc49c772SAnirudh Venkataramanan * @pi: port information structure 414dc49c772SAnirudh Venkataramanan * @ena_lse: enable/disable LinkStatusEvent reporting 415dc49c772SAnirudh Venkataramanan * @link: pointer to link status structure - optional 416dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 417dc49c772SAnirudh Venkataramanan * 418dc49c772SAnirudh Venkataramanan * Get Link Status (0x607). Returns the link status of the adapter. 419dc49c772SAnirudh Venkataramanan */ 4205e24d598STony Nguyen int 421dc49c772SAnirudh Venkataramanan ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 422dc49c772SAnirudh Venkataramanan struct ice_link_status *link, struct ice_sq_cd *cd) 423dc49c772SAnirudh Venkataramanan { 424dc49c772SAnirudh Venkataramanan struct ice_aqc_get_link_status_data link_data = { 0 }; 425dc49c772SAnirudh Venkataramanan struct ice_aqc_get_link_status *resp; 426dc67039bSJesse Brandeburg struct ice_link_status *li_old, *li; 427dc49c772SAnirudh Venkataramanan enum ice_media_type *hw_media_type; 428dc49c772SAnirudh Venkataramanan struct ice_fc_info *hw_fc_info; 429dc49c772SAnirudh Venkataramanan bool tx_pause, rx_pause; 430dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 431dc67039bSJesse Brandeburg struct ice_hw *hw; 432dc49c772SAnirudh Venkataramanan u16 cmd_flags; 4335518ac2aSTony Nguyen int status; 434dc49c772SAnirudh Venkataramanan 435dc49c772SAnirudh Venkataramanan if (!pi) 436d54699e2STony Nguyen return -EINVAL; 437dc67039bSJesse Brandeburg hw = pi->hw; 438dc67039bSJesse Brandeburg li_old = &pi->phy.link_info_old; 439dc49c772SAnirudh Venkataramanan hw_media_type = &pi->phy.media_type; 440dc67039bSJesse Brandeburg li = &pi->phy.link_info; 441dc49c772SAnirudh Venkataramanan hw_fc_info = &pi->fc; 442dc49c772SAnirudh Venkataramanan 443dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_status); 444dc49c772SAnirudh Venkataramanan cmd_flags = (ena_lse) ? ICE_AQ_LSE_ENA : ICE_AQ_LSE_DIS; 445dc49c772SAnirudh Venkataramanan resp = &desc.params.get_link_status; 446dc49c772SAnirudh Venkataramanan resp->cmd_flags = cpu_to_le16(cmd_flags); 447dc49c772SAnirudh Venkataramanan resp->lport_num = pi->lport; 448dc49c772SAnirudh Venkataramanan 449dc67039bSJesse Brandeburg status = ice_aq_send_cmd(hw, &desc, &link_data, sizeof(link_data), cd); 450dc49c772SAnirudh Venkataramanan 451dc49c772SAnirudh Venkataramanan if (status) 452dc49c772SAnirudh Venkataramanan return status; 453dc49c772SAnirudh Venkataramanan 454dc49c772SAnirudh Venkataramanan /* save off old link status information */ 455dc67039bSJesse Brandeburg *li_old = *li; 456dc49c772SAnirudh Venkataramanan 457dc49c772SAnirudh Venkataramanan /* update current link status information */ 458dc67039bSJesse Brandeburg li->link_speed = le16_to_cpu(link_data.link_speed); 459dc67039bSJesse Brandeburg li->phy_type_low = le64_to_cpu(link_data.phy_type_low); 460dc67039bSJesse Brandeburg li->phy_type_high = le64_to_cpu(link_data.phy_type_high); 461dc49c772SAnirudh Venkataramanan *hw_media_type = ice_get_media_type(pi); 462dc67039bSJesse Brandeburg li->link_info = link_data.link_info; 463c77849f5SAnirudh Venkataramanan li->link_cfg_err = link_data.link_cfg_err; 464dc67039bSJesse Brandeburg li->an_info = link_data.an_info; 465dc67039bSJesse Brandeburg li->ext_info = link_data.ext_info; 466dc67039bSJesse Brandeburg li->max_frame_size = le16_to_cpu(link_data.max_frame_size); 467dc67039bSJesse Brandeburg li->fec_info = link_data.cfg & ICE_AQ_FEC_MASK; 468dc67039bSJesse Brandeburg li->topo_media_conflict = link_data.topo_media_conflict; 469dc67039bSJesse Brandeburg li->pacing = link_data.cfg & (ICE_AQ_CFG_PACING_M | 470dc67039bSJesse Brandeburg ICE_AQ_CFG_PACING_TYPE_M); 471dc49c772SAnirudh Venkataramanan 472dc49c772SAnirudh Venkataramanan /* update fc info */ 473dc49c772SAnirudh Venkataramanan tx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_TX); 474dc49c772SAnirudh Venkataramanan rx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_RX); 475dc49c772SAnirudh Venkataramanan if (tx_pause && rx_pause) 476dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_FULL; 477dc49c772SAnirudh Venkataramanan else if (tx_pause) 478dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_TX_PAUSE; 479dc49c772SAnirudh Venkataramanan else if (rx_pause) 480dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_RX_PAUSE; 481dc49c772SAnirudh Venkataramanan else 482dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_NONE; 483dc49c772SAnirudh Venkataramanan 484dc67039bSJesse Brandeburg li->lse_ena = !!(resp->cmd_flags & cpu_to_le16(ICE_AQ_LSE_IS_ENABLED)); 485dc67039bSJesse Brandeburg 48655df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, "get link info\n"); 487dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " link_speed = 0x%x\n", li->link_speed); 488dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n", 489dc67039bSJesse Brandeburg (unsigned long long)li->phy_type_low); 490dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", 491dc67039bSJesse Brandeburg (unsigned long long)li->phy_type_high); 492dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " media_type = 0x%x\n", *hw_media_type); 493dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); 494c77849f5SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); 495dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); 496dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info); 49755df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info); 498dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " lse_ena = 0x%x\n", li->lse_ena); 49955df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " max_frame = 0x%x\n", 50055df52a0SPaul Greenwalt li->max_frame_size); 501dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " pacing = 0x%x\n", li->pacing); 502dc49c772SAnirudh Venkataramanan 503dc49c772SAnirudh Venkataramanan /* save link status information */ 504dc49c772SAnirudh Venkataramanan if (link) 505dc67039bSJesse Brandeburg *link = *li; 506dc49c772SAnirudh Venkataramanan 507dc49c772SAnirudh Venkataramanan /* flag cleared so calling functions don't call AQ again */ 508dc49c772SAnirudh Venkataramanan pi->phy.get_link_info = false; 509dc49c772SAnirudh Venkataramanan 5101b5c19c7SBruce Allan return 0; 511dc49c772SAnirudh Venkataramanan } 512dc49c772SAnirudh Venkataramanan 513dc49c772SAnirudh Venkataramanan /** 51442449105SAnirudh Venkataramanan * ice_fill_tx_timer_and_fc_thresh 51542449105SAnirudh Venkataramanan * @hw: pointer to the HW struct 51642449105SAnirudh Venkataramanan * @cmd: pointer to MAC cfg structure 51742449105SAnirudh Venkataramanan * 51842449105SAnirudh Venkataramanan * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command 51942449105SAnirudh Venkataramanan * descriptor 52042449105SAnirudh Venkataramanan */ 52142449105SAnirudh Venkataramanan static void 52242449105SAnirudh Venkataramanan ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw, 52342449105SAnirudh Venkataramanan struct ice_aqc_set_mac_cfg *cmd) 52442449105SAnirudh Venkataramanan { 52542449105SAnirudh Venkataramanan u16 fc_thres_val, tx_timer_val; 52642449105SAnirudh Venkataramanan u32 val; 52742449105SAnirudh Venkataramanan 52842449105SAnirudh Venkataramanan /* We read back the transmit timer and FC threshold value of 52942449105SAnirudh Venkataramanan * LFC. Thus, we will use index = 53042449105SAnirudh Venkataramanan * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX. 53142449105SAnirudh Venkataramanan * 53242449105SAnirudh Venkataramanan * Also, because we are operating on transmit timer and FC 53342449105SAnirudh Venkataramanan * threshold of LFC, we don't turn on any bit in tx_tmr_priority 53442449105SAnirudh Venkataramanan */ 53542449105SAnirudh Venkataramanan #define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX 53642449105SAnirudh Venkataramanan 53742449105SAnirudh Venkataramanan /* Retrieve the transmit timer */ 53842449105SAnirudh Venkataramanan val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC)); 53942449105SAnirudh Venkataramanan tx_timer_val = val & 54042449105SAnirudh Venkataramanan PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M; 54142449105SAnirudh Venkataramanan cmd->tx_tmr_value = cpu_to_le16(tx_timer_val); 54242449105SAnirudh Venkataramanan 54342449105SAnirudh Venkataramanan /* Retrieve the FC threshold */ 54442449105SAnirudh Venkataramanan val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC)); 54542449105SAnirudh Venkataramanan fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M; 54642449105SAnirudh Venkataramanan 54742449105SAnirudh Venkataramanan cmd->fc_refresh_threshold = cpu_to_le16(fc_thres_val); 54842449105SAnirudh Venkataramanan } 54942449105SAnirudh Venkataramanan 55042449105SAnirudh Venkataramanan /** 55142449105SAnirudh Venkataramanan * ice_aq_set_mac_cfg 55242449105SAnirudh Venkataramanan * @hw: pointer to the HW struct 55342449105SAnirudh Venkataramanan * @max_frame_size: Maximum Frame Size to be supported 55442449105SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 55542449105SAnirudh Venkataramanan * 55642449105SAnirudh Venkataramanan * Set MAC configuration (0x0603) 55742449105SAnirudh Venkataramanan */ 5585e24d598STony Nguyen int 55942449105SAnirudh Venkataramanan ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd) 56042449105SAnirudh Venkataramanan { 56142449105SAnirudh Venkataramanan struct ice_aqc_set_mac_cfg *cmd; 56242449105SAnirudh Venkataramanan struct ice_aq_desc desc; 56342449105SAnirudh Venkataramanan 56442449105SAnirudh Venkataramanan cmd = &desc.params.set_mac_cfg; 56542449105SAnirudh Venkataramanan 56642449105SAnirudh Venkataramanan if (max_frame_size == 0) 567d54699e2STony Nguyen return -EINVAL; 56842449105SAnirudh Venkataramanan 56942449105SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg); 57042449105SAnirudh Venkataramanan 57142449105SAnirudh Venkataramanan cmd->max_frame_size = cpu_to_le16(max_frame_size); 57242449105SAnirudh Venkataramanan 57342449105SAnirudh Venkataramanan ice_fill_tx_timer_and_fc_thresh(hw, cmd); 57442449105SAnirudh Venkataramanan 57542449105SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 57642449105SAnirudh Venkataramanan } 57742449105SAnirudh Venkataramanan 57842449105SAnirudh Venkataramanan /** 5799daf8208SAnirudh Venkataramanan * ice_init_fltr_mgmt_struct - initializes filter management list and locks 580f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 5819daf8208SAnirudh Venkataramanan */ 5825e24d598STony Nguyen static int ice_init_fltr_mgmt_struct(struct ice_hw *hw) 5839daf8208SAnirudh Venkataramanan { 5849daf8208SAnirudh Venkataramanan struct ice_switch_info *sw; 5855e24d598STony Nguyen int status; 5869daf8208SAnirudh Venkataramanan 5879daf8208SAnirudh Venkataramanan hw->switch_info = devm_kzalloc(ice_hw_to_dev(hw), 5889daf8208SAnirudh Venkataramanan sizeof(*hw->switch_info), GFP_KERNEL); 5899daf8208SAnirudh Venkataramanan sw = hw->switch_info; 5909daf8208SAnirudh Venkataramanan 5919daf8208SAnirudh Venkataramanan if (!sw) 592d54699e2STony Nguyen return -ENOMEM; 5939daf8208SAnirudh Venkataramanan 5949daf8208SAnirudh Venkataramanan INIT_LIST_HEAD(&sw->vsi_list_map_head); 5950f94570dSGrishma Kotecha sw->prof_res_bm_init = 0; 5969daf8208SAnirudh Venkataramanan 5971aaef2bcSSurabhi Boob status = ice_init_def_sw_recp(hw); 5981aaef2bcSSurabhi Boob if (status) { 5991aaef2bcSSurabhi Boob devm_kfree(ice_hw_to_dev(hw), hw->switch_info); 6001aaef2bcSSurabhi Boob return status; 6011aaef2bcSSurabhi Boob } 6021aaef2bcSSurabhi Boob return 0; 6039daf8208SAnirudh Venkataramanan } 6049daf8208SAnirudh Venkataramanan 6059daf8208SAnirudh Venkataramanan /** 6069daf8208SAnirudh Venkataramanan * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks 607f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 6089daf8208SAnirudh Venkataramanan */ 6099daf8208SAnirudh Venkataramanan static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) 6109daf8208SAnirudh Venkataramanan { 6119daf8208SAnirudh Venkataramanan struct ice_switch_info *sw = hw->switch_info; 6129daf8208SAnirudh Venkataramanan struct ice_vsi_list_map_info *v_pos_map; 6139daf8208SAnirudh Venkataramanan struct ice_vsi_list_map_info *v_tmp_map; 61480d144c9SAnirudh Venkataramanan struct ice_sw_recipe *recps; 61580d144c9SAnirudh Venkataramanan u8 i; 6169daf8208SAnirudh Venkataramanan 6179daf8208SAnirudh Venkataramanan list_for_each_entry_safe(v_pos_map, v_tmp_map, &sw->vsi_list_map_head, 6189daf8208SAnirudh Venkataramanan list_entry) { 6199daf8208SAnirudh Venkataramanan list_del(&v_pos_map->list_entry); 6209daf8208SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), v_pos_map); 6219daf8208SAnirudh Venkataramanan } 6228b8ef05bSVictor Raj recps = sw->recp_list; 6238b8ef05bSVictor Raj for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) { 6248b8ef05bSVictor Raj struct ice_recp_grp_entry *rg_entry, *tmprg_entry; 6259daf8208SAnirudh Venkataramanan 62680d144c9SAnirudh Venkataramanan recps[i].root_rid = i; 6278b8ef05bSVictor Raj list_for_each_entry_safe(rg_entry, tmprg_entry, 6288b8ef05bSVictor Raj &recps[i].rg_list, l_entry) { 6298b8ef05bSVictor Raj list_del(&rg_entry->l_entry); 6308b8ef05bSVictor Raj devm_kfree(ice_hw_to_dev(hw), rg_entry); 6318b8ef05bSVictor Raj } 6328b8ef05bSVictor Raj 6338b8ef05bSVictor Raj if (recps[i].adv_rule) { 6348b8ef05bSVictor Raj struct ice_adv_fltr_mgmt_list_entry *tmp_entry; 6358b8ef05bSVictor Raj struct ice_adv_fltr_mgmt_list_entry *lst_itr; 6368b8ef05bSVictor Raj 63780d144c9SAnirudh Venkataramanan mutex_destroy(&recps[i].filt_rule_lock); 63880d144c9SAnirudh Venkataramanan list_for_each_entry_safe(lst_itr, tmp_entry, 6398b8ef05bSVictor Raj &recps[i].filt_rules, 6408b8ef05bSVictor Raj list_entry) { 6418b8ef05bSVictor Raj list_del(&lst_itr->list_entry); 6428b8ef05bSVictor Raj devm_kfree(ice_hw_to_dev(hw), lst_itr->lkups); 6438b8ef05bSVictor Raj devm_kfree(ice_hw_to_dev(hw), lst_itr); 6448b8ef05bSVictor Raj } 6458b8ef05bSVictor Raj } else { 6468b8ef05bSVictor Raj struct ice_fltr_mgmt_list_entry *lst_itr, *tmp_entry; 6478b8ef05bSVictor Raj 6488b8ef05bSVictor Raj mutex_destroy(&recps[i].filt_rule_lock); 6498b8ef05bSVictor Raj list_for_each_entry_safe(lst_itr, tmp_entry, 6508b8ef05bSVictor Raj &recps[i].filt_rules, 6518b8ef05bSVictor Raj list_entry) { 65280d144c9SAnirudh Venkataramanan list_del(&lst_itr->list_entry); 65380d144c9SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), lst_itr); 65480d144c9SAnirudh Venkataramanan } 65580d144c9SAnirudh Venkataramanan } 6568b8ef05bSVictor Raj if (recps[i].root_buf) 6578b8ef05bSVictor Raj devm_kfree(ice_hw_to_dev(hw), recps[i].root_buf); 6588b8ef05bSVictor Raj } 659334cb062SAnirudh Venkataramanan ice_rm_all_sw_replay_rule_info(hw); 66080d144c9SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), sw->recp_list); 6619daf8208SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), sw); 6629daf8208SAnirudh Venkataramanan } 6639daf8208SAnirudh Venkataramanan 6648b97ceb1SHieu Tran /** 66511fe1b3aSDan Nowlin * ice_get_fw_log_cfg - get FW logging configuration 66611fe1b3aSDan Nowlin * @hw: pointer to the HW struct 66711fe1b3aSDan Nowlin */ 6685e24d598STony Nguyen static int ice_get_fw_log_cfg(struct ice_hw *hw) 66911fe1b3aSDan Nowlin { 67011fe1b3aSDan Nowlin struct ice_aq_desc desc; 671b3c38904SBruce Allan __le16 *config; 6725518ac2aSTony Nguyen int status; 67311fe1b3aSDan Nowlin u16 size; 67411fe1b3aSDan Nowlin 675b3c38904SBruce Allan size = sizeof(*config) * ICE_AQC_FW_LOG_ID_MAX; 67611fe1b3aSDan Nowlin config = devm_kzalloc(ice_hw_to_dev(hw), size, GFP_KERNEL); 67711fe1b3aSDan Nowlin if (!config) 678d54699e2STony Nguyen return -ENOMEM; 67911fe1b3aSDan Nowlin 68011fe1b3aSDan Nowlin ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging_info); 68111fe1b3aSDan Nowlin 68211fe1b3aSDan Nowlin status = ice_aq_send_cmd(hw, &desc, config, size, NULL); 68311fe1b3aSDan Nowlin if (!status) { 68411fe1b3aSDan Nowlin u16 i; 68511fe1b3aSDan Nowlin 6862f2da36eSAnirudh Venkataramanan /* Save FW logging information into the HW structure */ 68711fe1b3aSDan Nowlin for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { 68811fe1b3aSDan Nowlin u16 v, m, flgs; 68911fe1b3aSDan Nowlin 690b3c38904SBruce Allan v = le16_to_cpu(config[i]); 69111fe1b3aSDan Nowlin m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; 69211fe1b3aSDan Nowlin flgs = (v & ICE_AQC_FW_LOG_EN_M) >> ICE_AQC_FW_LOG_EN_S; 69311fe1b3aSDan Nowlin 69411fe1b3aSDan Nowlin if (m < ICE_AQC_FW_LOG_ID_MAX) 69511fe1b3aSDan Nowlin hw->fw_log.evnts[m].cur = flgs; 69611fe1b3aSDan Nowlin } 69711fe1b3aSDan Nowlin } 69811fe1b3aSDan Nowlin 69911fe1b3aSDan Nowlin devm_kfree(ice_hw_to_dev(hw), config); 70011fe1b3aSDan Nowlin 70111fe1b3aSDan Nowlin return status; 70211fe1b3aSDan Nowlin } 70311fe1b3aSDan Nowlin 70411fe1b3aSDan Nowlin /** 7058b97ceb1SHieu Tran * ice_cfg_fw_log - configure FW logging 706f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 7078b97ceb1SHieu Tran * @enable: enable certain FW logging events if true, disable all if false 7088b97ceb1SHieu Tran * 7098b97ceb1SHieu Tran * This function enables/disables the FW logging via Rx CQ events and a UART 7108b97ceb1SHieu Tran * port based on predetermined configurations. FW logging via the Rx CQ can be 7118b97ceb1SHieu Tran * enabled/disabled for individual PF's. However, FW logging via the UART can 7128b97ceb1SHieu Tran * only be enabled/disabled for all PFs on the same device. 7138b97ceb1SHieu Tran * 7148b97ceb1SHieu Tran * To enable overall FW logging, the "cq_en" and "uart_en" enable bits in 7158b97ceb1SHieu Tran * hw->fw_log need to be set accordingly, e.g. based on user-provided input, 7168b97ceb1SHieu Tran * before initializing the device. 7178b97ceb1SHieu Tran * 7188b97ceb1SHieu Tran * When re/configuring FW logging, callers need to update the "cfg" elements of 7198b97ceb1SHieu Tran * the hw->fw_log.evnts array with the desired logging event configurations for 7208b97ceb1SHieu Tran * modules of interest. When disabling FW logging completely, the callers can 7218b97ceb1SHieu Tran * just pass false in the "enable" parameter. On completion, the function will 7228b97ceb1SHieu Tran * update the "cur" element of the hw->fw_log.evnts array with the resulting 7238b97ceb1SHieu Tran * logging event configurations of the modules that are being re/configured. FW 7248b97ceb1SHieu Tran * logging modules that are not part of a reconfiguration operation retain their 7258b97ceb1SHieu Tran * previous states. 7268b97ceb1SHieu Tran * 7278b97ceb1SHieu Tran * Before resetting the device, it is recommended that the driver disables FW 7288b97ceb1SHieu Tran * logging before shutting down the control queue. When disabling FW logging 7298b97ceb1SHieu Tran * ("enable" = false), the latest configurations of FW logging events stored in 7308b97ceb1SHieu Tran * hw->fw_log.evnts[] are not overridden to allow them to be reconfigured after 7318b97ceb1SHieu Tran * a device reset. 7328b97ceb1SHieu Tran * 7338b97ceb1SHieu Tran * When enabling FW logging to emit log messages via the Rx CQ during the 7348b97ceb1SHieu Tran * device's initialization phase, a mechanism alternative to interrupt handlers 7358b97ceb1SHieu Tran * needs to be used to extract FW log messages from the Rx CQ periodically and 7368b97ceb1SHieu Tran * to prevent the Rx CQ from being full and stalling other types of control 7378b97ceb1SHieu Tran * messages from FW to SW. Interrupts are typically disabled during the device's 7388b97ceb1SHieu Tran * initialization phase. 7398b97ceb1SHieu Tran */ 7405e24d598STony Nguyen static int ice_cfg_fw_log(struct ice_hw *hw, bool enable) 7418b97ceb1SHieu Tran { 7428b97ceb1SHieu Tran struct ice_aqc_fw_logging *cmd; 7438b97ceb1SHieu Tran u16 i, chgs = 0, len = 0; 7448b97ceb1SHieu Tran struct ice_aq_desc desc; 745b3c38904SBruce Allan __le16 *data = NULL; 7468b97ceb1SHieu Tran u8 actv_evnts = 0; 7478b97ceb1SHieu Tran void *buf = NULL; 7485518ac2aSTony Nguyen int status = 0; 7498b97ceb1SHieu Tran 7508b97ceb1SHieu Tran if (!hw->fw_log.cq_en && !hw->fw_log.uart_en) 7518b97ceb1SHieu Tran return 0; 7528b97ceb1SHieu Tran 7538b97ceb1SHieu Tran /* Disable FW logging only when the control queue is still responsive */ 7548b97ceb1SHieu Tran if (!enable && 7558b97ceb1SHieu Tran (!hw->fw_log.actv_evnts || !ice_check_sq_alive(hw, &hw->adminq))) 7568b97ceb1SHieu Tran return 0; 7578b97ceb1SHieu Tran 75811fe1b3aSDan Nowlin /* Get current FW log settings */ 75911fe1b3aSDan Nowlin status = ice_get_fw_log_cfg(hw); 76011fe1b3aSDan Nowlin if (status) 76111fe1b3aSDan Nowlin return status; 76211fe1b3aSDan Nowlin 7638b97ceb1SHieu Tran ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging); 7648b97ceb1SHieu Tran cmd = &desc.params.fw_logging; 7658b97ceb1SHieu Tran 7668b97ceb1SHieu Tran /* Indicate which controls are valid */ 7678b97ceb1SHieu Tran if (hw->fw_log.cq_en) 7688b97ceb1SHieu Tran cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_AQ_VALID; 7698b97ceb1SHieu Tran 7708b97ceb1SHieu Tran if (hw->fw_log.uart_en) 7718b97ceb1SHieu Tran cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_UART_VALID; 7728b97ceb1SHieu Tran 7738b97ceb1SHieu Tran if (enable) { 7748b97ceb1SHieu Tran /* Fill in an array of entries with FW logging modules and 7758b97ceb1SHieu Tran * logging events being reconfigured. 7768b97ceb1SHieu Tran */ 7778b97ceb1SHieu Tran for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { 7788b97ceb1SHieu Tran u16 val; 7798b97ceb1SHieu Tran 7808b97ceb1SHieu Tran /* Keep track of enabled event types */ 7818b97ceb1SHieu Tran actv_evnts |= hw->fw_log.evnts[i].cfg; 7828b97ceb1SHieu Tran 7838b97ceb1SHieu Tran if (hw->fw_log.evnts[i].cfg == hw->fw_log.evnts[i].cur) 7848b97ceb1SHieu Tran continue; 7858b97ceb1SHieu Tran 7868b97ceb1SHieu Tran if (!data) { 787b3c38904SBruce Allan data = devm_kcalloc(ice_hw_to_dev(hw), 788b3c38904SBruce Allan ICE_AQC_FW_LOG_ID_MAX, 78959df14f9SBruce Allan sizeof(*data), 7908b97ceb1SHieu Tran GFP_KERNEL); 7918b97ceb1SHieu Tran if (!data) 792d54699e2STony Nguyen return -ENOMEM; 7938b97ceb1SHieu Tran } 7948b97ceb1SHieu Tran 7958b97ceb1SHieu Tran val = i << ICE_AQC_FW_LOG_ID_S; 7968b97ceb1SHieu Tran val |= hw->fw_log.evnts[i].cfg << ICE_AQC_FW_LOG_EN_S; 797b3c38904SBruce Allan data[chgs++] = cpu_to_le16(val); 7988b97ceb1SHieu Tran } 7998b97ceb1SHieu Tran 8008b97ceb1SHieu Tran /* Only enable FW logging if at least one module is specified. 8018b97ceb1SHieu Tran * If FW logging is currently enabled but all modules are not 8028b97ceb1SHieu Tran * enabled to emit log messages, disable FW logging altogether. 8038b97ceb1SHieu Tran */ 8048b97ceb1SHieu Tran if (actv_evnts) { 8058b97ceb1SHieu Tran /* Leave if there is effectively no change */ 8068b97ceb1SHieu Tran if (!chgs) 8078b97ceb1SHieu Tran goto out; 8088b97ceb1SHieu Tran 8098b97ceb1SHieu Tran if (hw->fw_log.cq_en) 8108b97ceb1SHieu Tran cmd->log_ctrl |= ICE_AQC_FW_LOG_AQ_EN; 8118b97ceb1SHieu Tran 8128b97ceb1SHieu Tran if (hw->fw_log.uart_en) 8138b97ceb1SHieu Tran cmd->log_ctrl |= ICE_AQC_FW_LOG_UART_EN; 8148b97ceb1SHieu Tran 8158b97ceb1SHieu Tran buf = data; 816b3c38904SBruce Allan len = sizeof(*data) * chgs; 8178b97ceb1SHieu Tran desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 8188b97ceb1SHieu Tran } 8198b97ceb1SHieu Tran } 8208b97ceb1SHieu Tran 8218b97ceb1SHieu Tran status = ice_aq_send_cmd(hw, &desc, buf, len, NULL); 8228b97ceb1SHieu Tran if (!status) { 8238b97ceb1SHieu Tran /* Update the current configuration to reflect events enabled. 8248b97ceb1SHieu Tran * hw->fw_log.cq_en and hw->fw_log.uart_en indicate if the FW 8258b97ceb1SHieu Tran * logging mode is enabled for the device. They do not reflect 8268b97ceb1SHieu Tran * actual modules being enabled to emit log messages. So, their 8278b97ceb1SHieu Tran * values remain unchanged even when all modules are disabled. 8288b97ceb1SHieu Tran */ 8298b97ceb1SHieu Tran u16 cnt = enable ? chgs : (u16)ICE_AQC_FW_LOG_ID_MAX; 8308b97ceb1SHieu Tran 8318b97ceb1SHieu Tran hw->fw_log.actv_evnts = actv_evnts; 8328b97ceb1SHieu Tran for (i = 0; i < cnt; i++) { 8338b97ceb1SHieu Tran u16 v, m; 8348b97ceb1SHieu Tran 8358b97ceb1SHieu Tran if (!enable) { 8368b97ceb1SHieu Tran /* When disabling all FW logging events as part 8378b97ceb1SHieu Tran * of device's de-initialization, the original 8388b97ceb1SHieu Tran * configurations are retained, and can be used 8398b97ceb1SHieu Tran * to reconfigure FW logging later if the device 8408b97ceb1SHieu Tran * is re-initialized. 8418b97ceb1SHieu Tran */ 8428b97ceb1SHieu Tran hw->fw_log.evnts[i].cur = 0; 8438b97ceb1SHieu Tran continue; 8448b97ceb1SHieu Tran } 8458b97ceb1SHieu Tran 846b3c38904SBruce Allan v = le16_to_cpu(data[i]); 8478b97ceb1SHieu Tran m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; 8488b97ceb1SHieu Tran hw->fw_log.evnts[m].cur = hw->fw_log.evnts[m].cfg; 8498b97ceb1SHieu Tran } 8508b97ceb1SHieu Tran } 8518b97ceb1SHieu Tran 8528b97ceb1SHieu Tran out: 8538b97ceb1SHieu Tran if (data) 8548b97ceb1SHieu Tran devm_kfree(ice_hw_to_dev(hw), data); 8558b97ceb1SHieu Tran 8568b97ceb1SHieu Tran return status; 8578b97ceb1SHieu Tran } 8588b97ceb1SHieu Tran 8598b97ceb1SHieu Tran /** 8608b97ceb1SHieu Tran * ice_output_fw_log 861f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 8628b97ceb1SHieu Tran * @desc: pointer to the AQ message descriptor 8638b97ceb1SHieu Tran * @buf: pointer to the buffer accompanying the AQ message 8648b97ceb1SHieu Tran * 8658b97ceb1SHieu Tran * Formats a FW Log message and outputs it via the standard driver logs. 8668b97ceb1SHieu Tran */ 8678b97ceb1SHieu Tran void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf) 8688b97ceb1SHieu Tran { 8694f70daa0SJacob Keller ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg Start ]\n"); 8704f70daa0SJacob Keller ice_debug_array(hw, ICE_DBG_FW_LOG, 16, 1, (u8 *)buf, 8718b97ceb1SHieu Tran le16_to_cpu(desc->datalen)); 8724f70daa0SJacob Keller ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg End ]\n"); 8738b97ceb1SHieu Tran } 8748b97ceb1SHieu Tran 8759daf8208SAnirudh Venkataramanan /** 8764ee656bbSTony Nguyen * ice_get_itr_intrl_gran 877f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 8789e4ab4c2SBrett Creeley * 8794ee656bbSTony Nguyen * Determines the ITR/INTRL granularities based on the maximum aggregate 8809e4ab4c2SBrett Creeley * bandwidth according to the device's configuration during power-on. 8819e4ab4c2SBrett Creeley */ 882fe7219faSBruce Allan static void ice_get_itr_intrl_gran(struct ice_hw *hw) 8839e4ab4c2SBrett Creeley { 8849e4ab4c2SBrett Creeley u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) & 8859e4ab4c2SBrett Creeley GL_PWR_MODE_CTL_CAR_MAX_BW_M) >> 8869e4ab4c2SBrett Creeley GL_PWR_MODE_CTL_CAR_MAX_BW_S; 8879e4ab4c2SBrett Creeley 8889e4ab4c2SBrett Creeley switch (max_agg_bw) { 8899e4ab4c2SBrett Creeley case ICE_MAX_AGG_BW_200G: 8909e4ab4c2SBrett Creeley case ICE_MAX_AGG_BW_100G: 8919e4ab4c2SBrett Creeley case ICE_MAX_AGG_BW_50G: 8929e4ab4c2SBrett Creeley hw->itr_gran = ICE_ITR_GRAN_ABOVE_25; 8939e4ab4c2SBrett Creeley hw->intrl_gran = ICE_INTRL_GRAN_ABOVE_25; 8949e4ab4c2SBrett Creeley break; 8959e4ab4c2SBrett Creeley case ICE_MAX_AGG_BW_25G: 8969e4ab4c2SBrett Creeley hw->itr_gran = ICE_ITR_GRAN_MAX_25; 8979e4ab4c2SBrett Creeley hw->intrl_gran = ICE_INTRL_GRAN_MAX_25; 8989e4ab4c2SBrett Creeley break; 8999e4ab4c2SBrett Creeley } 9009e4ab4c2SBrett Creeley } 9019e4ab4c2SBrett Creeley 9029e4ab4c2SBrett Creeley /** 903f31e4b6fSAnirudh Venkataramanan * ice_init_hw - main hardware initialization routine 904f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 905f31e4b6fSAnirudh Venkataramanan */ 9065e24d598STony Nguyen int ice_init_hw(struct ice_hw *hw) 907f31e4b6fSAnirudh Venkataramanan { 908dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps; 909dc49c772SAnirudh Venkataramanan u16 mac_buf_len; 910dc49c772SAnirudh Venkataramanan void *mac_buf; 9115518ac2aSTony Nguyen int status; 912f31e4b6fSAnirudh Venkataramanan 913f31e4b6fSAnirudh Venkataramanan /* Set MAC type based on DeviceID */ 914f31e4b6fSAnirudh Venkataramanan status = ice_set_mac_type(hw); 915f31e4b6fSAnirudh Venkataramanan if (status) 916f31e4b6fSAnirudh Venkataramanan return status; 917f31e4b6fSAnirudh Venkataramanan 918f31e4b6fSAnirudh Venkataramanan hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) & 919f31e4b6fSAnirudh Venkataramanan PF_FUNC_RID_FUNC_NUM_M) >> 920f31e4b6fSAnirudh Venkataramanan PF_FUNC_RID_FUNC_NUM_S; 921f31e4b6fSAnirudh Venkataramanan 922f31e4b6fSAnirudh Venkataramanan status = ice_reset(hw, ICE_RESET_PFR); 923f31e4b6fSAnirudh Venkataramanan if (status) 924f31e4b6fSAnirudh Venkataramanan return status; 925f31e4b6fSAnirudh Venkataramanan 926fe7219faSBruce Allan ice_get_itr_intrl_gran(hw); 927940b61afSAnirudh Venkataramanan 9285c91ecfdSJacob Keller status = ice_create_all_ctrlq(hw); 929f31e4b6fSAnirudh Venkataramanan if (status) 930f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 931f31e4b6fSAnirudh Venkataramanan 9328b97ceb1SHieu Tran /* Enable FW logging. Not fatal if this fails. */ 9338b97ceb1SHieu Tran status = ice_cfg_fw_log(hw, true); 9348b97ceb1SHieu Tran if (status) 9358b97ceb1SHieu Tran ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging.\n"); 9368b97ceb1SHieu Tran 937f31e4b6fSAnirudh Venkataramanan status = ice_clear_pf_cfg(hw); 938f31e4b6fSAnirudh Venkataramanan if (status) 939f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 940f31e4b6fSAnirudh Venkataramanan 941148beb61SHenry Tieman /* Set bit to enable Flow Director filters */ 942148beb61SHenry Tieman wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M); 943148beb61SHenry Tieman INIT_LIST_HEAD(&hw->fdir_list_head); 944148beb61SHenry Tieman 945f31e4b6fSAnirudh Venkataramanan ice_clear_pxe_mode(hw); 946f31e4b6fSAnirudh Venkataramanan 947f31e4b6fSAnirudh Venkataramanan status = ice_init_nvm(hw); 948f31e4b6fSAnirudh Venkataramanan if (status) 949f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 950f31e4b6fSAnirudh Venkataramanan 9519c20346bSAnirudh Venkataramanan status = ice_get_caps(hw); 9529c20346bSAnirudh Venkataramanan if (status) 9539c20346bSAnirudh Venkataramanan goto err_unroll_cqinit; 9549c20346bSAnirudh Venkataramanan 9559c20346bSAnirudh Venkataramanan hw->port_info = devm_kzalloc(ice_hw_to_dev(hw), 9569c20346bSAnirudh Venkataramanan sizeof(*hw->port_info), GFP_KERNEL); 9579c20346bSAnirudh Venkataramanan if (!hw->port_info) { 958d54699e2STony Nguyen status = -ENOMEM; 9599c20346bSAnirudh Venkataramanan goto err_unroll_cqinit; 9609c20346bSAnirudh Venkataramanan } 9619c20346bSAnirudh Venkataramanan 962f9867df6SAnirudh Venkataramanan /* set the back pointer to HW */ 9639c20346bSAnirudh Venkataramanan hw->port_info->hw = hw; 9649c20346bSAnirudh Venkataramanan 9659c20346bSAnirudh Venkataramanan /* Initialize port_info struct with switch configuration data */ 9669c20346bSAnirudh Venkataramanan status = ice_get_initial_sw_cfg(hw); 9679c20346bSAnirudh Venkataramanan if (status) 9689c20346bSAnirudh Venkataramanan goto err_unroll_alloc; 9699c20346bSAnirudh Venkataramanan 9709daf8208SAnirudh Venkataramanan hw->evb_veb = true; 9719daf8208SAnirudh Venkataramanan 972d337f2afSAnirudh Venkataramanan /* Query the allocated resources for Tx scheduler */ 9739c20346bSAnirudh Venkataramanan status = ice_sched_query_res_alloc(hw); 9749c20346bSAnirudh Venkataramanan if (status) { 9759228d8b2SJacob Keller ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n"); 9769c20346bSAnirudh Venkataramanan goto err_unroll_alloc; 9779c20346bSAnirudh Venkataramanan } 9784f8a1497SBen Shelton ice_sched_get_psm_clk_freq(hw); 9799c20346bSAnirudh Venkataramanan 980dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with scheduler data */ 981dc49c772SAnirudh Venkataramanan status = ice_sched_init_port(hw->port_info); 982dc49c772SAnirudh Venkataramanan if (status) 983dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 984dc49c772SAnirudh Venkataramanan 985dc49c772SAnirudh Venkataramanan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL); 986dc49c772SAnirudh Venkataramanan if (!pcaps) { 987d54699e2STony Nguyen status = -ENOMEM; 988dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 989dc49c772SAnirudh Venkataramanan } 990dc49c772SAnirudh Venkataramanan 991dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with PHY capabilities */ 992dc49c772SAnirudh Venkataramanan status = ice_aq_get_phy_caps(hw->port_info, false, 993d6730a87SAnirudh Venkataramanan ICE_AQC_REPORT_TOPO_CAP_MEDIA, pcaps, 994d6730a87SAnirudh Venkataramanan NULL); 995dc49c772SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 996dc49c772SAnirudh Venkataramanan if (status) 997f2651a91SPaul M Stillwell Jr dev_warn(ice_hw_to_dev(hw), "Get PHY capabilities failed status = %d, continuing anyway\n", 998f2651a91SPaul M Stillwell Jr status); 999dc49c772SAnirudh Venkataramanan 1000dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with link information */ 1001dc49c772SAnirudh Venkataramanan status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL); 1002dc49c772SAnirudh Venkataramanan if (status) 1003dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 1004dc49c772SAnirudh Venkataramanan 1005b36c598cSAnirudh Venkataramanan /* need a valid SW entry point to build a Tx tree */ 1006b36c598cSAnirudh Venkataramanan if (!hw->sw_entry_point_layer) { 1007b36c598cSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "invalid sw entry point\n"); 1008d54699e2STony Nguyen status = -EIO; 1009b36c598cSAnirudh Venkataramanan goto err_unroll_sched; 1010b36c598cSAnirudh Venkataramanan } 10119be1d6f8SAnirudh Venkataramanan INIT_LIST_HEAD(&hw->agg_list); 10121ddef455SUsha Ketineni /* Initialize max burst size */ 10131ddef455SUsha Ketineni if (!hw->max_burst_size) 10141ddef455SUsha Ketineni ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE); 1015b36c598cSAnirudh Venkataramanan 10169daf8208SAnirudh Venkataramanan status = ice_init_fltr_mgmt_struct(hw); 10179daf8208SAnirudh Venkataramanan if (status) 10189daf8208SAnirudh Venkataramanan goto err_unroll_sched; 10199daf8208SAnirudh Venkataramanan 1020d6fef10cSMd Fahad Iqbal Polash /* Get MAC information */ 1021d6fef10cSMd Fahad Iqbal Polash /* A single port can report up to two (LAN and WoL) addresses */ 1022d6fef10cSMd Fahad Iqbal Polash mac_buf = devm_kcalloc(ice_hw_to_dev(hw), 2, 1023d6fef10cSMd Fahad Iqbal Polash sizeof(struct ice_aqc_manage_mac_read_resp), 1024d6fef10cSMd Fahad Iqbal Polash GFP_KERNEL); 1025d6fef10cSMd Fahad Iqbal Polash mac_buf_len = 2 * sizeof(struct ice_aqc_manage_mac_read_resp); 1026dc49c772SAnirudh Venkataramanan 102763bb4e1eSWei Yongjun if (!mac_buf) { 1028d54699e2STony Nguyen status = -ENOMEM; 10299daf8208SAnirudh Venkataramanan goto err_unroll_fltr_mgmt_struct; 103063bb4e1eSWei Yongjun } 1031dc49c772SAnirudh Venkataramanan 1032dc49c772SAnirudh Venkataramanan status = ice_aq_manage_mac_read(hw, mac_buf, mac_buf_len, NULL); 1033dc49c772SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), mac_buf); 1034dc49c772SAnirudh Venkataramanan 1035dc49c772SAnirudh Venkataramanan if (status) 10369daf8208SAnirudh Venkataramanan goto err_unroll_fltr_mgmt_struct; 103742449105SAnirudh Venkataramanan /* enable jumbo frame support at MAC level */ 103842449105SAnirudh Venkataramanan status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL); 103942449105SAnirudh Venkataramanan if (status) 104042449105SAnirudh Venkataramanan goto err_unroll_fltr_mgmt_struct; 1041148beb61SHenry Tieman /* Obtain counter base index which would be used by flow director */ 1042148beb61SHenry Tieman status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base); 1043148beb61SHenry Tieman if (status) 1044148beb61SHenry Tieman goto err_unroll_fltr_mgmt_struct; 104532d63fa1STony Nguyen status = ice_init_hw_tbls(hw); 104632d63fa1STony Nguyen if (status) 104732d63fa1STony Nguyen goto err_unroll_fltr_mgmt_struct; 1048a4e82a81STony Nguyen mutex_init(&hw->tnl_lock); 1049f31e4b6fSAnirudh Venkataramanan return 0; 1050f31e4b6fSAnirudh Venkataramanan 10519daf8208SAnirudh Venkataramanan err_unroll_fltr_mgmt_struct: 10529daf8208SAnirudh Venkataramanan ice_cleanup_fltr_mgmt_struct(hw); 1053dc49c772SAnirudh Venkataramanan err_unroll_sched: 1054dc49c772SAnirudh Venkataramanan ice_sched_cleanup_all(hw); 10559c20346bSAnirudh Venkataramanan err_unroll_alloc: 10569c20346bSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), hw->port_info); 1057f31e4b6fSAnirudh Venkataramanan err_unroll_cqinit: 10585c91ecfdSJacob Keller ice_destroy_all_ctrlq(hw); 1059f31e4b6fSAnirudh Venkataramanan return status; 1060f31e4b6fSAnirudh Venkataramanan } 1061f31e4b6fSAnirudh Venkataramanan 1062f31e4b6fSAnirudh Venkataramanan /** 1063f31e4b6fSAnirudh Venkataramanan * ice_deinit_hw - unroll initialization operations done by ice_init_hw 1064f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 1065ed14245aSAnirudh Venkataramanan * 1066ed14245aSAnirudh Venkataramanan * This should be called only during nominal operation, not as a result of 1067ed14245aSAnirudh Venkataramanan * ice_init_hw() failing since ice_init_hw() will take care of unrolling 1068ed14245aSAnirudh Venkataramanan * applicable initializations if it fails for any reason. 1069f31e4b6fSAnirudh Venkataramanan */ 1070f31e4b6fSAnirudh Venkataramanan void ice_deinit_hw(struct ice_hw *hw) 1071f31e4b6fSAnirudh Venkataramanan { 1072148beb61SHenry Tieman ice_free_fd_res_cntr(hw, hw->fd_ctr_base); 10738b97ceb1SHieu Tran ice_cleanup_fltr_mgmt_struct(hw); 10748b97ceb1SHieu Tran 10759c20346bSAnirudh Venkataramanan ice_sched_cleanup_all(hw); 10769be1d6f8SAnirudh Venkataramanan ice_sched_clear_agg(hw); 1077c7648810STony Nguyen ice_free_seg(hw); 107832d63fa1STony Nguyen ice_free_hw_tbls(hw); 1079a4e82a81STony Nguyen mutex_destroy(&hw->tnl_lock); 1080dc49c772SAnirudh Venkataramanan 10819c20346bSAnirudh Venkataramanan if (hw->port_info) { 10829c20346bSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), hw->port_info); 10839c20346bSAnirudh Venkataramanan hw->port_info = NULL; 10849c20346bSAnirudh Venkataramanan } 10859daf8208SAnirudh Venkataramanan 10868b97ceb1SHieu Tran /* Attempt to disable FW logging before shutting down control queues */ 10878b97ceb1SHieu Tran ice_cfg_fw_log(hw, false); 10885c91ecfdSJacob Keller ice_destroy_all_ctrlq(hw); 108933e055fcSVictor Raj 109033e055fcSVictor Raj /* Clear VSI contexts if not already cleared */ 109133e055fcSVictor Raj ice_clear_all_vsi_ctx(hw); 1092f31e4b6fSAnirudh Venkataramanan } 1093f31e4b6fSAnirudh Venkataramanan 1094f31e4b6fSAnirudh Venkataramanan /** 1095f31e4b6fSAnirudh Venkataramanan * ice_check_reset - Check to see if a global reset is complete 1096f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 1097f31e4b6fSAnirudh Venkataramanan */ 10985e24d598STony Nguyen int ice_check_reset(struct ice_hw *hw) 1099f31e4b6fSAnirudh Venkataramanan { 1100585cdabdSNick Nunley u32 cnt, reg = 0, grst_timeout, uld_mask; 1101f31e4b6fSAnirudh Venkataramanan 1102f31e4b6fSAnirudh Venkataramanan /* Poll for Device Active state in case a recent CORER, GLOBR, 1103f31e4b6fSAnirudh Venkataramanan * or EMPR has occurred. The grst delay value is in 100ms units. 1104f31e4b6fSAnirudh Venkataramanan * Add 1sec for outstanding AQ commands that can take a long time. 1105f31e4b6fSAnirudh Venkataramanan */ 1106585cdabdSNick Nunley grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >> 1107f31e4b6fSAnirudh Venkataramanan GLGEN_RSTCTL_GRSTDEL_S) + 10; 1108f31e4b6fSAnirudh Venkataramanan 1109585cdabdSNick Nunley for (cnt = 0; cnt < grst_timeout; cnt++) { 1110f31e4b6fSAnirudh Venkataramanan mdelay(100); 1111f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, GLGEN_RSTAT); 1112f31e4b6fSAnirudh Venkataramanan if (!(reg & GLGEN_RSTAT_DEVSTATE_M)) 1113f31e4b6fSAnirudh Venkataramanan break; 1114f31e4b6fSAnirudh Venkataramanan } 1115f31e4b6fSAnirudh Venkataramanan 1116585cdabdSNick Nunley if (cnt == grst_timeout) { 11179228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n"); 1118d54699e2STony Nguyen return -EIO; 1119f31e4b6fSAnirudh Venkataramanan } 1120f31e4b6fSAnirudh Venkataramanan 1121cf8fc2a0SBruce Allan #define ICE_RESET_DONE_MASK (GLNVM_ULD_PCIER_DONE_M |\ 1122cf8fc2a0SBruce Allan GLNVM_ULD_PCIER_DONE_1_M |\ 1123cf8fc2a0SBruce Allan GLNVM_ULD_CORER_DONE_M |\ 1124cf8fc2a0SBruce Allan GLNVM_ULD_GLOBR_DONE_M |\ 1125cf8fc2a0SBruce Allan GLNVM_ULD_POR_DONE_M |\ 1126cf8fc2a0SBruce Allan GLNVM_ULD_POR_DONE_1_M |\ 1127cf8fc2a0SBruce Allan GLNVM_ULD_PCIER_DONE_2_M) 1128cf8fc2a0SBruce Allan 1129d25a0fc4SDave Ertman uld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.rdma ? 1130d25a0fc4SDave Ertman GLNVM_ULD_PE_DONE_M : 0); 1131f31e4b6fSAnirudh Venkataramanan 1132f31e4b6fSAnirudh Venkataramanan /* Device is Active; check Global Reset processes are done */ 1133f31e4b6fSAnirudh Venkataramanan for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { 1134cf8fc2a0SBruce Allan reg = rd32(hw, GLNVM_ULD) & uld_mask; 1135cf8fc2a0SBruce Allan if (reg == uld_mask) { 11369228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt); 1137f31e4b6fSAnirudh Venkataramanan break; 1138f31e4b6fSAnirudh Venkataramanan } 1139f31e4b6fSAnirudh Venkataramanan mdelay(10); 1140f31e4b6fSAnirudh Venkataramanan } 1141f31e4b6fSAnirudh Venkataramanan 1142f31e4b6fSAnirudh Venkataramanan if (cnt == ICE_PF_RESET_WAIT_COUNT) { 11439228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n", 1144f31e4b6fSAnirudh Venkataramanan reg); 1145d54699e2STony Nguyen return -EIO; 1146f31e4b6fSAnirudh Venkataramanan } 1147f31e4b6fSAnirudh Venkataramanan 1148f31e4b6fSAnirudh Venkataramanan return 0; 1149f31e4b6fSAnirudh Venkataramanan } 1150f31e4b6fSAnirudh Venkataramanan 1151f31e4b6fSAnirudh Venkataramanan /** 1152f31e4b6fSAnirudh Venkataramanan * ice_pf_reset - Reset the PF 1153f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 1154f31e4b6fSAnirudh Venkataramanan * 1155f31e4b6fSAnirudh Venkataramanan * If a global reset has been triggered, this function checks 1156f31e4b6fSAnirudh Venkataramanan * for its completion and then issues the PF reset 1157f31e4b6fSAnirudh Venkataramanan */ 11585e24d598STony Nguyen static int ice_pf_reset(struct ice_hw *hw) 1159f31e4b6fSAnirudh Venkataramanan { 1160f31e4b6fSAnirudh Venkataramanan u32 cnt, reg; 1161f31e4b6fSAnirudh Venkataramanan 1162f31e4b6fSAnirudh Venkataramanan /* If at function entry a global reset was already in progress, i.e. 1163f31e4b6fSAnirudh Venkataramanan * state is not 'device active' or any of the reset done bits are not 1164f31e4b6fSAnirudh Venkataramanan * set in GLNVM_ULD, there is no need for a PF Reset; poll until the 1165f31e4b6fSAnirudh Venkataramanan * global reset is done. 1166f31e4b6fSAnirudh Venkataramanan */ 1167f31e4b6fSAnirudh Venkataramanan if ((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) || 1168f31e4b6fSAnirudh Venkataramanan (rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK) ^ ICE_RESET_DONE_MASK) { 1169f31e4b6fSAnirudh Venkataramanan /* poll on global reset currently in progress until done */ 1170f31e4b6fSAnirudh Venkataramanan if (ice_check_reset(hw)) 1171d54699e2STony Nguyen return -EIO; 1172f31e4b6fSAnirudh Venkataramanan 1173f31e4b6fSAnirudh Venkataramanan return 0; 1174f31e4b6fSAnirudh Venkataramanan } 1175f31e4b6fSAnirudh Venkataramanan 1176f31e4b6fSAnirudh Venkataramanan /* Reset the PF */ 1177f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, PFGEN_CTRL); 1178f31e4b6fSAnirudh Venkataramanan 1179f31e4b6fSAnirudh Venkataramanan wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M)); 1180f31e4b6fSAnirudh Venkataramanan 1181c9a12d6dSDan Nowlin /* Wait for the PFR to complete. The wait time is the global config lock 1182c9a12d6dSDan Nowlin * timeout plus the PFR timeout which will account for a possible reset 1183c9a12d6dSDan Nowlin * that is occurring during a download package operation. 1184c9a12d6dSDan Nowlin */ 1185c9a12d6dSDan Nowlin for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT + 1186c9a12d6dSDan Nowlin ICE_PF_RESET_WAIT_COUNT; cnt++) { 1187f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, PFGEN_CTRL); 1188f31e4b6fSAnirudh Venkataramanan if (!(reg & PFGEN_CTRL_PFSWR_M)) 1189f31e4b6fSAnirudh Venkataramanan break; 1190f31e4b6fSAnirudh Venkataramanan 1191f31e4b6fSAnirudh Venkataramanan mdelay(1); 1192f31e4b6fSAnirudh Venkataramanan } 1193f31e4b6fSAnirudh Venkataramanan 1194f31e4b6fSAnirudh Venkataramanan if (cnt == ICE_PF_RESET_WAIT_COUNT) { 11959228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n"); 1196d54699e2STony Nguyen return -EIO; 1197f31e4b6fSAnirudh Venkataramanan } 1198f31e4b6fSAnirudh Venkataramanan 1199f31e4b6fSAnirudh Venkataramanan return 0; 1200f31e4b6fSAnirudh Venkataramanan } 1201f31e4b6fSAnirudh Venkataramanan 1202f31e4b6fSAnirudh Venkataramanan /** 1203f31e4b6fSAnirudh Venkataramanan * ice_reset - Perform different types of reset 1204f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 1205f31e4b6fSAnirudh Venkataramanan * @req: reset request 1206f31e4b6fSAnirudh Venkataramanan * 1207f31e4b6fSAnirudh Venkataramanan * This function triggers a reset as specified by the req parameter. 1208f31e4b6fSAnirudh Venkataramanan * 1209f31e4b6fSAnirudh Venkataramanan * Note: 1210f31e4b6fSAnirudh Venkataramanan * If anything other than a PF reset is triggered, PXE mode is restored. 1211f31e4b6fSAnirudh Venkataramanan * This has to be cleared using ice_clear_pxe_mode again, once the AQ 1212f31e4b6fSAnirudh Venkataramanan * interface has been restored in the rebuild flow. 1213f31e4b6fSAnirudh Venkataramanan */ 12145e24d598STony Nguyen int ice_reset(struct ice_hw *hw, enum ice_reset_req req) 1215f31e4b6fSAnirudh Venkataramanan { 1216f31e4b6fSAnirudh Venkataramanan u32 val = 0; 1217f31e4b6fSAnirudh Venkataramanan 1218f31e4b6fSAnirudh Venkataramanan switch (req) { 1219f31e4b6fSAnirudh Venkataramanan case ICE_RESET_PFR: 1220f31e4b6fSAnirudh Venkataramanan return ice_pf_reset(hw); 1221f31e4b6fSAnirudh Venkataramanan case ICE_RESET_CORER: 1222f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, "CoreR requested\n"); 1223f31e4b6fSAnirudh Venkataramanan val = GLGEN_RTRIG_CORER_M; 1224f31e4b6fSAnirudh Venkataramanan break; 1225f31e4b6fSAnirudh Venkataramanan case ICE_RESET_GLOBR: 1226f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, "GlobalR requested\n"); 1227f31e4b6fSAnirudh Venkataramanan val = GLGEN_RTRIG_GLOBR_M; 1228f31e4b6fSAnirudh Venkataramanan break; 12290f9d5027SAnirudh Venkataramanan default: 1230d54699e2STony Nguyen return -EINVAL; 1231f31e4b6fSAnirudh Venkataramanan } 1232f31e4b6fSAnirudh Venkataramanan 1233f31e4b6fSAnirudh Venkataramanan val |= rd32(hw, GLGEN_RTRIG); 1234f31e4b6fSAnirudh Venkataramanan wr32(hw, GLGEN_RTRIG, val); 1235f31e4b6fSAnirudh Venkataramanan ice_flush(hw); 1236f31e4b6fSAnirudh Venkataramanan 1237f31e4b6fSAnirudh Venkataramanan /* wait for the FW to be ready */ 1238f31e4b6fSAnirudh Venkataramanan return ice_check_reset(hw); 1239f31e4b6fSAnirudh Venkataramanan } 1240f31e4b6fSAnirudh Venkataramanan 12417ec59eeaSAnirudh Venkataramanan /** 1242cdedef59SAnirudh Venkataramanan * ice_copy_rxq_ctx_to_hw 1243cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 1244cdedef59SAnirudh Venkataramanan * @ice_rxq_ctx: pointer to the rxq context 1245d337f2afSAnirudh Venkataramanan * @rxq_index: the index of the Rx queue 1246cdedef59SAnirudh Venkataramanan * 1247f9867df6SAnirudh Venkataramanan * Copies rxq context from dense structure to HW register space 1248cdedef59SAnirudh Venkataramanan */ 12495e24d598STony Nguyen static int 1250cdedef59SAnirudh Venkataramanan ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index) 1251cdedef59SAnirudh Venkataramanan { 1252cdedef59SAnirudh Venkataramanan u8 i; 1253cdedef59SAnirudh Venkataramanan 1254cdedef59SAnirudh Venkataramanan if (!ice_rxq_ctx) 1255d54699e2STony Nguyen return -EINVAL; 1256cdedef59SAnirudh Venkataramanan 1257cdedef59SAnirudh Venkataramanan if (rxq_index > QRX_CTRL_MAX_INDEX) 1258d54699e2STony Nguyen return -EINVAL; 1259cdedef59SAnirudh Venkataramanan 1260f9867df6SAnirudh Venkataramanan /* Copy each dword separately to HW */ 1261cdedef59SAnirudh Venkataramanan for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) { 1262cdedef59SAnirudh Venkataramanan wr32(hw, QRX_CONTEXT(i, rxq_index), 1263cdedef59SAnirudh Venkataramanan *((u32 *)(ice_rxq_ctx + (i * sizeof(u32))))); 1264cdedef59SAnirudh Venkataramanan 1265cdedef59SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, 1266cdedef59SAnirudh Venkataramanan *((u32 *)(ice_rxq_ctx + (i * sizeof(u32))))); 1267cdedef59SAnirudh Venkataramanan } 1268cdedef59SAnirudh Venkataramanan 1269cdedef59SAnirudh Venkataramanan return 0; 1270cdedef59SAnirudh Venkataramanan } 1271cdedef59SAnirudh Venkataramanan 1272cdedef59SAnirudh Venkataramanan /* LAN Rx Queue Context */ 1273cdedef59SAnirudh Venkataramanan static const struct ice_ctx_ele ice_rlan_ctx_info[] = { 1274cdedef59SAnirudh Venkataramanan /* Field Width LSB */ 1275cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, head, 13, 0), 1276cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, cpuid, 8, 13), 1277cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, base, 57, 32), 1278cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, qlen, 13, 89), 1279cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dbuf, 7, 102), 1280cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hbuf, 5, 109), 1281cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dtype, 2, 114), 1282cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dsize, 1, 116), 1283cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, crcstrip, 1, 117), 1284cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, l2tsel, 1, 119), 1285cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hsplit_0, 4, 120), 1286cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hsplit_1, 2, 124), 1287cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, showiv, 1, 127), 1288cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, rxmax, 14, 174), 1289cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphrdesc_ena, 1, 193), 1290cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphwdesc_ena, 1, 194), 1291cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphdata_ena, 1, 195), 1292cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphhead_ena, 1, 196), 1293cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, lrxqthresh, 3, 198), 1294c31a5c25SBrett Creeley ICE_CTX_STORE(ice_rlan_ctx, prefena, 1, 201), 1295cdedef59SAnirudh Venkataramanan { 0 } 1296cdedef59SAnirudh Venkataramanan }; 1297cdedef59SAnirudh Venkataramanan 1298cdedef59SAnirudh Venkataramanan /** 1299cdedef59SAnirudh Venkataramanan * ice_write_rxq_ctx 1300cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 1301cdedef59SAnirudh Venkataramanan * @rlan_ctx: pointer to the rxq context 1302d337f2afSAnirudh Venkataramanan * @rxq_index: the index of the Rx queue 1303cdedef59SAnirudh Venkataramanan * 1304cdedef59SAnirudh Venkataramanan * Converts rxq context from sparse to dense structure and then writes 1305c31a5c25SBrett Creeley * it to HW register space and enables the hardware to prefetch descriptors 1306c31a5c25SBrett Creeley * instead of only fetching them on demand 1307cdedef59SAnirudh Venkataramanan */ 13085e24d598STony Nguyen int 1309cdedef59SAnirudh Venkataramanan ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, 1310cdedef59SAnirudh Venkataramanan u32 rxq_index) 1311cdedef59SAnirudh Venkataramanan { 1312cdedef59SAnirudh Venkataramanan u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 }; 1313cdedef59SAnirudh Venkataramanan 1314c31a5c25SBrett Creeley if (!rlan_ctx) 1315d54699e2STony Nguyen return -EINVAL; 1316c31a5c25SBrett Creeley 1317c31a5c25SBrett Creeley rlan_ctx->prefena = 1; 1318c31a5c25SBrett Creeley 13197e34786aSBruce Allan ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info); 1320cdedef59SAnirudh Venkataramanan return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index); 1321cdedef59SAnirudh Venkataramanan } 1322cdedef59SAnirudh Venkataramanan 1323cdedef59SAnirudh Venkataramanan /* LAN Tx Queue Context */ 1324cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele ice_tlan_ctx_info[] = { 1325cdedef59SAnirudh Venkataramanan /* Field Width LSB */ 1326cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, base, 57, 0), 1327cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, port_num, 3, 57), 1328cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cgd_num, 5, 60), 1329cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, pf_num, 3, 65), 1330cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, vmvf_num, 10, 68), 1331cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, vmvf_type, 2, 78), 1332cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, src_vsi, 10, 80), 1333cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tsyn_ena, 1, 90), 1334201beeb7SAshish Shah ICE_CTX_STORE(ice_tlan_ctx, internal_usage_flag, 1, 91), 1335cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, alt_vlan, 1, 92), 1336cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cpuid, 8, 93), 1337cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, wb_mode, 1, 101), 1338cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphrd_desc, 1, 102), 1339cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphrd, 1, 103), 1340cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphwr_desc, 1, 104), 1341cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cmpq_id, 9, 105), 1342cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, qnum_in_func, 14, 114), 1343cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, itr_notification_mode, 1, 128), 1344cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, adjust_prof_id, 6, 129), 1345cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, qlen, 13, 135), 1346cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, quanta_prof_idx, 4, 148), 1347cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tso_ena, 1, 152), 1348cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tso_qnum, 11, 153), 1349cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, legacy_int, 1, 164), 1350cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, drop_ena, 1, 165), 1351cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx, 2, 166), 1352cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx, 3, 168), 1353201beeb7SAshish Shah ICE_CTX_STORE(ice_tlan_ctx, int_q_state, 122, 171), 1354cdedef59SAnirudh Venkataramanan { 0 } 1355cdedef59SAnirudh Venkataramanan }; 1356cdedef59SAnirudh Venkataramanan 13578f5ee3c4SJacob Keller /* Sideband Queue command wrappers */ 13588f5ee3c4SJacob Keller 13598f5ee3c4SJacob Keller /** 13608f5ee3c4SJacob Keller * ice_sbq_send_cmd - send Sideband Queue command to Sideband Queue 13618f5ee3c4SJacob Keller * @hw: pointer to the HW struct 13628f5ee3c4SJacob Keller * @desc: descriptor describing the command 13638f5ee3c4SJacob Keller * @buf: buffer to use for indirect commands (NULL for direct commands) 13648f5ee3c4SJacob Keller * @buf_size: size of buffer for indirect commands (0 for direct commands) 13658f5ee3c4SJacob Keller * @cd: pointer to command details structure 13668f5ee3c4SJacob Keller */ 13678f5ee3c4SJacob Keller static int 13688f5ee3c4SJacob Keller ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc, 13698f5ee3c4SJacob Keller void *buf, u16 buf_size, struct ice_sq_cd *cd) 13708f5ee3c4SJacob Keller { 1371d54699e2STony Nguyen return ice_sq_send_cmd(hw, ice_get_sbq(hw), 1372d54699e2STony Nguyen (struct ice_aq_desc *)desc, buf, buf_size, cd); 13738f5ee3c4SJacob Keller } 13748f5ee3c4SJacob Keller 13758f5ee3c4SJacob Keller /** 13768f5ee3c4SJacob Keller * ice_sbq_rw_reg - Fill Sideband Queue command 13778f5ee3c4SJacob Keller * @hw: pointer to the HW struct 13788f5ee3c4SJacob Keller * @in: message info to be filled in descriptor 13798f5ee3c4SJacob Keller */ 13808f5ee3c4SJacob Keller int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in) 13818f5ee3c4SJacob Keller { 13828f5ee3c4SJacob Keller struct ice_sbq_cmd_desc desc = {0}; 13838f5ee3c4SJacob Keller struct ice_sbq_msg_req msg = {0}; 13848f5ee3c4SJacob Keller u16 msg_len; 13858f5ee3c4SJacob Keller int status; 13868f5ee3c4SJacob Keller 13878f5ee3c4SJacob Keller msg_len = sizeof(msg); 13888f5ee3c4SJacob Keller 13898f5ee3c4SJacob Keller msg.dest_dev = in->dest_dev; 13908f5ee3c4SJacob Keller msg.opcode = in->opcode; 13918f5ee3c4SJacob Keller msg.flags = ICE_SBQ_MSG_FLAGS; 13928f5ee3c4SJacob Keller msg.sbe_fbe = ICE_SBQ_MSG_SBE_FBE; 13938f5ee3c4SJacob Keller msg.msg_addr_low = cpu_to_le16(in->msg_addr_low); 13948f5ee3c4SJacob Keller msg.msg_addr_high = cpu_to_le32(in->msg_addr_high); 13958f5ee3c4SJacob Keller 13968f5ee3c4SJacob Keller if (in->opcode) 13978f5ee3c4SJacob Keller msg.data = cpu_to_le32(in->data); 13988f5ee3c4SJacob Keller else 13998f5ee3c4SJacob Keller /* data read comes back in completion, so shorten the struct by 14008f5ee3c4SJacob Keller * sizeof(msg.data) 14018f5ee3c4SJacob Keller */ 14028f5ee3c4SJacob Keller msg_len -= sizeof(msg.data); 14038f5ee3c4SJacob Keller 14048f5ee3c4SJacob Keller desc.flags = cpu_to_le16(ICE_AQ_FLAG_RD); 14058f5ee3c4SJacob Keller desc.opcode = cpu_to_le16(ice_sbq_opc_neigh_dev_req); 14068f5ee3c4SJacob Keller desc.param0.cmd_len = cpu_to_le16(msg_len); 14078f5ee3c4SJacob Keller status = ice_sbq_send_cmd(hw, &desc, &msg, msg_len, NULL); 14088f5ee3c4SJacob Keller if (!status && !in->opcode) 14098f5ee3c4SJacob Keller in->data = le32_to_cpu 14108f5ee3c4SJacob Keller (((struct ice_sbq_msg_cmpl *)&msg)->data); 14118f5ee3c4SJacob Keller return status; 14128f5ee3c4SJacob Keller } 14138f5ee3c4SJacob Keller 14147ec59eeaSAnirudh Venkataramanan /* FW Admin Queue command wrappers */ 14157ec59eeaSAnirudh Venkataramanan 1416c7648810STony Nguyen /* Software lock/mutex that is meant to be held while the Global Config Lock 1417c7648810STony Nguyen * in firmware is acquired by the software to prevent most (but not all) types 1418c7648810STony Nguyen * of AQ commands from being sent to FW 1419c7648810STony Nguyen */ 1420c7648810STony Nguyen DEFINE_MUTEX(ice_global_cfg_lock_sw); 1421c7648810STony Nguyen 14227ec59eeaSAnirudh Venkataramanan /** 14233056df93SChinh T Cao * ice_should_retry_sq_send_cmd 14243056df93SChinh T Cao * @opcode: AQ opcode 14253056df93SChinh T Cao * 14263056df93SChinh T Cao * Decide if we should retry the send command routine for the ATQ, depending 14273056df93SChinh T Cao * on the opcode. 14283056df93SChinh T Cao */ 14293056df93SChinh T Cao static bool ice_should_retry_sq_send_cmd(u16 opcode) 14303056df93SChinh T Cao { 14313056df93SChinh T Cao switch (opcode) { 14323056df93SChinh T Cao case ice_aqc_opc_get_link_topo: 14333056df93SChinh T Cao case ice_aqc_opc_lldp_stop: 14343056df93SChinh T Cao case ice_aqc_opc_lldp_start: 14353056df93SChinh T Cao case ice_aqc_opc_lldp_filter_ctrl: 14363056df93SChinh T Cao return true; 14373056df93SChinh T Cao } 14383056df93SChinh T Cao 14393056df93SChinh T Cao return false; 14403056df93SChinh T Cao } 14413056df93SChinh T Cao 14423056df93SChinh T Cao /** 14433056df93SChinh T Cao * ice_sq_send_cmd_retry - send command to Control Queue (ATQ) 14443056df93SChinh T Cao * @hw: pointer to the HW struct 14453056df93SChinh T Cao * @cq: pointer to the specific Control queue 14463056df93SChinh T Cao * @desc: prefilled descriptor describing the command 14473056df93SChinh T Cao * @buf: buffer to use for indirect commands (or NULL for direct commands) 14483056df93SChinh T Cao * @buf_size: size of buffer for indirect commands (or 0 for direct commands) 14493056df93SChinh T Cao * @cd: pointer to command details structure 14503056df93SChinh T Cao * 14513056df93SChinh T Cao * Retry sending the FW Admin Queue command, multiple times, to the FW Admin 14523056df93SChinh T Cao * Queue if the EBUSY AQ error is returned. 14533056df93SChinh T Cao */ 14545e24d598STony Nguyen static int 14553056df93SChinh T Cao ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq, 14563056df93SChinh T Cao struct ice_aq_desc *desc, void *buf, u16 buf_size, 14573056df93SChinh T Cao struct ice_sq_cd *cd) 14583056df93SChinh T Cao { 14593056df93SChinh T Cao struct ice_aq_desc desc_cpy; 14603056df93SChinh T Cao bool is_cmd_for_retry; 14613056df93SChinh T Cao u8 *buf_cpy = NULL; 14623056df93SChinh T Cao u8 idx = 0; 14633056df93SChinh T Cao u16 opcode; 14645518ac2aSTony Nguyen int status; 14653056df93SChinh T Cao 14663056df93SChinh T Cao opcode = le16_to_cpu(desc->opcode); 14673056df93SChinh T Cao is_cmd_for_retry = ice_should_retry_sq_send_cmd(opcode); 14683056df93SChinh T Cao memset(&desc_cpy, 0, sizeof(desc_cpy)); 14693056df93SChinh T Cao 14703056df93SChinh T Cao if (is_cmd_for_retry) { 14713056df93SChinh T Cao if (buf) { 14723056df93SChinh T Cao buf_cpy = kzalloc(buf_size, GFP_KERNEL); 14733056df93SChinh T Cao if (!buf_cpy) 1474d54699e2STony Nguyen return -ENOMEM; 14753056df93SChinh T Cao } 14763056df93SChinh T Cao 14773056df93SChinh T Cao memcpy(&desc_cpy, desc, sizeof(desc_cpy)); 14783056df93SChinh T Cao } 14793056df93SChinh T Cao 14803056df93SChinh T Cao do { 14813056df93SChinh T Cao status = ice_sq_send_cmd(hw, cq, desc, buf, buf_size, cd); 14823056df93SChinh T Cao 14833056df93SChinh T Cao if (!is_cmd_for_retry || !status || 14843056df93SChinh T Cao hw->adminq.sq_last_status != ICE_AQ_RC_EBUSY) 14853056df93SChinh T Cao break; 14863056df93SChinh T Cao 14873056df93SChinh T Cao if (buf_cpy) 14883056df93SChinh T Cao memcpy(buf, buf_cpy, buf_size); 14893056df93SChinh T Cao 14903056df93SChinh T Cao memcpy(desc, &desc_cpy, sizeof(desc_cpy)); 14913056df93SChinh T Cao 14923056df93SChinh T Cao mdelay(ICE_SQ_SEND_DELAY_TIME_MS); 14933056df93SChinh T Cao 14943056df93SChinh T Cao } while (++idx < ICE_SQ_SEND_MAX_EXECUTE); 14953056df93SChinh T Cao 14963056df93SChinh T Cao kfree(buf_cpy); 14973056df93SChinh T Cao 14983056df93SChinh T Cao return status; 14993056df93SChinh T Cao } 15003056df93SChinh T Cao 15013056df93SChinh T Cao /** 15027ec59eeaSAnirudh Venkataramanan * ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue 1503f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 15047ec59eeaSAnirudh Venkataramanan * @desc: descriptor describing the command 15057ec59eeaSAnirudh Venkataramanan * @buf: buffer to use for indirect commands (NULL for direct commands) 15067ec59eeaSAnirudh Venkataramanan * @buf_size: size of buffer for indirect commands (0 for direct commands) 15077ec59eeaSAnirudh Venkataramanan * @cd: pointer to command details structure 15087ec59eeaSAnirudh Venkataramanan * 15097ec59eeaSAnirudh Venkataramanan * Helper function to send FW Admin Queue commands to the FW Admin Queue. 15107ec59eeaSAnirudh Venkataramanan */ 15115e24d598STony Nguyen int 15127ec59eeaSAnirudh Venkataramanan ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf, 15137ec59eeaSAnirudh Venkataramanan u16 buf_size, struct ice_sq_cd *cd) 15147ec59eeaSAnirudh Venkataramanan { 1515c7648810STony Nguyen struct ice_aqc_req_res *cmd = &desc->params.res_owner; 1516c7648810STony Nguyen bool lock_acquired = false; 15175e24d598STony Nguyen int status; 1518c7648810STony Nguyen 1519c7648810STony Nguyen /* When a package download is in process (i.e. when the firmware's 1520c7648810STony Nguyen * Global Configuration Lock resource is held), only the Download 1521*a1ffafb0SBrett Creeley * Package, Get Version, Get Package Info List, Upload Section, 1522*a1ffafb0SBrett Creeley * Update Package, Set Port Parameters, Get/Set VLAN Mode Parameters, 1523*a1ffafb0SBrett Creeley * Add Recipe, Set Recipes to Profile Association, Get Recipe, and Get 1524*a1ffafb0SBrett Creeley * Recipes to Profile Association, and Release Resource (with resource 1525*a1ffafb0SBrett Creeley * ID set to Global Config Lock) AdminQ commands are allowed; all others 1526*a1ffafb0SBrett Creeley * must block until the package download completes and the Global Config 1527*a1ffafb0SBrett Creeley * Lock is released. See also ice_acquire_global_cfg_lock(). 1528c7648810STony Nguyen */ 1529c7648810STony Nguyen switch (le16_to_cpu(desc->opcode)) { 1530c7648810STony Nguyen case ice_aqc_opc_download_pkg: 1531c7648810STony Nguyen case ice_aqc_opc_get_pkg_info_list: 1532c7648810STony Nguyen case ice_aqc_opc_get_ver: 1533*a1ffafb0SBrett Creeley case ice_aqc_opc_upload_section: 1534*a1ffafb0SBrett Creeley case ice_aqc_opc_update_pkg: 1535*a1ffafb0SBrett Creeley case ice_aqc_opc_set_port_params: 1536*a1ffafb0SBrett Creeley case ice_aqc_opc_get_vlan_mode_parameters: 1537*a1ffafb0SBrett Creeley case ice_aqc_opc_set_vlan_mode_parameters: 1538*a1ffafb0SBrett Creeley case ice_aqc_opc_add_recipe: 1539*a1ffafb0SBrett Creeley case ice_aqc_opc_recipe_to_profile: 1540*a1ffafb0SBrett Creeley case ice_aqc_opc_get_recipe: 1541*a1ffafb0SBrett Creeley case ice_aqc_opc_get_recipe_to_profile: 1542c7648810STony Nguyen break; 1543c7648810STony Nguyen case ice_aqc_opc_release_res: 1544c7648810STony Nguyen if (le16_to_cpu(cmd->res_id) == ICE_AQC_RES_ID_GLBL_LOCK) 1545c7648810STony Nguyen break; 15464e83fc93SBruce Allan fallthrough; 1547c7648810STony Nguyen default: 1548c7648810STony Nguyen mutex_lock(&ice_global_cfg_lock_sw); 1549c7648810STony Nguyen lock_acquired = true; 1550c7648810STony Nguyen break; 1551c7648810STony Nguyen } 1552c7648810STony Nguyen 15533056df93SChinh T Cao status = ice_sq_send_cmd_retry(hw, &hw->adminq, desc, buf, buf_size, cd); 1554c7648810STony Nguyen if (lock_acquired) 1555c7648810STony Nguyen mutex_unlock(&ice_global_cfg_lock_sw); 1556c7648810STony Nguyen 1557c7648810STony Nguyen return status; 15587ec59eeaSAnirudh Venkataramanan } 15597ec59eeaSAnirudh Venkataramanan 15607ec59eeaSAnirudh Venkataramanan /** 15617ec59eeaSAnirudh Venkataramanan * ice_aq_get_fw_ver 1562f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 15637ec59eeaSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 15647ec59eeaSAnirudh Venkataramanan * 15657ec59eeaSAnirudh Venkataramanan * Get the firmware version (0x0001) from the admin queue commands 15667ec59eeaSAnirudh Venkataramanan */ 15675e24d598STony Nguyen int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd) 15687ec59eeaSAnirudh Venkataramanan { 15697ec59eeaSAnirudh Venkataramanan struct ice_aqc_get_ver *resp; 15707ec59eeaSAnirudh Venkataramanan struct ice_aq_desc desc; 15715e24d598STony Nguyen int status; 15727ec59eeaSAnirudh Venkataramanan 15737ec59eeaSAnirudh Venkataramanan resp = &desc.params.get_ver; 15747ec59eeaSAnirudh Venkataramanan 15757ec59eeaSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_ver); 15767ec59eeaSAnirudh Venkataramanan 15777ec59eeaSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 15787ec59eeaSAnirudh Venkataramanan 15797ec59eeaSAnirudh Venkataramanan if (!status) { 15807ec59eeaSAnirudh Venkataramanan hw->fw_branch = resp->fw_branch; 15817ec59eeaSAnirudh Venkataramanan hw->fw_maj_ver = resp->fw_major; 15827ec59eeaSAnirudh Venkataramanan hw->fw_min_ver = resp->fw_minor; 15837ec59eeaSAnirudh Venkataramanan hw->fw_patch = resp->fw_patch; 15847ec59eeaSAnirudh Venkataramanan hw->fw_build = le32_to_cpu(resp->fw_build); 15857ec59eeaSAnirudh Venkataramanan hw->api_branch = resp->api_branch; 15867ec59eeaSAnirudh Venkataramanan hw->api_maj_ver = resp->api_major; 15877ec59eeaSAnirudh Venkataramanan hw->api_min_ver = resp->api_minor; 15887ec59eeaSAnirudh Venkataramanan hw->api_patch = resp->api_patch; 15897ec59eeaSAnirudh Venkataramanan } 15907ec59eeaSAnirudh Venkataramanan 15917ec59eeaSAnirudh Venkataramanan return status; 15927ec59eeaSAnirudh Venkataramanan } 15937ec59eeaSAnirudh Venkataramanan 15947ec59eeaSAnirudh Venkataramanan /** 1595e3710a01SPaul M Stillwell Jr * ice_aq_send_driver_ver 1596e3710a01SPaul M Stillwell Jr * @hw: pointer to the HW struct 1597e3710a01SPaul M Stillwell Jr * @dv: driver's major, minor version 1598e3710a01SPaul M Stillwell Jr * @cd: pointer to command details structure or NULL 1599e3710a01SPaul M Stillwell Jr * 1600e3710a01SPaul M Stillwell Jr * Send the driver version (0x0002) to the firmware 1601e3710a01SPaul M Stillwell Jr */ 16025e24d598STony Nguyen int 1603e3710a01SPaul M Stillwell Jr ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv, 1604e3710a01SPaul M Stillwell Jr struct ice_sq_cd *cd) 1605e3710a01SPaul M Stillwell Jr { 1606e3710a01SPaul M Stillwell Jr struct ice_aqc_driver_ver *cmd; 1607e3710a01SPaul M Stillwell Jr struct ice_aq_desc desc; 1608e3710a01SPaul M Stillwell Jr u16 len; 1609e3710a01SPaul M Stillwell Jr 1610e3710a01SPaul M Stillwell Jr cmd = &desc.params.driver_ver; 1611e3710a01SPaul M Stillwell Jr 1612e3710a01SPaul M Stillwell Jr if (!dv) 1613d54699e2STony Nguyen return -EINVAL; 1614e3710a01SPaul M Stillwell Jr 1615e3710a01SPaul M Stillwell Jr ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_ver); 1616e3710a01SPaul M Stillwell Jr 1617e3710a01SPaul M Stillwell Jr desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 1618e3710a01SPaul M Stillwell Jr cmd->major_ver = dv->major_ver; 1619e3710a01SPaul M Stillwell Jr cmd->minor_ver = dv->minor_ver; 1620e3710a01SPaul M Stillwell Jr cmd->build_ver = dv->build_ver; 1621e3710a01SPaul M Stillwell Jr cmd->subbuild_ver = dv->subbuild_ver; 1622e3710a01SPaul M Stillwell Jr 1623e3710a01SPaul M Stillwell Jr len = 0; 1624e3710a01SPaul M Stillwell Jr while (len < sizeof(dv->driver_string) && 1625e3710a01SPaul M Stillwell Jr isascii(dv->driver_string[len]) && dv->driver_string[len]) 1626e3710a01SPaul M Stillwell Jr len++; 1627e3710a01SPaul M Stillwell Jr 1628e3710a01SPaul M Stillwell Jr return ice_aq_send_cmd(hw, &desc, dv->driver_string, len, cd); 1629e3710a01SPaul M Stillwell Jr } 1630e3710a01SPaul M Stillwell Jr 1631e3710a01SPaul M Stillwell Jr /** 16327ec59eeaSAnirudh Venkataramanan * ice_aq_q_shutdown 1633f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 16347ec59eeaSAnirudh Venkataramanan * @unloading: is the driver unloading itself 16357ec59eeaSAnirudh Venkataramanan * 16367ec59eeaSAnirudh Venkataramanan * Tell the Firmware that we're shutting down the AdminQ and whether 16377ec59eeaSAnirudh Venkataramanan * or not the driver is unloading as well (0x0003). 16387ec59eeaSAnirudh Venkataramanan */ 16395e24d598STony Nguyen int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading) 16407ec59eeaSAnirudh Venkataramanan { 16417ec59eeaSAnirudh Venkataramanan struct ice_aqc_q_shutdown *cmd; 16427ec59eeaSAnirudh Venkataramanan struct ice_aq_desc desc; 16437ec59eeaSAnirudh Venkataramanan 16447ec59eeaSAnirudh Venkataramanan cmd = &desc.params.q_shutdown; 16457ec59eeaSAnirudh Venkataramanan 16467ec59eeaSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_q_shutdown); 16477ec59eeaSAnirudh Venkataramanan 16487ec59eeaSAnirudh Venkataramanan if (unloading) 16497404e84aSBruce Allan cmd->driver_unloading = ICE_AQC_DRIVER_UNLOADING; 16507ec59eeaSAnirudh Venkataramanan 16517ec59eeaSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 16527ec59eeaSAnirudh Venkataramanan } 1653f31e4b6fSAnirudh Venkataramanan 1654f31e4b6fSAnirudh Venkataramanan /** 1655f31e4b6fSAnirudh Venkataramanan * ice_aq_req_res 1656f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 1657f9867df6SAnirudh Venkataramanan * @res: resource ID 1658f31e4b6fSAnirudh Venkataramanan * @access: access type 1659f31e4b6fSAnirudh Venkataramanan * @sdp_number: resource number 1660f31e4b6fSAnirudh Venkataramanan * @timeout: the maximum time in ms that the driver may hold the resource 1661f31e4b6fSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1662f31e4b6fSAnirudh Venkataramanan * 1663ff2b1321SDan Nowlin * Requests common resource using the admin queue commands (0x0008). 1664ff2b1321SDan Nowlin * When attempting to acquire the Global Config Lock, the driver can 1665ff2b1321SDan Nowlin * learn of three states: 1666d54699e2STony Nguyen * 1) 0 - acquired lock, and can perform download package 1667d54699e2STony Nguyen * 2) -EIO - did not get lock, driver should fail to load 1668d54699e2STony Nguyen * 3) -EALREADY - did not get lock, but another driver has 1669ff2b1321SDan Nowlin * successfully downloaded the package; the driver does 1670ff2b1321SDan Nowlin * not have to download the package and can continue 1671ff2b1321SDan Nowlin * loading 1672ff2b1321SDan Nowlin * 1673ff2b1321SDan Nowlin * Note that if the caller is in an acquire lock, perform action, release lock 1674ff2b1321SDan Nowlin * phase of operation, it is possible that the FW may detect a timeout and issue 1675ff2b1321SDan Nowlin * a CORER. In this case, the driver will receive a CORER interrupt and will 1676ff2b1321SDan Nowlin * have to determine its cause. The calling thread that is handling this flow 1677ff2b1321SDan Nowlin * will likely get an error propagated back to it indicating the Download 1678ff2b1321SDan Nowlin * Package, Update Package or the Release Resource AQ commands timed out. 1679f31e4b6fSAnirudh Venkataramanan */ 16805e24d598STony Nguyen static int 1681f31e4b6fSAnirudh Venkataramanan ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res, 1682f31e4b6fSAnirudh Venkataramanan enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout, 1683f31e4b6fSAnirudh Venkataramanan struct ice_sq_cd *cd) 1684f31e4b6fSAnirudh Venkataramanan { 1685f31e4b6fSAnirudh Venkataramanan struct ice_aqc_req_res *cmd_resp; 1686f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 16875e24d598STony Nguyen int status; 1688f31e4b6fSAnirudh Venkataramanan 1689f31e4b6fSAnirudh Venkataramanan cmd_resp = &desc.params.res_owner; 1690f31e4b6fSAnirudh Venkataramanan 1691f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_req_res); 1692f31e4b6fSAnirudh Venkataramanan 1693f31e4b6fSAnirudh Venkataramanan cmd_resp->res_id = cpu_to_le16(res); 1694f31e4b6fSAnirudh Venkataramanan cmd_resp->access_type = cpu_to_le16(access); 1695f31e4b6fSAnirudh Venkataramanan cmd_resp->res_number = cpu_to_le32(sdp_number); 1696ff2b1321SDan Nowlin cmd_resp->timeout = cpu_to_le32(*timeout); 1697ff2b1321SDan Nowlin *timeout = 0; 1698f31e4b6fSAnirudh Venkataramanan 1699f31e4b6fSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 1700ff2b1321SDan Nowlin 1701f31e4b6fSAnirudh Venkataramanan /* The completion specifies the maximum time in ms that the driver 1702f31e4b6fSAnirudh Venkataramanan * may hold the resource in the Timeout field. 1703ff2b1321SDan Nowlin */ 1704ff2b1321SDan Nowlin 1705ff2b1321SDan Nowlin /* Global config lock response utilizes an additional status field. 1706ff2b1321SDan Nowlin * 1707ff2b1321SDan Nowlin * If the Global config lock resource is held by some other driver, the 1708ff2b1321SDan Nowlin * command completes with ICE_AQ_RES_GLBL_IN_PROG in the status field 1709ff2b1321SDan Nowlin * and the timeout field indicates the maximum time the current owner 1710ff2b1321SDan Nowlin * of the resource has to free it. 1711ff2b1321SDan Nowlin */ 1712ff2b1321SDan Nowlin if (res == ICE_GLOBAL_CFG_LOCK_RES_ID) { 1713ff2b1321SDan Nowlin if (le16_to_cpu(cmd_resp->status) == ICE_AQ_RES_GLBL_SUCCESS) { 1714ff2b1321SDan Nowlin *timeout = le32_to_cpu(cmd_resp->timeout); 1715ff2b1321SDan Nowlin return 0; 1716ff2b1321SDan Nowlin } else if (le16_to_cpu(cmd_resp->status) == 1717ff2b1321SDan Nowlin ICE_AQ_RES_GLBL_IN_PROG) { 1718ff2b1321SDan Nowlin *timeout = le32_to_cpu(cmd_resp->timeout); 1719d54699e2STony Nguyen return -EIO; 1720ff2b1321SDan Nowlin } else if (le16_to_cpu(cmd_resp->status) == 1721ff2b1321SDan Nowlin ICE_AQ_RES_GLBL_DONE) { 1722d54699e2STony Nguyen return -EALREADY; 1723ff2b1321SDan Nowlin } 1724ff2b1321SDan Nowlin 1725ff2b1321SDan Nowlin /* invalid FW response, force a timeout immediately */ 1726ff2b1321SDan Nowlin *timeout = 0; 1727d54699e2STony Nguyen return -EIO; 1728ff2b1321SDan Nowlin } 1729ff2b1321SDan Nowlin 1730ff2b1321SDan Nowlin /* If the resource is held by some other driver, the command completes 1731ff2b1321SDan Nowlin * with a busy return value and the timeout field indicates the maximum 1732ff2b1321SDan Nowlin * time the current owner of the resource has to free it. 1733f31e4b6fSAnirudh Venkataramanan */ 1734f31e4b6fSAnirudh Venkataramanan if (!status || hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY) 1735f31e4b6fSAnirudh Venkataramanan *timeout = le32_to_cpu(cmd_resp->timeout); 1736f31e4b6fSAnirudh Venkataramanan 1737f31e4b6fSAnirudh Venkataramanan return status; 1738f31e4b6fSAnirudh Venkataramanan } 1739f31e4b6fSAnirudh Venkataramanan 1740f31e4b6fSAnirudh Venkataramanan /** 1741f31e4b6fSAnirudh Venkataramanan * ice_aq_release_res 1742f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 1743f9867df6SAnirudh Venkataramanan * @res: resource ID 1744f31e4b6fSAnirudh Venkataramanan * @sdp_number: resource number 1745f31e4b6fSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1746f31e4b6fSAnirudh Venkataramanan * 1747f31e4b6fSAnirudh Venkataramanan * release common resource using the admin queue commands (0x0009) 1748f31e4b6fSAnirudh Venkataramanan */ 17495e24d598STony Nguyen static int 1750f31e4b6fSAnirudh Venkataramanan ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number, 1751f31e4b6fSAnirudh Venkataramanan struct ice_sq_cd *cd) 1752f31e4b6fSAnirudh Venkataramanan { 1753f31e4b6fSAnirudh Venkataramanan struct ice_aqc_req_res *cmd; 1754f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 1755f31e4b6fSAnirudh Venkataramanan 1756f31e4b6fSAnirudh Venkataramanan cmd = &desc.params.res_owner; 1757f31e4b6fSAnirudh Venkataramanan 1758f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_release_res); 1759f31e4b6fSAnirudh Venkataramanan 1760f31e4b6fSAnirudh Venkataramanan cmd->res_id = cpu_to_le16(res); 1761f31e4b6fSAnirudh Venkataramanan cmd->res_number = cpu_to_le32(sdp_number); 1762f31e4b6fSAnirudh Venkataramanan 1763f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 1764f31e4b6fSAnirudh Venkataramanan } 1765f31e4b6fSAnirudh Venkataramanan 1766f31e4b6fSAnirudh Venkataramanan /** 1767f31e4b6fSAnirudh Venkataramanan * ice_acquire_res 1768f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 1769f9867df6SAnirudh Venkataramanan * @res: resource ID 1770f31e4b6fSAnirudh Venkataramanan * @access: access type (read or write) 1771ff2b1321SDan Nowlin * @timeout: timeout in milliseconds 1772f31e4b6fSAnirudh Venkataramanan * 1773f31e4b6fSAnirudh Venkataramanan * This function will attempt to acquire the ownership of a resource. 1774f31e4b6fSAnirudh Venkataramanan */ 17755e24d598STony Nguyen int 1776f31e4b6fSAnirudh Venkataramanan ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res, 1777ff2b1321SDan Nowlin enum ice_aq_res_access_type access, u32 timeout) 1778f31e4b6fSAnirudh Venkataramanan { 1779f31e4b6fSAnirudh Venkataramanan #define ICE_RES_POLLING_DELAY_MS 10 1780f31e4b6fSAnirudh Venkataramanan u32 delay = ICE_RES_POLLING_DELAY_MS; 1781ff2b1321SDan Nowlin u32 time_left = timeout; 17825e24d598STony Nguyen int status; 1783f31e4b6fSAnirudh Venkataramanan 1784f31e4b6fSAnirudh Venkataramanan status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL); 1785f31e4b6fSAnirudh Venkataramanan 1786d54699e2STony Nguyen /* A return code of -EALREADY means that another driver has 1787ff2b1321SDan Nowlin * previously acquired the resource and performed any necessary updates; 1788ff2b1321SDan Nowlin * in this case the caller does not obtain the resource and has no 1789ff2b1321SDan Nowlin * further work to do. 1790f31e4b6fSAnirudh Venkataramanan */ 1791d54699e2STony Nguyen if (status == -EALREADY) 1792f31e4b6fSAnirudh Venkataramanan goto ice_acquire_res_exit; 1793f31e4b6fSAnirudh Venkataramanan 1794f31e4b6fSAnirudh Venkataramanan if (status) 17959228d8b2SJacob Keller ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access); 1796f31e4b6fSAnirudh Venkataramanan 1797f31e4b6fSAnirudh Venkataramanan /* If necessary, poll until the current lock owner timeouts */ 1798f31e4b6fSAnirudh Venkataramanan timeout = time_left; 1799f31e4b6fSAnirudh Venkataramanan while (status && timeout && time_left) { 1800f31e4b6fSAnirudh Venkataramanan mdelay(delay); 1801f31e4b6fSAnirudh Venkataramanan timeout = (timeout > delay) ? timeout - delay : 0; 1802f31e4b6fSAnirudh Venkataramanan status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL); 1803f31e4b6fSAnirudh Venkataramanan 1804d54699e2STony Nguyen if (status == -EALREADY) 1805f31e4b6fSAnirudh Venkataramanan /* lock free, but no work to do */ 1806f31e4b6fSAnirudh Venkataramanan break; 1807f31e4b6fSAnirudh Venkataramanan 1808f31e4b6fSAnirudh Venkataramanan if (!status) 1809f31e4b6fSAnirudh Venkataramanan /* lock acquired */ 1810f31e4b6fSAnirudh Venkataramanan break; 1811f31e4b6fSAnirudh Venkataramanan } 1812d54699e2STony Nguyen if (status && status != -EALREADY) 1813f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_RES, "resource acquire timed out.\n"); 1814f31e4b6fSAnirudh Venkataramanan 1815f31e4b6fSAnirudh Venkataramanan ice_acquire_res_exit: 1816d54699e2STony Nguyen if (status == -EALREADY) { 1817f31e4b6fSAnirudh Venkataramanan if (access == ICE_RES_WRITE) 18189228d8b2SJacob Keller ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n"); 1819f31e4b6fSAnirudh Venkataramanan else 1820d54699e2STony Nguyen ice_debug(hw, ICE_DBG_RES, "Warning: -EALREADY not expected\n"); 1821f31e4b6fSAnirudh Venkataramanan } 1822f31e4b6fSAnirudh Venkataramanan return status; 1823f31e4b6fSAnirudh Venkataramanan } 1824f31e4b6fSAnirudh Venkataramanan 1825f31e4b6fSAnirudh Venkataramanan /** 1826f31e4b6fSAnirudh Venkataramanan * ice_release_res 1827f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 1828f9867df6SAnirudh Venkataramanan * @res: resource ID 1829f31e4b6fSAnirudh Venkataramanan * 1830f31e4b6fSAnirudh Venkataramanan * This function will release a resource using the proper Admin Command. 1831f31e4b6fSAnirudh Venkataramanan */ 1832f31e4b6fSAnirudh Venkataramanan void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res) 1833f31e4b6fSAnirudh Venkataramanan { 1834f31e4b6fSAnirudh Venkataramanan u32 total_delay = 0; 18355518ac2aSTony Nguyen int status; 1836f31e4b6fSAnirudh Venkataramanan 1837f31e4b6fSAnirudh Venkataramanan status = ice_aq_release_res(hw, res, 0, NULL); 1838f31e4b6fSAnirudh Venkataramanan 1839f31e4b6fSAnirudh Venkataramanan /* there are some rare cases when trying to release the resource 1840f9867df6SAnirudh Venkataramanan * results in an admin queue timeout, so handle them correctly 1841f31e4b6fSAnirudh Venkataramanan */ 18425518ac2aSTony Nguyen while ((status == -EIO) && (total_delay < hw->adminq.sq_cmd_timeout)) { 1843f31e4b6fSAnirudh Venkataramanan mdelay(1); 1844f31e4b6fSAnirudh Venkataramanan status = ice_aq_release_res(hw, res, 0, NULL); 1845f31e4b6fSAnirudh Venkataramanan total_delay++; 1846f31e4b6fSAnirudh Venkataramanan } 1847f31e4b6fSAnirudh Venkataramanan } 1848f31e4b6fSAnirudh Venkataramanan 1849f31e4b6fSAnirudh Venkataramanan /** 185031ad4e4eSTony Nguyen * ice_aq_alloc_free_res - command to allocate/free resources 185131ad4e4eSTony Nguyen * @hw: pointer to the HW struct 185231ad4e4eSTony Nguyen * @num_entries: number of resource entries in buffer 185331ad4e4eSTony Nguyen * @buf: Indirect buffer to hold data parameters and response 185431ad4e4eSTony Nguyen * @buf_size: size of buffer for indirect commands 185531ad4e4eSTony Nguyen * @opc: pass in the command opcode 185631ad4e4eSTony Nguyen * @cd: pointer to command details structure or NULL 185731ad4e4eSTony Nguyen * 185831ad4e4eSTony Nguyen * Helper function to allocate/free resources using the admin queue commands 185931ad4e4eSTony Nguyen */ 18605e24d598STony Nguyen int 186131ad4e4eSTony Nguyen ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries, 186231ad4e4eSTony Nguyen struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size, 186331ad4e4eSTony Nguyen enum ice_adminq_opc opc, struct ice_sq_cd *cd) 186431ad4e4eSTony Nguyen { 186531ad4e4eSTony Nguyen struct ice_aqc_alloc_free_res_cmd *cmd; 186631ad4e4eSTony Nguyen struct ice_aq_desc desc; 186731ad4e4eSTony Nguyen 186831ad4e4eSTony Nguyen cmd = &desc.params.sw_res_ctrl; 186931ad4e4eSTony Nguyen 187031ad4e4eSTony Nguyen if (!buf) 1871d54699e2STony Nguyen return -EINVAL; 187231ad4e4eSTony Nguyen 187311404310SBruce Allan if (buf_size < flex_array_size(buf, elem, num_entries)) 1874d54699e2STony Nguyen return -EINVAL; 187531ad4e4eSTony Nguyen 187631ad4e4eSTony Nguyen ice_fill_dflt_direct_cmd_desc(&desc, opc); 187731ad4e4eSTony Nguyen 187831ad4e4eSTony Nguyen desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 187931ad4e4eSTony Nguyen 188031ad4e4eSTony Nguyen cmd->num_entries = cpu_to_le16(num_entries); 188131ad4e4eSTony Nguyen 188231ad4e4eSTony Nguyen return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 188331ad4e4eSTony Nguyen } 188431ad4e4eSTony Nguyen 188531ad4e4eSTony Nguyen /** 188631ad4e4eSTony Nguyen * ice_alloc_hw_res - allocate resource 188731ad4e4eSTony Nguyen * @hw: pointer to the HW struct 188831ad4e4eSTony Nguyen * @type: type of resource 188931ad4e4eSTony Nguyen * @num: number of resources to allocate 189031ad4e4eSTony Nguyen * @btm: allocate from bottom 189131ad4e4eSTony Nguyen * @res: pointer to array that will receive the resources 189231ad4e4eSTony Nguyen */ 18935e24d598STony Nguyen int 189431ad4e4eSTony Nguyen ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res) 189531ad4e4eSTony Nguyen { 189631ad4e4eSTony Nguyen struct ice_aqc_alloc_free_res_elem *buf; 189731ad4e4eSTony Nguyen u16 buf_len; 18985518ac2aSTony Nguyen int status; 189931ad4e4eSTony Nguyen 190066486d89SBruce Allan buf_len = struct_size(buf, elem, num); 190131ad4e4eSTony Nguyen buf = kzalloc(buf_len, GFP_KERNEL); 190231ad4e4eSTony Nguyen if (!buf) 1903d54699e2STony Nguyen return -ENOMEM; 190431ad4e4eSTony Nguyen 190531ad4e4eSTony Nguyen /* Prepare buffer to allocate resource. */ 190631ad4e4eSTony Nguyen buf->num_elems = cpu_to_le16(num); 190731ad4e4eSTony Nguyen buf->res_type = cpu_to_le16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED | 190831ad4e4eSTony Nguyen ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX); 190931ad4e4eSTony Nguyen if (btm) 191031ad4e4eSTony Nguyen buf->res_type |= cpu_to_le16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM); 191131ad4e4eSTony Nguyen 191231ad4e4eSTony Nguyen status = ice_aq_alloc_free_res(hw, 1, buf, buf_len, 191331ad4e4eSTony Nguyen ice_aqc_opc_alloc_res, NULL); 191431ad4e4eSTony Nguyen if (status) 191531ad4e4eSTony Nguyen goto ice_alloc_res_exit; 191631ad4e4eSTony Nguyen 191766486d89SBruce Allan memcpy(res, buf->elem, sizeof(*buf->elem) * num); 191831ad4e4eSTony Nguyen 191931ad4e4eSTony Nguyen ice_alloc_res_exit: 192031ad4e4eSTony Nguyen kfree(buf); 192131ad4e4eSTony Nguyen return status; 192231ad4e4eSTony Nguyen } 192331ad4e4eSTony Nguyen 192431ad4e4eSTony Nguyen /** 1925451f2c44STony Nguyen * ice_free_hw_res - free allocated HW resource 1926451f2c44STony Nguyen * @hw: pointer to the HW struct 1927451f2c44STony Nguyen * @type: type of resource to free 1928451f2c44STony Nguyen * @num: number of resources 1929451f2c44STony Nguyen * @res: pointer to array that contains the resources to free 1930451f2c44STony Nguyen */ 19315e24d598STony Nguyen int ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res) 1932451f2c44STony Nguyen { 1933451f2c44STony Nguyen struct ice_aqc_alloc_free_res_elem *buf; 1934451f2c44STony Nguyen u16 buf_len; 19355518ac2aSTony Nguyen int status; 1936451f2c44STony Nguyen 193766486d89SBruce Allan buf_len = struct_size(buf, elem, num); 1938451f2c44STony Nguyen buf = kzalloc(buf_len, GFP_KERNEL); 1939451f2c44STony Nguyen if (!buf) 1940d54699e2STony Nguyen return -ENOMEM; 1941451f2c44STony Nguyen 1942451f2c44STony Nguyen /* Prepare buffer to free resource. */ 1943451f2c44STony Nguyen buf->num_elems = cpu_to_le16(num); 1944451f2c44STony Nguyen buf->res_type = cpu_to_le16(type); 194566486d89SBruce Allan memcpy(buf->elem, res, sizeof(*buf->elem) * num); 1946451f2c44STony Nguyen 1947451f2c44STony Nguyen status = ice_aq_alloc_free_res(hw, num, buf, buf_len, 1948451f2c44STony Nguyen ice_aqc_opc_free_res, NULL); 1949451f2c44STony Nguyen if (status) 1950451f2c44STony Nguyen ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n"); 1951451f2c44STony Nguyen 1952451f2c44STony Nguyen kfree(buf); 1953451f2c44STony Nguyen return status; 1954451f2c44STony Nguyen } 1955451f2c44STony Nguyen 1956451f2c44STony Nguyen /** 19577a1f7111SBrett Creeley * ice_get_num_per_func - determine number of resources per PF 1958f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW structure 19597a1f7111SBrett Creeley * @max: value to be evenly split between each PF 1960995c90f2SAnirudh Venkataramanan * 1961995c90f2SAnirudh Venkataramanan * Determine the number of valid functions by going through the bitmap returned 19627a1f7111SBrett Creeley * from parsing capabilities and use this to calculate the number of resources 19637a1f7111SBrett Creeley * per PF based on the max value passed in. 1964995c90f2SAnirudh Venkataramanan */ 19657a1f7111SBrett Creeley static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max) 1966995c90f2SAnirudh Venkataramanan { 1967995c90f2SAnirudh Venkataramanan u8 funcs; 1968995c90f2SAnirudh Venkataramanan 1969995c90f2SAnirudh Venkataramanan #define ICE_CAPS_VALID_FUNCS_M 0xFF 1970995c90f2SAnirudh Venkataramanan funcs = hweight8(hw->dev_caps.common_cap.valid_functions & 1971995c90f2SAnirudh Venkataramanan ICE_CAPS_VALID_FUNCS_M); 1972995c90f2SAnirudh Venkataramanan 1973995c90f2SAnirudh Venkataramanan if (!funcs) 1974995c90f2SAnirudh Venkataramanan return 0; 1975995c90f2SAnirudh Venkataramanan 19767a1f7111SBrett Creeley return max / funcs; 1977995c90f2SAnirudh Venkataramanan } 1978995c90f2SAnirudh Venkataramanan 1979995c90f2SAnirudh Venkataramanan /** 1980595b13e2SJacob Keller * ice_parse_common_caps - parse common device/function capabilities 1981f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 1982595b13e2SJacob Keller * @caps: pointer to common capabilities structure 1983595b13e2SJacob Keller * @elem: the capability element to parse 1984595b13e2SJacob Keller * @prefix: message prefix for tracing capabilities 19859c20346bSAnirudh Venkataramanan * 1986595b13e2SJacob Keller * Given a capability element, extract relevant details into the common 1987595b13e2SJacob Keller * capability structure. 1988595b13e2SJacob Keller * 1989595b13e2SJacob Keller * Returns: true if the capability matches one of the common capability ids, 1990595b13e2SJacob Keller * false otherwise. 19919c20346bSAnirudh Venkataramanan */ 1992595b13e2SJacob Keller static bool 1993595b13e2SJacob Keller ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, 1994595b13e2SJacob Keller struct ice_aqc_list_caps_elem *elem, const char *prefix) 19959c20346bSAnirudh Venkataramanan { 1996595b13e2SJacob Keller u32 logical_id = le32_to_cpu(elem->logical_id); 1997595b13e2SJacob Keller u32 phys_id = le32_to_cpu(elem->phys_id); 1998595b13e2SJacob Keller u32 number = le32_to_cpu(elem->number); 1999595b13e2SJacob Keller u16 cap = le16_to_cpu(elem->cap); 2000595b13e2SJacob Keller bool found = true; 20019c20346bSAnirudh Venkataramanan 20029c20346bSAnirudh Venkataramanan switch (cap) { 2003995c90f2SAnirudh Venkataramanan case ICE_AQC_CAPS_VALID_FUNCTIONS: 2004995c90f2SAnirudh Venkataramanan caps->valid_functions = number; 20059228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix, 2006995c90f2SAnirudh Venkataramanan caps->valid_functions); 2007995c90f2SAnirudh Venkataramanan break; 200875d2b253SAnirudh Venkataramanan case ICE_AQC_CAPS_SRIOV: 200975d2b253SAnirudh Venkataramanan caps->sr_iov_1_1 = (number == 1); 20109228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: sr_iov_1_1 = %d\n", prefix, 2011a84db525SAnirudh Venkataramanan caps->sr_iov_1_1); 201275d2b253SAnirudh Venkataramanan break; 2013a257f188SUsha Ketineni case ICE_AQC_CAPS_DCB: 2014a257f188SUsha Ketineni caps->dcb = (number == 1); 2015a257f188SUsha Ketineni caps->active_tc_bitmap = logical_id; 2016a257f188SUsha Ketineni caps->maxtc = phys_id; 20179228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); 20189228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix, 2019a257f188SUsha Ketineni caps->active_tc_bitmap); 20209228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc); 2021a257f188SUsha Ketineni break; 20229c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_RSS: 20239c20346bSAnirudh Venkataramanan caps->rss_table_size = number; 20249c20346bSAnirudh Venkataramanan caps->rss_table_entry_width = logical_id; 20259228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix, 20269c20346bSAnirudh Venkataramanan caps->rss_table_size); 20279228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix, 20289c20346bSAnirudh Venkataramanan caps->rss_table_entry_width); 20299c20346bSAnirudh Venkataramanan break; 20309c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_RXQS: 20319c20346bSAnirudh Venkataramanan caps->num_rxq = number; 20329c20346bSAnirudh Venkataramanan caps->rxq_first_id = phys_id; 20339228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix, 2034a84db525SAnirudh Venkataramanan caps->num_rxq); 20359228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix, 20369c20346bSAnirudh Venkataramanan caps->rxq_first_id); 20379c20346bSAnirudh Venkataramanan break; 20389c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_TXQS: 20399c20346bSAnirudh Venkataramanan caps->num_txq = number; 20409c20346bSAnirudh Venkataramanan caps->txq_first_id = phys_id; 20419228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix, 2042a84db525SAnirudh Venkataramanan caps->num_txq); 20439228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix, 20449c20346bSAnirudh Venkataramanan caps->txq_first_id); 20459c20346bSAnirudh Venkataramanan break; 20469c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_MSIX: 20479c20346bSAnirudh Venkataramanan caps->num_msix_vectors = number; 20489c20346bSAnirudh Venkataramanan caps->msix_vector_first_id = phys_id; 20499228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix, 20509c20346bSAnirudh Venkataramanan caps->num_msix_vectors); 20519228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix, 20529c20346bSAnirudh Venkataramanan caps->msix_vector_first_id); 20539c20346bSAnirudh Venkataramanan break; 20542ab560a7SJacob Keller case ICE_AQC_CAPS_PENDING_NVM_VER: 20552ab560a7SJacob Keller caps->nvm_update_pending_nvm = true; 20562ab560a7SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_nvm\n", prefix); 20572ab560a7SJacob Keller break; 20582ab560a7SJacob Keller case ICE_AQC_CAPS_PENDING_OROM_VER: 20592ab560a7SJacob Keller caps->nvm_update_pending_orom = true; 20602ab560a7SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_orom\n", prefix); 20612ab560a7SJacob Keller break; 20622ab560a7SJacob Keller case ICE_AQC_CAPS_PENDING_NET_VER: 20632ab560a7SJacob Keller caps->nvm_update_pending_netlist = true; 20642ab560a7SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_netlist\n", prefix); 20652ab560a7SJacob Keller break; 2066de9b277eSJacek Naczyk case ICE_AQC_CAPS_NVM_MGMT: 2067de9b277eSJacek Naczyk caps->nvm_unified_update = 2068de9b277eSJacek Naczyk (number & ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ? 2069de9b277eSJacek Naczyk true : false; 2070de9b277eSJacek Naczyk ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix, 2071de9b277eSJacek Naczyk caps->nvm_unified_update); 2072de9b277eSJacek Naczyk break; 2073d25a0fc4SDave Ertman case ICE_AQC_CAPS_RDMA: 2074d25a0fc4SDave Ertman caps->rdma = (number == 1); 2075d25a0fc4SDave Ertman ice_debug(hw, ICE_DBG_INIT, "%s: rdma = %d\n", prefix, caps->rdma); 2076d25a0fc4SDave Ertman break; 2077595b13e2SJacob Keller case ICE_AQC_CAPS_MAX_MTU: 2078595b13e2SJacob Keller caps->max_mtu = number; 2079595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n", 2080595b13e2SJacob Keller prefix, caps->max_mtu); 2081595b13e2SJacob Keller break; 2082399e27dbSJacob Keller case ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE: 2083399e27dbSJacob Keller caps->pcie_reset_avoidance = (number > 0); 2084399e27dbSJacob Keller ice_debug(hw, ICE_DBG_INIT, 2085399e27dbSJacob Keller "%s: pcie_reset_avoidance = %d\n", prefix, 2086399e27dbSJacob Keller caps->pcie_reset_avoidance); 2087399e27dbSJacob Keller break; 2088399e27dbSJacob Keller case ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT: 2089399e27dbSJacob Keller caps->reset_restrict_support = (number == 1); 2090399e27dbSJacob Keller ice_debug(hw, ICE_DBG_INIT, 2091399e27dbSJacob Keller "%s: reset_restrict_support = %d\n", prefix, 2092399e27dbSJacob Keller caps->reset_restrict_support); 2093399e27dbSJacob Keller break; 2094595b13e2SJacob Keller default: 2095595b13e2SJacob Keller /* Not one of the recognized common capabilities */ 2096595b13e2SJacob Keller found = false; 2097148beb61SHenry Tieman } 2098595b13e2SJacob Keller 2099595b13e2SJacob Keller return found; 2100595b13e2SJacob Keller } 2101595b13e2SJacob Keller 2102595b13e2SJacob Keller /** 2103595b13e2SJacob Keller * ice_recalc_port_limited_caps - Recalculate port limited capabilities 2104595b13e2SJacob Keller * @hw: pointer to the HW structure 2105595b13e2SJacob Keller * @caps: pointer to capabilities structure to fix 2106595b13e2SJacob Keller * 2107595b13e2SJacob Keller * Re-calculate the capabilities that are dependent on the number of physical 2108595b13e2SJacob Keller * ports; i.e. some features are not supported or function differently on 2109595b13e2SJacob Keller * devices with more than 4 ports. 2110595b13e2SJacob Keller */ 2111595b13e2SJacob Keller static void 2112595b13e2SJacob Keller ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps) 2113595b13e2SJacob Keller { 2114595b13e2SJacob Keller /* This assumes device capabilities are always scanned before function 2115595b13e2SJacob Keller * capabilities during the initialization flow. 2116595b13e2SJacob Keller */ 2117595b13e2SJacob Keller if (hw->dev_caps.num_funcs > 4) { 2118595b13e2SJacob Keller /* Max 4 TCs per port */ 2119595b13e2SJacob Keller caps->maxtc = 4; 21209228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n", 2121595b13e2SJacob Keller caps->maxtc); 2122d25a0fc4SDave Ertman if (caps->rdma) { 2123d25a0fc4SDave Ertman ice_debug(hw, ICE_DBG_INIT, "forcing RDMA off\n"); 2124d25a0fc4SDave Ertman caps->rdma = 0; 2125d25a0fc4SDave Ertman } 2126d25a0fc4SDave Ertman 2127d25a0fc4SDave Ertman /* print message only when processing device capabilities 2128d25a0fc4SDave Ertman * during initialization. 2129d25a0fc4SDave Ertman */ 2130d25a0fc4SDave Ertman if (caps == &hw->dev_caps.common_cap) 2131d25a0fc4SDave Ertman dev_info(ice_hw_to_dev(hw), "RDMA functionality is not available with the current device configuration.\n"); 2132595b13e2SJacob Keller } 2133595b13e2SJacob Keller } 2134595b13e2SJacob Keller 2135595b13e2SJacob Keller /** 2136595b13e2SJacob Keller * ice_parse_vf_func_caps - Parse ICE_AQC_CAPS_VF function caps 2137595b13e2SJacob Keller * @hw: pointer to the HW struct 2138595b13e2SJacob Keller * @func_p: pointer to function capabilities structure 2139595b13e2SJacob Keller * @cap: pointer to the capability element to parse 2140595b13e2SJacob Keller * 2141595b13e2SJacob Keller * Extract function capabilities for ICE_AQC_CAPS_VF. 2142595b13e2SJacob Keller */ 2143595b13e2SJacob Keller static void 2144595b13e2SJacob Keller ice_parse_vf_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, 2145595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2146595b13e2SJacob Keller { 2147595b13e2SJacob Keller u32 logical_id = le32_to_cpu(cap->logical_id); 2148595b13e2SJacob Keller u32 number = le32_to_cpu(cap->number); 2149595b13e2SJacob Keller 2150595b13e2SJacob Keller func_p->num_allocd_vfs = number; 2151595b13e2SJacob Keller func_p->vf_base_id = logical_id; 2152595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: num_allocd_vfs = %d\n", 2153595b13e2SJacob Keller func_p->num_allocd_vfs); 2154595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: vf_base_id = %d\n", 2155595b13e2SJacob Keller func_p->vf_base_id); 2156595b13e2SJacob Keller } 2157595b13e2SJacob Keller 2158595b13e2SJacob Keller /** 2159595b13e2SJacob Keller * ice_parse_vsi_func_caps - Parse ICE_AQC_CAPS_VSI function caps 2160595b13e2SJacob Keller * @hw: pointer to the HW struct 2161595b13e2SJacob Keller * @func_p: pointer to function capabilities structure 2162595b13e2SJacob Keller * @cap: pointer to the capability element to parse 2163595b13e2SJacob Keller * 2164595b13e2SJacob Keller * Extract function capabilities for ICE_AQC_CAPS_VSI. 2165595b13e2SJacob Keller */ 2166595b13e2SJacob Keller static void 2167595b13e2SJacob Keller ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, 2168595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2169595b13e2SJacob Keller { 2170595b13e2SJacob Keller func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI); 2171595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n", 2172595b13e2SJacob Keller le32_to_cpu(cap->number)); 2173595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %d\n", 2174595b13e2SJacob Keller func_p->guar_num_vsi); 2175595b13e2SJacob Keller } 2176595b13e2SJacob Keller 2177595b13e2SJacob Keller /** 21789733cc94SJacob Keller * ice_parse_1588_func_caps - Parse ICE_AQC_CAPS_1588 function caps 21799733cc94SJacob Keller * @hw: pointer to the HW struct 21809733cc94SJacob Keller * @func_p: pointer to function capabilities structure 21819733cc94SJacob Keller * @cap: pointer to the capability element to parse 21829733cc94SJacob Keller * 21839733cc94SJacob Keller * Extract function capabilities for ICE_AQC_CAPS_1588. 21849733cc94SJacob Keller */ 21859733cc94SJacob Keller static void 21869733cc94SJacob Keller ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, 21879733cc94SJacob Keller struct ice_aqc_list_caps_elem *cap) 21889733cc94SJacob Keller { 21899733cc94SJacob Keller struct ice_ts_func_info *info = &func_p->ts_func_info; 21909733cc94SJacob Keller u32 number = le32_to_cpu(cap->number); 21919733cc94SJacob Keller 21929733cc94SJacob Keller info->ena = ((number & ICE_TS_FUNC_ENA_M) != 0); 21939733cc94SJacob Keller func_p->common_cap.ieee_1588 = info->ena; 21949733cc94SJacob Keller 21959733cc94SJacob Keller info->src_tmr_owned = ((number & ICE_TS_SRC_TMR_OWND_M) != 0); 21969733cc94SJacob Keller info->tmr_ena = ((number & ICE_TS_TMR_ENA_M) != 0); 21979733cc94SJacob Keller info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0); 21989733cc94SJacob Keller info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0); 21999733cc94SJacob Keller 22009733cc94SJacob Keller info->clk_freq = (number & ICE_TS_CLK_FREQ_M) >> ICE_TS_CLK_FREQ_S; 22019733cc94SJacob Keller info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0); 22029733cc94SJacob Keller 2203405efa49SJacob Keller if (info->clk_freq < NUM_ICE_TIME_REF_FREQ) { 2204405efa49SJacob Keller info->time_ref = (enum ice_time_ref_freq)info->clk_freq; 2205405efa49SJacob Keller } else { 2206405efa49SJacob Keller /* Unknown clock frequency, so assume a (probably incorrect) 2207405efa49SJacob Keller * default to avoid out-of-bounds look ups of frequency 2208405efa49SJacob Keller * related information. 2209405efa49SJacob Keller */ 2210405efa49SJacob Keller ice_debug(hw, ICE_DBG_INIT, "1588 func caps: unknown clock frequency %u\n", 2211405efa49SJacob Keller info->clk_freq); 2212405efa49SJacob Keller info->time_ref = ICE_TIME_REF_FREQ_25_000; 2213405efa49SJacob Keller } 2214405efa49SJacob Keller 22159733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: ieee_1588 = %u\n", 22169733cc94SJacob Keller func_p->common_cap.ieee_1588); 22179733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: src_tmr_owned = %u\n", 22189733cc94SJacob Keller info->src_tmr_owned); 22199733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_ena = %u\n", 22209733cc94SJacob Keller info->tmr_ena); 22219733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_owned = %u\n", 22229733cc94SJacob Keller info->tmr_index_owned); 22239733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_assoc = %u\n", 22249733cc94SJacob Keller info->tmr_index_assoc); 22259733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: clk_freq = %u\n", 22269733cc94SJacob Keller info->clk_freq); 22279733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: clk_src = %u\n", 22289733cc94SJacob Keller info->clk_src); 22299733cc94SJacob Keller } 22309733cc94SJacob Keller 22319733cc94SJacob Keller /** 2232595b13e2SJacob Keller * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps 2233595b13e2SJacob Keller * @hw: pointer to the HW struct 2234595b13e2SJacob Keller * @func_p: pointer to function capabilities structure 2235595b13e2SJacob Keller * 2236595b13e2SJacob Keller * Extract function capabilities for ICE_AQC_CAPS_FD. 2237595b13e2SJacob Keller */ 2238595b13e2SJacob Keller static void 2239595b13e2SJacob Keller ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p) 2240595b13e2SJacob Keller { 2241148beb61SHenry Tieman u32 reg_val, val; 2242148beb61SHenry Tieman 2243148beb61SHenry Tieman reg_val = rd32(hw, GLQF_FD_SIZE); 2244148beb61SHenry Tieman val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >> 2245148beb61SHenry Tieman GLQF_FD_SIZE_FD_GSIZE_S; 2246148beb61SHenry Tieman func_p->fd_fltr_guar = 2247148beb61SHenry Tieman ice_get_num_per_func(hw, val); 2248148beb61SHenry Tieman val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >> 2249148beb61SHenry Tieman GLQF_FD_SIZE_FD_BSIZE_S; 2250148beb61SHenry Tieman func_p->fd_fltr_best_effort = val; 2251595b13e2SJacob Keller 22529228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n", 2253595b13e2SJacob Keller func_p->fd_fltr_guar); 22549228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n", 2255595b13e2SJacob Keller func_p->fd_fltr_best_effort); 2256148beb61SHenry Tieman } 2257595b13e2SJacob Keller 2258595b13e2SJacob Keller /** 2259595b13e2SJacob Keller * ice_parse_func_caps - Parse function capabilities 2260595b13e2SJacob Keller * @hw: pointer to the HW struct 2261595b13e2SJacob Keller * @func_p: pointer to function capabilities structure 2262595b13e2SJacob Keller * @buf: buffer containing the function capability records 2263595b13e2SJacob Keller * @cap_count: the number of capabilities 2264595b13e2SJacob Keller * 2265595b13e2SJacob Keller * Helper function to parse function (0x000A) capabilities list. For 2266595b13e2SJacob Keller * capabilities shared between device and function, this relies on 2267595b13e2SJacob Keller * ice_parse_common_caps. 2268595b13e2SJacob Keller * 2269595b13e2SJacob Keller * Loop through the list of provided capabilities and extract the relevant 2270595b13e2SJacob Keller * data into the function capabilities structured. 2271595b13e2SJacob Keller */ 2272595b13e2SJacob Keller static void 2273595b13e2SJacob Keller ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, 2274595b13e2SJacob Keller void *buf, u32 cap_count) 2275595b13e2SJacob Keller { 2276595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap_resp; 2277595b13e2SJacob Keller u32 i; 2278595b13e2SJacob Keller 22797a63dae0SBruce Allan cap_resp = buf; 2280595b13e2SJacob Keller 2281595b13e2SJacob Keller memset(func_p, 0, sizeof(*func_p)); 2282595b13e2SJacob Keller 2283595b13e2SJacob Keller for (i = 0; i < cap_count; i++) { 2284595b13e2SJacob Keller u16 cap = le16_to_cpu(cap_resp[i].cap); 2285595b13e2SJacob Keller bool found; 2286595b13e2SJacob Keller 2287595b13e2SJacob Keller found = ice_parse_common_caps(hw, &func_p->common_cap, 2288595b13e2SJacob Keller &cap_resp[i], "func caps"); 2289595b13e2SJacob Keller 2290595b13e2SJacob Keller switch (cap) { 2291595b13e2SJacob Keller case ICE_AQC_CAPS_VF: 2292595b13e2SJacob Keller ice_parse_vf_func_caps(hw, func_p, &cap_resp[i]); 2293148beb61SHenry Tieman break; 2294595b13e2SJacob Keller case ICE_AQC_CAPS_VSI: 2295595b13e2SJacob Keller ice_parse_vsi_func_caps(hw, func_p, &cap_resp[i]); 2296595b13e2SJacob Keller break; 22979733cc94SJacob Keller case ICE_AQC_CAPS_1588: 22989733cc94SJacob Keller ice_parse_1588_func_caps(hw, func_p, &cap_resp[i]); 22999733cc94SJacob Keller break; 2300595b13e2SJacob Keller case ICE_AQC_CAPS_FD: 2301595b13e2SJacob Keller ice_parse_fdir_func_caps(hw, func_p); 23029c20346bSAnirudh Venkataramanan break; 23039c20346bSAnirudh Venkataramanan default: 2304595b13e2SJacob Keller /* Don't list common capabilities as unknown */ 2305595b13e2SJacob Keller if (!found) 23069228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n", 2307a84db525SAnirudh Venkataramanan i, cap); 23089c20346bSAnirudh Venkataramanan break; 23099c20346bSAnirudh Venkataramanan } 23109c20346bSAnirudh Venkataramanan } 23119164f761SBruce Allan 2312595b13e2SJacob Keller ice_recalc_port_limited_caps(hw, &func_p->common_cap); 23139164f761SBruce Allan } 2314595b13e2SJacob Keller 2315595b13e2SJacob Keller /** 2316595b13e2SJacob Keller * ice_parse_valid_functions_cap - Parse ICE_AQC_CAPS_VALID_FUNCTIONS caps 2317595b13e2SJacob Keller * @hw: pointer to the HW struct 2318595b13e2SJacob Keller * @dev_p: pointer to device capabilities structure 2319595b13e2SJacob Keller * @cap: capability element to parse 2320595b13e2SJacob Keller * 2321595b13e2SJacob Keller * Parse ICE_AQC_CAPS_VALID_FUNCTIONS for device capabilities. 2322595b13e2SJacob Keller */ 2323595b13e2SJacob Keller static void 2324595b13e2SJacob Keller ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 2325595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2326595b13e2SJacob Keller { 2327595b13e2SJacob Keller u32 number = le32_to_cpu(cap->number); 2328595b13e2SJacob Keller 2329595b13e2SJacob Keller dev_p->num_funcs = hweight32(number); 2330595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n", 2331595b13e2SJacob Keller dev_p->num_funcs); 2332595b13e2SJacob Keller } 2333595b13e2SJacob Keller 2334595b13e2SJacob Keller /** 2335595b13e2SJacob Keller * ice_parse_vf_dev_caps - Parse ICE_AQC_CAPS_VF device caps 2336595b13e2SJacob Keller * @hw: pointer to the HW struct 2337595b13e2SJacob Keller * @dev_p: pointer to device capabilities structure 2338595b13e2SJacob Keller * @cap: capability element to parse 2339595b13e2SJacob Keller * 2340595b13e2SJacob Keller * Parse ICE_AQC_CAPS_VF for device capabilities. 2341595b13e2SJacob Keller */ 2342595b13e2SJacob Keller static void 2343595b13e2SJacob Keller ice_parse_vf_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 2344595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2345595b13e2SJacob Keller { 2346595b13e2SJacob Keller u32 number = le32_to_cpu(cap->number); 2347595b13e2SJacob Keller 2348595b13e2SJacob Keller dev_p->num_vfs_exposed = number; 2349595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev_caps: num_vfs_exposed = %d\n", 2350595b13e2SJacob Keller dev_p->num_vfs_exposed); 2351595b13e2SJacob Keller } 2352595b13e2SJacob Keller 2353595b13e2SJacob Keller /** 2354595b13e2SJacob Keller * ice_parse_vsi_dev_caps - Parse ICE_AQC_CAPS_VSI device caps 2355595b13e2SJacob Keller * @hw: pointer to the HW struct 2356595b13e2SJacob Keller * @dev_p: pointer to device capabilities structure 2357595b13e2SJacob Keller * @cap: capability element to parse 2358595b13e2SJacob Keller * 2359595b13e2SJacob Keller * Parse ICE_AQC_CAPS_VSI for device capabilities. 2360595b13e2SJacob Keller */ 2361595b13e2SJacob Keller static void 2362595b13e2SJacob Keller ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 2363595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2364595b13e2SJacob Keller { 2365595b13e2SJacob Keller u32 number = le32_to_cpu(cap->number); 2366595b13e2SJacob Keller 2367595b13e2SJacob Keller dev_p->num_vsi_allocd_to_host = number; 2368595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %d\n", 2369595b13e2SJacob Keller dev_p->num_vsi_allocd_to_host); 2370595b13e2SJacob Keller } 2371595b13e2SJacob Keller 2372595b13e2SJacob Keller /** 23739733cc94SJacob Keller * ice_parse_1588_dev_caps - Parse ICE_AQC_CAPS_1588 device caps 23749733cc94SJacob Keller * @hw: pointer to the HW struct 23759733cc94SJacob Keller * @dev_p: pointer to device capabilities structure 23769733cc94SJacob Keller * @cap: capability element to parse 23779733cc94SJacob Keller * 23789733cc94SJacob Keller * Parse ICE_AQC_CAPS_1588 for device capabilities. 23799733cc94SJacob Keller */ 23809733cc94SJacob Keller static void 23819733cc94SJacob Keller ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 23829733cc94SJacob Keller struct ice_aqc_list_caps_elem *cap) 23839733cc94SJacob Keller { 23849733cc94SJacob Keller struct ice_ts_dev_info *info = &dev_p->ts_dev_info; 23859733cc94SJacob Keller u32 logical_id = le32_to_cpu(cap->logical_id); 23869733cc94SJacob Keller u32 phys_id = le32_to_cpu(cap->phys_id); 23879733cc94SJacob Keller u32 number = le32_to_cpu(cap->number); 23889733cc94SJacob Keller 23899733cc94SJacob Keller info->ena = ((number & ICE_TS_DEV_ENA_M) != 0); 23909733cc94SJacob Keller dev_p->common_cap.ieee_1588 = info->ena; 23919733cc94SJacob Keller 23929733cc94SJacob Keller info->tmr0_owner = number & ICE_TS_TMR0_OWNR_M; 23939733cc94SJacob Keller info->tmr0_owned = ((number & ICE_TS_TMR0_OWND_M) != 0); 23949733cc94SJacob Keller info->tmr0_ena = ((number & ICE_TS_TMR0_ENA_M) != 0); 23959733cc94SJacob Keller 23969733cc94SJacob Keller info->tmr1_owner = (number & ICE_TS_TMR1_OWNR_M) >> ICE_TS_TMR1_OWNR_S; 23979733cc94SJacob Keller info->tmr1_owned = ((number & ICE_TS_TMR1_OWND_M) != 0); 23989733cc94SJacob Keller info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0); 23999733cc94SJacob Keller 24009733cc94SJacob Keller info->ena_ports = logical_id; 24019733cc94SJacob Keller info->tmr_own_map = phys_id; 24029733cc94SJacob Keller 24039733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 = %u\n", 24049733cc94SJacob Keller dev_p->common_cap.ieee_1588); 24059733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owner = %u\n", 24069733cc94SJacob Keller info->tmr0_owner); 24079733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owned = %u\n", 24089733cc94SJacob Keller info->tmr0_owned); 24099733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_ena = %u\n", 24109733cc94SJacob Keller info->tmr0_ena); 24119733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owner = %u\n", 24129733cc94SJacob Keller info->tmr1_owner); 24139733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owned = %u\n", 24149733cc94SJacob Keller info->tmr1_owned); 24159733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_ena = %u\n", 24169733cc94SJacob Keller info->tmr1_ena); 24179733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n", 24189733cc94SJacob Keller info->ena_ports); 24199733cc94SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n", 24209733cc94SJacob Keller info->tmr_own_map); 24219733cc94SJacob Keller } 24229733cc94SJacob Keller 24239733cc94SJacob Keller /** 2424595b13e2SJacob Keller * ice_parse_fdir_dev_caps - Parse ICE_AQC_CAPS_FD device caps 2425595b13e2SJacob Keller * @hw: pointer to the HW struct 2426595b13e2SJacob Keller * @dev_p: pointer to device capabilities structure 2427595b13e2SJacob Keller * @cap: capability element to parse 2428595b13e2SJacob Keller * 2429595b13e2SJacob Keller * Parse ICE_AQC_CAPS_FD for device capabilities. 2430595b13e2SJacob Keller */ 2431595b13e2SJacob Keller static void 2432595b13e2SJacob Keller ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 2433595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap) 2434595b13e2SJacob Keller { 2435595b13e2SJacob Keller u32 number = le32_to_cpu(cap->number); 2436595b13e2SJacob Keller 2437595b13e2SJacob Keller dev_p->num_flow_director_fltr = number; 2438595b13e2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %d\n", 2439595b13e2SJacob Keller dev_p->num_flow_director_fltr); 2440595b13e2SJacob Keller } 2441595b13e2SJacob Keller 2442595b13e2SJacob Keller /** 2443595b13e2SJacob Keller * ice_parse_dev_caps - Parse device capabilities 2444595b13e2SJacob Keller * @hw: pointer to the HW struct 2445595b13e2SJacob Keller * @dev_p: pointer to device capabilities structure 2446595b13e2SJacob Keller * @buf: buffer containing the device capability records 2447595b13e2SJacob Keller * @cap_count: the number of capabilities 2448595b13e2SJacob Keller * 2449595b13e2SJacob Keller * Helper device to parse device (0x000B) capabilities list. For 24507dbc63f0STony Nguyen * capabilities shared between device and function, this relies on 2451595b13e2SJacob Keller * ice_parse_common_caps. 2452595b13e2SJacob Keller * 2453595b13e2SJacob Keller * Loop through the list of provided capabilities and extract the relevant 2454595b13e2SJacob Keller * data into the device capabilities structured. 2455595b13e2SJacob Keller */ 2456595b13e2SJacob Keller static void 2457595b13e2SJacob Keller ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 2458595b13e2SJacob Keller void *buf, u32 cap_count) 2459595b13e2SJacob Keller { 2460595b13e2SJacob Keller struct ice_aqc_list_caps_elem *cap_resp; 2461595b13e2SJacob Keller u32 i; 2462595b13e2SJacob Keller 24637a63dae0SBruce Allan cap_resp = buf; 2464595b13e2SJacob Keller 2465595b13e2SJacob Keller memset(dev_p, 0, sizeof(*dev_p)); 2466595b13e2SJacob Keller 2467595b13e2SJacob Keller for (i = 0; i < cap_count; i++) { 2468595b13e2SJacob Keller u16 cap = le16_to_cpu(cap_resp[i].cap); 2469595b13e2SJacob Keller bool found; 2470595b13e2SJacob Keller 2471595b13e2SJacob Keller found = ice_parse_common_caps(hw, &dev_p->common_cap, 2472595b13e2SJacob Keller &cap_resp[i], "dev caps"); 2473595b13e2SJacob Keller 2474595b13e2SJacob Keller switch (cap) { 2475595b13e2SJacob Keller case ICE_AQC_CAPS_VALID_FUNCTIONS: 2476595b13e2SJacob Keller ice_parse_valid_functions_cap(hw, dev_p, &cap_resp[i]); 2477595b13e2SJacob Keller break; 2478595b13e2SJacob Keller case ICE_AQC_CAPS_VF: 2479595b13e2SJacob Keller ice_parse_vf_dev_caps(hw, dev_p, &cap_resp[i]); 2480595b13e2SJacob Keller break; 2481595b13e2SJacob Keller case ICE_AQC_CAPS_VSI: 2482595b13e2SJacob Keller ice_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]); 2483595b13e2SJacob Keller break; 24849733cc94SJacob Keller case ICE_AQC_CAPS_1588: 24859733cc94SJacob Keller ice_parse_1588_dev_caps(hw, dev_p, &cap_resp[i]); 24869733cc94SJacob Keller break; 2487595b13e2SJacob Keller case ICE_AQC_CAPS_FD: 2488595b13e2SJacob Keller ice_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]); 2489595b13e2SJacob Keller break; 2490595b13e2SJacob Keller default: 2491595b13e2SJacob Keller /* Don't list common capabilities as unknown */ 2492595b13e2SJacob Keller if (!found) 24939228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n", 2494595b13e2SJacob Keller i, cap); 2495595b13e2SJacob Keller break; 2496595b13e2SJacob Keller } 2497595b13e2SJacob Keller } 2498595b13e2SJacob Keller 2499595b13e2SJacob Keller ice_recalc_port_limited_caps(hw, &dev_p->common_cap); 2500595b13e2SJacob Keller } 2501595b13e2SJacob Keller 2502595b13e2SJacob Keller /** 25038d7aab35SJacob Keller * ice_aq_list_caps - query function/device capabilities 2504f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 25058d7aab35SJacob Keller * @buf: a buffer to hold the capabilities 25068d7aab35SJacob Keller * @buf_size: size of the buffer 25078d7aab35SJacob Keller * @cap_count: if not NULL, set to the number of capabilities reported 25088d7aab35SJacob Keller * @opc: capabilities type to discover, device or function 25099c20346bSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 25109c20346bSAnirudh Venkataramanan * 25118d7aab35SJacob Keller * Get the function (0x000A) or device (0x000B) capabilities description from 25128d7aab35SJacob Keller * firmware and store it in the buffer. 25138d7aab35SJacob Keller * 25148d7aab35SJacob Keller * If the cap_count pointer is not NULL, then it is set to the number of 25158d7aab35SJacob Keller * capabilities firmware will report. Note that if the buffer size is too 25168d7aab35SJacob Keller * small, it is possible the command will return ICE_AQ_ERR_ENOMEM. The 25178d7aab35SJacob Keller * cap_count will still be updated in this case. It is recommended that the 25188d7aab35SJacob Keller * buffer size be set to ICE_AQ_MAX_BUF_LEN (the largest possible buffer that 25198d7aab35SJacob Keller * firmware could return) to avoid this. 25209c20346bSAnirudh Venkataramanan */ 25215e24d598STony Nguyen int 25228d7aab35SJacob Keller ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, 25239c20346bSAnirudh Venkataramanan enum ice_adminq_opc opc, struct ice_sq_cd *cd) 25249c20346bSAnirudh Venkataramanan { 25259c20346bSAnirudh Venkataramanan struct ice_aqc_list_caps *cmd; 25269c20346bSAnirudh Venkataramanan struct ice_aq_desc desc; 25275e24d598STony Nguyen int status; 25289c20346bSAnirudh Venkataramanan 25299c20346bSAnirudh Venkataramanan cmd = &desc.params.get_cap; 25309c20346bSAnirudh Venkataramanan 25319c20346bSAnirudh Venkataramanan if (opc != ice_aqc_opc_list_func_caps && 25329c20346bSAnirudh Venkataramanan opc != ice_aqc_opc_list_dev_caps) 2533d54699e2STony Nguyen return -EINVAL; 25349c20346bSAnirudh Venkataramanan 25359c20346bSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, opc); 25369c20346bSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 25378d7aab35SJacob Keller 25388d7aab35SJacob Keller if (cap_count) 253999189e8bSAnirudh Venkataramanan *cap_count = le32_to_cpu(cmd->count); 25408d7aab35SJacob Keller 25418d7aab35SJacob Keller return status; 25428d7aab35SJacob Keller } 25438d7aab35SJacob Keller 25448d7aab35SJacob Keller /** 254581aed647SJacob Keller * ice_discover_dev_caps - Read and extract device capabilities 25467d86cf38SAnirudh Venkataramanan * @hw: pointer to the hardware structure 254781aed647SJacob Keller * @dev_caps: pointer to device capabilities structure 254881aed647SJacob Keller * 254981aed647SJacob Keller * Read the device capabilities and extract them into the dev_caps structure 255081aed647SJacob Keller * for later use. 25517d86cf38SAnirudh Venkataramanan */ 25525e24d598STony Nguyen int 255381aed647SJacob Keller ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps) 25547d86cf38SAnirudh Venkataramanan { 255581aed647SJacob Keller u32 cap_count = 0; 25567d86cf38SAnirudh Venkataramanan void *cbuf; 25575518ac2aSTony Nguyen int status; 25587d86cf38SAnirudh Venkataramanan 25591082b360SJacob Keller cbuf = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); 25607d86cf38SAnirudh Venkataramanan if (!cbuf) 2561d54699e2STony Nguyen return -ENOMEM; 25627d86cf38SAnirudh Venkataramanan 25631082b360SJacob Keller /* Although the driver doesn't know the number of capabilities the 25641082b360SJacob Keller * device will return, we can simply send a 4KB buffer, the maximum 25651082b360SJacob Keller * possible size that firmware can return. 25661082b360SJacob Keller */ 25671082b360SJacob Keller cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem); 25681082b360SJacob Keller 256981aed647SJacob Keller status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count, 257081aed647SJacob Keller ice_aqc_opc_list_dev_caps, NULL); 257181aed647SJacob Keller if (!status) 257281aed647SJacob Keller ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count); 257381aed647SJacob Keller kfree(cbuf); 257481aed647SJacob Keller 257581aed647SJacob Keller return status; 257681aed647SJacob Keller } 257781aed647SJacob Keller 257881aed647SJacob Keller /** 257981aed647SJacob Keller * ice_discover_func_caps - Read and extract function capabilities 258081aed647SJacob Keller * @hw: pointer to the hardware structure 258181aed647SJacob Keller * @func_caps: pointer to function capabilities structure 258281aed647SJacob Keller * 258381aed647SJacob Keller * Read the function capabilities and extract them into the func_caps structure 258481aed647SJacob Keller * for later use. 258581aed647SJacob Keller */ 25865e24d598STony Nguyen static int 258781aed647SJacob Keller ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps) 258881aed647SJacob Keller { 258981aed647SJacob Keller u32 cap_count = 0; 259081aed647SJacob Keller void *cbuf; 25915518ac2aSTony Nguyen int status; 259281aed647SJacob Keller 259381aed647SJacob Keller cbuf = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); 259481aed647SJacob Keller if (!cbuf) 2595d54699e2STony Nguyen return -ENOMEM; 259681aed647SJacob Keller 259781aed647SJacob Keller /* Although the driver doesn't know the number of capabilities the 259881aed647SJacob Keller * device will return, we can simply send a 4KB buffer, the maximum 259981aed647SJacob Keller * possible size that firmware can return. 260081aed647SJacob Keller */ 260181aed647SJacob Keller cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem); 260281aed647SJacob Keller 260381aed647SJacob Keller status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count, 260481aed647SJacob Keller ice_aqc_opc_list_func_caps, NULL); 260581aed647SJacob Keller if (!status) 260681aed647SJacob Keller ice_parse_func_caps(hw, func_caps, cbuf, cap_count); 26071082b360SJacob Keller kfree(cbuf); 26089c20346bSAnirudh Venkataramanan 26099c20346bSAnirudh Venkataramanan return status; 26109c20346bSAnirudh Venkataramanan } 26119c20346bSAnirudh Venkataramanan 26129c20346bSAnirudh Venkataramanan /** 2613462acf6aSTony Nguyen * ice_set_safe_mode_caps - Override dev/func capabilities when in safe mode 2614462acf6aSTony Nguyen * @hw: pointer to the hardware structure 2615462acf6aSTony Nguyen */ 2616462acf6aSTony Nguyen void ice_set_safe_mode_caps(struct ice_hw *hw) 2617462acf6aSTony Nguyen { 2618462acf6aSTony Nguyen struct ice_hw_func_caps *func_caps = &hw->func_caps; 2619462acf6aSTony Nguyen struct ice_hw_dev_caps *dev_caps = &hw->dev_caps; 2620be49b1adSJacob Keller struct ice_hw_common_caps cached_caps; 2621eae1bbb2SBruce Allan u32 num_funcs; 2622462acf6aSTony Nguyen 2623462acf6aSTony Nguyen /* cache some func_caps values that should be restored after memset */ 2624be49b1adSJacob Keller cached_caps = func_caps->common_cap; 2625462acf6aSTony Nguyen 2626462acf6aSTony Nguyen /* unset func capabilities */ 2627462acf6aSTony Nguyen memset(func_caps, 0, sizeof(*func_caps)); 2628462acf6aSTony Nguyen 2629be49b1adSJacob Keller #define ICE_RESTORE_FUNC_CAP(name) \ 2630be49b1adSJacob Keller func_caps->common_cap.name = cached_caps.name 2631be49b1adSJacob Keller 2632462acf6aSTony Nguyen /* restore cached values */ 2633be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(valid_functions); 2634be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(txq_first_id); 2635be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(rxq_first_id); 2636be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(msix_vector_first_id); 2637be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(max_mtu); 2638be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(nvm_unified_update); 2639be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(nvm_update_pending_nvm); 2640be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(nvm_update_pending_orom); 2641be49b1adSJacob Keller ICE_RESTORE_FUNC_CAP(nvm_update_pending_netlist); 2642462acf6aSTony Nguyen 2643462acf6aSTony Nguyen /* one Tx and one Rx queue in safe mode */ 2644462acf6aSTony Nguyen func_caps->common_cap.num_rxq = 1; 2645462acf6aSTony Nguyen func_caps->common_cap.num_txq = 1; 2646462acf6aSTony Nguyen 2647462acf6aSTony Nguyen /* two MSIX vectors, one for traffic and one for misc causes */ 2648462acf6aSTony Nguyen func_caps->common_cap.num_msix_vectors = 2; 2649462acf6aSTony Nguyen func_caps->guar_num_vsi = 1; 2650462acf6aSTony Nguyen 2651462acf6aSTony Nguyen /* cache some dev_caps values that should be restored after memset */ 2652be49b1adSJacob Keller cached_caps = dev_caps->common_cap; 2653eae1bbb2SBruce Allan num_funcs = dev_caps->num_funcs; 2654462acf6aSTony Nguyen 2655462acf6aSTony Nguyen /* unset dev capabilities */ 2656462acf6aSTony Nguyen memset(dev_caps, 0, sizeof(*dev_caps)); 2657462acf6aSTony Nguyen 2658be49b1adSJacob Keller #define ICE_RESTORE_DEV_CAP(name) \ 2659be49b1adSJacob Keller dev_caps->common_cap.name = cached_caps.name 2660be49b1adSJacob Keller 2661462acf6aSTony Nguyen /* restore cached values */ 2662be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(valid_functions); 2663be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(txq_first_id); 2664be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(rxq_first_id); 2665be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(msix_vector_first_id); 2666be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(max_mtu); 2667be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(nvm_unified_update); 2668be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(nvm_update_pending_nvm); 2669be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(nvm_update_pending_orom); 2670be49b1adSJacob Keller ICE_RESTORE_DEV_CAP(nvm_update_pending_netlist); 2671eae1bbb2SBruce Allan dev_caps->num_funcs = num_funcs; 2672462acf6aSTony Nguyen 2673462acf6aSTony Nguyen /* one Tx and one Rx queue per function in safe mode */ 2674eae1bbb2SBruce Allan dev_caps->common_cap.num_rxq = num_funcs; 2675eae1bbb2SBruce Allan dev_caps->common_cap.num_txq = num_funcs; 2676462acf6aSTony Nguyen 2677462acf6aSTony Nguyen /* two MSIX vectors per function */ 2678eae1bbb2SBruce Allan dev_caps->common_cap.num_msix_vectors = 2 * num_funcs; 2679462acf6aSTony Nguyen } 2680462acf6aSTony Nguyen 2681462acf6aSTony Nguyen /** 26829c20346bSAnirudh Venkataramanan * ice_get_caps - get info about the HW 26839c20346bSAnirudh Venkataramanan * @hw: pointer to the hardware structure 26849c20346bSAnirudh Venkataramanan */ 26855e24d598STony Nguyen int ice_get_caps(struct ice_hw *hw) 26869c20346bSAnirudh Venkataramanan { 26875e24d598STony Nguyen int status; 26889c20346bSAnirudh Venkataramanan 268981aed647SJacob Keller status = ice_discover_dev_caps(hw, &hw->dev_caps); 269081aed647SJacob Keller if (status) 26919c20346bSAnirudh Venkataramanan return status; 269281aed647SJacob Keller 269381aed647SJacob Keller return ice_discover_func_caps(hw, &hw->func_caps); 26949c20346bSAnirudh Venkataramanan } 26959c20346bSAnirudh Venkataramanan 26969c20346bSAnirudh Venkataramanan /** 2697e94d4478SAnirudh Venkataramanan * ice_aq_manage_mac_write - manage MAC address write command 2698f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 2699e94d4478SAnirudh Venkataramanan * @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address 2700e94d4478SAnirudh Venkataramanan * @flags: flags to control write behavior 2701e94d4478SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2702e94d4478SAnirudh Venkataramanan * 2703e94d4478SAnirudh Venkataramanan * This function is used to write MAC address to the NVM (0x0108). 2704e94d4478SAnirudh Venkataramanan */ 27055e24d598STony Nguyen int 2706d671e3e0SJacob Keller ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, 2707e94d4478SAnirudh Venkataramanan struct ice_sq_cd *cd) 2708e94d4478SAnirudh Venkataramanan { 2709e94d4478SAnirudh Venkataramanan struct ice_aqc_manage_mac_write *cmd; 2710e94d4478SAnirudh Venkataramanan struct ice_aq_desc desc; 2711e94d4478SAnirudh Venkataramanan 2712e94d4478SAnirudh Venkataramanan cmd = &desc.params.mac_write; 2713e94d4478SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_write); 2714e94d4478SAnirudh Venkataramanan 2715e94d4478SAnirudh Venkataramanan cmd->flags = flags; 27165df42c82SJesse Brandeburg ether_addr_copy(cmd->mac_addr, mac_addr); 2717e94d4478SAnirudh Venkataramanan 2718e94d4478SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 2719e94d4478SAnirudh Venkataramanan } 2720e94d4478SAnirudh Venkataramanan 2721e94d4478SAnirudh Venkataramanan /** 2722f31e4b6fSAnirudh Venkataramanan * ice_aq_clear_pxe_mode 2723f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 2724f31e4b6fSAnirudh Venkataramanan * 2725f31e4b6fSAnirudh Venkataramanan * Tell the firmware that the driver is taking over from PXE (0x0110). 2726f31e4b6fSAnirudh Venkataramanan */ 27275e24d598STony Nguyen static int ice_aq_clear_pxe_mode(struct ice_hw *hw) 2728f31e4b6fSAnirudh Venkataramanan { 2729f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 2730f31e4b6fSAnirudh Venkataramanan 2731f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pxe_mode); 2732f31e4b6fSAnirudh Venkataramanan desc.params.clear_pxe.rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT; 2733f31e4b6fSAnirudh Venkataramanan 2734f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 2735f31e4b6fSAnirudh Venkataramanan } 2736f31e4b6fSAnirudh Venkataramanan 2737f31e4b6fSAnirudh Venkataramanan /** 2738f31e4b6fSAnirudh Venkataramanan * ice_clear_pxe_mode - clear pxe operations mode 2739f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 2740f31e4b6fSAnirudh Venkataramanan * 2741f31e4b6fSAnirudh Venkataramanan * Make sure all PXE mode settings are cleared, including things 2742f31e4b6fSAnirudh Venkataramanan * like descriptor fetch/write-back mode. 2743f31e4b6fSAnirudh Venkataramanan */ 2744f31e4b6fSAnirudh Venkataramanan void ice_clear_pxe_mode(struct ice_hw *hw) 2745f31e4b6fSAnirudh Venkataramanan { 2746f31e4b6fSAnirudh Venkataramanan if (ice_check_sq_alive(hw, &hw->adminq)) 2747f31e4b6fSAnirudh Venkataramanan ice_aq_clear_pxe_mode(hw); 2748f31e4b6fSAnirudh Venkataramanan } 2749cdedef59SAnirudh Venkataramanan 2750cdedef59SAnirudh Venkataramanan /** 2751*a1ffafb0SBrett Creeley * ice_aq_set_port_params - set physical port parameters. 2752*a1ffafb0SBrett Creeley * @pi: pointer to the port info struct 2753*a1ffafb0SBrett Creeley * @double_vlan: if set double VLAN is enabled 2754*a1ffafb0SBrett Creeley * @cd: pointer to command details structure or NULL 2755*a1ffafb0SBrett Creeley * 2756*a1ffafb0SBrett Creeley * Set Physical port parameters (0x0203) 2757*a1ffafb0SBrett Creeley */ 2758*a1ffafb0SBrett Creeley int 2759*a1ffafb0SBrett Creeley ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan, 2760*a1ffafb0SBrett Creeley struct ice_sq_cd *cd) 2761*a1ffafb0SBrett Creeley 2762*a1ffafb0SBrett Creeley { 2763*a1ffafb0SBrett Creeley struct ice_aqc_set_port_params *cmd; 2764*a1ffafb0SBrett Creeley struct ice_hw *hw = pi->hw; 2765*a1ffafb0SBrett Creeley struct ice_aq_desc desc; 2766*a1ffafb0SBrett Creeley u16 cmd_flags = 0; 2767*a1ffafb0SBrett Creeley 2768*a1ffafb0SBrett Creeley cmd = &desc.params.set_port_params; 2769*a1ffafb0SBrett Creeley 2770*a1ffafb0SBrett Creeley ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_params); 2771*a1ffafb0SBrett Creeley if (double_vlan) 2772*a1ffafb0SBrett Creeley cmd_flags |= ICE_AQC_SET_P_PARAMS_DOUBLE_VLAN_ENA; 2773*a1ffafb0SBrett Creeley cmd->cmd_flags = cpu_to_le16(cmd_flags); 2774*a1ffafb0SBrett Creeley 2775*a1ffafb0SBrett Creeley return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 2776*a1ffafb0SBrett Creeley } 2777*a1ffafb0SBrett Creeley 2778*a1ffafb0SBrett Creeley /** 277948cb27f2SChinh Cao * ice_get_link_speed_based_on_phy_type - returns link speed 278048cb27f2SChinh Cao * @phy_type_low: lower part of phy_type 2781aef74145SAnirudh Venkataramanan * @phy_type_high: higher part of phy_type 278248cb27f2SChinh Cao * 2783f9867df6SAnirudh Venkataramanan * This helper function will convert an entry in PHY type structure 2784aef74145SAnirudh Venkataramanan * [phy_type_low, phy_type_high] to its corresponding link speed. 2785aef74145SAnirudh Venkataramanan * Note: In the structure of [phy_type_low, phy_type_high], there should 2786f9867df6SAnirudh Venkataramanan * be one bit set, as this function will convert one PHY type to its 278748cb27f2SChinh Cao * speed. 278848cb27f2SChinh Cao * If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned 278948cb27f2SChinh Cao * If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned 279048cb27f2SChinh Cao */ 2791aef74145SAnirudh Venkataramanan static u16 2792aef74145SAnirudh Venkataramanan ice_get_link_speed_based_on_phy_type(u64 phy_type_low, u64 phy_type_high) 279348cb27f2SChinh Cao { 2794aef74145SAnirudh Venkataramanan u16 speed_phy_type_high = ICE_AQ_LINK_SPEED_UNKNOWN; 279548cb27f2SChinh Cao u16 speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN; 279648cb27f2SChinh Cao 279748cb27f2SChinh Cao switch (phy_type_low) { 279848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_100BASE_TX: 279948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_100M_SGMII: 280048cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_100MB; 280148cb27f2SChinh Cao break; 280248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_T: 280348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_SX: 280448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_LX: 280548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_KX: 280648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1G_SGMII: 280748cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_1000MB; 280848cb27f2SChinh Cao break; 280948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_T: 281048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_X: 281148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_KX: 281248cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_2500MB; 281348cb27f2SChinh Cao break; 281448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_5GBASE_T: 281548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_5GBASE_KR: 281648cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_5GB; 281748cb27f2SChinh Cao break; 281848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_T: 281948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_DA: 282048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_SR: 282148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_LR: 282248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1: 282348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC: 282448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_C2C: 282548cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_10GB; 282648cb27f2SChinh Cao break; 282748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_T: 282848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR: 282948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR_S: 283048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR1: 283148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_SR: 283248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_LR: 283348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR: 283448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR_S: 283548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR1: 283648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC: 283748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25G_AUI_C2C: 283848cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_25GB; 283948cb27f2SChinh Cao break; 284048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_CR4: 284148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_SR4: 284248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_LR4: 284348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_KR4: 284448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC: 284548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40G_XLAUI: 284648cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_40GB; 284748cb27f2SChinh Cao break; 2848aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_CR2: 2849aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_SR2: 2850aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_LR2: 2851aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_KR2: 2852aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC: 2853aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_LAUI2: 2854aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC: 2855aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_AUI2: 2856aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_CP: 2857aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_SR: 2858aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_FR: 2859aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_LR: 2860aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4: 2861aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC: 2862aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_50G_AUI1: 2863aef74145SAnirudh Venkataramanan speed_phy_type_low = ICE_AQ_LINK_SPEED_50GB; 2864aef74145SAnirudh Venkataramanan break; 2865aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CR4: 2866aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_SR4: 2867aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_LR4: 2868aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_KR4: 2869aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC: 2870aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100G_CAUI4: 2871aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC: 2872aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100G_AUI4: 2873aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4: 2874aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4: 2875aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_CP2: 2876aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_SR2: 2877aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100GBASE_DR: 2878aef74145SAnirudh Venkataramanan speed_phy_type_low = ICE_AQ_LINK_SPEED_100GB; 2879aef74145SAnirudh Venkataramanan break; 288048cb27f2SChinh Cao default: 288148cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN; 288248cb27f2SChinh Cao break; 288348cb27f2SChinh Cao } 288448cb27f2SChinh Cao 2885aef74145SAnirudh Venkataramanan switch (phy_type_high) { 2886aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4: 2887aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC: 2888aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100G_CAUI2: 2889aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC: 2890aef74145SAnirudh Venkataramanan case ICE_PHY_TYPE_HIGH_100G_AUI2: 2891aef74145SAnirudh Venkataramanan speed_phy_type_high = ICE_AQ_LINK_SPEED_100GB; 2892aef74145SAnirudh Venkataramanan break; 2893aef74145SAnirudh Venkataramanan default: 2894aef74145SAnirudh Venkataramanan speed_phy_type_high = ICE_AQ_LINK_SPEED_UNKNOWN; 2895aef74145SAnirudh Venkataramanan break; 2896aef74145SAnirudh Venkataramanan } 2897aef74145SAnirudh Venkataramanan 2898aef74145SAnirudh Venkataramanan if (speed_phy_type_low == ICE_AQ_LINK_SPEED_UNKNOWN && 2899aef74145SAnirudh Venkataramanan speed_phy_type_high == ICE_AQ_LINK_SPEED_UNKNOWN) 2900aef74145SAnirudh Venkataramanan return ICE_AQ_LINK_SPEED_UNKNOWN; 2901aef74145SAnirudh Venkataramanan else if (speed_phy_type_low != ICE_AQ_LINK_SPEED_UNKNOWN && 2902aef74145SAnirudh Venkataramanan speed_phy_type_high != ICE_AQ_LINK_SPEED_UNKNOWN) 2903aef74145SAnirudh Venkataramanan return ICE_AQ_LINK_SPEED_UNKNOWN; 2904aef74145SAnirudh Venkataramanan else if (speed_phy_type_low != ICE_AQ_LINK_SPEED_UNKNOWN && 2905aef74145SAnirudh Venkataramanan speed_phy_type_high == ICE_AQ_LINK_SPEED_UNKNOWN) 290648cb27f2SChinh Cao return speed_phy_type_low; 2907aef74145SAnirudh Venkataramanan else 2908aef74145SAnirudh Venkataramanan return speed_phy_type_high; 290948cb27f2SChinh Cao } 291048cb27f2SChinh Cao 291148cb27f2SChinh Cao /** 291248cb27f2SChinh Cao * ice_update_phy_type 291348cb27f2SChinh Cao * @phy_type_low: pointer to the lower part of phy_type 2914aef74145SAnirudh Venkataramanan * @phy_type_high: pointer to the higher part of phy_type 291548cb27f2SChinh Cao * @link_speeds_bitmap: targeted link speeds bitmap 291648cb27f2SChinh Cao * 291748cb27f2SChinh Cao * Note: For the link_speeds_bitmap structure, you can check it at 291848cb27f2SChinh Cao * [ice_aqc_get_link_status->link_speed]. Caller can pass in 291948cb27f2SChinh Cao * link_speeds_bitmap include multiple speeds. 292048cb27f2SChinh Cao * 2921aef74145SAnirudh Venkataramanan * Each entry in this [phy_type_low, phy_type_high] structure will 2922aef74145SAnirudh Venkataramanan * present a certain link speed. This helper function will turn on bits 2923aef74145SAnirudh Venkataramanan * in [phy_type_low, phy_type_high] structure based on the value of 292448cb27f2SChinh Cao * link_speeds_bitmap input parameter. 292548cb27f2SChinh Cao */ 2926aef74145SAnirudh Venkataramanan void 2927aef74145SAnirudh Venkataramanan ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high, 2928aef74145SAnirudh Venkataramanan u16 link_speeds_bitmap) 292948cb27f2SChinh Cao { 2930aef74145SAnirudh Venkataramanan u64 pt_high; 293148cb27f2SChinh Cao u64 pt_low; 293248cb27f2SChinh Cao int index; 2933207e3721SBruce Allan u16 speed; 293448cb27f2SChinh Cao 293548cb27f2SChinh Cao /* We first check with low part of phy_type */ 293648cb27f2SChinh Cao for (index = 0; index <= ICE_PHY_TYPE_LOW_MAX_INDEX; index++) { 293748cb27f2SChinh Cao pt_low = BIT_ULL(index); 2938aef74145SAnirudh Venkataramanan speed = ice_get_link_speed_based_on_phy_type(pt_low, 0); 293948cb27f2SChinh Cao 294048cb27f2SChinh Cao if (link_speeds_bitmap & speed) 294148cb27f2SChinh Cao *phy_type_low |= BIT_ULL(index); 294248cb27f2SChinh Cao } 2943aef74145SAnirudh Venkataramanan 2944aef74145SAnirudh Venkataramanan /* We then check with high part of phy_type */ 2945aef74145SAnirudh Venkataramanan for (index = 0; index <= ICE_PHY_TYPE_HIGH_MAX_INDEX; index++) { 2946aef74145SAnirudh Venkataramanan pt_high = BIT_ULL(index); 2947aef74145SAnirudh Venkataramanan speed = ice_get_link_speed_based_on_phy_type(0, pt_high); 2948aef74145SAnirudh Venkataramanan 2949aef74145SAnirudh Venkataramanan if (link_speeds_bitmap & speed) 2950aef74145SAnirudh Venkataramanan *phy_type_high |= BIT_ULL(index); 2951aef74145SAnirudh Venkataramanan } 295248cb27f2SChinh Cao } 295348cb27f2SChinh Cao 295448cb27f2SChinh Cao /** 2955fcea6f3dSAnirudh Venkataramanan * ice_aq_set_phy_cfg 2956f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 29571a3571b5SPaul Greenwalt * @pi: port info structure of the interested logical port 2958fcea6f3dSAnirudh Venkataramanan * @cfg: structure with PHY configuration data to be set 2959fcea6f3dSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2960fcea6f3dSAnirudh Venkataramanan * 2961fcea6f3dSAnirudh Venkataramanan * Set the various PHY configuration parameters supported on the Port. 2962fcea6f3dSAnirudh Venkataramanan * One or more of the Set PHY config parameters may be ignored in an MFP 2963fcea6f3dSAnirudh Venkataramanan * mode as the PF may not have the privilege to set some of the PHY Config 2964fcea6f3dSAnirudh Venkataramanan * parameters. This status will be indicated by the command response (0x0601). 2965fcea6f3dSAnirudh Venkataramanan */ 29665e24d598STony Nguyen int 29671a3571b5SPaul Greenwalt ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, 2968fcea6f3dSAnirudh Venkataramanan struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd) 2969fcea6f3dSAnirudh Venkataramanan { 2970fcea6f3dSAnirudh Venkataramanan struct ice_aq_desc desc; 29715e24d598STony Nguyen int status; 2972fcea6f3dSAnirudh Venkataramanan 2973fcea6f3dSAnirudh Venkataramanan if (!cfg) 2974d54699e2STony Nguyen return -EINVAL; 2975fcea6f3dSAnirudh Venkataramanan 2976d8df260aSChinh T Cao /* Ensure that only valid bits of cfg->caps can be turned on. */ 2977d8df260aSChinh T Cao if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) { 29789228d8b2SJacob Keller ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n", 2979d8df260aSChinh T Cao cfg->caps); 2980d8df260aSChinh T Cao 2981d8df260aSChinh T Cao cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK; 2982d8df260aSChinh T Cao } 2983d8df260aSChinh T Cao 2984fcea6f3dSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg); 29851a3571b5SPaul Greenwalt desc.params.set_phy.lport_num = pi->lport; 298648cb27f2SChinh Cao desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 2987fcea6f3dSAnirudh Venkataramanan 298855df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n"); 2989dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n", 2990dc67039bSJesse Brandeburg (unsigned long long)le64_to_cpu(cfg->phy_type_low)); 2991dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", 2992dc67039bSJesse Brandeburg (unsigned long long)le64_to_cpu(cfg->phy_type_high)); 2993dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", cfg->caps); 2994bdeff971SLev Faerman ice_debug(hw, ICE_DBG_LINK, " low_power_ctrl_an = 0x%x\n", 2995bdeff971SLev Faerman cfg->low_power_ctrl_an); 2996dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", cfg->eee_cap); 2997dc67039bSJesse Brandeburg ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", cfg->eeer_value); 299855df52a0SPaul Greenwalt ice_debug(hw, ICE_DBG_LINK, " link_fec_opt = 0x%x\n", 299955df52a0SPaul Greenwalt cfg->link_fec_opt); 3000dc67039bSJesse Brandeburg 3001b5e19a64SChinh T Cao status = ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd); 3002b5e19a64SChinh T Cao if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE) 3003b5e19a64SChinh T Cao status = 0; 3004b5e19a64SChinh T Cao 30051a3571b5SPaul Greenwalt if (!status) 30061a3571b5SPaul Greenwalt pi->phy.curr_user_phy_cfg = *cfg; 30071a3571b5SPaul Greenwalt 3008b5e19a64SChinh T Cao return status; 3009fcea6f3dSAnirudh Venkataramanan } 3010fcea6f3dSAnirudh Venkataramanan 3011fcea6f3dSAnirudh Venkataramanan /** 3012fcea6f3dSAnirudh Venkataramanan * ice_update_link_info - update status of the HW network link 3013fcea6f3dSAnirudh Venkataramanan * @pi: port info structure of the interested logical port 3014fcea6f3dSAnirudh Venkataramanan */ 30155e24d598STony Nguyen int ice_update_link_info(struct ice_port_info *pi) 3016fcea6f3dSAnirudh Venkataramanan { 3017092a33d4SBruce Allan struct ice_link_status *li; 30185e24d598STony Nguyen int status; 3019fcea6f3dSAnirudh Venkataramanan 3020fcea6f3dSAnirudh Venkataramanan if (!pi) 3021d54699e2STony Nguyen return -EINVAL; 3022fcea6f3dSAnirudh Venkataramanan 3023092a33d4SBruce Allan li = &pi->phy.link_info; 3024fcea6f3dSAnirudh Venkataramanan 3025092a33d4SBruce Allan status = ice_aq_get_link_info(pi, true, NULL, NULL); 3026092a33d4SBruce Allan if (status) 3027092a33d4SBruce Allan return status; 3028092a33d4SBruce Allan 3029092a33d4SBruce Allan if (li->link_info & ICE_AQ_MEDIA_AVAILABLE) { 3030092a33d4SBruce Allan struct ice_aqc_get_phy_caps_data *pcaps; 3031092a33d4SBruce Allan struct ice_hw *hw; 3032092a33d4SBruce Allan 3033092a33d4SBruce Allan hw = pi->hw; 3034092a33d4SBruce Allan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), 3035092a33d4SBruce Allan GFP_KERNEL); 3036fcea6f3dSAnirudh Venkataramanan if (!pcaps) 3037d54699e2STony Nguyen return -ENOMEM; 3038fcea6f3dSAnirudh Venkataramanan 3039d6730a87SAnirudh Venkataramanan status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA, 3040fcea6f3dSAnirudh Venkataramanan pcaps, NULL); 3041fcea6f3dSAnirudh Venkataramanan 3042fcea6f3dSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 3043092a33d4SBruce Allan } 3044092a33d4SBruce Allan 3045fcea6f3dSAnirudh Venkataramanan return status; 3046fcea6f3dSAnirudh Venkataramanan } 3047fcea6f3dSAnirudh Venkataramanan 3048fcea6f3dSAnirudh Venkataramanan /** 30491a3571b5SPaul Greenwalt * ice_cache_phy_user_req 30501a3571b5SPaul Greenwalt * @pi: port information structure 30511a3571b5SPaul Greenwalt * @cache_data: PHY logging data 30521a3571b5SPaul Greenwalt * @cache_mode: PHY logging mode 30531a3571b5SPaul Greenwalt * 30541a3571b5SPaul Greenwalt * Log the user request on (FC, FEC, SPEED) for later use. 30551a3571b5SPaul Greenwalt */ 30561a3571b5SPaul Greenwalt static void 30571a3571b5SPaul Greenwalt ice_cache_phy_user_req(struct ice_port_info *pi, 30581a3571b5SPaul Greenwalt struct ice_phy_cache_mode_data cache_data, 30591a3571b5SPaul Greenwalt enum ice_phy_cache_mode cache_mode) 30601a3571b5SPaul Greenwalt { 30611a3571b5SPaul Greenwalt if (!pi) 30621a3571b5SPaul Greenwalt return; 30631a3571b5SPaul Greenwalt 30641a3571b5SPaul Greenwalt switch (cache_mode) { 30651a3571b5SPaul Greenwalt case ICE_FC_MODE: 30661a3571b5SPaul Greenwalt pi->phy.curr_user_fc_req = cache_data.data.curr_user_fc_req; 30671a3571b5SPaul Greenwalt break; 30681a3571b5SPaul Greenwalt case ICE_SPEED_MODE: 30691a3571b5SPaul Greenwalt pi->phy.curr_user_speed_req = 30701a3571b5SPaul Greenwalt cache_data.data.curr_user_speed_req; 30711a3571b5SPaul Greenwalt break; 30721a3571b5SPaul Greenwalt case ICE_FEC_MODE: 30731a3571b5SPaul Greenwalt pi->phy.curr_user_fec_req = cache_data.data.curr_user_fec_req; 30741a3571b5SPaul Greenwalt break; 30751a3571b5SPaul Greenwalt default: 30761a3571b5SPaul Greenwalt break; 30771a3571b5SPaul Greenwalt } 30781a3571b5SPaul Greenwalt } 30791a3571b5SPaul Greenwalt 30801a3571b5SPaul Greenwalt /** 30811a3571b5SPaul Greenwalt * ice_caps_to_fc_mode 30821a3571b5SPaul Greenwalt * @caps: PHY capabilities 30831a3571b5SPaul Greenwalt * 30841a3571b5SPaul Greenwalt * Convert PHY FC capabilities to ice FC mode 30851a3571b5SPaul Greenwalt */ 30861a3571b5SPaul Greenwalt enum ice_fc_mode ice_caps_to_fc_mode(u8 caps) 30871a3571b5SPaul Greenwalt { 30881a3571b5SPaul Greenwalt if (caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE && 30891a3571b5SPaul Greenwalt caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE) 30901a3571b5SPaul Greenwalt return ICE_FC_FULL; 30911a3571b5SPaul Greenwalt 30921a3571b5SPaul Greenwalt if (caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE) 30931a3571b5SPaul Greenwalt return ICE_FC_TX_PAUSE; 30941a3571b5SPaul Greenwalt 30951a3571b5SPaul Greenwalt if (caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE) 30961a3571b5SPaul Greenwalt return ICE_FC_RX_PAUSE; 30971a3571b5SPaul Greenwalt 30981a3571b5SPaul Greenwalt return ICE_FC_NONE; 30991a3571b5SPaul Greenwalt } 31001a3571b5SPaul Greenwalt 31011a3571b5SPaul Greenwalt /** 31021a3571b5SPaul Greenwalt * ice_caps_to_fec_mode 31031a3571b5SPaul Greenwalt * @caps: PHY capabilities 31041a3571b5SPaul Greenwalt * @fec_options: Link FEC options 31051a3571b5SPaul Greenwalt * 31061a3571b5SPaul Greenwalt * Convert PHY FEC capabilities to ice FEC mode 31071a3571b5SPaul Greenwalt */ 31081a3571b5SPaul Greenwalt enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options) 31091a3571b5SPaul Greenwalt { 31101a3571b5SPaul Greenwalt if (caps & ICE_AQC_PHY_EN_AUTO_FEC) 31111a3571b5SPaul Greenwalt return ICE_FEC_AUTO; 31121a3571b5SPaul Greenwalt 31131a3571b5SPaul Greenwalt if (fec_options & (ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN | 31141a3571b5SPaul Greenwalt ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ | 31151a3571b5SPaul Greenwalt ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN | 31161a3571b5SPaul Greenwalt ICE_AQC_PHY_FEC_25G_KR_REQ)) 31171a3571b5SPaul Greenwalt return ICE_FEC_BASER; 31181a3571b5SPaul Greenwalt 31191a3571b5SPaul Greenwalt if (fec_options & (ICE_AQC_PHY_FEC_25G_RS_528_REQ | 31201a3571b5SPaul Greenwalt ICE_AQC_PHY_FEC_25G_RS_544_REQ | 31211a3571b5SPaul Greenwalt ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN)) 31221a3571b5SPaul Greenwalt return ICE_FEC_RS; 31231a3571b5SPaul Greenwalt 31241a3571b5SPaul Greenwalt return ICE_FEC_NONE; 31251a3571b5SPaul Greenwalt } 31261a3571b5SPaul Greenwalt 31271a3571b5SPaul Greenwalt /** 31282ffb6085SPaul Greenwalt * ice_cfg_phy_fc - Configure PHY FC data based on FC mode 31291a3571b5SPaul Greenwalt * @pi: port information structure 31302ffb6085SPaul Greenwalt * @cfg: PHY configuration data to set FC mode 31312ffb6085SPaul Greenwalt * @req_mode: FC mode to configure 3132fcea6f3dSAnirudh Venkataramanan */ 31335e24d598STony Nguyen int 31341a3571b5SPaul Greenwalt ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 31351a3571b5SPaul Greenwalt enum ice_fc_mode req_mode) 3136fcea6f3dSAnirudh Venkataramanan { 31371a3571b5SPaul Greenwalt struct ice_phy_cache_mode_data cache_data; 3138fcea6f3dSAnirudh Venkataramanan u8 pause_mask = 0x0; 3139fcea6f3dSAnirudh Venkataramanan 31401a3571b5SPaul Greenwalt if (!pi || !cfg) 3141d54699e2STony Nguyen return -EINVAL; 3142fcea6f3dSAnirudh Venkataramanan 31432ffb6085SPaul Greenwalt switch (req_mode) { 3144fcea6f3dSAnirudh Venkataramanan case ICE_FC_FULL: 3145fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE; 3146fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE; 3147fcea6f3dSAnirudh Venkataramanan break; 3148fcea6f3dSAnirudh Venkataramanan case ICE_FC_RX_PAUSE: 3149fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE; 3150fcea6f3dSAnirudh Venkataramanan break; 3151fcea6f3dSAnirudh Venkataramanan case ICE_FC_TX_PAUSE: 3152fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE; 3153fcea6f3dSAnirudh Venkataramanan break; 3154fcea6f3dSAnirudh Venkataramanan default: 3155fcea6f3dSAnirudh Venkataramanan break; 3156fcea6f3dSAnirudh Venkataramanan } 3157fcea6f3dSAnirudh Venkataramanan 31582ffb6085SPaul Greenwalt /* clear the old pause settings */ 31592ffb6085SPaul Greenwalt cfg->caps &= ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE | 31602ffb6085SPaul Greenwalt ICE_AQC_PHY_EN_RX_LINK_PAUSE); 31612ffb6085SPaul Greenwalt 31622ffb6085SPaul Greenwalt /* set the new capabilities */ 31632ffb6085SPaul Greenwalt cfg->caps |= pause_mask; 31642ffb6085SPaul Greenwalt 31651a3571b5SPaul Greenwalt /* Cache user FC request */ 31661a3571b5SPaul Greenwalt cache_data.data.curr_user_fc_req = req_mode; 31671a3571b5SPaul Greenwalt ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE); 31681a3571b5SPaul Greenwalt 31692ffb6085SPaul Greenwalt return 0; 31702ffb6085SPaul Greenwalt } 31712ffb6085SPaul Greenwalt 31722ffb6085SPaul Greenwalt /** 31732ffb6085SPaul Greenwalt * ice_set_fc 31742ffb6085SPaul Greenwalt * @pi: port information structure 31752ffb6085SPaul Greenwalt * @aq_failures: pointer to status code, specific to ice_set_fc routine 31762ffb6085SPaul Greenwalt * @ena_auto_link_update: enable automatic link update 31772ffb6085SPaul Greenwalt * 31782ffb6085SPaul Greenwalt * Set the requested flow control mode. 31792ffb6085SPaul Greenwalt */ 31805e24d598STony Nguyen int 31812ffb6085SPaul Greenwalt ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update) 31822ffb6085SPaul Greenwalt { 31832ffb6085SPaul Greenwalt struct ice_aqc_set_phy_cfg_data cfg = { 0 }; 31842ffb6085SPaul Greenwalt struct ice_aqc_get_phy_caps_data *pcaps; 31852ffb6085SPaul Greenwalt struct ice_hw *hw; 31865518ac2aSTony Nguyen int status; 31872ffb6085SPaul Greenwalt 31881a3571b5SPaul Greenwalt if (!pi || !aq_failures) 3189d54699e2STony Nguyen return -EINVAL; 31902ffb6085SPaul Greenwalt 31912ffb6085SPaul Greenwalt *aq_failures = 0; 31922ffb6085SPaul Greenwalt hw = pi->hw; 31932ffb6085SPaul Greenwalt 3194fcea6f3dSAnirudh Venkataramanan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL); 3195fcea6f3dSAnirudh Venkataramanan if (!pcaps) 3196d54699e2STony Nguyen return -ENOMEM; 3197fcea6f3dSAnirudh Venkataramanan 3198f9867df6SAnirudh Venkataramanan /* Get the current PHY config */ 3199d6730a87SAnirudh Venkataramanan status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG, 3200d6730a87SAnirudh Venkataramanan pcaps, NULL); 3201fcea6f3dSAnirudh Venkataramanan if (status) { 3202fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_GET; 3203fcea6f3dSAnirudh Venkataramanan goto out; 3204fcea6f3dSAnirudh Venkataramanan } 3205fcea6f3dSAnirudh Venkataramanan 3206ea78ce4dSPaul Greenwalt ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg); 3207d8df260aSChinh T Cao 32082ffb6085SPaul Greenwalt /* Configure the set PHY data */ 32091a3571b5SPaul Greenwalt status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode); 32102ffb6085SPaul Greenwalt if (status) 32112ffb6085SPaul Greenwalt goto out; 3212d8df260aSChinh T Cao 3213fcea6f3dSAnirudh Venkataramanan /* If the capabilities have changed, then set the new config */ 3214fcea6f3dSAnirudh Venkataramanan if (cfg.caps != pcaps->caps) { 3215fcea6f3dSAnirudh Venkataramanan int retry_count, retry_max = 10; 3216fcea6f3dSAnirudh Venkataramanan 3217fcea6f3dSAnirudh Venkataramanan /* Auto restart link so settings take effect */ 321848cb27f2SChinh Cao if (ena_auto_link_update) 321948cb27f2SChinh Cao cfg.caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; 3220fcea6f3dSAnirudh Venkataramanan 32211a3571b5SPaul Greenwalt status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL); 3222fcea6f3dSAnirudh Venkataramanan if (status) { 3223fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_SET; 3224fcea6f3dSAnirudh Venkataramanan goto out; 3225fcea6f3dSAnirudh Venkataramanan } 3226fcea6f3dSAnirudh Venkataramanan 3227fcea6f3dSAnirudh Venkataramanan /* Update the link info 3228fcea6f3dSAnirudh Venkataramanan * It sometimes takes a really long time for link to 3229fcea6f3dSAnirudh Venkataramanan * come back from the atomic reset. Thus, we wait a 3230fcea6f3dSAnirudh Venkataramanan * little bit. 3231fcea6f3dSAnirudh Venkataramanan */ 3232fcea6f3dSAnirudh Venkataramanan for (retry_count = 0; retry_count < retry_max; retry_count++) { 3233fcea6f3dSAnirudh Venkataramanan status = ice_update_link_info(pi); 3234fcea6f3dSAnirudh Venkataramanan 3235fcea6f3dSAnirudh Venkataramanan if (!status) 3236fcea6f3dSAnirudh Venkataramanan break; 3237fcea6f3dSAnirudh Venkataramanan 3238fcea6f3dSAnirudh Venkataramanan mdelay(100); 3239fcea6f3dSAnirudh Venkataramanan } 3240fcea6f3dSAnirudh Venkataramanan 3241fcea6f3dSAnirudh Venkataramanan if (status) 3242fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_UPDATE; 3243fcea6f3dSAnirudh Venkataramanan } 3244fcea6f3dSAnirudh Venkataramanan 3245fcea6f3dSAnirudh Venkataramanan out: 3246fcea6f3dSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 3247fcea6f3dSAnirudh Venkataramanan return status; 3248fcea6f3dSAnirudh Venkataramanan } 3249fcea6f3dSAnirudh Venkataramanan 3250fcea6f3dSAnirudh Venkataramanan /** 32511a3571b5SPaul Greenwalt * ice_phy_caps_equals_cfg 32521a3571b5SPaul Greenwalt * @phy_caps: PHY capabilities 32531a3571b5SPaul Greenwalt * @phy_cfg: PHY configuration 32541a3571b5SPaul Greenwalt * 32551a3571b5SPaul Greenwalt * Helper function to determine if PHY capabilities matches PHY 32561a3571b5SPaul Greenwalt * configuration 32571a3571b5SPaul Greenwalt */ 32581a3571b5SPaul Greenwalt bool 32591a3571b5SPaul Greenwalt ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *phy_caps, 32601a3571b5SPaul Greenwalt struct ice_aqc_set_phy_cfg_data *phy_cfg) 32611a3571b5SPaul Greenwalt { 32621a3571b5SPaul Greenwalt u8 caps_mask, cfg_mask; 32631a3571b5SPaul Greenwalt 32641a3571b5SPaul Greenwalt if (!phy_caps || !phy_cfg) 32651a3571b5SPaul Greenwalt return false; 32661a3571b5SPaul Greenwalt 32671a3571b5SPaul Greenwalt /* These bits are not common between capabilities and configuration. 32681a3571b5SPaul Greenwalt * Do not use them to determine equality. 32691a3571b5SPaul Greenwalt */ 32701a3571b5SPaul Greenwalt caps_mask = ICE_AQC_PHY_CAPS_MASK & ~(ICE_AQC_PHY_AN_MODE | 32711a3571b5SPaul Greenwalt ICE_AQC_GET_PHY_EN_MOD_QUAL); 32721a3571b5SPaul Greenwalt cfg_mask = ICE_AQ_PHY_ENA_VALID_MASK & ~ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; 32731a3571b5SPaul Greenwalt 32741a3571b5SPaul Greenwalt if (phy_caps->phy_type_low != phy_cfg->phy_type_low || 32751a3571b5SPaul Greenwalt phy_caps->phy_type_high != phy_cfg->phy_type_high || 32761a3571b5SPaul Greenwalt ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || 3277bdeff971SLev Faerman phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an || 32781a3571b5SPaul Greenwalt phy_caps->eee_cap != phy_cfg->eee_cap || 32791a3571b5SPaul Greenwalt phy_caps->eeer_value != phy_cfg->eeer_value || 32801a3571b5SPaul Greenwalt phy_caps->link_fec_options != phy_cfg->link_fec_opt) 32811a3571b5SPaul Greenwalt return false; 32821a3571b5SPaul Greenwalt 32831a3571b5SPaul Greenwalt return true; 32841a3571b5SPaul Greenwalt } 32851a3571b5SPaul Greenwalt 32861a3571b5SPaul Greenwalt /** 3287f776b3acSPaul Greenwalt * ice_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data 3288ea78ce4dSPaul Greenwalt * @pi: port information structure 3289f776b3acSPaul Greenwalt * @caps: PHY ability structure to copy date from 3290f776b3acSPaul Greenwalt * @cfg: PHY configuration structure to copy data to 3291f776b3acSPaul Greenwalt * 3292f776b3acSPaul Greenwalt * Helper function to copy AQC PHY get ability data to PHY set configuration 3293f776b3acSPaul Greenwalt * data structure 3294f776b3acSPaul Greenwalt */ 3295f776b3acSPaul Greenwalt void 3296ea78ce4dSPaul Greenwalt ice_copy_phy_caps_to_cfg(struct ice_port_info *pi, 3297ea78ce4dSPaul Greenwalt struct ice_aqc_get_phy_caps_data *caps, 3298f776b3acSPaul Greenwalt struct ice_aqc_set_phy_cfg_data *cfg) 3299f776b3acSPaul Greenwalt { 3300ea78ce4dSPaul Greenwalt if (!pi || !caps || !cfg) 3301f776b3acSPaul Greenwalt return; 3302f776b3acSPaul Greenwalt 33032ffb6085SPaul Greenwalt memset(cfg, 0, sizeof(*cfg)); 3304f776b3acSPaul Greenwalt cfg->phy_type_low = caps->phy_type_low; 3305f776b3acSPaul Greenwalt cfg->phy_type_high = caps->phy_type_high; 3306f776b3acSPaul Greenwalt cfg->caps = caps->caps; 3307bdeff971SLev Faerman cfg->low_power_ctrl_an = caps->low_power_ctrl_an; 3308f776b3acSPaul Greenwalt cfg->eee_cap = caps->eee_cap; 3309f776b3acSPaul Greenwalt cfg->eeer_value = caps->eeer_value; 3310f776b3acSPaul Greenwalt cfg->link_fec_opt = caps->link_fec_options; 3311ea78ce4dSPaul Greenwalt cfg->module_compliance_enforcement = 3312ea78ce4dSPaul Greenwalt caps->module_compliance_enforcement; 3313f776b3acSPaul Greenwalt } 3314f776b3acSPaul Greenwalt 3315f776b3acSPaul Greenwalt /** 3316f776b3acSPaul Greenwalt * ice_cfg_phy_fec - Configure PHY FEC data based on FEC mode 331761cf42e7SPaul Greenwalt * @pi: port information structure 3318f776b3acSPaul Greenwalt * @cfg: PHY configuration data to set FEC mode 3319f776b3acSPaul Greenwalt * @fec: FEC mode to configure 3320f776b3acSPaul Greenwalt */ 33215e24d598STony Nguyen int 332261cf42e7SPaul Greenwalt ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 332361cf42e7SPaul Greenwalt enum ice_fec_mode fec) 3324f776b3acSPaul Greenwalt { 332561cf42e7SPaul Greenwalt struct ice_aqc_get_phy_caps_data *pcaps; 33260a02944fSAnirudh Venkataramanan struct ice_hw *hw; 33275518ac2aSTony Nguyen int status; 332861cf42e7SPaul Greenwalt 332961cf42e7SPaul Greenwalt if (!pi || !cfg) 3330d54699e2STony Nguyen return -EINVAL; 333161cf42e7SPaul Greenwalt 33320a02944fSAnirudh Venkataramanan hw = pi->hw; 33330a02944fSAnirudh Venkataramanan 333461cf42e7SPaul Greenwalt pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL); 333561cf42e7SPaul Greenwalt if (!pcaps) 3336d54699e2STony Nguyen return -ENOMEM; 333761cf42e7SPaul Greenwalt 33380a02944fSAnirudh Venkataramanan status = ice_aq_get_phy_caps(pi, false, 33390a02944fSAnirudh Venkataramanan (ice_fw_supports_report_dflt_cfg(hw) ? 33400a02944fSAnirudh Venkataramanan ICE_AQC_REPORT_DFLT_CFG : 33410a02944fSAnirudh Venkataramanan ICE_AQC_REPORT_TOPO_CAP_MEDIA), pcaps, NULL); 334261cf42e7SPaul Greenwalt if (status) 334361cf42e7SPaul Greenwalt goto out; 334461cf42e7SPaul Greenwalt 334561cf42e7SPaul Greenwalt cfg->caps |= pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC; 334661cf42e7SPaul Greenwalt cfg->link_fec_opt = pcaps->link_fec_options; 334761cf42e7SPaul Greenwalt 3348f776b3acSPaul Greenwalt switch (fec) { 3349f776b3acSPaul Greenwalt case ICE_FEC_BASER: 33503747f031SChinh T Cao /* Clear RS bits, and AND BASE-R ability 3351f776b3acSPaul Greenwalt * bits and OR request bits. 3352f776b3acSPaul Greenwalt */ 3353f776b3acSPaul Greenwalt cfg->link_fec_opt &= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN | 3354f776b3acSPaul Greenwalt ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN; 3355f776b3acSPaul Greenwalt cfg->link_fec_opt |= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ | 3356f776b3acSPaul Greenwalt ICE_AQC_PHY_FEC_25G_KR_REQ; 3357f776b3acSPaul Greenwalt break; 3358f776b3acSPaul Greenwalt case ICE_FEC_RS: 33593747f031SChinh T Cao /* Clear BASE-R bits, and AND RS ability 3360f776b3acSPaul Greenwalt * bits and OR request bits. 3361f776b3acSPaul Greenwalt */ 3362f776b3acSPaul Greenwalt cfg->link_fec_opt &= ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN; 3363f776b3acSPaul Greenwalt cfg->link_fec_opt |= ICE_AQC_PHY_FEC_25G_RS_528_REQ | 3364f776b3acSPaul Greenwalt ICE_AQC_PHY_FEC_25G_RS_544_REQ; 3365f776b3acSPaul Greenwalt break; 3366f776b3acSPaul Greenwalt case ICE_FEC_NONE: 33673747f031SChinh T Cao /* Clear all FEC option bits. */ 3368f776b3acSPaul Greenwalt cfg->link_fec_opt &= ~ICE_AQC_PHY_FEC_MASK; 3369f776b3acSPaul Greenwalt break; 3370f776b3acSPaul Greenwalt case ICE_FEC_AUTO: 3371f776b3acSPaul Greenwalt /* AND auto FEC bit, and all caps bits. */ 3372f776b3acSPaul Greenwalt cfg->caps &= ICE_AQC_PHY_CAPS_MASK; 337361cf42e7SPaul Greenwalt cfg->link_fec_opt |= pcaps->link_fec_options; 337461cf42e7SPaul Greenwalt break; 337561cf42e7SPaul Greenwalt default: 3376d54699e2STony Nguyen status = -EINVAL; 3377f776b3acSPaul Greenwalt break; 3378f776b3acSPaul Greenwalt } 337961cf42e7SPaul Greenwalt 338075751c80SJeb Cramer if (fec == ICE_FEC_AUTO && ice_fw_supports_link_override(hw) && 338175751c80SJeb Cramer !ice_fw_supports_report_dflt_cfg(hw)) { 3382ea78ce4dSPaul Greenwalt struct ice_link_default_override_tlv tlv; 3383ea78ce4dSPaul Greenwalt 3384ea78ce4dSPaul Greenwalt if (ice_get_link_default_override(&tlv, pi)) 3385ea78ce4dSPaul Greenwalt goto out; 3386ea78ce4dSPaul Greenwalt 3387ea78ce4dSPaul Greenwalt if (!(tlv.options & ICE_LINK_OVERRIDE_STRICT_MODE) && 3388ea78ce4dSPaul Greenwalt (tlv.options & ICE_LINK_OVERRIDE_EN)) 3389ea78ce4dSPaul Greenwalt cfg->link_fec_opt = tlv.fec_options; 3390ea78ce4dSPaul Greenwalt } 3391ea78ce4dSPaul Greenwalt 339261cf42e7SPaul Greenwalt out: 339361cf42e7SPaul Greenwalt kfree(pcaps); 339461cf42e7SPaul Greenwalt 339561cf42e7SPaul Greenwalt return status; 3396f776b3acSPaul Greenwalt } 3397f776b3acSPaul Greenwalt 3398f776b3acSPaul Greenwalt /** 33990b28b702SAnirudh Venkataramanan * ice_get_link_status - get status of the HW network link 34000b28b702SAnirudh Venkataramanan * @pi: port information structure 34010b28b702SAnirudh Venkataramanan * @link_up: pointer to bool (true/false = linkup/linkdown) 34020b28b702SAnirudh Venkataramanan * 34030b28b702SAnirudh Venkataramanan * Variable link_up is true if link is up, false if link is down. 34040b28b702SAnirudh Venkataramanan * The variable link_up is invalid if status is non zero. As a 34050b28b702SAnirudh Venkataramanan * result of this call, link status reporting becomes enabled 34060b28b702SAnirudh Venkataramanan */ 34075e24d598STony Nguyen int ice_get_link_status(struct ice_port_info *pi, bool *link_up) 34080b28b702SAnirudh Venkataramanan { 34090b28b702SAnirudh Venkataramanan struct ice_phy_info *phy_info; 34105e24d598STony Nguyen int status = 0; 34110b28b702SAnirudh Venkataramanan 3412c7f2c42bSAnirudh Venkataramanan if (!pi || !link_up) 3413d54699e2STony Nguyen return -EINVAL; 34140b28b702SAnirudh Venkataramanan 34150b28b702SAnirudh Venkataramanan phy_info = &pi->phy; 34160b28b702SAnirudh Venkataramanan 34170b28b702SAnirudh Venkataramanan if (phy_info->get_link_info) { 34180b28b702SAnirudh Venkataramanan status = ice_update_link_info(pi); 34190b28b702SAnirudh Venkataramanan 34200b28b702SAnirudh Venkataramanan if (status) 34219228d8b2SJacob Keller ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n", 34220b28b702SAnirudh Venkataramanan status); 34230b28b702SAnirudh Venkataramanan } 34240b28b702SAnirudh Venkataramanan 34250b28b702SAnirudh Venkataramanan *link_up = phy_info->link_info.link_info & ICE_AQ_LINK_UP; 34260b28b702SAnirudh Venkataramanan 34270b28b702SAnirudh Venkataramanan return status; 34280b28b702SAnirudh Venkataramanan } 34290b28b702SAnirudh Venkataramanan 34300b28b702SAnirudh Venkataramanan /** 3431fcea6f3dSAnirudh Venkataramanan * ice_aq_set_link_restart_an 3432fcea6f3dSAnirudh Venkataramanan * @pi: pointer to the port information structure 3433fcea6f3dSAnirudh Venkataramanan * @ena_link: if true: enable link, if false: disable link 3434fcea6f3dSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 3435fcea6f3dSAnirudh Venkataramanan * 3436fcea6f3dSAnirudh Venkataramanan * Sets up the link and restarts the Auto-Negotiation over the link. 3437fcea6f3dSAnirudh Venkataramanan */ 34385e24d598STony Nguyen int 3439fcea6f3dSAnirudh Venkataramanan ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, 3440fcea6f3dSAnirudh Venkataramanan struct ice_sq_cd *cd) 3441fcea6f3dSAnirudh Venkataramanan { 3442fcea6f3dSAnirudh Venkataramanan struct ice_aqc_restart_an *cmd; 3443fcea6f3dSAnirudh Venkataramanan struct ice_aq_desc desc; 3444fcea6f3dSAnirudh Venkataramanan 3445fcea6f3dSAnirudh Venkataramanan cmd = &desc.params.restart_an; 3446fcea6f3dSAnirudh Venkataramanan 3447fcea6f3dSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_restart_an); 3448fcea6f3dSAnirudh Venkataramanan 3449fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags = ICE_AQC_RESTART_AN_LINK_RESTART; 3450fcea6f3dSAnirudh Venkataramanan cmd->lport_num = pi->lport; 3451fcea6f3dSAnirudh Venkataramanan if (ena_link) 3452fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags |= ICE_AQC_RESTART_AN_LINK_ENABLE; 3453fcea6f3dSAnirudh Venkataramanan else 3454fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE; 3455fcea6f3dSAnirudh Venkataramanan 3456fcea6f3dSAnirudh Venkataramanan return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); 3457fcea6f3dSAnirudh Venkataramanan } 3458fcea6f3dSAnirudh Venkataramanan 3459fcea6f3dSAnirudh Venkataramanan /** 3460250c3b3eSBrett Creeley * ice_aq_set_event_mask 3461250c3b3eSBrett Creeley * @hw: pointer to the HW struct 3462250c3b3eSBrett Creeley * @port_num: port number of the physical function 3463250c3b3eSBrett Creeley * @mask: event mask to be set 3464250c3b3eSBrett Creeley * @cd: pointer to command details structure or NULL 3465250c3b3eSBrett Creeley * 3466250c3b3eSBrett Creeley * Set event mask (0x0613) 3467250c3b3eSBrett Creeley */ 34685e24d598STony Nguyen int 3469250c3b3eSBrett Creeley ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, 3470250c3b3eSBrett Creeley struct ice_sq_cd *cd) 3471250c3b3eSBrett Creeley { 3472250c3b3eSBrett Creeley struct ice_aqc_set_event_mask *cmd; 3473250c3b3eSBrett Creeley struct ice_aq_desc desc; 3474250c3b3eSBrett Creeley 3475250c3b3eSBrett Creeley cmd = &desc.params.set_event_mask; 3476250c3b3eSBrett Creeley 3477250c3b3eSBrett Creeley ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_event_mask); 3478250c3b3eSBrett Creeley 3479250c3b3eSBrett Creeley cmd->lport_num = port_num; 3480250c3b3eSBrett Creeley 3481250c3b3eSBrett Creeley cmd->event_mask = cpu_to_le16(mask); 3482250c3b3eSBrett Creeley return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 3483250c3b3eSBrett Creeley } 3484250c3b3eSBrett Creeley 3485250c3b3eSBrett Creeley /** 34860e674aebSAnirudh Venkataramanan * ice_aq_set_mac_loopback 34870e674aebSAnirudh Venkataramanan * @hw: pointer to the HW struct 34880e674aebSAnirudh Venkataramanan * @ena_lpbk: Enable or Disable loopback 34890e674aebSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 34900e674aebSAnirudh Venkataramanan * 34910e674aebSAnirudh Venkataramanan * Enable/disable loopback on a given port 34920e674aebSAnirudh Venkataramanan */ 34935e24d598STony Nguyen int 34940e674aebSAnirudh Venkataramanan ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) 34950e674aebSAnirudh Venkataramanan { 34960e674aebSAnirudh Venkataramanan struct ice_aqc_set_mac_lb *cmd; 34970e674aebSAnirudh Venkataramanan struct ice_aq_desc desc; 34980e674aebSAnirudh Venkataramanan 34990e674aebSAnirudh Venkataramanan cmd = &desc.params.set_mac_lb; 35000e674aebSAnirudh Venkataramanan 35010e674aebSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_lb); 35020e674aebSAnirudh Venkataramanan if (ena_lpbk) 35030e674aebSAnirudh Venkataramanan cmd->lb_mode = ICE_AQ_MAC_LB_EN; 35040e674aebSAnirudh Venkataramanan 35050e674aebSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 35060e674aebSAnirudh Venkataramanan } 35070e674aebSAnirudh Venkataramanan 35080e674aebSAnirudh Venkataramanan /** 35098e151d50SAnirudh Venkataramanan * ice_aq_set_port_id_led 35108e151d50SAnirudh Venkataramanan * @pi: pointer to the port information 35118e151d50SAnirudh Venkataramanan * @is_orig_mode: is this LED set to original mode (by the net-list) 35128e151d50SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 35138e151d50SAnirudh Venkataramanan * 35148e151d50SAnirudh Venkataramanan * Set LED value for the given port (0x06e9) 35158e151d50SAnirudh Venkataramanan */ 35165e24d598STony Nguyen int 35178e151d50SAnirudh Venkataramanan ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, 35188e151d50SAnirudh Venkataramanan struct ice_sq_cd *cd) 35198e151d50SAnirudh Venkataramanan { 35208e151d50SAnirudh Venkataramanan struct ice_aqc_set_port_id_led *cmd; 35218e151d50SAnirudh Venkataramanan struct ice_hw *hw = pi->hw; 35228e151d50SAnirudh Venkataramanan struct ice_aq_desc desc; 35238e151d50SAnirudh Venkataramanan 35248e151d50SAnirudh Venkataramanan cmd = &desc.params.set_port_id_led; 35258e151d50SAnirudh Venkataramanan 35268e151d50SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); 35278e151d50SAnirudh Venkataramanan 35288e151d50SAnirudh Venkataramanan if (is_orig_mode) 35298e151d50SAnirudh Venkataramanan cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; 35308e151d50SAnirudh Venkataramanan else 35318e151d50SAnirudh Venkataramanan cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_BLINK; 35328e151d50SAnirudh Venkataramanan 35338e151d50SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 35348e151d50SAnirudh Venkataramanan } 35358e151d50SAnirudh Venkataramanan 35368e151d50SAnirudh Venkataramanan /** 3537a012dca9SScott W Taylor * ice_aq_sff_eeprom 3538a012dca9SScott W Taylor * @hw: pointer to the HW struct 3539a012dca9SScott W Taylor * @lport: bits [7:0] = logical port, bit [8] = logical port valid 3540a012dca9SScott W Taylor * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default) 3541a012dca9SScott W Taylor * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding. 3542a012dca9SScott W Taylor * @page: QSFP page 3543a012dca9SScott W Taylor * @set_page: set or ignore the page 3544a012dca9SScott W Taylor * @data: pointer to data buffer to be read/written to the I2C device. 3545a012dca9SScott W Taylor * @length: 1-16 for read, 1 for write. 3546a012dca9SScott W Taylor * @write: 0 read, 1 for write. 3547a012dca9SScott W Taylor * @cd: pointer to command details structure or NULL 3548a012dca9SScott W Taylor * 3549a012dca9SScott W Taylor * Read/Write SFF EEPROM (0x06EE) 3550a012dca9SScott W Taylor */ 35515e24d598STony Nguyen int 3552a012dca9SScott W Taylor ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, 3553a012dca9SScott W Taylor u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, 3554a012dca9SScott W Taylor bool write, struct ice_sq_cd *cd) 3555a012dca9SScott W Taylor { 3556a012dca9SScott W Taylor struct ice_aqc_sff_eeprom *cmd; 3557a012dca9SScott W Taylor struct ice_aq_desc desc; 35585e24d598STony Nguyen int status; 3559a012dca9SScott W Taylor 3560a012dca9SScott W Taylor if (!data || (mem_addr & 0xff00)) 3561d54699e2STony Nguyen return -EINVAL; 3562a012dca9SScott W Taylor 3563a012dca9SScott W Taylor ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_sff_eeprom); 3564a012dca9SScott W Taylor cmd = &desc.params.read_write_sff_param; 3565800c1443SBruce Allan desc.flags = cpu_to_le16(ICE_AQ_FLAG_RD); 3566a012dca9SScott W Taylor cmd->lport_num = (u8)(lport & 0xff); 3567a012dca9SScott W Taylor cmd->lport_num_valid = (u8)((lport >> 8) & 0x01); 3568a012dca9SScott W Taylor cmd->i2c_bus_addr = cpu_to_le16(((bus_addr >> 1) & 3569a012dca9SScott W Taylor ICE_AQC_SFF_I2CBUS_7BIT_M) | 3570a012dca9SScott W Taylor ((set_page << 3571a012dca9SScott W Taylor ICE_AQC_SFF_SET_EEPROM_PAGE_S) & 3572a012dca9SScott W Taylor ICE_AQC_SFF_SET_EEPROM_PAGE_M)); 3573a012dca9SScott W Taylor cmd->i2c_mem_addr = cpu_to_le16(mem_addr & 0xff); 3574a012dca9SScott W Taylor cmd->eeprom_page = cpu_to_le16((u16)page << ICE_AQC_SFF_EEPROM_PAGE_S); 3575a012dca9SScott W Taylor if (write) 3576a012dca9SScott W Taylor cmd->i2c_bus_addr |= cpu_to_le16(ICE_AQC_SFF_IS_WRITE); 3577a012dca9SScott W Taylor 3578a012dca9SScott W Taylor status = ice_aq_send_cmd(hw, &desc, data, length, cd); 3579a012dca9SScott W Taylor return status; 3580a012dca9SScott W Taylor } 3581a012dca9SScott W Taylor 3582a012dca9SScott W Taylor /** 3583d76a60baSAnirudh Venkataramanan * __ice_aq_get_set_rss_lut 3584d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 3585e3c53928SBrett Creeley * @params: RSS LUT parameters 3586d76a60baSAnirudh Venkataramanan * @set: set true to set the table, false to get the table 3587d76a60baSAnirudh Venkataramanan * 3588d76a60baSAnirudh Venkataramanan * Internal function to get (0x0B05) or set (0x0B03) RSS look up table 3589d76a60baSAnirudh Venkataramanan */ 35905e24d598STony Nguyen static int 3591e3c53928SBrett Creeley __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *params, bool set) 3592d76a60baSAnirudh Venkataramanan { 3593e3c53928SBrett Creeley u16 flags = 0, vsi_id, lut_type, lut_size, glob_lut_idx, vsi_handle; 3594d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_lut *cmd_resp; 3595d76a60baSAnirudh Venkataramanan struct ice_aq_desc desc; 35965e24d598STony Nguyen int status; 3597e3c53928SBrett Creeley u8 *lut; 3598e3c53928SBrett Creeley 3599e3c53928SBrett Creeley if (!params) 3600d54699e2STony Nguyen return -EINVAL; 3601e3c53928SBrett Creeley 3602e3c53928SBrett Creeley vsi_handle = params->vsi_handle; 3603e3c53928SBrett Creeley lut = params->lut; 3604e3c53928SBrett Creeley 3605e3c53928SBrett Creeley if (!ice_is_vsi_valid(hw, vsi_handle) || !lut) 3606d54699e2STony Nguyen return -EINVAL; 3607e3c53928SBrett Creeley 3608e3c53928SBrett Creeley lut_size = params->lut_size; 3609e3c53928SBrett Creeley lut_type = params->lut_type; 3610e3c53928SBrett Creeley glob_lut_idx = params->global_lut_id; 3611e3c53928SBrett Creeley vsi_id = ice_get_hw_vsi_num(hw, vsi_handle); 3612d76a60baSAnirudh Venkataramanan 3613d76a60baSAnirudh Venkataramanan cmd_resp = &desc.params.get_set_rss_lut; 3614d76a60baSAnirudh Venkataramanan 3615d76a60baSAnirudh Venkataramanan if (set) { 3616d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_lut); 3617d76a60baSAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 3618d76a60baSAnirudh Venkataramanan } else { 3619d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_lut); 3620d76a60baSAnirudh Venkataramanan } 3621d76a60baSAnirudh Venkataramanan 3622d76a60baSAnirudh Venkataramanan cmd_resp->vsi_id = cpu_to_le16(((vsi_id << 3623d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_ID_S) & 3624d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_ID_M) | 3625d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_VALID); 3626d76a60baSAnirudh Venkataramanan 3627d76a60baSAnirudh Venkataramanan switch (lut_type) { 3628d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI: 3629d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF: 3630d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL: 3631d76a60baSAnirudh Venkataramanan flags |= ((lut_type << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) & 3632d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M); 3633d76a60baSAnirudh Venkataramanan break; 3634d76a60baSAnirudh Venkataramanan default: 3635d54699e2STony Nguyen status = -EINVAL; 3636d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_exit; 3637d76a60baSAnirudh Venkataramanan } 3638d76a60baSAnirudh Venkataramanan 3639d76a60baSAnirudh Venkataramanan if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL) { 3640d76a60baSAnirudh Venkataramanan flags |= ((glob_lut_idx << ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S) & 3641d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_M); 3642d76a60baSAnirudh Venkataramanan 3643d76a60baSAnirudh Venkataramanan if (!set) 3644d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 3645d76a60baSAnirudh Venkataramanan } else if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { 3646d76a60baSAnirudh Venkataramanan if (!set) 3647d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 3648d76a60baSAnirudh Venkataramanan } else { 3649d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 3650d76a60baSAnirudh Venkataramanan } 3651d76a60baSAnirudh Venkataramanan 3652d76a60baSAnirudh Venkataramanan /* LUT size is only valid for Global and PF table types */ 36534381147dSAnirudh Venkataramanan switch (lut_size) { 36544381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128: 36554381147dSAnirudh Venkataramanan break; 36564381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512: 3657d76a60baSAnirudh Venkataramanan flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG << 3658d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & 3659d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; 36604381147dSAnirudh Venkataramanan break; 36614381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K: 36624381147dSAnirudh Venkataramanan if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { 3663d76a60baSAnirudh Venkataramanan flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG << 3664d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & 3665d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; 36664381147dSAnirudh Venkataramanan break; 36674381147dSAnirudh Venkataramanan } 36684e83fc93SBruce Allan fallthrough; 36694381147dSAnirudh Venkataramanan default: 3670d54699e2STony Nguyen status = -EINVAL; 3671d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_exit; 3672d76a60baSAnirudh Venkataramanan } 3673d76a60baSAnirudh Venkataramanan 3674d76a60baSAnirudh Venkataramanan ice_aq_get_set_rss_lut_send: 3675d76a60baSAnirudh Venkataramanan cmd_resp->flags = cpu_to_le16(flags); 3676d76a60baSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL); 3677d76a60baSAnirudh Venkataramanan 3678d76a60baSAnirudh Venkataramanan ice_aq_get_set_rss_lut_exit: 3679d76a60baSAnirudh Venkataramanan return status; 3680d76a60baSAnirudh Venkataramanan } 3681d76a60baSAnirudh Venkataramanan 3682d76a60baSAnirudh Venkataramanan /** 3683d76a60baSAnirudh Venkataramanan * ice_aq_get_rss_lut 3684d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 3685e3c53928SBrett Creeley * @get_params: RSS LUT parameters used to specify which RSS LUT to get 3686d76a60baSAnirudh Venkataramanan * 3687d76a60baSAnirudh Venkataramanan * get the RSS lookup table, PF or VSI type 3688d76a60baSAnirudh Venkataramanan */ 36895e24d598STony Nguyen int 3690e3c53928SBrett Creeley ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params) 3691d76a60baSAnirudh Venkataramanan { 3692e3c53928SBrett Creeley return __ice_aq_get_set_rss_lut(hw, get_params, false); 3693d76a60baSAnirudh Venkataramanan } 3694d76a60baSAnirudh Venkataramanan 3695d76a60baSAnirudh Venkataramanan /** 3696d76a60baSAnirudh Venkataramanan * ice_aq_set_rss_lut 3697d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 3698e3c53928SBrett Creeley * @set_params: RSS LUT parameters used to specify how to set the RSS LUT 3699d76a60baSAnirudh Venkataramanan * 3700d76a60baSAnirudh Venkataramanan * set the RSS lookup table, PF or VSI type 3701d76a60baSAnirudh Venkataramanan */ 37025e24d598STony Nguyen int 3703e3c53928SBrett Creeley ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params) 3704d76a60baSAnirudh Venkataramanan { 3705e3c53928SBrett Creeley return __ice_aq_get_set_rss_lut(hw, set_params, true); 3706d76a60baSAnirudh Venkataramanan } 3707d76a60baSAnirudh Venkataramanan 3708d76a60baSAnirudh Venkataramanan /** 3709d76a60baSAnirudh Venkataramanan * __ice_aq_get_set_rss_key 3710f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 3711d76a60baSAnirudh Venkataramanan * @vsi_id: VSI FW index 3712d76a60baSAnirudh Venkataramanan * @key: pointer to key info struct 3713d76a60baSAnirudh Venkataramanan * @set: set true to set the key, false to get the key 3714d76a60baSAnirudh Venkataramanan * 3715d76a60baSAnirudh Venkataramanan * get (0x0B04) or set (0x0B02) the RSS key per VSI 3716d76a60baSAnirudh Venkataramanan */ 37175518ac2aSTony Nguyen static int 37185518ac2aSTony Nguyen __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id, 37195518ac2aSTony Nguyen struct ice_aqc_get_set_rss_keys *key, bool set) 3720d76a60baSAnirudh Venkataramanan { 3721d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_key *cmd_resp; 3722d76a60baSAnirudh Venkataramanan u16 key_size = sizeof(*key); 3723d76a60baSAnirudh Venkataramanan struct ice_aq_desc desc; 3724d76a60baSAnirudh Venkataramanan 3725d76a60baSAnirudh Venkataramanan cmd_resp = &desc.params.get_set_rss_key; 3726d76a60baSAnirudh Venkataramanan 3727d76a60baSAnirudh Venkataramanan if (set) { 3728d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_key); 3729d76a60baSAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 3730d76a60baSAnirudh Venkataramanan } else { 3731d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_key); 3732d76a60baSAnirudh Venkataramanan } 3733d76a60baSAnirudh Venkataramanan 3734d76a60baSAnirudh Venkataramanan cmd_resp->vsi_id = cpu_to_le16(((vsi_id << 3735d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_ID_S) & 3736d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_ID_M) | 3737d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_VALID); 3738d76a60baSAnirudh Venkataramanan 3739d76a60baSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, key, key_size, NULL); 3740d76a60baSAnirudh Venkataramanan } 3741d76a60baSAnirudh Venkataramanan 3742d76a60baSAnirudh Venkataramanan /** 3743d76a60baSAnirudh Venkataramanan * ice_aq_get_rss_key 3744f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 37454fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 3746d76a60baSAnirudh Venkataramanan * @key: pointer to key info struct 3747d76a60baSAnirudh Venkataramanan * 3748d76a60baSAnirudh Venkataramanan * get the RSS key per VSI 3749d76a60baSAnirudh Venkataramanan */ 37505e24d598STony Nguyen int 37514fb33f31SAnirudh Venkataramanan ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle, 3752d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_keys *key) 3753d76a60baSAnirudh Venkataramanan { 37544fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !key) 3755d54699e2STony Nguyen return -EINVAL; 37564fb33f31SAnirudh Venkataramanan 37574fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle), 37584fb33f31SAnirudh Venkataramanan key, false); 3759d76a60baSAnirudh Venkataramanan } 3760d76a60baSAnirudh Venkataramanan 3761d76a60baSAnirudh Venkataramanan /** 3762d76a60baSAnirudh Venkataramanan * ice_aq_set_rss_key 3763f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 37644fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 3765d76a60baSAnirudh Venkataramanan * @keys: pointer to key info struct 3766d76a60baSAnirudh Venkataramanan * 3767d76a60baSAnirudh Venkataramanan * set the RSS key per VSI 3768d76a60baSAnirudh Venkataramanan */ 37695e24d598STony Nguyen int 37704fb33f31SAnirudh Venkataramanan ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle, 3771d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_keys *keys) 3772d76a60baSAnirudh Venkataramanan { 37734fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !keys) 3774d54699e2STony Nguyen return -EINVAL; 37754fb33f31SAnirudh Venkataramanan 37764fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle), 37774fb33f31SAnirudh Venkataramanan keys, true); 3778d76a60baSAnirudh Venkataramanan } 3779d76a60baSAnirudh Venkataramanan 3780d76a60baSAnirudh Venkataramanan /** 3781cdedef59SAnirudh Venkataramanan * ice_aq_add_lan_txq 3782cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 3783cdedef59SAnirudh Venkataramanan * @num_qgrps: Number of added queue groups 3784cdedef59SAnirudh Venkataramanan * @qg_list: list of queue groups to be added 3785cdedef59SAnirudh Venkataramanan * @buf_size: size of buffer for indirect command 3786cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 3787cdedef59SAnirudh Venkataramanan * 3788cdedef59SAnirudh Venkataramanan * Add Tx LAN queue (0x0C30) 3789cdedef59SAnirudh Venkataramanan * 3790cdedef59SAnirudh Venkataramanan * NOTE: 3791cdedef59SAnirudh Venkataramanan * Prior to calling add Tx LAN queue: 3792cdedef59SAnirudh Venkataramanan * Initialize the following as part of the Tx queue context: 3793cdedef59SAnirudh Venkataramanan * Completion queue ID if the queue uses Completion queue, Quanta profile, 3794cdedef59SAnirudh Venkataramanan * Cache profile and Packet shaper profile. 3795cdedef59SAnirudh Venkataramanan * 3796cdedef59SAnirudh Venkataramanan * After add Tx LAN queue AQ command is completed: 3797cdedef59SAnirudh Venkataramanan * Interrupts should be associated with specific queues, 3798cdedef59SAnirudh Venkataramanan * Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue 3799cdedef59SAnirudh Venkataramanan * flow. 3800cdedef59SAnirudh Venkataramanan */ 38015e24d598STony Nguyen static int 3802cdedef59SAnirudh Venkataramanan ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps, 3803cdedef59SAnirudh Venkataramanan struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size, 3804cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 3805cdedef59SAnirudh Venkataramanan { 3806cdedef59SAnirudh Venkataramanan struct ice_aqc_add_tx_qgrp *list; 3807cdedef59SAnirudh Venkataramanan struct ice_aqc_add_txqs *cmd; 3808cdedef59SAnirudh Venkataramanan struct ice_aq_desc desc; 380966486d89SBruce Allan u16 i, sum_size = 0; 3810cdedef59SAnirudh Venkataramanan 3811cdedef59SAnirudh Venkataramanan cmd = &desc.params.add_txqs; 3812cdedef59SAnirudh Venkataramanan 3813cdedef59SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_txqs); 3814cdedef59SAnirudh Venkataramanan 3815cdedef59SAnirudh Venkataramanan if (!qg_list) 3816d54699e2STony Nguyen return -EINVAL; 3817cdedef59SAnirudh Venkataramanan 3818cdedef59SAnirudh Venkataramanan if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS) 3819d54699e2STony Nguyen return -EINVAL; 3820cdedef59SAnirudh Venkataramanan 382166486d89SBruce Allan for (i = 0, list = qg_list; i < num_qgrps; i++) { 382266486d89SBruce Allan sum_size += struct_size(list, txqs, list->num_txqs); 382366486d89SBruce Allan list = (struct ice_aqc_add_tx_qgrp *)(list->txqs + 382466486d89SBruce Allan list->num_txqs); 3825cdedef59SAnirudh Venkataramanan } 3826cdedef59SAnirudh Venkataramanan 382766486d89SBruce Allan if (buf_size != sum_size) 3828d54699e2STony Nguyen return -EINVAL; 3829cdedef59SAnirudh Venkataramanan 3830cdedef59SAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 3831cdedef59SAnirudh Venkataramanan 3832cdedef59SAnirudh Venkataramanan cmd->num_qgrps = num_qgrps; 3833cdedef59SAnirudh Venkataramanan 3834cdedef59SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd); 3835cdedef59SAnirudh Venkataramanan } 3836cdedef59SAnirudh Venkataramanan 3837cdedef59SAnirudh Venkataramanan /** 3838cdedef59SAnirudh Venkataramanan * ice_aq_dis_lan_txq 3839cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 3840cdedef59SAnirudh Venkataramanan * @num_qgrps: number of groups in the list 3841cdedef59SAnirudh Venkataramanan * @qg_list: the list of groups to disable 3842cdedef59SAnirudh Venkataramanan * @buf_size: the total size of the qg_list buffer in bytes 384394c4441bSAnirudh Venkataramanan * @rst_src: if called due to reset, specifies the reset source 3844ddf30f7fSAnirudh Venkataramanan * @vmvf_num: the relative VM or VF number that is undergoing the reset 3845cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 3846cdedef59SAnirudh Venkataramanan * 3847cdedef59SAnirudh Venkataramanan * Disable LAN Tx queue (0x0C31) 3848cdedef59SAnirudh Venkataramanan */ 38495e24d598STony Nguyen static int 3850cdedef59SAnirudh Venkataramanan ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps, 3851cdedef59SAnirudh Venkataramanan struct ice_aqc_dis_txq_item *qg_list, u16 buf_size, 3852ddf30f7fSAnirudh Venkataramanan enum ice_disq_rst_src rst_src, u16 vmvf_num, 3853cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 3854cdedef59SAnirudh Venkataramanan { 385566486d89SBruce Allan struct ice_aqc_dis_txq_item *item; 3856cdedef59SAnirudh Venkataramanan struct ice_aqc_dis_txqs *cmd; 3857cdedef59SAnirudh Venkataramanan struct ice_aq_desc desc; 3858cdedef59SAnirudh Venkataramanan u16 i, sz = 0; 38595518ac2aSTony Nguyen int status; 3860cdedef59SAnirudh Venkataramanan 3861cdedef59SAnirudh Venkataramanan cmd = &desc.params.dis_txqs; 3862cdedef59SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_dis_txqs); 3863cdedef59SAnirudh Venkataramanan 3864ddf30f7fSAnirudh Venkataramanan /* qg_list can be NULL only in VM/VF reset flow */ 3865ddf30f7fSAnirudh Venkataramanan if (!qg_list && !rst_src) 3866d54699e2STony Nguyen return -EINVAL; 3867cdedef59SAnirudh Venkataramanan 3868cdedef59SAnirudh Venkataramanan if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS) 3869d54699e2STony Nguyen return -EINVAL; 3870ddf30f7fSAnirudh Venkataramanan 3871cdedef59SAnirudh Venkataramanan cmd->num_entries = num_qgrps; 3872cdedef59SAnirudh Venkataramanan 3873ddf30f7fSAnirudh Venkataramanan cmd->vmvf_and_timeout = cpu_to_le16((5 << ICE_AQC_Q_DIS_TIMEOUT_S) & 3874ddf30f7fSAnirudh Venkataramanan ICE_AQC_Q_DIS_TIMEOUT_M); 3875ddf30f7fSAnirudh Venkataramanan 3876ddf30f7fSAnirudh Venkataramanan switch (rst_src) { 3877ddf30f7fSAnirudh Venkataramanan case ICE_VM_RESET: 3878ddf30f7fSAnirudh Venkataramanan cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VM_RESET; 3879ddf30f7fSAnirudh Venkataramanan cmd->vmvf_and_timeout |= 3880ddf30f7fSAnirudh Venkataramanan cpu_to_le16(vmvf_num & ICE_AQC_Q_DIS_VMVF_NUM_M); 3881ddf30f7fSAnirudh Venkataramanan break; 3882ddf30f7fSAnirudh Venkataramanan case ICE_VF_RESET: 3883ddf30f7fSAnirudh Venkataramanan cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VF_RESET; 3884f9867df6SAnirudh Venkataramanan /* In this case, FW expects vmvf_num to be absolute VF ID */ 3885ddf30f7fSAnirudh Venkataramanan cmd->vmvf_and_timeout |= 3886ddf30f7fSAnirudh Venkataramanan cpu_to_le16((vmvf_num + hw->func_caps.vf_base_id) & 3887ddf30f7fSAnirudh Venkataramanan ICE_AQC_Q_DIS_VMVF_NUM_M); 3888ddf30f7fSAnirudh Venkataramanan break; 3889ddf30f7fSAnirudh Venkataramanan case ICE_NO_RESET: 3890ddf30f7fSAnirudh Venkataramanan default: 3891ddf30f7fSAnirudh Venkataramanan break; 3892ddf30f7fSAnirudh Venkataramanan } 3893ddf30f7fSAnirudh Venkataramanan 38946e9650d5SVictor Raj /* flush pipe on time out */ 38956e9650d5SVictor Raj cmd->cmd_type |= ICE_AQC_Q_DIS_CMD_FLUSH_PIPE; 3896ddf30f7fSAnirudh Venkataramanan /* If no queue group info, we are in a reset flow. Issue the AQ */ 3897ddf30f7fSAnirudh Venkataramanan if (!qg_list) 3898ddf30f7fSAnirudh Venkataramanan goto do_aq; 3899ddf30f7fSAnirudh Venkataramanan 3900ddf30f7fSAnirudh Venkataramanan /* set RD bit to indicate that command buffer is provided by the driver 3901ddf30f7fSAnirudh Venkataramanan * and it needs to be read by the firmware 3902ddf30f7fSAnirudh Venkataramanan */ 3903ddf30f7fSAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 3904ddf30f7fSAnirudh Venkataramanan 390566486d89SBruce Allan for (i = 0, item = qg_list; i < num_qgrps; i++) { 390666486d89SBruce Allan u16 item_size = struct_size(item, q_id, item->num_qs); 3907cdedef59SAnirudh Venkataramanan 3908cdedef59SAnirudh Venkataramanan /* If the num of queues is even, add 2 bytes of padding */ 390966486d89SBruce Allan if ((item->num_qs % 2) == 0) 391066486d89SBruce Allan item_size += 2; 391166486d89SBruce Allan 391266486d89SBruce Allan sz += item_size; 391366486d89SBruce Allan 391466486d89SBruce Allan item = (struct ice_aqc_dis_txq_item *)((u8 *)item + item_size); 3915cdedef59SAnirudh Venkataramanan } 3916cdedef59SAnirudh Venkataramanan 3917cdedef59SAnirudh Venkataramanan if (buf_size != sz) 3918d54699e2STony Nguyen return -EINVAL; 3919cdedef59SAnirudh Venkataramanan 3920ddf30f7fSAnirudh Venkataramanan do_aq: 39216e9650d5SVictor Raj status = ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd); 39226e9650d5SVictor Raj if (status) { 39236e9650d5SVictor Raj if (!qg_list) 39246e9650d5SVictor Raj ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n", 39256e9650d5SVictor Raj vmvf_num, hw->adminq.sq_last_status); 39266e9650d5SVictor Raj else 39272f2da36eSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n", 39286e9650d5SVictor Raj le16_to_cpu(qg_list[0].q_id[0]), 39296e9650d5SVictor Raj hw->adminq.sq_last_status); 39306e9650d5SVictor Raj } 39316e9650d5SVictor Raj return status; 3932cdedef59SAnirudh Venkataramanan } 3933cdedef59SAnirudh Venkataramanan 3934348048e7SDave Ertman /** 3935348048e7SDave Ertman * ice_aq_add_rdma_qsets 3936348048e7SDave Ertman * @hw: pointer to the hardware structure 3937348048e7SDave Ertman * @num_qset_grps: Number of RDMA Qset groups 3938348048e7SDave Ertman * @qset_list: list of Qset groups to be added 3939348048e7SDave Ertman * @buf_size: size of buffer for indirect command 3940348048e7SDave Ertman * @cd: pointer to command details structure or NULL 3941348048e7SDave Ertman * 3942348048e7SDave Ertman * Add Tx RDMA Qsets (0x0C33) 3943348048e7SDave Ertman */ 3944348048e7SDave Ertman static int 3945348048e7SDave Ertman ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps, 3946348048e7SDave Ertman struct ice_aqc_add_rdma_qset_data *qset_list, 3947348048e7SDave Ertman u16 buf_size, struct ice_sq_cd *cd) 3948348048e7SDave Ertman { 3949348048e7SDave Ertman struct ice_aqc_add_rdma_qset_data *list; 3950348048e7SDave Ertman struct ice_aqc_add_rdma_qset *cmd; 3951348048e7SDave Ertman struct ice_aq_desc desc; 3952348048e7SDave Ertman u16 i, sum_size = 0; 3953348048e7SDave Ertman 3954348048e7SDave Ertman cmd = &desc.params.add_rdma_qset; 3955348048e7SDave Ertman 3956348048e7SDave Ertman ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_rdma_qset); 3957348048e7SDave Ertman 3958348048e7SDave Ertman if (num_qset_grps > ICE_LAN_TXQ_MAX_QGRPS) 3959348048e7SDave Ertman return -EINVAL; 3960348048e7SDave Ertman 3961348048e7SDave Ertman for (i = 0, list = qset_list; i < num_qset_grps; i++) { 3962348048e7SDave Ertman u16 num_qsets = le16_to_cpu(list->num_qsets); 3963348048e7SDave Ertman 3964348048e7SDave Ertman sum_size += struct_size(list, rdma_qsets, num_qsets); 3965348048e7SDave Ertman list = (struct ice_aqc_add_rdma_qset_data *)(list->rdma_qsets + 3966348048e7SDave Ertman num_qsets); 3967348048e7SDave Ertman } 3968348048e7SDave Ertman 3969348048e7SDave Ertman if (buf_size != sum_size) 3970348048e7SDave Ertman return -EINVAL; 3971348048e7SDave Ertman 3972348048e7SDave Ertman desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 3973348048e7SDave Ertman 3974348048e7SDave Ertman cmd->num_qset_grps = num_qset_grps; 3975348048e7SDave Ertman 3976d54699e2STony Nguyen return ice_aq_send_cmd(hw, &desc, qset_list, buf_size, cd); 3977348048e7SDave Ertman } 3978348048e7SDave Ertman 3979cdedef59SAnirudh Venkataramanan /* End of FW Admin Queue command wrappers */ 3980cdedef59SAnirudh Venkataramanan 3981cdedef59SAnirudh Venkataramanan /** 3982cdedef59SAnirudh Venkataramanan * ice_write_byte - write a byte to a packed context structure 3983cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 3984cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 3985cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 3986cdedef59SAnirudh Venkataramanan */ 3987c8b7abddSBruce Allan static void 3988c8b7abddSBruce Allan ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) 3989cdedef59SAnirudh Venkataramanan { 3990cdedef59SAnirudh Venkataramanan u8 src_byte, dest_byte, mask; 3991cdedef59SAnirudh Venkataramanan u8 *from, *dest; 3992cdedef59SAnirudh Venkataramanan u16 shift_width; 3993cdedef59SAnirudh Venkataramanan 3994cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 3995cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 3996cdedef59SAnirudh Venkataramanan 3997cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 3998cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 3999cdedef59SAnirudh Venkataramanan mask = (u8)(BIT(ce_info->width) - 1); 4000cdedef59SAnirudh Venkataramanan 4001cdedef59SAnirudh Venkataramanan src_byte = *from; 4002cdedef59SAnirudh Venkataramanan src_byte &= mask; 4003cdedef59SAnirudh Venkataramanan 4004cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 4005cdedef59SAnirudh Venkataramanan mask <<= shift_width; 4006cdedef59SAnirudh Venkataramanan src_byte <<= shift_width; 4007cdedef59SAnirudh Venkataramanan 4008cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 4009cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 4010cdedef59SAnirudh Venkataramanan 4011cdedef59SAnirudh Venkataramanan memcpy(&dest_byte, dest, sizeof(dest_byte)); 4012cdedef59SAnirudh Venkataramanan 4013cdedef59SAnirudh Venkataramanan dest_byte &= ~mask; /* get the bits not changing */ 4014cdedef59SAnirudh Venkataramanan dest_byte |= src_byte; /* add in the new bits */ 4015cdedef59SAnirudh Venkataramanan 4016cdedef59SAnirudh Venkataramanan /* put it all back */ 4017cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_byte, sizeof(dest_byte)); 4018cdedef59SAnirudh Venkataramanan } 4019cdedef59SAnirudh Venkataramanan 4020cdedef59SAnirudh Venkataramanan /** 4021cdedef59SAnirudh Venkataramanan * ice_write_word - write a word to a packed context structure 4022cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 4023cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 4024cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 4025cdedef59SAnirudh Venkataramanan */ 4026c8b7abddSBruce Allan static void 4027c8b7abddSBruce Allan ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) 4028cdedef59SAnirudh Venkataramanan { 4029cdedef59SAnirudh Venkataramanan u16 src_word, mask; 4030cdedef59SAnirudh Venkataramanan __le16 dest_word; 4031cdedef59SAnirudh Venkataramanan u8 *from, *dest; 4032cdedef59SAnirudh Venkataramanan u16 shift_width; 4033cdedef59SAnirudh Venkataramanan 4034cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 4035cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 4036cdedef59SAnirudh Venkataramanan 4037cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 4038cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 4039cdedef59SAnirudh Venkataramanan mask = BIT(ce_info->width) - 1; 4040cdedef59SAnirudh Venkataramanan 4041cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 4042cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 4043cdedef59SAnirudh Venkataramanan */ 4044cdedef59SAnirudh Venkataramanan src_word = *(u16 *)from; 4045cdedef59SAnirudh Venkataramanan src_word &= mask; 4046cdedef59SAnirudh Venkataramanan 4047cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 4048cdedef59SAnirudh Venkataramanan mask <<= shift_width; 4049cdedef59SAnirudh Venkataramanan src_word <<= shift_width; 4050cdedef59SAnirudh Venkataramanan 4051cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 4052cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 4053cdedef59SAnirudh Venkataramanan 4054cdedef59SAnirudh Venkataramanan memcpy(&dest_word, dest, sizeof(dest_word)); 4055cdedef59SAnirudh Venkataramanan 4056cdedef59SAnirudh Venkataramanan dest_word &= ~(cpu_to_le16(mask)); /* get the bits not changing */ 4057cdedef59SAnirudh Venkataramanan dest_word |= cpu_to_le16(src_word); /* add in the new bits */ 4058cdedef59SAnirudh Venkataramanan 4059cdedef59SAnirudh Venkataramanan /* put it all back */ 4060cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_word, sizeof(dest_word)); 4061cdedef59SAnirudh Venkataramanan } 4062cdedef59SAnirudh Venkataramanan 4063cdedef59SAnirudh Venkataramanan /** 4064cdedef59SAnirudh Venkataramanan * ice_write_dword - write a dword to a packed context structure 4065cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 4066cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 4067cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 4068cdedef59SAnirudh Venkataramanan */ 4069c8b7abddSBruce Allan static void 4070c8b7abddSBruce Allan ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) 4071cdedef59SAnirudh Venkataramanan { 4072cdedef59SAnirudh Venkataramanan u32 src_dword, mask; 4073cdedef59SAnirudh Venkataramanan __le32 dest_dword; 4074cdedef59SAnirudh Venkataramanan u8 *from, *dest; 4075cdedef59SAnirudh Venkataramanan u16 shift_width; 4076cdedef59SAnirudh Venkataramanan 4077cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 4078cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 4079cdedef59SAnirudh Venkataramanan 4080cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 4081cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 4082cdedef59SAnirudh Venkataramanan 4083cdedef59SAnirudh Venkataramanan /* if the field width is exactly 32 on an x86 machine, then the shift 4084cdedef59SAnirudh Venkataramanan * operation will not work because the SHL instructions count is masked 4085cdedef59SAnirudh Venkataramanan * to 5 bits so the shift will do nothing 4086cdedef59SAnirudh Venkataramanan */ 4087cdedef59SAnirudh Venkataramanan if (ce_info->width < 32) 4088cdedef59SAnirudh Venkataramanan mask = BIT(ce_info->width) - 1; 4089cdedef59SAnirudh Venkataramanan else 4090cdedef59SAnirudh Venkataramanan mask = (u32)~0; 4091cdedef59SAnirudh Venkataramanan 4092cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 4093cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 4094cdedef59SAnirudh Venkataramanan */ 4095cdedef59SAnirudh Venkataramanan src_dword = *(u32 *)from; 4096cdedef59SAnirudh Venkataramanan src_dword &= mask; 4097cdedef59SAnirudh Venkataramanan 4098cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 4099cdedef59SAnirudh Venkataramanan mask <<= shift_width; 4100cdedef59SAnirudh Venkataramanan src_dword <<= shift_width; 4101cdedef59SAnirudh Venkataramanan 4102cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 4103cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 4104cdedef59SAnirudh Venkataramanan 4105cdedef59SAnirudh Venkataramanan memcpy(&dest_dword, dest, sizeof(dest_dword)); 4106cdedef59SAnirudh Venkataramanan 4107cdedef59SAnirudh Venkataramanan dest_dword &= ~(cpu_to_le32(mask)); /* get the bits not changing */ 4108cdedef59SAnirudh Venkataramanan dest_dword |= cpu_to_le32(src_dword); /* add in the new bits */ 4109cdedef59SAnirudh Venkataramanan 4110cdedef59SAnirudh Venkataramanan /* put it all back */ 4111cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_dword, sizeof(dest_dword)); 4112cdedef59SAnirudh Venkataramanan } 4113cdedef59SAnirudh Venkataramanan 4114cdedef59SAnirudh Venkataramanan /** 4115cdedef59SAnirudh Venkataramanan * ice_write_qword - write a qword to a packed context structure 4116cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 4117cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 4118cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 4119cdedef59SAnirudh Venkataramanan */ 4120c8b7abddSBruce Allan static void 4121c8b7abddSBruce Allan ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) 4122cdedef59SAnirudh Venkataramanan { 4123cdedef59SAnirudh Venkataramanan u64 src_qword, mask; 4124cdedef59SAnirudh Venkataramanan __le64 dest_qword; 4125cdedef59SAnirudh Venkataramanan u8 *from, *dest; 4126cdedef59SAnirudh Venkataramanan u16 shift_width; 4127cdedef59SAnirudh Venkataramanan 4128cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 4129cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 4130cdedef59SAnirudh Venkataramanan 4131cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 4132cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 4133cdedef59SAnirudh Venkataramanan 4134cdedef59SAnirudh Venkataramanan /* if the field width is exactly 64 on an x86 machine, then the shift 4135cdedef59SAnirudh Venkataramanan * operation will not work because the SHL instructions count is masked 4136cdedef59SAnirudh Venkataramanan * to 6 bits so the shift will do nothing 4137cdedef59SAnirudh Venkataramanan */ 4138cdedef59SAnirudh Venkataramanan if (ce_info->width < 64) 4139cdedef59SAnirudh Venkataramanan mask = BIT_ULL(ce_info->width) - 1; 4140cdedef59SAnirudh Venkataramanan else 4141cdedef59SAnirudh Venkataramanan mask = (u64)~0; 4142cdedef59SAnirudh Venkataramanan 4143cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 4144cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 4145cdedef59SAnirudh Venkataramanan */ 4146cdedef59SAnirudh Venkataramanan src_qword = *(u64 *)from; 4147cdedef59SAnirudh Venkataramanan src_qword &= mask; 4148cdedef59SAnirudh Venkataramanan 4149cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 4150cdedef59SAnirudh Venkataramanan mask <<= shift_width; 4151cdedef59SAnirudh Venkataramanan src_qword <<= shift_width; 4152cdedef59SAnirudh Venkataramanan 4153cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 4154cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 4155cdedef59SAnirudh Venkataramanan 4156cdedef59SAnirudh Venkataramanan memcpy(&dest_qword, dest, sizeof(dest_qword)); 4157cdedef59SAnirudh Venkataramanan 4158cdedef59SAnirudh Venkataramanan dest_qword &= ~(cpu_to_le64(mask)); /* get the bits not changing */ 4159cdedef59SAnirudh Venkataramanan dest_qword |= cpu_to_le64(src_qword); /* add in the new bits */ 4160cdedef59SAnirudh Venkataramanan 4161cdedef59SAnirudh Venkataramanan /* put it all back */ 4162cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_qword, sizeof(dest_qword)); 4163cdedef59SAnirudh Venkataramanan } 4164cdedef59SAnirudh Venkataramanan 4165cdedef59SAnirudh Venkataramanan /** 4166cdedef59SAnirudh Venkataramanan * ice_set_ctx - set context bits in packed structure 41677e34786aSBruce Allan * @hw: pointer to the hardware structure 4168cdedef59SAnirudh Venkataramanan * @src_ctx: pointer to a generic non-packed context structure 4169cdedef59SAnirudh Venkataramanan * @dest_ctx: pointer to memory for the packed structure 4170cdedef59SAnirudh Venkataramanan * @ce_info: a description of the structure to be transformed 4171cdedef59SAnirudh Venkataramanan */ 41725e24d598STony Nguyen int 41737e34786aSBruce Allan ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, 41747e34786aSBruce Allan const struct ice_ctx_ele *ce_info) 4175cdedef59SAnirudh Venkataramanan { 4176cdedef59SAnirudh Venkataramanan int f; 4177cdedef59SAnirudh Venkataramanan 4178cdedef59SAnirudh Venkataramanan for (f = 0; ce_info[f].width; f++) { 4179cdedef59SAnirudh Venkataramanan /* We have to deal with each element of the FW response 4180cdedef59SAnirudh Venkataramanan * using the correct size so that we are correct regardless 4181cdedef59SAnirudh Venkataramanan * of the endianness of the machine. 4182cdedef59SAnirudh Venkataramanan */ 41837e34786aSBruce Allan if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) { 41849228d8b2SJacob Keller ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n", 41857e34786aSBruce Allan f, ce_info[f].width, ce_info[f].size_of); 41867e34786aSBruce Allan continue; 41877e34786aSBruce Allan } 4188cdedef59SAnirudh Venkataramanan switch (ce_info[f].size_of) { 4189cdedef59SAnirudh Venkataramanan case sizeof(u8): 4190cdedef59SAnirudh Venkataramanan ice_write_byte(src_ctx, dest_ctx, &ce_info[f]); 4191cdedef59SAnirudh Venkataramanan break; 4192cdedef59SAnirudh Venkataramanan case sizeof(u16): 4193cdedef59SAnirudh Venkataramanan ice_write_word(src_ctx, dest_ctx, &ce_info[f]); 4194cdedef59SAnirudh Venkataramanan break; 4195cdedef59SAnirudh Venkataramanan case sizeof(u32): 4196cdedef59SAnirudh Venkataramanan ice_write_dword(src_ctx, dest_ctx, &ce_info[f]); 4197cdedef59SAnirudh Venkataramanan break; 4198cdedef59SAnirudh Venkataramanan case sizeof(u64): 4199cdedef59SAnirudh Venkataramanan ice_write_qword(src_ctx, dest_ctx, &ce_info[f]); 4200cdedef59SAnirudh Venkataramanan break; 4201cdedef59SAnirudh Venkataramanan default: 4202d54699e2STony Nguyen return -EINVAL; 4203cdedef59SAnirudh Venkataramanan } 4204cdedef59SAnirudh Venkataramanan } 4205cdedef59SAnirudh Venkataramanan 4206cdedef59SAnirudh Venkataramanan return 0; 4207cdedef59SAnirudh Venkataramanan } 4208cdedef59SAnirudh Venkataramanan 4209cdedef59SAnirudh Venkataramanan /** 4210bb87ee0eSAnirudh Venkataramanan * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC 4211bb87ee0eSAnirudh Venkataramanan * @hw: pointer to the HW struct 4212bb87ee0eSAnirudh Venkataramanan * @vsi_handle: software VSI handle 4213bb87ee0eSAnirudh Venkataramanan * @tc: TC number 4214bb87ee0eSAnirudh Venkataramanan * @q_handle: software queue handle 4215bb87ee0eSAnirudh Venkataramanan */ 42161ddef455SUsha Ketineni struct ice_q_ctx * 4217bb87ee0eSAnirudh Venkataramanan ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle) 4218bb87ee0eSAnirudh Venkataramanan { 4219bb87ee0eSAnirudh Venkataramanan struct ice_vsi_ctx *vsi; 4220bb87ee0eSAnirudh Venkataramanan struct ice_q_ctx *q_ctx; 4221bb87ee0eSAnirudh Venkataramanan 4222bb87ee0eSAnirudh Venkataramanan vsi = ice_get_vsi_ctx(hw, vsi_handle); 4223bb87ee0eSAnirudh Venkataramanan if (!vsi) 4224bb87ee0eSAnirudh Venkataramanan return NULL; 4225bb87ee0eSAnirudh Venkataramanan if (q_handle >= vsi->num_lan_q_entries[tc]) 4226bb87ee0eSAnirudh Venkataramanan return NULL; 4227bb87ee0eSAnirudh Venkataramanan if (!vsi->lan_q_ctx[tc]) 4228bb87ee0eSAnirudh Venkataramanan return NULL; 4229bb87ee0eSAnirudh Venkataramanan q_ctx = vsi->lan_q_ctx[tc]; 4230bb87ee0eSAnirudh Venkataramanan return &q_ctx[q_handle]; 4231bb87ee0eSAnirudh Venkataramanan } 4232bb87ee0eSAnirudh Venkataramanan 4233bb87ee0eSAnirudh Venkataramanan /** 4234cdedef59SAnirudh Venkataramanan * ice_ena_vsi_txq 4235cdedef59SAnirudh Venkataramanan * @pi: port information structure 42364fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 4237f9867df6SAnirudh Venkataramanan * @tc: TC number 4238bb87ee0eSAnirudh Venkataramanan * @q_handle: software queue handle 4239cdedef59SAnirudh Venkataramanan * @num_qgrps: Number of added queue groups 4240cdedef59SAnirudh Venkataramanan * @buf: list of queue groups to be added 4241cdedef59SAnirudh Venkataramanan * @buf_size: size of buffer for indirect command 4242cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 4243cdedef59SAnirudh Venkataramanan * 4244f9867df6SAnirudh Venkataramanan * This function adds one LAN queue 4245cdedef59SAnirudh Venkataramanan */ 42465e24d598STony Nguyen int 4247bb87ee0eSAnirudh Venkataramanan ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, 4248bb87ee0eSAnirudh Venkataramanan u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size, 4249cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 4250cdedef59SAnirudh Venkataramanan { 4251cdedef59SAnirudh Venkataramanan struct ice_aqc_txsched_elem_data node = { 0 }; 4252cdedef59SAnirudh Venkataramanan struct ice_sched_node *parent; 4253bb87ee0eSAnirudh Venkataramanan struct ice_q_ctx *q_ctx; 4254cdedef59SAnirudh Venkataramanan struct ice_hw *hw; 42555518ac2aSTony Nguyen int status; 4256cdedef59SAnirudh Venkataramanan 4257cdedef59SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 4258d54699e2STony Nguyen return -EIO; 4259cdedef59SAnirudh Venkataramanan 4260cdedef59SAnirudh Venkataramanan if (num_qgrps > 1 || buf->num_txqs > 1) 4261d54699e2STony Nguyen return -ENOSPC; 4262cdedef59SAnirudh Venkataramanan 4263cdedef59SAnirudh Venkataramanan hw = pi->hw; 4264cdedef59SAnirudh Venkataramanan 42654fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle)) 4266d54699e2STony Nguyen return -EINVAL; 42674fb33f31SAnirudh Venkataramanan 4268cdedef59SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 4269cdedef59SAnirudh Venkataramanan 4270bb87ee0eSAnirudh Venkataramanan q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle); 4271bb87ee0eSAnirudh Venkataramanan if (!q_ctx) { 4272bb87ee0eSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n", 4273bb87ee0eSAnirudh Venkataramanan q_handle); 4274d54699e2STony Nguyen status = -EINVAL; 4275bb87ee0eSAnirudh Venkataramanan goto ena_txq_exit; 4276bb87ee0eSAnirudh Venkataramanan } 4277bb87ee0eSAnirudh Venkataramanan 4278cdedef59SAnirudh Venkataramanan /* find a parent node */ 42794fb33f31SAnirudh Venkataramanan parent = ice_sched_get_free_qparent(pi, vsi_handle, tc, 4280cdedef59SAnirudh Venkataramanan ICE_SCHED_NODE_OWNER_LAN); 4281cdedef59SAnirudh Venkataramanan if (!parent) { 4282d54699e2STony Nguyen status = -EINVAL; 4283cdedef59SAnirudh Venkataramanan goto ena_txq_exit; 4284cdedef59SAnirudh Venkataramanan } 42854fb33f31SAnirudh Venkataramanan 4286cdedef59SAnirudh Venkataramanan buf->parent_teid = parent->info.node_teid; 4287cdedef59SAnirudh Venkataramanan node.parent_teid = parent->info.node_teid; 4288cdedef59SAnirudh Venkataramanan /* Mark that the values in the "generic" section as valid. The default 4289cdedef59SAnirudh Venkataramanan * value in the "generic" section is zero. This means that : 4290cdedef59SAnirudh Venkataramanan * - Scheduling mode is Bytes Per Second (BPS), indicated by Bit 0. 4291cdedef59SAnirudh Venkataramanan * - 0 priority among siblings, indicated by Bit 1-3. 4292cdedef59SAnirudh Venkataramanan * - WFQ, indicated by Bit 4. 4293cdedef59SAnirudh Venkataramanan * - 0 Adjustment value is used in PSM credit update flow, indicated by 4294cdedef59SAnirudh Venkataramanan * Bit 5-6. 4295cdedef59SAnirudh Venkataramanan * - Bit 7 is reserved. 4296cdedef59SAnirudh Venkataramanan * Without setting the generic section as valid in valid_sections, the 4297f9867df6SAnirudh Venkataramanan * Admin queue command will fail with error code ICE_AQ_RC_EINVAL. 4298cdedef59SAnirudh Venkataramanan */ 4299984824a2STarun Singh buf->txqs[0].info.valid_sections = 4300984824a2STarun Singh ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR | 4301984824a2STarun Singh ICE_AQC_ELEM_VALID_EIR; 4302984824a2STarun Singh buf->txqs[0].info.generic = 0; 4303984824a2STarun Singh buf->txqs[0].info.cir_bw.bw_profile_idx = 4304984824a2STarun Singh cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 4305984824a2STarun Singh buf->txqs[0].info.cir_bw.bw_alloc = 4306984824a2STarun Singh cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 4307984824a2STarun Singh buf->txqs[0].info.eir_bw.bw_profile_idx = 4308984824a2STarun Singh cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 4309984824a2STarun Singh buf->txqs[0].info.eir_bw.bw_alloc = 4310984824a2STarun Singh cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 4311cdedef59SAnirudh Venkataramanan 4312f9867df6SAnirudh Venkataramanan /* add the LAN queue */ 4313cdedef59SAnirudh Venkataramanan status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd); 43146e9650d5SVictor Raj if (status) { 4315bb87ee0eSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n", 43166e9650d5SVictor Raj le16_to_cpu(buf->txqs[0].txq_id), 43176e9650d5SVictor Raj hw->adminq.sq_last_status); 4318cdedef59SAnirudh Venkataramanan goto ena_txq_exit; 43196e9650d5SVictor Raj } 4320cdedef59SAnirudh Venkataramanan 4321cdedef59SAnirudh Venkataramanan node.node_teid = buf->txqs[0].q_teid; 4322cdedef59SAnirudh Venkataramanan node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF; 4323bb87ee0eSAnirudh Venkataramanan q_ctx->q_handle = q_handle; 43241ddef455SUsha Ketineni q_ctx->q_teid = le32_to_cpu(node.node_teid); 4325cdedef59SAnirudh Venkataramanan 43261ddef455SUsha Ketineni /* add a leaf node into scheduler tree queue layer */ 4327cdedef59SAnirudh Venkataramanan status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node); 43281ddef455SUsha Ketineni if (!status) 43291ddef455SUsha Ketineni status = ice_sched_replay_q_bw(pi, q_ctx); 4330cdedef59SAnirudh Venkataramanan 4331cdedef59SAnirudh Venkataramanan ena_txq_exit: 4332cdedef59SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 4333cdedef59SAnirudh Venkataramanan return status; 4334cdedef59SAnirudh Venkataramanan } 4335cdedef59SAnirudh Venkataramanan 4336cdedef59SAnirudh Venkataramanan /** 4337cdedef59SAnirudh Venkataramanan * ice_dis_vsi_txq 4338cdedef59SAnirudh Venkataramanan * @pi: port information structure 4339bb87ee0eSAnirudh Venkataramanan * @vsi_handle: software VSI handle 4340bb87ee0eSAnirudh Venkataramanan * @tc: TC number 4341cdedef59SAnirudh Venkataramanan * @num_queues: number of queues 4342bb87ee0eSAnirudh Venkataramanan * @q_handles: pointer to software queue handle array 4343cdedef59SAnirudh Venkataramanan * @q_ids: pointer to the q_id array 4344cdedef59SAnirudh Venkataramanan * @q_teids: pointer to queue node teids 434594c4441bSAnirudh Venkataramanan * @rst_src: if called due to reset, specifies the reset source 4346ddf30f7fSAnirudh Venkataramanan * @vmvf_num: the relative VM or VF number that is undergoing the reset 4347cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 4348cdedef59SAnirudh Venkataramanan * 4349cdedef59SAnirudh Venkataramanan * This function removes queues and their corresponding nodes in SW DB 4350cdedef59SAnirudh Venkataramanan */ 43515e24d598STony Nguyen int 4352bb87ee0eSAnirudh Venkataramanan ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues, 4353bb87ee0eSAnirudh Venkataramanan u16 *q_handles, u16 *q_ids, u32 *q_teids, 4354bb87ee0eSAnirudh Venkataramanan enum ice_disq_rst_src rst_src, u16 vmvf_num, 4355ddf30f7fSAnirudh Venkataramanan struct ice_sq_cd *cd) 4356cdedef59SAnirudh Venkataramanan { 435766486d89SBruce Allan struct ice_aqc_dis_txq_item *qg_list; 4358bb87ee0eSAnirudh Venkataramanan struct ice_q_ctx *q_ctx; 43595518ac2aSTony Nguyen int status = -ENOENT; 436066486d89SBruce Allan struct ice_hw *hw; 436166486d89SBruce Allan u16 i, buf_size; 4362cdedef59SAnirudh Venkataramanan 4363cdedef59SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 4364d54699e2STony Nguyen return -EIO; 4365cdedef59SAnirudh Venkataramanan 436666486d89SBruce Allan hw = pi->hw; 436766486d89SBruce Allan 436885796d6eSAkeem G Abodunrin if (!num_queues) { 436985796d6eSAkeem G Abodunrin /* if queue is disabled already yet the disable queue command 437085796d6eSAkeem G Abodunrin * has to be sent to complete the VF reset, then call 437185796d6eSAkeem G Abodunrin * ice_aq_dis_lan_txq without any queue information 437285796d6eSAkeem G Abodunrin */ 437385796d6eSAkeem G Abodunrin if (rst_src) 437466486d89SBruce Allan return ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src, 437585796d6eSAkeem G Abodunrin vmvf_num, NULL); 4376d54699e2STony Nguyen return -EIO; 437785796d6eSAkeem G Abodunrin } 4378ddf30f7fSAnirudh Venkataramanan 437966486d89SBruce Allan buf_size = struct_size(qg_list, q_id, 1); 438066486d89SBruce Allan qg_list = kzalloc(buf_size, GFP_KERNEL); 438166486d89SBruce Allan if (!qg_list) 4382d54699e2STony Nguyen return -ENOMEM; 438366486d89SBruce Allan 4384cdedef59SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 4385cdedef59SAnirudh Venkataramanan 4386cdedef59SAnirudh Venkataramanan for (i = 0; i < num_queues; i++) { 4387cdedef59SAnirudh Venkataramanan struct ice_sched_node *node; 4388cdedef59SAnirudh Venkataramanan 4389cdedef59SAnirudh Venkataramanan node = ice_sched_find_node_by_teid(pi->root, q_teids[i]); 4390cdedef59SAnirudh Venkataramanan if (!node) 4391cdedef59SAnirudh Venkataramanan continue; 439266486d89SBruce Allan q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]); 4393bb87ee0eSAnirudh Venkataramanan if (!q_ctx) { 439466486d89SBruce Allan ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n", 4395bb87ee0eSAnirudh Venkataramanan q_handles[i]); 4396bb87ee0eSAnirudh Venkataramanan continue; 4397bb87ee0eSAnirudh Venkataramanan } 4398bb87ee0eSAnirudh Venkataramanan if (q_ctx->q_handle != q_handles[i]) { 439966486d89SBruce Allan ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n", 4400bb87ee0eSAnirudh Venkataramanan q_ctx->q_handle, q_handles[i]); 4401bb87ee0eSAnirudh Venkataramanan continue; 4402bb87ee0eSAnirudh Venkataramanan } 440366486d89SBruce Allan qg_list->parent_teid = node->info.parent_teid; 440466486d89SBruce Allan qg_list->num_qs = 1; 440566486d89SBruce Allan qg_list->q_id[0] = cpu_to_le16(q_ids[i]); 440666486d89SBruce Allan status = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src, 440766486d89SBruce Allan vmvf_num, cd); 4408cdedef59SAnirudh Venkataramanan 4409cdedef59SAnirudh Venkataramanan if (status) 4410cdedef59SAnirudh Venkataramanan break; 4411cdedef59SAnirudh Venkataramanan ice_free_sched_node(pi, node); 4412bb87ee0eSAnirudh Venkataramanan q_ctx->q_handle = ICE_INVAL_Q_HANDLE; 4413cdedef59SAnirudh Venkataramanan } 4414cdedef59SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 441566486d89SBruce Allan kfree(qg_list); 4416cdedef59SAnirudh Venkataramanan return status; 4417cdedef59SAnirudh Venkataramanan } 44185513b920SAnirudh Venkataramanan 44195513b920SAnirudh Venkataramanan /** 442094c4441bSAnirudh Venkataramanan * ice_cfg_vsi_qs - configure the new/existing VSI queues 44215513b920SAnirudh Venkataramanan * @pi: port information structure 44224fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 44235513b920SAnirudh Venkataramanan * @tc_bitmap: TC bitmap 44245513b920SAnirudh Venkataramanan * @maxqs: max queues array per TC 4425f9867df6SAnirudh Venkataramanan * @owner: LAN or RDMA 44265513b920SAnirudh Venkataramanan * 44275513b920SAnirudh Venkataramanan * This function adds/updates the VSI queues per TC. 44285513b920SAnirudh Venkataramanan */ 44295e24d598STony Nguyen static int 44304fb33f31SAnirudh Venkataramanan ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 44315513b920SAnirudh Venkataramanan u16 *maxqs, u8 owner) 44325513b920SAnirudh Venkataramanan { 44335e24d598STony Nguyen int status = 0; 44345513b920SAnirudh Venkataramanan u8 i; 44355513b920SAnirudh Venkataramanan 44365513b920SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 4437d54699e2STony Nguyen return -EIO; 44385513b920SAnirudh Venkataramanan 44394fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 4440d54699e2STony Nguyen return -EINVAL; 44414fb33f31SAnirudh Venkataramanan 44425513b920SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 44435513b920SAnirudh Venkataramanan 44442bdc97beSBruce Allan ice_for_each_traffic_class(i) { 44455513b920SAnirudh Venkataramanan /* configuration is possible only if TC node is present */ 44465513b920SAnirudh Venkataramanan if (!ice_sched_get_tc_node(pi, i)) 44475513b920SAnirudh Venkataramanan continue; 44485513b920SAnirudh Venkataramanan 44494fb33f31SAnirudh Venkataramanan status = ice_sched_cfg_vsi(pi, vsi_handle, i, maxqs[i], owner, 44505513b920SAnirudh Venkataramanan ice_is_tc_ena(tc_bitmap, i)); 44515513b920SAnirudh Venkataramanan if (status) 44525513b920SAnirudh Venkataramanan break; 44535513b920SAnirudh Venkataramanan } 44545513b920SAnirudh Venkataramanan 44555513b920SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 44565513b920SAnirudh Venkataramanan return status; 44575513b920SAnirudh Venkataramanan } 44585513b920SAnirudh Venkataramanan 44595513b920SAnirudh Venkataramanan /** 4460f9867df6SAnirudh Venkataramanan * ice_cfg_vsi_lan - configure VSI LAN queues 44615513b920SAnirudh Venkataramanan * @pi: port information structure 44624fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 44635513b920SAnirudh Venkataramanan * @tc_bitmap: TC bitmap 4464f9867df6SAnirudh Venkataramanan * @max_lanqs: max LAN queues array per TC 44655513b920SAnirudh Venkataramanan * 4466f9867df6SAnirudh Venkataramanan * This function adds/updates the VSI LAN queues per TC. 44675513b920SAnirudh Venkataramanan */ 44685e24d598STony Nguyen int 44694fb33f31SAnirudh Venkataramanan ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 44705513b920SAnirudh Venkataramanan u16 *max_lanqs) 44715513b920SAnirudh Venkataramanan { 44724fb33f31SAnirudh Venkataramanan return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_lanqs, 44735513b920SAnirudh Venkataramanan ICE_SCHED_NODE_OWNER_LAN); 44745513b920SAnirudh Venkataramanan } 447545d3d428SAnirudh Venkataramanan 447645d3d428SAnirudh Venkataramanan /** 4477348048e7SDave Ertman * ice_cfg_vsi_rdma - configure the VSI RDMA queues 4478348048e7SDave Ertman * @pi: port information structure 4479348048e7SDave Ertman * @vsi_handle: software VSI handle 4480348048e7SDave Ertman * @tc_bitmap: TC bitmap 4481348048e7SDave Ertman * @max_rdmaqs: max RDMA queues array per TC 4482348048e7SDave Ertman * 4483348048e7SDave Ertman * This function adds/updates the VSI RDMA queues per TC. 4484348048e7SDave Ertman */ 4485348048e7SDave Ertman int 4486348048e7SDave Ertman ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, 4487348048e7SDave Ertman u16 *max_rdmaqs) 4488348048e7SDave Ertman { 4489d54699e2STony Nguyen return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_rdmaqs, 4490d54699e2STony Nguyen ICE_SCHED_NODE_OWNER_RDMA); 4491348048e7SDave Ertman } 4492348048e7SDave Ertman 4493348048e7SDave Ertman /** 4494348048e7SDave Ertman * ice_ena_vsi_rdma_qset 4495348048e7SDave Ertman * @pi: port information structure 4496348048e7SDave Ertman * @vsi_handle: software VSI handle 4497348048e7SDave Ertman * @tc: TC number 4498348048e7SDave Ertman * @rdma_qset: pointer to RDMA Qset 4499348048e7SDave Ertman * @num_qsets: number of RDMA Qsets 4500348048e7SDave Ertman * @qset_teid: pointer to Qset node TEIDs 4501348048e7SDave Ertman * 4502348048e7SDave Ertman * This function adds RDMA Qset 4503348048e7SDave Ertman */ 4504348048e7SDave Ertman int 4505348048e7SDave Ertman ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 4506348048e7SDave Ertman u16 *rdma_qset, u16 num_qsets, u32 *qset_teid) 4507348048e7SDave Ertman { 4508348048e7SDave Ertman struct ice_aqc_txsched_elem_data node = { 0 }; 4509348048e7SDave Ertman struct ice_aqc_add_rdma_qset_data *buf; 4510348048e7SDave Ertman struct ice_sched_node *parent; 4511348048e7SDave Ertman struct ice_hw *hw; 4512348048e7SDave Ertman u16 i, buf_size; 4513348048e7SDave Ertman int ret; 4514348048e7SDave Ertman 4515348048e7SDave Ertman if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 4516348048e7SDave Ertman return -EIO; 4517348048e7SDave Ertman hw = pi->hw; 4518348048e7SDave Ertman 4519348048e7SDave Ertman if (!ice_is_vsi_valid(hw, vsi_handle)) 4520348048e7SDave Ertman return -EINVAL; 4521348048e7SDave Ertman 4522348048e7SDave Ertman buf_size = struct_size(buf, rdma_qsets, num_qsets); 4523348048e7SDave Ertman buf = kzalloc(buf_size, GFP_KERNEL); 4524348048e7SDave Ertman if (!buf) 4525348048e7SDave Ertman return -ENOMEM; 4526348048e7SDave Ertman mutex_lock(&pi->sched_lock); 4527348048e7SDave Ertman 4528348048e7SDave Ertman parent = ice_sched_get_free_qparent(pi, vsi_handle, tc, 4529348048e7SDave Ertman ICE_SCHED_NODE_OWNER_RDMA); 4530348048e7SDave Ertman if (!parent) { 4531348048e7SDave Ertman ret = -EINVAL; 4532348048e7SDave Ertman goto rdma_error_exit; 4533348048e7SDave Ertman } 4534348048e7SDave Ertman buf->parent_teid = parent->info.node_teid; 4535348048e7SDave Ertman node.parent_teid = parent->info.node_teid; 4536348048e7SDave Ertman 4537348048e7SDave Ertman buf->num_qsets = cpu_to_le16(num_qsets); 4538348048e7SDave Ertman for (i = 0; i < num_qsets; i++) { 4539348048e7SDave Ertman buf->rdma_qsets[i].tx_qset_id = cpu_to_le16(rdma_qset[i]); 4540348048e7SDave Ertman buf->rdma_qsets[i].info.valid_sections = 4541348048e7SDave Ertman ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR | 4542348048e7SDave Ertman ICE_AQC_ELEM_VALID_EIR; 4543348048e7SDave Ertman buf->rdma_qsets[i].info.generic = 0; 4544348048e7SDave Ertman buf->rdma_qsets[i].info.cir_bw.bw_profile_idx = 4545348048e7SDave Ertman cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 4546348048e7SDave Ertman buf->rdma_qsets[i].info.cir_bw.bw_alloc = 4547348048e7SDave Ertman cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 4548348048e7SDave Ertman buf->rdma_qsets[i].info.eir_bw.bw_profile_idx = 4549348048e7SDave Ertman cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 4550348048e7SDave Ertman buf->rdma_qsets[i].info.eir_bw.bw_alloc = 4551348048e7SDave Ertman cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 4552348048e7SDave Ertman } 4553348048e7SDave Ertman ret = ice_aq_add_rdma_qsets(hw, 1, buf, buf_size, NULL); 4554348048e7SDave Ertman if (ret) { 4555348048e7SDave Ertman ice_debug(hw, ICE_DBG_RDMA, "add RDMA qset failed\n"); 4556348048e7SDave Ertman goto rdma_error_exit; 4557348048e7SDave Ertman } 4558348048e7SDave Ertman node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF; 4559348048e7SDave Ertman for (i = 0; i < num_qsets; i++) { 4560348048e7SDave Ertman node.node_teid = buf->rdma_qsets[i].qset_teid; 45612ccc1c1cSTony Nguyen ret = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, 4562348048e7SDave Ertman &node); 45632ccc1c1cSTony Nguyen if (ret) 4564348048e7SDave Ertman break; 4565348048e7SDave Ertman qset_teid[i] = le32_to_cpu(node.node_teid); 4566348048e7SDave Ertman } 4567348048e7SDave Ertman rdma_error_exit: 4568348048e7SDave Ertman mutex_unlock(&pi->sched_lock); 4569348048e7SDave Ertman kfree(buf); 4570348048e7SDave Ertman return ret; 4571348048e7SDave Ertman } 4572348048e7SDave Ertman 4573348048e7SDave Ertman /** 4574348048e7SDave Ertman * ice_dis_vsi_rdma_qset - free RDMA resources 4575348048e7SDave Ertman * @pi: port_info struct 4576348048e7SDave Ertman * @count: number of RDMA Qsets to free 4577348048e7SDave Ertman * @qset_teid: TEID of Qset node 4578348048e7SDave Ertman * @q_id: list of queue IDs being disabled 4579348048e7SDave Ertman */ 4580348048e7SDave Ertman int 4581348048e7SDave Ertman ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, 4582348048e7SDave Ertman u16 *q_id) 4583348048e7SDave Ertman { 4584348048e7SDave Ertman struct ice_aqc_dis_txq_item *qg_list; 4585348048e7SDave Ertman struct ice_hw *hw; 45865518ac2aSTony Nguyen int status = 0; 4587348048e7SDave Ertman u16 qg_size; 4588348048e7SDave Ertman int i; 4589348048e7SDave Ertman 4590348048e7SDave Ertman if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 4591348048e7SDave Ertman return -EIO; 4592348048e7SDave Ertman 4593348048e7SDave Ertman hw = pi->hw; 4594348048e7SDave Ertman 4595348048e7SDave Ertman qg_size = struct_size(qg_list, q_id, 1); 4596348048e7SDave Ertman qg_list = kzalloc(qg_size, GFP_KERNEL); 4597348048e7SDave Ertman if (!qg_list) 4598348048e7SDave Ertman return -ENOMEM; 4599348048e7SDave Ertman 4600348048e7SDave Ertman mutex_lock(&pi->sched_lock); 4601348048e7SDave Ertman 4602348048e7SDave Ertman for (i = 0; i < count; i++) { 4603348048e7SDave Ertman struct ice_sched_node *node; 4604348048e7SDave Ertman 4605348048e7SDave Ertman node = ice_sched_find_node_by_teid(pi->root, qset_teid[i]); 4606348048e7SDave Ertman if (!node) 4607348048e7SDave Ertman continue; 4608348048e7SDave Ertman 4609348048e7SDave Ertman qg_list->parent_teid = node->info.parent_teid; 4610348048e7SDave Ertman qg_list->num_qs = 1; 4611348048e7SDave Ertman qg_list->q_id[0] = 4612348048e7SDave Ertman cpu_to_le16(q_id[i] | 4613348048e7SDave Ertman ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET); 4614348048e7SDave Ertman 4615348048e7SDave Ertman status = ice_aq_dis_lan_txq(hw, 1, qg_list, qg_size, 4616348048e7SDave Ertman ICE_NO_RESET, 0, NULL); 4617348048e7SDave Ertman if (status) 4618348048e7SDave Ertman break; 4619348048e7SDave Ertman 4620348048e7SDave Ertman ice_free_sched_node(pi, node); 4621348048e7SDave Ertman } 4622348048e7SDave Ertman 4623348048e7SDave Ertman mutex_unlock(&pi->sched_lock); 4624348048e7SDave Ertman kfree(qg_list); 4625d54699e2STony Nguyen return status; 4626348048e7SDave Ertman } 4627348048e7SDave Ertman 4628348048e7SDave Ertman /** 4629334cb062SAnirudh Venkataramanan * ice_replay_pre_init - replay pre initialization 4630f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 4631334cb062SAnirudh Venkataramanan * 4632334cb062SAnirudh Venkataramanan * Initializes required config data for VSI, FD, ACL, and RSS before replay. 4633334cb062SAnirudh Venkataramanan */ 46345e24d598STony Nguyen static int ice_replay_pre_init(struct ice_hw *hw) 4635334cb062SAnirudh Venkataramanan { 4636334cb062SAnirudh Venkataramanan struct ice_switch_info *sw = hw->switch_info; 4637334cb062SAnirudh Venkataramanan u8 i; 4638334cb062SAnirudh Venkataramanan 4639334cb062SAnirudh Venkataramanan /* Delete old entries from replay filter list head if there is any */ 4640334cb062SAnirudh Venkataramanan ice_rm_all_sw_replay_rule_info(hw); 4641334cb062SAnirudh Venkataramanan /* In start of replay, move entries into replay_rules list, it 4642334cb062SAnirudh Venkataramanan * will allow adding rules entries back to filt_rules list, 4643334cb062SAnirudh Venkataramanan * which is operational list. 4644334cb062SAnirudh Venkataramanan */ 4645c36a2b97SVictor Raj for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) 4646334cb062SAnirudh Venkataramanan list_replace_init(&sw->recp_list[i].filt_rules, 4647334cb062SAnirudh Venkataramanan &sw->recp_list[i].filt_replay_rules); 4648b126bd6bSKiran Patil ice_sched_replay_agg_vsi_preinit(hw); 4649334cb062SAnirudh Venkataramanan 4650334cb062SAnirudh Venkataramanan return 0; 4651334cb062SAnirudh Venkataramanan } 4652334cb062SAnirudh Venkataramanan 4653334cb062SAnirudh Venkataramanan /** 4654334cb062SAnirudh Venkataramanan * ice_replay_vsi - replay VSI configuration 4655f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 4656334cb062SAnirudh Venkataramanan * @vsi_handle: driver VSI handle 4657334cb062SAnirudh Venkataramanan * 4658334cb062SAnirudh Venkataramanan * Restore all VSI configuration after reset. It is required to call this 4659334cb062SAnirudh Venkataramanan * function with main VSI first. 4660334cb062SAnirudh Venkataramanan */ 46615e24d598STony Nguyen int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle) 4662334cb062SAnirudh Venkataramanan { 46635e24d598STony Nguyen int status; 4664334cb062SAnirudh Venkataramanan 4665334cb062SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle)) 4666d54699e2STony Nguyen return -EINVAL; 4667334cb062SAnirudh Venkataramanan 4668334cb062SAnirudh Venkataramanan /* Replay pre-initialization if there is any */ 4669334cb062SAnirudh Venkataramanan if (vsi_handle == ICE_MAIN_VSI_HANDLE) { 4670334cb062SAnirudh Venkataramanan status = ice_replay_pre_init(hw); 4671334cb062SAnirudh Venkataramanan if (status) 4672334cb062SAnirudh Venkataramanan return status; 4673334cb062SAnirudh Venkataramanan } 4674c90ed40cSTony Nguyen /* Replay per VSI all RSS configurations */ 4675c90ed40cSTony Nguyen status = ice_replay_rss_cfg(hw, vsi_handle); 4676c90ed40cSTony Nguyen if (status) 4677c90ed40cSTony Nguyen return status; 4678334cb062SAnirudh Venkataramanan /* Replay per VSI all filters */ 4679334cb062SAnirudh Venkataramanan status = ice_replay_vsi_all_fltr(hw, vsi_handle); 4680b126bd6bSKiran Patil if (!status) 4681b126bd6bSKiran Patil status = ice_replay_vsi_agg(hw, vsi_handle); 4682334cb062SAnirudh Venkataramanan return status; 4683334cb062SAnirudh Venkataramanan } 4684334cb062SAnirudh Venkataramanan 4685334cb062SAnirudh Venkataramanan /** 4686334cb062SAnirudh Venkataramanan * ice_replay_post - post replay configuration cleanup 4687f9867df6SAnirudh Venkataramanan * @hw: pointer to the HW struct 4688334cb062SAnirudh Venkataramanan * 4689334cb062SAnirudh Venkataramanan * Post replay cleanup. 4690334cb062SAnirudh Venkataramanan */ 4691334cb062SAnirudh Venkataramanan void ice_replay_post(struct ice_hw *hw) 4692334cb062SAnirudh Venkataramanan { 4693334cb062SAnirudh Venkataramanan /* Delete old entries from replay filter list head */ 4694334cb062SAnirudh Venkataramanan ice_rm_all_sw_replay_rule_info(hw); 4695b126bd6bSKiran Patil ice_sched_replay_agg(hw); 4696334cb062SAnirudh Venkataramanan } 4697334cb062SAnirudh Venkataramanan 4698334cb062SAnirudh Venkataramanan /** 469945d3d428SAnirudh Venkataramanan * ice_stat_update40 - read 40 bit stat from the chip and update stat values 470045d3d428SAnirudh Venkataramanan * @hw: ptr to the hardware info 470136517fd3SJacob Keller * @reg: offset of 64 bit HW register to read from 470245d3d428SAnirudh Venkataramanan * @prev_stat_loaded: bool to specify if previous stats are loaded 470345d3d428SAnirudh Venkataramanan * @prev_stat: ptr to previous loaded stat value 470445d3d428SAnirudh Venkataramanan * @cur_stat: ptr to current stat value 470545d3d428SAnirudh Venkataramanan */ 4706c8b7abddSBruce Allan void 470736517fd3SJacob Keller ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 470836517fd3SJacob Keller u64 *prev_stat, u64 *cur_stat) 470945d3d428SAnirudh Venkataramanan { 471036517fd3SJacob Keller u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1); 471145d3d428SAnirudh Venkataramanan 471245d3d428SAnirudh Venkataramanan /* device stats are not reset at PFR, they likely will not be zeroed 471336517fd3SJacob Keller * when the driver starts. Thus, save the value from the first read 471436517fd3SJacob Keller * without adding to the statistic value so that we report stats which 471536517fd3SJacob Keller * count up from zero. 471645d3d428SAnirudh Venkataramanan */ 471736517fd3SJacob Keller if (!prev_stat_loaded) { 471845d3d428SAnirudh Venkataramanan *prev_stat = new_data; 471936517fd3SJacob Keller return; 472036517fd3SJacob Keller } 472136517fd3SJacob Keller 472236517fd3SJacob Keller /* Calculate the difference between the new and old values, and then 472336517fd3SJacob Keller * add it to the software stat value. 472436517fd3SJacob Keller */ 472545d3d428SAnirudh Venkataramanan if (new_data >= *prev_stat) 472636517fd3SJacob Keller *cur_stat += new_data - *prev_stat; 472745d3d428SAnirudh Venkataramanan else 472845d3d428SAnirudh Venkataramanan /* to manage the potential roll-over */ 472936517fd3SJacob Keller *cur_stat += (new_data + BIT_ULL(40)) - *prev_stat; 473036517fd3SJacob Keller 473136517fd3SJacob Keller /* Update the previously stored value to prepare for next read */ 473236517fd3SJacob Keller *prev_stat = new_data; 473345d3d428SAnirudh Venkataramanan } 473445d3d428SAnirudh Venkataramanan 473545d3d428SAnirudh Venkataramanan /** 473645d3d428SAnirudh Venkataramanan * ice_stat_update32 - read 32 bit stat from the chip and update stat values 473745d3d428SAnirudh Venkataramanan * @hw: ptr to the hardware info 473836517fd3SJacob Keller * @reg: offset of HW register to read from 473945d3d428SAnirudh Venkataramanan * @prev_stat_loaded: bool to specify if previous stats are loaded 474045d3d428SAnirudh Venkataramanan * @prev_stat: ptr to previous loaded stat value 474145d3d428SAnirudh Venkataramanan * @cur_stat: ptr to current stat value 474245d3d428SAnirudh Venkataramanan */ 4743c8b7abddSBruce Allan void 4744c8b7abddSBruce Allan ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 474545d3d428SAnirudh Venkataramanan u64 *prev_stat, u64 *cur_stat) 474645d3d428SAnirudh Venkataramanan { 474745d3d428SAnirudh Venkataramanan u32 new_data; 474845d3d428SAnirudh Venkataramanan 474945d3d428SAnirudh Venkataramanan new_data = rd32(hw, reg); 475045d3d428SAnirudh Venkataramanan 475145d3d428SAnirudh Venkataramanan /* device stats are not reset at PFR, they likely will not be zeroed 475236517fd3SJacob Keller * when the driver starts. Thus, save the value from the first read 475336517fd3SJacob Keller * without adding to the statistic value so that we report stats which 475436517fd3SJacob Keller * count up from zero. 475545d3d428SAnirudh Venkataramanan */ 475636517fd3SJacob Keller if (!prev_stat_loaded) { 475745d3d428SAnirudh Venkataramanan *prev_stat = new_data; 475836517fd3SJacob Keller return; 475936517fd3SJacob Keller } 476036517fd3SJacob Keller 476136517fd3SJacob Keller /* Calculate the difference between the new and old values, and then 476236517fd3SJacob Keller * add it to the software stat value. 476336517fd3SJacob Keller */ 476445d3d428SAnirudh Venkataramanan if (new_data >= *prev_stat) 476536517fd3SJacob Keller *cur_stat += new_data - *prev_stat; 476645d3d428SAnirudh Venkataramanan else 476745d3d428SAnirudh Venkataramanan /* to manage the potential roll-over */ 476836517fd3SJacob Keller *cur_stat += (new_data + BIT_ULL(32)) - *prev_stat; 476936517fd3SJacob Keller 477036517fd3SJacob Keller /* Update the previously stored value to prepare for next read */ 477136517fd3SJacob Keller *prev_stat = new_data; 477245d3d428SAnirudh Venkataramanan } 47737b9ffc76SAnirudh Venkataramanan 47747b9ffc76SAnirudh Venkataramanan /** 47757b9ffc76SAnirudh Venkataramanan * ice_sched_query_elem - query element information from HW 47767b9ffc76SAnirudh Venkataramanan * @hw: pointer to the HW struct 47777b9ffc76SAnirudh Venkataramanan * @node_teid: node TEID to be queried 47787b9ffc76SAnirudh Venkataramanan * @buf: buffer to element information 47797b9ffc76SAnirudh Venkataramanan * 47807b9ffc76SAnirudh Venkataramanan * This function queries HW element information 47817b9ffc76SAnirudh Venkataramanan */ 47825e24d598STony Nguyen int 47837b9ffc76SAnirudh Venkataramanan ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, 4784b3c38904SBruce Allan struct ice_aqc_txsched_elem_data *buf) 47857b9ffc76SAnirudh Venkataramanan { 47867b9ffc76SAnirudh Venkataramanan u16 buf_size, num_elem_ret = 0; 47875e24d598STony Nguyen int status; 47887b9ffc76SAnirudh Venkataramanan 47897b9ffc76SAnirudh Venkataramanan buf_size = sizeof(*buf); 47907b9ffc76SAnirudh Venkataramanan memset(buf, 0, buf_size); 4791b3c38904SBruce Allan buf->node_teid = cpu_to_le32(node_teid); 47927b9ffc76SAnirudh Venkataramanan status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret, 47937b9ffc76SAnirudh Venkataramanan NULL); 47947b9ffc76SAnirudh Venkataramanan if (status || num_elem_ret != 1) 47957b9ffc76SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "query element failed\n"); 47967b9ffc76SAnirudh Venkataramanan return status; 47977b9ffc76SAnirudh Venkataramanan } 4798ea78ce4dSPaul Greenwalt 4799ea78ce4dSPaul Greenwalt /** 48007f9ab54dSJacob Keller * ice_aq_set_driver_param - Set driver parameter to share via firmware 48017f9ab54dSJacob Keller * @hw: pointer to the HW struct 48027f9ab54dSJacob Keller * @idx: parameter index to set 48037f9ab54dSJacob Keller * @value: the value to set the parameter to 48047f9ab54dSJacob Keller * @cd: pointer to command details structure or NULL 48057f9ab54dSJacob Keller * 48067f9ab54dSJacob Keller * Set the value of one of the software defined parameters. All PFs connected 48077f9ab54dSJacob Keller * to this device can read the value using ice_aq_get_driver_param. 48087f9ab54dSJacob Keller * 48097f9ab54dSJacob Keller * Note that firmware provides no synchronization or locking, and will not 48107f9ab54dSJacob Keller * save the parameter value during a device reset. It is expected that 48117f9ab54dSJacob Keller * a single PF will write the parameter value, while all other PFs will only 48127f9ab54dSJacob Keller * read it. 48137f9ab54dSJacob Keller */ 48147f9ab54dSJacob Keller int 48157f9ab54dSJacob Keller ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 48167f9ab54dSJacob Keller u32 value, struct ice_sq_cd *cd) 48177f9ab54dSJacob Keller { 48187f9ab54dSJacob Keller struct ice_aqc_driver_shared_params *cmd; 48197f9ab54dSJacob Keller struct ice_aq_desc desc; 48207f9ab54dSJacob Keller 48217f9ab54dSJacob Keller if (idx >= ICE_AQC_DRIVER_PARAM_MAX) 48227f9ab54dSJacob Keller return -EIO; 48237f9ab54dSJacob Keller 48247f9ab54dSJacob Keller cmd = &desc.params.drv_shared_params; 48257f9ab54dSJacob Keller 48267f9ab54dSJacob Keller ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params); 48277f9ab54dSJacob Keller 48287f9ab54dSJacob Keller cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_SET; 48297f9ab54dSJacob Keller cmd->param_indx = idx; 48307f9ab54dSJacob Keller cmd->param_val = cpu_to_le32(value); 48317f9ab54dSJacob Keller 4832d54699e2STony Nguyen return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 48337f9ab54dSJacob Keller } 48347f9ab54dSJacob Keller 48357f9ab54dSJacob Keller /** 48367f9ab54dSJacob Keller * ice_aq_get_driver_param - Get driver parameter shared via firmware 48377f9ab54dSJacob Keller * @hw: pointer to the HW struct 48387f9ab54dSJacob Keller * @idx: parameter index to set 48397f9ab54dSJacob Keller * @value: storage to return the shared parameter 48407f9ab54dSJacob Keller * @cd: pointer to command details structure or NULL 48417f9ab54dSJacob Keller * 48427f9ab54dSJacob Keller * Get the value of one of the software defined parameters. 48437f9ab54dSJacob Keller * 48447f9ab54dSJacob Keller * Note that firmware provides no synchronization or locking. It is expected 48457f9ab54dSJacob Keller * that only a single PF will write a given parameter. 48467f9ab54dSJacob Keller */ 48477f9ab54dSJacob Keller int 48487f9ab54dSJacob Keller ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx, 48497f9ab54dSJacob Keller u32 *value, struct ice_sq_cd *cd) 48507f9ab54dSJacob Keller { 48517f9ab54dSJacob Keller struct ice_aqc_driver_shared_params *cmd; 48527f9ab54dSJacob Keller struct ice_aq_desc desc; 48535e24d598STony Nguyen int status; 48547f9ab54dSJacob Keller 48557f9ab54dSJacob Keller if (idx >= ICE_AQC_DRIVER_PARAM_MAX) 48567f9ab54dSJacob Keller return -EIO; 48577f9ab54dSJacob Keller 48587f9ab54dSJacob Keller cmd = &desc.params.drv_shared_params; 48597f9ab54dSJacob Keller 48607f9ab54dSJacob Keller ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params); 48617f9ab54dSJacob Keller 48627f9ab54dSJacob Keller cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_GET; 48637f9ab54dSJacob Keller cmd->param_indx = idx; 48647f9ab54dSJacob Keller 48657f9ab54dSJacob Keller status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 48667f9ab54dSJacob Keller if (status) 4867d54699e2STony Nguyen return status; 48687f9ab54dSJacob Keller 48697f9ab54dSJacob Keller *value = le32_to_cpu(cmd->param_val); 48707f9ab54dSJacob Keller 48717f9ab54dSJacob Keller return 0; 48727f9ab54dSJacob Keller } 48737f9ab54dSJacob Keller 48747f9ab54dSJacob Keller /** 48753bb6324bSMaciej Machnikowski * ice_aq_set_gpio 48763bb6324bSMaciej Machnikowski * @hw: pointer to the hw struct 48773bb6324bSMaciej Machnikowski * @gpio_ctrl_handle: GPIO controller node handle 48783bb6324bSMaciej Machnikowski * @pin_idx: IO Number of the GPIO that needs to be set 48793bb6324bSMaciej Machnikowski * @value: SW provide IO value to set in the LSB 48803bb6324bSMaciej Machnikowski * @cd: pointer to command details structure or NULL 48813bb6324bSMaciej Machnikowski * 48823bb6324bSMaciej Machnikowski * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology 48833bb6324bSMaciej Machnikowski */ 48843bb6324bSMaciej Machnikowski int 48853bb6324bSMaciej Machnikowski ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, 48863bb6324bSMaciej Machnikowski struct ice_sq_cd *cd) 48873bb6324bSMaciej Machnikowski { 48883bb6324bSMaciej Machnikowski struct ice_aqc_gpio *cmd; 48893bb6324bSMaciej Machnikowski struct ice_aq_desc desc; 48903bb6324bSMaciej Machnikowski 48913bb6324bSMaciej Machnikowski ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio); 48923bb6324bSMaciej Machnikowski cmd = &desc.params.read_write_gpio; 48933bb6324bSMaciej Machnikowski cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); 48943bb6324bSMaciej Machnikowski cmd->gpio_num = pin_idx; 48953bb6324bSMaciej Machnikowski cmd->gpio_val = value ? 1 : 0; 48963bb6324bSMaciej Machnikowski 4897d54699e2STony Nguyen return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 48983bb6324bSMaciej Machnikowski } 48993bb6324bSMaciej Machnikowski 49003bb6324bSMaciej Machnikowski /** 49013bb6324bSMaciej Machnikowski * ice_aq_get_gpio 49023bb6324bSMaciej Machnikowski * @hw: pointer to the hw struct 49033bb6324bSMaciej Machnikowski * @gpio_ctrl_handle: GPIO controller node handle 49043bb6324bSMaciej Machnikowski * @pin_idx: IO Number of the GPIO that needs to be set 49053bb6324bSMaciej Machnikowski * @value: IO value read 49063bb6324bSMaciej Machnikowski * @cd: pointer to command details structure or NULL 49073bb6324bSMaciej Machnikowski * 49083bb6324bSMaciej Machnikowski * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of 49093bb6324bSMaciej Machnikowski * the topology 49103bb6324bSMaciej Machnikowski */ 49113bb6324bSMaciej Machnikowski int 49123bb6324bSMaciej Machnikowski ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 49133bb6324bSMaciej Machnikowski bool *value, struct ice_sq_cd *cd) 49143bb6324bSMaciej Machnikowski { 49153bb6324bSMaciej Machnikowski struct ice_aqc_gpio *cmd; 49163bb6324bSMaciej Machnikowski struct ice_aq_desc desc; 49175e24d598STony Nguyen int status; 49183bb6324bSMaciej Machnikowski 49193bb6324bSMaciej Machnikowski ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio); 49203bb6324bSMaciej Machnikowski cmd = &desc.params.read_write_gpio; 49213bb6324bSMaciej Machnikowski cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); 49223bb6324bSMaciej Machnikowski cmd->gpio_num = pin_idx; 49233bb6324bSMaciej Machnikowski 49243bb6324bSMaciej Machnikowski status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 49253bb6324bSMaciej Machnikowski if (status) 4926d54699e2STony Nguyen return status; 49273bb6324bSMaciej Machnikowski 49283bb6324bSMaciej Machnikowski *value = !!cmd->gpio_val; 49293bb6324bSMaciej Machnikowski return 0; 49303bb6324bSMaciej Machnikowski } 49313bb6324bSMaciej Machnikowski 49323bb6324bSMaciej Machnikowski /** 4933ea78ce4dSPaul Greenwalt * ice_fw_supports_link_override 4934ea78ce4dSPaul Greenwalt * @hw: pointer to the hardware structure 4935ea78ce4dSPaul Greenwalt * 4936ea78ce4dSPaul Greenwalt * Checks if the firmware supports link override 4937ea78ce4dSPaul Greenwalt */ 4938ea78ce4dSPaul Greenwalt bool ice_fw_supports_link_override(struct ice_hw *hw) 4939ea78ce4dSPaul Greenwalt { 4940ea78ce4dSPaul Greenwalt if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) { 4941ea78ce4dSPaul Greenwalt if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN) 4942ea78ce4dSPaul Greenwalt return true; 4943ea78ce4dSPaul Greenwalt if (hw->api_min_ver == ICE_FW_API_LINK_OVERRIDE_MIN && 4944ea78ce4dSPaul Greenwalt hw->api_patch >= ICE_FW_API_LINK_OVERRIDE_PATCH) 4945ea78ce4dSPaul Greenwalt return true; 4946ea78ce4dSPaul Greenwalt } else if (hw->api_maj_ver > ICE_FW_API_LINK_OVERRIDE_MAJ) { 4947ea78ce4dSPaul Greenwalt return true; 4948ea78ce4dSPaul Greenwalt } 4949ea78ce4dSPaul Greenwalt 4950ea78ce4dSPaul Greenwalt return false; 4951ea78ce4dSPaul Greenwalt } 4952ea78ce4dSPaul Greenwalt 4953ea78ce4dSPaul Greenwalt /** 4954ea78ce4dSPaul Greenwalt * ice_get_link_default_override 4955ea78ce4dSPaul Greenwalt * @ldo: pointer to the link default override struct 4956ea78ce4dSPaul Greenwalt * @pi: pointer to the port info struct 4957ea78ce4dSPaul Greenwalt * 4958ea78ce4dSPaul Greenwalt * Gets the link default override for a port 4959ea78ce4dSPaul Greenwalt */ 49605e24d598STony Nguyen int 4961ea78ce4dSPaul Greenwalt ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, 4962ea78ce4dSPaul Greenwalt struct ice_port_info *pi) 4963ea78ce4dSPaul Greenwalt { 4964ea78ce4dSPaul Greenwalt u16 i, tlv, tlv_len, tlv_start, buf, offset; 4965ea78ce4dSPaul Greenwalt struct ice_hw *hw = pi->hw; 49665e24d598STony Nguyen int status; 4967ea78ce4dSPaul Greenwalt 4968ea78ce4dSPaul Greenwalt status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len, 4969ea78ce4dSPaul Greenwalt ICE_SR_LINK_DEFAULT_OVERRIDE_PTR); 4970ea78ce4dSPaul Greenwalt if (status) { 49719228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n"); 4972ea78ce4dSPaul Greenwalt return status; 4973ea78ce4dSPaul Greenwalt } 4974ea78ce4dSPaul Greenwalt 4975ea78ce4dSPaul Greenwalt /* Each port has its own config; calculate for our port */ 4976ea78ce4dSPaul Greenwalt tlv_start = tlv + pi->lport * ICE_SR_PFA_LINK_OVERRIDE_WORDS + 4977ea78ce4dSPaul Greenwalt ICE_SR_PFA_LINK_OVERRIDE_OFFSET; 4978ea78ce4dSPaul Greenwalt 4979ea78ce4dSPaul Greenwalt /* link options first */ 4980ea78ce4dSPaul Greenwalt status = ice_read_sr_word(hw, tlv_start, &buf); 4981ea78ce4dSPaul Greenwalt if (status) { 49829228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); 4983ea78ce4dSPaul Greenwalt return status; 4984ea78ce4dSPaul Greenwalt } 4985ea78ce4dSPaul Greenwalt ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M; 4986ea78ce4dSPaul Greenwalt ldo->phy_config = (buf & ICE_LINK_OVERRIDE_PHY_CFG_M) >> 4987ea78ce4dSPaul Greenwalt ICE_LINK_OVERRIDE_PHY_CFG_S; 4988ea78ce4dSPaul Greenwalt 4989ea78ce4dSPaul Greenwalt /* link PHY config */ 4990ea78ce4dSPaul Greenwalt offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET; 4991ea78ce4dSPaul Greenwalt status = ice_read_sr_word(hw, offset, &buf); 4992ea78ce4dSPaul Greenwalt if (status) { 49939228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n"); 4994ea78ce4dSPaul Greenwalt return status; 4995ea78ce4dSPaul Greenwalt } 4996ea78ce4dSPaul Greenwalt ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M; 4997ea78ce4dSPaul Greenwalt 4998ea78ce4dSPaul Greenwalt /* PHY types low */ 4999ea78ce4dSPaul Greenwalt offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET; 5000ea78ce4dSPaul Greenwalt for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) { 5001ea78ce4dSPaul Greenwalt status = ice_read_sr_word(hw, (offset + i), &buf); 5002ea78ce4dSPaul Greenwalt if (status) { 50039228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); 5004ea78ce4dSPaul Greenwalt return status; 5005ea78ce4dSPaul Greenwalt } 5006ea78ce4dSPaul Greenwalt /* shift 16 bits at a time to fill 64 bits */ 5007ea78ce4dSPaul Greenwalt ldo->phy_type_low |= ((u64)buf << (i * 16)); 5008ea78ce4dSPaul Greenwalt } 5009ea78ce4dSPaul Greenwalt 5010ea78ce4dSPaul Greenwalt /* PHY types high */ 5011ea78ce4dSPaul Greenwalt offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET + 5012ea78ce4dSPaul Greenwalt ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; 5013ea78ce4dSPaul Greenwalt for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) { 5014ea78ce4dSPaul Greenwalt status = ice_read_sr_word(hw, (offset + i), &buf); 5015ea78ce4dSPaul Greenwalt if (status) { 50169228d8b2SJacob Keller ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); 5017ea78ce4dSPaul Greenwalt return status; 5018ea78ce4dSPaul Greenwalt } 5019ea78ce4dSPaul Greenwalt /* shift 16 bits at a time to fill 64 bits */ 5020ea78ce4dSPaul Greenwalt ldo->phy_type_high |= ((u64)buf << (i * 16)); 5021ea78ce4dSPaul Greenwalt } 5022ea78ce4dSPaul Greenwalt 5023ea78ce4dSPaul Greenwalt return status; 5024ea78ce4dSPaul Greenwalt } 50255ee30564SPaul Greenwalt 50265ee30564SPaul Greenwalt /** 50275ee30564SPaul Greenwalt * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled 50285ee30564SPaul Greenwalt * @caps: get PHY capability data 50295ee30564SPaul Greenwalt */ 50305ee30564SPaul Greenwalt bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps) 50315ee30564SPaul Greenwalt { 50325ee30564SPaul Greenwalt if (caps->caps & ICE_AQC_PHY_AN_MODE || 5033bdeff971SLev Faerman caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 | 50345ee30564SPaul Greenwalt ICE_AQC_PHY_AN_EN_CLAUSE73 | 50355ee30564SPaul Greenwalt ICE_AQC_PHY_AN_EN_CLAUSE37)) 50365ee30564SPaul Greenwalt return true; 50375ee30564SPaul Greenwalt 50385ee30564SPaul Greenwalt return false; 50395ee30564SPaul Greenwalt } 50407d9c9b79SDave Ertman 50417d9c9b79SDave Ertman /** 50427d9c9b79SDave Ertman * ice_aq_set_lldp_mib - Set the LLDP MIB 50437d9c9b79SDave Ertman * @hw: pointer to the HW struct 50447d9c9b79SDave Ertman * @mib_type: Local, Remote or both Local and Remote MIBs 50457d9c9b79SDave Ertman * @buf: pointer to the caller-supplied buffer to store the MIB block 50467d9c9b79SDave Ertman * @buf_size: size of the buffer (in bytes) 50477d9c9b79SDave Ertman * @cd: pointer to command details structure or NULL 50487d9c9b79SDave Ertman * 50497d9c9b79SDave Ertman * Set the LLDP MIB. (0x0A08) 50507d9c9b79SDave Ertman */ 50515e24d598STony Nguyen int 50527d9c9b79SDave Ertman ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, 50537d9c9b79SDave Ertman struct ice_sq_cd *cd) 50547d9c9b79SDave Ertman { 50557d9c9b79SDave Ertman struct ice_aqc_lldp_set_local_mib *cmd; 50567d9c9b79SDave Ertman struct ice_aq_desc desc; 50577d9c9b79SDave Ertman 50587d9c9b79SDave Ertman cmd = &desc.params.lldp_set_mib; 50597d9c9b79SDave Ertman 50607d9c9b79SDave Ertman if (buf_size == 0 || !buf) 5061d54699e2STony Nguyen return -EINVAL; 50627d9c9b79SDave Ertman 50637d9c9b79SDave Ertman ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib); 50647d9c9b79SDave Ertman 50657d9c9b79SDave Ertman desc.flags |= cpu_to_le16((u16)ICE_AQ_FLAG_RD); 50667d9c9b79SDave Ertman desc.datalen = cpu_to_le16(buf_size); 50677d9c9b79SDave Ertman 50687d9c9b79SDave Ertman cmd->type = mib_type; 50697d9c9b79SDave Ertman cmd->length = cpu_to_le16(buf_size); 50707d9c9b79SDave Ertman 50717d9c9b79SDave Ertman return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 50727d9c9b79SDave Ertman } 507334295a36SDave Ertman 507434295a36SDave Ertman /** 5075ef860480STony Nguyen * ice_fw_supports_lldp_fltr_ctrl - check NVM version supports lldp_fltr_ctrl 507634295a36SDave Ertman * @hw: pointer to HW struct 507734295a36SDave Ertman */ 507834295a36SDave Ertman bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw) 507934295a36SDave Ertman { 508034295a36SDave Ertman if (hw->mac_type != ICE_MAC_E810) 508134295a36SDave Ertman return false; 508234295a36SDave Ertman 508334295a36SDave Ertman if (hw->api_maj_ver == ICE_FW_API_LLDP_FLTR_MAJ) { 508434295a36SDave Ertman if (hw->api_min_ver > ICE_FW_API_LLDP_FLTR_MIN) 508534295a36SDave Ertman return true; 508634295a36SDave Ertman if (hw->api_min_ver == ICE_FW_API_LLDP_FLTR_MIN && 508734295a36SDave Ertman hw->api_patch >= ICE_FW_API_LLDP_FLTR_PATCH) 508834295a36SDave Ertman return true; 508934295a36SDave Ertman } else if (hw->api_maj_ver > ICE_FW_API_LLDP_FLTR_MAJ) { 509034295a36SDave Ertman return true; 509134295a36SDave Ertman } 509234295a36SDave Ertman return false; 509334295a36SDave Ertman } 509434295a36SDave Ertman 509534295a36SDave Ertman /** 509634295a36SDave Ertman * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter 509734295a36SDave Ertman * @hw: pointer to HW struct 509834295a36SDave Ertman * @vsi_num: absolute HW index for VSI 509934295a36SDave Ertman * @add: boolean for if adding or removing a filter 510034295a36SDave Ertman */ 51015e24d598STony Nguyen int 510234295a36SDave Ertman ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add) 510334295a36SDave Ertman { 510434295a36SDave Ertman struct ice_aqc_lldp_filter_ctrl *cmd; 510534295a36SDave Ertman struct ice_aq_desc desc; 510634295a36SDave Ertman 510734295a36SDave Ertman cmd = &desc.params.lldp_filter_ctrl; 510834295a36SDave Ertman 510934295a36SDave Ertman ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_filter_ctrl); 511034295a36SDave Ertman 511134295a36SDave Ertman if (add) 511234295a36SDave Ertman cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD; 511334295a36SDave Ertman else 511434295a36SDave Ertman cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE; 511534295a36SDave Ertman 511634295a36SDave Ertman cmd->vsi_num = cpu_to_le16(vsi_num); 511734295a36SDave Ertman 511834295a36SDave Ertman return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 511934295a36SDave Ertman } 51200a02944fSAnirudh Venkataramanan 51210a02944fSAnirudh Venkataramanan /** 51220a02944fSAnirudh Venkataramanan * ice_fw_supports_report_dflt_cfg 51230a02944fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 51240a02944fSAnirudh Venkataramanan * 51250a02944fSAnirudh Venkataramanan * Checks if the firmware supports report default configuration 51260a02944fSAnirudh Venkataramanan */ 51270a02944fSAnirudh Venkataramanan bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw) 51280a02944fSAnirudh Venkataramanan { 51290a02944fSAnirudh Venkataramanan if (hw->api_maj_ver == ICE_FW_API_REPORT_DFLT_CFG_MAJ) { 51300a02944fSAnirudh Venkataramanan if (hw->api_min_ver > ICE_FW_API_REPORT_DFLT_CFG_MIN) 51310a02944fSAnirudh Venkataramanan return true; 51320a02944fSAnirudh Venkataramanan if (hw->api_min_ver == ICE_FW_API_REPORT_DFLT_CFG_MIN && 51330a02944fSAnirudh Venkataramanan hw->api_patch >= ICE_FW_API_REPORT_DFLT_CFG_PATCH) 51340a02944fSAnirudh Venkataramanan return true; 51350a02944fSAnirudh Venkataramanan } else if (hw->api_maj_ver > ICE_FW_API_REPORT_DFLT_CFG_MAJ) { 51360a02944fSAnirudh Venkataramanan return true; 51370a02944fSAnirudh Venkataramanan } 51380a02944fSAnirudh Venkataramanan return false; 51390a02944fSAnirudh Venkataramanan } 5140