17ec59eeaSAnirudh Venkataramanan // SPDX-License-Identifier: GPL-2.0 27ec59eeaSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */ 37ec59eeaSAnirudh Venkataramanan 47ec59eeaSAnirudh Venkataramanan #include "ice_common.h" 59c20346bSAnirudh Venkataramanan #include "ice_sched.h" 67ec59eeaSAnirudh Venkataramanan #include "ice_adminq_cmd.h" 77ec59eeaSAnirudh Venkataramanan 8f31e4b6fSAnirudh Venkataramanan #define ICE_PF_RESET_WAIT_COUNT 200 9f31e4b6fSAnirudh Venkataramanan 1022ef683bSAnirudh Venkataramanan #define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \ 1122ef683bSAnirudh Venkataramanan wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \ 12cdedef59SAnirudh Venkataramanan ((ICE_RX_OPC_MDID << \ 13cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \ 14cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \ 15cdedef59SAnirudh Venkataramanan (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \ 16cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M)) 17cdedef59SAnirudh Venkataramanan 1822ef683bSAnirudh Venkataramanan #define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \ 1922ef683bSAnirudh Venkataramanan wr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \ 20cdedef59SAnirudh Venkataramanan (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \ 21cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \ 22cdedef59SAnirudh Venkataramanan (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \ 23cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M) | \ 24cdedef59SAnirudh Venkataramanan (((flg_2) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S) & \ 25cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M) | \ 26cdedef59SAnirudh Venkataramanan (((flg_3) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S) & \ 27cdedef59SAnirudh Venkataramanan GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M)) 28cdedef59SAnirudh Venkataramanan 29f31e4b6fSAnirudh Venkataramanan /** 30f31e4b6fSAnirudh Venkataramanan * ice_set_mac_type - Sets MAC type 31f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 32f31e4b6fSAnirudh Venkataramanan * 33f31e4b6fSAnirudh Venkataramanan * This function sets the MAC type of the adapter based on the 34f31e4b6fSAnirudh Venkataramanan * vendor ID and device ID stored in the hw structure. 35f31e4b6fSAnirudh Venkataramanan */ 36f31e4b6fSAnirudh Venkataramanan static enum ice_status ice_set_mac_type(struct ice_hw *hw) 37f31e4b6fSAnirudh Venkataramanan { 38f31e4b6fSAnirudh Venkataramanan if (hw->vendor_id != PCI_VENDOR_ID_INTEL) 39f31e4b6fSAnirudh Venkataramanan return ICE_ERR_DEVICE_NOT_SUPPORTED; 40f31e4b6fSAnirudh Venkataramanan 41f31e4b6fSAnirudh Venkataramanan hw->mac_type = ICE_MAC_GENERIC; 42f31e4b6fSAnirudh Venkataramanan return 0; 43f31e4b6fSAnirudh Venkataramanan } 44f31e4b6fSAnirudh Venkataramanan 45f31e4b6fSAnirudh Venkataramanan /** 46f31e4b6fSAnirudh Venkataramanan * ice_clear_pf_cfg - Clear PF configuration 47f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 483968540bSAnirudh Venkataramanan * 493968540bSAnirudh Venkataramanan * Clears any existing PF configuration (VSIs, VSI lists, switch rules, port 503968540bSAnirudh Venkataramanan * configuration, flow director filters, etc.). 51f31e4b6fSAnirudh Venkataramanan */ 52f31e4b6fSAnirudh Venkataramanan enum ice_status ice_clear_pf_cfg(struct ice_hw *hw) 53f31e4b6fSAnirudh Venkataramanan { 54f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 55f31e4b6fSAnirudh Venkataramanan 56f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pf_cfg); 57f31e4b6fSAnirudh Venkataramanan 58f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 59f31e4b6fSAnirudh Venkataramanan } 60f31e4b6fSAnirudh Venkataramanan 61f31e4b6fSAnirudh Venkataramanan /** 62dc49c772SAnirudh Venkataramanan * ice_aq_manage_mac_read - manage MAC address read command 63dc49c772SAnirudh Venkataramanan * @hw: pointer to the hw struct 64dc49c772SAnirudh Venkataramanan * @buf: a virtual buffer to hold the manage MAC read response 65dc49c772SAnirudh Venkataramanan * @buf_size: Size of the virtual buffer 66dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 67dc49c772SAnirudh Venkataramanan * 68dc49c772SAnirudh Venkataramanan * This function is used to return per PF station MAC address (0x0107). 69dc49c772SAnirudh Venkataramanan * NOTE: Upon successful completion of this command, MAC address information 70dc49c772SAnirudh Venkataramanan * is returned in user specified buffer. Please interpret user specified 71dc49c772SAnirudh Venkataramanan * buffer as "manage_mac_read" response. 72dc49c772SAnirudh Venkataramanan * Response such as various MAC addresses are stored in HW struct (port.mac) 73dc49c772SAnirudh Venkataramanan * ice_aq_discover_caps is expected to be called before this function is called. 74dc49c772SAnirudh Venkataramanan */ 75dc49c772SAnirudh Venkataramanan static enum ice_status 76dc49c772SAnirudh Venkataramanan ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, 77dc49c772SAnirudh Venkataramanan struct ice_sq_cd *cd) 78dc49c772SAnirudh Venkataramanan { 79dc49c772SAnirudh Venkataramanan struct ice_aqc_manage_mac_read_resp *resp; 80dc49c772SAnirudh Venkataramanan struct ice_aqc_manage_mac_read *cmd; 81dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 82dc49c772SAnirudh Venkataramanan enum ice_status status; 83dc49c772SAnirudh Venkataramanan u16 flags; 84d6fef10cSMd Fahad Iqbal Polash u8 i; 85dc49c772SAnirudh Venkataramanan 86dc49c772SAnirudh Venkataramanan cmd = &desc.params.mac_read; 87dc49c772SAnirudh Venkataramanan 88dc49c772SAnirudh Venkataramanan if (buf_size < sizeof(*resp)) 89dc49c772SAnirudh Venkataramanan return ICE_ERR_BUF_TOO_SHORT; 90dc49c772SAnirudh Venkataramanan 91dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_read); 92dc49c772SAnirudh Venkataramanan 93dc49c772SAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 94dc49c772SAnirudh Venkataramanan if (status) 95dc49c772SAnirudh Venkataramanan return status; 96dc49c772SAnirudh Venkataramanan 97dc49c772SAnirudh Venkataramanan resp = (struct ice_aqc_manage_mac_read_resp *)buf; 98dc49c772SAnirudh Venkataramanan flags = le16_to_cpu(cmd->flags) & ICE_AQC_MAN_MAC_READ_M; 99dc49c772SAnirudh Venkataramanan 100dc49c772SAnirudh Venkataramanan if (!(flags & ICE_AQC_MAN_MAC_LAN_ADDR_VALID)) { 101dc49c772SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_LAN, "got invalid MAC address\n"); 102dc49c772SAnirudh Venkataramanan return ICE_ERR_CFG; 103dc49c772SAnirudh Venkataramanan } 104dc49c772SAnirudh Venkataramanan 105d6fef10cSMd Fahad Iqbal Polash /* A single port can report up to two (LAN and WoL) addresses */ 106d6fef10cSMd Fahad Iqbal Polash for (i = 0; i < cmd->num_addr; i++) 107d6fef10cSMd Fahad Iqbal Polash if (resp[i].addr_type == ICE_AQC_MAN_MAC_ADDR_TYPE_LAN) { 108d6fef10cSMd Fahad Iqbal Polash ether_addr_copy(hw->port_info->mac.lan_addr, 109d6fef10cSMd Fahad Iqbal Polash resp[i].mac_addr); 110d6fef10cSMd Fahad Iqbal Polash ether_addr_copy(hw->port_info->mac.perm_addr, 111d6fef10cSMd Fahad Iqbal Polash resp[i].mac_addr); 112d6fef10cSMd Fahad Iqbal Polash break; 113d6fef10cSMd Fahad Iqbal Polash } 114d6fef10cSMd Fahad Iqbal Polash 115dc49c772SAnirudh Venkataramanan return 0; 116dc49c772SAnirudh Venkataramanan } 117dc49c772SAnirudh Venkataramanan 118dc49c772SAnirudh Venkataramanan /** 119dc49c772SAnirudh Venkataramanan * ice_aq_get_phy_caps - returns PHY capabilities 120dc49c772SAnirudh Venkataramanan * @pi: port information structure 121dc49c772SAnirudh Venkataramanan * @qual_mods: report qualified modules 122dc49c772SAnirudh Venkataramanan * @report_mode: report mode capabilities 123dc49c772SAnirudh Venkataramanan * @pcaps: structure for PHY capabilities to be filled 124dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 125dc49c772SAnirudh Venkataramanan * 126dc49c772SAnirudh Venkataramanan * Returns the various PHY capabilities supported on the Port (0x0600) 127dc49c772SAnirudh Venkataramanan */ 12848cb27f2SChinh Cao enum ice_status 129dc49c772SAnirudh Venkataramanan ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, 130dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps, 131dc49c772SAnirudh Venkataramanan struct ice_sq_cd *cd) 132dc49c772SAnirudh Venkataramanan { 133dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps *cmd; 134dc49c772SAnirudh Venkataramanan u16 pcaps_size = sizeof(*pcaps); 135dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 136dc49c772SAnirudh Venkataramanan enum ice_status status; 137dc49c772SAnirudh Venkataramanan 138dc49c772SAnirudh Venkataramanan cmd = &desc.params.get_phy; 139dc49c772SAnirudh Venkataramanan 140dc49c772SAnirudh Venkataramanan if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi) 141dc49c772SAnirudh Venkataramanan return ICE_ERR_PARAM; 142dc49c772SAnirudh Venkataramanan 143dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps); 144dc49c772SAnirudh Venkataramanan 145dc49c772SAnirudh Venkataramanan if (qual_mods) 146dc49c772SAnirudh Venkataramanan cmd->param0 |= cpu_to_le16(ICE_AQC_GET_PHY_RQM); 147dc49c772SAnirudh Venkataramanan 148dc49c772SAnirudh Venkataramanan cmd->param0 |= cpu_to_le16(report_mode); 149dc49c772SAnirudh Venkataramanan status = ice_aq_send_cmd(pi->hw, &desc, pcaps, pcaps_size, cd); 150dc49c772SAnirudh Venkataramanan 151dc49c772SAnirudh Venkataramanan if (!status && report_mode == ICE_AQC_REPORT_TOPO_CAP) 152dc49c772SAnirudh Venkataramanan pi->phy.phy_type_low = le64_to_cpu(pcaps->phy_type_low); 153dc49c772SAnirudh Venkataramanan 154dc49c772SAnirudh Venkataramanan return status; 155dc49c772SAnirudh Venkataramanan } 156dc49c772SAnirudh Venkataramanan 157dc49c772SAnirudh Venkataramanan /** 158dc49c772SAnirudh Venkataramanan * ice_get_media_type - Gets media type 159dc49c772SAnirudh Venkataramanan * @pi: port information structure 160dc49c772SAnirudh Venkataramanan */ 161dc49c772SAnirudh Venkataramanan static enum ice_media_type ice_get_media_type(struct ice_port_info *pi) 162dc49c772SAnirudh Venkataramanan { 163dc49c772SAnirudh Venkataramanan struct ice_link_status *hw_link_info; 164dc49c772SAnirudh Venkataramanan 165dc49c772SAnirudh Venkataramanan if (!pi) 166dc49c772SAnirudh Venkataramanan return ICE_MEDIA_UNKNOWN; 167dc49c772SAnirudh Venkataramanan 168dc49c772SAnirudh Venkataramanan hw_link_info = &pi->phy.link_info; 169dc49c772SAnirudh Venkataramanan 170dc49c772SAnirudh Venkataramanan if (hw_link_info->phy_type_low) { 171dc49c772SAnirudh Venkataramanan switch (hw_link_info->phy_type_low) { 172dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_SX: 173dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_LX: 174dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_SR: 175dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_LR: 176dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10G_SFI_C2C: 177dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_SR: 178dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_LR: 179dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25G_AUI_C2C: 180dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_SR4: 181dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_LR4: 182dc49c772SAnirudh Venkataramanan return ICE_MEDIA_FIBER; 183dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_100BASE_TX: 184dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_T: 185dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_T: 186dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_5GBASE_T: 187dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_T: 188dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_T: 189dc49c772SAnirudh Venkataramanan return ICE_MEDIA_BASET; 190dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10G_SFI_DA: 191dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR: 192dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR_S: 193dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_CR1: 194dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_CR4: 195dc49c772SAnirudh Venkataramanan return ICE_MEDIA_DA; 196dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_1000BASE_KX: 197dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_KX: 198dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_2500BASE_X: 199dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_5GBASE_KR: 200dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1: 201dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR: 202dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR1: 203dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_25GBASE_KR_S: 204dc49c772SAnirudh Venkataramanan case ICE_PHY_TYPE_LOW_40GBASE_KR4: 205dc49c772SAnirudh Venkataramanan return ICE_MEDIA_BACKPLANE; 206dc49c772SAnirudh Venkataramanan } 207dc49c772SAnirudh Venkataramanan } 208dc49c772SAnirudh Venkataramanan 209dc49c772SAnirudh Venkataramanan return ICE_MEDIA_UNKNOWN; 210dc49c772SAnirudh Venkataramanan } 211dc49c772SAnirudh Venkataramanan 212dc49c772SAnirudh Venkataramanan /** 213dc49c772SAnirudh Venkataramanan * ice_aq_get_link_info 214dc49c772SAnirudh Venkataramanan * @pi: port information structure 215dc49c772SAnirudh Venkataramanan * @ena_lse: enable/disable LinkStatusEvent reporting 216dc49c772SAnirudh Venkataramanan * @link: pointer to link status structure - optional 217dc49c772SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 218dc49c772SAnirudh Venkataramanan * 219dc49c772SAnirudh Venkataramanan * Get Link Status (0x607). Returns the link status of the adapter. 220dc49c772SAnirudh Venkataramanan */ 221dc49c772SAnirudh Venkataramanan enum ice_status 222dc49c772SAnirudh Venkataramanan ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 223dc49c772SAnirudh Venkataramanan struct ice_link_status *link, struct ice_sq_cd *cd) 224dc49c772SAnirudh Venkataramanan { 225dc49c772SAnirudh Venkataramanan struct ice_link_status *hw_link_info_old, *hw_link_info; 226dc49c772SAnirudh Venkataramanan struct ice_aqc_get_link_status_data link_data = { 0 }; 227dc49c772SAnirudh Venkataramanan struct ice_aqc_get_link_status *resp; 228dc49c772SAnirudh Venkataramanan enum ice_media_type *hw_media_type; 229dc49c772SAnirudh Venkataramanan struct ice_fc_info *hw_fc_info; 230dc49c772SAnirudh Venkataramanan bool tx_pause, rx_pause; 231dc49c772SAnirudh Venkataramanan struct ice_aq_desc desc; 232dc49c772SAnirudh Venkataramanan enum ice_status status; 233dc49c772SAnirudh Venkataramanan u16 cmd_flags; 234dc49c772SAnirudh Venkataramanan 235dc49c772SAnirudh Venkataramanan if (!pi) 236dc49c772SAnirudh Venkataramanan return ICE_ERR_PARAM; 237dc49c772SAnirudh Venkataramanan hw_link_info_old = &pi->phy.link_info_old; 238dc49c772SAnirudh Venkataramanan hw_media_type = &pi->phy.media_type; 239dc49c772SAnirudh Venkataramanan hw_link_info = &pi->phy.link_info; 240dc49c772SAnirudh Venkataramanan hw_fc_info = &pi->fc; 241dc49c772SAnirudh Venkataramanan 242dc49c772SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_status); 243dc49c772SAnirudh Venkataramanan cmd_flags = (ena_lse) ? ICE_AQ_LSE_ENA : ICE_AQ_LSE_DIS; 244dc49c772SAnirudh Venkataramanan resp = &desc.params.get_link_status; 245dc49c772SAnirudh Venkataramanan resp->cmd_flags = cpu_to_le16(cmd_flags); 246dc49c772SAnirudh Venkataramanan resp->lport_num = pi->lport; 247dc49c772SAnirudh Venkataramanan 248dc49c772SAnirudh Venkataramanan status = ice_aq_send_cmd(pi->hw, &desc, &link_data, sizeof(link_data), 249dc49c772SAnirudh Venkataramanan cd); 250dc49c772SAnirudh Venkataramanan 251dc49c772SAnirudh Venkataramanan if (status) 252dc49c772SAnirudh Venkataramanan return status; 253dc49c772SAnirudh Venkataramanan 254dc49c772SAnirudh Venkataramanan /* save off old link status information */ 255dc49c772SAnirudh Venkataramanan *hw_link_info_old = *hw_link_info; 256dc49c772SAnirudh Venkataramanan 257dc49c772SAnirudh Venkataramanan /* update current link status information */ 258dc49c772SAnirudh Venkataramanan hw_link_info->link_speed = le16_to_cpu(link_data.link_speed); 259dc49c772SAnirudh Venkataramanan hw_link_info->phy_type_low = le64_to_cpu(link_data.phy_type_low); 260dc49c772SAnirudh Venkataramanan *hw_media_type = ice_get_media_type(pi); 261dc49c772SAnirudh Venkataramanan hw_link_info->link_info = link_data.link_info; 262dc49c772SAnirudh Venkataramanan hw_link_info->an_info = link_data.an_info; 263dc49c772SAnirudh Venkataramanan hw_link_info->ext_info = link_data.ext_info; 264dc49c772SAnirudh Venkataramanan hw_link_info->max_frame_size = le16_to_cpu(link_data.max_frame_size); 265dc49c772SAnirudh Venkataramanan hw_link_info->pacing = link_data.cfg & ICE_AQ_CFG_PACING_M; 266dc49c772SAnirudh Venkataramanan 267dc49c772SAnirudh Venkataramanan /* update fc info */ 268dc49c772SAnirudh Venkataramanan tx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_TX); 269dc49c772SAnirudh Venkataramanan rx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_RX); 270dc49c772SAnirudh Venkataramanan if (tx_pause && rx_pause) 271dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_FULL; 272dc49c772SAnirudh Venkataramanan else if (tx_pause) 273dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_TX_PAUSE; 274dc49c772SAnirudh Venkataramanan else if (rx_pause) 275dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_RX_PAUSE; 276dc49c772SAnirudh Venkataramanan else 277dc49c772SAnirudh Venkataramanan hw_fc_info->current_mode = ICE_FC_NONE; 278dc49c772SAnirudh Venkataramanan 279dc49c772SAnirudh Venkataramanan hw_link_info->lse_ena = 280dc49c772SAnirudh Venkataramanan !!(resp->cmd_flags & cpu_to_le16(ICE_AQ_LSE_IS_ENABLED)); 281dc49c772SAnirudh Venkataramanan 282dc49c772SAnirudh Venkataramanan /* save link status information */ 283dc49c772SAnirudh Venkataramanan if (link) 284dc49c772SAnirudh Venkataramanan *link = *hw_link_info; 285dc49c772SAnirudh Venkataramanan 286dc49c772SAnirudh Venkataramanan /* flag cleared so calling functions don't call AQ again */ 287dc49c772SAnirudh Venkataramanan pi->phy.get_link_info = false; 288dc49c772SAnirudh Venkataramanan 289dc49c772SAnirudh Venkataramanan return status; 290dc49c772SAnirudh Venkataramanan } 291dc49c772SAnirudh Venkataramanan 292dc49c772SAnirudh Venkataramanan /** 29322ef683bSAnirudh Venkataramanan * ice_init_flex_flags 294cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 29522ef683bSAnirudh Venkataramanan * @prof_id: Rx Descriptor Builder profile ID 296cdedef59SAnirudh Venkataramanan * 29722ef683bSAnirudh Venkataramanan * Function to initialize Rx flex flags 298cdedef59SAnirudh Venkataramanan */ 29922ef683bSAnirudh Venkataramanan static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id) 300cdedef59SAnirudh Venkataramanan { 301cdedef59SAnirudh Venkataramanan u8 idx = 0; 302cdedef59SAnirudh Venkataramanan 30322ef683bSAnirudh Venkataramanan /* Flex-flag fields (0-2) are programmed with FLG64 bits with layout: 30422ef683bSAnirudh Venkataramanan * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE 30522ef683bSAnirudh Venkataramanan * flexiflags1[3:0] - Not used for flag programming 30622ef683bSAnirudh Venkataramanan * flexiflags2[7:0] - Tunnel and VLAN types 30722ef683bSAnirudh Venkataramanan * 2 invalid fields in last index 30822ef683bSAnirudh Venkataramanan */ 30922ef683bSAnirudh Venkataramanan switch (prof_id) { 31022ef683bSAnirudh Venkataramanan /* Rx flex flags are currently programmed for the NIC profiles only. 31122ef683bSAnirudh Venkataramanan * Different flag bit programming configurations can be added per 31222ef683bSAnirudh Venkataramanan * profile as needed. 31322ef683bSAnirudh Venkataramanan */ 31422ef683bSAnirudh Venkataramanan case ICE_RXDID_FLEX_NIC: 31522ef683bSAnirudh Venkataramanan case ICE_RXDID_FLEX_NIC_2: 31622ef683bSAnirudh Venkataramanan ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG, 31722ef683bSAnirudh Venkataramanan ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI, 31822ef683bSAnirudh Venkataramanan ICE_RXFLG_FIN, idx++); 31922ef683bSAnirudh Venkataramanan /* flex flag 1 is not used for flexi-flag programming, skipping 32022ef683bSAnirudh Venkataramanan * these four FLG64 bits. 32122ef683bSAnirudh Venkataramanan */ 32222ef683bSAnirudh Venkataramanan ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST, 323cdedef59SAnirudh Venkataramanan ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++); 32422ef683bSAnirudh Venkataramanan ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI, 32522ef683bSAnirudh Venkataramanan ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100, 32622ef683bSAnirudh Venkataramanan ICE_RXFLG_EVLAN_x9100, idx++); 32722ef683bSAnirudh Venkataramanan ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100, 32822ef683bSAnirudh Venkataramanan ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC, 32922ef683bSAnirudh Venkataramanan ICE_RXFLG_TNL0, idx++); 33022ef683bSAnirudh Venkataramanan ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2, 331cdedef59SAnirudh Venkataramanan ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx); 33222ef683bSAnirudh Venkataramanan break; 33322ef683bSAnirudh Venkataramanan 33422ef683bSAnirudh Venkataramanan default: 33522ef683bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 33622ef683bSAnirudh Venkataramanan "Flag programming for profile ID %d not supported\n", 33722ef683bSAnirudh Venkataramanan prof_id); 33822ef683bSAnirudh Venkataramanan } 33922ef683bSAnirudh Venkataramanan } 34022ef683bSAnirudh Venkataramanan 34122ef683bSAnirudh Venkataramanan /** 34222ef683bSAnirudh Venkataramanan * ice_init_flex_flds 34322ef683bSAnirudh Venkataramanan * @hw: pointer to the hardware structure 34422ef683bSAnirudh Venkataramanan * @prof_id: Rx Descriptor Builder profile ID 34522ef683bSAnirudh Venkataramanan * 34622ef683bSAnirudh Venkataramanan * Function to initialize flex descriptors 34722ef683bSAnirudh Venkataramanan */ 34822ef683bSAnirudh Venkataramanan static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id) 34922ef683bSAnirudh Venkataramanan { 35022ef683bSAnirudh Venkataramanan enum ice_flex_rx_mdid mdid; 35122ef683bSAnirudh Venkataramanan 35222ef683bSAnirudh Venkataramanan switch (prof_id) { 35322ef683bSAnirudh Venkataramanan case ICE_RXDID_FLEX_NIC: 35422ef683bSAnirudh Venkataramanan case ICE_RXDID_FLEX_NIC_2: 35522ef683bSAnirudh Venkataramanan ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0); 35622ef683bSAnirudh Venkataramanan ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1); 35722ef683bSAnirudh Venkataramanan ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2); 35822ef683bSAnirudh Venkataramanan 35922ef683bSAnirudh Venkataramanan mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ? 36022ef683bSAnirudh Venkataramanan ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH; 36122ef683bSAnirudh Venkataramanan 36222ef683bSAnirudh Venkataramanan ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3); 36322ef683bSAnirudh Venkataramanan 36422ef683bSAnirudh Venkataramanan ice_init_flex_flags(hw, prof_id); 36522ef683bSAnirudh Venkataramanan break; 36622ef683bSAnirudh Venkataramanan 36722ef683bSAnirudh Venkataramanan default: 36822ef683bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 36922ef683bSAnirudh Venkataramanan "Field init for profile ID %d not supported\n", 37022ef683bSAnirudh Venkataramanan prof_id); 37122ef683bSAnirudh Venkataramanan } 372cdedef59SAnirudh Venkataramanan } 373cdedef59SAnirudh Venkataramanan 374cdedef59SAnirudh Venkataramanan /** 3759daf8208SAnirudh Venkataramanan * ice_init_fltr_mgmt_struct - initializes filter management list and locks 3769daf8208SAnirudh Venkataramanan * @hw: pointer to the hw struct 3779daf8208SAnirudh Venkataramanan */ 3789daf8208SAnirudh Venkataramanan static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw) 3799daf8208SAnirudh Venkataramanan { 3809daf8208SAnirudh Venkataramanan struct ice_switch_info *sw; 3819daf8208SAnirudh Venkataramanan 3829daf8208SAnirudh Venkataramanan hw->switch_info = devm_kzalloc(ice_hw_to_dev(hw), 3839daf8208SAnirudh Venkataramanan sizeof(*hw->switch_info), GFP_KERNEL); 3849daf8208SAnirudh Venkataramanan sw = hw->switch_info; 3859daf8208SAnirudh Venkataramanan 3869daf8208SAnirudh Venkataramanan if (!sw) 3879daf8208SAnirudh Venkataramanan return ICE_ERR_NO_MEMORY; 3889daf8208SAnirudh Venkataramanan 3899daf8208SAnirudh Venkataramanan INIT_LIST_HEAD(&sw->vsi_list_map_head); 3909daf8208SAnirudh Venkataramanan 39180d144c9SAnirudh Venkataramanan ice_init_def_sw_recp(hw); 3929daf8208SAnirudh Venkataramanan 3939daf8208SAnirudh Venkataramanan return 0; 3949daf8208SAnirudh Venkataramanan } 3959daf8208SAnirudh Venkataramanan 3969daf8208SAnirudh Venkataramanan /** 3979daf8208SAnirudh Venkataramanan * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks 3989daf8208SAnirudh Venkataramanan * @hw: pointer to the hw struct 3999daf8208SAnirudh Venkataramanan */ 4009daf8208SAnirudh Venkataramanan static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) 4019daf8208SAnirudh Venkataramanan { 4029daf8208SAnirudh Venkataramanan struct ice_switch_info *sw = hw->switch_info; 4039daf8208SAnirudh Venkataramanan struct ice_vsi_list_map_info *v_pos_map; 4049daf8208SAnirudh Venkataramanan struct ice_vsi_list_map_info *v_tmp_map; 40580d144c9SAnirudh Venkataramanan struct ice_sw_recipe *recps; 40680d144c9SAnirudh Venkataramanan u8 i; 4079daf8208SAnirudh Venkataramanan 4089daf8208SAnirudh Venkataramanan list_for_each_entry_safe(v_pos_map, v_tmp_map, &sw->vsi_list_map_head, 4099daf8208SAnirudh Venkataramanan list_entry) { 4109daf8208SAnirudh Venkataramanan list_del(&v_pos_map->list_entry); 4119daf8208SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), v_pos_map); 4129daf8208SAnirudh Venkataramanan } 41380d144c9SAnirudh Venkataramanan recps = hw->switch_info->recp_list; 41480d144c9SAnirudh Venkataramanan for (i = 0; i < ICE_SW_LKUP_LAST; i++) { 41580d144c9SAnirudh Venkataramanan struct ice_fltr_mgmt_list_entry *lst_itr, *tmp_entry; 4169daf8208SAnirudh Venkataramanan 41780d144c9SAnirudh Venkataramanan recps[i].root_rid = i; 41880d144c9SAnirudh Venkataramanan mutex_destroy(&recps[i].filt_rule_lock); 41980d144c9SAnirudh Venkataramanan list_for_each_entry_safe(lst_itr, tmp_entry, 42080d144c9SAnirudh Venkataramanan &recps[i].filt_rules, list_entry) { 42180d144c9SAnirudh Venkataramanan list_del(&lst_itr->list_entry); 42280d144c9SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), lst_itr); 42380d144c9SAnirudh Venkataramanan } 42480d144c9SAnirudh Venkataramanan } 4259daf8208SAnirudh Venkataramanan 42680d144c9SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), sw->recp_list); 4279daf8208SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), sw); 4289daf8208SAnirudh Venkataramanan } 4299daf8208SAnirudh Venkataramanan 4308b97ceb1SHieu Tran #define ICE_FW_LOG_DESC_SIZE(n) (sizeof(struct ice_aqc_fw_logging_data) + \ 4318b97ceb1SHieu Tran (((n) - 1) * sizeof(((struct ice_aqc_fw_logging_data *)0)->entry))) 4328b97ceb1SHieu Tran #define ICE_FW_LOG_DESC_SIZE_MAX \ 4338b97ceb1SHieu Tran ICE_FW_LOG_DESC_SIZE(ICE_AQC_FW_LOG_ID_MAX) 4348b97ceb1SHieu Tran 4358b97ceb1SHieu Tran /** 4368b97ceb1SHieu Tran * ice_cfg_fw_log - configure FW logging 4378b97ceb1SHieu Tran * @hw: pointer to the hw struct 4388b97ceb1SHieu Tran * @enable: enable certain FW logging events if true, disable all if false 4398b97ceb1SHieu Tran * 4408b97ceb1SHieu Tran * This function enables/disables the FW logging via Rx CQ events and a UART 4418b97ceb1SHieu Tran * port based on predetermined configurations. FW logging via the Rx CQ can be 4428b97ceb1SHieu Tran * enabled/disabled for individual PF's. However, FW logging via the UART can 4438b97ceb1SHieu Tran * only be enabled/disabled for all PFs on the same device. 4448b97ceb1SHieu Tran * 4458b97ceb1SHieu Tran * To enable overall FW logging, the "cq_en" and "uart_en" enable bits in 4468b97ceb1SHieu Tran * hw->fw_log need to be set accordingly, e.g. based on user-provided input, 4478b97ceb1SHieu Tran * before initializing the device. 4488b97ceb1SHieu Tran * 4498b97ceb1SHieu Tran * When re/configuring FW logging, callers need to update the "cfg" elements of 4508b97ceb1SHieu Tran * the hw->fw_log.evnts array with the desired logging event configurations for 4518b97ceb1SHieu Tran * modules of interest. When disabling FW logging completely, the callers can 4528b97ceb1SHieu Tran * just pass false in the "enable" parameter. On completion, the function will 4538b97ceb1SHieu Tran * update the "cur" element of the hw->fw_log.evnts array with the resulting 4548b97ceb1SHieu Tran * logging event configurations of the modules that are being re/configured. FW 4558b97ceb1SHieu Tran * logging modules that are not part of a reconfiguration operation retain their 4568b97ceb1SHieu Tran * previous states. 4578b97ceb1SHieu Tran * 4588b97ceb1SHieu Tran * Before resetting the device, it is recommended that the driver disables FW 4598b97ceb1SHieu Tran * logging before shutting down the control queue. When disabling FW logging 4608b97ceb1SHieu Tran * ("enable" = false), the latest configurations of FW logging events stored in 4618b97ceb1SHieu Tran * hw->fw_log.evnts[] are not overridden to allow them to be reconfigured after 4628b97ceb1SHieu Tran * a device reset. 4638b97ceb1SHieu Tran * 4648b97ceb1SHieu Tran * When enabling FW logging to emit log messages via the Rx CQ during the 4658b97ceb1SHieu Tran * device's initialization phase, a mechanism alternative to interrupt handlers 4668b97ceb1SHieu Tran * needs to be used to extract FW log messages from the Rx CQ periodically and 4678b97ceb1SHieu Tran * to prevent the Rx CQ from being full and stalling other types of control 4688b97ceb1SHieu Tran * messages from FW to SW. Interrupts are typically disabled during the device's 4698b97ceb1SHieu Tran * initialization phase. 4708b97ceb1SHieu Tran */ 4718b97ceb1SHieu Tran static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable) 4728b97ceb1SHieu Tran { 4738b97ceb1SHieu Tran struct ice_aqc_fw_logging_data *data = NULL; 4748b97ceb1SHieu Tran struct ice_aqc_fw_logging *cmd; 4758b97ceb1SHieu Tran enum ice_status status = 0; 4768b97ceb1SHieu Tran u16 i, chgs = 0, len = 0; 4778b97ceb1SHieu Tran struct ice_aq_desc desc; 4788b97ceb1SHieu Tran u8 actv_evnts = 0; 4798b97ceb1SHieu Tran void *buf = NULL; 4808b97ceb1SHieu Tran 4818b97ceb1SHieu Tran if (!hw->fw_log.cq_en && !hw->fw_log.uart_en) 4828b97ceb1SHieu Tran return 0; 4838b97ceb1SHieu Tran 4848b97ceb1SHieu Tran /* Disable FW logging only when the control queue is still responsive */ 4858b97ceb1SHieu Tran if (!enable && 4868b97ceb1SHieu Tran (!hw->fw_log.actv_evnts || !ice_check_sq_alive(hw, &hw->adminq))) 4878b97ceb1SHieu Tran return 0; 4888b97ceb1SHieu Tran 4898b97ceb1SHieu Tran ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging); 4908b97ceb1SHieu Tran cmd = &desc.params.fw_logging; 4918b97ceb1SHieu Tran 4928b97ceb1SHieu Tran /* Indicate which controls are valid */ 4938b97ceb1SHieu Tran if (hw->fw_log.cq_en) 4948b97ceb1SHieu Tran cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_AQ_VALID; 4958b97ceb1SHieu Tran 4968b97ceb1SHieu Tran if (hw->fw_log.uart_en) 4978b97ceb1SHieu Tran cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_UART_VALID; 4988b97ceb1SHieu Tran 4998b97ceb1SHieu Tran if (enable) { 5008b97ceb1SHieu Tran /* Fill in an array of entries with FW logging modules and 5018b97ceb1SHieu Tran * logging events being reconfigured. 5028b97ceb1SHieu Tran */ 5038b97ceb1SHieu Tran for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { 5048b97ceb1SHieu Tran u16 val; 5058b97ceb1SHieu Tran 5068b97ceb1SHieu Tran /* Keep track of enabled event types */ 5078b97ceb1SHieu Tran actv_evnts |= hw->fw_log.evnts[i].cfg; 5088b97ceb1SHieu Tran 5098b97ceb1SHieu Tran if (hw->fw_log.evnts[i].cfg == hw->fw_log.evnts[i].cur) 5108b97ceb1SHieu Tran continue; 5118b97ceb1SHieu Tran 5128b97ceb1SHieu Tran if (!data) { 5138b97ceb1SHieu Tran data = devm_kzalloc(ice_hw_to_dev(hw), 5148b97ceb1SHieu Tran ICE_FW_LOG_DESC_SIZE_MAX, 5158b97ceb1SHieu Tran GFP_KERNEL); 5168b97ceb1SHieu Tran if (!data) 5178b97ceb1SHieu Tran return ICE_ERR_NO_MEMORY; 5188b97ceb1SHieu Tran } 5198b97ceb1SHieu Tran 5208b97ceb1SHieu Tran val = i << ICE_AQC_FW_LOG_ID_S; 5218b97ceb1SHieu Tran val |= hw->fw_log.evnts[i].cfg << ICE_AQC_FW_LOG_EN_S; 5228b97ceb1SHieu Tran data->entry[chgs++] = cpu_to_le16(val); 5238b97ceb1SHieu Tran } 5248b97ceb1SHieu Tran 5258b97ceb1SHieu Tran /* Only enable FW logging if at least one module is specified. 5268b97ceb1SHieu Tran * If FW logging is currently enabled but all modules are not 5278b97ceb1SHieu Tran * enabled to emit log messages, disable FW logging altogether. 5288b97ceb1SHieu Tran */ 5298b97ceb1SHieu Tran if (actv_evnts) { 5308b97ceb1SHieu Tran /* Leave if there is effectively no change */ 5318b97ceb1SHieu Tran if (!chgs) 5328b97ceb1SHieu Tran goto out; 5338b97ceb1SHieu Tran 5348b97ceb1SHieu Tran if (hw->fw_log.cq_en) 5358b97ceb1SHieu Tran cmd->log_ctrl |= ICE_AQC_FW_LOG_AQ_EN; 5368b97ceb1SHieu Tran 5378b97ceb1SHieu Tran if (hw->fw_log.uart_en) 5388b97ceb1SHieu Tran cmd->log_ctrl |= ICE_AQC_FW_LOG_UART_EN; 5398b97ceb1SHieu Tran 5408b97ceb1SHieu Tran buf = data; 5418b97ceb1SHieu Tran len = ICE_FW_LOG_DESC_SIZE(chgs); 5428b97ceb1SHieu Tran desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 5438b97ceb1SHieu Tran } 5448b97ceb1SHieu Tran } 5458b97ceb1SHieu Tran 5468b97ceb1SHieu Tran status = ice_aq_send_cmd(hw, &desc, buf, len, NULL); 5478b97ceb1SHieu Tran if (!status) { 5488b97ceb1SHieu Tran /* Update the current configuration to reflect events enabled. 5498b97ceb1SHieu Tran * hw->fw_log.cq_en and hw->fw_log.uart_en indicate if the FW 5508b97ceb1SHieu Tran * logging mode is enabled for the device. They do not reflect 5518b97ceb1SHieu Tran * actual modules being enabled to emit log messages. So, their 5528b97ceb1SHieu Tran * values remain unchanged even when all modules are disabled. 5538b97ceb1SHieu Tran */ 5548b97ceb1SHieu Tran u16 cnt = enable ? chgs : (u16)ICE_AQC_FW_LOG_ID_MAX; 5558b97ceb1SHieu Tran 5568b97ceb1SHieu Tran hw->fw_log.actv_evnts = actv_evnts; 5578b97ceb1SHieu Tran for (i = 0; i < cnt; i++) { 5588b97ceb1SHieu Tran u16 v, m; 5598b97ceb1SHieu Tran 5608b97ceb1SHieu Tran if (!enable) { 5618b97ceb1SHieu Tran /* When disabling all FW logging events as part 5628b97ceb1SHieu Tran * of device's de-initialization, the original 5638b97ceb1SHieu Tran * configurations are retained, and can be used 5648b97ceb1SHieu Tran * to reconfigure FW logging later if the device 5658b97ceb1SHieu Tran * is re-initialized. 5668b97ceb1SHieu Tran */ 5678b97ceb1SHieu Tran hw->fw_log.evnts[i].cur = 0; 5688b97ceb1SHieu Tran continue; 5698b97ceb1SHieu Tran } 5708b97ceb1SHieu Tran 5718b97ceb1SHieu Tran v = le16_to_cpu(data->entry[i]); 5728b97ceb1SHieu Tran m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; 5738b97ceb1SHieu Tran hw->fw_log.evnts[m].cur = hw->fw_log.evnts[m].cfg; 5748b97ceb1SHieu Tran } 5758b97ceb1SHieu Tran } 5768b97ceb1SHieu Tran 5778b97ceb1SHieu Tran out: 5788b97ceb1SHieu Tran if (data) 5798b97ceb1SHieu Tran devm_kfree(ice_hw_to_dev(hw), data); 5808b97ceb1SHieu Tran 5818b97ceb1SHieu Tran return status; 5828b97ceb1SHieu Tran } 5838b97ceb1SHieu Tran 5848b97ceb1SHieu Tran /** 5858b97ceb1SHieu Tran * ice_output_fw_log 5868b97ceb1SHieu Tran * @hw: pointer to the hw struct 5878b97ceb1SHieu Tran * @desc: pointer to the AQ message descriptor 5888b97ceb1SHieu Tran * @buf: pointer to the buffer accompanying the AQ message 5898b97ceb1SHieu Tran * 5908b97ceb1SHieu Tran * Formats a FW Log message and outputs it via the standard driver logs. 5918b97ceb1SHieu Tran */ 5928b97ceb1SHieu Tran void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf) 5938b97ceb1SHieu Tran { 5948b97ceb1SHieu Tran ice_debug(hw, ICE_DBG_AQ_MSG, "[ FW Log Msg Start ]\n"); 5958b97ceb1SHieu Tran ice_debug_array(hw, ICE_DBG_AQ_MSG, 16, 1, (u8 *)buf, 5968b97ceb1SHieu Tran le16_to_cpu(desc->datalen)); 5978b97ceb1SHieu Tran ice_debug(hw, ICE_DBG_AQ_MSG, "[ FW Log Msg End ]\n"); 5988b97ceb1SHieu Tran } 5998b97ceb1SHieu Tran 6009daf8208SAnirudh Venkataramanan /** 601f31e4b6fSAnirudh Venkataramanan * ice_init_hw - main hardware initialization routine 602f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 603f31e4b6fSAnirudh Venkataramanan */ 604f31e4b6fSAnirudh Venkataramanan enum ice_status ice_init_hw(struct ice_hw *hw) 605f31e4b6fSAnirudh Venkataramanan { 606dc49c772SAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps; 607f31e4b6fSAnirudh Venkataramanan enum ice_status status; 608dc49c772SAnirudh Venkataramanan u16 mac_buf_len; 609dc49c772SAnirudh Venkataramanan void *mac_buf; 610f31e4b6fSAnirudh Venkataramanan 611f31e4b6fSAnirudh Venkataramanan /* Set MAC type based on DeviceID */ 612f31e4b6fSAnirudh Venkataramanan status = ice_set_mac_type(hw); 613f31e4b6fSAnirudh Venkataramanan if (status) 614f31e4b6fSAnirudh Venkataramanan return status; 615f31e4b6fSAnirudh Venkataramanan 616f31e4b6fSAnirudh Venkataramanan hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) & 617f31e4b6fSAnirudh Venkataramanan PF_FUNC_RID_FUNC_NUM_M) >> 618f31e4b6fSAnirudh Venkataramanan PF_FUNC_RID_FUNC_NUM_S; 619f31e4b6fSAnirudh Venkataramanan 620f31e4b6fSAnirudh Venkataramanan status = ice_reset(hw, ICE_RESET_PFR); 621f31e4b6fSAnirudh Venkataramanan if (status) 622f31e4b6fSAnirudh Venkataramanan return status; 623f31e4b6fSAnirudh Venkataramanan 624940b61afSAnirudh Venkataramanan /* set these values to minimum allowed */ 625940b61afSAnirudh Venkataramanan hw->itr_gran_200 = ICE_ITR_GRAN_MIN_200; 626940b61afSAnirudh Venkataramanan hw->itr_gran_100 = ICE_ITR_GRAN_MIN_100; 627940b61afSAnirudh Venkataramanan hw->itr_gran_50 = ICE_ITR_GRAN_MIN_50; 628940b61afSAnirudh Venkataramanan hw->itr_gran_25 = ICE_ITR_GRAN_MIN_25; 629940b61afSAnirudh Venkataramanan 630f31e4b6fSAnirudh Venkataramanan status = ice_init_all_ctrlq(hw); 631f31e4b6fSAnirudh Venkataramanan if (status) 632f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 633f31e4b6fSAnirudh Venkataramanan 6348b97ceb1SHieu Tran /* Enable FW logging. Not fatal if this fails. */ 6358b97ceb1SHieu Tran status = ice_cfg_fw_log(hw, true); 6368b97ceb1SHieu Tran if (status) 6378b97ceb1SHieu Tran ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging.\n"); 6388b97ceb1SHieu Tran 639f31e4b6fSAnirudh Venkataramanan status = ice_clear_pf_cfg(hw); 640f31e4b6fSAnirudh Venkataramanan if (status) 641f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 642f31e4b6fSAnirudh Venkataramanan 643f31e4b6fSAnirudh Venkataramanan ice_clear_pxe_mode(hw); 644f31e4b6fSAnirudh Venkataramanan 645f31e4b6fSAnirudh Venkataramanan status = ice_init_nvm(hw); 646f31e4b6fSAnirudh Venkataramanan if (status) 647f31e4b6fSAnirudh Venkataramanan goto err_unroll_cqinit; 648f31e4b6fSAnirudh Venkataramanan 6499c20346bSAnirudh Venkataramanan status = ice_get_caps(hw); 6509c20346bSAnirudh Venkataramanan if (status) 6519c20346bSAnirudh Venkataramanan goto err_unroll_cqinit; 6529c20346bSAnirudh Venkataramanan 6539c20346bSAnirudh Venkataramanan hw->port_info = devm_kzalloc(ice_hw_to_dev(hw), 6549c20346bSAnirudh Venkataramanan sizeof(*hw->port_info), GFP_KERNEL); 6559c20346bSAnirudh Venkataramanan if (!hw->port_info) { 6569c20346bSAnirudh Venkataramanan status = ICE_ERR_NO_MEMORY; 6579c20346bSAnirudh Venkataramanan goto err_unroll_cqinit; 6589c20346bSAnirudh Venkataramanan } 6599c20346bSAnirudh Venkataramanan 6609c20346bSAnirudh Venkataramanan /* set the back pointer to hw */ 6619c20346bSAnirudh Venkataramanan hw->port_info->hw = hw; 6629c20346bSAnirudh Venkataramanan 6639c20346bSAnirudh Venkataramanan /* Initialize port_info struct with switch configuration data */ 6649c20346bSAnirudh Venkataramanan status = ice_get_initial_sw_cfg(hw); 6659c20346bSAnirudh Venkataramanan if (status) 6669c20346bSAnirudh Venkataramanan goto err_unroll_alloc; 6679c20346bSAnirudh Venkataramanan 6689daf8208SAnirudh Venkataramanan hw->evb_veb = true; 6699daf8208SAnirudh Venkataramanan 6709c20346bSAnirudh Venkataramanan /* Query the allocated resources for tx scheduler */ 6719c20346bSAnirudh Venkataramanan status = ice_sched_query_res_alloc(hw); 6729c20346bSAnirudh Venkataramanan if (status) { 6739c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, 6749c20346bSAnirudh Venkataramanan "Failed to get scheduler allocated resources\n"); 6759c20346bSAnirudh Venkataramanan goto err_unroll_alloc; 6769c20346bSAnirudh Venkataramanan } 6779c20346bSAnirudh Venkataramanan 678dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with scheduler data */ 679dc49c772SAnirudh Venkataramanan status = ice_sched_init_port(hw->port_info); 680dc49c772SAnirudh Venkataramanan if (status) 681dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 682dc49c772SAnirudh Venkataramanan 683dc49c772SAnirudh Venkataramanan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL); 684dc49c772SAnirudh Venkataramanan if (!pcaps) { 685dc49c772SAnirudh Venkataramanan status = ICE_ERR_NO_MEMORY; 686dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 687dc49c772SAnirudh Venkataramanan } 688dc49c772SAnirudh Venkataramanan 689dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with PHY capabilities */ 690dc49c772SAnirudh Venkataramanan status = ice_aq_get_phy_caps(hw->port_info, false, 691dc49c772SAnirudh Venkataramanan ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL); 692dc49c772SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 693dc49c772SAnirudh Venkataramanan if (status) 694dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 695dc49c772SAnirudh Venkataramanan 696dc49c772SAnirudh Venkataramanan /* Initialize port_info struct with link information */ 697dc49c772SAnirudh Venkataramanan status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL); 698dc49c772SAnirudh Venkataramanan if (status) 699dc49c772SAnirudh Venkataramanan goto err_unroll_sched; 700dc49c772SAnirudh Venkataramanan 701b36c598cSAnirudh Venkataramanan /* need a valid SW entry point to build a Tx tree */ 702b36c598cSAnirudh Venkataramanan if (!hw->sw_entry_point_layer) { 703b36c598cSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_SCHED, "invalid sw entry point\n"); 704b36c598cSAnirudh Venkataramanan status = ICE_ERR_CFG; 705b36c598cSAnirudh Venkataramanan goto err_unroll_sched; 706b36c598cSAnirudh Venkataramanan } 707b36c598cSAnirudh Venkataramanan 7089daf8208SAnirudh Venkataramanan status = ice_init_fltr_mgmt_struct(hw); 7099daf8208SAnirudh Venkataramanan if (status) 7109daf8208SAnirudh Venkataramanan goto err_unroll_sched; 7119daf8208SAnirudh Venkataramanan 712d6fef10cSMd Fahad Iqbal Polash /* Get MAC information */ 713d6fef10cSMd Fahad Iqbal Polash /* A single port can report up to two (LAN and WoL) addresses */ 714d6fef10cSMd Fahad Iqbal Polash mac_buf = devm_kcalloc(ice_hw_to_dev(hw), 2, 715d6fef10cSMd Fahad Iqbal Polash sizeof(struct ice_aqc_manage_mac_read_resp), 716d6fef10cSMd Fahad Iqbal Polash GFP_KERNEL); 717d6fef10cSMd Fahad Iqbal Polash mac_buf_len = 2 * sizeof(struct ice_aqc_manage_mac_read_resp); 718dc49c772SAnirudh Venkataramanan 71963bb4e1eSWei Yongjun if (!mac_buf) { 72063bb4e1eSWei Yongjun status = ICE_ERR_NO_MEMORY; 7219daf8208SAnirudh Venkataramanan goto err_unroll_fltr_mgmt_struct; 72263bb4e1eSWei Yongjun } 723dc49c772SAnirudh Venkataramanan 724dc49c772SAnirudh Venkataramanan status = ice_aq_manage_mac_read(hw, mac_buf, mac_buf_len, NULL); 725dc49c772SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), mac_buf); 726dc49c772SAnirudh Venkataramanan 727dc49c772SAnirudh Venkataramanan if (status) 7289daf8208SAnirudh Venkataramanan goto err_unroll_fltr_mgmt_struct; 729dc49c772SAnirudh Venkataramanan 73022ef683bSAnirudh Venkataramanan ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC); 73122ef683bSAnirudh Venkataramanan ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2); 732cdedef59SAnirudh Venkataramanan 733f31e4b6fSAnirudh Venkataramanan return 0; 734f31e4b6fSAnirudh Venkataramanan 7359daf8208SAnirudh Venkataramanan err_unroll_fltr_mgmt_struct: 7369daf8208SAnirudh Venkataramanan ice_cleanup_fltr_mgmt_struct(hw); 737dc49c772SAnirudh Venkataramanan err_unroll_sched: 738dc49c772SAnirudh Venkataramanan ice_sched_cleanup_all(hw); 7399c20346bSAnirudh Venkataramanan err_unroll_alloc: 7409c20346bSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), hw->port_info); 741f31e4b6fSAnirudh Venkataramanan err_unroll_cqinit: 742f31e4b6fSAnirudh Venkataramanan ice_shutdown_all_ctrlq(hw); 743f31e4b6fSAnirudh Venkataramanan return status; 744f31e4b6fSAnirudh Venkataramanan } 745f31e4b6fSAnirudh Venkataramanan 746f31e4b6fSAnirudh Venkataramanan /** 747f31e4b6fSAnirudh Venkataramanan * ice_deinit_hw - unroll initialization operations done by ice_init_hw 748f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 749f31e4b6fSAnirudh Venkataramanan */ 750f31e4b6fSAnirudh Venkataramanan void ice_deinit_hw(struct ice_hw *hw) 751f31e4b6fSAnirudh Venkataramanan { 7528b97ceb1SHieu Tran ice_cleanup_fltr_mgmt_struct(hw); 7538b97ceb1SHieu Tran 7549c20346bSAnirudh Venkataramanan ice_sched_cleanup_all(hw); 755dc49c772SAnirudh Venkataramanan 7569c20346bSAnirudh Venkataramanan if (hw->port_info) { 7579c20346bSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), hw->port_info); 7589c20346bSAnirudh Venkataramanan hw->port_info = NULL; 7599c20346bSAnirudh Venkataramanan } 7609daf8208SAnirudh Venkataramanan 7618b97ceb1SHieu Tran /* Attempt to disable FW logging before shutting down control queues */ 7628b97ceb1SHieu Tran ice_cfg_fw_log(hw, false); 7638b97ceb1SHieu Tran ice_shutdown_all_ctrlq(hw); 764f31e4b6fSAnirudh Venkataramanan } 765f31e4b6fSAnirudh Venkataramanan 766f31e4b6fSAnirudh Venkataramanan /** 767f31e4b6fSAnirudh Venkataramanan * ice_check_reset - Check to see if a global reset is complete 768f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 769f31e4b6fSAnirudh Venkataramanan */ 770f31e4b6fSAnirudh Venkataramanan enum ice_status ice_check_reset(struct ice_hw *hw) 771f31e4b6fSAnirudh Venkataramanan { 772f31e4b6fSAnirudh Venkataramanan u32 cnt, reg = 0, grst_delay; 773f31e4b6fSAnirudh Venkataramanan 774f31e4b6fSAnirudh Venkataramanan /* Poll for Device Active state in case a recent CORER, GLOBR, 775f31e4b6fSAnirudh Venkataramanan * or EMPR has occurred. The grst delay value is in 100ms units. 776f31e4b6fSAnirudh Venkataramanan * Add 1sec for outstanding AQ commands that can take a long time. 777f31e4b6fSAnirudh Venkataramanan */ 778f31e4b6fSAnirudh Venkataramanan grst_delay = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >> 779f31e4b6fSAnirudh Venkataramanan GLGEN_RSTCTL_GRSTDEL_S) + 10; 780f31e4b6fSAnirudh Venkataramanan 781f31e4b6fSAnirudh Venkataramanan for (cnt = 0; cnt < grst_delay; cnt++) { 782f31e4b6fSAnirudh Venkataramanan mdelay(100); 783f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, GLGEN_RSTAT); 784f31e4b6fSAnirudh Venkataramanan if (!(reg & GLGEN_RSTAT_DEVSTATE_M)) 785f31e4b6fSAnirudh Venkataramanan break; 786f31e4b6fSAnirudh Venkataramanan } 787f31e4b6fSAnirudh Venkataramanan 788f31e4b6fSAnirudh Venkataramanan if (cnt == grst_delay) { 789f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 790f31e4b6fSAnirudh Venkataramanan "Global reset polling failed to complete.\n"); 791f31e4b6fSAnirudh Venkataramanan return ICE_ERR_RESET_FAILED; 792f31e4b6fSAnirudh Venkataramanan } 793f31e4b6fSAnirudh Venkataramanan 794f31e4b6fSAnirudh Venkataramanan #define ICE_RESET_DONE_MASK (GLNVM_ULD_CORER_DONE_M | \ 795f31e4b6fSAnirudh Venkataramanan GLNVM_ULD_GLOBR_DONE_M) 796f31e4b6fSAnirudh Venkataramanan 797f31e4b6fSAnirudh Venkataramanan /* Device is Active; check Global Reset processes are done */ 798f31e4b6fSAnirudh Venkataramanan for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { 799f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK; 800f31e4b6fSAnirudh Venkataramanan if (reg == ICE_RESET_DONE_MASK) { 801f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 802f31e4b6fSAnirudh Venkataramanan "Global reset processes done. %d\n", cnt); 803f31e4b6fSAnirudh Venkataramanan break; 804f31e4b6fSAnirudh Venkataramanan } 805f31e4b6fSAnirudh Venkataramanan mdelay(10); 806f31e4b6fSAnirudh Venkataramanan } 807f31e4b6fSAnirudh Venkataramanan 808f31e4b6fSAnirudh Venkataramanan if (cnt == ICE_PF_RESET_WAIT_COUNT) { 809f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 810f31e4b6fSAnirudh Venkataramanan "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n", 811f31e4b6fSAnirudh Venkataramanan reg); 812f31e4b6fSAnirudh Venkataramanan return ICE_ERR_RESET_FAILED; 813f31e4b6fSAnirudh Venkataramanan } 814f31e4b6fSAnirudh Venkataramanan 815f31e4b6fSAnirudh Venkataramanan return 0; 816f31e4b6fSAnirudh Venkataramanan } 817f31e4b6fSAnirudh Venkataramanan 818f31e4b6fSAnirudh Venkataramanan /** 819f31e4b6fSAnirudh Venkataramanan * ice_pf_reset - Reset the PF 820f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 821f31e4b6fSAnirudh Venkataramanan * 822f31e4b6fSAnirudh Venkataramanan * If a global reset has been triggered, this function checks 823f31e4b6fSAnirudh Venkataramanan * for its completion and then issues the PF reset 824f31e4b6fSAnirudh Venkataramanan */ 825f31e4b6fSAnirudh Venkataramanan static enum ice_status ice_pf_reset(struct ice_hw *hw) 826f31e4b6fSAnirudh Venkataramanan { 827f31e4b6fSAnirudh Venkataramanan u32 cnt, reg; 828f31e4b6fSAnirudh Venkataramanan 829f31e4b6fSAnirudh Venkataramanan /* If at function entry a global reset was already in progress, i.e. 830f31e4b6fSAnirudh Venkataramanan * state is not 'device active' or any of the reset done bits are not 831f31e4b6fSAnirudh Venkataramanan * set in GLNVM_ULD, there is no need for a PF Reset; poll until the 832f31e4b6fSAnirudh Venkataramanan * global reset is done. 833f31e4b6fSAnirudh Venkataramanan */ 834f31e4b6fSAnirudh Venkataramanan if ((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) || 835f31e4b6fSAnirudh Venkataramanan (rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK) ^ ICE_RESET_DONE_MASK) { 836f31e4b6fSAnirudh Venkataramanan /* poll on global reset currently in progress until done */ 837f31e4b6fSAnirudh Venkataramanan if (ice_check_reset(hw)) 838f31e4b6fSAnirudh Venkataramanan return ICE_ERR_RESET_FAILED; 839f31e4b6fSAnirudh Venkataramanan 840f31e4b6fSAnirudh Venkataramanan return 0; 841f31e4b6fSAnirudh Venkataramanan } 842f31e4b6fSAnirudh Venkataramanan 843f31e4b6fSAnirudh Venkataramanan /* Reset the PF */ 844f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, PFGEN_CTRL); 845f31e4b6fSAnirudh Venkataramanan 846f31e4b6fSAnirudh Venkataramanan wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M)); 847f31e4b6fSAnirudh Venkataramanan 848f31e4b6fSAnirudh Venkataramanan for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { 849f31e4b6fSAnirudh Venkataramanan reg = rd32(hw, PFGEN_CTRL); 850f31e4b6fSAnirudh Venkataramanan if (!(reg & PFGEN_CTRL_PFSWR_M)) 851f31e4b6fSAnirudh Venkataramanan break; 852f31e4b6fSAnirudh Venkataramanan 853f31e4b6fSAnirudh Venkataramanan mdelay(1); 854f31e4b6fSAnirudh Venkataramanan } 855f31e4b6fSAnirudh Venkataramanan 856f31e4b6fSAnirudh Venkataramanan if (cnt == ICE_PF_RESET_WAIT_COUNT) { 857f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 858f31e4b6fSAnirudh Venkataramanan "PF reset polling failed to complete.\n"); 859f31e4b6fSAnirudh Venkataramanan return ICE_ERR_RESET_FAILED; 860f31e4b6fSAnirudh Venkataramanan } 861f31e4b6fSAnirudh Venkataramanan 862f31e4b6fSAnirudh Venkataramanan return 0; 863f31e4b6fSAnirudh Venkataramanan } 864f31e4b6fSAnirudh Venkataramanan 865f31e4b6fSAnirudh Venkataramanan /** 866f31e4b6fSAnirudh Venkataramanan * ice_reset - Perform different types of reset 867f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hardware structure 868f31e4b6fSAnirudh Venkataramanan * @req: reset request 869f31e4b6fSAnirudh Venkataramanan * 870f31e4b6fSAnirudh Venkataramanan * This function triggers a reset as specified by the req parameter. 871f31e4b6fSAnirudh Venkataramanan * 872f31e4b6fSAnirudh Venkataramanan * Note: 873f31e4b6fSAnirudh Venkataramanan * If anything other than a PF reset is triggered, PXE mode is restored. 874f31e4b6fSAnirudh Venkataramanan * This has to be cleared using ice_clear_pxe_mode again, once the AQ 875f31e4b6fSAnirudh Venkataramanan * interface has been restored in the rebuild flow. 876f31e4b6fSAnirudh Venkataramanan */ 877f31e4b6fSAnirudh Venkataramanan enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) 878f31e4b6fSAnirudh Venkataramanan { 879f31e4b6fSAnirudh Venkataramanan u32 val = 0; 880f31e4b6fSAnirudh Venkataramanan 881f31e4b6fSAnirudh Venkataramanan switch (req) { 882f31e4b6fSAnirudh Venkataramanan case ICE_RESET_PFR: 883f31e4b6fSAnirudh Venkataramanan return ice_pf_reset(hw); 884f31e4b6fSAnirudh Venkataramanan case ICE_RESET_CORER: 885f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, "CoreR requested\n"); 886f31e4b6fSAnirudh Venkataramanan val = GLGEN_RTRIG_CORER_M; 887f31e4b6fSAnirudh Venkataramanan break; 888f31e4b6fSAnirudh Venkataramanan case ICE_RESET_GLOBR: 889f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, "GlobalR requested\n"); 890f31e4b6fSAnirudh Venkataramanan val = GLGEN_RTRIG_GLOBR_M; 891f31e4b6fSAnirudh Venkataramanan break; 8920f9d5027SAnirudh Venkataramanan default: 8930f9d5027SAnirudh Venkataramanan return ICE_ERR_PARAM; 894f31e4b6fSAnirudh Venkataramanan } 895f31e4b6fSAnirudh Venkataramanan 896f31e4b6fSAnirudh Venkataramanan val |= rd32(hw, GLGEN_RTRIG); 897f31e4b6fSAnirudh Venkataramanan wr32(hw, GLGEN_RTRIG, val); 898f31e4b6fSAnirudh Venkataramanan ice_flush(hw); 899f31e4b6fSAnirudh Venkataramanan 900f31e4b6fSAnirudh Venkataramanan /* wait for the FW to be ready */ 901f31e4b6fSAnirudh Venkataramanan return ice_check_reset(hw); 902f31e4b6fSAnirudh Venkataramanan } 903f31e4b6fSAnirudh Venkataramanan 9047ec59eeaSAnirudh Venkataramanan /** 905cdedef59SAnirudh Venkataramanan * ice_copy_rxq_ctx_to_hw 906cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 907cdedef59SAnirudh Venkataramanan * @ice_rxq_ctx: pointer to the rxq context 908cdedef59SAnirudh Venkataramanan * @rxq_index: the index of the rx queue 909cdedef59SAnirudh Venkataramanan * 910cdedef59SAnirudh Venkataramanan * Copies rxq context from dense structure to hw register space 911cdedef59SAnirudh Venkataramanan */ 912cdedef59SAnirudh Venkataramanan static enum ice_status 913cdedef59SAnirudh Venkataramanan ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index) 914cdedef59SAnirudh Venkataramanan { 915cdedef59SAnirudh Venkataramanan u8 i; 916cdedef59SAnirudh Venkataramanan 917cdedef59SAnirudh Venkataramanan if (!ice_rxq_ctx) 918cdedef59SAnirudh Venkataramanan return ICE_ERR_BAD_PTR; 919cdedef59SAnirudh Venkataramanan 920cdedef59SAnirudh Venkataramanan if (rxq_index > QRX_CTRL_MAX_INDEX) 921cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 922cdedef59SAnirudh Venkataramanan 923cdedef59SAnirudh Venkataramanan /* Copy each dword separately to hw */ 924cdedef59SAnirudh Venkataramanan for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) { 925cdedef59SAnirudh Venkataramanan wr32(hw, QRX_CONTEXT(i, rxq_index), 926cdedef59SAnirudh Venkataramanan *((u32 *)(ice_rxq_ctx + (i * sizeof(u32))))); 927cdedef59SAnirudh Venkataramanan 928cdedef59SAnirudh Venkataramanan ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, 929cdedef59SAnirudh Venkataramanan *((u32 *)(ice_rxq_ctx + (i * sizeof(u32))))); 930cdedef59SAnirudh Venkataramanan } 931cdedef59SAnirudh Venkataramanan 932cdedef59SAnirudh Venkataramanan return 0; 933cdedef59SAnirudh Venkataramanan } 934cdedef59SAnirudh Venkataramanan 935cdedef59SAnirudh Venkataramanan /* LAN Rx Queue Context */ 936cdedef59SAnirudh Venkataramanan static const struct ice_ctx_ele ice_rlan_ctx_info[] = { 937cdedef59SAnirudh Venkataramanan /* Field Width LSB */ 938cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, head, 13, 0), 939cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, cpuid, 8, 13), 940cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, base, 57, 32), 941cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, qlen, 13, 89), 942cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dbuf, 7, 102), 943cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hbuf, 5, 109), 944cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dtype, 2, 114), 945cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, dsize, 1, 116), 946cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, crcstrip, 1, 117), 947cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, l2tsel, 1, 119), 948cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hsplit_0, 4, 120), 949cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, hsplit_1, 2, 124), 950cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, showiv, 1, 127), 951cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, rxmax, 14, 174), 952cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphrdesc_ena, 1, 193), 953cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphwdesc_ena, 1, 194), 954cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphdata_ena, 1, 195), 955cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, tphhead_ena, 1, 196), 956cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_rlan_ctx, lrxqthresh, 3, 198), 957cdedef59SAnirudh Venkataramanan { 0 } 958cdedef59SAnirudh Venkataramanan }; 959cdedef59SAnirudh Venkataramanan 960cdedef59SAnirudh Venkataramanan /** 961cdedef59SAnirudh Venkataramanan * ice_write_rxq_ctx 962cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 963cdedef59SAnirudh Venkataramanan * @rlan_ctx: pointer to the rxq context 964cdedef59SAnirudh Venkataramanan * @rxq_index: the index of the rx queue 965cdedef59SAnirudh Venkataramanan * 966cdedef59SAnirudh Venkataramanan * Converts rxq context from sparse to dense structure and then writes 967cdedef59SAnirudh Venkataramanan * it to hw register space 968cdedef59SAnirudh Venkataramanan */ 969cdedef59SAnirudh Venkataramanan enum ice_status 970cdedef59SAnirudh Venkataramanan ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, 971cdedef59SAnirudh Venkataramanan u32 rxq_index) 972cdedef59SAnirudh Venkataramanan { 973cdedef59SAnirudh Venkataramanan u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 }; 974cdedef59SAnirudh Venkataramanan 975cdedef59SAnirudh Venkataramanan ice_set_ctx((u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info); 976cdedef59SAnirudh Venkataramanan return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index); 977cdedef59SAnirudh Venkataramanan } 978cdedef59SAnirudh Venkataramanan 979cdedef59SAnirudh Venkataramanan /* LAN Tx Queue Context */ 980cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele ice_tlan_ctx_info[] = { 981cdedef59SAnirudh Venkataramanan /* Field Width LSB */ 982cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, base, 57, 0), 983cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, port_num, 3, 57), 984cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cgd_num, 5, 60), 985cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, pf_num, 3, 65), 986cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, vmvf_num, 10, 68), 987cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, vmvf_type, 2, 78), 988cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, src_vsi, 10, 80), 989cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tsyn_ena, 1, 90), 990cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, alt_vlan, 1, 92), 991cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cpuid, 8, 93), 992cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, wb_mode, 1, 101), 993cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphrd_desc, 1, 102), 994cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphrd, 1, 103), 995cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tphwr_desc, 1, 104), 996cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cmpq_id, 9, 105), 997cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, qnum_in_func, 14, 114), 998cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, itr_notification_mode, 1, 128), 999cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, adjust_prof_id, 6, 129), 1000cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, qlen, 13, 135), 1001cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, quanta_prof_idx, 4, 148), 1002cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tso_ena, 1, 152), 1003cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, tso_qnum, 11, 153), 1004cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, legacy_int, 1, 164), 1005cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, drop_ena, 1, 165), 1006cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx, 2, 166), 1007cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx, 3, 168), 1008cdedef59SAnirudh Venkataramanan ICE_CTX_STORE(ice_tlan_ctx, int_q_state, 110, 171), 1009cdedef59SAnirudh Venkataramanan { 0 } 1010cdedef59SAnirudh Venkataramanan }; 1011cdedef59SAnirudh Venkataramanan 1012cdedef59SAnirudh Venkataramanan /** 10137ec59eeaSAnirudh Venkataramanan * ice_debug_cq 10147ec59eeaSAnirudh Venkataramanan * @hw: pointer to the hardware structure 10157ec59eeaSAnirudh Venkataramanan * @mask: debug mask 10167ec59eeaSAnirudh Venkataramanan * @desc: pointer to control queue descriptor 10177ec59eeaSAnirudh Venkataramanan * @buf: pointer to command buffer 10187ec59eeaSAnirudh Venkataramanan * @buf_len: max length of buf 10197ec59eeaSAnirudh Venkataramanan * 10207ec59eeaSAnirudh Venkataramanan * Dumps debug log about control command with descriptor contents. 10217ec59eeaSAnirudh Venkataramanan */ 10227ec59eeaSAnirudh Venkataramanan void ice_debug_cq(struct ice_hw *hw, u32 __maybe_unused mask, void *desc, 10237ec59eeaSAnirudh Venkataramanan void *buf, u16 buf_len) 10247ec59eeaSAnirudh Venkataramanan { 10257ec59eeaSAnirudh Venkataramanan struct ice_aq_desc *cq_desc = (struct ice_aq_desc *)desc; 10267ec59eeaSAnirudh Venkataramanan u16 len; 10277ec59eeaSAnirudh Venkataramanan 10287ec59eeaSAnirudh Venkataramanan #ifndef CONFIG_DYNAMIC_DEBUG 10297ec59eeaSAnirudh Venkataramanan if (!(mask & hw->debug_mask)) 10307ec59eeaSAnirudh Venkataramanan return; 10317ec59eeaSAnirudh Venkataramanan #endif 10327ec59eeaSAnirudh Venkataramanan 10337ec59eeaSAnirudh Venkataramanan if (!desc) 10347ec59eeaSAnirudh Venkataramanan return; 10357ec59eeaSAnirudh Venkataramanan 10367ec59eeaSAnirudh Venkataramanan len = le16_to_cpu(cq_desc->datalen); 10377ec59eeaSAnirudh Venkataramanan 10387ec59eeaSAnirudh Venkataramanan ice_debug(hw, mask, 10397ec59eeaSAnirudh Venkataramanan "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n", 10407ec59eeaSAnirudh Venkataramanan le16_to_cpu(cq_desc->opcode), 10417ec59eeaSAnirudh Venkataramanan le16_to_cpu(cq_desc->flags), 10427ec59eeaSAnirudh Venkataramanan le16_to_cpu(cq_desc->datalen), le16_to_cpu(cq_desc->retval)); 10437ec59eeaSAnirudh Venkataramanan ice_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n", 10447ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->cookie_high), 10457ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->cookie_low)); 10467ec59eeaSAnirudh Venkataramanan ice_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n", 10477ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->params.generic.param0), 10487ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->params.generic.param1)); 10497ec59eeaSAnirudh Venkataramanan ice_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n", 10507ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->params.generic.addr_high), 10517ec59eeaSAnirudh Venkataramanan le32_to_cpu(cq_desc->params.generic.addr_low)); 10527ec59eeaSAnirudh Venkataramanan if (buf && cq_desc->datalen != 0) { 10537ec59eeaSAnirudh Venkataramanan ice_debug(hw, mask, "Buffer:\n"); 10547ec59eeaSAnirudh Venkataramanan if (buf_len < len) 10557ec59eeaSAnirudh Venkataramanan len = buf_len; 10567ec59eeaSAnirudh Venkataramanan 10577ec59eeaSAnirudh Venkataramanan ice_debug_array(hw, mask, 16, 1, (u8 *)buf, len); 10587ec59eeaSAnirudh Venkataramanan } 10597ec59eeaSAnirudh Venkataramanan } 10607ec59eeaSAnirudh Venkataramanan 10617ec59eeaSAnirudh Venkataramanan /* FW Admin Queue command wrappers */ 10627ec59eeaSAnirudh Venkataramanan 10637ec59eeaSAnirudh Venkataramanan /** 10647ec59eeaSAnirudh Venkataramanan * ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue 10657ec59eeaSAnirudh Venkataramanan * @hw: pointer to the hw struct 10667ec59eeaSAnirudh Venkataramanan * @desc: descriptor describing the command 10677ec59eeaSAnirudh Venkataramanan * @buf: buffer to use for indirect commands (NULL for direct commands) 10687ec59eeaSAnirudh Venkataramanan * @buf_size: size of buffer for indirect commands (0 for direct commands) 10697ec59eeaSAnirudh Venkataramanan * @cd: pointer to command details structure 10707ec59eeaSAnirudh Venkataramanan * 10717ec59eeaSAnirudh Venkataramanan * Helper function to send FW Admin Queue commands to the FW Admin Queue. 10727ec59eeaSAnirudh Venkataramanan */ 10737ec59eeaSAnirudh Venkataramanan enum ice_status 10747ec59eeaSAnirudh Venkataramanan ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf, 10757ec59eeaSAnirudh Venkataramanan u16 buf_size, struct ice_sq_cd *cd) 10767ec59eeaSAnirudh Venkataramanan { 10777ec59eeaSAnirudh Venkataramanan return ice_sq_send_cmd(hw, &hw->adminq, desc, buf, buf_size, cd); 10787ec59eeaSAnirudh Venkataramanan } 10797ec59eeaSAnirudh Venkataramanan 10807ec59eeaSAnirudh Venkataramanan /** 10817ec59eeaSAnirudh Venkataramanan * ice_aq_get_fw_ver 10827ec59eeaSAnirudh Venkataramanan * @hw: pointer to the hw struct 10837ec59eeaSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 10847ec59eeaSAnirudh Venkataramanan * 10857ec59eeaSAnirudh Venkataramanan * Get the firmware version (0x0001) from the admin queue commands 10867ec59eeaSAnirudh Venkataramanan */ 10877ec59eeaSAnirudh Venkataramanan enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd) 10887ec59eeaSAnirudh Venkataramanan { 10897ec59eeaSAnirudh Venkataramanan struct ice_aqc_get_ver *resp; 10907ec59eeaSAnirudh Venkataramanan struct ice_aq_desc desc; 10917ec59eeaSAnirudh Venkataramanan enum ice_status status; 10927ec59eeaSAnirudh Venkataramanan 10937ec59eeaSAnirudh Venkataramanan resp = &desc.params.get_ver; 10947ec59eeaSAnirudh Venkataramanan 10957ec59eeaSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_ver); 10967ec59eeaSAnirudh Venkataramanan 10977ec59eeaSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 10987ec59eeaSAnirudh Venkataramanan 10997ec59eeaSAnirudh Venkataramanan if (!status) { 11007ec59eeaSAnirudh Venkataramanan hw->fw_branch = resp->fw_branch; 11017ec59eeaSAnirudh Venkataramanan hw->fw_maj_ver = resp->fw_major; 11027ec59eeaSAnirudh Venkataramanan hw->fw_min_ver = resp->fw_minor; 11037ec59eeaSAnirudh Venkataramanan hw->fw_patch = resp->fw_patch; 11047ec59eeaSAnirudh Venkataramanan hw->fw_build = le32_to_cpu(resp->fw_build); 11057ec59eeaSAnirudh Venkataramanan hw->api_branch = resp->api_branch; 11067ec59eeaSAnirudh Venkataramanan hw->api_maj_ver = resp->api_major; 11077ec59eeaSAnirudh Venkataramanan hw->api_min_ver = resp->api_minor; 11087ec59eeaSAnirudh Venkataramanan hw->api_patch = resp->api_patch; 11097ec59eeaSAnirudh Venkataramanan } 11107ec59eeaSAnirudh Venkataramanan 11117ec59eeaSAnirudh Venkataramanan return status; 11127ec59eeaSAnirudh Venkataramanan } 11137ec59eeaSAnirudh Venkataramanan 11147ec59eeaSAnirudh Venkataramanan /** 11157ec59eeaSAnirudh Venkataramanan * ice_aq_q_shutdown 11167ec59eeaSAnirudh Venkataramanan * @hw: pointer to the hw struct 11177ec59eeaSAnirudh Venkataramanan * @unloading: is the driver unloading itself 11187ec59eeaSAnirudh Venkataramanan * 11197ec59eeaSAnirudh Venkataramanan * Tell the Firmware that we're shutting down the AdminQ and whether 11207ec59eeaSAnirudh Venkataramanan * or not the driver is unloading as well (0x0003). 11217ec59eeaSAnirudh Venkataramanan */ 11227ec59eeaSAnirudh Venkataramanan enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading) 11237ec59eeaSAnirudh Venkataramanan { 11247ec59eeaSAnirudh Venkataramanan struct ice_aqc_q_shutdown *cmd; 11257ec59eeaSAnirudh Venkataramanan struct ice_aq_desc desc; 11267ec59eeaSAnirudh Venkataramanan 11277ec59eeaSAnirudh Venkataramanan cmd = &desc.params.q_shutdown; 11287ec59eeaSAnirudh Venkataramanan 11297ec59eeaSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_q_shutdown); 11307ec59eeaSAnirudh Venkataramanan 11317ec59eeaSAnirudh Venkataramanan if (unloading) 11327ec59eeaSAnirudh Venkataramanan cmd->driver_unloading = cpu_to_le32(ICE_AQC_DRIVER_UNLOADING); 11337ec59eeaSAnirudh Venkataramanan 11347ec59eeaSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 11357ec59eeaSAnirudh Venkataramanan } 1136f31e4b6fSAnirudh Venkataramanan 1137f31e4b6fSAnirudh Venkataramanan /** 1138f31e4b6fSAnirudh Venkataramanan * ice_aq_req_res 1139f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hw struct 1140f31e4b6fSAnirudh Venkataramanan * @res: resource id 1141f31e4b6fSAnirudh Venkataramanan * @access: access type 1142f31e4b6fSAnirudh Venkataramanan * @sdp_number: resource number 1143f31e4b6fSAnirudh Venkataramanan * @timeout: the maximum time in ms that the driver may hold the resource 1144f31e4b6fSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1145f31e4b6fSAnirudh Venkataramanan * 1146ff2b1321SDan Nowlin * Requests common resource using the admin queue commands (0x0008). 1147ff2b1321SDan Nowlin * When attempting to acquire the Global Config Lock, the driver can 1148ff2b1321SDan Nowlin * learn of three states: 1149ff2b1321SDan Nowlin * 1) ICE_SUCCESS - acquired lock, and can perform download package 1150ff2b1321SDan Nowlin * 2) ICE_ERR_AQ_ERROR - did not get lock, driver should fail to load 1151ff2b1321SDan Nowlin * 3) ICE_ERR_AQ_NO_WORK - did not get lock, but another driver has 1152ff2b1321SDan Nowlin * successfully downloaded the package; the driver does 1153ff2b1321SDan Nowlin * not have to download the package and can continue 1154ff2b1321SDan Nowlin * loading 1155ff2b1321SDan Nowlin * 1156ff2b1321SDan Nowlin * Note that if the caller is in an acquire lock, perform action, release lock 1157ff2b1321SDan Nowlin * phase of operation, it is possible that the FW may detect a timeout and issue 1158ff2b1321SDan Nowlin * a CORER. In this case, the driver will receive a CORER interrupt and will 1159ff2b1321SDan Nowlin * have to determine its cause. The calling thread that is handling this flow 1160ff2b1321SDan Nowlin * will likely get an error propagated back to it indicating the Download 1161ff2b1321SDan Nowlin * Package, Update Package or the Release Resource AQ commands timed out. 1162f31e4b6fSAnirudh Venkataramanan */ 1163f31e4b6fSAnirudh Venkataramanan static enum ice_status 1164f31e4b6fSAnirudh Venkataramanan ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res, 1165f31e4b6fSAnirudh Venkataramanan enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout, 1166f31e4b6fSAnirudh Venkataramanan struct ice_sq_cd *cd) 1167f31e4b6fSAnirudh Venkataramanan { 1168f31e4b6fSAnirudh Venkataramanan struct ice_aqc_req_res *cmd_resp; 1169f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 1170f31e4b6fSAnirudh Venkataramanan enum ice_status status; 1171f31e4b6fSAnirudh Venkataramanan 1172f31e4b6fSAnirudh Venkataramanan cmd_resp = &desc.params.res_owner; 1173f31e4b6fSAnirudh Venkataramanan 1174f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_req_res); 1175f31e4b6fSAnirudh Venkataramanan 1176f31e4b6fSAnirudh Venkataramanan cmd_resp->res_id = cpu_to_le16(res); 1177f31e4b6fSAnirudh Venkataramanan cmd_resp->access_type = cpu_to_le16(access); 1178f31e4b6fSAnirudh Venkataramanan cmd_resp->res_number = cpu_to_le32(sdp_number); 1179ff2b1321SDan Nowlin cmd_resp->timeout = cpu_to_le32(*timeout); 1180ff2b1321SDan Nowlin *timeout = 0; 1181f31e4b6fSAnirudh Venkataramanan 1182f31e4b6fSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 1183ff2b1321SDan Nowlin 1184f31e4b6fSAnirudh Venkataramanan /* The completion specifies the maximum time in ms that the driver 1185f31e4b6fSAnirudh Venkataramanan * may hold the resource in the Timeout field. 1186ff2b1321SDan Nowlin */ 1187ff2b1321SDan Nowlin 1188ff2b1321SDan Nowlin /* Global config lock response utilizes an additional status field. 1189ff2b1321SDan Nowlin * 1190ff2b1321SDan Nowlin * If the Global config lock resource is held by some other driver, the 1191ff2b1321SDan Nowlin * command completes with ICE_AQ_RES_GLBL_IN_PROG in the status field 1192ff2b1321SDan Nowlin * and the timeout field indicates the maximum time the current owner 1193ff2b1321SDan Nowlin * of the resource has to free it. 1194ff2b1321SDan Nowlin */ 1195ff2b1321SDan Nowlin if (res == ICE_GLOBAL_CFG_LOCK_RES_ID) { 1196ff2b1321SDan Nowlin if (le16_to_cpu(cmd_resp->status) == ICE_AQ_RES_GLBL_SUCCESS) { 1197ff2b1321SDan Nowlin *timeout = le32_to_cpu(cmd_resp->timeout); 1198ff2b1321SDan Nowlin return 0; 1199ff2b1321SDan Nowlin } else if (le16_to_cpu(cmd_resp->status) == 1200ff2b1321SDan Nowlin ICE_AQ_RES_GLBL_IN_PROG) { 1201ff2b1321SDan Nowlin *timeout = le32_to_cpu(cmd_resp->timeout); 1202ff2b1321SDan Nowlin return ICE_ERR_AQ_ERROR; 1203ff2b1321SDan Nowlin } else if (le16_to_cpu(cmd_resp->status) == 1204ff2b1321SDan Nowlin ICE_AQ_RES_GLBL_DONE) { 1205ff2b1321SDan Nowlin return ICE_ERR_AQ_NO_WORK; 1206ff2b1321SDan Nowlin } 1207ff2b1321SDan Nowlin 1208ff2b1321SDan Nowlin /* invalid FW response, force a timeout immediately */ 1209ff2b1321SDan Nowlin *timeout = 0; 1210ff2b1321SDan Nowlin return ICE_ERR_AQ_ERROR; 1211ff2b1321SDan Nowlin } 1212ff2b1321SDan Nowlin 1213ff2b1321SDan Nowlin /* If the resource is held by some other driver, the command completes 1214ff2b1321SDan Nowlin * with a busy return value and the timeout field indicates the maximum 1215ff2b1321SDan Nowlin * time the current owner of the resource has to free it. 1216f31e4b6fSAnirudh Venkataramanan */ 1217f31e4b6fSAnirudh Venkataramanan if (!status || hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY) 1218f31e4b6fSAnirudh Venkataramanan *timeout = le32_to_cpu(cmd_resp->timeout); 1219f31e4b6fSAnirudh Venkataramanan 1220f31e4b6fSAnirudh Venkataramanan return status; 1221f31e4b6fSAnirudh Venkataramanan } 1222f31e4b6fSAnirudh Venkataramanan 1223f31e4b6fSAnirudh Venkataramanan /** 1224f31e4b6fSAnirudh Venkataramanan * ice_aq_release_res 1225f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hw struct 1226f31e4b6fSAnirudh Venkataramanan * @res: resource id 1227f31e4b6fSAnirudh Venkataramanan * @sdp_number: resource number 1228f31e4b6fSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1229f31e4b6fSAnirudh Venkataramanan * 1230f31e4b6fSAnirudh Venkataramanan * release common resource using the admin queue commands (0x0009) 1231f31e4b6fSAnirudh Venkataramanan */ 1232f31e4b6fSAnirudh Venkataramanan static enum ice_status 1233f31e4b6fSAnirudh Venkataramanan ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number, 1234f31e4b6fSAnirudh Venkataramanan struct ice_sq_cd *cd) 1235f31e4b6fSAnirudh Venkataramanan { 1236f31e4b6fSAnirudh Venkataramanan struct ice_aqc_req_res *cmd; 1237f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 1238f31e4b6fSAnirudh Venkataramanan 1239f31e4b6fSAnirudh Venkataramanan cmd = &desc.params.res_owner; 1240f31e4b6fSAnirudh Venkataramanan 1241f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_release_res); 1242f31e4b6fSAnirudh Venkataramanan 1243f31e4b6fSAnirudh Venkataramanan cmd->res_id = cpu_to_le16(res); 1244f31e4b6fSAnirudh Venkataramanan cmd->res_number = cpu_to_le32(sdp_number); 1245f31e4b6fSAnirudh Venkataramanan 1246f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 1247f31e4b6fSAnirudh Venkataramanan } 1248f31e4b6fSAnirudh Venkataramanan 1249f31e4b6fSAnirudh Venkataramanan /** 1250f31e4b6fSAnirudh Venkataramanan * ice_acquire_res 1251f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 1252f31e4b6fSAnirudh Venkataramanan * @res: resource id 1253f31e4b6fSAnirudh Venkataramanan * @access: access type (read or write) 1254ff2b1321SDan Nowlin * @timeout: timeout in milliseconds 1255f31e4b6fSAnirudh Venkataramanan * 1256f31e4b6fSAnirudh Venkataramanan * This function will attempt to acquire the ownership of a resource. 1257f31e4b6fSAnirudh Venkataramanan */ 1258f31e4b6fSAnirudh Venkataramanan enum ice_status 1259f31e4b6fSAnirudh Venkataramanan ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res, 1260ff2b1321SDan Nowlin enum ice_aq_res_access_type access, u32 timeout) 1261f31e4b6fSAnirudh Venkataramanan { 1262f31e4b6fSAnirudh Venkataramanan #define ICE_RES_POLLING_DELAY_MS 10 1263f31e4b6fSAnirudh Venkataramanan u32 delay = ICE_RES_POLLING_DELAY_MS; 1264ff2b1321SDan Nowlin u32 time_left = timeout; 1265f31e4b6fSAnirudh Venkataramanan enum ice_status status; 1266f31e4b6fSAnirudh Venkataramanan 1267f31e4b6fSAnirudh Venkataramanan status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL); 1268f31e4b6fSAnirudh Venkataramanan 1269ff2b1321SDan Nowlin /* A return code of ICE_ERR_AQ_NO_WORK means that another driver has 1270ff2b1321SDan Nowlin * previously acquired the resource and performed any necessary updates; 1271ff2b1321SDan Nowlin * in this case the caller does not obtain the resource and has no 1272ff2b1321SDan Nowlin * further work to do. 1273f31e4b6fSAnirudh Venkataramanan */ 1274ff2b1321SDan Nowlin if (status == ICE_ERR_AQ_NO_WORK) 1275f31e4b6fSAnirudh Venkataramanan goto ice_acquire_res_exit; 1276f31e4b6fSAnirudh Venkataramanan 1277f31e4b6fSAnirudh Venkataramanan if (status) 1278f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_RES, 1279f31e4b6fSAnirudh Venkataramanan "resource %d acquire type %d failed.\n", res, access); 1280f31e4b6fSAnirudh Venkataramanan 1281f31e4b6fSAnirudh Venkataramanan /* If necessary, poll until the current lock owner timeouts */ 1282f31e4b6fSAnirudh Venkataramanan timeout = time_left; 1283f31e4b6fSAnirudh Venkataramanan while (status && timeout && time_left) { 1284f31e4b6fSAnirudh Venkataramanan mdelay(delay); 1285f31e4b6fSAnirudh Venkataramanan timeout = (timeout > delay) ? timeout - delay : 0; 1286f31e4b6fSAnirudh Venkataramanan status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL); 1287f31e4b6fSAnirudh Venkataramanan 1288ff2b1321SDan Nowlin if (status == ICE_ERR_AQ_NO_WORK) 1289f31e4b6fSAnirudh Venkataramanan /* lock free, but no work to do */ 1290f31e4b6fSAnirudh Venkataramanan break; 1291f31e4b6fSAnirudh Venkataramanan 1292f31e4b6fSAnirudh Venkataramanan if (!status) 1293f31e4b6fSAnirudh Venkataramanan /* lock acquired */ 1294f31e4b6fSAnirudh Venkataramanan break; 1295f31e4b6fSAnirudh Venkataramanan } 1296f31e4b6fSAnirudh Venkataramanan if (status && status != ICE_ERR_AQ_NO_WORK) 1297f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_RES, "resource acquire timed out.\n"); 1298f31e4b6fSAnirudh Venkataramanan 1299f31e4b6fSAnirudh Venkataramanan ice_acquire_res_exit: 1300f31e4b6fSAnirudh Venkataramanan if (status == ICE_ERR_AQ_NO_WORK) { 1301f31e4b6fSAnirudh Venkataramanan if (access == ICE_RES_WRITE) 1302f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_RES, 1303f31e4b6fSAnirudh Venkataramanan "resource indicates no work to do.\n"); 1304f31e4b6fSAnirudh Venkataramanan else 1305f31e4b6fSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_RES, 1306f31e4b6fSAnirudh Venkataramanan "Warning: ICE_ERR_AQ_NO_WORK not expected\n"); 1307f31e4b6fSAnirudh Venkataramanan } 1308f31e4b6fSAnirudh Venkataramanan return status; 1309f31e4b6fSAnirudh Venkataramanan } 1310f31e4b6fSAnirudh Venkataramanan 1311f31e4b6fSAnirudh Venkataramanan /** 1312f31e4b6fSAnirudh Venkataramanan * ice_release_res 1313f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the HW structure 1314f31e4b6fSAnirudh Venkataramanan * @res: resource id 1315f31e4b6fSAnirudh Venkataramanan * 1316f31e4b6fSAnirudh Venkataramanan * This function will release a resource using the proper Admin Command. 1317f31e4b6fSAnirudh Venkataramanan */ 1318f31e4b6fSAnirudh Venkataramanan void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res) 1319f31e4b6fSAnirudh Venkataramanan { 1320f31e4b6fSAnirudh Venkataramanan enum ice_status status; 1321f31e4b6fSAnirudh Venkataramanan u32 total_delay = 0; 1322f31e4b6fSAnirudh Venkataramanan 1323f31e4b6fSAnirudh Venkataramanan status = ice_aq_release_res(hw, res, 0, NULL); 1324f31e4b6fSAnirudh Venkataramanan 1325f31e4b6fSAnirudh Venkataramanan /* there are some rare cases when trying to release the resource 1326f31e4b6fSAnirudh Venkataramanan * results in an admin Q timeout, so handle them correctly 1327f31e4b6fSAnirudh Venkataramanan */ 1328f31e4b6fSAnirudh Venkataramanan while ((status == ICE_ERR_AQ_TIMEOUT) && 1329f31e4b6fSAnirudh Venkataramanan (total_delay < hw->adminq.sq_cmd_timeout)) { 1330f31e4b6fSAnirudh Venkataramanan mdelay(1); 1331f31e4b6fSAnirudh Venkataramanan status = ice_aq_release_res(hw, res, 0, NULL); 1332f31e4b6fSAnirudh Venkataramanan total_delay++; 1333f31e4b6fSAnirudh Venkataramanan } 1334f31e4b6fSAnirudh Venkataramanan } 1335f31e4b6fSAnirudh Venkataramanan 1336f31e4b6fSAnirudh Venkataramanan /** 13379c20346bSAnirudh Venkataramanan * ice_parse_caps - parse function/device capabilities 13389c20346bSAnirudh Venkataramanan * @hw: pointer to the hw struct 13399c20346bSAnirudh Venkataramanan * @buf: pointer to a buffer containing function/device capability records 13409c20346bSAnirudh Venkataramanan * @cap_count: number of capability records in the list 13419c20346bSAnirudh Venkataramanan * @opc: type of capabilities list to parse 13429c20346bSAnirudh Venkataramanan * 13439c20346bSAnirudh Venkataramanan * Helper function to parse function(0x000a)/device(0x000b) capabilities list. 13449c20346bSAnirudh Venkataramanan */ 13459c20346bSAnirudh Venkataramanan static void 13469c20346bSAnirudh Venkataramanan ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count, 13479c20346bSAnirudh Venkataramanan enum ice_adminq_opc opc) 13489c20346bSAnirudh Venkataramanan { 13499c20346bSAnirudh Venkataramanan struct ice_aqc_list_caps_elem *cap_resp; 13509c20346bSAnirudh Venkataramanan struct ice_hw_func_caps *func_p = NULL; 13519c20346bSAnirudh Venkataramanan struct ice_hw_dev_caps *dev_p = NULL; 13529c20346bSAnirudh Venkataramanan struct ice_hw_common_caps *caps; 13539c20346bSAnirudh Venkataramanan u32 i; 13549c20346bSAnirudh Venkataramanan 13559c20346bSAnirudh Venkataramanan if (!buf) 13569c20346bSAnirudh Venkataramanan return; 13579c20346bSAnirudh Venkataramanan 13589c20346bSAnirudh Venkataramanan cap_resp = (struct ice_aqc_list_caps_elem *)buf; 13599c20346bSAnirudh Venkataramanan 13609c20346bSAnirudh Venkataramanan if (opc == ice_aqc_opc_list_dev_caps) { 13619c20346bSAnirudh Venkataramanan dev_p = &hw->dev_caps; 13629c20346bSAnirudh Venkataramanan caps = &dev_p->common_cap; 13639c20346bSAnirudh Venkataramanan } else if (opc == ice_aqc_opc_list_func_caps) { 13649c20346bSAnirudh Venkataramanan func_p = &hw->func_caps; 13659c20346bSAnirudh Venkataramanan caps = &func_p->common_cap; 13669c20346bSAnirudh Venkataramanan } else { 13679c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n"); 13689c20346bSAnirudh Venkataramanan return; 13699c20346bSAnirudh Venkataramanan } 13709c20346bSAnirudh Venkataramanan 13719c20346bSAnirudh Venkataramanan for (i = 0; caps && i < cap_count; i++, cap_resp++) { 13729c20346bSAnirudh Venkataramanan u32 logical_id = le32_to_cpu(cap_resp->logical_id); 13739c20346bSAnirudh Venkataramanan u32 phys_id = le32_to_cpu(cap_resp->phys_id); 13749c20346bSAnirudh Venkataramanan u32 number = le32_to_cpu(cap_resp->number); 13759c20346bSAnirudh Venkataramanan u16 cap = le16_to_cpu(cap_resp->cap); 13769c20346bSAnirudh Venkataramanan 13779c20346bSAnirudh Venkataramanan switch (cap) { 13789c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_VSI: 13799c20346bSAnirudh Venkataramanan if (dev_p) { 13809c20346bSAnirudh Venkataramanan dev_p->num_vsi_allocd_to_host = number; 13819c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 13829c20346bSAnirudh Venkataramanan "HW caps: Dev.VSI cnt = %d\n", 13839c20346bSAnirudh Venkataramanan dev_p->num_vsi_allocd_to_host); 13849c20346bSAnirudh Venkataramanan } else if (func_p) { 13859c20346bSAnirudh Venkataramanan func_p->guaranteed_num_vsi = number; 13869c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 13879c20346bSAnirudh Venkataramanan "HW caps: Func.VSI cnt = %d\n", 13889c20346bSAnirudh Venkataramanan func_p->guaranteed_num_vsi); 13899c20346bSAnirudh Venkataramanan } 13909c20346bSAnirudh Venkataramanan break; 13919c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_RSS: 13929c20346bSAnirudh Venkataramanan caps->rss_table_size = number; 13939c20346bSAnirudh Venkataramanan caps->rss_table_entry_width = logical_id; 13949c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 13959c20346bSAnirudh Venkataramanan "HW caps: RSS table size = %d\n", 13969c20346bSAnirudh Venkataramanan caps->rss_table_size); 13979c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 13989c20346bSAnirudh Venkataramanan "HW caps: RSS table width = %d\n", 13999c20346bSAnirudh Venkataramanan caps->rss_table_entry_width); 14009c20346bSAnirudh Venkataramanan break; 14019c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_RXQS: 14029c20346bSAnirudh Venkataramanan caps->num_rxq = number; 14039c20346bSAnirudh Venkataramanan caps->rxq_first_id = phys_id; 14049c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14059c20346bSAnirudh Venkataramanan "HW caps: Num Rx Qs = %d\n", caps->num_rxq); 14069c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14079c20346bSAnirudh Venkataramanan "HW caps: Rx first queue ID = %d\n", 14089c20346bSAnirudh Venkataramanan caps->rxq_first_id); 14099c20346bSAnirudh Venkataramanan break; 14109c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_TXQS: 14119c20346bSAnirudh Venkataramanan caps->num_txq = number; 14129c20346bSAnirudh Venkataramanan caps->txq_first_id = phys_id; 14139c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14149c20346bSAnirudh Venkataramanan "HW caps: Num Tx Qs = %d\n", caps->num_txq); 14159c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14169c20346bSAnirudh Venkataramanan "HW caps: Tx first queue ID = %d\n", 14179c20346bSAnirudh Venkataramanan caps->txq_first_id); 14189c20346bSAnirudh Venkataramanan break; 14199c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_MSIX: 14209c20346bSAnirudh Venkataramanan caps->num_msix_vectors = number; 14219c20346bSAnirudh Venkataramanan caps->msix_vector_first_id = phys_id; 14229c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14239c20346bSAnirudh Venkataramanan "HW caps: MSIX vector count = %d\n", 14249c20346bSAnirudh Venkataramanan caps->num_msix_vectors); 14259c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14269c20346bSAnirudh Venkataramanan "HW caps: MSIX first vector index = %d\n", 14279c20346bSAnirudh Venkataramanan caps->msix_vector_first_id); 14289c20346bSAnirudh Venkataramanan break; 14299c20346bSAnirudh Venkataramanan case ICE_AQC_CAPS_MAX_MTU: 14309c20346bSAnirudh Venkataramanan caps->max_mtu = number; 14319c20346bSAnirudh Venkataramanan if (dev_p) 14329c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14339c20346bSAnirudh Venkataramanan "HW caps: Dev.MaxMTU = %d\n", 14349c20346bSAnirudh Venkataramanan caps->max_mtu); 14359c20346bSAnirudh Venkataramanan else if (func_p) 14369c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14379c20346bSAnirudh Venkataramanan "HW caps: func.MaxMTU = %d\n", 14389c20346bSAnirudh Venkataramanan caps->max_mtu); 14399c20346bSAnirudh Venkataramanan break; 14409c20346bSAnirudh Venkataramanan default: 14419c20346bSAnirudh Venkataramanan ice_debug(hw, ICE_DBG_INIT, 14429c20346bSAnirudh Venkataramanan "HW caps: Unknown capability[%d]: 0x%x\n", i, 14439c20346bSAnirudh Venkataramanan cap); 14449c20346bSAnirudh Venkataramanan break; 14459c20346bSAnirudh Venkataramanan } 14469c20346bSAnirudh Venkataramanan } 14479c20346bSAnirudh Venkataramanan } 14489c20346bSAnirudh Venkataramanan 14499c20346bSAnirudh Venkataramanan /** 14509c20346bSAnirudh Venkataramanan * ice_aq_discover_caps - query function/device capabilities 14519c20346bSAnirudh Venkataramanan * @hw: pointer to the hw struct 14529c20346bSAnirudh Venkataramanan * @buf: a virtual buffer to hold the capabilities 14539c20346bSAnirudh Venkataramanan * @buf_size: Size of the virtual buffer 14547d86cf38SAnirudh Venkataramanan * @cap_count: cap count needed if AQ err==ENOMEM 14559c20346bSAnirudh Venkataramanan * @opc: capabilities type to discover - pass in the command opcode 14569c20346bSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 14579c20346bSAnirudh Venkataramanan * 14589c20346bSAnirudh Venkataramanan * Get the function(0x000a)/device(0x000b) capabilities description from 14599c20346bSAnirudh Venkataramanan * the firmware. 14609c20346bSAnirudh Venkataramanan */ 14619c20346bSAnirudh Venkataramanan static enum ice_status 14627d86cf38SAnirudh Venkataramanan ice_aq_discover_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, 14639c20346bSAnirudh Venkataramanan enum ice_adminq_opc opc, struct ice_sq_cd *cd) 14649c20346bSAnirudh Venkataramanan { 14659c20346bSAnirudh Venkataramanan struct ice_aqc_list_caps *cmd; 14669c20346bSAnirudh Venkataramanan struct ice_aq_desc desc; 14679c20346bSAnirudh Venkataramanan enum ice_status status; 14689c20346bSAnirudh Venkataramanan 14699c20346bSAnirudh Venkataramanan cmd = &desc.params.get_cap; 14709c20346bSAnirudh Venkataramanan 14719c20346bSAnirudh Venkataramanan if (opc != ice_aqc_opc_list_func_caps && 14729c20346bSAnirudh Venkataramanan opc != ice_aqc_opc_list_dev_caps) 14739c20346bSAnirudh Venkataramanan return ICE_ERR_PARAM; 14749c20346bSAnirudh Venkataramanan 14759c20346bSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, opc); 14769c20346bSAnirudh Venkataramanan 14779c20346bSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 14789c20346bSAnirudh Venkataramanan if (!status) 14799c20346bSAnirudh Venkataramanan ice_parse_caps(hw, buf, le32_to_cpu(cmd->count), opc); 14807d86cf38SAnirudh Venkataramanan else if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOMEM) 14817d86cf38SAnirudh Venkataramanan *cap_count = 14827d86cf38SAnirudh Venkataramanan DIV_ROUND_UP(le16_to_cpu(desc.datalen), 14837d86cf38SAnirudh Venkataramanan sizeof(struct ice_aqc_list_caps_elem)); 14847d86cf38SAnirudh Venkataramanan return status; 14857d86cf38SAnirudh Venkataramanan } 14867d86cf38SAnirudh Venkataramanan 14877d86cf38SAnirudh Venkataramanan /** 14887d86cf38SAnirudh Venkataramanan * ice_discover_caps - get info about the HW 14897d86cf38SAnirudh Venkataramanan * @hw: pointer to the hardware structure 14907d86cf38SAnirudh Venkataramanan * @opc: capabilities type to discover - pass in the command opcode 14917d86cf38SAnirudh Venkataramanan */ 14927d86cf38SAnirudh Venkataramanan static enum ice_status ice_discover_caps(struct ice_hw *hw, 14937d86cf38SAnirudh Venkataramanan enum ice_adminq_opc opc) 14947d86cf38SAnirudh Venkataramanan { 14957d86cf38SAnirudh Venkataramanan enum ice_status status; 14967d86cf38SAnirudh Venkataramanan u32 cap_count; 14977d86cf38SAnirudh Venkataramanan u16 cbuf_len; 14987d86cf38SAnirudh Venkataramanan u8 retries; 14997d86cf38SAnirudh Venkataramanan 15007d86cf38SAnirudh Venkataramanan /* The driver doesn't know how many capabilities the device will return 15017d86cf38SAnirudh Venkataramanan * so the buffer size required isn't known ahead of time. The driver 15027d86cf38SAnirudh Venkataramanan * starts with cbuf_len and if this turns out to be insufficient, the 15037d86cf38SAnirudh Venkataramanan * device returns ICE_AQ_RC_ENOMEM and also the cap_count it needs. 15047d86cf38SAnirudh Venkataramanan * The driver then allocates the buffer based on the count and retries 15057d86cf38SAnirudh Venkataramanan * the operation. So it follows that the retry count is 2. 15067d86cf38SAnirudh Venkataramanan */ 15077d86cf38SAnirudh Venkataramanan #define ICE_GET_CAP_BUF_COUNT 40 15087d86cf38SAnirudh Venkataramanan #define ICE_GET_CAP_RETRY_COUNT 2 15097d86cf38SAnirudh Venkataramanan 15107d86cf38SAnirudh Venkataramanan cap_count = ICE_GET_CAP_BUF_COUNT; 15117d86cf38SAnirudh Venkataramanan retries = ICE_GET_CAP_RETRY_COUNT; 15127d86cf38SAnirudh Venkataramanan 15137d86cf38SAnirudh Venkataramanan do { 15147d86cf38SAnirudh Venkataramanan void *cbuf; 15157d86cf38SAnirudh Venkataramanan 15167d86cf38SAnirudh Venkataramanan cbuf_len = (u16)(cap_count * 15177d86cf38SAnirudh Venkataramanan sizeof(struct ice_aqc_list_caps_elem)); 15187d86cf38SAnirudh Venkataramanan cbuf = devm_kzalloc(ice_hw_to_dev(hw), cbuf_len, GFP_KERNEL); 15197d86cf38SAnirudh Venkataramanan if (!cbuf) 15207d86cf38SAnirudh Venkataramanan return ICE_ERR_NO_MEMORY; 15217d86cf38SAnirudh Venkataramanan 15227d86cf38SAnirudh Venkataramanan status = ice_aq_discover_caps(hw, cbuf, cbuf_len, &cap_count, 15237d86cf38SAnirudh Venkataramanan opc, NULL); 15247d86cf38SAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), cbuf); 15257d86cf38SAnirudh Venkataramanan 15267d86cf38SAnirudh Venkataramanan if (!status || hw->adminq.sq_last_status != ICE_AQ_RC_ENOMEM) 15277d86cf38SAnirudh Venkataramanan break; 15287d86cf38SAnirudh Venkataramanan 15297d86cf38SAnirudh Venkataramanan /* If ENOMEM is returned, try again with bigger buffer */ 15307d86cf38SAnirudh Venkataramanan } while (--retries); 15319c20346bSAnirudh Venkataramanan 15329c20346bSAnirudh Venkataramanan return status; 15339c20346bSAnirudh Venkataramanan } 15349c20346bSAnirudh Venkataramanan 15359c20346bSAnirudh Venkataramanan /** 15369c20346bSAnirudh Venkataramanan * ice_get_caps - get info about the HW 15379c20346bSAnirudh Venkataramanan * @hw: pointer to the hardware structure 15389c20346bSAnirudh Venkataramanan */ 15399c20346bSAnirudh Venkataramanan enum ice_status ice_get_caps(struct ice_hw *hw) 15409c20346bSAnirudh Venkataramanan { 15419c20346bSAnirudh Venkataramanan enum ice_status status; 15429c20346bSAnirudh Venkataramanan 15437d86cf38SAnirudh Venkataramanan status = ice_discover_caps(hw, ice_aqc_opc_list_dev_caps); 15447d86cf38SAnirudh Venkataramanan if (!status) 15457d86cf38SAnirudh Venkataramanan status = ice_discover_caps(hw, ice_aqc_opc_list_func_caps); 15469c20346bSAnirudh Venkataramanan 15479c20346bSAnirudh Venkataramanan return status; 15489c20346bSAnirudh Venkataramanan } 15499c20346bSAnirudh Venkataramanan 15509c20346bSAnirudh Venkataramanan /** 1551e94d4478SAnirudh Venkataramanan * ice_aq_manage_mac_write - manage MAC address write command 1552e94d4478SAnirudh Venkataramanan * @hw: pointer to the hw struct 1553e94d4478SAnirudh Venkataramanan * @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address 1554e94d4478SAnirudh Venkataramanan * @flags: flags to control write behavior 1555e94d4478SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1556e94d4478SAnirudh Venkataramanan * 1557e94d4478SAnirudh Venkataramanan * This function is used to write MAC address to the NVM (0x0108). 1558e94d4478SAnirudh Venkataramanan */ 1559e94d4478SAnirudh Venkataramanan enum ice_status 1560e94d4478SAnirudh Venkataramanan ice_aq_manage_mac_write(struct ice_hw *hw, u8 *mac_addr, u8 flags, 1561e94d4478SAnirudh Venkataramanan struct ice_sq_cd *cd) 1562e94d4478SAnirudh Venkataramanan { 1563e94d4478SAnirudh Venkataramanan struct ice_aqc_manage_mac_write *cmd; 1564e94d4478SAnirudh Venkataramanan struct ice_aq_desc desc; 1565e94d4478SAnirudh Venkataramanan 1566e94d4478SAnirudh Venkataramanan cmd = &desc.params.mac_write; 1567e94d4478SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_write); 1568e94d4478SAnirudh Venkataramanan 1569e94d4478SAnirudh Venkataramanan cmd->flags = flags; 1570e94d4478SAnirudh Venkataramanan 1571e94d4478SAnirudh Venkataramanan /* Prep values for flags, sah, sal */ 1572e94d4478SAnirudh Venkataramanan cmd->sah = htons(*((u16 *)mac_addr)); 1573e94d4478SAnirudh Venkataramanan cmd->sal = htonl(*((u32 *)(mac_addr + 2))); 1574e94d4478SAnirudh Venkataramanan 1575e94d4478SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 1576e94d4478SAnirudh Venkataramanan } 1577e94d4478SAnirudh Venkataramanan 1578e94d4478SAnirudh Venkataramanan /** 1579f31e4b6fSAnirudh Venkataramanan * ice_aq_clear_pxe_mode 1580f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hw struct 1581f31e4b6fSAnirudh Venkataramanan * 1582f31e4b6fSAnirudh Venkataramanan * Tell the firmware that the driver is taking over from PXE (0x0110). 1583f31e4b6fSAnirudh Venkataramanan */ 1584f31e4b6fSAnirudh Venkataramanan static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw) 1585f31e4b6fSAnirudh Venkataramanan { 1586f31e4b6fSAnirudh Venkataramanan struct ice_aq_desc desc; 1587f31e4b6fSAnirudh Venkataramanan 1588f31e4b6fSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pxe_mode); 1589f31e4b6fSAnirudh Venkataramanan desc.params.clear_pxe.rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT; 1590f31e4b6fSAnirudh Venkataramanan 1591f31e4b6fSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); 1592f31e4b6fSAnirudh Venkataramanan } 1593f31e4b6fSAnirudh Venkataramanan 1594f31e4b6fSAnirudh Venkataramanan /** 1595f31e4b6fSAnirudh Venkataramanan * ice_clear_pxe_mode - clear pxe operations mode 1596f31e4b6fSAnirudh Venkataramanan * @hw: pointer to the hw struct 1597f31e4b6fSAnirudh Venkataramanan * 1598f31e4b6fSAnirudh Venkataramanan * Make sure all PXE mode settings are cleared, including things 1599f31e4b6fSAnirudh Venkataramanan * like descriptor fetch/write-back mode. 1600f31e4b6fSAnirudh Venkataramanan */ 1601f31e4b6fSAnirudh Venkataramanan void ice_clear_pxe_mode(struct ice_hw *hw) 1602f31e4b6fSAnirudh Venkataramanan { 1603f31e4b6fSAnirudh Venkataramanan if (ice_check_sq_alive(hw, &hw->adminq)) 1604f31e4b6fSAnirudh Venkataramanan ice_aq_clear_pxe_mode(hw); 1605f31e4b6fSAnirudh Venkataramanan } 1606cdedef59SAnirudh Venkataramanan 1607cdedef59SAnirudh Venkataramanan /** 160848cb27f2SChinh Cao * ice_get_link_speed_based_on_phy_type - returns link speed 160948cb27f2SChinh Cao * @phy_type_low: lower part of phy_type 161048cb27f2SChinh Cao * 161148cb27f2SChinh Cao * This helper function will convert a phy_type_low to its corresponding link 161248cb27f2SChinh Cao * speed. 161348cb27f2SChinh Cao * Note: In the structure of phy_type_low, there should be one bit set, as 161448cb27f2SChinh Cao * this function will convert one phy type to its speed. 161548cb27f2SChinh Cao * If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned 161648cb27f2SChinh Cao * If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned 161748cb27f2SChinh Cao */ 161848cb27f2SChinh Cao static u16 161948cb27f2SChinh Cao ice_get_link_speed_based_on_phy_type(u64 phy_type_low) 162048cb27f2SChinh Cao { 162148cb27f2SChinh Cao u16 speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN; 162248cb27f2SChinh Cao 162348cb27f2SChinh Cao switch (phy_type_low) { 162448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_100BASE_TX: 162548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_100M_SGMII: 162648cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_100MB; 162748cb27f2SChinh Cao break; 162848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_T: 162948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_SX: 163048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_LX: 163148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1000BASE_KX: 163248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_1G_SGMII: 163348cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_1000MB; 163448cb27f2SChinh Cao break; 163548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_T: 163648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_X: 163748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_2500BASE_KX: 163848cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_2500MB; 163948cb27f2SChinh Cao break; 164048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_5GBASE_T: 164148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_5GBASE_KR: 164248cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_5GB; 164348cb27f2SChinh Cao break; 164448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_T: 164548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_DA: 164648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_SR: 164748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_LR: 164848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1: 164948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC: 165048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_10G_SFI_C2C: 165148cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_10GB; 165248cb27f2SChinh Cao break; 165348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_T: 165448cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR: 165548cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR_S: 165648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_CR1: 165748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_SR: 165848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_LR: 165948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR: 166048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR_S: 166148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25GBASE_KR1: 166248cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC: 166348cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_25G_AUI_C2C: 166448cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_25GB; 166548cb27f2SChinh Cao break; 166648cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_CR4: 166748cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_SR4: 166848cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_LR4: 166948cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40GBASE_KR4: 167048cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC: 167148cb27f2SChinh Cao case ICE_PHY_TYPE_LOW_40G_XLAUI: 167248cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_40GB; 167348cb27f2SChinh Cao break; 167448cb27f2SChinh Cao default: 167548cb27f2SChinh Cao speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN; 167648cb27f2SChinh Cao break; 167748cb27f2SChinh Cao } 167848cb27f2SChinh Cao 167948cb27f2SChinh Cao return speed_phy_type_low; 168048cb27f2SChinh Cao } 168148cb27f2SChinh Cao 168248cb27f2SChinh Cao /** 168348cb27f2SChinh Cao * ice_update_phy_type 168448cb27f2SChinh Cao * @phy_type_low: pointer to the lower part of phy_type 168548cb27f2SChinh Cao * @link_speeds_bitmap: targeted link speeds bitmap 168648cb27f2SChinh Cao * 168748cb27f2SChinh Cao * Note: For the link_speeds_bitmap structure, you can check it at 168848cb27f2SChinh Cao * [ice_aqc_get_link_status->link_speed]. Caller can pass in 168948cb27f2SChinh Cao * link_speeds_bitmap include multiple speeds. 169048cb27f2SChinh Cao * 169148cb27f2SChinh Cao * The value of phy_type_low will present a certain link speed. This helper 169248cb27f2SChinh Cao * function will turn on bits in the phy_type_low based on the value of 169348cb27f2SChinh Cao * link_speeds_bitmap input parameter. 169448cb27f2SChinh Cao */ 169548cb27f2SChinh Cao void ice_update_phy_type(u64 *phy_type_low, u16 link_speeds_bitmap) 169648cb27f2SChinh Cao { 169748cb27f2SChinh Cao u16 speed = ICE_AQ_LINK_SPEED_UNKNOWN; 169848cb27f2SChinh Cao u64 pt_low; 169948cb27f2SChinh Cao int index; 170048cb27f2SChinh Cao 170148cb27f2SChinh Cao /* We first check with low part of phy_type */ 170248cb27f2SChinh Cao for (index = 0; index <= ICE_PHY_TYPE_LOW_MAX_INDEX; index++) { 170348cb27f2SChinh Cao pt_low = BIT_ULL(index); 170448cb27f2SChinh Cao speed = ice_get_link_speed_based_on_phy_type(pt_low); 170548cb27f2SChinh Cao 170648cb27f2SChinh Cao if (link_speeds_bitmap & speed) 170748cb27f2SChinh Cao *phy_type_low |= BIT_ULL(index); 170848cb27f2SChinh Cao } 170948cb27f2SChinh Cao } 171048cb27f2SChinh Cao 171148cb27f2SChinh Cao /** 1712fcea6f3dSAnirudh Venkataramanan * ice_aq_set_phy_cfg 1713fcea6f3dSAnirudh Venkataramanan * @hw: pointer to the hw struct 1714fcea6f3dSAnirudh Venkataramanan * @lport: logical port number 1715fcea6f3dSAnirudh Venkataramanan * @cfg: structure with PHY configuration data to be set 1716fcea6f3dSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1717fcea6f3dSAnirudh Venkataramanan * 1718fcea6f3dSAnirudh Venkataramanan * Set the various PHY configuration parameters supported on the Port. 1719fcea6f3dSAnirudh Venkataramanan * One or more of the Set PHY config parameters may be ignored in an MFP 1720fcea6f3dSAnirudh Venkataramanan * mode as the PF may not have the privilege to set some of the PHY Config 1721fcea6f3dSAnirudh Venkataramanan * parameters. This status will be indicated by the command response (0x0601). 1722fcea6f3dSAnirudh Venkataramanan */ 172348cb27f2SChinh Cao enum ice_status 1724fcea6f3dSAnirudh Venkataramanan ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport, 1725fcea6f3dSAnirudh Venkataramanan struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd) 1726fcea6f3dSAnirudh Venkataramanan { 1727fcea6f3dSAnirudh Venkataramanan struct ice_aq_desc desc; 1728fcea6f3dSAnirudh Venkataramanan 1729fcea6f3dSAnirudh Venkataramanan if (!cfg) 1730fcea6f3dSAnirudh Venkataramanan return ICE_ERR_PARAM; 1731fcea6f3dSAnirudh Venkataramanan 1732fcea6f3dSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg); 173348cb27f2SChinh Cao desc.params.set_phy.lport_num = lport; 173448cb27f2SChinh Cao desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 1735fcea6f3dSAnirudh Venkataramanan 1736fcea6f3dSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd); 1737fcea6f3dSAnirudh Venkataramanan } 1738fcea6f3dSAnirudh Venkataramanan 1739fcea6f3dSAnirudh Venkataramanan /** 1740fcea6f3dSAnirudh Venkataramanan * ice_update_link_info - update status of the HW network link 1741fcea6f3dSAnirudh Venkataramanan * @pi: port info structure of the interested logical port 1742fcea6f3dSAnirudh Venkataramanan */ 1743fcea6f3dSAnirudh Venkataramanan static enum ice_status 1744fcea6f3dSAnirudh Venkataramanan ice_update_link_info(struct ice_port_info *pi) 1745fcea6f3dSAnirudh Venkataramanan { 1746fcea6f3dSAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps; 1747fcea6f3dSAnirudh Venkataramanan struct ice_phy_info *phy_info; 1748fcea6f3dSAnirudh Venkataramanan enum ice_status status; 1749fcea6f3dSAnirudh Venkataramanan struct ice_hw *hw; 1750fcea6f3dSAnirudh Venkataramanan 1751fcea6f3dSAnirudh Venkataramanan if (!pi) 1752fcea6f3dSAnirudh Venkataramanan return ICE_ERR_PARAM; 1753fcea6f3dSAnirudh Venkataramanan 1754fcea6f3dSAnirudh Venkataramanan hw = pi->hw; 1755fcea6f3dSAnirudh Venkataramanan 1756fcea6f3dSAnirudh Venkataramanan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL); 1757fcea6f3dSAnirudh Venkataramanan if (!pcaps) 1758fcea6f3dSAnirudh Venkataramanan return ICE_ERR_NO_MEMORY; 1759fcea6f3dSAnirudh Venkataramanan 1760fcea6f3dSAnirudh Venkataramanan phy_info = &pi->phy; 1761fcea6f3dSAnirudh Venkataramanan status = ice_aq_get_link_info(pi, true, NULL, NULL); 1762fcea6f3dSAnirudh Venkataramanan if (status) 1763fcea6f3dSAnirudh Venkataramanan goto out; 1764fcea6f3dSAnirudh Venkataramanan 1765fcea6f3dSAnirudh Venkataramanan if (phy_info->link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) { 1766fcea6f3dSAnirudh Venkataramanan status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, 1767fcea6f3dSAnirudh Venkataramanan pcaps, NULL); 1768fcea6f3dSAnirudh Venkataramanan if (status) 1769fcea6f3dSAnirudh Venkataramanan goto out; 1770fcea6f3dSAnirudh Venkataramanan 1771fcea6f3dSAnirudh Venkataramanan memcpy(phy_info->link_info.module_type, &pcaps->module_type, 1772fcea6f3dSAnirudh Venkataramanan sizeof(phy_info->link_info.module_type)); 1773fcea6f3dSAnirudh Venkataramanan } 1774fcea6f3dSAnirudh Venkataramanan out: 1775fcea6f3dSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 1776fcea6f3dSAnirudh Venkataramanan return status; 1777fcea6f3dSAnirudh Venkataramanan } 1778fcea6f3dSAnirudh Venkataramanan 1779fcea6f3dSAnirudh Venkataramanan /** 1780fcea6f3dSAnirudh Venkataramanan * ice_set_fc 1781fcea6f3dSAnirudh Venkataramanan * @pi: port information structure 1782fcea6f3dSAnirudh Venkataramanan * @aq_failures: pointer to status code, specific to ice_set_fc routine 178348cb27f2SChinh Cao * @ena_auto_link_update: enable automatic link update 1784fcea6f3dSAnirudh Venkataramanan * 1785fcea6f3dSAnirudh Venkataramanan * Set the requested flow control mode. 1786fcea6f3dSAnirudh Venkataramanan */ 1787fcea6f3dSAnirudh Venkataramanan enum ice_status 178848cb27f2SChinh Cao ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update) 1789fcea6f3dSAnirudh Venkataramanan { 1790fcea6f3dSAnirudh Venkataramanan struct ice_aqc_set_phy_cfg_data cfg = { 0 }; 1791fcea6f3dSAnirudh Venkataramanan struct ice_aqc_get_phy_caps_data *pcaps; 1792fcea6f3dSAnirudh Venkataramanan enum ice_status status; 1793fcea6f3dSAnirudh Venkataramanan u8 pause_mask = 0x0; 1794fcea6f3dSAnirudh Venkataramanan struct ice_hw *hw; 1795fcea6f3dSAnirudh Venkataramanan 1796fcea6f3dSAnirudh Venkataramanan if (!pi) 1797fcea6f3dSAnirudh Venkataramanan return ICE_ERR_PARAM; 1798fcea6f3dSAnirudh Venkataramanan hw = pi->hw; 1799fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_NONE; 1800fcea6f3dSAnirudh Venkataramanan 1801fcea6f3dSAnirudh Venkataramanan switch (pi->fc.req_mode) { 1802fcea6f3dSAnirudh Venkataramanan case ICE_FC_FULL: 1803fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE; 1804fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE; 1805fcea6f3dSAnirudh Venkataramanan break; 1806fcea6f3dSAnirudh Venkataramanan case ICE_FC_RX_PAUSE: 1807fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE; 1808fcea6f3dSAnirudh Venkataramanan break; 1809fcea6f3dSAnirudh Venkataramanan case ICE_FC_TX_PAUSE: 1810fcea6f3dSAnirudh Venkataramanan pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE; 1811fcea6f3dSAnirudh Venkataramanan break; 1812fcea6f3dSAnirudh Venkataramanan default: 1813fcea6f3dSAnirudh Venkataramanan break; 1814fcea6f3dSAnirudh Venkataramanan } 1815fcea6f3dSAnirudh Venkataramanan 1816fcea6f3dSAnirudh Venkataramanan pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL); 1817fcea6f3dSAnirudh Venkataramanan if (!pcaps) 1818fcea6f3dSAnirudh Venkataramanan return ICE_ERR_NO_MEMORY; 1819fcea6f3dSAnirudh Venkataramanan 1820fcea6f3dSAnirudh Venkataramanan /* Get the current phy config */ 1821fcea6f3dSAnirudh Venkataramanan status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps, 1822fcea6f3dSAnirudh Venkataramanan NULL); 1823fcea6f3dSAnirudh Venkataramanan if (status) { 1824fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_GET; 1825fcea6f3dSAnirudh Venkataramanan goto out; 1826fcea6f3dSAnirudh Venkataramanan } 1827fcea6f3dSAnirudh Venkataramanan 1828fcea6f3dSAnirudh Venkataramanan /* clear the old pause settings */ 1829fcea6f3dSAnirudh Venkataramanan cfg.caps = pcaps->caps & ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE | 1830fcea6f3dSAnirudh Venkataramanan ICE_AQC_PHY_EN_RX_LINK_PAUSE); 1831fcea6f3dSAnirudh Venkataramanan /* set the new capabilities */ 1832fcea6f3dSAnirudh Venkataramanan cfg.caps |= pause_mask; 1833fcea6f3dSAnirudh Venkataramanan /* If the capabilities have changed, then set the new config */ 1834fcea6f3dSAnirudh Venkataramanan if (cfg.caps != pcaps->caps) { 1835fcea6f3dSAnirudh Venkataramanan int retry_count, retry_max = 10; 1836fcea6f3dSAnirudh Venkataramanan 1837fcea6f3dSAnirudh Venkataramanan /* Auto restart link so settings take effect */ 183848cb27f2SChinh Cao if (ena_auto_link_update) 183948cb27f2SChinh Cao cfg.caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; 1840fcea6f3dSAnirudh Venkataramanan /* Copy over all the old settings */ 1841fcea6f3dSAnirudh Venkataramanan cfg.phy_type_low = pcaps->phy_type_low; 1842fcea6f3dSAnirudh Venkataramanan cfg.low_power_ctrl = pcaps->low_power_ctrl; 1843fcea6f3dSAnirudh Venkataramanan cfg.eee_cap = pcaps->eee_cap; 1844fcea6f3dSAnirudh Venkataramanan cfg.eeer_value = pcaps->eeer_value; 1845fcea6f3dSAnirudh Venkataramanan cfg.link_fec_opt = pcaps->link_fec_options; 1846fcea6f3dSAnirudh Venkataramanan 1847fcea6f3dSAnirudh Venkataramanan status = ice_aq_set_phy_cfg(hw, pi->lport, &cfg, NULL); 1848fcea6f3dSAnirudh Venkataramanan if (status) { 1849fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_SET; 1850fcea6f3dSAnirudh Venkataramanan goto out; 1851fcea6f3dSAnirudh Venkataramanan } 1852fcea6f3dSAnirudh Venkataramanan 1853fcea6f3dSAnirudh Venkataramanan /* Update the link info 1854fcea6f3dSAnirudh Venkataramanan * It sometimes takes a really long time for link to 1855fcea6f3dSAnirudh Venkataramanan * come back from the atomic reset. Thus, we wait a 1856fcea6f3dSAnirudh Venkataramanan * little bit. 1857fcea6f3dSAnirudh Venkataramanan */ 1858fcea6f3dSAnirudh Venkataramanan for (retry_count = 0; retry_count < retry_max; retry_count++) { 1859fcea6f3dSAnirudh Venkataramanan status = ice_update_link_info(pi); 1860fcea6f3dSAnirudh Venkataramanan 1861fcea6f3dSAnirudh Venkataramanan if (!status) 1862fcea6f3dSAnirudh Venkataramanan break; 1863fcea6f3dSAnirudh Venkataramanan 1864fcea6f3dSAnirudh Venkataramanan mdelay(100); 1865fcea6f3dSAnirudh Venkataramanan } 1866fcea6f3dSAnirudh Venkataramanan 1867fcea6f3dSAnirudh Venkataramanan if (status) 1868fcea6f3dSAnirudh Venkataramanan *aq_failures = ICE_SET_FC_AQ_FAIL_UPDATE; 1869fcea6f3dSAnirudh Venkataramanan } 1870fcea6f3dSAnirudh Venkataramanan 1871fcea6f3dSAnirudh Venkataramanan out: 1872fcea6f3dSAnirudh Venkataramanan devm_kfree(ice_hw_to_dev(hw), pcaps); 1873fcea6f3dSAnirudh Venkataramanan return status; 1874fcea6f3dSAnirudh Venkataramanan } 1875fcea6f3dSAnirudh Venkataramanan 1876fcea6f3dSAnirudh Venkataramanan /** 18770b28b702SAnirudh Venkataramanan * ice_get_link_status - get status of the HW network link 18780b28b702SAnirudh Venkataramanan * @pi: port information structure 18790b28b702SAnirudh Venkataramanan * @link_up: pointer to bool (true/false = linkup/linkdown) 18800b28b702SAnirudh Venkataramanan * 18810b28b702SAnirudh Venkataramanan * Variable link_up is true if link is up, false if link is down. 18820b28b702SAnirudh Venkataramanan * The variable link_up is invalid if status is non zero. As a 18830b28b702SAnirudh Venkataramanan * result of this call, link status reporting becomes enabled 18840b28b702SAnirudh Venkataramanan */ 18850b28b702SAnirudh Venkataramanan enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up) 18860b28b702SAnirudh Venkataramanan { 18870b28b702SAnirudh Venkataramanan struct ice_phy_info *phy_info; 18880b28b702SAnirudh Venkataramanan enum ice_status status = 0; 18890b28b702SAnirudh Venkataramanan 1890c7f2c42bSAnirudh Venkataramanan if (!pi || !link_up) 18910b28b702SAnirudh Venkataramanan return ICE_ERR_PARAM; 18920b28b702SAnirudh Venkataramanan 18930b28b702SAnirudh Venkataramanan phy_info = &pi->phy; 18940b28b702SAnirudh Venkataramanan 18950b28b702SAnirudh Venkataramanan if (phy_info->get_link_info) { 18960b28b702SAnirudh Venkataramanan status = ice_update_link_info(pi); 18970b28b702SAnirudh Venkataramanan 18980b28b702SAnirudh Venkataramanan if (status) 18990b28b702SAnirudh Venkataramanan ice_debug(pi->hw, ICE_DBG_LINK, 19000b28b702SAnirudh Venkataramanan "get link status error, status = %d\n", 19010b28b702SAnirudh Venkataramanan status); 19020b28b702SAnirudh Venkataramanan } 19030b28b702SAnirudh Venkataramanan 19040b28b702SAnirudh Venkataramanan *link_up = phy_info->link_info.link_info & ICE_AQ_LINK_UP; 19050b28b702SAnirudh Venkataramanan 19060b28b702SAnirudh Venkataramanan return status; 19070b28b702SAnirudh Venkataramanan } 19080b28b702SAnirudh Venkataramanan 19090b28b702SAnirudh Venkataramanan /** 1910fcea6f3dSAnirudh Venkataramanan * ice_aq_set_link_restart_an 1911fcea6f3dSAnirudh Venkataramanan * @pi: pointer to the port information structure 1912fcea6f3dSAnirudh Venkataramanan * @ena_link: if true: enable link, if false: disable link 1913fcea6f3dSAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 1914fcea6f3dSAnirudh Venkataramanan * 1915fcea6f3dSAnirudh Venkataramanan * Sets up the link and restarts the Auto-Negotiation over the link. 1916fcea6f3dSAnirudh Venkataramanan */ 1917fcea6f3dSAnirudh Venkataramanan enum ice_status 1918fcea6f3dSAnirudh Venkataramanan ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, 1919fcea6f3dSAnirudh Venkataramanan struct ice_sq_cd *cd) 1920fcea6f3dSAnirudh Venkataramanan { 1921fcea6f3dSAnirudh Venkataramanan struct ice_aqc_restart_an *cmd; 1922fcea6f3dSAnirudh Venkataramanan struct ice_aq_desc desc; 1923fcea6f3dSAnirudh Venkataramanan 1924fcea6f3dSAnirudh Venkataramanan cmd = &desc.params.restart_an; 1925fcea6f3dSAnirudh Venkataramanan 1926fcea6f3dSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_restart_an); 1927fcea6f3dSAnirudh Venkataramanan 1928fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags = ICE_AQC_RESTART_AN_LINK_RESTART; 1929fcea6f3dSAnirudh Venkataramanan cmd->lport_num = pi->lport; 1930fcea6f3dSAnirudh Venkataramanan if (ena_link) 1931fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags |= ICE_AQC_RESTART_AN_LINK_ENABLE; 1932fcea6f3dSAnirudh Venkataramanan else 1933fcea6f3dSAnirudh Venkataramanan cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE; 1934fcea6f3dSAnirudh Venkataramanan 1935fcea6f3dSAnirudh Venkataramanan return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); 1936fcea6f3dSAnirudh Venkataramanan } 1937fcea6f3dSAnirudh Venkataramanan 1938fcea6f3dSAnirudh Venkataramanan /** 19390b28b702SAnirudh Venkataramanan * ice_aq_set_event_mask 19400b28b702SAnirudh Venkataramanan * @hw: pointer to the hw struct 19410b28b702SAnirudh Venkataramanan * @port_num: port number of the physical function 19420b28b702SAnirudh Venkataramanan * @mask: event mask to be set 19430b28b702SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 19440b28b702SAnirudh Venkataramanan * 19450b28b702SAnirudh Venkataramanan * Set event mask (0x0613) 19460b28b702SAnirudh Venkataramanan */ 19470b28b702SAnirudh Venkataramanan enum ice_status 19480b28b702SAnirudh Venkataramanan ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, 19490b28b702SAnirudh Venkataramanan struct ice_sq_cd *cd) 19500b28b702SAnirudh Venkataramanan { 19510b28b702SAnirudh Venkataramanan struct ice_aqc_set_event_mask *cmd; 19520b28b702SAnirudh Venkataramanan struct ice_aq_desc desc; 19530b28b702SAnirudh Venkataramanan 19540b28b702SAnirudh Venkataramanan cmd = &desc.params.set_event_mask; 19550b28b702SAnirudh Venkataramanan 19560b28b702SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_event_mask); 19570b28b702SAnirudh Venkataramanan 19580b28b702SAnirudh Venkataramanan cmd->lport_num = port_num; 19590b28b702SAnirudh Venkataramanan 19600b28b702SAnirudh Venkataramanan cmd->event_mask = cpu_to_le16(mask); 19610b28b702SAnirudh Venkataramanan 19620b28b702SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); 19630b28b702SAnirudh Venkataramanan } 19640b28b702SAnirudh Venkataramanan 19650b28b702SAnirudh Venkataramanan /** 1966d76a60baSAnirudh Venkataramanan * __ice_aq_get_set_rss_lut 1967d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 1968d76a60baSAnirudh Venkataramanan * @vsi_id: VSI FW index 1969d76a60baSAnirudh Venkataramanan * @lut_type: LUT table type 1970d76a60baSAnirudh Venkataramanan * @lut: pointer to the LUT buffer provided by the caller 1971d76a60baSAnirudh Venkataramanan * @lut_size: size of the LUT buffer 1972d76a60baSAnirudh Venkataramanan * @glob_lut_idx: global LUT index 1973d76a60baSAnirudh Venkataramanan * @set: set true to set the table, false to get the table 1974d76a60baSAnirudh Venkataramanan * 1975d76a60baSAnirudh Venkataramanan * Internal function to get (0x0B05) or set (0x0B03) RSS look up table 1976d76a60baSAnirudh Venkataramanan */ 1977d76a60baSAnirudh Venkataramanan static enum ice_status 1978d76a60baSAnirudh Venkataramanan __ice_aq_get_set_rss_lut(struct ice_hw *hw, u16 vsi_id, u8 lut_type, u8 *lut, 1979d76a60baSAnirudh Venkataramanan u16 lut_size, u8 glob_lut_idx, bool set) 1980d76a60baSAnirudh Venkataramanan { 1981d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_lut *cmd_resp; 1982d76a60baSAnirudh Venkataramanan struct ice_aq_desc desc; 1983d76a60baSAnirudh Venkataramanan enum ice_status status; 1984d76a60baSAnirudh Venkataramanan u16 flags = 0; 1985d76a60baSAnirudh Venkataramanan 1986d76a60baSAnirudh Venkataramanan cmd_resp = &desc.params.get_set_rss_lut; 1987d76a60baSAnirudh Venkataramanan 1988d76a60baSAnirudh Venkataramanan if (set) { 1989d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_lut); 1990d76a60baSAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 1991d76a60baSAnirudh Venkataramanan } else { 1992d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_lut); 1993d76a60baSAnirudh Venkataramanan } 1994d76a60baSAnirudh Venkataramanan 1995d76a60baSAnirudh Venkataramanan cmd_resp->vsi_id = cpu_to_le16(((vsi_id << 1996d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_ID_S) & 1997d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_ID_M) | 1998d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_VSI_VALID); 1999d76a60baSAnirudh Venkataramanan 2000d76a60baSAnirudh Venkataramanan switch (lut_type) { 2001d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI: 2002d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF: 2003d76a60baSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL: 2004d76a60baSAnirudh Venkataramanan flags |= ((lut_type << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) & 2005d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M); 2006d76a60baSAnirudh Venkataramanan break; 2007d76a60baSAnirudh Venkataramanan default: 2008d76a60baSAnirudh Venkataramanan status = ICE_ERR_PARAM; 2009d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_exit; 2010d76a60baSAnirudh Venkataramanan } 2011d76a60baSAnirudh Venkataramanan 2012d76a60baSAnirudh Venkataramanan if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL) { 2013d76a60baSAnirudh Venkataramanan flags |= ((glob_lut_idx << ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S) & 2014d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_M); 2015d76a60baSAnirudh Venkataramanan 2016d76a60baSAnirudh Venkataramanan if (!set) 2017d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 2018d76a60baSAnirudh Venkataramanan } else if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { 2019d76a60baSAnirudh Venkataramanan if (!set) 2020d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 2021d76a60baSAnirudh Venkataramanan } else { 2022d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_send; 2023d76a60baSAnirudh Venkataramanan } 2024d76a60baSAnirudh Venkataramanan 2025d76a60baSAnirudh Venkataramanan /* LUT size is only valid for Global and PF table types */ 20264381147dSAnirudh Venkataramanan switch (lut_size) { 20274381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128: 20284381147dSAnirudh Venkataramanan break; 20294381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512: 2030d76a60baSAnirudh Venkataramanan flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG << 2031d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & 2032d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; 20334381147dSAnirudh Venkataramanan break; 20344381147dSAnirudh Venkataramanan case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K: 20354381147dSAnirudh Venkataramanan if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { 2036d76a60baSAnirudh Venkataramanan flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG << 2037d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & 2038d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; 20394381147dSAnirudh Venkataramanan break; 20404381147dSAnirudh Venkataramanan } 20414381147dSAnirudh Venkataramanan /* fall-through */ 20424381147dSAnirudh Venkataramanan default: 2043d76a60baSAnirudh Venkataramanan status = ICE_ERR_PARAM; 2044d76a60baSAnirudh Venkataramanan goto ice_aq_get_set_rss_lut_exit; 2045d76a60baSAnirudh Venkataramanan } 2046d76a60baSAnirudh Venkataramanan 2047d76a60baSAnirudh Venkataramanan ice_aq_get_set_rss_lut_send: 2048d76a60baSAnirudh Venkataramanan cmd_resp->flags = cpu_to_le16(flags); 2049d76a60baSAnirudh Venkataramanan status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL); 2050d76a60baSAnirudh Venkataramanan 2051d76a60baSAnirudh Venkataramanan ice_aq_get_set_rss_lut_exit: 2052d76a60baSAnirudh Venkataramanan return status; 2053d76a60baSAnirudh Venkataramanan } 2054d76a60baSAnirudh Venkataramanan 2055d76a60baSAnirudh Venkataramanan /** 2056d76a60baSAnirudh Venkataramanan * ice_aq_get_rss_lut 2057d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 20584fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 2059d76a60baSAnirudh Venkataramanan * @lut_type: LUT table type 2060d76a60baSAnirudh Venkataramanan * @lut: pointer to the LUT buffer provided by the caller 2061d76a60baSAnirudh Venkataramanan * @lut_size: size of the LUT buffer 2062d76a60baSAnirudh Venkataramanan * 2063d76a60baSAnirudh Venkataramanan * get the RSS lookup table, PF or VSI type 2064d76a60baSAnirudh Venkataramanan */ 2065d76a60baSAnirudh Venkataramanan enum ice_status 20664fb33f31SAnirudh Venkataramanan ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, 20674fb33f31SAnirudh Venkataramanan u8 *lut, u16 lut_size) 2068d76a60baSAnirudh Venkataramanan { 20694fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !lut) 20704fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 20714fb33f31SAnirudh Venkataramanan 20724fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_lut(hw, ice_get_hw_vsi_num(hw, vsi_handle), 20734fb33f31SAnirudh Venkataramanan lut_type, lut, lut_size, 0, false); 2074d76a60baSAnirudh Venkataramanan } 2075d76a60baSAnirudh Venkataramanan 2076d76a60baSAnirudh Venkataramanan /** 2077d76a60baSAnirudh Venkataramanan * ice_aq_set_rss_lut 2078d76a60baSAnirudh Venkataramanan * @hw: pointer to the hardware structure 20794fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 2080d76a60baSAnirudh Venkataramanan * @lut_type: LUT table type 2081d76a60baSAnirudh Venkataramanan * @lut: pointer to the LUT buffer provided by the caller 2082d76a60baSAnirudh Venkataramanan * @lut_size: size of the LUT buffer 2083d76a60baSAnirudh Venkataramanan * 2084d76a60baSAnirudh Venkataramanan * set the RSS lookup table, PF or VSI type 2085d76a60baSAnirudh Venkataramanan */ 2086d76a60baSAnirudh Venkataramanan enum ice_status 20874fb33f31SAnirudh Venkataramanan ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, 20884fb33f31SAnirudh Venkataramanan u8 *lut, u16 lut_size) 2089d76a60baSAnirudh Venkataramanan { 20904fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !lut) 20914fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 20924fb33f31SAnirudh Venkataramanan 20934fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_lut(hw, ice_get_hw_vsi_num(hw, vsi_handle), 20944fb33f31SAnirudh Venkataramanan lut_type, lut, lut_size, 0, true); 2095d76a60baSAnirudh Venkataramanan } 2096d76a60baSAnirudh Venkataramanan 2097d76a60baSAnirudh Venkataramanan /** 2098d76a60baSAnirudh Venkataramanan * __ice_aq_get_set_rss_key 2099d76a60baSAnirudh Venkataramanan * @hw: pointer to the hw struct 2100d76a60baSAnirudh Venkataramanan * @vsi_id: VSI FW index 2101d76a60baSAnirudh Venkataramanan * @key: pointer to key info struct 2102d76a60baSAnirudh Venkataramanan * @set: set true to set the key, false to get the key 2103d76a60baSAnirudh Venkataramanan * 2104d76a60baSAnirudh Venkataramanan * get (0x0B04) or set (0x0B02) the RSS key per VSI 2105d76a60baSAnirudh Venkataramanan */ 2106d76a60baSAnirudh Venkataramanan static enum 2107d76a60baSAnirudh Venkataramanan ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id, 2108d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_keys *key, 2109d76a60baSAnirudh Venkataramanan bool set) 2110d76a60baSAnirudh Venkataramanan { 2111d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_key *cmd_resp; 2112d76a60baSAnirudh Venkataramanan u16 key_size = sizeof(*key); 2113d76a60baSAnirudh Venkataramanan struct ice_aq_desc desc; 2114d76a60baSAnirudh Venkataramanan 2115d76a60baSAnirudh Venkataramanan cmd_resp = &desc.params.get_set_rss_key; 2116d76a60baSAnirudh Venkataramanan 2117d76a60baSAnirudh Venkataramanan if (set) { 2118d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_key); 2119d76a60baSAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 2120d76a60baSAnirudh Venkataramanan } else { 2121d76a60baSAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_key); 2122d76a60baSAnirudh Venkataramanan } 2123d76a60baSAnirudh Venkataramanan 2124d76a60baSAnirudh Venkataramanan cmd_resp->vsi_id = cpu_to_le16(((vsi_id << 2125d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_ID_S) & 2126d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_ID_M) | 2127d76a60baSAnirudh Venkataramanan ICE_AQC_GSET_RSS_KEY_VSI_VALID); 2128d76a60baSAnirudh Venkataramanan 2129d76a60baSAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, key, key_size, NULL); 2130d76a60baSAnirudh Venkataramanan } 2131d76a60baSAnirudh Venkataramanan 2132d76a60baSAnirudh Venkataramanan /** 2133d76a60baSAnirudh Venkataramanan * ice_aq_get_rss_key 2134d76a60baSAnirudh Venkataramanan * @hw: pointer to the hw struct 21354fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 2136d76a60baSAnirudh Venkataramanan * @key: pointer to key info struct 2137d76a60baSAnirudh Venkataramanan * 2138d76a60baSAnirudh Venkataramanan * get the RSS key per VSI 2139d76a60baSAnirudh Venkataramanan */ 2140d76a60baSAnirudh Venkataramanan enum ice_status 21414fb33f31SAnirudh Venkataramanan ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle, 2142d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_keys *key) 2143d76a60baSAnirudh Venkataramanan { 21444fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !key) 21454fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 21464fb33f31SAnirudh Venkataramanan 21474fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle), 21484fb33f31SAnirudh Venkataramanan key, false); 2149d76a60baSAnirudh Venkataramanan } 2150d76a60baSAnirudh Venkataramanan 2151d76a60baSAnirudh Venkataramanan /** 2152d76a60baSAnirudh Venkataramanan * ice_aq_set_rss_key 2153d76a60baSAnirudh Venkataramanan * @hw: pointer to the hw struct 21544fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 2155d76a60baSAnirudh Venkataramanan * @keys: pointer to key info struct 2156d76a60baSAnirudh Venkataramanan * 2157d76a60baSAnirudh Venkataramanan * set the RSS key per VSI 2158d76a60baSAnirudh Venkataramanan */ 2159d76a60baSAnirudh Venkataramanan enum ice_status 21604fb33f31SAnirudh Venkataramanan ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle, 2161d76a60baSAnirudh Venkataramanan struct ice_aqc_get_set_rss_keys *keys) 2162d76a60baSAnirudh Venkataramanan { 21634fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle) || !keys) 21644fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 21654fb33f31SAnirudh Venkataramanan 21664fb33f31SAnirudh Venkataramanan return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle), 21674fb33f31SAnirudh Venkataramanan keys, true); 2168d76a60baSAnirudh Venkataramanan } 2169d76a60baSAnirudh Venkataramanan 2170d76a60baSAnirudh Venkataramanan /** 2171cdedef59SAnirudh Venkataramanan * ice_aq_add_lan_txq 2172cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 2173cdedef59SAnirudh Venkataramanan * @num_qgrps: Number of added queue groups 2174cdedef59SAnirudh Venkataramanan * @qg_list: list of queue groups to be added 2175cdedef59SAnirudh Venkataramanan * @buf_size: size of buffer for indirect command 2176cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2177cdedef59SAnirudh Venkataramanan * 2178cdedef59SAnirudh Venkataramanan * Add Tx LAN queue (0x0C30) 2179cdedef59SAnirudh Venkataramanan * 2180cdedef59SAnirudh Venkataramanan * NOTE: 2181cdedef59SAnirudh Venkataramanan * Prior to calling add Tx LAN queue: 2182cdedef59SAnirudh Venkataramanan * Initialize the following as part of the Tx queue context: 2183cdedef59SAnirudh Venkataramanan * Completion queue ID if the queue uses Completion queue, Quanta profile, 2184cdedef59SAnirudh Venkataramanan * Cache profile and Packet shaper profile. 2185cdedef59SAnirudh Venkataramanan * 2186cdedef59SAnirudh Venkataramanan * After add Tx LAN queue AQ command is completed: 2187cdedef59SAnirudh Venkataramanan * Interrupts should be associated with specific queues, 2188cdedef59SAnirudh Venkataramanan * Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue 2189cdedef59SAnirudh Venkataramanan * flow. 2190cdedef59SAnirudh Venkataramanan */ 2191cdedef59SAnirudh Venkataramanan static enum ice_status 2192cdedef59SAnirudh Venkataramanan ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps, 2193cdedef59SAnirudh Venkataramanan struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size, 2194cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 2195cdedef59SAnirudh Venkataramanan { 2196cdedef59SAnirudh Venkataramanan u16 i, sum_header_size, sum_q_size = 0; 2197cdedef59SAnirudh Venkataramanan struct ice_aqc_add_tx_qgrp *list; 2198cdedef59SAnirudh Venkataramanan struct ice_aqc_add_txqs *cmd; 2199cdedef59SAnirudh Venkataramanan struct ice_aq_desc desc; 2200cdedef59SAnirudh Venkataramanan 2201cdedef59SAnirudh Venkataramanan cmd = &desc.params.add_txqs; 2202cdedef59SAnirudh Venkataramanan 2203cdedef59SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_txqs); 2204cdedef59SAnirudh Venkataramanan 2205cdedef59SAnirudh Venkataramanan if (!qg_list) 2206cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2207cdedef59SAnirudh Venkataramanan 2208cdedef59SAnirudh Venkataramanan if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS) 2209cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2210cdedef59SAnirudh Venkataramanan 2211cdedef59SAnirudh Venkataramanan sum_header_size = num_qgrps * 2212cdedef59SAnirudh Venkataramanan (sizeof(*qg_list) - sizeof(*qg_list->txqs)); 2213cdedef59SAnirudh Venkataramanan 2214cdedef59SAnirudh Venkataramanan list = qg_list; 2215cdedef59SAnirudh Venkataramanan for (i = 0; i < num_qgrps; i++) { 2216cdedef59SAnirudh Venkataramanan struct ice_aqc_add_txqs_perq *q = list->txqs; 2217cdedef59SAnirudh Venkataramanan 2218cdedef59SAnirudh Venkataramanan sum_q_size += list->num_txqs * sizeof(*q); 2219cdedef59SAnirudh Venkataramanan list = (struct ice_aqc_add_tx_qgrp *)(q + list->num_txqs); 2220cdedef59SAnirudh Venkataramanan } 2221cdedef59SAnirudh Venkataramanan 2222cdedef59SAnirudh Venkataramanan if (buf_size != (sum_header_size + sum_q_size)) 2223cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2224cdedef59SAnirudh Venkataramanan 2225cdedef59SAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 2226cdedef59SAnirudh Venkataramanan 2227cdedef59SAnirudh Venkataramanan cmd->num_qgrps = num_qgrps; 2228cdedef59SAnirudh Venkataramanan 2229cdedef59SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd); 2230cdedef59SAnirudh Venkataramanan } 2231cdedef59SAnirudh Venkataramanan 2232cdedef59SAnirudh Venkataramanan /** 2233cdedef59SAnirudh Venkataramanan * ice_aq_dis_lan_txq 2234cdedef59SAnirudh Venkataramanan * @hw: pointer to the hardware structure 2235cdedef59SAnirudh Venkataramanan * @num_qgrps: number of groups in the list 2236cdedef59SAnirudh Venkataramanan * @qg_list: the list of groups to disable 2237cdedef59SAnirudh Venkataramanan * @buf_size: the total size of the qg_list buffer in bytes 2238cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2239cdedef59SAnirudh Venkataramanan * 2240cdedef59SAnirudh Venkataramanan * Disable LAN Tx queue (0x0C31) 2241cdedef59SAnirudh Venkataramanan */ 2242cdedef59SAnirudh Venkataramanan static enum ice_status 2243cdedef59SAnirudh Venkataramanan ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps, 2244cdedef59SAnirudh Venkataramanan struct ice_aqc_dis_txq_item *qg_list, u16 buf_size, 2245cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 2246cdedef59SAnirudh Venkataramanan { 2247cdedef59SAnirudh Venkataramanan struct ice_aqc_dis_txqs *cmd; 2248cdedef59SAnirudh Venkataramanan struct ice_aq_desc desc; 2249cdedef59SAnirudh Venkataramanan u16 i, sz = 0; 2250cdedef59SAnirudh Venkataramanan 2251cdedef59SAnirudh Venkataramanan cmd = &desc.params.dis_txqs; 2252cdedef59SAnirudh Venkataramanan ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_dis_txqs); 2253cdedef59SAnirudh Venkataramanan 2254cdedef59SAnirudh Venkataramanan if (!qg_list) 2255cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2256cdedef59SAnirudh Venkataramanan 2257cdedef59SAnirudh Venkataramanan if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS) 2258cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2259cdedef59SAnirudh Venkataramanan desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 2260cdedef59SAnirudh Venkataramanan cmd->num_entries = num_qgrps; 2261cdedef59SAnirudh Venkataramanan 2262cdedef59SAnirudh Venkataramanan for (i = 0; i < num_qgrps; ++i) { 2263cdedef59SAnirudh Venkataramanan /* Calculate the size taken up by the queue IDs in this group */ 2264cdedef59SAnirudh Venkataramanan sz += qg_list[i].num_qs * sizeof(qg_list[i].q_id); 2265cdedef59SAnirudh Venkataramanan 2266cdedef59SAnirudh Venkataramanan /* Add the size of the group header */ 2267cdedef59SAnirudh Venkataramanan sz += sizeof(qg_list[i]) - sizeof(qg_list[i].q_id); 2268cdedef59SAnirudh Venkataramanan 2269cdedef59SAnirudh Venkataramanan /* If the num of queues is even, add 2 bytes of padding */ 2270cdedef59SAnirudh Venkataramanan if ((qg_list[i].num_qs % 2) == 0) 2271cdedef59SAnirudh Venkataramanan sz += 2; 2272cdedef59SAnirudh Venkataramanan } 2273cdedef59SAnirudh Venkataramanan 2274cdedef59SAnirudh Venkataramanan if (buf_size != sz) 2275cdedef59SAnirudh Venkataramanan return ICE_ERR_PARAM; 2276cdedef59SAnirudh Venkataramanan 2277cdedef59SAnirudh Venkataramanan return ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd); 2278cdedef59SAnirudh Venkataramanan } 2279cdedef59SAnirudh Venkataramanan 2280cdedef59SAnirudh Venkataramanan /* End of FW Admin Queue command wrappers */ 2281cdedef59SAnirudh Venkataramanan 2282cdedef59SAnirudh Venkataramanan /** 2283cdedef59SAnirudh Venkataramanan * ice_write_byte - write a byte to a packed context structure 2284cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 2285cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 2286cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 2287cdedef59SAnirudh Venkataramanan */ 2288cdedef59SAnirudh Venkataramanan static void ice_write_byte(u8 *src_ctx, u8 *dest_ctx, 2289cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele *ce_info) 2290cdedef59SAnirudh Venkataramanan { 2291cdedef59SAnirudh Venkataramanan u8 src_byte, dest_byte, mask; 2292cdedef59SAnirudh Venkataramanan u8 *from, *dest; 2293cdedef59SAnirudh Venkataramanan u16 shift_width; 2294cdedef59SAnirudh Venkataramanan 2295cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 2296cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 2297cdedef59SAnirudh Venkataramanan 2298cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 2299cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 2300cdedef59SAnirudh Venkataramanan mask = (u8)(BIT(ce_info->width) - 1); 2301cdedef59SAnirudh Venkataramanan 2302cdedef59SAnirudh Venkataramanan src_byte = *from; 2303cdedef59SAnirudh Venkataramanan src_byte &= mask; 2304cdedef59SAnirudh Venkataramanan 2305cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 2306cdedef59SAnirudh Venkataramanan mask <<= shift_width; 2307cdedef59SAnirudh Venkataramanan src_byte <<= shift_width; 2308cdedef59SAnirudh Venkataramanan 2309cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 2310cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 2311cdedef59SAnirudh Venkataramanan 2312cdedef59SAnirudh Venkataramanan memcpy(&dest_byte, dest, sizeof(dest_byte)); 2313cdedef59SAnirudh Venkataramanan 2314cdedef59SAnirudh Venkataramanan dest_byte &= ~mask; /* get the bits not changing */ 2315cdedef59SAnirudh Venkataramanan dest_byte |= src_byte; /* add in the new bits */ 2316cdedef59SAnirudh Venkataramanan 2317cdedef59SAnirudh Venkataramanan /* put it all back */ 2318cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_byte, sizeof(dest_byte)); 2319cdedef59SAnirudh Venkataramanan } 2320cdedef59SAnirudh Venkataramanan 2321cdedef59SAnirudh Venkataramanan /** 2322cdedef59SAnirudh Venkataramanan * ice_write_word - write a word to a packed context structure 2323cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 2324cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 2325cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 2326cdedef59SAnirudh Venkataramanan */ 2327cdedef59SAnirudh Venkataramanan static void ice_write_word(u8 *src_ctx, u8 *dest_ctx, 2328cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele *ce_info) 2329cdedef59SAnirudh Venkataramanan { 2330cdedef59SAnirudh Venkataramanan u16 src_word, mask; 2331cdedef59SAnirudh Venkataramanan __le16 dest_word; 2332cdedef59SAnirudh Venkataramanan u8 *from, *dest; 2333cdedef59SAnirudh Venkataramanan u16 shift_width; 2334cdedef59SAnirudh Venkataramanan 2335cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 2336cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 2337cdedef59SAnirudh Venkataramanan 2338cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 2339cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 2340cdedef59SAnirudh Venkataramanan mask = BIT(ce_info->width) - 1; 2341cdedef59SAnirudh Venkataramanan 2342cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 2343cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 2344cdedef59SAnirudh Venkataramanan */ 2345cdedef59SAnirudh Venkataramanan src_word = *(u16 *)from; 2346cdedef59SAnirudh Venkataramanan src_word &= mask; 2347cdedef59SAnirudh Venkataramanan 2348cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 2349cdedef59SAnirudh Venkataramanan mask <<= shift_width; 2350cdedef59SAnirudh Venkataramanan src_word <<= shift_width; 2351cdedef59SAnirudh Venkataramanan 2352cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 2353cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 2354cdedef59SAnirudh Venkataramanan 2355cdedef59SAnirudh Venkataramanan memcpy(&dest_word, dest, sizeof(dest_word)); 2356cdedef59SAnirudh Venkataramanan 2357cdedef59SAnirudh Venkataramanan dest_word &= ~(cpu_to_le16(mask)); /* get the bits not changing */ 2358cdedef59SAnirudh Venkataramanan dest_word |= cpu_to_le16(src_word); /* add in the new bits */ 2359cdedef59SAnirudh Venkataramanan 2360cdedef59SAnirudh Venkataramanan /* put it all back */ 2361cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_word, sizeof(dest_word)); 2362cdedef59SAnirudh Venkataramanan } 2363cdedef59SAnirudh Venkataramanan 2364cdedef59SAnirudh Venkataramanan /** 2365cdedef59SAnirudh Venkataramanan * ice_write_dword - write a dword to a packed context structure 2366cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 2367cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 2368cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 2369cdedef59SAnirudh Venkataramanan */ 2370cdedef59SAnirudh Venkataramanan static void ice_write_dword(u8 *src_ctx, u8 *dest_ctx, 2371cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele *ce_info) 2372cdedef59SAnirudh Venkataramanan { 2373cdedef59SAnirudh Venkataramanan u32 src_dword, mask; 2374cdedef59SAnirudh Venkataramanan __le32 dest_dword; 2375cdedef59SAnirudh Venkataramanan u8 *from, *dest; 2376cdedef59SAnirudh Venkataramanan u16 shift_width; 2377cdedef59SAnirudh Venkataramanan 2378cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 2379cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 2380cdedef59SAnirudh Venkataramanan 2381cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 2382cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 2383cdedef59SAnirudh Venkataramanan 2384cdedef59SAnirudh Venkataramanan /* if the field width is exactly 32 on an x86 machine, then the shift 2385cdedef59SAnirudh Venkataramanan * operation will not work because the SHL instructions count is masked 2386cdedef59SAnirudh Venkataramanan * to 5 bits so the shift will do nothing 2387cdedef59SAnirudh Venkataramanan */ 2388cdedef59SAnirudh Venkataramanan if (ce_info->width < 32) 2389cdedef59SAnirudh Venkataramanan mask = BIT(ce_info->width) - 1; 2390cdedef59SAnirudh Venkataramanan else 2391cdedef59SAnirudh Venkataramanan mask = (u32)~0; 2392cdedef59SAnirudh Venkataramanan 2393cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 2394cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 2395cdedef59SAnirudh Venkataramanan */ 2396cdedef59SAnirudh Venkataramanan src_dword = *(u32 *)from; 2397cdedef59SAnirudh Venkataramanan src_dword &= mask; 2398cdedef59SAnirudh Venkataramanan 2399cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 2400cdedef59SAnirudh Venkataramanan mask <<= shift_width; 2401cdedef59SAnirudh Venkataramanan src_dword <<= shift_width; 2402cdedef59SAnirudh Venkataramanan 2403cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 2404cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 2405cdedef59SAnirudh Venkataramanan 2406cdedef59SAnirudh Venkataramanan memcpy(&dest_dword, dest, sizeof(dest_dword)); 2407cdedef59SAnirudh Venkataramanan 2408cdedef59SAnirudh Venkataramanan dest_dword &= ~(cpu_to_le32(mask)); /* get the bits not changing */ 2409cdedef59SAnirudh Venkataramanan dest_dword |= cpu_to_le32(src_dword); /* add in the new bits */ 2410cdedef59SAnirudh Venkataramanan 2411cdedef59SAnirudh Venkataramanan /* put it all back */ 2412cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_dword, sizeof(dest_dword)); 2413cdedef59SAnirudh Venkataramanan } 2414cdedef59SAnirudh Venkataramanan 2415cdedef59SAnirudh Venkataramanan /** 2416cdedef59SAnirudh Venkataramanan * ice_write_qword - write a qword to a packed context structure 2417cdedef59SAnirudh Venkataramanan * @src_ctx: the context structure to read from 2418cdedef59SAnirudh Venkataramanan * @dest_ctx: the context to be written to 2419cdedef59SAnirudh Venkataramanan * @ce_info: a description of the struct to be filled 2420cdedef59SAnirudh Venkataramanan */ 2421cdedef59SAnirudh Venkataramanan static void ice_write_qword(u8 *src_ctx, u8 *dest_ctx, 2422cdedef59SAnirudh Venkataramanan const struct ice_ctx_ele *ce_info) 2423cdedef59SAnirudh Venkataramanan { 2424cdedef59SAnirudh Venkataramanan u64 src_qword, mask; 2425cdedef59SAnirudh Venkataramanan __le64 dest_qword; 2426cdedef59SAnirudh Venkataramanan u8 *from, *dest; 2427cdedef59SAnirudh Venkataramanan u16 shift_width; 2428cdedef59SAnirudh Venkataramanan 2429cdedef59SAnirudh Venkataramanan /* copy from the next struct field */ 2430cdedef59SAnirudh Venkataramanan from = src_ctx + ce_info->offset; 2431cdedef59SAnirudh Venkataramanan 2432cdedef59SAnirudh Venkataramanan /* prepare the bits and mask */ 2433cdedef59SAnirudh Venkataramanan shift_width = ce_info->lsb % 8; 2434cdedef59SAnirudh Venkataramanan 2435cdedef59SAnirudh Venkataramanan /* if the field width is exactly 64 on an x86 machine, then the shift 2436cdedef59SAnirudh Venkataramanan * operation will not work because the SHL instructions count is masked 2437cdedef59SAnirudh Venkataramanan * to 6 bits so the shift will do nothing 2438cdedef59SAnirudh Venkataramanan */ 2439cdedef59SAnirudh Venkataramanan if (ce_info->width < 64) 2440cdedef59SAnirudh Venkataramanan mask = BIT_ULL(ce_info->width) - 1; 2441cdedef59SAnirudh Venkataramanan else 2442cdedef59SAnirudh Venkataramanan mask = (u64)~0; 2443cdedef59SAnirudh Venkataramanan 2444cdedef59SAnirudh Venkataramanan /* don't swizzle the bits until after the mask because the mask bits 2445cdedef59SAnirudh Venkataramanan * will be in a different bit position on big endian machines 2446cdedef59SAnirudh Venkataramanan */ 2447cdedef59SAnirudh Venkataramanan src_qword = *(u64 *)from; 2448cdedef59SAnirudh Venkataramanan src_qword &= mask; 2449cdedef59SAnirudh Venkataramanan 2450cdedef59SAnirudh Venkataramanan /* shift to correct alignment */ 2451cdedef59SAnirudh Venkataramanan mask <<= shift_width; 2452cdedef59SAnirudh Venkataramanan src_qword <<= shift_width; 2453cdedef59SAnirudh Venkataramanan 2454cdedef59SAnirudh Venkataramanan /* get the current bits from the target bit string */ 2455cdedef59SAnirudh Venkataramanan dest = dest_ctx + (ce_info->lsb / 8); 2456cdedef59SAnirudh Venkataramanan 2457cdedef59SAnirudh Venkataramanan memcpy(&dest_qword, dest, sizeof(dest_qword)); 2458cdedef59SAnirudh Venkataramanan 2459cdedef59SAnirudh Venkataramanan dest_qword &= ~(cpu_to_le64(mask)); /* get the bits not changing */ 2460cdedef59SAnirudh Venkataramanan dest_qword |= cpu_to_le64(src_qword); /* add in the new bits */ 2461cdedef59SAnirudh Venkataramanan 2462cdedef59SAnirudh Venkataramanan /* put it all back */ 2463cdedef59SAnirudh Venkataramanan memcpy(dest, &dest_qword, sizeof(dest_qword)); 2464cdedef59SAnirudh Venkataramanan } 2465cdedef59SAnirudh Venkataramanan 2466cdedef59SAnirudh Venkataramanan /** 2467cdedef59SAnirudh Venkataramanan * ice_set_ctx - set context bits in packed structure 2468cdedef59SAnirudh Venkataramanan * @src_ctx: pointer to a generic non-packed context structure 2469cdedef59SAnirudh Venkataramanan * @dest_ctx: pointer to memory for the packed structure 2470cdedef59SAnirudh Venkataramanan * @ce_info: a description of the structure to be transformed 2471cdedef59SAnirudh Venkataramanan */ 2472cdedef59SAnirudh Venkataramanan enum ice_status 2473cdedef59SAnirudh Venkataramanan ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) 2474cdedef59SAnirudh Venkataramanan { 2475cdedef59SAnirudh Venkataramanan int f; 2476cdedef59SAnirudh Venkataramanan 2477cdedef59SAnirudh Venkataramanan for (f = 0; ce_info[f].width; f++) { 2478cdedef59SAnirudh Venkataramanan /* We have to deal with each element of the FW response 2479cdedef59SAnirudh Venkataramanan * using the correct size so that we are correct regardless 2480cdedef59SAnirudh Venkataramanan * of the endianness of the machine. 2481cdedef59SAnirudh Venkataramanan */ 2482cdedef59SAnirudh Venkataramanan switch (ce_info[f].size_of) { 2483cdedef59SAnirudh Venkataramanan case sizeof(u8): 2484cdedef59SAnirudh Venkataramanan ice_write_byte(src_ctx, dest_ctx, &ce_info[f]); 2485cdedef59SAnirudh Venkataramanan break; 2486cdedef59SAnirudh Venkataramanan case sizeof(u16): 2487cdedef59SAnirudh Venkataramanan ice_write_word(src_ctx, dest_ctx, &ce_info[f]); 2488cdedef59SAnirudh Venkataramanan break; 2489cdedef59SAnirudh Venkataramanan case sizeof(u32): 2490cdedef59SAnirudh Venkataramanan ice_write_dword(src_ctx, dest_ctx, &ce_info[f]); 2491cdedef59SAnirudh Venkataramanan break; 2492cdedef59SAnirudh Venkataramanan case sizeof(u64): 2493cdedef59SAnirudh Venkataramanan ice_write_qword(src_ctx, dest_ctx, &ce_info[f]); 2494cdedef59SAnirudh Venkataramanan break; 2495cdedef59SAnirudh Venkataramanan default: 2496cdedef59SAnirudh Venkataramanan return ICE_ERR_INVAL_SIZE; 2497cdedef59SAnirudh Venkataramanan } 2498cdedef59SAnirudh Venkataramanan } 2499cdedef59SAnirudh Venkataramanan 2500cdedef59SAnirudh Venkataramanan return 0; 2501cdedef59SAnirudh Venkataramanan } 2502cdedef59SAnirudh Venkataramanan 2503cdedef59SAnirudh Venkataramanan /** 2504cdedef59SAnirudh Venkataramanan * ice_ena_vsi_txq 2505cdedef59SAnirudh Venkataramanan * @pi: port information structure 25064fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 2507cdedef59SAnirudh Venkataramanan * @tc: tc number 2508cdedef59SAnirudh Venkataramanan * @num_qgrps: Number of added queue groups 2509cdedef59SAnirudh Venkataramanan * @buf: list of queue groups to be added 2510cdedef59SAnirudh Venkataramanan * @buf_size: size of buffer for indirect command 2511cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2512cdedef59SAnirudh Venkataramanan * 2513cdedef59SAnirudh Venkataramanan * This function adds one lan q 2514cdedef59SAnirudh Venkataramanan */ 2515cdedef59SAnirudh Venkataramanan enum ice_status 25164fb33f31SAnirudh Venkataramanan ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps, 2517cdedef59SAnirudh Venkataramanan struct ice_aqc_add_tx_qgrp *buf, u16 buf_size, 2518cdedef59SAnirudh Venkataramanan struct ice_sq_cd *cd) 2519cdedef59SAnirudh Venkataramanan { 2520cdedef59SAnirudh Venkataramanan struct ice_aqc_txsched_elem_data node = { 0 }; 2521cdedef59SAnirudh Venkataramanan struct ice_sched_node *parent; 2522cdedef59SAnirudh Venkataramanan enum ice_status status; 2523cdedef59SAnirudh Venkataramanan struct ice_hw *hw; 2524cdedef59SAnirudh Venkataramanan 2525cdedef59SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 2526cdedef59SAnirudh Venkataramanan return ICE_ERR_CFG; 2527cdedef59SAnirudh Venkataramanan 2528cdedef59SAnirudh Venkataramanan if (num_qgrps > 1 || buf->num_txqs > 1) 2529cdedef59SAnirudh Venkataramanan return ICE_ERR_MAX_LIMIT; 2530cdedef59SAnirudh Venkataramanan 2531cdedef59SAnirudh Venkataramanan hw = pi->hw; 2532cdedef59SAnirudh Venkataramanan 25334fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(hw, vsi_handle)) 25344fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 25354fb33f31SAnirudh Venkataramanan 2536cdedef59SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 2537cdedef59SAnirudh Venkataramanan 2538cdedef59SAnirudh Venkataramanan /* find a parent node */ 25394fb33f31SAnirudh Venkataramanan parent = ice_sched_get_free_qparent(pi, vsi_handle, tc, 2540cdedef59SAnirudh Venkataramanan ICE_SCHED_NODE_OWNER_LAN); 2541cdedef59SAnirudh Venkataramanan if (!parent) { 2542cdedef59SAnirudh Venkataramanan status = ICE_ERR_PARAM; 2543cdedef59SAnirudh Venkataramanan goto ena_txq_exit; 2544cdedef59SAnirudh Venkataramanan } 25454fb33f31SAnirudh Venkataramanan 2546cdedef59SAnirudh Venkataramanan buf->parent_teid = parent->info.node_teid; 2547cdedef59SAnirudh Venkataramanan node.parent_teid = parent->info.node_teid; 2548cdedef59SAnirudh Venkataramanan /* Mark that the values in the "generic" section as valid. The default 2549cdedef59SAnirudh Venkataramanan * value in the "generic" section is zero. This means that : 2550cdedef59SAnirudh Venkataramanan * - Scheduling mode is Bytes Per Second (BPS), indicated by Bit 0. 2551cdedef59SAnirudh Venkataramanan * - 0 priority among siblings, indicated by Bit 1-3. 2552cdedef59SAnirudh Venkataramanan * - WFQ, indicated by Bit 4. 2553cdedef59SAnirudh Venkataramanan * - 0 Adjustment value is used in PSM credit update flow, indicated by 2554cdedef59SAnirudh Venkataramanan * Bit 5-6. 2555cdedef59SAnirudh Venkataramanan * - Bit 7 is reserved. 2556cdedef59SAnirudh Venkataramanan * Without setting the generic section as valid in valid_sections, the 2557cdedef59SAnirudh Venkataramanan * Admin Q command will fail with error code ICE_AQ_RC_EINVAL. 2558cdedef59SAnirudh Venkataramanan */ 2559cdedef59SAnirudh Venkataramanan buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC; 2560cdedef59SAnirudh Venkataramanan 2561cdedef59SAnirudh Venkataramanan /* add the lan q */ 2562cdedef59SAnirudh Venkataramanan status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd); 2563cdedef59SAnirudh Venkataramanan if (status) 2564cdedef59SAnirudh Venkataramanan goto ena_txq_exit; 2565cdedef59SAnirudh Venkataramanan 2566cdedef59SAnirudh Venkataramanan node.node_teid = buf->txqs[0].q_teid; 2567cdedef59SAnirudh Venkataramanan node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF; 2568cdedef59SAnirudh Venkataramanan 2569cdedef59SAnirudh Venkataramanan /* add a leaf node into schduler tree q layer */ 2570cdedef59SAnirudh Venkataramanan status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node); 2571cdedef59SAnirudh Venkataramanan 2572cdedef59SAnirudh Venkataramanan ena_txq_exit: 2573cdedef59SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 2574cdedef59SAnirudh Venkataramanan return status; 2575cdedef59SAnirudh Venkataramanan } 2576cdedef59SAnirudh Venkataramanan 2577cdedef59SAnirudh Venkataramanan /** 2578cdedef59SAnirudh Venkataramanan * ice_dis_vsi_txq 2579cdedef59SAnirudh Venkataramanan * @pi: port information structure 2580cdedef59SAnirudh Venkataramanan * @num_queues: number of queues 2581cdedef59SAnirudh Venkataramanan * @q_ids: pointer to the q_id array 2582cdedef59SAnirudh Venkataramanan * @q_teids: pointer to queue node teids 2583cdedef59SAnirudh Venkataramanan * @cd: pointer to command details structure or NULL 2584cdedef59SAnirudh Venkataramanan * 2585cdedef59SAnirudh Venkataramanan * This function removes queues and their corresponding nodes in SW DB 2586cdedef59SAnirudh Venkataramanan */ 2587cdedef59SAnirudh Venkataramanan enum ice_status 2588cdedef59SAnirudh Venkataramanan ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids, 2589cdedef59SAnirudh Venkataramanan u32 *q_teids, struct ice_sq_cd *cd) 2590cdedef59SAnirudh Venkataramanan { 2591cdedef59SAnirudh Venkataramanan enum ice_status status = ICE_ERR_DOES_NOT_EXIST; 2592cdedef59SAnirudh Venkataramanan struct ice_aqc_dis_txq_item qg_list; 2593cdedef59SAnirudh Venkataramanan u16 i; 2594cdedef59SAnirudh Venkataramanan 2595cdedef59SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 2596cdedef59SAnirudh Venkataramanan return ICE_ERR_CFG; 2597cdedef59SAnirudh Venkataramanan 2598cdedef59SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 2599cdedef59SAnirudh Venkataramanan 2600cdedef59SAnirudh Venkataramanan for (i = 0; i < num_queues; i++) { 2601cdedef59SAnirudh Venkataramanan struct ice_sched_node *node; 2602cdedef59SAnirudh Venkataramanan 2603cdedef59SAnirudh Venkataramanan node = ice_sched_find_node_by_teid(pi->root, q_teids[i]); 2604cdedef59SAnirudh Venkataramanan if (!node) 2605cdedef59SAnirudh Venkataramanan continue; 2606cdedef59SAnirudh Venkataramanan qg_list.parent_teid = node->info.parent_teid; 2607cdedef59SAnirudh Venkataramanan qg_list.num_qs = 1; 2608cdedef59SAnirudh Venkataramanan qg_list.q_id[0] = cpu_to_le16(q_ids[i]); 2609cdedef59SAnirudh Venkataramanan status = ice_aq_dis_lan_txq(pi->hw, 1, &qg_list, 2610cdedef59SAnirudh Venkataramanan sizeof(qg_list), cd); 2611cdedef59SAnirudh Venkataramanan 2612cdedef59SAnirudh Venkataramanan if (status) 2613cdedef59SAnirudh Venkataramanan break; 2614cdedef59SAnirudh Venkataramanan ice_free_sched_node(pi, node); 2615cdedef59SAnirudh Venkataramanan } 2616cdedef59SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 2617cdedef59SAnirudh Venkataramanan return status; 2618cdedef59SAnirudh Venkataramanan } 26195513b920SAnirudh Venkataramanan 26205513b920SAnirudh Venkataramanan /** 26215513b920SAnirudh Venkataramanan * ice_cfg_vsi_qs - configure the new/exisiting VSI queues 26225513b920SAnirudh Venkataramanan * @pi: port information structure 26234fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 26245513b920SAnirudh Venkataramanan * @tc_bitmap: TC bitmap 26255513b920SAnirudh Venkataramanan * @maxqs: max queues array per TC 26265513b920SAnirudh Venkataramanan * @owner: lan or rdma 26275513b920SAnirudh Venkataramanan * 26285513b920SAnirudh Venkataramanan * This function adds/updates the VSI queues per TC. 26295513b920SAnirudh Venkataramanan */ 26305513b920SAnirudh Venkataramanan static enum ice_status 26314fb33f31SAnirudh Venkataramanan ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 26325513b920SAnirudh Venkataramanan u16 *maxqs, u8 owner) 26335513b920SAnirudh Venkataramanan { 26345513b920SAnirudh Venkataramanan enum ice_status status = 0; 26355513b920SAnirudh Venkataramanan u8 i; 26365513b920SAnirudh Venkataramanan 26375513b920SAnirudh Venkataramanan if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 26385513b920SAnirudh Venkataramanan return ICE_ERR_CFG; 26395513b920SAnirudh Venkataramanan 26404fb33f31SAnirudh Venkataramanan if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 26414fb33f31SAnirudh Venkataramanan return ICE_ERR_PARAM; 26424fb33f31SAnirudh Venkataramanan 26435513b920SAnirudh Venkataramanan mutex_lock(&pi->sched_lock); 26445513b920SAnirudh Venkataramanan 26455513b920SAnirudh Venkataramanan for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) { 26465513b920SAnirudh Venkataramanan /* configuration is possible only if TC node is present */ 26475513b920SAnirudh Venkataramanan if (!ice_sched_get_tc_node(pi, i)) 26485513b920SAnirudh Venkataramanan continue; 26495513b920SAnirudh Venkataramanan 26504fb33f31SAnirudh Venkataramanan status = ice_sched_cfg_vsi(pi, vsi_handle, i, maxqs[i], owner, 26515513b920SAnirudh Venkataramanan ice_is_tc_ena(tc_bitmap, i)); 26525513b920SAnirudh Venkataramanan if (status) 26535513b920SAnirudh Venkataramanan break; 26545513b920SAnirudh Venkataramanan } 26555513b920SAnirudh Venkataramanan 26565513b920SAnirudh Venkataramanan mutex_unlock(&pi->sched_lock); 26575513b920SAnirudh Venkataramanan return status; 26585513b920SAnirudh Venkataramanan } 26595513b920SAnirudh Venkataramanan 26605513b920SAnirudh Venkataramanan /** 26615513b920SAnirudh Venkataramanan * ice_cfg_vsi_lan - configure VSI lan queues 26625513b920SAnirudh Venkataramanan * @pi: port information structure 26634fb33f31SAnirudh Venkataramanan * @vsi_handle: software VSI handle 26645513b920SAnirudh Venkataramanan * @tc_bitmap: TC bitmap 26655513b920SAnirudh Venkataramanan * @max_lanqs: max lan queues array per TC 26665513b920SAnirudh Venkataramanan * 26675513b920SAnirudh Venkataramanan * This function adds/updates the VSI lan queues per TC. 26685513b920SAnirudh Venkataramanan */ 26695513b920SAnirudh Venkataramanan enum ice_status 26704fb33f31SAnirudh Venkataramanan ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, 26715513b920SAnirudh Venkataramanan u16 *max_lanqs) 26725513b920SAnirudh Venkataramanan { 26734fb33f31SAnirudh Venkataramanan return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_lanqs, 26745513b920SAnirudh Venkataramanan ICE_SCHED_NODE_OWNER_LAN); 26755513b920SAnirudh Venkataramanan } 267645d3d428SAnirudh Venkataramanan 267745d3d428SAnirudh Venkataramanan /** 267845d3d428SAnirudh Venkataramanan * ice_stat_update40 - read 40 bit stat from the chip and update stat values 267945d3d428SAnirudh Venkataramanan * @hw: ptr to the hardware info 268045d3d428SAnirudh Venkataramanan * @hireg: high 32 bit HW register to read from 268145d3d428SAnirudh Venkataramanan * @loreg: low 32 bit HW register to read from 268245d3d428SAnirudh Venkataramanan * @prev_stat_loaded: bool to specify if previous stats are loaded 268345d3d428SAnirudh Venkataramanan * @prev_stat: ptr to previous loaded stat value 268445d3d428SAnirudh Venkataramanan * @cur_stat: ptr to current stat value 268545d3d428SAnirudh Venkataramanan */ 268645d3d428SAnirudh Venkataramanan void ice_stat_update40(struct ice_hw *hw, u32 hireg, u32 loreg, 268745d3d428SAnirudh Venkataramanan bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat) 268845d3d428SAnirudh Venkataramanan { 268945d3d428SAnirudh Venkataramanan u64 new_data; 269045d3d428SAnirudh Venkataramanan 269145d3d428SAnirudh Venkataramanan new_data = rd32(hw, loreg); 269245d3d428SAnirudh Venkataramanan new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 269345d3d428SAnirudh Venkataramanan 269445d3d428SAnirudh Venkataramanan /* device stats are not reset at PFR, they likely will not be zeroed 269545d3d428SAnirudh Venkataramanan * when the driver starts. So save the first values read and use them as 269645d3d428SAnirudh Venkataramanan * offsets to be subtracted from the raw values in order to report stats 269745d3d428SAnirudh Venkataramanan * that count from zero. 269845d3d428SAnirudh Venkataramanan */ 269945d3d428SAnirudh Venkataramanan if (!prev_stat_loaded) 270045d3d428SAnirudh Venkataramanan *prev_stat = new_data; 270145d3d428SAnirudh Venkataramanan if (new_data >= *prev_stat) 270245d3d428SAnirudh Venkataramanan *cur_stat = new_data - *prev_stat; 270345d3d428SAnirudh Venkataramanan else 270445d3d428SAnirudh Venkataramanan /* to manage the potential roll-over */ 270545d3d428SAnirudh Venkataramanan *cur_stat = (new_data + BIT_ULL(40)) - *prev_stat; 270645d3d428SAnirudh Venkataramanan *cur_stat &= 0xFFFFFFFFFFULL; 270745d3d428SAnirudh Venkataramanan } 270845d3d428SAnirudh Venkataramanan 270945d3d428SAnirudh Venkataramanan /** 271045d3d428SAnirudh Venkataramanan * ice_stat_update32 - read 32 bit stat from the chip and update stat values 271145d3d428SAnirudh Venkataramanan * @hw: ptr to the hardware info 271245d3d428SAnirudh Venkataramanan * @reg: HW register to read from 271345d3d428SAnirudh Venkataramanan * @prev_stat_loaded: bool to specify if previous stats are loaded 271445d3d428SAnirudh Venkataramanan * @prev_stat: ptr to previous loaded stat value 271545d3d428SAnirudh Venkataramanan * @cur_stat: ptr to current stat value 271645d3d428SAnirudh Venkataramanan */ 271745d3d428SAnirudh Venkataramanan void ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 271845d3d428SAnirudh Venkataramanan u64 *prev_stat, u64 *cur_stat) 271945d3d428SAnirudh Venkataramanan { 272045d3d428SAnirudh Venkataramanan u32 new_data; 272145d3d428SAnirudh Venkataramanan 272245d3d428SAnirudh Venkataramanan new_data = rd32(hw, reg); 272345d3d428SAnirudh Venkataramanan 272445d3d428SAnirudh Venkataramanan /* device stats are not reset at PFR, they likely will not be zeroed 272545d3d428SAnirudh Venkataramanan * when the driver starts. So save the first values read and use them as 272645d3d428SAnirudh Venkataramanan * offsets to be subtracted from the raw values in order to report stats 272745d3d428SAnirudh Venkataramanan * that count from zero. 272845d3d428SAnirudh Venkataramanan */ 272945d3d428SAnirudh Venkataramanan if (!prev_stat_loaded) 273045d3d428SAnirudh Venkataramanan *prev_stat = new_data; 273145d3d428SAnirudh Venkataramanan if (new_data >= *prev_stat) 273245d3d428SAnirudh Venkataramanan *cur_stat = new_data - *prev_stat; 273345d3d428SAnirudh Venkataramanan else 273445d3d428SAnirudh Venkataramanan /* to manage the potential roll-over */ 273545d3d428SAnirudh Venkataramanan *cur_stat = (new_data + BIT_ULL(32)) - *prev_stat; 273645d3d428SAnirudh Venkataramanan } 2737