1eff380aaSAnirudh Venkataramanan // SPDX-License-Identifier: GPL-2.0 2eff380aaSAnirudh Venkataramanan /* Copyright (c) 2019, Intel Corporation. */ 3eff380aaSAnirudh Venkataramanan 4175fc430SBjörn Töpel #include <net/xdp_sock_drv.h> 5eff380aaSAnirudh Venkataramanan #include "ice_base.h" 6401ce33bSBrett Creeley #include "ice_lib.h" 7eff380aaSAnirudh Venkataramanan #include "ice_dcb_lib.h" 8eff380aaSAnirudh Venkataramanan 9eff380aaSAnirudh Venkataramanan /** 10eff380aaSAnirudh Venkataramanan * __ice_vsi_get_qs_contig - Assign a contiguous chunk of queues to VSI 11eff380aaSAnirudh Venkataramanan * @qs_cfg: gathered variables needed for PF->VSI queues assignment 12eff380aaSAnirudh Venkataramanan * 13eff380aaSAnirudh Venkataramanan * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap 14eff380aaSAnirudh Venkataramanan */ 15eff380aaSAnirudh Venkataramanan static int __ice_vsi_get_qs_contig(struct ice_qs_cfg *qs_cfg) 16eff380aaSAnirudh Venkataramanan { 1722bef5e7SJesse Brandeburg unsigned int offset, i; 18eff380aaSAnirudh Venkataramanan 19eff380aaSAnirudh Venkataramanan mutex_lock(qs_cfg->qs_mutex); 20eff380aaSAnirudh Venkataramanan offset = bitmap_find_next_zero_area(qs_cfg->pf_map, qs_cfg->pf_map_size, 21eff380aaSAnirudh Venkataramanan 0, qs_cfg->q_count, 0); 22eff380aaSAnirudh Venkataramanan if (offset >= qs_cfg->pf_map_size) { 23eff380aaSAnirudh Venkataramanan mutex_unlock(qs_cfg->qs_mutex); 24eff380aaSAnirudh Venkataramanan return -ENOMEM; 25eff380aaSAnirudh Venkataramanan } 26eff380aaSAnirudh Venkataramanan 27eff380aaSAnirudh Venkataramanan bitmap_set(qs_cfg->pf_map, offset, qs_cfg->q_count); 28eff380aaSAnirudh Venkataramanan for (i = 0; i < qs_cfg->q_count; i++) 2988865fc4SKarol Kolacinski qs_cfg->vsi_map[i + qs_cfg->vsi_map_offset] = (u16)(i + offset); 30eff380aaSAnirudh Venkataramanan mutex_unlock(qs_cfg->qs_mutex); 31eff380aaSAnirudh Venkataramanan 32eff380aaSAnirudh Venkataramanan return 0; 33eff380aaSAnirudh Venkataramanan } 34eff380aaSAnirudh Venkataramanan 35eff380aaSAnirudh Venkataramanan /** 36eff380aaSAnirudh Venkataramanan * __ice_vsi_get_qs_sc - Assign a scattered queues from PF to VSI 37eff380aaSAnirudh Venkataramanan * @qs_cfg: gathered variables needed for pf->vsi queues assignment 38eff380aaSAnirudh Venkataramanan * 39eff380aaSAnirudh Venkataramanan * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap 40eff380aaSAnirudh Venkataramanan */ 41eff380aaSAnirudh Venkataramanan static int __ice_vsi_get_qs_sc(struct ice_qs_cfg *qs_cfg) 42eff380aaSAnirudh Venkataramanan { 4322bef5e7SJesse Brandeburg unsigned int i, index = 0; 44eff380aaSAnirudh Venkataramanan 45eff380aaSAnirudh Venkataramanan mutex_lock(qs_cfg->qs_mutex); 46eff380aaSAnirudh Venkataramanan for (i = 0; i < qs_cfg->q_count; i++) { 47eff380aaSAnirudh Venkataramanan index = find_next_zero_bit(qs_cfg->pf_map, 48eff380aaSAnirudh Venkataramanan qs_cfg->pf_map_size, index); 49eff380aaSAnirudh Venkataramanan if (index >= qs_cfg->pf_map_size) 50eff380aaSAnirudh Venkataramanan goto err_scatter; 51eff380aaSAnirudh Venkataramanan set_bit(index, qs_cfg->pf_map); 5288865fc4SKarol Kolacinski qs_cfg->vsi_map[i + qs_cfg->vsi_map_offset] = (u16)index; 53eff380aaSAnirudh Venkataramanan } 54eff380aaSAnirudh Venkataramanan mutex_unlock(qs_cfg->qs_mutex); 55eff380aaSAnirudh Venkataramanan 56eff380aaSAnirudh Venkataramanan return 0; 57eff380aaSAnirudh Venkataramanan err_scatter: 58eff380aaSAnirudh Venkataramanan for (index = 0; index < i; index++) { 59eff380aaSAnirudh Venkataramanan clear_bit(qs_cfg->vsi_map[index], qs_cfg->pf_map); 60eff380aaSAnirudh Venkataramanan qs_cfg->vsi_map[index + qs_cfg->vsi_map_offset] = 0; 61eff380aaSAnirudh Venkataramanan } 62eff380aaSAnirudh Venkataramanan mutex_unlock(qs_cfg->qs_mutex); 63eff380aaSAnirudh Venkataramanan 64eff380aaSAnirudh Venkataramanan return -ENOMEM; 65eff380aaSAnirudh Venkataramanan } 66eff380aaSAnirudh Venkataramanan 67eff380aaSAnirudh Venkataramanan /** 68eff380aaSAnirudh Venkataramanan * ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 69eff380aaSAnirudh Venkataramanan * @pf: the PF being configured 70eff380aaSAnirudh Venkataramanan * @pf_q: the PF queue 71eff380aaSAnirudh Venkataramanan * @ena: enable or disable state of the queue 72eff380aaSAnirudh Venkataramanan * 73eff380aaSAnirudh Venkataramanan * This routine will wait for the given Rx queue of the PF to reach the 74eff380aaSAnirudh Venkataramanan * enabled or disabled state. 75eff380aaSAnirudh Venkataramanan * Returns -ETIMEDOUT in case of failing to reach the requested state after 76eff380aaSAnirudh Venkataramanan * multiple retries; else will return 0 in case of success. 77eff380aaSAnirudh Venkataramanan */ 78eff380aaSAnirudh Venkataramanan static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena) 79eff380aaSAnirudh Venkataramanan { 80eff380aaSAnirudh Venkataramanan int i; 81eff380aaSAnirudh Venkataramanan 82eff380aaSAnirudh Venkataramanan for (i = 0; i < ICE_Q_WAIT_MAX_RETRY; i++) { 83eff380aaSAnirudh Venkataramanan if (ena == !!(rd32(&pf->hw, QRX_CTRL(pf_q)) & 84eff380aaSAnirudh Venkataramanan QRX_CTRL_QENA_STAT_M)) 85eff380aaSAnirudh Venkataramanan return 0; 86eff380aaSAnirudh Venkataramanan 87eff380aaSAnirudh Venkataramanan usleep_range(20, 40); 88eff380aaSAnirudh Venkataramanan } 89eff380aaSAnirudh Venkataramanan 90eff380aaSAnirudh Venkataramanan return -ETIMEDOUT; 91eff380aaSAnirudh Venkataramanan } 92eff380aaSAnirudh Venkataramanan 93eff380aaSAnirudh Venkataramanan /** 94eff380aaSAnirudh Venkataramanan * ice_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 95eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 96eff380aaSAnirudh Venkataramanan * @v_idx: index of the vector in the VSI struct 97eff380aaSAnirudh Venkataramanan * 98118e0e10SMichal Swiatkowski * We allocate one q_vector and set default value for ITR setting associated 99118e0e10SMichal Swiatkowski * with this q_vector. If allocation fails we return -ENOMEM. 100eff380aaSAnirudh Venkataramanan */ 10188865fc4SKarol Kolacinski static int ice_vsi_alloc_q_vector(struct ice_vsi *vsi, u16 v_idx) 102eff380aaSAnirudh Venkataramanan { 103eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 104eff380aaSAnirudh Venkataramanan struct ice_q_vector *q_vector; 105eff380aaSAnirudh Venkataramanan 106eff380aaSAnirudh Venkataramanan /* allocate q_vector */ 1074015d11eSBrett Creeley q_vector = devm_kzalloc(ice_pf_to_dev(pf), sizeof(*q_vector), 1084015d11eSBrett Creeley GFP_KERNEL); 109eff380aaSAnirudh Venkataramanan if (!q_vector) 110eff380aaSAnirudh Venkataramanan return -ENOMEM; 111eff380aaSAnirudh Venkataramanan 112eff380aaSAnirudh Venkataramanan q_vector->vsi = vsi; 113eff380aaSAnirudh Venkataramanan q_vector->v_idx = v_idx; 114118e0e10SMichal Swiatkowski q_vector->tx.itr_setting = ICE_DFLT_TX_ITR; 115118e0e10SMichal Swiatkowski q_vector->rx.itr_setting = ICE_DFLT_RX_ITR; 116d59684a0SJesse Brandeburg q_vector->tx.itr_mode = ITR_DYNAMIC; 117d59684a0SJesse Brandeburg q_vector->rx.itr_mode = ITR_DYNAMIC; 118dc23715cSMaciej Fijalkowski q_vector->tx.type = ICE_TX_CONTAINER; 119dc23715cSMaciej Fijalkowski q_vector->rx.type = ICE_RX_CONTAINER; 120d59684a0SJesse Brandeburg 121eff380aaSAnirudh Venkataramanan if (vsi->type == ICE_VSI_VF) 122eff380aaSAnirudh Venkataramanan goto out; 123eff380aaSAnirudh Venkataramanan /* only set affinity_mask if the CPU is online */ 124eff380aaSAnirudh Venkataramanan if (cpu_online(v_idx)) 125eff380aaSAnirudh Venkataramanan cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 126eff380aaSAnirudh Venkataramanan 127eff380aaSAnirudh Venkataramanan /* This will not be called in the driver load path because the netdev 128eff380aaSAnirudh Venkataramanan * will not be created yet. All other cases with register the NAPI 129eff380aaSAnirudh Venkataramanan * handler here (i.e. resume, reset/rebuild, etc.) 130eff380aaSAnirudh Venkataramanan */ 131eff380aaSAnirudh Venkataramanan if (vsi->netdev) 132eff380aaSAnirudh Venkataramanan netif_napi_add(vsi->netdev, &q_vector->napi, ice_napi_poll, 133eff380aaSAnirudh Venkataramanan NAPI_POLL_WEIGHT); 134eff380aaSAnirudh Venkataramanan 135eff380aaSAnirudh Venkataramanan out: 136eff380aaSAnirudh Venkataramanan /* tie q_vector and VSI together */ 137eff380aaSAnirudh Venkataramanan vsi->q_vectors[v_idx] = q_vector; 138eff380aaSAnirudh Venkataramanan 139eff380aaSAnirudh Venkataramanan return 0; 140eff380aaSAnirudh Venkataramanan } 141eff380aaSAnirudh Venkataramanan 142eff380aaSAnirudh Venkataramanan /** 143eff380aaSAnirudh Venkataramanan * ice_free_q_vector - Free memory allocated for a specific interrupt vector 144eff380aaSAnirudh Venkataramanan * @vsi: VSI having the memory freed 145eff380aaSAnirudh Venkataramanan * @v_idx: index of the vector to be freed 146eff380aaSAnirudh Venkataramanan */ 147eff380aaSAnirudh Venkataramanan static void ice_free_q_vector(struct ice_vsi *vsi, int v_idx) 148eff380aaSAnirudh Venkataramanan { 149eff380aaSAnirudh Venkataramanan struct ice_q_vector *q_vector; 150eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 151e72bba21SMaciej Fijalkowski struct ice_tx_ring *tx_ring; 152e72bba21SMaciej Fijalkowski struct ice_rx_ring *rx_ring; 1534015d11eSBrett Creeley struct device *dev; 154eff380aaSAnirudh Venkataramanan 1554015d11eSBrett Creeley dev = ice_pf_to_dev(pf); 156eff380aaSAnirudh Venkataramanan if (!vsi->q_vectors[v_idx]) { 1574015d11eSBrett Creeley dev_dbg(dev, "Queue vector at index %d not found\n", v_idx); 158eff380aaSAnirudh Venkataramanan return; 159eff380aaSAnirudh Venkataramanan } 160eff380aaSAnirudh Venkataramanan q_vector = vsi->q_vectors[v_idx]; 161eff380aaSAnirudh Venkataramanan 162e72bba21SMaciej Fijalkowski ice_for_each_tx_ring(tx_ring, q_vector->tx) 163e72bba21SMaciej Fijalkowski tx_ring->q_vector = NULL; 164e72bba21SMaciej Fijalkowski ice_for_each_rx_ring(rx_ring, q_vector->rx) 165e72bba21SMaciej Fijalkowski rx_ring->q_vector = NULL; 166eff380aaSAnirudh Venkataramanan 167eff380aaSAnirudh Venkataramanan /* only VSI with an associated netdev is set up with NAPI */ 168eff380aaSAnirudh Venkataramanan if (vsi->netdev) 169eff380aaSAnirudh Venkataramanan netif_napi_del(&q_vector->napi); 170eff380aaSAnirudh Venkataramanan 1714015d11eSBrett Creeley devm_kfree(dev, q_vector); 172eff380aaSAnirudh Venkataramanan vsi->q_vectors[v_idx] = NULL; 173eff380aaSAnirudh Venkataramanan } 174eff380aaSAnirudh Venkataramanan 175eff380aaSAnirudh Venkataramanan /** 176eff380aaSAnirudh Venkataramanan * ice_cfg_itr_gran - set the ITR granularity to 2 usecs if not already set 177eff380aaSAnirudh Venkataramanan * @hw: board specific structure 178eff380aaSAnirudh Venkataramanan */ 179eff380aaSAnirudh Venkataramanan static void ice_cfg_itr_gran(struct ice_hw *hw) 180eff380aaSAnirudh Venkataramanan { 181eff380aaSAnirudh Venkataramanan u32 regval = rd32(hw, GLINT_CTL); 182eff380aaSAnirudh Venkataramanan 183eff380aaSAnirudh Venkataramanan /* no need to update global register if ITR gran is already set */ 184eff380aaSAnirudh Venkataramanan if (!(regval & GLINT_CTL_DIS_AUTOMASK_M) && 185eff380aaSAnirudh Venkataramanan (((regval & GLINT_CTL_ITR_GRAN_200_M) >> 186eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_200_S) == ICE_ITR_GRAN_US) && 187eff380aaSAnirudh Venkataramanan (((regval & GLINT_CTL_ITR_GRAN_100_M) >> 188eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_100_S) == ICE_ITR_GRAN_US) && 189eff380aaSAnirudh Venkataramanan (((regval & GLINT_CTL_ITR_GRAN_50_M) >> 190eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_50_S) == ICE_ITR_GRAN_US) && 191eff380aaSAnirudh Venkataramanan (((regval & GLINT_CTL_ITR_GRAN_25_M) >> 192eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_25_S) == ICE_ITR_GRAN_US)) 193eff380aaSAnirudh Venkataramanan return; 194eff380aaSAnirudh Venkataramanan 195eff380aaSAnirudh Venkataramanan regval = ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_200_S) & 196eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_200_M) | 197eff380aaSAnirudh Venkataramanan ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_100_S) & 198eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_100_M) | 199eff380aaSAnirudh Venkataramanan ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_50_S) & 200eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_50_M) | 201eff380aaSAnirudh Venkataramanan ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_25_S) & 202eff380aaSAnirudh Venkataramanan GLINT_CTL_ITR_GRAN_25_M); 203eff380aaSAnirudh Venkataramanan wr32(hw, GLINT_CTL, regval); 204eff380aaSAnirudh Venkataramanan } 205eff380aaSAnirudh Venkataramanan 206eff380aaSAnirudh Venkataramanan /** 207e72bba21SMaciej Fijalkowski * ice_calc_txq_handle - calculate the queue handle 208e75d1b2cSMaciej Fijalkowski * @vsi: VSI that ring belongs to 209e75d1b2cSMaciej Fijalkowski * @ring: ring to get the absolute queue index 210e75d1b2cSMaciej Fijalkowski * @tc: traffic class number 211e75d1b2cSMaciej Fijalkowski */ 212e72bba21SMaciej Fijalkowski static u16 ice_calc_txq_handle(struct ice_vsi *vsi, struct ice_tx_ring *ring, u8 tc) 213e75d1b2cSMaciej Fijalkowski { 214af23635aSJesse Brandeburg WARN_ONCE(ice_ring_is_xdp(ring) && tc, "XDP ring can't belong to TC other than 0\n"); 215efc2214bSMaciej Fijalkowski 216*0754d65bSKiran Patil if (ring->ch) 217*0754d65bSKiran Patil return ring->q_index - ring->ch->base_q; 218*0754d65bSKiran Patil 219e75d1b2cSMaciej Fijalkowski /* Idea here for calculation is that we subtract the number of queue 220e75d1b2cSMaciej Fijalkowski * count from TC that ring belongs to from it's absolute queue index 221e75d1b2cSMaciej Fijalkowski * and as a result we get the queue's index within TC. 222e75d1b2cSMaciej Fijalkowski */ 223e75d1b2cSMaciej Fijalkowski return ring->q_index - vsi->tc_cfg.tc_info[tc].qoffset; 224e75d1b2cSMaciej Fijalkowski } 225e75d1b2cSMaciej Fijalkowski 226e75d1b2cSMaciej Fijalkowski /** 227e72bba21SMaciej Fijalkowski * ice_eswitch_calc_txq_handle 228f66756e0SGrzegorz Nitka * @ring: pointer to ring which unique index is needed 229f66756e0SGrzegorz Nitka * 230f66756e0SGrzegorz Nitka * To correctly work with many netdevs ring->q_index of Tx rings on switchdev 231f66756e0SGrzegorz Nitka * VSI can repeat. Hardware ring setup requires unique q_index. Calculate it 232f66756e0SGrzegorz Nitka * here by finding index in vsi->tx_rings of this ring. 233f66756e0SGrzegorz Nitka * 234f66756e0SGrzegorz Nitka * Return ICE_INVAL_Q_INDEX when index wasn't found. Should never happen, 235f66756e0SGrzegorz Nitka * because VSI is get from ring->vsi, so it has to be present in this VSI. 236f66756e0SGrzegorz Nitka */ 237e72bba21SMaciej Fijalkowski static u16 ice_eswitch_calc_txq_handle(struct ice_tx_ring *ring) 238f66756e0SGrzegorz Nitka { 239f66756e0SGrzegorz Nitka struct ice_vsi *vsi = ring->vsi; 240f66756e0SGrzegorz Nitka int i; 241f66756e0SGrzegorz Nitka 242f66756e0SGrzegorz Nitka ice_for_each_txq(vsi, i) { 243f66756e0SGrzegorz Nitka if (vsi->tx_rings[i] == ring) 244f66756e0SGrzegorz Nitka return i; 245f66756e0SGrzegorz Nitka } 246f66756e0SGrzegorz Nitka 247f66756e0SGrzegorz Nitka return ICE_INVAL_Q_INDEX; 248f66756e0SGrzegorz Nitka } 249f66756e0SGrzegorz Nitka 250f66756e0SGrzegorz Nitka /** 251634da4c1SBenita Bose * ice_cfg_xps_tx_ring - Configure XPS for a Tx ring 252634da4c1SBenita Bose * @ring: The Tx ring to configure 253634da4c1SBenita Bose * 254634da4c1SBenita Bose * This enables/disables XPS for a given Tx descriptor ring 255634da4c1SBenita Bose * based on the TCs enabled for the VSI that ring belongs to. 256634da4c1SBenita Bose */ 257e72bba21SMaciej Fijalkowski static void ice_cfg_xps_tx_ring(struct ice_tx_ring *ring) 258634da4c1SBenita Bose { 259634da4c1SBenita Bose if (!ring->q_vector || !ring->netdev) 260634da4c1SBenita Bose return; 261634da4c1SBenita Bose 262634da4c1SBenita Bose /* We only initialize XPS once, so as not to overwrite user settings */ 263634da4c1SBenita Bose if (test_and_set_bit(ICE_TX_XPS_INIT_DONE, ring->xps_state)) 264634da4c1SBenita Bose return; 265634da4c1SBenita Bose 266634da4c1SBenita Bose netif_set_xps_queue(ring->netdev, &ring->q_vector->affinity_mask, 267634da4c1SBenita Bose ring->q_index); 268634da4c1SBenita Bose } 269634da4c1SBenita Bose 270634da4c1SBenita Bose /** 271eff380aaSAnirudh Venkataramanan * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance 272eff380aaSAnirudh Venkataramanan * @ring: The Tx ring to configure 273eff380aaSAnirudh Venkataramanan * @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized 274eff380aaSAnirudh Venkataramanan * @pf_q: queue index in the PF space 275eff380aaSAnirudh Venkataramanan * 276eff380aaSAnirudh Venkataramanan * Configure the Tx descriptor ring in TLAN context. 277eff380aaSAnirudh Venkataramanan */ 278eff380aaSAnirudh Venkataramanan static void 279e72bba21SMaciej Fijalkowski ice_setup_tx_ctx(struct ice_tx_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q) 280eff380aaSAnirudh Venkataramanan { 281eff380aaSAnirudh Venkataramanan struct ice_vsi *vsi = ring->vsi; 282eff380aaSAnirudh Venkataramanan struct ice_hw *hw = &vsi->back->hw; 283eff380aaSAnirudh Venkataramanan 284eff380aaSAnirudh Venkataramanan tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S; 285eff380aaSAnirudh Venkataramanan 286eff380aaSAnirudh Venkataramanan tlan_ctx->port_num = vsi->port_info->lport; 287eff380aaSAnirudh Venkataramanan 288eff380aaSAnirudh Venkataramanan /* Transmit Queue Length */ 289eff380aaSAnirudh Venkataramanan tlan_ctx->qlen = ring->count; 290eff380aaSAnirudh Venkataramanan 291e72bba21SMaciej Fijalkowski ice_set_cgd_num(tlan_ctx, ring->dcb_tc); 292eff380aaSAnirudh Venkataramanan 293eff380aaSAnirudh Venkataramanan /* PF number */ 294eff380aaSAnirudh Venkataramanan tlan_ctx->pf_num = hw->pf_id; 295eff380aaSAnirudh Venkataramanan 296eff380aaSAnirudh Venkataramanan /* queue belongs to a specific VSI type 297eff380aaSAnirudh Venkataramanan * VF / VM index should be programmed per vmvf_type setting: 298eff380aaSAnirudh Venkataramanan * for vmvf_type = VF, it is VF number between 0-256 299eff380aaSAnirudh Venkataramanan * for vmvf_type = VM, it is VM number between 0-767 300eff380aaSAnirudh Venkataramanan * for PF or EMP this field should be set to zero 301eff380aaSAnirudh Venkataramanan */ 302eff380aaSAnirudh Venkataramanan switch (vsi->type) { 303eff380aaSAnirudh Venkataramanan case ICE_VSI_LB: 304148beb61SHenry Tieman case ICE_VSI_CTRL: 305eff380aaSAnirudh Venkataramanan case ICE_VSI_PF: 306*0754d65bSKiran Patil if (ring->ch) 307*0754d65bSKiran Patil tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ; 308*0754d65bSKiran Patil else 309eff380aaSAnirudh Venkataramanan tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF; 310eff380aaSAnirudh Venkataramanan break; 311eff380aaSAnirudh Venkataramanan case ICE_VSI_VF: 312eff380aaSAnirudh Venkataramanan /* Firmware expects vmvf_num to be absolute VF ID */ 313eff380aaSAnirudh Venkataramanan tlan_ctx->vmvf_num = hw->func_caps.vf_base_id + vsi->vf_id; 314eff380aaSAnirudh Venkataramanan tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VF; 315eff380aaSAnirudh Venkataramanan break; 316f66756e0SGrzegorz Nitka case ICE_VSI_SWITCHDEV_CTRL: 317f66756e0SGrzegorz Nitka tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ; 318f66756e0SGrzegorz Nitka break; 319eff380aaSAnirudh Venkataramanan default: 320eff380aaSAnirudh Venkataramanan return; 321eff380aaSAnirudh Venkataramanan } 322eff380aaSAnirudh Venkataramanan 323eff380aaSAnirudh Venkataramanan /* make sure the context is associated with the right VSI */ 324*0754d65bSKiran Patil if (ring->ch) 325*0754d65bSKiran Patil tlan_ctx->src_vsi = ring->ch->vsi_num; 326*0754d65bSKiran Patil else 327eff380aaSAnirudh Venkataramanan tlan_ctx->src_vsi = ice_get_hw_vsi_num(hw, vsi->idx); 328eff380aaSAnirudh Venkataramanan 329ea9b847cSJacob Keller /* Restrict Tx timestamps to the PF VSI */ 330ea9b847cSJacob Keller switch (vsi->type) { 331ea9b847cSJacob Keller case ICE_VSI_PF: 332ea9b847cSJacob Keller tlan_ctx->tsyn_ena = 1; 333ea9b847cSJacob Keller break; 334ea9b847cSJacob Keller default: 335ea9b847cSJacob Keller break; 336ea9b847cSJacob Keller } 337ea9b847cSJacob Keller 338eff380aaSAnirudh Venkataramanan tlan_ctx->tso_ena = ICE_TX_LEGACY; 339eff380aaSAnirudh Venkataramanan tlan_ctx->tso_qnum = pf_q; 340eff380aaSAnirudh Venkataramanan 341eff380aaSAnirudh Venkataramanan /* Legacy or Advanced Host Interface: 342eff380aaSAnirudh Venkataramanan * 0: Advanced Host Interface 343eff380aaSAnirudh Venkataramanan * 1: Legacy Host Interface 344eff380aaSAnirudh Venkataramanan */ 345eff380aaSAnirudh Venkataramanan tlan_ctx->legacy_int = ICE_TX_LEGACY; 346eff380aaSAnirudh Venkataramanan } 347eff380aaSAnirudh Venkataramanan 348eff380aaSAnirudh Venkataramanan /** 34989861c48SMaciej Fijalkowski * ice_rx_offset - Return expected offset into page to access data 35089861c48SMaciej Fijalkowski * @rx_ring: Ring we are requesting offset of 35189861c48SMaciej Fijalkowski * 35289861c48SMaciej Fijalkowski * Returns the offset value for ring into the data buffer. 35389861c48SMaciej Fijalkowski */ 354e72bba21SMaciej Fijalkowski static unsigned int ice_rx_offset(struct ice_rx_ring *rx_ring) 35589861c48SMaciej Fijalkowski { 35689861c48SMaciej Fijalkowski if (ice_ring_uses_build_skb(rx_ring)) 35789861c48SMaciej Fijalkowski return ICE_SKB_PAD; 35889861c48SMaciej Fijalkowski else if (ice_is_xdp_ena_vsi(rx_ring->vsi)) 35989861c48SMaciej Fijalkowski return XDP_PACKET_HEADROOM; 36089861c48SMaciej Fijalkowski 36189861c48SMaciej Fijalkowski return 0; 36289861c48SMaciej Fijalkowski } 36389861c48SMaciej Fijalkowski 36489861c48SMaciej Fijalkowski /** 365eff380aaSAnirudh Venkataramanan * ice_setup_rx_ctx - Configure a receive ring context 366eff380aaSAnirudh Venkataramanan * @ring: The Rx ring to configure 367eff380aaSAnirudh Venkataramanan * 368eff380aaSAnirudh Venkataramanan * Configure the Rx descriptor ring in RLAN context. 369eff380aaSAnirudh Venkataramanan */ 370e72bba21SMaciej Fijalkowski static int ice_setup_rx_ctx(struct ice_rx_ring *ring) 371eff380aaSAnirudh Venkataramanan { 3722d4238f5SKrzysztof Kazimierczak int chain_len = ICE_MAX_CHAINED_RX_BUFS; 373eff380aaSAnirudh Venkataramanan struct ice_vsi *vsi = ring->vsi; 374eff380aaSAnirudh Venkataramanan u32 rxdid = ICE_RXDID_FLEX_NIC; 375eff380aaSAnirudh Venkataramanan struct ice_rlan_ctx rlan_ctx; 3762d4238f5SKrzysztof Kazimierczak struct ice_hw *hw; 377eff380aaSAnirudh Venkataramanan u16 pf_q; 378eff380aaSAnirudh Venkataramanan int err; 379eff380aaSAnirudh Venkataramanan 3802d4238f5SKrzysztof Kazimierczak hw = &vsi->back->hw; 3812d4238f5SKrzysztof Kazimierczak 382eff380aaSAnirudh Venkataramanan /* what is Rx queue number in global space of 2K Rx queues */ 383eff380aaSAnirudh Venkataramanan pf_q = vsi->rxq_map[ring->q_index]; 384eff380aaSAnirudh Venkataramanan 385eff380aaSAnirudh Venkataramanan /* clear the context structure first */ 386eff380aaSAnirudh Venkataramanan memset(&rlan_ctx, 0, sizeof(rlan_ctx)); 387eff380aaSAnirudh Venkataramanan 388efc2214bSMaciej Fijalkowski /* Receive Queue Base Address. 389efc2214bSMaciej Fijalkowski * Indicates the starting address of the descriptor queue defined in 390efc2214bSMaciej Fijalkowski * 128 Byte units. 391efc2214bSMaciej Fijalkowski */ 392eff380aaSAnirudh Venkataramanan rlan_ctx.base = ring->dma >> 7; 393eff380aaSAnirudh Venkataramanan 394eff380aaSAnirudh Venkataramanan rlan_ctx.qlen = ring->count; 395eff380aaSAnirudh Venkataramanan 396eff380aaSAnirudh Venkataramanan /* Receive Packet Data Buffer Size. 397eff380aaSAnirudh Venkataramanan * The Packet Data Buffer Size is defined in 128 byte units. 398eff380aaSAnirudh Venkataramanan */ 399efc2214bSMaciej Fijalkowski rlan_ctx.dbuf = ring->rx_buf_len >> ICE_RLAN_CTX_DBUF_S; 400eff380aaSAnirudh Venkataramanan 401eff380aaSAnirudh Venkataramanan /* use 32 byte descriptors */ 402eff380aaSAnirudh Venkataramanan rlan_ctx.dsize = 1; 403eff380aaSAnirudh Venkataramanan 404eff380aaSAnirudh Venkataramanan /* Strip the Ethernet CRC bytes before the packet is posted to host 405eff380aaSAnirudh Venkataramanan * memory. 406eff380aaSAnirudh Venkataramanan */ 407eff380aaSAnirudh Venkataramanan rlan_ctx.crcstrip = 1; 408eff380aaSAnirudh Venkataramanan 409eff380aaSAnirudh Venkataramanan /* L2TSEL flag defines the reported L2 Tags in the receive descriptor */ 410eff380aaSAnirudh Venkataramanan rlan_ctx.l2tsel = 1; 411eff380aaSAnirudh Venkataramanan 412eff380aaSAnirudh Venkataramanan rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT; 413eff380aaSAnirudh Venkataramanan rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT; 414eff380aaSAnirudh Venkataramanan rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT; 415eff380aaSAnirudh Venkataramanan 416eff380aaSAnirudh Venkataramanan /* This controls whether VLAN is stripped from inner headers 417eff380aaSAnirudh Venkataramanan * The VLAN in the inner L2 header is stripped to the receive 418eff380aaSAnirudh Venkataramanan * descriptor if enabled by this flag. 419eff380aaSAnirudh Venkataramanan */ 420eff380aaSAnirudh Venkataramanan rlan_ctx.showiv = 0; 421eff380aaSAnirudh Venkataramanan 42243c7f919SKrzysztof Kazimierczak /* For AF_XDP ZC, we disallow packets to span on 42343c7f919SKrzysztof Kazimierczak * multiple buffers, thus letting us skip that 42443c7f919SKrzysztof Kazimierczak * handling in the fast-path. 42543c7f919SKrzysztof Kazimierczak */ 42643c7f919SKrzysztof Kazimierczak if (ring->xsk_pool) 42743c7f919SKrzysztof Kazimierczak chain_len = 1; 428eff380aaSAnirudh Venkataramanan /* Max packet size for this queue - must not be set to a larger value 429eff380aaSAnirudh Venkataramanan * than 5 x DBUF 430eff380aaSAnirudh Venkataramanan */ 43188865fc4SKarol Kolacinski rlan_ctx.rxmax = min_t(u32, vsi->max_frame, 4322d4238f5SKrzysztof Kazimierczak chain_len * ring->rx_buf_len); 433eff380aaSAnirudh Venkataramanan 434eff380aaSAnirudh Venkataramanan /* Rx queue threshold in units of 64 */ 435eff380aaSAnirudh Venkataramanan rlan_ctx.lrxqthresh = 1; 436eff380aaSAnirudh Venkataramanan 437eff380aaSAnirudh Venkataramanan /* Enable Flexible Descriptors in the queue context which 438eff380aaSAnirudh Venkataramanan * allows this driver to select a specific receive descriptor format 439401ce33bSBrett Creeley * increasing context priority to pick up profile ID; default is 0x01; 440401ce33bSBrett Creeley * setting to 0x03 to ensure profile is programming if prev context is 441401ce33bSBrett Creeley * of same priority 442eff380aaSAnirudh Venkataramanan */ 443401ce33bSBrett Creeley if (vsi->type != ICE_VSI_VF) 44477a78115SJacob Keller ice_write_qrxflxp_cntxt(hw, pf_q, rxdid, 0x3, true); 445401ce33bSBrett Creeley else 44677a78115SJacob Keller ice_write_qrxflxp_cntxt(hw, pf_q, ICE_RXDID_LEGACY_1, 0x3, 44777a78115SJacob Keller false); 448eff380aaSAnirudh Venkataramanan 449eff380aaSAnirudh Venkataramanan /* Absolute queue number out of 2K needs to be passed */ 450eff380aaSAnirudh Venkataramanan err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q); 451eff380aaSAnirudh Venkataramanan if (err) { 45243c7f919SKrzysztof Kazimierczak dev_err(ice_pf_to_dev(vsi->back), "Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n", 453eff380aaSAnirudh Venkataramanan pf_q, err); 454eff380aaSAnirudh Venkataramanan return -EIO; 455eff380aaSAnirudh Venkataramanan } 456eff380aaSAnirudh Venkataramanan 457eff380aaSAnirudh Venkataramanan if (vsi->type == ICE_VSI_VF) 458eff380aaSAnirudh Venkataramanan return 0; 459eff380aaSAnirudh Venkataramanan 46059bb0808SMaciej Fijalkowski /* configure Rx buffer alignment */ 46159bb0808SMaciej Fijalkowski if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) 46259bb0808SMaciej Fijalkowski ice_clear_ring_build_skb_ena(ring); 46359bb0808SMaciej Fijalkowski else 46459bb0808SMaciej Fijalkowski ice_set_ring_build_skb_ena(ring); 46559bb0808SMaciej Fijalkowski 46689861c48SMaciej Fijalkowski ring->rx_offset = ice_rx_offset(ring); 46789861c48SMaciej Fijalkowski 468eff380aaSAnirudh Venkataramanan /* init queue specific tail register */ 469eff380aaSAnirudh Venkataramanan ring->tail = hw->hw_addr + QRX_TAIL(pf_q); 470eff380aaSAnirudh Venkataramanan writel(0, ring->tail); 4712d4238f5SKrzysztof Kazimierczak 47243c7f919SKrzysztof Kazimierczak return 0; 47343c7f919SKrzysztof Kazimierczak } 47443c7f919SKrzysztof Kazimierczak 47543c7f919SKrzysztof Kazimierczak /** 47643c7f919SKrzysztof Kazimierczak * ice_vsi_cfg_rxq - Configure an Rx queue 47743c7f919SKrzysztof Kazimierczak * @ring: the ring being configured 47843c7f919SKrzysztof Kazimierczak * 47943c7f919SKrzysztof Kazimierczak * Return 0 on success and a negative value on error. 48043c7f919SKrzysztof Kazimierczak */ 481e72bba21SMaciej Fijalkowski int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) 48243c7f919SKrzysztof Kazimierczak { 48343c7f919SKrzysztof Kazimierczak struct device *dev = ice_pf_to_dev(ring->vsi->back); 48443c7f919SKrzysztof Kazimierczak u16 num_bufs = ICE_DESC_UNUSED(ring); 48543c7f919SKrzysztof Kazimierczak int err; 48643c7f919SKrzysztof Kazimierczak 48743c7f919SKrzysztof Kazimierczak ring->rx_buf_len = ring->vsi->rx_buf_len; 48843c7f919SKrzysztof Kazimierczak 48943c7f919SKrzysztof Kazimierczak if (ring->vsi->type == ICE_VSI_PF) { 49043c7f919SKrzysztof Kazimierczak if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) 49143c7f919SKrzysztof Kazimierczak /* coverity[check_return] */ 49243c7f919SKrzysztof Kazimierczak xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev, 49343c7f919SKrzysztof Kazimierczak ring->q_index, ring->q_vector->napi.napi_id); 49443c7f919SKrzysztof Kazimierczak 49543c7f919SKrzysztof Kazimierczak ring->xsk_pool = ice_xsk_pool(ring); 49643c7f919SKrzysztof Kazimierczak if (ring->xsk_pool) { 49743c7f919SKrzysztof Kazimierczak xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq); 49843c7f919SKrzysztof Kazimierczak 49943c7f919SKrzysztof Kazimierczak ring->rx_buf_len = 50043c7f919SKrzysztof Kazimierczak xsk_pool_get_rx_frame_size(ring->xsk_pool); 50143c7f919SKrzysztof Kazimierczak err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 50243c7f919SKrzysztof Kazimierczak MEM_TYPE_XSK_BUFF_POOL, 50343c7f919SKrzysztof Kazimierczak NULL); 50443c7f919SKrzysztof Kazimierczak if (err) 50543c7f919SKrzysztof Kazimierczak return err; 50643c7f919SKrzysztof Kazimierczak xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq); 50743c7f919SKrzysztof Kazimierczak 50843c7f919SKrzysztof Kazimierczak dev_info(dev, "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n", 50943c7f919SKrzysztof Kazimierczak ring->q_index); 51043c7f919SKrzysztof Kazimierczak } else { 51143c7f919SKrzysztof Kazimierczak if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) 51243c7f919SKrzysztof Kazimierczak /* coverity[check_return] */ 51343c7f919SKrzysztof Kazimierczak xdp_rxq_info_reg(&ring->xdp_rxq, 51443c7f919SKrzysztof Kazimierczak ring->netdev, 51543c7f919SKrzysztof Kazimierczak ring->q_index, ring->q_vector->napi.napi_id); 51643c7f919SKrzysztof Kazimierczak 51743c7f919SKrzysztof Kazimierczak err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 51843c7f919SKrzysztof Kazimierczak MEM_TYPE_PAGE_SHARED, 51943c7f919SKrzysztof Kazimierczak NULL); 52043c7f919SKrzysztof Kazimierczak if (err) 52143c7f919SKrzysztof Kazimierczak return err; 52243c7f919SKrzysztof Kazimierczak } 52343c7f919SKrzysztof Kazimierczak } 52443c7f919SKrzysztof Kazimierczak 52543c7f919SKrzysztof Kazimierczak err = ice_setup_rx_ctx(ring); 52643c7f919SKrzysztof Kazimierczak if (err) { 52743c7f919SKrzysztof Kazimierczak dev_err(dev, "ice_setup_rx_ctx failed for RxQ %d, err %d\n", 52843c7f919SKrzysztof Kazimierczak ring->q_index, err); 52943c7f919SKrzysztof Kazimierczak return err; 53043c7f919SKrzysztof Kazimierczak } 53143c7f919SKrzysztof Kazimierczak 5321742b3d5SMagnus Karlsson if (ring->xsk_pool) { 533ed0907e3SMagnus Karlsson bool ok; 534ed0907e3SMagnus Karlsson 535c4655761SMagnus Karlsson if (!xsk_buff_can_alloc(ring->xsk_pool, num_bufs)) { 5361742b3d5SMagnus Karlsson dev_warn(dev, "XSK buffer pool does not provide enough addresses to fill %d buffers on Rx ring %d\n", 5373f0d97cdSKrzysztof Kazimierczak num_bufs, ring->q_index); 5383f0d97cdSKrzysztof Kazimierczak dev_warn(dev, "Change Rx ring/fill queue size to avoid performance issues\n"); 5393f0d97cdSKrzysztof Kazimierczak 5403f0d97cdSKrzysztof Kazimierczak return 0; 5413f0d97cdSKrzysztof Kazimierczak } 5423f0d97cdSKrzysztof Kazimierczak 543ed0907e3SMagnus Karlsson ok = ice_alloc_rx_bufs_zc(ring, num_bufs); 54443c7f919SKrzysztof Kazimierczak if (!ok) { 54543c7f919SKrzysztof Kazimierczak u16 pf_q = ring->vsi->rxq_map[ring->q_index]; 54643c7f919SKrzysztof Kazimierczak 5471742b3d5SMagnus Karlsson dev_info(dev, "Failed to allocate some buffers on XSK buffer pool enabled Rx ring %d (pf_q %d)\n", 5482d4238f5SKrzysztof Kazimierczak ring->q_index, pf_q); 54943c7f919SKrzysztof Kazimierczak } 55043c7f919SKrzysztof Kazimierczak 5513f0d97cdSKrzysztof Kazimierczak return 0; 5523f0d97cdSKrzysztof Kazimierczak } 5533f0d97cdSKrzysztof Kazimierczak 5543f0d97cdSKrzysztof Kazimierczak ice_alloc_rx_bufs(ring, num_bufs); 555eff380aaSAnirudh Venkataramanan 556eff380aaSAnirudh Venkataramanan return 0; 557eff380aaSAnirudh Venkataramanan } 558eff380aaSAnirudh Venkataramanan 559eff380aaSAnirudh Venkataramanan /** 560eff380aaSAnirudh Venkataramanan * __ice_vsi_get_qs - helper function for assigning queues from PF to VSI 561eff380aaSAnirudh Venkataramanan * @qs_cfg: gathered variables needed for pf->vsi queues assignment 562eff380aaSAnirudh Venkataramanan * 563eff380aaSAnirudh Venkataramanan * This function first tries to find contiguous space. If it is not successful, 564eff380aaSAnirudh Venkataramanan * it tries with the scatter approach. 565eff380aaSAnirudh Venkataramanan * 566eff380aaSAnirudh Venkataramanan * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap 567eff380aaSAnirudh Venkataramanan */ 568eff380aaSAnirudh Venkataramanan int __ice_vsi_get_qs(struct ice_qs_cfg *qs_cfg) 569eff380aaSAnirudh Venkataramanan { 570eff380aaSAnirudh Venkataramanan int ret = 0; 571eff380aaSAnirudh Venkataramanan 572eff380aaSAnirudh Venkataramanan ret = __ice_vsi_get_qs_contig(qs_cfg); 573eff380aaSAnirudh Venkataramanan if (ret) { 574eff380aaSAnirudh Venkataramanan /* contig failed, so try with scatter approach */ 575eff380aaSAnirudh Venkataramanan qs_cfg->mapping_mode = ICE_VSI_MAP_SCATTER; 57688865fc4SKarol Kolacinski qs_cfg->q_count = min_t(unsigned int, qs_cfg->q_count, 577eff380aaSAnirudh Venkataramanan qs_cfg->scatter_count); 578eff380aaSAnirudh Venkataramanan ret = __ice_vsi_get_qs_sc(qs_cfg); 579eff380aaSAnirudh Venkataramanan } 580eff380aaSAnirudh Venkataramanan return ret; 581eff380aaSAnirudh Venkataramanan } 582eff380aaSAnirudh Venkataramanan 583eff380aaSAnirudh Venkataramanan /** 58413a6233bSBrett Creeley * ice_vsi_ctrl_one_rx_ring - start/stop VSI's Rx ring with no busy wait 585eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 58613a6233bSBrett Creeley * @ena: start or stop the Rx ring 58713a6233bSBrett Creeley * @rxq_idx: 0-based Rx queue index for the VSI passed in 58813a6233bSBrett Creeley * @wait: wait or don't wait for configuration to finish in hardware 58913a6233bSBrett Creeley * 59013a6233bSBrett Creeley * Return 0 on success and negative on error. 591eff380aaSAnirudh Venkataramanan */ 59213a6233bSBrett Creeley int 59313a6233bSBrett Creeley ice_vsi_ctrl_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx, bool wait) 594eff380aaSAnirudh Venkataramanan { 595eff380aaSAnirudh Venkataramanan int pf_q = vsi->rxq_map[rxq_idx]; 596eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 597eff380aaSAnirudh Venkataramanan struct ice_hw *hw = &pf->hw; 598eff380aaSAnirudh Venkataramanan u32 rx_reg; 599eff380aaSAnirudh Venkataramanan 600eff380aaSAnirudh Venkataramanan rx_reg = rd32(hw, QRX_CTRL(pf_q)); 601eff380aaSAnirudh Venkataramanan 602eff380aaSAnirudh Venkataramanan /* Skip if the queue is already in the requested state */ 603eff380aaSAnirudh Venkataramanan if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M)) 604eff380aaSAnirudh Venkataramanan return 0; 605eff380aaSAnirudh Venkataramanan 606eff380aaSAnirudh Venkataramanan /* turn on/off the queue */ 607eff380aaSAnirudh Venkataramanan if (ena) 608eff380aaSAnirudh Venkataramanan rx_reg |= QRX_CTRL_QENA_REQ_M; 609eff380aaSAnirudh Venkataramanan else 610eff380aaSAnirudh Venkataramanan rx_reg &= ~QRX_CTRL_QENA_REQ_M; 611eff380aaSAnirudh Venkataramanan wr32(hw, QRX_CTRL(pf_q), rx_reg); 612eff380aaSAnirudh Venkataramanan 61313a6233bSBrett Creeley if (!wait) 61413a6233bSBrett Creeley return 0; 615eff380aaSAnirudh Venkataramanan 61613a6233bSBrett Creeley ice_flush(hw); 61713a6233bSBrett Creeley return ice_pf_rxq_wait(pf, pf_q, ena); 61813a6233bSBrett Creeley } 61913a6233bSBrett Creeley 62013a6233bSBrett Creeley /** 62113a6233bSBrett Creeley * ice_vsi_wait_one_rx_ring - wait for a VSI's Rx ring to be stopped/started 62213a6233bSBrett Creeley * @vsi: the VSI being configured 62313a6233bSBrett Creeley * @ena: true/false to verify Rx ring has been enabled/disabled respectively 62413a6233bSBrett Creeley * @rxq_idx: 0-based Rx queue index for the VSI passed in 62513a6233bSBrett Creeley * 62613a6233bSBrett Creeley * This routine will wait for the given Rx queue of the VSI to reach the 62713a6233bSBrett Creeley * enabled or disabled state. Returns -ETIMEDOUT in case of failing to reach 62813a6233bSBrett Creeley * the requested state after multiple retries; else will return 0 in case of 62913a6233bSBrett Creeley * success. 63013a6233bSBrett Creeley */ 63113a6233bSBrett Creeley int ice_vsi_wait_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx) 63213a6233bSBrett Creeley { 63313a6233bSBrett Creeley int pf_q = vsi->rxq_map[rxq_idx]; 63413a6233bSBrett Creeley struct ice_pf *pf = vsi->back; 63513a6233bSBrett Creeley 63613a6233bSBrett Creeley return ice_pf_rxq_wait(pf, pf_q, ena); 637eff380aaSAnirudh Venkataramanan } 638eff380aaSAnirudh Venkataramanan 639eff380aaSAnirudh Venkataramanan /** 640eff380aaSAnirudh Venkataramanan * ice_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 641eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 642eff380aaSAnirudh Venkataramanan * 643eff380aaSAnirudh Venkataramanan * We allocate one q_vector per queue interrupt. If allocation fails we 644eff380aaSAnirudh Venkataramanan * return -ENOMEM. 645eff380aaSAnirudh Venkataramanan */ 646eff380aaSAnirudh Venkataramanan int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi) 647eff380aaSAnirudh Venkataramanan { 6483306f79fSAnirudh Venkataramanan struct device *dev = ice_pf_to_dev(vsi->back); 64988865fc4SKarol Kolacinski u16 v_idx; 65088865fc4SKarol Kolacinski int err; 651eff380aaSAnirudh Venkataramanan 652eff380aaSAnirudh Venkataramanan if (vsi->q_vectors[0]) { 6534015d11eSBrett Creeley dev_dbg(dev, "VSI %d has existing q_vectors\n", vsi->vsi_num); 654eff380aaSAnirudh Venkataramanan return -EEXIST; 655eff380aaSAnirudh Venkataramanan } 656eff380aaSAnirudh Venkataramanan 6573306f79fSAnirudh Venkataramanan for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) { 658eff380aaSAnirudh Venkataramanan err = ice_vsi_alloc_q_vector(vsi, v_idx); 659eff380aaSAnirudh Venkataramanan if (err) 660eff380aaSAnirudh Venkataramanan goto err_out; 661eff380aaSAnirudh Venkataramanan } 662eff380aaSAnirudh Venkataramanan 663eff380aaSAnirudh Venkataramanan return 0; 664eff380aaSAnirudh Venkataramanan 665eff380aaSAnirudh Venkataramanan err_out: 666eff380aaSAnirudh Venkataramanan while (v_idx--) 667eff380aaSAnirudh Venkataramanan ice_free_q_vector(vsi, v_idx); 668eff380aaSAnirudh Venkataramanan 6694015d11eSBrett Creeley dev_err(dev, "Failed to allocate %d q_vector for VSI %d, ret=%d\n", 670eff380aaSAnirudh Venkataramanan vsi->num_q_vectors, vsi->vsi_num, err); 671eff380aaSAnirudh Venkataramanan vsi->num_q_vectors = 0; 672eff380aaSAnirudh Venkataramanan return err; 673eff380aaSAnirudh Venkataramanan } 674eff380aaSAnirudh Venkataramanan 675eff380aaSAnirudh Venkataramanan /** 676eff380aaSAnirudh Venkataramanan * ice_vsi_map_rings_to_vectors - Map VSI rings to interrupt vectors 677eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 678eff380aaSAnirudh Venkataramanan * 679eff380aaSAnirudh Venkataramanan * This function maps descriptor rings to the queue-specific vectors allotted 680eff380aaSAnirudh Venkataramanan * through the MSI-X enabling code. On a constrained vector budget, we map Tx 681eff380aaSAnirudh Venkataramanan * and Rx rings to the vector as "efficiently" as possible. 682eff380aaSAnirudh Venkataramanan */ 683eff380aaSAnirudh Venkataramanan void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi) 684eff380aaSAnirudh Venkataramanan { 685eff380aaSAnirudh Venkataramanan int q_vectors = vsi->num_q_vectors; 68688865fc4SKarol Kolacinski u16 tx_rings_rem, rx_rings_rem; 687eff380aaSAnirudh Venkataramanan int v_id; 688eff380aaSAnirudh Venkataramanan 689eff380aaSAnirudh Venkataramanan /* initially assigning remaining rings count to VSIs num queue value */ 690eff380aaSAnirudh Venkataramanan tx_rings_rem = vsi->num_txq; 691eff380aaSAnirudh Venkataramanan rx_rings_rem = vsi->num_rxq; 692eff380aaSAnirudh Venkataramanan 693eff380aaSAnirudh Venkataramanan for (v_id = 0; v_id < q_vectors; v_id++) { 694eff380aaSAnirudh Venkataramanan struct ice_q_vector *q_vector = vsi->q_vectors[v_id]; 69588865fc4SKarol Kolacinski u8 tx_rings_per_v, rx_rings_per_v; 69688865fc4SKarol Kolacinski u16 q_id, q_base; 697eff380aaSAnirudh Venkataramanan 698eff380aaSAnirudh Venkataramanan /* Tx rings mapping to vector */ 69988865fc4SKarol Kolacinski tx_rings_per_v = (u8)DIV_ROUND_UP(tx_rings_rem, 70088865fc4SKarol Kolacinski q_vectors - v_id); 701eff380aaSAnirudh Venkataramanan q_vector->num_ring_tx = tx_rings_per_v; 702e72bba21SMaciej Fijalkowski q_vector->tx.tx_ring = NULL; 703eff380aaSAnirudh Venkataramanan q_vector->tx.itr_idx = ICE_TX_ITR; 704eff380aaSAnirudh Venkataramanan q_base = vsi->num_txq - tx_rings_rem; 705eff380aaSAnirudh Venkataramanan 706eff380aaSAnirudh Venkataramanan for (q_id = q_base; q_id < (q_base + tx_rings_per_v); q_id++) { 707e72bba21SMaciej Fijalkowski struct ice_tx_ring *tx_ring = vsi->tx_rings[q_id]; 708eff380aaSAnirudh Venkataramanan 709eff380aaSAnirudh Venkataramanan tx_ring->q_vector = q_vector; 710e72bba21SMaciej Fijalkowski tx_ring->next = q_vector->tx.tx_ring; 711e72bba21SMaciej Fijalkowski q_vector->tx.tx_ring = tx_ring; 712eff380aaSAnirudh Venkataramanan } 713eff380aaSAnirudh Venkataramanan tx_rings_rem -= tx_rings_per_v; 714eff380aaSAnirudh Venkataramanan 715eff380aaSAnirudh Venkataramanan /* Rx rings mapping to vector */ 71688865fc4SKarol Kolacinski rx_rings_per_v = (u8)DIV_ROUND_UP(rx_rings_rem, 71788865fc4SKarol Kolacinski q_vectors - v_id); 718eff380aaSAnirudh Venkataramanan q_vector->num_ring_rx = rx_rings_per_v; 719e72bba21SMaciej Fijalkowski q_vector->rx.rx_ring = NULL; 720eff380aaSAnirudh Venkataramanan q_vector->rx.itr_idx = ICE_RX_ITR; 721eff380aaSAnirudh Venkataramanan q_base = vsi->num_rxq - rx_rings_rem; 722eff380aaSAnirudh Venkataramanan 723eff380aaSAnirudh Venkataramanan for (q_id = q_base; q_id < (q_base + rx_rings_per_v); q_id++) { 724e72bba21SMaciej Fijalkowski struct ice_rx_ring *rx_ring = vsi->rx_rings[q_id]; 725eff380aaSAnirudh Venkataramanan 726eff380aaSAnirudh Venkataramanan rx_ring->q_vector = q_vector; 727e72bba21SMaciej Fijalkowski rx_ring->next = q_vector->rx.rx_ring; 728e72bba21SMaciej Fijalkowski q_vector->rx.rx_ring = rx_ring; 729eff380aaSAnirudh Venkataramanan } 730eff380aaSAnirudh Venkataramanan rx_rings_rem -= rx_rings_per_v; 731eff380aaSAnirudh Venkataramanan } 732eff380aaSAnirudh Venkataramanan } 733eff380aaSAnirudh Venkataramanan 734eff380aaSAnirudh Venkataramanan /** 735eff380aaSAnirudh Venkataramanan * ice_vsi_free_q_vectors - Free memory allocated for interrupt vectors 736eff380aaSAnirudh Venkataramanan * @vsi: the VSI having memory freed 737eff380aaSAnirudh Venkataramanan */ 738eff380aaSAnirudh Venkataramanan void ice_vsi_free_q_vectors(struct ice_vsi *vsi) 739eff380aaSAnirudh Venkataramanan { 740eff380aaSAnirudh Venkataramanan int v_idx; 741eff380aaSAnirudh Venkataramanan 742eff380aaSAnirudh Venkataramanan ice_for_each_q_vector(vsi, v_idx) 743eff380aaSAnirudh Venkataramanan ice_free_q_vector(vsi, v_idx); 744eff380aaSAnirudh Venkataramanan } 745eff380aaSAnirudh Venkataramanan 746eff380aaSAnirudh Venkataramanan /** 747eff380aaSAnirudh Venkataramanan * ice_vsi_cfg_txq - Configure single Tx queue 748eff380aaSAnirudh Venkataramanan * @vsi: the VSI that queue belongs to 749eff380aaSAnirudh Venkataramanan * @ring: Tx ring to be configured 750eff380aaSAnirudh Venkataramanan * @qg_buf: queue group buffer 751eff380aaSAnirudh Venkataramanan */ 752eff380aaSAnirudh Venkataramanan int 753e72bba21SMaciej Fijalkowski ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring, 754e75d1b2cSMaciej Fijalkowski struct ice_aqc_add_tx_qgrp *qg_buf) 755eff380aaSAnirudh Venkataramanan { 75666486d89SBruce Allan u8 buf_len = struct_size(qg_buf, txqs, 1); 757eff380aaSAnirudh Venkataramanan struct ice_tlan_ctx tlan_ctx = { 0 }; 758eff380aaSAnirudh Venkataramanan struct ice_aqc_add_txqs_perq *txq; 759*0754d65bSKiran Patil struct ice_channel *ch = ring->ch; 760eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 7617e34786aSBruce Allan struct ice_hw *hw = &pf->hw; 762eff380aaSAnirudh Venkataramanan enum ice_status status; 763eff380aaSAnirudh Venkataramanan u16 pf_q; 764e75d1b2cSMaciej Fijalkowski u8 tc; 765eff380aaSAnirudh Venkataramanan 766634da4c1SBenita Bose /* Configure XPS */ 767634da4c1SBenita Bose ice_cfg_xps_tx_ring(ring); 768634da4c1SBenita Bose 769eff380aaSAnirudh Venkataramanan pf_q = ring->reg_idx; 770eff380aaSAnirudh Venkataramanan ice_setup_tx_ctx(ring, &tlan_ctx, pf_q); 771eff380aaSAnirudh Venkataramanan /* copy context contents into the qg_buf */ 772eff380aaSAnirudh Venkataramanan qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q); 7737e34786aSBruce Allan ice_set_ctx(hw, (u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx, 774eff380aaSAnirudh Venkataramanan ice_tlan_ctx_info); 775eff380aaSAnirudh Venkataramanan 776eff380aaSAnirudh Venkataramanan /* init queue specific tail reg. It is referred as 777eff380aaSAnirudh Venkataramanan * transmit comm scheduler queue doorbell. 778eff380aaSAnirudh Venkataramanan */ 7797e34786aSBruce Allan ring->tail = hw->hw_addr + QTX_COMM_DBELL(pf_q); 780eff380aaSAnirudh Venkataramanan 781e75d1b2cSMaciej Fijalkowski if (IS_ENABLED(CONFIG_DCB)) 782e75d1b2cSMaciej Fijalkowski tc = ring->dcb_tc; 783e75d1b2cSMaciej Fijalkowski else 784e75d1b2cSMaciej Fijalkowski tc = 0; 785e75d1b2cSMaciej Fijalkowski 786eff380aaSAnirudh Venkataramanan /* Add unique software queue handle of the Tx queue per 787eff380aaSAnirudh Venkataramanan * TC into the VSI Tx ring 788eff380aaSAnirudh Venkataramanan */ 789f66756e0SGrzegorz Nitka if (vsi->type == ICE_VSI_SWITCHDEV_CTRL) { 790e72bba21SMaciej Fijalkowski ring->q_handle = ice_eswitch_calc_txq_handle(ring); 791f66756e0SGrzegorz Nitka 792f66756e0SGrzegorz Nitka if (ring->q_handle == ICE_INVAL_Q_INDEX) 793f66756e0SGrzegorz Nitka return -ENODEV; 794f66756e0SGrzegorz Nitka } else { 795e72bba21SMaciej Fijalkowski ring->q_handle = ice_calc_txq_handle(vsi, ring, tc); 796f66756e0SGrzegorz Nitka } 797eff380aaSAnirudh Venkataramanan 798*0754d65bSKiran Patil if (ch) 799*0754d65bSKiran Patil status = ice_ena_vsi_txq(vsi->port_info, ch->ch_vsi->idx, 0, 800*0754d65bSKiran Patil ring->q_handle, 1, qg_buf, buf_len, 801*0754d65bSKiran Patil NULL); 802*0754d65bSKiran Patil else 803*0754d65bSKiran Patil status = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc, 804*0754d65bSKiran Patil ring->q_handle, 1, qg_buf, buf_len, 805*0754d65bSKiran Patil NULL); 806eff380aaSAnirudh Venkataramanan if (status) { 8070fee3577SLihong Yang dev_err(ice_pf_to_dev(pf), "Failed to set LAN Tx queue context, error: %s\n", 8080fee3577SLihong Yang ice_stat_str(status)); 809eff380aaSAnirudh Venkataramanan return -ENODEV; 810eff380aaSAnirudh Venkataramanan } 811eff380aaSAnirudh Venkataramanan 812eff380aaSAnirudh Venkataramanan /* Add Tx Queue TEID into the VSI Tx ring from the 813eff380aaSAnirudh Venkataramanan * response. This will complete configuring and 814eff380aaSAnirudh Venkataramanan * enabling the queue. 815eff380aaSAnirudh Venkataramanan */ 816eff380aaSAnirudh Venkataramanan txq = &qg_buf->txqs[0]; 817eff380aaSAnirudh Venkataramanan if (pf_q == le16_to_cpu(txq->txq_id)) 818eff380aaSAnirudh Venkataramanan ring->txq_teid = le32_to_cpu(txq->q_teid); 819eff380aaSAnirudh Venkataramanan 820eff380aaSAnirudh Venkataramanan return 0; 821eff380aaSAnirudh Venkataramanan } 822eff380aaSAnirudh Venkataramanan 823eff380aaSAnirudh Venkataramanan /** 824eff380aaSAnirudh Venkataramanan * ice_cfg_itr - configure the initial interrupt throttle values 825eff380aaSAnirudh Venkataramanan * @hw: pointer to the HW structure 826eff380aaSAnirudh Venkataramanan * @q_vector: interrupt vector that's being configured 827eff380aaSAnirudh Venkataramanan * 828eff380aaSAnirudh Venkataramanan * Configure interrupt throttling values for the ring containers that are 829eff380aaSAnirudh Venkataramanan * associated with the interrupt vector passed in. 830eff380aaSAnirudh Venkataramanan */ 831eff380aaSAnirudh Venkataramanan void ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector) 832eff380aaSAnirudh Venkataramanan { 833eff380aaSAnirudh Venkataramanan ice_cfg_itr_gran(hw); 834eff380aaSAnirudh Venkataramanan 835b8b47723SJesse Brandeburg if (q_vector->num_ring_rx) 836b8b47723SJesse Brandeburg ice_write_itr(&q_vector->rx, q_vector->rx.itr_setting); 837eff380aaSAnirudh Venkataramanan 838b8b47723SJesse Brandeburg if (q_vector->num_ring_tx) 839b8b47723SJesse Brandeburg ice_write_itr(&q_vector->tx, q_vector->tx.itr_setting); 840eff380aaSAnirudh Venkataramanan 841b8b47723SJesse Brandeburg ice_write_intrl(q_vector, q_vector->intrl); 842eff380aaSAnirudh Venkataramanan } 843eff380aaSAnirudh Venkataramanan 844eff380aaSAnirudh Venkataramanan /** 845eff380aaSAnirudh Venkataramanan * ice_cfg_txq_interrupt - configure interrupt on Tx queue 846eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 847eff380aaSAnirudh Venkataramanan * @txq: Tx queue being mapped to MSI-X vector 848eff380aaSAnirudh Venkataramanan * @msix_idx: MSI-X vector index within the function 849eff380aaSAnirudh Venkataramanan * @itr_idx: ITR index of the interrupt cause 850eff380aaSAnirudh Venkataramanan * 851eff380aaSAnirudh Venkataramanan * Configure interrupt on Tx queue by associating Tx queue to MSI-X vector 852eff380aaSAnirudh Venkataramanan * within the function space. 853eff380aaSAnirudh Venkataramanan */ 854eff380aaSAnirudh Venkataramanan void 855eff380aaSAnirudh Venkataramanan ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx) 856eff380aaSAnirudh Venkataramanan { 857eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 858eff380aaSAnirudh Venkataramanan struct ice_hw *hw = &pf->hw; 859eff380aaSAnirudh Venkataramanan u32 val; 860eff380aaSAnirudh Venkataramanan 861eff380aaSAnirudh Venkataramanan itr_idx = (itr_idx << QINT_TQCTL_ITR_INDX_S) & QINT_TQCTL_ITR_INDX_M; 862eff380aaSAnirudh Venkataramanan 863eff380aaSAnirudh Venkataramanan val = QINT_TQCTL_CAUSE_ENA_M | itr_idx | 864eff380aaSAnirudh Venkataramanan ((msix_idx << QINT_TQCTL_MSIX_INDX_S) & QINT_TQCTL_MSIX_INDX_M); 865eff380aaSAnirudh Venkataramanan 866eff380aaSAnirudh Venkataramanan wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val); 867efc2214bSMaciej Fijalkowski if (ice_is_xdp_ena_vsi(vsi)) { 868efc2214bSMaciej Fijalkowski u32 xdp_txq = txq + vsi->num_xdp_txq; 869efc2214bSMaciej Fijalkowski 870efc2214bSMaciej Fijalkowski wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 871efc2214bSMaciej Fijalkowski val); 872efc2214bSMaciej Fijalkowski } 873efc2214bSMaciej Fijalkowski ice_flush(hw); 874eff380aaSAnirudh Venkataramanan } 875eff380aaSAnirudh Venkataramanan 876eff380aaSAnirudh Venkataramanan /** 877eff380aaSAnirudh Venkataramanan * ice_cfg_rxq_interrupt - configure interrupt on Rx queue 878eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 879eff380aaSAnirudh Venkataramanan * @rxq: Rx queue being mapped to MSI-X vector 880eff380aaSAnirudh Venkataramanan * @msix_idx: MSI-X vector index within the function 881eff380aaSAnirudh Venkataramanan * @itr_idx: ITR index of the interrupt cause 882eff380aaSAnirudh Venkataramanan * 883eff380aaSAnirudh Venkataramanan * Configure interrupt on Rx queue by associating Rx queue to MSI-X vector 884eff380aaSAnirudh Venkataramanan * within the function space. 885eff380aaSAnirudh Venkataramanan */ 886eff380aaSAnirudh Venkataramanan void 887eff380aaSAnirudh Venkataramanan ice_cfg_rxq_interrupt(struct ice_vsi *vsi, u16 rxq, u16 msix_idx, u16 itr_idx) 888eff380aaSAnirudh Venkataramanan { 889eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 890eff380aaSAnirudh Venkataramanan struct ice_hw *hw = &pf->hw; 891eff380aaSAnirudh Venkataramanan u32 val; 892eff380aaSAnirudh Venkataramanan 893eff380aaSAnirudh Venkataramanan itr_idx = (itr_idx << QINT_RQCTL_ITR_INDX_S) & QINT_RQCTL_ITR_INDX_M; 894eff380aaSAnirudh Venkataramanan 895eff380aaSAnirudh Venkataramanan val = QINT_RQCTL_CAUSE_ENA_M | itr_idx | 896eff380aaSAnirudh Venkataramanan ((msix_idx << QINT_RQCTL_MSIX_INDX_S) & QINT_RQCTL_MSIX_INDX_M); 897eff380aaSAnirudh Venkataramanan 898eff380aaSAnirudh Venkataramanan wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val); 899eff380aaSAnirudh Venkataramanan 900eff380aaSAnirudh Venkataramanan ice_flush(hw); 901eff380aaSAnirudh Venkataramanan } 902eff380aaSAnirudh Venkataramanan 903eff380aaSAnirudh Venkataramanan /** 904eff380aaSAnirudh Venkataramanan * ice_trigger_sw_intr - trigger a software interrupt 905eff380aaSAnirudh Venkataramanan * @hw: pointer to the HW structure 906eff380aaSAnirudh Venkataramanan * @q_vector: interrupt vector to trigger the software interrupt for 907eff380aaSAnirudh Venkataramanan */ 908eff380aaSAnirudh Venkataramanan void ice_trigger_sw_intr(struct ice_hw *hw, struct ice_q_vector *q_vector) 909eff380aaSAnirudh Venkataramanan { 910eff380aaSAnirudh Venkataramanan wr32(hw, GLINT_DYN_CTL(q_vector->reg_idx), 911eff380aaSAnirudh Venkataramanan (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) | 912eff380aaSAnirudh Venkataramanan GLINT_DYN_CTL_SWINT_TRIG_M | 913eff380aaSAnirudh Venkataramanan GLINT_DYN_CTL_INTENA_M); 914eff380aaSAnirudh Venkataramanan } 915eff380aaSAnirudh Venkataramanan 916eff380aaSAnirudh Venkataramanan /** 917eff380aaSAnirudh Venkataramanan * ice_vsi_stop_tx_ring - Disable single Tx ring 918eff380aaSAnirudh Venkataramanan * @vsi: the VSI being configured 919eff380aaSAnirudh Venkataramanan * @rst_src: reset source 920eff380aaSAnirudh Venkataramanan * @rel_vmvf_num: Relative ID of VF/VM 921eff380aaSAnirudh Venkataramanan * @ring: Tx ring to be stopped 922eff380aaSAnirudh Venkataramanan * @txq_meta: Meta data of Tx ring to be stopped 923eff380aaSAnirudh Venkataramanan */ 924eff380aaSAnirudh Venkataramanan int 925eff380aaSAnirudh Venkataramanan ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 926e72bba21SMaciej Fijalkowski u16 rel_vmvf_num, struct ice_tx_ring *ring, 927eff380aaSAnirudh Venkataramanan struct ice_txq_meta *txq_meta) 928eff380aaSAnirudh Venkataramanan { 929eff380aaSAnirudh Venkataramanan struct ice_pf *pf = vsi->back; 930eff380aaSAnirudh Venkataramanan struct ice_q_vector *q_vector; 931eff380aaSAnirudh Venkataramanan struct ice_hw *hw = &pf->hw; 932eff380aaSAnirudh Venkataramanan enum ice_status status; 933eff380aaSAnirudh Venkataramanan u32 val; 934eff380aaSAnirudh Venkataramanan 935eff380aaSAnirudh Venkataramanan /* clear cause_ena bit for disabled queues */ 936eff380aaSAnirudh Venkataramanan val = rd32(hw, QINT_TQCTL(ring->reg_idx)); 937eff380aaSAnirudh Venkataramanan val &= ~QINT_TQCTL_CAUSE_ENA_M; 938eff380aaSAnirudh Venkataramanan wr32(hw, QINT_TQCTL(ring->reg_idx), val); 939eff380aaSAnirudh Venkataramanan 940eff380aaSAnirudh Venkataramanan /* software is expected to wait for 100 ns */ 941eff380aaSAnirudh Venkataramanan ndelay(100); 942eff380aaSAnirudh Venkataramanan 943eff380aaSAnirudh Venkataramanan /* trigger a software interrupt for the vector 944eff380aaSAnirudh Venkataramanan * associated to the queue to schedule NAPI handler 945eff380aaSAnirudh Venkataramanan */ 946eff380aaSAnirudh Venkataramanan q_vector = ring->q_vector; 947eff380aaSAnirudh Venkataramanan if (q_vector) 948eff380aaSAnirudh Venkataramanan ice_trigger_sw_intr(hw, q_vector); 949eff380aaSAnirudh Venkataramanan 950eff380aaSAnirudh Venkataramanan status = ice_dis_vsi_txq(vsi->port_info, txq_meta->vsi_idx, 951eff380aaSAnirudh Venkataramanan txq_meta->tc, 1, &txq_meta->q_handle, 952eff380aaSAnirudh Venkataramanan &txq_meta->q_id, &txq_meta->q_teid, rst_src, 953eff380aaSAnirudh Venkataramanan rel_vmvf_num, NULL); 954eff380aaSAnirudh Venkataramanan 955eff380aaSAnirudh Venkataramanan /* if the disable queue command was exercised during an 956eff380aaSAnirudh Venkataramanan * active reset flow, ICE_ERR_RESET_ONGOING is returned. 957eff380aaSAnirudh Venkataramanan * This is not an error as the reset operation disables 958eff380aaSAnirudh Venkataramanan * queues at the hardware level anyway. 959eff380aaSAnirudh Venkataramanan */ 960eff380aaSAnirudh Venkataramanan if (status == ICE_ERR_RESET_ONGOING) { 96119cce2c6SAnirudh Venkataramanan dev_dbg(ice_pf_to_dev(vsi->back), "Reset in progress. LAN Tx queues already disabled\n"); 962eff380aaSAnirudh Venkataramanan } else if (status == ICE_ERR_DOES_NOT_EXIST) { 96319cce2c6SAnirudh Venkataramanan dev_dbg(ice_pf_to_dev(vsi->back), "LAN Tx queues do not exist, nothing to disable\n"); 964eff380aaSAnirudh Venkataramanan } else if (status) { 9650fee3577SLihong Yang dev_err(ice_pf_to_dev(vsi->back), "Failed to disable LAN Tx queues, error: %s\n", 9660fee3577SLihong Yang ice_stat_str(status)); 967eff380aaSAnirudh Venkataramanan return -ENODEV; 968eff380aaSAnirudh Venkataramanan } 969eff380aaSAnirudh Venkataramanan 970eff380aaSAnirudh Venkataramanan return 0; 971eff380aaSAnirudh Venkataramanan } 972eff380aaSAnirudh Venkataramanan 973eff380aaSAnirudh Venkataramanan /** 974eff380aaSAnirudh Venkataramanan * ice_fill_txq_meta - Prepare the Tx queue's meta data 975eff380aaSAnirudh Venkataramanan * @vsi: VSI that ring belongs to 976eff380aaSAnirudh Venkataramanan * @ring: ring that txq_meta will be based on 977eff380aaSAnirudh Venkataramanan * @txq_meta: a helper struct that wraps Tx queue's information 978eff380aaSAnirudh Venkataramanan * 979eff380aaSAnirudh Venkataramanan * Set up a helper struct that will contain all the necessary fields that 980eff380aaSAnirudh Venkataramanan * are needed for stopping Tx queue 981eff380aaSAnirudh Venkataramanan */ 982eff380aaSAnirudh Venkataramanan void 983e72bba21SMaciej Fijalkowski ice_fill_txq_meta(struct ice_vsi *vsi, struct ice_tx_ring *ring, 984eff380aaSAnirudh Venkataramanan struct ice_txq_meta *txq_meta) 985eff380aaSAnirudh Venkataramanan { 986*0754d65bSKiran Patil struct ice_channel *ch = ring->ch; 987eff380aaSAnirudh Venkataramanan u8 tc; 988eff380aaSAnirudh Venkataramanan 989eff380aaSAnirudh Venkataramanan if (IS_ENABLED(CONFIG_DCB)) 990eff380aaSAnirudh Venkataramanan tc = ring->dcb_tc; 991eff380aaSAnirudh Venkataramanan else 992eff380aaSAnirudh Venkataramanan tc = 0; 993eff380aaSAnirudh Venkataramanan 994eff380aaSAnirudh Venkataramanan txq_meta->q_id = ring->reg_idx; 995eff380aaSAnirudh Venkataramanan txq_meta->q_teid = ring->txq_teid; 996eff380aaSAnirudh Venkataramanan txq_meta->q_handle = ring->q_handle; 997*0754d65bSKiran Patil if (ch) { 998*0754d65bSKiran Patil txq_meta->vsi_idx = ch->ch_vsi->idx; 999*0754d65bSKiran Patil txq_meta->tc = 0; 1000*0754d65bSKiran Patil } else { 1001eff380aaSAnirudh Venkataramanan txq_meta->vsi_idx = vsi->idx; 1002eff380aaSAnirudh Venkataramanan txq_meta->tc = tc; 1003eff380aaSAnirudh Venkataramanan } 1004*0754d65bSKiran Patil } 1005