1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/interrupt.h> 24 #include <linux/ethtool.h> 25 #include <linux/timer.h> 26 #include <linux/delay.h> 27 #include <linux/bitmap.h> 28 #include <linux/log2.h> 29 #include <linux/ip.h> 30 #include <linux/sctp.h> 31 #include <linux/ipv6.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/if_bridge.h> 34 #include <linux/ctype.h> 35 #include <linux/bpf.h> 36 #include <linux/btf.h> 37 #include <linux/auxiliary_bus.h> 38 #include <linux/avf/virtchnl.h> 39 #include <linux/cpu_rmap.h> 40 #include <linux/dim.h> 41 #include <linux/gnss.h> 42 #include <net/pkt_cls.h> 43 #include <net/pkt_sched.h> 44 #include <net/tc_act/tc_mirred.h> 45 #include <net/tc_act/tc_gact.h> 46 #include <net/ip.h> 47 #include <net/devlink.h> 48 #include <net/ipv6.h> 49 #include <net/xdp_sock.h> 50 #include <net/xdp_sock_drv.h> 51 #include <net/geneve.h> 52 #include <net/gre.h> 53 #include <net/udp_tunnel.h> 54 #include <net/vxlan.h> 55 #include <net/gtp.h> 56 #include <linux/ppp_defs.h> 57 #include "ice_devids.h" 58 #include "ice_type.h" 59 #include "ice_txrx.h" 60 #include "ice_dcb.h" 61 #include "ice_switch.h" 62 #include "ice_common.h" 63 #include "ice_flow.h" 64 #include "ice_sched.h" 65 #include "ice_idc_int.h" 66 #include "ice_sriov.h" 67 #include "ice_vf_mbx.h" 68 #include "ice_ptp.h" 69 #include "ice_fdir.h" 70 #include "ice_xsk.h" 71 #include "ice_arfs.h" 72 #include "ice_repr.h" 73 #include "ice_eswitch.h" 74 #include "ice_lag.h" 75 #include "ice_vsi_vlan_ops.h" 76 #include "ice_gnss.h" 77 78 #define ICE_BAR0 0 79 #define ICE_REQ_DESC_MULTIPLE 32 80 #define ICE_MIN_NUM_DESC 64 81 #define ICE_MAX_NUM_DESC 8160 82 #define ICE_DFLT_MIN_RX_DESC 512 83 #define ICE_DFLT_NUM_TX_DESC 256 84 #define ICE_DFLT_NUM_RX_DESC 2048 85 86 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 87 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 88 #define ICE_AQ_LEN 192 89 #define ICE_MBXSQ_LEN 64 90 #define ICE_SBQ_LEN 64 91 #define ICE_MIN_LAN_TXRX_MSIX 1 92 #define ICE_MIN_LAN_OICR_MSIX 1 93 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 94 #define ICE_FDIR_MSIX 2 95 #define ICE_RDMA_NUM_AEQ_MSIX 4 96 #define ICE_MIN_RDMA_MSIX 2 97 #define ICE_ESWITCH_MSIX 1 98 #define ICE_NO_VSI 0xffff 99 #define ICE_VSI_MAP_CONTIG 0 100 #define ICE_VSI_MAP_SCATTER 1 101 #define ICE_MAX_SCATTER_TXQS 16 102 #define ICE_MAX_SCATTER_RXQS 16 103 #define ICE_Q_WAIT_RETRY_LIMIT 10 104 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 105 #define ICE_MAX_LG_RSS_QS 256 106 #define ICE_RES_VALID_BIT 0x8000 107 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 108 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 109 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 110 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 111 #define ICE_INVAL_Q_INDEX 0xffff 112 113 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 114 115 #define ICE_CHNL_START_TC 1 116 117 #define ICE_MAX_RESET_WAIT 20 118 119 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 120 121 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 122 123 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 124 125 #define ICE_MAX_TSO_SIZE 131072 126 127 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 128 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 129 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 130 131 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 132 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 133 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 134 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 135 136 /* Minimum BW limit is 500 Kbps for any scheduler node */ 137 #define ICE_MIN_BW_LIMIT 500 138 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 139 * use it to convert user specified BW limit into Kbps 140 */ 141 #define ICE_BW_KBPS_DIVISOR 125 142 143 /* Default recipes have priority 4 and below, hence priority values between 5..7 144 * can be used as filter priority for advanced switch filter (advanced switch 145 * filters need new recipe to be created for specified extraction sequence 146 * because default recipe extraction sequence does not represent custom 147 * extraction) 148 */ 149 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 150 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 151 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 152 * SYN/FIN/RST)) 153 */ 154 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 155 #define ICE_SWITCH_FLTR_PRIO_VSI 5 156 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 157 158 /* Macro for each VSI in a PF */ 159 #define ice_for_each_vsi(pf, i) \ 160 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 161 162 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 163 #define ice_for_each_txq(vsi, i) \ 164 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 165 166 #define ice_for_each_xdp_txq(vsi, i) \ 167 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 168 169 #define ice_for_each_rxq(vsi, i) \ 170 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 171 172 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 173 #define ice_for_each_alloc_txq(vsi, i) \ 174 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 175 176 #define ice_for_each_alloc_rxq(vsi, i) \ 177 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 178 179 #define ice_for_each_q_vector(vsi, i) \ 180 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 181 182 #define ice_for_each_chnl_tc(i) \ 183 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 184 185 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX) 186 187 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 188 ICE_PROMISC_UCAST_RX | \ 189 ICE_PROMISC_VLAN_TX | \ 190 ICE_PROMISC_VLAN_RX) 191 192 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 193 194 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 195 ICE_PROMISC_MCAST_RX | \ 196 ICE_PROMISC_VLAN_TX | \ 197 ICE_PROMISC_VLAN_RX) 198 199 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 200 201 enum ice_feature { 202 ICE_F_DSCP, 203 ICE_F_PTP_EXTTS, 204 ICE_F_SMA_CTRL, 205 ICE_F_GNSS, 206 ICE_F_MAX 207 }; 208 209 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 210 211 struct ice_channel { 212 struct list_head list; 213 u8 type; 214 u16 sw_id; 215 u16 base_q; 216 u16 num_rxq; 217 u16 num_txq; 218 u16 vsi_num; 219 u8 ena_tc; 220 struct ice_aqc_vsi_props info; 221 u64 max_tx_rate; 222 u64 min_tx_rate; 223 atomic_t num_sb_fltr; 224 struct ice_vsi *ch_vsi; 225 }; 226 227 struct ice_txq_meta { 228 u32 q_teid; /* Tx-scheduler element identifier */ 229 u16 q_id; /* Entry in VSI's txq_map bitmap */ 230 u16 q_handle; /* Relative index of Tx queue within TC */ 231 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 232 u8 tc; /* TC number that Tx queue belongs to */ 233 }; 234 235 struct ice_tc_info { 236 u16 qoffset; 237 u16 qcount_tx; 238 u16 qcount_rx; 239 u8 netdev_tc; 240 }; 241 242 struct ice_tc_cfg { 243 u8 numtc; /* Total number of enabled TCs */ 244 u16 ena_tc; /* Tx map */ 245 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 246 }; 247 248 struct ice_res_tracker { 249 u16 num_entries; 250 u16 end; 251 u16 list[]; 252 }; 253 254 struct ice_qs_cfg { 255 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 256 unsigned long *pf_map; 257 unsigned long pf_map_size; 258 unsigned int q_count; 259 unsigned int scatter_count; 260 u16 *vsi_map; 261 u16 vsi_map_offset; 262 u8 mapping_mode; 263 }; 264 265 struct ice_sw { 266 struct ice_pf *pf; 267 u16 sw_id; /* switch ID for this switch */ 268 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 269 }; 270 271 enum ice_pf_state { 272 ICE_TESTING, 273 ICE_DOWN, 274 ICE_NEEDS_RESTART, 275 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 276 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 277 ICE_PFR_REQ, /* set by driver */ 278 ICE_CORER_REQ, /* set by driver */ 279 ICE_GLOBR_REQ, /* set by driver */ 280 ICE_CORER_RECV, /* set by OICR handler */ 281 ICE_GLOBR_RECV, /* set by OICR handler */ 282 ICE_EMPR_RECV, /* set by OICR handler */ 283 ICE_SUSPENDED, /* set on module remove path */ 284 ICE_RESET_FAILED, /* set by reset/rebuild */ 285 /* When checking for the PF to be in a nominal operating state, the 286 * bits that are grouped at the beginning of the list need to be 287 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 288 * be checked. If you need to add a bit into consideration for nominal 289 * operating state, it must be added before 290 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 291 * without appropriate consideration. 292 */ 293 ICE_STATE_NOMINAL_CHECK_BITS, 294 ICE_ADMINQ_EVENT_PENDING, 295 ICE_MAILBOXQ_EVENT_PENDING, 296 ICE_SIDEBANDQ_EVENT_PENDING, 297 ICE_MDD_EVENT_PENDING, 298 ICE_VFLR_EVENT_PENDING, 299 ICE_FLTR_OVERFLOW_PROMISC, 300 ICE_VF_DIS, 301 ICE_CFG_BUSY, 302 ICE_SERVICE_SCHED, 303 ICE_SERVICE_DIS, 304 ICE_FD_FLUSH_REQ, 305 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 306 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 307 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 308 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 309 ICE_PHY_INIT_COMPLETE, 310 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 311 ICE_AUX_ERR_PENDING, 312 ICE_STATE_NBITS /* must be last */ 313 }; 314 315 enum ice_vsi_state { 316 ICE_VSI_DOWN, 317 ICE_VSI_NEEDS_RESTART, 318 ICE_VSI_NETDEV_ALLOCD, 319 ICE_VSI_NETDEV_REGISTERED, 320 ICE_VSI_UMAC_FLTR_CHANGED, 321 ICE_VSI_MMAC_FLTR_CHANGED, 322 ICE_VSI_PROMISC_CHANGED, 323 ICE_VSI_STATE_NBITS /* must be last */ 324 }; 325 326 struct ice_vsi_stats { 327 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 328 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 329 }; 330 331 /* struct that defines a VSI, associated with a dev */ 332 struct ice_vsi { 333 struct net_device *netdev; 334 struct ice_sw *vsw; /* switch this VSI is on */ 335 struct ice_pf *back; /* back pointer to PF */ 336 struct ice_port_info *port_info; /* back pointer to port_info */ 337 struct ice_rx_ring **rx_rings; /* Rx ring array */ 338 struct ice_tx_ring **tx_rings; /* Tx ring array */ 339 struct ice_q_vector **q_vectors; /* q_vector array */ 340 341 irqreturn_t (*irq_handler)(int irq, void *data); 342 343 u64 tx_linearize; 344 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 345 unsigned int current_netdev_flags; 346 u32 tx_restart; 347 u32 tx_busy; 348 u32 rx_buf_failed; 349 u32 rx_page_failed; 350 u16 num_q_vectors; 351 u16 base_vector; /* IRQ base for OS reserved vectors */ 352 enum ice_vsi_type type; 353 u16 vsi_num; /* HW (absolute) index of this VSI */ 354 u16 idx; /* software index in pf->vsi[] */ 355 356 struct ice_vf *vf; /* VF associated with this VSI */ 357 358 u16 num_gfltr; 359 u16 num_bfltr; 360 361 /* RSS config */ 362 u16 rss_table_size; /* HW RSS table size */ 363 u16 rss_size; /* Allocated RSS queues */ 364 u8 *rss_hkey_user; /* User configured hash keys */ 365 u8 *rss_lut_user; /* User configured lookup table entries */ 366 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 367 368 /* aRFS members only allocated for the PF VSI */ 369 #define ICE_MAX_ARFS_LIST 1024 370 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 371 struct hlist_head *arfs_fltr_list; 372 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 373 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 374 atomic_t *arfs_last_fltr_id; 375 376 u16 max_frame; 377 u16 rx_buf_len; 378 379 struct ice_aqc_vsi_props info; /* VSI properties */ 380 381 /* VSI stats */ 382 struct rtnl_link_stats64 net_stats; 383 struct rtnl_link_stats64 net_stats_prev; 384 struct ice_eth_stats eth_stats; 385 struct ice_eth_stats eth_stats_prev; 386 387 struct list_head tmp_sync_list; /* MAC filters to be synced */ 388 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 389 390 u8 irqs_ready:1; 391 u8 current_isup:1; /* Sync 'link up' logging */ 392 u8 stat_offsets_loaded:1; 393 struct ice_vsi_vlan_ops inner_vlan_ops; 394 struct ice_vsi_vlan_ops outer_vlan_ops; 395 u16 num_vlan; 396 397 /* queue information */ 398 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 399 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 400 u16 *txq_map; /* index in pf->avail_txqs */ 401 u16 *rxq_map; /* index in pf->avail_rxqs */ 402 u16 alloc_txq; /* Allocated Tx queues */ 403 u16 num_txq; /* Used Tx queues */ 404 u16 alloc_rxq; /* Allocated Rx queues */ 405 u16 num_rxq; /* Used Rx queues */ 406 u16 req_txq; /* User requested Tx queues */ 407 u16 req_rxq; /* User requested Rx queues */ 408 u16 num_rx_desc; 409 u16 num_tx_desc; 410 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 411 struct ice_tc_cfg tc_cfg; 412 struct bpf_prog *xdp_prog; 413 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 414 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 415 u16 num_xdp_txq; /* Used XDP queues */ 416 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 417 418 struct net_device **target_netdevs; 419 420 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 421 422 /* Channel Specific Fields */ 423 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 424 u16 cnt_q_avail; 425 u16 next_base_q; /* next queue to be used for channel setup */ 426 struct list_head ch_list; 427 u16 num_chnl_rxq; 428 u16 num_chnl_txq; 429 u16 ch_rss_size; 430 u16 num_chnl_fltr; 431 /* store away rss size info before configuring ADQ channels so that, 432 * it can be used after tc-qdisc delete, to get back RSS setting as 433 * they were before 434 */ 435 u16 orig_rss_size; 436 /* this keeps tracks of all enabled TC with and without DCB 437 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 438 * information 439 */ 440 u8 all_numtc; 441 u16 all_enatc; 442 443 /* store away TC info, to be used for rebuild logic */ 444 u8 old_numtc; 445 u16 old_ena_tc; 446 447 struct ice_channel *ch; 448 449 /* setup back reference, to which aggregator node this VSI 450 * corresponds to 451 */ 452 struct ice_agg_node *agg_node; 453 } ____cacheline_internodealigned_in_smp; 454 455 /* struct that defines an interrupt vector */ 456 struct ice_q_vector { 457 struct ice_vsi *vsi; 458 459 u16 v_idx; /* index in the vsi->q_vector array. */ 460 u16 reg_idx; 461 u8 num_ring_rx; /* total number of Rx rings in vector */ 462 u8 num_ring_tx; /* total number of Tx rings in vector */ 463 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 464 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 465 * value to the device 466 */ 467 u8 intrl; 468 469 struct napi_struct napi; 470 471 struct ice_ring_container rx; 472 struct ice_ring_container tx; 473 474 cpumask_t affinity_mask; 475 struct irq_affinity_notify affinity_notify; 476 477 struct ice_channel *ch; 478 479 char name[ICE_INT_NAME_STR_LEN]; 480 481 u16 total_events; /* net_dim(): number of interrupts processed */ 482 } ____cacheline_internodealigned_in_smp; 483 484 enum ice_pf_flags { 485 ICE_FLAG_FLTR_SYNC, 486 ICE_FLAG_RDMA_ENA, 487 ICE_FLAG_RSS_ENA, 488 ICE_FLAG_SRIOV_ENA, 489 ICE_FLAG_SRIOV_CAPABLE, 490 ICE_FLAG_DCB_CAPABLE, 491 ICE_FLAG_DCB_ENA, 492 ICE_FLAG_FD_ENA, 493 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 494 ICE_FLAG_PTP, /* PTP is enabled by software */ 495 ICE_FLAG_ADV_FEATURES, 496 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 497 ICE_FLAG_CLS_FLOWER, 498 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 499 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 500 ICE_FLAG_NO_MEDIA, 501 ICE_FLAG_FW_LLDP_AGENT, 502 ICE_FLAG_MOD_POWER_UNSUPPORTED, 503 ICE_FLAG_PHY_FW_LOAD_FAILED, 504 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 505 ICE_FLAG_LEGACY_RX, 506 ICE_FLAG_VF_TRUE_PROMISC_ENA, 507 ICE_FLAG_MDD_AUTO_RESET_VF, 508 ICE_FLAG_VF_VLAN_PRUNING, 509 ICE_FLAG_LINK_LENIENT_MODE_ENA, 510 ICE_FLAG_PLUG_AUX_DEV, 511 ICE_FLAG_MTU_CHANGED, 512 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 513 ICE_PF_FLAGS_NBITS /* must be last */ 514 }; 515 516 struct ice_switchdev_info { 517 struct ice_vsi *control_vsi; 518 struct ice_vsi *uplink_vsi; 519 bool is_running; 520 }; 521 522 struct ice_agg_node { 523 u32 agg_id; 524 #define ICE_MAX_VSIS_IN_AGG_NODE 64 525 u32 num_vsis; 526 u8 valid; 527 }; 528 529 struct ice_pf { 530 struct pci_dev *pdev; 531 532 struct devlink_region *nvm_region; 533 struct devlink_region *sram_region; 534 struct devlink_region *devcaps_region; 535 536 /* devlink port data */ 537 struct devlink_port devlink_port; 538 539 /* OS reserved IRQ details */ 540 struct msix_entry *msix_entries; 541 struct ice_res_tracker *irq_tracker; 542 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 543 * number of MSIX vectors needed for all SR-IOV VFs from the number of 544 * MSIX vectors allowed on this PF. 545 */ 546 u16 sriov_base_vector; 547 548 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 549 550 struct ice_vsi **vsi; /* VSIs created by the driver */ 551 struct ice_vsi_stats **vsi_stats; 552 struct ice_sw *first_sw; /* first switch created by firmware */ 553 u16 eswitch_mode; /* current mode of eswitch */ 554 struct ice_vfs vfs; 555 DECLARE_BITMAP(features, ICE_F_MAX); 556 DECLARE_BITMAP(state, ICE_STATE_NBITS); 557 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 558 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 559 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 560 unsigned long serv_tmr_period; 561 unsigned long serv_tmr_prev; 562 struct timer_list serv_tmr; 563 struct work_struct serv_task; 564 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 565 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 566 struct mutex tc_mutex; /* lock to protect TC changes */ 567 struct mutex adev_mutex; /* lock to protect aux device access */ 568 u32 msg_enable; 569 struct ice_ptp ptp; 570 struct gnss_serial *gnss_serial; 571 struct gnss_device *gnss_dev; 572 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 573 u16 rdma_base_vector; 574 575 /* spinlock to protect the AdminQ wait list */ 576 spinlock_t aq_wait_lock; 577 struct hlist_head aq_wait_list; 578 wait_queue_head_t aq_wait_queue; 579 bool fw_emp_reset_disabled; 580 581 wait_queue_head_t reset_wait_queue; 582 583 u32 hw_csum_rx_error; 584 u32 oicr_err_reg; 585 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 586 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 587 u16 max_pf_txqs; /* Total Tx queues PF wide */ 588 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 589 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 590 u16 num_lan_tx; /* num LAN Tx queues setup */ 591 u16 num_lan_rx; /* num LAN Rx queues setup */ 592 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 593 u16 num_alloc_vsi; 594 u16 corer_count; /* Core reset count */ 595 u16 globr_count; /* Global reset count */ 596 u16 empr_count; /* EMP reset count */ 597 u16 pfr_count; /* PF reset count */ 598 599 u8 wol_ena : 1; /* software state of WoL */ 600 u32 wakeup_reason; /* last wakeup reason */ 601 struct ice_hw_port_stats stats; 602 struct ice_hw_port_stats stats_prev; 603 struct ice_hw hw; 604 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 605 u8 rdma_mode; 606 u16 dcbx_cap; 607 u32 tx_timeout_count; 608 unsigned long tx_timeout_last_recovery; 609 u32 tx_timeout_recovery_level; 610 char int_name[ICE_INT_NAME_STR_LEN]; 611 struct auxiliary_device *adev; 612 int aux_idx; 613 u32 sw_int_count; 614 /* count of tc_flower filters specific to channel (aka where filter 615 * action is "hw_tc <tc_num>") 616 */ 617 u16 num_dmac_chnl_fltrs; 618 struct hlist_head tc_flower_fltr_list; 619 620 u64 supported_rxdids; 621 622 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 623 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 624 struct ice_link_default_override_tlv link_dflt_override; 625 struct ice_lag *lag; /* Link Aggregation information */ 626 627 struct ice_switchdev_info switchdev; 628 629 #define ICE_INVALID_AGG_NODE_ID 0 630 #define ICE_PF_AGG_NODE_ID_START 1 631 #define ICE_MAX_PF_AGG_NODES 32 632 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 633 #define ICE_VF_AGG_NODE_ID_START 65 634 #define ICE_MAX_VF_AGG_NODES 32 635 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 636 }; 637 638 struct ice_netdev_priv { 639 struct ice_vsi *vsi; 640 struct ice_repr *repr; 641 /* indirect block callbacks on registered higher level devices 642 * (e.g. tunnel devices) 643 * 644 * tc_indr_block_cb_priv_list is used to look up indirect callback 645 * private data 646 */ 647 struct list_head tc_indr_block_priv_list; 648 }; 649 650 /** 651 * ice_vector_ch_enabled 652 * @qv: pointer to q_vector, can be NULL 653 * 654 * This function returns true if vector is channel enabled otherwise false 655 */ 656 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 657 { 658 return !!qv->ch; /* Enable it to run with TC */ 659 } 660 661 /** 662 * ice_irq_dynamic_ena - Enable default interrupt generation settings 663 * @hw: pointer to HW struct 664 * @vsi: pointer to VSI struct, can be NULL 665 * @q_vector: pointer to q_vector, can be NULL 666 */ 667 static inline void 668 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 669 struct ice_q_vector *q_vector) 670 { 671 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 672 ((struct ice_pf *)hw->back)->oicr_idx; 673 int itr = ICE_ITR_NONE; 674 u32 val; 675 676 /* clear the PBA here, as this function is meant to clean out all 677 * previous interrupts and enable the interrupt 678 */ 679 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 680 (itr << GLINT_DYN_CTL_ITR_INDX_S); 681 if (vsi) 682 if (test_bit(ICE_VSI_DOWN, vsi->state)) 683 return; 684 wr32(hw, GLINT_DYN_CTL(vector), val); 685 } 686 687 /** 688 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 689 * @netdev: pointer to the netdev struct 690 */ 691 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 692 { 693 struct ice_netdev_priv *np = netdev_priv(netdev); 694 695 return np->vsi->back; 696 } 697 698 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 699 { 700 return !!READ_ONCE(vsi->xdp_prog); 701 } 702 703 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 704 { 705 ring->flags |= ICE_TX_FLAGS_RING_XDP; 706 } 707 708 /** 709 * ice_xsk_pool - get XSK buffer pool bound to a ring 710 * @ring: Rx ring to use 711 * 712 * Returns a pointer to xsk_buff_pool structure if there is a buffer pool 713 * present, NULL otherwise. 714 */ 715 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 716 { 717 struct ice_vsi *vsi = ring->vsi; 718 u16 qid = ring->q_index; 719 720 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 721 return NULL; 722 723 return xsk_get_pool_from_qid(vsi->netdev, qid); 724 } 725 726 /** 727 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 728 * @vsi: pointer to VSI 729 * @qid: index of a queue to look at XSK buff pool presence 730 * 731 * Sets XSK buff pool pointer on XDP ring. 732 * 733 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 734 * queue id. Reason for doing so is that queue vectors might have assigned more 735 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 736 * carries a pointer to one of these XDP rings for its own purposes, such as 737 * handling XDP_TX action, therefore we can piggyback here on the 738 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 739 */ 740 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 741 { 742 struct ice_tx_ring *ring; 743 744 ring = vsi->rx_rings[qid]->xdp_ring; 745 if (!ring) 746 return; 747 748 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) { 749 ring->xsk_pool = NULL; 750 return; 751 } 752 753 ring->xsk_pool = xsk_get_pool_from_qid(vsi->netdev, qid); 754 } 755 756 /** 757 * ice_get_main_vsi - Get the PF VSI 758 * @pf: PF instance 759 * 760 * returns pf->vsi[0], which by definition is the PF VSI 761 */ 762 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 763 { 764 if (pf->vsi) 765 return pf->vsi[0]; 766 767 return NULL; 768 } 769 770 /** 771 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 772 * @np: private netdev structure 773 */ 774 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 775 { 776 /* In case of port representor return source port VSI. */ 777 if (np->repr) 778 return np->repr->src_vsi; 779 else 780 return np->vsi; 781 } 782 783 /** 784 * ice_get_ctrl_vsi - Get the control VSI 785 * @pf: PF instance 786 */ 787 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 788 { 789 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 790 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 791 return NULL; 792 793 return pf->vsi[pf->ctrl_vsi_idx]; 794 } 795 796 /** 797 * ice_find_vsi - Find the VSI from VSI ID 798 * @pf: The PF pointer to search in 799 * @vsi_num: The VSI ID to search for 800 */ 801 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 802 { 803 int i; 804 805 ice_for_each_vsi(pf, i) 806 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 807 return pf->vsi[i]; 808 return NULL; 809 } 810 811 /** 812 * ice_is_switchdev_running - check if switchdev is configured 813 * @pf: pointer to PF structure 814 * 815 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 816 * and switchdev is configured, false otherwise. 817 */ 818 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 819 { 820 return pf->switchdev.is_running; 821 } 822 823 /** 824 * ice_set_sriov_cap - enable SRIOV in PF flags 825 * @pf: PF struct 826 */ 827 static inline void ice_set_sriov_cap(struct ice_pf *pf) 828 { 829 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 830 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 831 } 832 833 /** 834 * ice_clear_sriov_cap - disable SRIOV in PF flags 835 * @pf: PF struct 836 */ 837 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 838 { 839 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 840 } 841 842 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 843 #define ICE_FD_STAT_PF_IDX(base_idx) \ 844 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 845 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 846 #define ICE_FD_STAT_CH 1 847 #define ICE_FD_CH_STAT_IDX(base_idx) \ 848 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 849 850 /** 851 * ice_is_adq_active - any active ADQs 852 * @pf: pointer to PF 853 * 854 * This function returns true if there are any ADQs configured (which is 855 * determined by looking at VSI type (which should be VSI_PF), numtc, and 856 * TC_MQPRIO flag) otherwise return false 857 */ 858 static inline bool ice_is_adq_active(struct ice_pf *pf) 859 { 860 struct ice_vsi *vsi; 861 862 vsi = ice_get_main_vsi(pf); 863 if (!vsi) 864 return false; 865 866 /* is ADQ configured */ 867 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 868 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 869 return true; 870 871 return false; 872 } 873 874 bool netif_is_ice(struct net_device *dev); 875 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 876 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 877 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 878 int ice_vsi_open(struct ice_vsi *vsi); 879 void ice_set_ethtool_ops(struct net_device *netdev); 880 void ice_set_ethtool_repr_ops(struct net_device *netdev); 881 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 882 u16 ice_get_avail_txq_count(struct ice_pf *pf); 883 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 884 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 885 void ice_update_vsi_stats(struct ice_vsi *vsi); 886 void ice_update_pf_stats(struct ice_pf *pf); 887 void 888 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 889 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 890 int ice_up(struct ice_vsi *vsi); 891 int ice_down(struct ice_vsi *vsi); 892 int ice_down_up(struct ice_vsi *vsi); 893 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 894 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 895 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 896 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 897 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 898 int 899 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 900 u32 flags); 901 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 902 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 903 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 904 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 905 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 906 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 907 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 908 int ice_plug_aux_dev(struct ice_pf *pf); 909 void ice_unplug_aux_dev(struct ice_pf *pf); 910 int ice_init_rdma(struct ice_pf *pf); 911 void ice_deinit_rdma(struct ice_pf *pf); 912 const char *ice_aq_str(enum ice_aq_err aq_err); 913 bool ice_is_wol_supported(struct ice_hw *hw); 914 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 915 int 916 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 917 bool is_tun); 918 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 919 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 920 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 921 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 922 int 923 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 924 u32 *rule_locs); 925 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 926 void ice_fdir_release_flows(struct ice_hw *hw); 927 void ice_fdir_replay_flows(struct ice_hw *hw); 928 void ice_fdir_replay_fltrs(struct ice_pf *pf); 929 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 930 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 931 struct ice_rq_event_info *event); 932 int ice_open(struct net_device *netdev); 933 int ice_open_internal(struct net_device *netdev); 934 int ice_stop(struct net_device *netdev); 935 void ice_service_task_schedule(struct ice_pf *pf); 936 int ice_load(struct ice_pf *pf); 937 void ice_unload(struct ice_pf *pf); 938 939 /** 940 * ice_set_rdma_cap - enable RDMA support 941 * @pf: PF struct 942 */ 943 static inline void ice_set_rdma_cap(struct ice_pf *pf) 944 { 945 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 946 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 947 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 948 } 949 } 950 951 /** 952 * ice_clear_rdma_cap - disable RDMA support 953 * @pf: PF struct 954 */ 955 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 956 { 957 /* We can directly unplug aux device here only if the flag bit 958 * ICE_FLAG_PLUG_AUX_DEV is not set because ice_unplug_aux_dev() 959 * could race with ice_plug_aux_dev() called from 960 * ice_service_task(). In this case we only clear that bit now and 961 * aux device will be unplugged later once ice_plug_aux_device() 962 * called from ice_service_task() finishes (see ice_service_task()). 963 */ 964 if (!test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags)) 965 ice_unplug_aux_dev(pf); 966 967 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 968 } 969 #endif /* _ICE_H_ */ 970