1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/compiler.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/cpumask.h> 16 #include <linux/rtnetlink.h> 17 #include <linux/if_vlan.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/pci.h> 20 #include <linux/workqueue.h> 21 #include <linux/aer.h> 22 #include <linux/interrupt.h> 23 #include <linux/ethtool.h> 24 #include <linux/timer.h> 25 #include <linux/delay.h> 26 #include <linux/bitmap.h> 27 #include <linux/log2.h> 28 #include <linux/ip.h> 29 #include <linux/sctp.h> 30 #include <linux/ipv6.h> 31 #include <linux/if_bridge.h> 32 #include <linux/avf/virtchnl.h> 33 #include <net/ipv6.h> 34 #include "ice_devids.h" 35 #include "ice_type.h" 36 #include "ice_txrx.h" 37 #include "ice_switch.h" 38 #include "ice_common.h" 39 #include "ice_sched.h" 40 #include "ice_virtchnl_pf.h" 41 #include "ice_sriov.h" 42 43 extern const char ice_drv_ver[]; 44 #define ICE_BAR0 0 45 #define ICE_REQ_DESC_MULTIPLE 32 46 #define ICE_MIN_NUM_DESC ICE_REQ_DESC_MULTIPLE 47 #define ICE_MAX_NUM_DESC 8160 48 /* set default number of Rx/Tx descriptors to the minimum between 49 * ICE_MAX_NUM_DESC and the number of descriptors to fill up an entire page 50 */ 51 #define ICE_DFLT_NUM_RX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ 52 ALIGN(PAGE_SIZE / \ 53 sizeof(union ice_32byte_rx_desc), \ 54 ICE_REQ_DESC_MULTIPLE)) 55 #define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ 56 ALIGN(PAGE_SIZE / \ 57 sizeof(struct ice_tx_desc), \ 58 ICE_REQ_DESC_MULTIPLE)) 59 60 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 61 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 62 #define ICE_ETHTOOL_FWVER_LEN 32 63 #define ICE_AQ_LEN 64 64 #define ICE_MBXQ_LEN 64 65 #define ICE_MIN_MSIX 2 66 #define ICE_NO_VSI 0xffff 67 #define ICE_MAX_TXQS 2048 68 #define ICE_MAX_RXQS 2048 69 #define ICE_VSI_MAP_CONTIG 0 70 #define ICE_VSI_MAP_SCATTER 1 71 #define ICE_MAX_SCATTER_TXQS 16 72 #define ICE_MAX_SCATTER_RXQS 16 73 #define ICE_Q_WAIT_RETRY_LIMIT 10 74 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 75 #define ICE_MAX_LG_RSS_QS 256 76 #define ICE_MAX_SMALL_RSS_QS 8 77 #define ICE_RES_VALID_BIT 0x8000 78 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 79 #define ICE_INVAL_Q_INDEX 0xffff 80 #define ICE_INVAL_VFID 256 81 #define ICE_MAX_VF_COUNT 256 82 #define ICE_MAX_QS_PER_VF 256 83 #define ICE_MIN_QS_PER_VF 1 84 #define ICE_DFLT_QS_PER_VF 4 85 #define ICE_MAX_BASE_QS_PER_VF 16 86 #define ICE_MAX_INTR_PER_VF 65 87 #define ICE_MIN_INTR_PER_VF (ICE_MIN_QS_PER_VF + 1) 88 #define ICE_DFLT_INTR_PER_VF (ICE_DFLT_QS_PER_VF + 1) 89 90 #define ICE_MAX_RESET_WAIT 20 91 92 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 93 94 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 95 96 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ 97 (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) 98 99 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 100 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 101 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 102 103 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 104 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 105 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 106 107 /* Macro for each VSI in a PF */ 108 #define ice_for_each_vsi(pf, i) \ 109 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 110 111 /* Macros for each Tx/Rx ring in a VSI */ 112 #define ice_for_each_txq(vsi, i) \ 113 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 114 115 #define ice_for_each_rxq(vsi, i) \ 116 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 117 118 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 119 #define ice_for_each_alloc_txq(vsi, i) \ 120 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 121 122 #define ice_for_each_alloc_rxq(vsi, i) \ 123 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 124 125 #define ice_for_each_q_vector(vsi, i) \ 126 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 127 128 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 129 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 130 131 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 132 ICE_PROMISC_MCAST_TX | \ 133 ICE_PROMISC_UCAST_RX | \ 134 ICE_PROMISC_MCAST_RX | \ 135 ICE_PROMISC_VLAN_TX | \ 136 ICE_PROMISC_VLAN_RX) 137 138 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 139 140 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 141 ICE_PROMISC_MCAST_RX | \ 142 ICE_PROMISC_VLAN_TX | \ 143 ICE_PROMISC_VLAN_RX) 144 145 struct ice_tc_info { 146 u16 qoffset; 147 u16 qcount_tx; 148 u16 qcount_rx; 149 u8 netdev_tc; 150 }; 151 152 struct ice_tc_cfg { 153 u8 numtc; /* Total number of enabled TCs */ 154 u8 ena_tc; /* TX map */ 155 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 156 }; 157 158 struct ice_res_tracker { 159 u16 num_entries; 160 u16 search_hint; 161 u16 list[1]; 162 }; 163 164 struct ice_qs_cfg { 165 struct mutex *qs_mutex; /* will be assgined to &pf->avail_q_mutex */ 166 unsigned long *pf_map; 167 unsigned long pf_map_size; 168 unsigned int q_count; 169 unsigned int scatter_count; 170 u16 *vsi_map; 171 u16 vsi_map_offset; 172 u8 mapping_mode; 173 }; 174 175 struct ice_sw { 176 struct ice_pf *pf; 177 u16 sw_id; /* switch ID for this switch */ 178 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 179 }; 180 181 enum ice_state { 182 __ICE_DOWN, 183 __ICE_NEEDS_RESTART, 184 __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 185 __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 186 __ICE_PFR_REQ, /* set by driver and peers */ 187 __ICE_CORER_REQ, /* set by driver and peers */ 188 __ICE_GLOBR_REQ, /* set by driver and peers */ 189 __ICE_CORER_RECV, /* set by OICR handler */ 190 __ICE_GLOBR_RECV, /* set by OICR handler */ 191 __ICE_EMPR_RECV, /* set by OICR handler */ 192 __ICE_SUSPENDED, /* set on module remove path */ 193 __ICE_RESET_FAILED, /* set by reset/rebuild */ 194 /* When checking for the PF to be in a nominal operating state, the 195 * bits that are grouped at the beginning of the list need to be 196 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 197 * be checked. If you need to add a bit into consideration for nominal 198 * operating state, it must be added before 199 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 200 * without appropriate consideration. 201 */ 202 __ICE_STATE_NOMINAL_CHECK_BITS, 203 __ICE_ADMINQ_EVENT_PENDING, 204 __ICE_MAILBOXQ_EVENT_PENDING, 205 __ICE_MDD_EVENT_PENDING, 206 __ICE_VFLR_EVENT_PENDING, 207 __ICE_FLTR_OVERFLOW_PROMISC, 208 __ICE_VF_DIS, 209 __ICE_CFG_BUSY, 210 __ICE_SERVICE_SCHED, 211 __ICE_SERVICE_DIS, 212 __ICE_STATE_NBITS /* must be last */ 213 }; 214 215 enum ice_vsi_flags { 216 ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 217 ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 218 ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 219 ICE_VSI_FLAG_PROMISC_CHANGED, 220 ICE_VSI_FLAG_NBITS /* must be last */ 221 }; 222 223 /* struct that defines a VSI, associated with a dev */ 224 struct ice_vsi { 225 struct net_device *netdev; 226 struct ice_sw *vsw; /* switch this VSI is on */ 227 struct ice_pf *back; /* back pointer to PF */ 228 struct ice_port_info *port_info; /* back pointer to port_info */ 229 struct ice_ring **rx_rings; /* Rx ring array */ 230 struct ice_ring **tx_rings; /* Tx ring array */ 231 struct ice_q_vector **q_vectors; /* q_vector array */ 232 233 irqreturn_t (*irq_handler)(int irq, void *data); 234 235 u64 tx_linearize; 236 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 237 DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 238 unsigned int current_netdev_flags; 239 u32 tx_restart; 240 u32 tx_busy; 241 u32 rx_buf_failed; 242 u32 rx_page_failed; 243 int num_q_vectors; 244 int sw_base_vector; /* Irq base for OS reserved vectors */ 245 int hw_base_vector; /* HW (absolute) index of a vector */ 246 enum ice_vsi_type type; 247 u16 vsi_num; /* HW (absolute) index of this VSI */ 248 u16 idx; /* software index in pf->vsi[] */ 249 250 /* Interrupt thresholds */ 251 u16 work_lmt; 252 253 s16 vf_id; /* VF ID for SR-IOV VSIs */ 254 255 /* RSS config */ 256 u16 rss_table_size; /* HW RSS table size */ 257 u16 rss_size; /* Allocated RSS queues */ 258 u8 *rss_hkey_user; /* User configured hash keys */ 259 u8 *rss_lut_user; /* User configured lookup table entries */ 260 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 261 262 u16 max_frame; 263 u16 rx_buf_len; 264 265 struct ice_aqc_vsi_props info; /* VSI properties */ 266 267 /* VSI stats */ 268 struct rtnl_link_stats64 net_stats; 269 struct ice_eth_stats eth_stats; 270 struct ice_eth_stats eth_stats_prev; 271 272 struct list_head tmp_sync_list; /* MAC filters to be synced */ 273 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 274 275 u8 irqs_ready; 276 u8 current_isup; /* Sync 'link up' logging */ 277 u8 stat_offsets_loaded; 278 u8 vlan_ena; 279 280 /* queue information */ 281 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 282 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 283 u16 txq_map[ICE_MAX_TXQS]; /* index in pf->avail_txqs */ 284 u16 rxq_map[ICE_MAX_RXQS]; /* index in pf->avail_rxqs */ 285 u16 alloc_txq; /* Allocated Tx queues */ 286 u16 num_txq; /* Used Tx queues */ 287 u16 alloc_rxq; /* Allocated Rx queues */ 288 u16 num_rxq; /* Used Rx queues */ 289 u16 num_rx_desc; 290 u16 num_tx_desc; 291 struct ice_tc_cfg tc_cfg; 292 } ____cacheline_internodealigned_in_smp; 293 294 /* struct that defines an interrupt vector */ 295 struct ice_q_vector { 296 struct ice_vsi *vsi; 297 298 u16 v_idx; /* index in the vsi->q_vector array. */ 299 u8 num_ring_rx; /* total number of Rx rings in vector */ 300 u8 num_ring_tx; /* total number of Tx rings in vector */ 301 u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 302 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 303 * value to the device 304 */ 305 u8 intrl; 306 307 struct napi_struct napi; 308 309 struct ice_ring_container rx; 310 struct ice_ring_container tx; 311 312 cpumask_t affinity_mask; 313 struct irq_affinity_notify affinity_notify; 314 315 char name[ICE_INT_NAME_STR_LEN]; 316 } ____cacheline_internodealigned_in_smp; 317 318 enum ice_pf_flags { 319 ICE_FLAG_MSIX_ENA, 320 ICE_FLAG_FLTR_SYNC, 321 ICE_FLAG_RSS_ENA, 322 ICE_FLAG_SRIOV_ENA, 323 ICE_FLAG_SRIOV_CAPABLE, 324 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 325 ICE_PF_FLAGS_NBITS /* must be last */ 326 }; 327 328 struct ice_pf { 329 struct pci_dev *pdev; 330 331 /* OS reserved IRQ details */ 332 struct msix_entry *msix_entries; 333 struct ice_res_tracker *sw_irq_tracker; 334 335 /* HW reserved Interrupts for this PF */ 336 struct ice_res_tracker *hw_irq_tracker; 337 338 struct ice_vsi **vsi; /* VSIs created by the driver */ 339 struct ice_sw *first_sw; /* first switch created by firmware */ 340 /* Virtchnl/SR-IOV config info */ 341 struct ice_vf *vf; 342 int num_alloc_vfs; /* actual number of VFs allocated */ 343 u16 num_vfs_supported; /* num VFs supported for this PF */ 344 u16 num_vf_qps; /* num queue pairs per VF */ 345 u16 num_vf_msix; /* num vectors per VF */ 346 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 347 DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS); 348 DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS); 349 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 350 unsigned long serv_tmr_period; 351 unsigned long serv_tmr_prev; 352 struct timer_list serv_tmr; 353 struct work_struct serv_task; 354 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 355 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 356 u32 msg_enable; 357 u32 hw_csum_rx_error; 358 u32 sw_oicr_idx; /* Other interrupt cause SW vector index */ 359 u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 360 u32 hw_oicr_idx; /* Other interrupt cause vector HW index */ 361 u32 num_avail_hw_msix; /* remaining HW MSIX vectors left unclaimed */ 362 u32 num_lan_msix; /* Total MSIX vectors for base driver */ 363 u16 num_lan_tx; /* num lan Tx queues setup */ 364 u16 num_lan_rx; /* num lan Rx queues setup */ 365 u16 q_left_tx; /* remaining num Tx queues left unclaimed */ 366 u16 q_left_rx; /* remaining num Rx queues left unclaimed */ 367 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 368 u16 num_alloc_vsi; 369 u16 corer_count; /* Core reset count */ 370 u16 globr_count; /* Global reset count */ 371 u16 empr_count; /* EMP reset count */ 372 u16 pfr_count; /* PF reset count */ 373 374 struct ice_hw_port_stats stats; 375 struct ice_hw_port_stats stats_prev; 376 struct ice_hw hw; 377 u8 stat_prev_loaded; /* has previous stats been loaded */ 378 u32 tx_timeout_count; 379 unsigned long tx_timeout_last_recovery; 380 u32 tx_timeout_recovery_level; 381 char int_name[ICE_INT_NAME_STR_LEN]; 382 }; 383 384 struct ice_netdev_priv { 385 struct ice_vsi *vsi; 386 }; 387 388 /** 389 * ice_irq_dynamic_ena - Enable default interrupt generation settings 390 * @hw: pointer to hw struct 391 * @vsi: pointer to vsi struct, can be NULL 392 * @q_vector: pointer to q_vector, can be NULL 393 */ 394 static inline void 395 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 396 struct ice_q_vector *q_vector) 397 { 398 u32 vector = (vsi && q_vector) ? vsi->hw_base_vector + q_vector->v_idx : 399 ((struct ice_pf *)hw->back)->hw_oicr_idx; 400 int itr = ICE_ITR_NONE; 401 u32 val; 402 403 /* clear the PBA here, as this function is meant to clean out all 404 * previous interrupts and enable the interrupt 405 */ 406 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 407 (itr << GLINT_DYN_CTL_ITR_INDX_S); 408 if (vsi) 409 if (test_bit(__ICE_DOWN, vsi->state)) 410 return; 411 wr32(hw, GLINT_DYN_CTL(vector), val); 412 } 413 414 static inline void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 415 { 416 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 417 vsi->tc_cfg.numtc = 1; 418 } 419 420 void ice_set_ethtool_ops(struct net_device *netdev); 421 int ice_up(struct ice_vsi *vsi); 422 int ice_down(struct ice_vsi *vsi); 423 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 424 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 425 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 426 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 427 void ice_napi_del(struct ice_vsi *vsi); 428 429 #endif /* _ICE_H_ */ 430