1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <linux/gnss.h> 43 #include <net/pkt_cls.h> 44 #include <net/pkt_sched.h> 45 #include <net/tc_act/tc_mirred.h> 46 #include <net/tc_act/tc_gact.h> 47 #include <net/ip.h> 48 #include <net/devlink.h> 49 #include <net/ipv6.h> 50 #include <net/xdp_sock.h> 51 #include <net/xdp_sock_drv.h> 52 #include <net/geneve.h> 53 #include <net/gre.h> 54 #include <net/udp_tunnel.h> 55 #include <net/vxlan.h> 56 #include <net/gtp.h> 57 #include <linux/ppp_defs.h> 58 #include "ice_devids.h" 59 #include "ice_type.h" 60 #include "ice_txrx.h" 61 #include "ice_dcb.h" 62 #include "ice_switch.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_idc_int.h" 67 #include "ice_sriov.h" 68 #include "ice_vf_mbx.h" 69 #include "ice_ptp.h" 70 #include "ice_fdir.h" 71 #include "ice_xsk.h" 72 #include "ice_arfs.h" 73 #include "ice_repr.h" 74 #include "ice_eswitch.h" 75 #include "ice_lag.h" 76 #include "ice_vsi_vlan_ops.h" 77 #include "ice_gnss.h" 78 79 #define ICE_BAR0 0 80 #define ICE_REQ_DESC_MULTIPLE 32 81 #define ICE_MIN_NUM_DESC 64 82 #define ICE_MAX_NUM_DESC 8160 83 #define ICE_DFLT_MIN_RX_DESC 512 84 #define ICE_DFLT_NUM_TX_DESC 256 85 #define ICE_DFLT_NUM_RX_DESC 2048 86 87 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 88 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 89 #define ICE_AQ_LEN 192 90 #define ICE_MBXSQ_LEN 64 91 #define ICE_SBQ_LEN 64 92 #define ICE_MIN_LAN_TXRX_MSIX 1 93 #define ICE_MIN_LAN_OICR_MSIX 1 94 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 95 #define ICE_FDIR_MSIX 2 96 #define ICE_RDMA_NUM_AEQ_MSIX 4 97 #define ICE_MIN_RDMA_MSIX 2 98 #define ICE_ESWITCH_MSIX 1 99 #define ICE_NO_VSI 0xffff 100 #define ICE_VSI_MAP_CONTIG 0 101 #define ICE_VSI_MAP_SCATTER 1 102 #define ICE_MAX_SCATTER_TXQS 16 103 #define ICE_MAX_SCATTER_RXQS 16 104 #define ICE_Q_WAIT_RETRY_LIMIT 10 105 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 106 #define ICE_MAX_LG_RSS_QS 256 107 #define ICE_RES_VALID_BIT 0x8000 108 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 109 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 110 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 111 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 112 #define ICE_INVAL_Q_INDEX 0xffff 113 114 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 115 116 #define ICE_CHNL_START_TC 1 117 118 #define ICE_MAX_RESET_WAIT 20 119 120 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 121 122 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 123 124 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 125 126 #define ICE_MAX_TSO_SIZE 131072 127 128 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 129 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 130 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 131 132 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 133 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 134 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 135 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 136 137 /* Minimum BW limit is 500 Kbps for any scheduler node */ 138 #define ICE_MIN_BW_LIMIT 500 139 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 140 * use it to convert user specified BW limit into Kbps 141 */ 142 #define ICE_BW_KBPS_DIVISOR 125 143 144 /* Default recipes have priority 4 and below, hence priority values between 5..7 145 * can be used as filter priority for advanced switch filter (advanced switch 146 * filters need new recipe to be created for specified extraction sequence 147 * because default recipe extraction sequence does not represent custom 148 * extraction) 149 */ 150 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 151 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 152 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 153 * SYN/FIN/RST)) 154 */ 155 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 156 #define ICE_SWITCH_FLTR_PRIO_VSI 5 157 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 158 159 /* Macro for each VSI in a PF */ 160 #define ice_for_each_vsi(pf, i) \ 161 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 162 163 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 164 #define ice_for_each_txq(vsi, i) \ 165 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 166 167 #define ice_for_each_xdp_txq(vsi, i) \ 168 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 169 170 #define ice_for_each_rxq(vsi, i) \ 171 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 172 173 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 174 #define ice_for_each_alloc_txq(vsi, i) \ 175 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 176 177 #define ice_for_each_alloc_rxq(vsi, i) \ 178 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 179 180 #define ice_for_each_q_vector(vsi, i) \ 181 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 182 183 #define ice_for_each_chnl_tc(i) \ 184 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 185 186 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX) 187 188 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 189 ICE_PROMISC_UCAST_RX | \ 190 ICE_PROMISC_VLAN_TX | \ 191 ICE_PROMISC_VLAN_RX) 192 193 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 194 195 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 196 ICE_PROMISC_MCAST_RX | \ 197 ICE_PROMISC_VLAN_TX | \ 198 ICE_PROMISC_VLAN_RX) 199 200 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 201 202 enum ice_feature { 203 ICE_F_DSCP, 204 ICE_F_PTP_EXTTS, 205 ICE_F_SMA_CTRL, 206 ICE_F_GNSS, 207 ICE_F_MAX 208 }; 209 210 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 211 212 struct ice_channel { 213 struct list_head list; 214 u8 type; 215 u16 sw_id; 216 u16 base_q; 217 u16 num_rxq; 218 u16 num_txq; 219 u16 vsi_num; 220 u8 ena_tc; 221 struct ice_aqc_vsi_props info; 222 u64 max_tx_rate; 223 u64 min_tx_rate; 224 atomic_t num_sb_fltr; 225 struct ice_vsi *ch_vsi; 226 }; 227 228 struct ice_txq_meta { 229 u32 q_teid; /* Tx-scheduler element identifier */ 230 u16 q_id; /* Entry in VSI's txq_map bitmap */ 231 u16 q_handle; /* Relative index of Tx queue within TC */ 232 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 233 u8 tc; /* TC number that Tx queue belongs to */ 234 }; 235 236 struct ice_tc_info { 237 u16 qoffset; 238 u16 qcount_tx; 239 u16 qcount_rx; 240 u8 netdev_tc; 241 }; 242 243 struct ice_tc_cfg { 244 u8 numtc; /* Total number of enabled TCs */ 245 u16 ena_tc; /* Tx map */ 246 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 247 }; 248 249 struct ice_res_tracker { 250 u16 num_entries; 251 u16 end; 252 u16 list[]; 253 }; 254 255 struct ice_qs_cfg { 256 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 257 unsigned long *pf_map; 258 unsigned long pf_map_size; 259 unsigned int q_count; 260 unsigned int scatter_count; 261 u16 *vsi_map; 262 u16 vsi_map_offset; 263 u8 mapping_mode; 264 }; 265 266 struct ice_sw { 267 struct ice_pf *pf; 268 u16 sw_id; /* switch ID for this switch */ 269 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 270 }; 271 272 enum ice_pf_state { 273 ICE_TESTING, 274 ICE_DOWN, 275 ICE_NEEDS_RESTART, 276 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 277 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 278 ICE_PFR_REQ, /* set by driver */ 279 ICE_CORER_REQ, /* set by driver */ 280 ICE_GLOBR_REQ, /* set by driver */ 281 ICE_CORER_RECV, /* set by OICR handler */ 282 ICE_GLOBR_RECV, /* set by OICR handler */ 283 ICE_EMPR_RECV, /* set by OICR handler */ 284 ICE_SUSPENDED, /* set on module remove path */ 285 ICE_RESET_FAILED, /* set by reset/rebuild */ 286 /* When checking for the PF to be in a nominal operating state, the 287 * bits that are grouped at the beginning of the list need to be 288 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 289 * be checked. If you need to add a bit into consideration for nominal 290 * operating state, it must be added before 291 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 292 * without appropriate consideration. 293 */ 294 ICE_STATE_NOMINAL_CHECK_BITS, 295 ICE_ADMINQ_EVENT_PENDING, 296 ICE_MAILBOXQ_EVENT_PENDING, 297 ICE_SIDEBANDQ_EVENT_PENDING, 298 ICE_MDD_EVENT_PENDING, 299 ICE_VFLR_EVENT_PENDING, 300 ICE_FLTR_OVERFLOW_PROMISC, 301 ICE_VF_DIS, 302 ICE_CFG_BUSY, 303 ICE_SERVICE_SCHED, 304 ICE_SERVICE_DIS, 305 ICE_FD_FLUSH_REQ, 306 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 307 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 308 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 309 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 310 ICE_PHY_INIT_COMPLETE, 311 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 312 ICE_AUX_ERR_PENDING, 313 ICE_STATE_NBITS /* must be last */ 314 }; 315 316 enum ice_vsi_state { 317 ICE_VSI_DOWN, 318 ICE_VSI_NEEDS_RESTART, 319 ICE_VSI_NETDEV_ALLOCD, 320 ICE_VSI_NETDEV_REGISTERED, 321 ICE_VSI_UMAC_FLTR_CHANGED, 322 ICE_VSI_MMAC_FLTR_CHANGED, 323 ICE_VSI_PROMISC_CHANGED, 324 ICE_VSI_STATE_NBITS /* must be last */ 325 }; 326 327 struct ice_vsi_stats { 328 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 329 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 330 }; 331 332 /* struct that defines a VSI, associated with a dev */ 333 struct ice_vsi { 334 struct net_device *netdev; 335 struct ice_sw *vsw; /* switch this VSI is on */ 336 struct ice_pf *back; /* back pointer to PF */ 337 struct ice_port_info *port_info; /* back pointer to port_info */ 338 struct ice_rx_ring **rx_rings; /* Rx ring array */ 339 struct ice_tx_ring **tx_rings; /* Tx ring array */ 340 struct ice_q_vector **q_vectors; /* q_vector array */ 341 342 irqreturn_t (*irq_handler)(int irq, void *data); 343 344 u64 tx_linearize; 345 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 346 unsigned int current_netdev_flags; 347 u32 tx_restart; 348 u32 tx_busy; 349 u32 rx_buf_failed; 350 u32 rx_page_failed; 351 u16 num_q_vectors; 352 u16 base_vector; /* IRQ base for OS reserved vectors */ 353 enum ice_vsi_type type; 354 u16 vsi_num; /* HW (absolute) index of this VSI */ 355 u16 idx; /* software index in pf->vsi[] */ 356 357 struct ice_vf *vf; /* VF associated with this VSI */ 358 359 u16 num_gfltr; 360 u16 num_bfltr; 361 362 /* RSS config */ 363 u16 rss_table_size; /* HW RSS table size */ 364 u16 rss_size; /* Allocated RSS queues */ 365 u8 *rss_hkey_user; /* User configured hash keys */ 366 u8 *rss_lut_user; /* User configured lookup table entries */ 367 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 368 369 /* aRFS members only allocated for the PF VSI */ 370 #define ICE_MAX_ARFS_LIST 1024 371 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 372 struct hlist_head *arfs_fltr_list; 373 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 374 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 375 atomic_t *arfs_last_fltr_id; 376 377 u16 max_frame; 378 u16 rx_buf_len; 379 380 struct ice_aqc_vsi_props info; /* VSI properties */ 381 382 /* VSI stats */ 383 struct rtnl_link_stats64 net_stats; 384 struct rtnl_link_stats64 net_stats_prev; 385 struct ice_eth_stats eth_stats; 386 struct ice_eth_stats eth_stats_prev; 387 388 struct list_head tmp_sync_list; /* MAC filters to be synced */ 389 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 390 391 u8 irqs_ready:1; 392 u8 current_isup:1; /* Sync 'link up' logging */ 393 u8 stat_offsets_loaded:1; 394 struct ice_vsi_vlan_ops inner_vlan_ops; 395 struct ice_vsi_vlan_ops outer_vlan_ops; 396 u16 num_vlan; 397 398 /* queue information */ 399 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 400 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 401 u16 *txq_map; /* index in pf->avail_txqs */ 402 u16 *rxq_map; /* index in pf->avail_rxqs */ 403 u16 alloc_txq; /* Allocated Tx queues */ 404 u16 num_txq; /* Used Tx queues */ 405 u16 alloc_rxq; /* Allocated Rx queues */ 406 u16 num_rxq; /* Used Rx queues */ 407 u16 req_txq; /* User requested Tx queues */ 408 u16 req_rxq; /* User requested Rx queues */ 409 u16 num_rx_desc; 410 u16 num_tx_desc; 411 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 412 struct ice_tc_cfg tc_cfg; 413 struct bpf_prog *xdp_prog; 414 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 415 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 416 u16 num_xdp_txq; /* Used XDP queues */ 417 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 418 419 struct net_device **target_netdevs; 420 421 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 422 423 /* Channel Specific Fields */ 424 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 425 u16 cnt_q_avail; 426 u16 next_base_q; /* next queue to be used for channel setup */ 427 struct list_head ch_list; 428 u16 num_chnl_rxq; 429 u16 num_chnl_txq; 430 u16 ch_rss_size; 431 u16 num_chnl_fltr; 432 /* store away rss size info before configuring ADQ channels so that, 433 * it can be used after tc-qdisc delete, to get back RSS setting as 434 * they were before 435 */ 436 u16 orig_rss_size; 437 /* this keeps tracks of all enabled TC with and without DCB 438 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 439 * information 440 */ 441 u8 all_numtc; 442 u16 all_enatc; 443 444 /* store away TC info, to be used for rebuild logic */ 445 u8 old_numtc; 446 u16 old_ena_tc; 447 448 struct ice_channel *ch; 449 450 /* setup back reference, to which aggregator node this VSI 451 * corresponds to 452 */ 453 struct ice_agg_node *agg_node; 454 } ____cacheline_internodealigned_in_smp; 455 456 /* struct that defines an interrupt vector */ 457 struct ice_q_vector { 458 struct ice_vsi *vsi; 459 460 u16 v_idx; /* index in the vsi->q_vector array. */ 461 u16 reg_idx; 462 u8 num_ring_rx; /* total number of Rx rings in vector */ 463 u8 num_ring_tx; /* total number of Tx rings in vector */ 464 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 465 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 466 * value to the device 467 */ 468 u8 intrl; 469 470 struct napi_struct napi; 471 472 struct ice_ring_container rx; 473 struct ice_ring_container tx; 474 475 cpumask_t affinity_mask; 476 struct irq_affinity_notify affinity_notify; 477 478 struct ice_channel *ch; 479 480 char name[ICE_INT_NAME_STR_LEN]; 481 482 u16 total_events; /* net_dim(): number of interrupts processed */ 483 } ____cacheline_internodealigned_in_smp; 484 485 enum ice_pf_flags { 486 ICE_FLAG_FLTR_SYNC, 487 ICE_FLAG_RDMA_ENA, 488 ICE_FLAG_RSS_ENA, 489 ICE_FLAG_SRIOV_ENA, 490 ICE_FLAG_SRIOV_CAPABLE, 491 ICE_FLAG_DCB_CAPABLE, 492 ICE_FLAG_DCB_ENA, 493 ICE_FLAG_FD_ENA, 494 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 495 ICE_FLAG_PTP, /* PTP is enabled by software */ 496 ICE_FLAG_ADV_FEATURES, 497 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 498 ICE_FLAG_CLS_FLOWER, 499 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 500 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 501 ICE_FLAG_NO_MEDIA, 502 ICE_FLAG_FW_LLDP_AGENT, 503 ICE_FLAG_MOD_POWER_UNSUPPORTED, 504 ICE_FLAG_PHY_FW_LOAD_FAILED, 505 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 506 ICE_FLAG_LEGACY_RX, 507 ICE_FLAG_VF_TRUE_PROMISC_ENA, 508 ICE_FLAG_MDD_AUTO_RESET_VF, 509 ICE_FLAG_VF_VLAN_PRUNING, 510 ICE_FLAG_LINK_LENIENT_MODE_ENA, 511 ICE_FLAG_PLUG_AUX_DEV, 512 ICE_FLAG_UNPLUG_AUX_DEV, 513 ICE_FLAG_MTU_CHANGED, 514 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 515 ICE_PF_FLAGS_NBITS /* must be last */ 516 }; 517 518 struct ice_switchdev_info { 519 struct ice_vsi *control_vsi; 520 struct ice_vsi *uplink_vsi; 521 bool is_running; 522 }; 523 524 struct ice_agg_node { 525 u32 agg_id; 526 #define ICE_MAX_VSIS_IN_AGG_NODE 64 527 u32 num_vsis; 528 u8 valid; 529 }; 530 531 struct ice_pf { 532 struct pci_dev *pdev; 533 534 struct devlink_region *nvm_region; 535 struct devlink_region *sram_region; 536 struct devlink_region *devcaps_region; 537 538 /* devlink port data */ 539 struct devlink_port devlink_port; 540 541 /* OS reserved IRQ details */ 542 struct msix_entry *msix_entries; 543 struct ice_res_tracker *irq_tracker; 544 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 545 * number of MSIX vectors needed for all SR-IOV VFs from the number of 546 * MSIX vectors allowed on this PF. 547 */ 548 u16 sriov_base_vector; 549 550 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 551 552 struct ice_vsi **vsi; /* VSIs created by the driver */ 553 struct ice_vsi_stats **vsi_stats; 554 struct ice_sw *first_sw; /* first switch created by firmware */ 555 u16 eswitch_mode; /* current mode of eswitch */ 556 struct ice_vfs vfs; 557 DECLARE_BITMAP(features, ICE_F_MAX); 558 DECLARE_BITMAP(state, ICE_STATE_NBITS); 559 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 560 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 561 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 562 unsigned long serv_tmr_period; 563 unsigned long serv_tmr_prev; 564 struct timer_list serv_tmr; 565 struct work_struct serv_task; 566 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 567 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 568 struct mutex tc_mutex; /* lock to protect TC changes */ 569 struct mutex adev_mutex; /* lock to protect aux device access */ 570 u32 msg_enable; 571 struct ice_ptp ptp; 572 struct gnss_serial *gnss_serial; 573 struct gnss_device *gnss_dev; 574 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 575 u16 rdma_base_vector; 576 577 /* spinlock to protect the AdminQ wait list */ 578 spinlock_t aq_wait_lock; 579 struct hlist_head aq_wait_list; 580 wait_queue_head_t aq_wait_queue; 581 bool fw_emp_reset_disabled; 582 583 wait_queue_head_t reset_wait_queue; 584 585 u32 hw_csum_rx_error; 586 u32 oicr_err_reg; 587 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 588 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 589 u16 max_pf_txqs; /* Total Tx queues PF wide */ 590 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 591 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 592 u16 num_lan_tx; /* num LAN Tx queues setup */ 593 u16 num_lan_rx; /* num LAN Rx queues setup */ 594 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 595 u16 num_alloc_vsi; 596 u16 corer_count; /* Core reset count */ 597 u16 globr_count; /* Global reset count */ 598 u16 empr_count; /* EMP reset count */ 599 u16 pfr_count; /* PF reset count */ 600 601 u8 wol_ena : 1; /* software state of WoL */ 602 u32 wakeup_reason; /* last wakeup reason */ 603 struct ice_hw_port_stats stats; 604 struct ice_hw_port_stats stats_prev; 605 struct ice_hw hw; 606 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 607 u8 rdma_mode; 608 u16 dcbx_cap; 609 u32 tx_timeout_count; 610 unsigned long tx_timeout_last_recovery; 611 u32 tx_timeout_recovery_level; 612 char int_name[ICE_INT_NAME_STR_LEN]; 613 struct auxiliary_device *adev; 614 int aux_idx; 615 u32 sw_int_count; 616 /* count of tc_flower filters specific to channel (aka where filter 617 * action is "hw_tc <tc_num>") 618 */ 619 u16 num_dmac_chnl_fltrs; 620 struct hlist_head tc_flower_fltr_list; 621 622 u64 supported_rxdids; 623 624 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 625 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 626 struct ice_link_default_override_tlv link_dflt_override; 627 struct ice_lag *lag; /* Link Aggregation information */ 628 629 struct ice_switchdev_info switchdev; 630 631 #define ICE_INVALID_AGG_NODE_ID 0 632 #define ICE_PF_AGG_NODE_ID_START 1 633 #define ICE_MAX_PF_AGG_NODES 32 634 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 635 #define ICE_VF_AGG_NODE_ID_START 65 636 #define ICE_MAX_VF_AGG_NODES 32 637 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 638 }; 639 640 struct ice_netdev_priv { 641 struct ice_vsi *vsi; 642 struct ice_repr *repr; 643 /* indirect block callbacks on registered higher level devices 644 * (e.g. tunnel devices) 645 * 646 * tc_indr_block_cb_priv_list is used to look up indirect callback 647 * private data 648 */ 649 struct list_head tc_indr_block_priv_list; 650 }; 651 652 /** 653 * ice_vector_ch_enabled 654 * @qv: pointer to q_vector, can be NULL 655 * 656 * This function returns true if vector is channel enabled otherwise false 657 */ 658 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 659 { 660 return !!qv->ch; /* Enable it to run with TC */ 661 } 662 663 /** 664 * ice_irq_dynamic_ena - Enable default interrupt generation settings 665 * @hw: pointer to HW struct 666 * @vsi: pointer to VSI struct, can be NULL 667 * @q_vector: pointer to q_vector, can be NULL 668 */ 669 static inline void 670 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 671 struct ice_q_vector *q_vector) 672 { 673 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 674 ((struct ice_pf *)hw->back)->oicr_idx; 675 int itr = ICE_ITR_NONE; 676 u32 val; 677 678 /* clear the PBA here, as this function is meant to clean out all 679 * previous interrupts and enable the interrupt 680 */ 681 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 682 (itr << GLINT_DYN_CTL_ITR_INDX_S); 683 if (vsi) 684 if (test_bit(ICE_VSI_DOWN, vsi->state)) 685 return; 686 wr32(hw, GLINT_DYN_CTL(vector), val); 687 } 688 689 /** 690 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 691 * @netdev: pointer to the netdev struct 692 */ 693 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 694 { 695 struct ice_netdev_priv *np = netdev_priv(netdev); 696 697 return np->vsi->back; 698 } 699 700 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 701 { 702 return !!READ_ONCE(vsi->xdp_prog); 703 } 704 705 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 706 { 707 ring->flags |= ICE_TX_FLAGS_RING_XDP; 708 } 709 710 /** 711 * ice_xsk_pool - get XSK buffer pool bound to a ring 712 * @ring: Rx ring to use 713 * 714 * Returns a pointer to xsk_buff_pool structure if there is a buffer pool 715 * present, NULL otherwise. 716 */ 717 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 718 { 719 struct ice_vsi *vsi = ring->vsi; 720 u16 qid = ring->q_index; 721 722 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 723 return NULL; 724 725 return xsk_get_pool_from_qid(vsi->netdev, qid); 726 } 727 728 /** 729 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 730 * @vsi: pointer to VSI 731 * @qid: index of a queue to look at XSK buff pool presence 732 * 733 * Sets XSK buff pool pointer on XDP ring. 734 * 735 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 736 * queue id. Reason for doing so is that queue vectors might have assigned more 737 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 738 * carries a pointer to one of these XDP rings for its own purposes, such as 739 * handling XDP_TX action, therefore we can piggyback here on the 740 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 741 */ 742 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 743 { 744 struct ice_tx_ring *ring; 745 746 ring = vsi->rx_rings[qid]->xdp_ring; 747 if (!ring) 748 return; 749 750 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) { 751 ring->xsk_pool = NULL; 752 return; 753 } 754 755 ring->xsk_pool = xsk_get_pool_from_qid(vsi->netdev, qid); 756 } 757 758 /** 759 * ice_get_main_vsi - Get the PF VSI 760 * @pf: PF instance 761 * 762 * returns pf->vsi[0], which by definition is the PF VSI 763 */ 764 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 765 { 766 if (pf->vsi) 767 return pf->vsi[0]; 768 769 return NULL; 770 } 771 772 /** 773 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 774 * @np: private netdev structure 775 */ 776 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 777 { 778 /* In case of port representor return source port VSI. */ 779 if (np->repr) 780 return np->repr->src_vsi; 781 else 782 return np->vsi; 783 } 784 785 /** 786 * ice_get_ctrl_vsi - Get the control VSI 787 * @pf: PF instance 788 */ 789 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 790 { 791 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 792 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 793 return NULL; 794 795 return pf->vsi[pf->ctrl_vsi_idx]; 796 } 797 798 /** 799 * ice_find_vsi - Find the VSI from VSI ID 800 * @pf: The PF pointer to search in 801 * @vsi_num: The VSI ID to search for 802 */ 803 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 804 { 805 int i; 806 807 ice_for_each_vsi(pf, i) 808 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 809 return pf->vsi[i]; 810 return NULL; 811 } 812 813 /** 814 * ice_is_switchdev_running - check if switchdev is configured 815 * @pf: pointer to PF structure 816 * 817 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 818 * and switchdev is configured, false otherwise. 819 */ 820 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 821 { 822 return pf->switchdev.is_running; 823 } 824 825 /** 826 * ice_set_sriov_cap - enable SRIOV in PF flags 827 * @pf: PF struct 828 */ 829 static inline void ice_set_sriov_cap(struct ice_pf *pf) 830 { 831 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 832 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 833 } 834 835 /** 836 * ice_clear_sriov_cap - disable SRIOV in PF flags 837 * @pf: PF struct 838 */ 839 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 840 { 841 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 842 } 843 844 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 845 #define ICE_FD_STAT_PF_IDX(base_idx) \ 846 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 847 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 848 #define ICE_FD_STAT_CH 1 849 #define ICE_FD_CH_STAT_IDX(base_idx) \ 850 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 851 852 /** 853 * ice_is_adq_active - any active ADQs 854 * @pf: pointer to PF 855 * 856 * This function returns true if there are any ADQs configured (which is 857 * determined by looking at VSI type (which should be VSI_PF), numtc, and 858 * TC_MQPRIO flag) otherwise return false 859 */ 860 static inline bool ice_is_adq_active(struct ice_pf *pf) 861 { 862 struct ice_vsi *vsi; 863 864 vsi = ice_get_main_vsi(pf); 865 if (!vsi) 866 return false; 867 868 /* is ADQ configured */ 869 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 870 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 871 return true; 872 873 return false; 874 } 875 876 bool netif_is_ice(struct net_device *dev); 877 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 878 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 879 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 880 int ice_vsi_open(struct ice_vsi *vsi); 881 void ice_set_ethtool_ops(struct net_device *netdev); 882 void ice_set_ethtool_repr_ops(struct net_device *netdev); 883 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 884 u16 ice_get_avail_txq_count(struct ice_pf *pf); 885 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 886 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 887 void ice_update_vsi_stats(struct ice_vsi *vsi); 888 void ice_update_pf_stats(struct ice_pf *pf); 889 void 890 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 891 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 892 int ice_up(struct ice_vsi *vsi); 893 int ice_down(struct ice_vsi *vsi); 894 int ice_down_up(struct ice_vsi *vsi); 895 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 896 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 897 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 898 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 899 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 900 int 901 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 902 u32 flags); 903 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 904 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 905 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 906 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 907 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 908 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 909 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 910 int ice_plug_aux_dev(struct ice_pf *pf); 911 void ice_unplug_aux_dev(struct ice_pf *pf); 912 int ice_init_rdma(struct ice_pf *pf); 913 void ice_deinit_rdma(struct ice_pf *pf); 914 const char *ice_aq_str(enum ice_aq_err aq_err); 915 bool ice_is_wol_supported(struct ice_hw *hw); 916 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 917 int 918 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 919 bool is_tun); 920 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 921 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 922 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 923 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 924 int 925 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 926 u32 *rule_locs); 927 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 928 void ice_fdir_release_flows(struct ice_hw *hw); 929 void ice_fdir_replay_flows(struct ice_hw *hw); 930 void ice_fdir_replay_fltrs(struct ice_pf *pf); 931 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 932 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 933 struct ice_rq_event_info *event); 934 int ice_open(struct net_device *netdev); 935 int ice_open_internal(struct net_device *netdev); 936 int ice_stop(struct net_device *netdev); 937 void ice_service_task_schedule(struct ice_pf *pf); 938 int ice_load(struct ice_pf *pf); 939 void ice_unload(struct ice_pf *pf); 940 941 /** 942 * ice_set_rdma_cap - enable RDMA support 943 * @pf: PF struct 944 */ 945 static inline void ice_set_rdma_cap(struct ice_pf *pf) 946 { 947 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 948 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 949 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 950 } 951 } 952 953 /** 954 * ice_clear_rdma_cap - disable RDMA support 955 * @pf: PF struct 956 */ 957 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 958 { 959 /* defer unplug to service task to avoid RTNL lock and 960 * clear PLUG bit so that pending plugs don't interfere 961 */ 962 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 963 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags); 964 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 965 } 966 #endif /* _ICE_H_ */ 967