1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/compiler.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/cpumask.h> 16 #include <linux/rtnetlink.h> 17 #include <linux/if_vlan.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/pci.h> 20 #include <linux/workqueue.h> 21 #include <linux/aer.h> 22 #include <linux/interrupt.h> 23 #include <linux/ethtool.h> 24 #include <linux/timer.h> 25 #include <linux/delay.h> 26 #include <linux/bitmap.h> 27 #include <linux/log2.h> 28 #include <linux/ip.h> 29 #include <linux/sctp.h> 30 #include <linux/ipv6.h> 31 #include <linux/if_bridge.h> 32 #include <linux/avf/virtchnl.h> 33 #include <net/ipv6.h> 34 #include "ice_devids.h" 35 #include "ice_type.h" 36 #include "ice_txrx.h" 37 #include "ice_dcb.h" 38 #include "ice_switch.h" 39 #include "ice_common.h" 40 #include "ice_sched.h" 41 #include "ice_virtchnl_pf.h" 42 #include "ice_sriov.h" 43 44 extern const char ice_drv_ver[]; 45 #define ICE_BAR0 0 46 #define ICE_REQ_DESC_MULTIPLE 32 47 #define ICE_MIN_NUM_DESC 64 48 #define ICE_MAX_NUM_DESC 8160 49 #define ICE_DFLT_MIN_RX_DESC 512 50 #define ICE_DFLT_NUM_TX_DESC 256 51 #define ICE_DFLT_NUM_RX_DESC 2048 52 53 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 54 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 55 #define ICE_ETHTOOL_FWVER_LEN 32 56 #define ICE_AQ_LEN 64 57 #define ICE_MBXSQ_LEN 64 58 #define ICE_MBXRQ_LEN 512 59 #define ICE_MIN_MSIX 2 60 #define ICE_NO_VSI 0xffff 61 #define ICE_VSI_MAP_CONTIG 0 62 #define ICE_VSI_MAP_SCATTER 1 63 #define ICE_MAX_SCATTER_TXQS 16 64 #define ICE_MAX_SCATTER_RXQS 16 65 #define ICE_Q_WAIT_RETRY_LIMIT 10 66 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 67 #define ICE_MAX_LG_RSS_QS 256 68 #define ICE_MAX_SMALL_RSS_QS 8 69 #define ICE_RES_VALID_BIT 0x8000 70 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 71 #define ICE_INVAL_Q_INDEX 0xffff 72 #define ICE_INVAL_VFID 256 73 74 #define ICE_MAX_RESET_WAIT 20 75 76 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 77 78 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 79 80 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ 81 (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) 82 83 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 84 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 85 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 86 87 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 88 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 89 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 90 91 /* Macro for each VSI in a PF */ 92 #define ice_for_each_vsi(pf, i) \ 93 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 94 95 /* Macros for each Tx/Rx ring in a VSI */ 96 #define ice_for_each_txq(vsi, i) \ 97 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 98 99 #define ice_for_each_rxq(vsi, i) \ 100 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 101 102 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 103 #define ice_for_each_alloc_txq(vsi, i) \ 104 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 105 106 #define ice_for_each_alloc_rxq(vsi, i) \ 107 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 108 109 #define ice_for_each_q_vector(vsi, i) \ 110 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 111 112 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 113 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 114 115 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 116 ICE_PROMISC_MCAST_TX | \ 117 ICE_PROMISC_UCAST_RX | \ 118 ICE_PROMISC_MCAST_RX | \ 119 ICE_PROMISC_VLAN_TX | \ 120 ICE_PROMISC_VLAN_RX) 121 122 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 123 124 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 125 ICE_PROMISC_MCAST_RX | \ 126 ICE_PROMISC_VLAN_TX | \ 127 ICE_PROMISC_VLAN_RX) 128 129 struct ice_tc_info { 130 u16 qoffset; 131 u16 qcount_tx; 132 u16 qcount_rx; 133 u8 netdev_tc; 134 }; 135 136 struct ice_tc_cfg { 137 u8 numtc; /* Total number of enabled TCs */ 138 u8 ena_tc; /* Tx map */ 139 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 140 }; 141 142 struct ice_res_tracker { 143 u16 num_entries; 144 u16 end; 145 u16 list[1]; 146 }; 147 148 struct ice_qs_cfg { 149 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 150 unsigned long *pf_map; 151 unsigned long pf_map_size; 152 unsigned int q_count; 153 unsigned int scatter_count; 154 u16 *vsi_map; 155 u16 vsi_map_offset; 156 u8 mapping_mode; 157 }; 158 159 struct ice_sw { 160 struct ice_pf *pf; 161 u16 sw_id; /* switch ID for this switch */ 162 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 163 }; 164 165 enum ice_state { 166 __ICE_TESTING, 167 __ICE_DOWN, 168 __ICE_NEEDS_RESTART, 169 __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 170 __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 171 __ICE_PFR_REQ, /* set by driver and peers */ 172 __ICE_CORER_REQ, /* set by driver and peers */ 173 __ICE_GLOBR_REQ, /* set by driver and peers */ 174 __ICE_CORER_RECV, /* set by OICR handler */ 175 __ICE_GLOBR_RECV, /* set by OICR handler */ 176 __ICE_EMPR_RECV, /* set by OICR handler */ 177 __ICE_SUSPENDED, /* set on module remove path */ 178 __ICE_RESET_FAILED, /* set by reset/rebuild */ 179 /* When checking for the PF to be in a nominal operating state, the 180 * bits that are grouped at the beginning of the list need to be 181 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 182 * be checked. If you need to add a bit into consideration for nominal 183 * operating state, it must be added before 184 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 185 * without appropriate consideration. 186 */ 187 __ICE_STATE_NOMINAL_CHECK_BITS, 188 __ICE_ADMINQ_EVENT_PENDING, 189 __ICE_MAILBOXQ_EVENT_PENDING, 190 __ICE_MDD_EVENT_PENDING, 191 __ICE_VFLR_EVENT_PENDING, 192 __ICE_FLTR_OVERFLOW_PROMISC, 193 __ICE_VF_DIS, 194 __ICE_CFG_BUSY, 195 __ICE_SERVICE_SCHED, 196 __ICE_SERVICE_DIS, 197 __ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 198 __ICE_STATE_NBITS /* must be last */ 199 }; 200 201 enum ice_vsi_flags { 202 ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 203 ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 204 ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 205 ICE_VSI_FLAG_PROMISC_CHANGED, 206 ICE_VSI_FLAG_NBITS /* must be last */ 207 }; 208 209 /* struct that defines a VSI, associated with a dev */ 210 struct ice_vsi { 211 struct net_device *netdev; 212 struct ice_sw *vsw; /* switch this VSI is on */ 213 struct ice_pf *back; /* back pointer to PF */ 214 struct ice_port_info *port_info; /* back pointer to port_info */ 215 struct ice_ring **rx_rings; /* Rx ring array */ 216 struct ice_ring **tx_rings; /* Tx ring array */ 217 struct ice_q_vector **q_vectors; /* q_vector array */ 218 219 irqreturn_t (*irq_handler)(int irq, void *data); 220 221 u64 tx_linearize; 222 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 223 DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 224 unsigned int current_netdev_flags; 225 u32 tx_restart; 226 u32 tx_busy; 227 u32 rx_buf_failed; 228 u32 rx_page_failed; 229 int num_q_vectors; 230 int base_vector; /* IRQ base for OS reserved vectors */ 231 enum ice_vsi_type type; 232 u16 vsi_num; /* HW (absolute) index of this VSI */ 233 u16 idx; /* software index in pf->vsi[] */ 234 235 s16 vf_id; /* VF ID for SR-IOV VSIs */ 236 237 u16 ethtype; /* Ethernet protocol for pause frame */ 238 239 /* RSS config */ 240 u16 rss_table_size; /* HW RSS table size */ 241 u16 rss_size; /* Allocated RSS queues */ 242 u8 *rss_hkey_user; /* User configured hash keys */ 243 u8 *rss_lut_user; /* User configured lookup table entries */ 244 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 245 246 u16 max_frame; 247 u16 rx_buf_len; 248 249 struct ice_aqc_vsi_props info; /* VSI properties */ 250 251 /* VSI stats */ 252 struct rtnl_link_stats64 net_stats; 253 struct ice_eth_stats eth_stats; 254 struct ice_eth_stats eth_stats_prev; 255 256 struct list_head tmp_sync_list; /* MAC filters to be synced */ 257 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 258 259 u8 irqs_ready:1; 260 u8 current_isup:1; /* Sync 'link up' logging */ 261 u8 stat_offsets_loaded:1; 262 u8 vlan_ena:1; 263 264 /* queue information */ 265 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 266 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 267 u16 *txq_map; /* index in pf->avail_txqs */ 268 u16 *rxq_map; /* index in pf->avail_rxqs */ 269 u16 alloc_txq; /* Allocated Tx queues */ 270 u16 num_txq; /* Used Tx queues */ 271 u16 alloc_rxq; /* Allocated Rx queues */ 272 u16 num_rxq; /* Used Rx queues */ 273 u16 num_rx_desc; 274 u16 num_tx_desc; 275 struct ice_tc_cfg tc_cfg; 276 } ____cacheline_internodealigned_in_smp; 277 278 /* struct that defines an interrupt vector */ 279 struct ice_q_vector { 280 struct ice_vsi *vsi; 281 282 u16 v_idx; /* index in the vsi->q_vector array. */ 283 u16 reg_idx; 284 u8 num_ring_rx; /* total number of Rx rings in vector */ 285 u8 num_ring_tx; /* total number of Tx rings in vector */ 286 u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 287 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 288 * value to the device 289 */ 290 u8 intrl; 291 292 struct napi_struct napi; 293 294 struct ice_ring_container rx; 295 struct ice_ring_container tx; 296 297 cpumask_t affinity_mask; 298 struct irq_affinity_notify affinity_notify; 299 300 char name[ICE_INT_NAME_STR_LEN]; 301 } ____cacheline_internodealigned_in_smp; 302 303 enum ice_pf_flags { 304 ICE_FLAG_FLTR_SYNC, 305 ICE_FLAG_RSS_ENA, 306 ICE_FLAG_SRIOV_ENA, 307 ICE_FLAG_SRIOV_CAPABLE, 308 ICE_FLAG_DCB_CAPABLE, 309 ICE_FLAG_DCB_ENA, 310 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 311 ICE_FLAG_NO_MEDIA, 312 ICE_FLAG_FW_LLDP_AGENT, 313 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 314 ICE_PF_FLAGS_NBITS /* must be last */ 315 }; 316 317 struct ice_pf { 318 struct pci_dev *pdev; 319 320 /* OS reserved IRQ details */ 321 struct msix_entry *msix_entries; 322 struct ice_res_tracker *irq_tracker; 323 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 324 * number of MSIX vectors needed for all SR-IOV VFs from the number of 325 * MSIX vectors allowed on this PF. 326 */ 327 u16 sriov_base_vector; 328 329 struct ice_vsi **vsi; /* VSIs created by the driver */ 330 struct ice_sw *first_sw; /* first switch created by firmware */ 331 /* Virtchnl/SR-IOV config info */ 332 struct ice_vf *vf; 333 int num_alloc_vfs; /* actual number of VFs allocated */ 334 u16 num_vfs_supported; /* num VFs supported for this PF */ 335 u16 num_vf_qps; /* num queue pairs per VF */ 336 u16 num_vf_msix; /* num vectors per VF */ 337 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 338 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 339 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 340 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 341 unsigned long serv_tmr_period; 342 unsigned long serv_tmr_prev; 343 struct timer_list serv_tmr; 344 struct work_struct serv_task; 345 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 346 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 347 u32 msg_enable; 348 u32 hw_csum_rx_error; 349 u32 oicr_idx; /* Other interrupt cause MSIX vector index */ 350 u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 351 u16 max_pf_txqs; /* Total Tx queues PF wide */ 352 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 353 u32 num_lan_msix; /* Total MSIX vectors for base driver */ 354 u16 num_lan_tx; /* num LAN Tx queues setup */ 355 u16 num_lan_rx; /* num LAN Rx queues setup */ 356 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 357 u16 num_alloc_vsi; 358 u16 corer_count; /* Core reset count */ 359 u16 globr_count; /* Global reset count */ 360 u16 empr_count; /* EMP reset count */ 361 u16 pfr_count; /* PF reset count */ 362 363 struct ice_hw_port_stats stats; 364 struct ice_hw_port_stats stats_prev; 365 struct ice_hw hw; 366 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 367 #ifdef CONFIG_DCB 368 u16 dcbx_cap; 369 #endif /* CONFIG_DCB */ 370 u32 tx_timeout_count; 371 unsigned long tx_timeout_last_recovery; 372 u32 tx_timeout_recovery_level; 373 char int_name[ICE_INT_NAME_STR_LEN]; 374 u32 sw_int_count; 375 }; 376 377 struct ice_netdev_priv { 378 struct ice_vsi *vsi; 379 }; 380 381 /** 382 * ice_irq_dynamic_ena - Enable default interrupt generation settings 383 * @hw: pointer to HW struct 384 * @vsi: pointer to VSI struct, can be NULL 385 * @q_vector: pointer to q_vector, can be NULL 386 */ 387 static inline void 388 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 389 struct ice_q_vector *q_vector) 390 { 391 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 392 ((struct ice_pf *)hw->back)->oicr_idx; 393 int itr = ICE_ITR_NONE; 394 u32 val; 395 396 /* clear the PBA here, as this function is meant to clean out all 397 * previous interrupts and enable the interrupt 398 */ 399 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 400 (itr << GLINT_DYN_CTL_ITR_INDX_S); 401 if (vsi) 402 if (test_bit(__ICE_DOWN, vsi->state)) 403 return; 404 wr32(hw, GLINT_DYN_CTL(vector), val); 405 } 406 407 /** 408 * ice_get_main_vsi - Get the PF VSI 409 * @pf: PF instance 410 * 411 * returns pf->vsi[0], which by definition is the PF VSI 412 */ 413 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 414 { 415 if (pf->vsi) 416 return pf->vsi[0]; 417 418 return NULL; 419 } 420 421 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 422 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 423 void ice_set_ethtool_ops(struct net_device *netdev); 424 u16 ice_get_avail_txq_count(struct ice_pf *pf); 425 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 426 void ice_update_vsi_stats(struct ice_vsi *vsi); 427 void ice_update_pf_stats(struct ice_pf *pf); 428 int ice_up(struct ice_vsi *vsi); 429 int ice_down(struct ice_vsi *vsi); 430 int ice_vsi_cfg(struct ice_vsi *vsi); 431 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 432 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 433 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 434 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 435 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 436 #ifdef CONFIG_DCB 437 int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked); 438 void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked); 439 #endif /* CONFIG_DCB */ 440 int ice_open(struct net_device *netdev); 441 int ice_stop(struct net_device *netdev); 442 443 #endif /* _ICE_H_ */ 444