1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/compiler.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/cpumask.h> 16 #include <linux/rtnetlink.h> 17 #include <linux/if_vlan.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/pci.h> 20 #include <linux/workqueue.h> 21 #include <linux/aer.h> 22 #include <linux/interrupt.h> 23 #include <linux/ethtool.h> 24 #include <linux/timer.h> 25 #include <linux/delay.h> 26 #include <linux/bitmap.h> 27 #include <linux/log2.h> 28 #include <linux/ip.h> 29 #include <linux/sctp.h> 30 #include <linux/ipv6.h> 31 #include <linux/if_bridge.h> 32 #include <linux/avf/virtchnl.h> 33 #include <net/ipv6.h> 34 #include "ice_devids.h" 35 #include "ice_type.h" 36 #include "ice_txrx.h" 37 #include "ice_dcb.h" 38 #include "ice_switch.h" 39 #include "ice_common.h" 40 #include "ice_sched.h" 41 #include "ice_virtchnl_pf.h" 42 #include "ice_sriov.h" 43 44 extern const char ice_drv_ver[]; 45 #define ICE_BAR0 0 46 #define ICE_REQ_DESC_MULTIPLE 32 47 #define ICE_MIN_NUM_DESC 64 48 #define ICE_MAX_NUM_DESC 8160 49 #define ICE_DFLT_MIN_RX_DESC 512 50 /* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the 51 * number of descriptors to fill up an entire page is greater than or equal to 52 * ICE_DFLT_MIN_RX_DESC set it based on page size, otherwise set it to 53 * ICE_DFLT_MIN_RX_DESC 54 */ 55 #define ICE_DFLT_NUM_RX_DESC \ 56 min_t(u16, ICE_MAX_NUM_DESC, \ 57 max_t(u16, ALIGN(PAGE_SIZE / sizeof(union ice_32byte_rx_desc), \ 58 ICE_REQ_DESC_MULTIPLE), \ 59 ICE_DFLT_MIN_RX_DESC)) 60 /* set default number of Tx descriptors to the minimum between ICE_MAX_NUM_DESC 61 * and the number of descriptors to fill up an entire page 62 */ 63 #define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ 64 ALIGN(PAGE_SIZE / \ 65 sizeof(struct ice_tx_desc), \ 66 ICE_REQ_DESC_MULTIPLE)) 67 68 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 69 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 70 #define ICE_ETHTOOL_FWVER_LEN 32 71 #define ICE_AQ_LEN 64 72 #define ICE_MBXSQ_LEN 64 73 #define ICE_MBXRQ_LEN 512 74 #define ICE_MIN_MSIX 2 75 #define ICE_NO_VSI 0xffff 76 #define ICE_VSI_MAP_CONTIG 0 77 #define ICE_VSI_MAP_SCATTER 1 78 #define ICE_MAX_SCATTER_TXQS 16 79 #define ICE_MAX_SCATTER_RXQS 16 80 #define ICE_Q_WAIT_RETRY_LIMIT 10 81 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 82 #define ICE_MAX_LG_RSS_QS 256 83 #define ICE_MAX_SMALL_RSS_QS 8 84 #define ICE_RES_VALID_BIT 0x8000 85 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 86 #define ICE_INVAL_Q_INDEX 0xffff 87 #define ICE_INVAL_VFID 256 88 89 #define ICE_MAX_RESET_WAIT 20 90 91 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 92 93 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 94 95 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ 96 (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) 97 98 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 99 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 100 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 101 102 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 103 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 104 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 105 106 /* Macro for each VSI in a PF */ 107 #define ice_for_each_vsi(pf, i) \ 108 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 109 110 /* Macros for each Tx/Rx ring in a VSI */ 111 #define ice_for_each_txq(vsi, i) \ 112 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 113 114 #define ice_for_each_rxq(vsi, i) \ 115 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 116 117 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 118 #define ice_for_each_alloc_txq(vsi, i) \ 119 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 120 121 #define ice_for_each_alloc_rxq(vsi, i) \ 122 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 123 124 #define ice_for_each_q_vector(vsi, i) \ 125 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 126 127 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 128 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 129 130 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 131 ICE_PROMISC_MCAST_TX | \ 132 ICE_PROMISC_UCAST_RX | \ 133 ICE_PROMISC_MCAST_RX | \ 134 ICE_PROMISC_VLAN_TX | \ 135 ICE_PROMISC_VLAN_RX) 136 137 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 138 139 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 140 ICE_PROMISC_MCAST_RX | \ 141 ICE_PROMISC_VLAN_TX | \ 142 ICE_PROMISC_VLAN_RX) 143 144 struct ice_tc_info { 145 u16 qoffset; 146 u16 qcount_tx; 147 u16 qcount_rx; 148 u8 netdev_tc; 149 }; 150 151 struct ice_tc_cfg { 152 u8 numtc; /* Total number of enabled TCs */ 153 u8 ena_tc; /* Tx map */ 154 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 155 }; 156 157 struct ice_res_tracker { 158 u16 num_entries; 159 u16 end; 160 u16 list[1]; 161 }; 162 163 struct ice_qs_cfg { 164 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 165 unsigned long *pf_map; 166 unsigned long pf_map_size; 167 unsigned int q_count; 168 unsigned int scatter_count; 169 u16 *vsi_map; 170 u16 vsi_map_offset; 171 u8 mapping_mode; 172 }; 173 174 struct ice_sw { 175 struct ice_pf *pf; 176 u16 sw_id; /* switch ID for this switch */ 177 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 178 }; 179 180 enum ice_state { 181 __ICE_TESTING, 182 __ICE_DOWN, 183 __ICE_NEEDS_RESTART, 184 __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 185 __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 186 __ICE_PFR_REQ, /* set by driver and peers */ 187 __ICE_CORER_REQ, /* set by driver and peers */ 188 __ICE_GLOBR_REQ, /* set by driver and peers */ 189 __ICE_CORER_RECV, /* set by OICR handler */ 190 __ICE_GLOBR_RECV, /* set by OICR handler */ 191 __ICE_EMPR_RECV, /* set by OICR handler */ 192 __ICE_SUSPENDED, /* set on module remove path */ 193 __ICE_RESET_FAILED, /* set by reset/rebuild */ 194 /* When checking for the PF to be in a nominal operating state, the 195 * bits that are grouped at the beginning of the list need to be 196 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 197 * be checked. If you need to add a bit into consideration for nominal 198 * operating state, it must be added before 199 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 200 * without appropriate consideration. 201 */ 202 __ICE_STATE_NOMINAL_CHECK_BITS, 203 __ICE_ADMINQ_EVENT_PENDING, 204 __ICE_MAILBOXQ_EVENT_PENDING, 205 __ICE_MDD_EVENT_PENDING, 206 __ICE_VFLR_EVENT_PENDING, 207 __ICE_FLTR_OVERFLOW_PROMISC, 208 __ICE_VF_DIS, 209 __ICE_CFG_BUSY, 210 __ICE_SERVICE_SCHED, 211 __ICE_SERVICE_DIS, 212 __ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 213 __ICE_STATE_NBITS /* must be last */ 214 }; 215 216 enum ice_vsi_flags { 217 ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 218 ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 219 ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 220 ICE_VSI_FLAG_PROMISC_CHANGED, 221 ICE_VSI_FLAG_NBITS /* must be last */ 222 }; 223 224 /* struct that defines a VSI, associated with a dev */ 225 struct ice_vsi { 226 struct net_device *netdev; 227 struct ice_sw *vsw; /* switch this VSI is on */ 228 struct ice_pf *back; /* back pointer to PF */ 229 struct ice_port_info *port_info; /* back pointer to port_info */ 230 struct ice_ring **rx_rings; /* Rx ring array */ 231 struct ice_ring **tx_rings; /* Tx ring array */ 232 struct ice_q_vector **q_vectors; /* q_vector array */ 233 234 irqreturn_t (*irq_handler)(int irq, void *data); 235 236 u64 tx_linearize; 237 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 238 DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 239 unsigned int current_netdev_flags; 240 u32 tx_restart; 241 u32 tx_busy; 242 u32 rx_buf_failed; 243 u32 rx_page_failed; 244 int num_q_vectors; 245 int base_vector; /* IRQ base for OS reserved vectors */ 246 enum ice_vsi_type type; 247 u16 vsi_num; /* HW (absolute) index of this VSI */ 248 u16 idx; /* software index in pf->vsi[] */ 249 250 /* Interrupt thresholds */ 251 u16 work_lmt; 252 253 s16 vf_id; /* VF ID for SR-IOV VSIs */ 254 255 u16 ethtype; /* Ethernet protocol for pause frame */ 256 257 /* RSS config */ 258 u16 rss_table_size; /* HW RSS table size */ 259 u16 rss_size; /* Allocated RSS queues */ 260 u8 *rss_hkey_user; /* User configured hash keys */ 261 u8 *rss_lut_user; /* User configured lookup table entries */ 262 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 263 264 u16 max_frame; 265 u16 rx_buf_len; 266 267 struct ice_aqc_vsi_props info; /* VSI properties */ 268 269 /* VSI stats */ 270 struct rtnl_link_stats64 net_stats; 271 struct ice_eth_stats eth_stats; 272 struct ice_eth_stats eth_stats_prev; 273 274 struct list_head tmp_sync_list; /* MAC filters to be synced */ 275 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 276 277 u8 irqs_ready:1; 278 u8 current_isup:1; /* Sync 'link up' logging */ 279 u8 stat_offsets_loaded:1; 280 u8 vlan_ena:1; 281 282 /* queue information */ 283 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 284 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 285 u16 *txq_map; /* index in pf->avail_txqs */ 286 u16 *rxq_map; /* index in pf->avail_rxqs */ 287 u16 alloc_txq; /* Allocated Tx queues */ 288 u16 num_txq; /* Used Tx queues */ 289 u16 alloc_rxq; /* Allocated Rx queues */ 290 u16 num_rxq; /* Used Rx queues */ 291 u16 num_rx_desc; 292 u16 num_tx_desc; 293 struct ice_tc_cfg tc_cfg; 294 } ____cacheline_internodealigned_in_smp; 295 296 /* struct that defines an interrupt vector */ 297 struct ice_q_vector { 298 struct ice_vsi *vsi; 299 300 u16 v_idx; /* index in the vsi->q_vector array. */ 301 u16 reg_idx; 302 u8 num_ring_rx; /* total number of Rx rings in vector */ 303 u8 num_ring_tx; /* total number of Tx rings in vector */ 304 u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 305 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 306 * value to the device 307 */ 308 u8 intrl; 309 310 struct napi_struct napi; 311 312 struct ice_ring_container rx; 313 struct ice_ring_container tx; 314 315 cpumask_t affinity_mask; 316 struct irq_affinity_notify affinity_notify; 317 318 char name[ICE_INT_NAME_STR_LEN]; 319 } ____cacheline_internodealigned_in_smp; 320 321 enum ice_pf_flags { 322 ICE_FLAG_FLTR_SYNC, 323 ICE_FLAG_RSS_ENA, 324 ICE_FLAG_SRIOV_ENA, 325 ICE_FLAG_SRIOV_CAPABLE, 326 ICE_FLAG_DCB_CAPABLE, 327 ICE_FLAG_DCB_ENA, 328 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 329 ICE_FLAG_NO_MEDIA, 330 ICE_FLAG_FW_LLDP_AGENT, 331 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 332 ICE_PF_FLAGS_NBITS /* must be last */ 333 }; 334 335 struct ice_pf { 336 struct pci_dev *pdev; 337 338 /* OS reserved IRQ details */ 339 struct msix_entry *msix_entries; 340 struct ice_res_tracker *irq_tracker; 341 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 342 * number of MSIX vectors needed for all SR-IOV VFs from the number of 343 * MSIX vectors allowed on this PF. 344 */ 345 u16 sriov_base_vector; 346 347 struct ice_vsi **vsi; /* VSIs created by the driver */ 348 struct ice_sw *first_sw; /* first switch created by firmware */ 349 /* Virtchnl/SR-IOV config info */ 350 struct ice_vf *vf; 351 int num_alloc_vfs; /* actual number of VFs allocated */ 352 u16 num_vfs_supported; /* num VFs supported for this PF */ 353 u16 num_vf_qps; /* num queue pairs per VF */ 354 u16 num_vf_msix; /* num vectors per VF */ 355 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 356 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 357 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 358 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 359 unsigned long serv_tmr_period; 360 unsigned long serv_tmr_prev; 361 struct timer_list serv_tmr; 362 struct work_struct serv_task; 363 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 364 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 365 u32 msg_enable; 366 u32 hw_csum_rx_error; 367 u32 oicr_idx; /* Other interrupt cause MSIX vector index */ 368 u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 369 u16 max_pf_txqs; /* Total Tx queues PF wide */ 370 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 371 u32 num_lan_msix; /* Total MSIX vectors for base driver */ 372 u16 num_lan_tx; /* num LAN Tx queues setup */ 373 u16 num_lan_rx; /* num LAN Rx queues setup */ 374 u16 q_left_tx; /* remaining num Tx queues left unclaimed */ 375 u16 q_left_rx; /* remaining num Rx queues left unclaimed */ 376 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 377 u16 num_alloc_vsi; 378 u16 corer_count; /* Core reset count */ 379 u16 globr_count; /* Global reset count */ 380 u16 empr_count; /* EMP reset count */ 381 u16 pfr_count; /* PF reset count */ 382 383 struct ice_hw_port_stats stats; 384 struct ice_hw_port_stats stats_prev; 385 struct ice_hw hw; 386 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 387 #ifdef CONFIG_DCB 388 u16 dcbx_cap; 389 #endif /* CONFIG_DCB */ 390 u32 tx_timeout_count; 391 unsigned long tx_timeout_last_recovery; 392 u32 tx_timeout_recovery_level; 393 char int_name[ICE_INT_NAME_STR_LEN]; 394 u32 sw_int_count; 395 }; 396 397 struct ice_netdev_priv { 398 struct ice_vsi *vsi; 399 }; 400 401 /** 402 * ice_irq_dynamic_ena - Enable default interrupt generation settings 403 * @hw: pointer to HW struct 404 * @vsi: pointer to VSI struct, can be NULL 405 * @q_vector: pointer to q_vector, can be NULL 406 */ 407 static inline void 408 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 409 struct ice_q_vector *q_vector) 410 { 411 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 412 ((struct ice_pf *)hw->back)->oicr_idx; 413 int itr = ICE_ITR_NONE; 414 u32 val; 415 416 /* clear the PBA here, as this function is meant to clean out all 417 * previous interrupts and enable the interrupt 418 */ 419 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 420 (itr << GLINT_DYN_CTL_ITR_INDX_S); 421 if (vsi) 422 if (test_bit(__ICE_DOWN, vsi->state)) 423 return; 424 wr32(hw, GLINT_DYN_CTL(vector), val); 425 } 426 427 /** 428 * ice_find_vsi_by_type - Find and return VSI of a given type 429 * @pf: PF to search for VSI 430 * @type: Value indicating type of VSI we are looking for 431 */ 432 static inline struct ice_vsi * 433 ice_find_vsi_by_type(struct ice_pf *pf, enum ice_vsi_type type) 434 { 435 int i; 436 437 for (i = 0; i < pf->num_alloc_vsi; i++) { 438 struct ice_vsi *vsi = pf->vsi[i]; 439 440 if (vsi && vsi->type == type) 441 return vsi; 442 } 443 444 return NULL; 445 } 446 447 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 448 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 449 void ice_set_ethtool_ops(struct net_device *netdev); 450 void ice_update_vsi_stats(struct ice_vsi *vsi); 451 void ice_update_pf_stats(struct ice_pf *pf); 452 int ice_up(struct ice_vsi *vsi); 453 int ice_down(struct ice_vsi *vsi); 454 int ice_vsi_cfg(struct ice_vsi *vsi); 455 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 456 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 457 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 458 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 459 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 460 #ifdef CONFIG_DCB 461 int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked); 462 void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked); 463 #endif /* CONFIG_DCB */ 464 int ice_open(struct net_device *netdev); 465 int ice_stop(struct net_device *netdev); 466 467 #endif /* _ICE_H_ */ 468