1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/auxiliary_bus.h> 38 #include <linux/avf/virtchnl.h> 39 #include <linux/cpu_rmap.h> 40 #include <linux/dim.h> 41 #include <net/devlink.h> 42 #include <net/ipv6.h> 43 #include <net/xdp_sock.h> 44 #include <net/xdp_sock_drv.h> 45 #include <net/geneve.h> 46 #include <net/gre.h> 47 #include <net/udp_tunnel.h> 48 #include <net/vxlan.h> 49 #if IS_ENABLED(CONFIG_DCB) 50 #include <scsi/iscsi_proto.h> 51 #endif /* CONFIG_DCB */ 52 #include "ice_devids.h" 53 #include "ice_type.h" 54 #include "ice_txrx.h" 55 #include "ice_dcb.h" 56 #include "ice_switch.h" 57 #include "ice_common.h" 58 #include "ice_sched.h" 59 #include "ice_idc_int.h" 60 #include "ice_virtchnl_pf.h" 61 #include "ice_sriov.h" 62 #include "ice_fdir.h" 63 #include "ice_xsk.h" 64 #include "ice_arfs.h" 65 #include "ice_lag.h" 66 67 #define ICE_BAR0 0 68 #define ICE_REQ_DESC_MULTIPLE 32 69 #define ICE_MIN_NUM_DESC 64 70 #define ICE_MAX_NUM_DESC 8160 71 #define ICE_DFLT_MIN_RX_DESC 512 72 #define ICE_DFLT_NUM_TX_DESC 256 73 #define ICE_DFLT_NUM_RX_DESC 2048 74 75 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 76 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 77 #define ICE_AQ_LEN 64 78 #define ICE_MBXSQ_LEN 64 79 #define ICE_MIN_LAN_TXRX_MSIX 1 80 #define ICE_MIN_LAN_OICR_MSIX 1 81 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 82 #define ICE_FDIR_MSIX 2 83 #define ICE_RDMA_NUM_AEQ_MSIX 4 84 #define ICE_MIN_RDMA_MSIX 2 85 #define ICE_NO_VSI 0xffff 86 #define ICE_VSI_MAP_CONTIG 0 87 #define ICE_VSI_MAP_SCATTER 1 88 #define ICE_MAX_SCATTER_TXQS 16 89 #define ICE_MAX_SCATTER_RXQS 16 90 #define ICE_Q_WAIT_RETRY_LIMIT 10 91 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 92 #define ICE_MAX_LG_RSS_QS 256 93 #define ICE_RES_VALID_BIT 0x8000 94 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 95 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 96 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 97 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 98 #define ICE_INVAL_Q_INDEX 0xffff 99 #define ICE_INVAL_VFID 256 100 101 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 102 #define ICE_MAX_RESET_WAIT 20 103 104 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 105 106 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 107 108 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 109 110 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 111 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 112 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 113 114 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 115 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 116 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 117 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 118 119 /* Macro for each VSI in a PF */ 120 #define ice_for_each_vsi(pf, i) \ 121 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 122 123 /* Macros for each Tx/Rx ring in a VSI */ 124 #define ice_for_each_txq(vsi, i) \ 125 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 126 127 #define ice_for_each_rxq(vsi, i) \ 128 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 129 130 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 131 #define ice_for_each_alloc_txq(vsi, i) \ 132 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 133 134 #define ice_for_each_alloc_rxq(vsi, i) \ 135 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 136 137 #define ice_for_each_q_vector(vsi, i) \ 138 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 139 140 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 141 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 142 143 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 144 ICE_PROMISC_MCAST_TX | \ 145 ICE_PROMISC_UCAST_RX | \ 146 ICE_PROMISC_MCAST_RX | \ 147 ICE_PROMISC_VLAN_TX | \ 148 ICE_PROMISC_VLAN_RX) 149 150 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 151 152 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 153 ICE_PROMISC_MCAST_RX | \ 154 ICE_PROMISC_VLAN_TX | \ 155 ICE_PROMISC_VLAN_RX) 156 157 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 158 159 struct ice_txq_meta { 160 u32 q_teid; /* Tx-scheduler element identifier */ 161 u16 q_id; /* Entry in VSI's txq_map bitmap */ 162 u16 q_handle; /* Relative index of Tx queue within TC */ 163 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 164 u8 tc; /* TC number that Tx queue belongs to */ 165 }; 166 167 struct ice_tc_info { 168 u16 qoffset; 169 u16 qcount_tx; 170 u16 qcount_rx; 171 u8 netdev_tc; 172 }; 173 174 struct ice_tc_cfg { 175 u8 numtc; /* Total number of enabled TCs */ 176 u8 ena_tc; /* Tx map */ 177 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 178 }; 179 180 struct ice_res_tracker { 181 u16 num_entries; 182 u16 end; 183 u16 list[]; 184 }; 185 186 struct ice_qs_cfg { 187 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 188 unsigned long *pf_map; 189 unsigned long pf_map_size; 190 unsigned int q_count; 191 unsigned int scatter_count; 192 u16 *vsi_map; 193 u16 vsi_map_offset; 194 u8 mapping_mode; 195 }; 196 197 struct ice_sw { 198 struct ice_pf *pf; 199 u16 sw_id; /* switch ID for this switch */ 200 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 201 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 202 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 203 }; 204 205 enum ice_pf_state { 206 ICE_TESTING, 207 ICE_DOWN, 208 ICE_NEEDS_RESTART, 209 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 210 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 211 ICE_PFR_REQ, /* set by driver */ 212 ICE_CORER_REQ, /* set by driver */ 213 ICE_GLOBR_REQ, /* set by driver */ 214 ICE_CORER_RECV, /* set by OICR handler */ 215 ICE_GLOBR_RECV, /* set by OICR handler */ 216 ICE_EMPR_RECV, /* set by OICR handler */ 217 ICE_SUSPENDED, /* set on module remove path */ 218 ICE_RESET_FAILED, /* set by reset/rebuild */ 219 /* When checking for the PF to be in a nominal operating state, the 220 * bits that are grouped at the beginning of the list need to be 221 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 222 * be checked. If you need to add a bit into consideration for nominal 223 * operating state, it must be added before 224 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 225 * without appropriate consideration. 226 */ 227 ICE_STATE_NOMINAL_CHECK_BITS, 228 ICE_ADMINQ_EVENT_PENDING, 229 ICE_MAILBOXQ_EVENT_PENDING, 230 ICE_MDD_EVENT_PENDING, 231 ICE_VFLR_EVENT_PENDING, 232 ICE_FLTR_OVERFLOW_PROMISC, 233 ICE_VF_DIS, 234 ICE_CFG_BUSY, 235 ICE_SERVICE_SCHED, 236 ICE_SERVICE_DIS, 237 ICE_FD_FLUSH_REQ, 238 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 239 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 240 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 241 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 242 ICE_PHY_INIT_COMPLETE, 243 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 244 ICE_STATE_NBITS /* must be last */ 245 }; 246 247 enum ice_vsi_state { 248 ICE_VSI_DOWN, 249 ICE_VSI_NEEDS_RESTART, 250 ICE_VSI_NETDEV_ALLOCD, 251 ICE_VSI_NETDEV_REGISTERED, 252 ICE_VSI_UMAC_FLTR_CHANGED, 253 ICE_VSI_MMAC_FLTR_CHANGED, 254 ICE_VSI_VLAN_FLTR_CHANGED, 255 ICE_VSI_PROMISC_CHANGED, 256 ICE_VSI_STATE_NBITS /* must be last */ 257 }; 258 259 /* struct that defines a VSI, associated with a dev */ 260 struct ice_vsi { 261 struct net_device *netdev; 262 struct ice_sw *vsw; /* switch this VSI is on */ 263 struct ice_pf *back; /* back pointer to PF */ 264 struct ice_port_info *port_info; /* back pointer to port_info */ 265 struct ice_ring **rx_rings; /* Rx ring array */ 266 struct ice_ring **tx_rings; /* Tx ring array */ 267 struct ice_q_vector **q_vectors; /* q_vector array */ 268 269 irqreturn_t (*irq_handler)(int irq, void *data); 270 271 u64 tx_linearize; 272 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 273 unsigned int current_netdev_flags; 274 u32 tx_restart; 275 u32 tx_busy; 276 u32 rx_buf_failed; 277 u32 rx_page_failed; 278 u16 num_q_vectors; 279 u16 base_vector; /* IRQ base for OS reserved vectors */ 280 enum ice_vsi_type type; 281 u16 vsi_num; /* HW (absolute) index of this VSI */ 282 u16 idx; /* software index in pf->vsi[] */ 283 284 s16 vf_id; /* VF ID for SR-IOV VSIs */ 285 286 u16 ethtype; /* Ethernet protocol for pause frame */ 287 u16 num_gfltr; 288 u16 num_bfltr; 289 290 /* RSS config */ 291 u16 rss_table_size; /* HW RSS table size */ 292 u16 rss_size; /* Allocated RSS queues */ 293 u8 *rss_hkey_user; /* User configured hash keys */ 294 u8 *rss_lut_user; /* User configured lookup table entries */ 295 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 296 297 /* aRFS members only allocated for the PF VSI */ 298 #define ICE_MAX_ARFS_LIST 1024 299 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 300 struct hlist_head *arfs_fltr_list; 301 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 302 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 303 atomic_t *arfs_last_fltr_id; 304 305 /* devlink port data */ 306 struct devlink_port devlink_port; 307 bool devlink_port_registered; 308 309 u16 max_frame; 310 u16 rx_buf_len; 311 312 struct ice_aqc_vsi_props info; /* VSI properties */ 313 314 /* VSI stats */ 315 struct rtnl_link_stats64 net_stats; 316 struct ice_eth_stats eth_stats; 317 struct ice_eth_stats eth_stats_prev; 318 319 struct list_head tmp_sync_list; /* MAC filters to be synced */ 320 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 321 322 u8 irqs_ready:1; 323 u8 current_isup:1; /* Sync 'link up' logging */ 324 u8 stat_offsets_loaded:1; 325 u16 num_vlan; 326 327 /* queue information */ 328 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 329 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 330 u16 *txq_map; /* index in pf->avail_txqs */ 331 u16 *rxq_map; /* index in pf->avail_rxqs */ 332 u16 alloc_txq; /* Allocated Tx queues */ 333 u16 num_txq; /* Used Tx queues */ 334 u16 alloc_rxq; /* Allocated Rx queues */ 335 u16 num_rxq; /* Used Rx queues */ 336 u16 req_txq; /* User requested Tx queues */ 337 u16 req_rxq; /* User requested Rx queues */ 338 u16 num_rx_desc; 339 u16 num_tx_desc; 340 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 341 struct ice_tc_cfg tc_cfg; 342 struct bpf_prog *xdp_prog; 343 struct ice_ring **xdp_rings; /* XDP ring array */ 344 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 345 u16 num_xdp_txq; /* Used XDP queues */ 346 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 347 348 /* setup back reference, to which aggregator node this VSI 349 * corresponds to 350 */ 351 struct ice_agg_node *agg_node; 352 } ____cacheline_internodealigned_in_smp; 353 354 /* struct that defines an interrupt vector */ 355 struct ice_q_vector { 356 struct ice_vsi *vsi; 357 358 u16 v_idx; /* index in the vsi->q_vector array. */ 359 u16 reg_idx; 360 u8 num_ring_rx; /* total number of Rx rings in vector */ 361 u8 num_ring_tx; /* total number of Tx rings in vector */ 362 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 363 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 364 * value to the device 365 */ 366 u8 intrl; 367 368 struct napi_struct napi; 369 370 struct ice_ring_container rx; 371 struct ice_ring_container tx; 372 373 cpumask_t affinity_mask; 374 struct irq_affinity_notify affinity_notify; 375 376 char name[ICE_INT_NAME_STR_LEN]; 377 378 u16 total_events; /* net_dim(): number of interrupts processed */ 379 } ____cacheline_internodealigned_in_smp; 380 381 enum ice_pf_flags { 382 ICE_FLAG_FLTR_SYNC, 383 ICE_FLAG_RDMA_ENA, 384 ICE_FLAG_RSS_ENA, 385 ICE_FLAG_SRIOV_ENA, 386 ICE_FLAG_SRIOV_CAPABLE, 387 ICE_FLAG_DCB_CAPABLE, 388 ICE_FLAG_DCB_ENA, 389 ICE_FLAG_FD_ENA, 390 ICE_FLAG_AUX_ENA, 391 ICE_FLAG_ADV_FEATURES, 392 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 393 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 394 ICE_FLAG_NO_MEDIA, 395 ICE_FLAG_FW_LLDP_AGENT, 396 ICE_FLAG_MOD_POWER_UNSUPPORTED, 397 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 398 ICE_FLAG_LEGACY_RX, 399 ICE_FLAG_VF_TRUE_PROMISC_ENA, 400 ICE_FLAG_MDD_AUTO_RESET_VF, 401 ICE_FLAG_LINK_LENIENT_MODE_ENA, 402 ICE_PF_FLAGS_NBITS /* must be last */ 403 }; 404 405 struct ice_agg_node { 406 u32 agg_id; 407 #define ICE_MAX_VSIS_IN_AGG_NODE 64 408 u32 num_vsis; 409 u8 valid; 410 }; 411 412 struct ice_pf { 413 struct pci_dev *pdev; 414 415 struct devlink_region *nvm_region; 416 struct devlink_region *devcaps_region; 417 418 /* OS reserved IRQ details */ 419 struct msix_entry *msix_entries; 420 struct ice_res_tracker *irq_tracker; 421 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 422 * number of MSIX vectors needed for all SR-IOV VFs from the number of 423 * MSIX vectors allowed on this PF. 424 */ 425 u16 sriov_base_vector; 426 427 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 428 429 struct ice_vsi **vsi; /* VSIs created by the driver */ 430 struct ice_sw *first_sw; /* first switch created by firmware */ 431 /* Virtchnl/SR-IOV config info */ 432 struct ice_vf *vf; 433 u16 num_alloc_vfs; /* actual number of VFs allocated */ 434 u16 num_vfs_supported; /* num VFs supported for this PF */ 435 u16 num_qps_per_vf; 436 u16 num_msix_per_vf; 437 /* used to ratelimit the MDD event logging */ 438 unsigned long last_printed_mdd_jiffies; 439 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT); 440 DECLARE_BITMAP(state, ICE_STATE_NBITS); 441 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 442 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 443 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 444 unsigned long serv_tmr_period; 445 unsigned long serv_tmr_prev; 446 struct timer_list serv_tmr; 447 struct work_struct serv_task; 448 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 449 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 450 struct mutex tc_mutex; /* lock to protect TC changes */ 451 u32 msg_enable; 452 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 453 u16 rdma_base_vector; 454 455 /* spinlock to protect the AdminQ wait list */ 456 spinlock_t aq_wait_lock; 457 struct hlist_head aq_wait_list; 458 wait_queue_head_t aq_wait_queue; 459 460 wait_queue_head_t reset_wait_queue; 461 462 u32 hw_csum_rx_error; 463 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 464 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 465 u16 max_pf_txqs; /* Total Tx queues PF wide */ 466 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 467 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 468 u16 num_lan_tx; /* num LAN Tx queues setup */ 469 u16 num_lan_rx; /* num LAN Rx queues setup */ 470 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 471 u16 num_alloc_vsi; 472 u16 corer_count; /* Core reset count */ 473 u16 globr_count; /* Global reset count */ 474 u16 empr_count; /* EMP reset count */ 475 u16 pfr_count; /* PF reset count */ 476 477 u8 wol_ena : 1; /* software state of WoL */ 478 u32 wakeup_reason; /* last wakeup reason */ 479 struct ice_hw_port_stats stats; 480 struct ice_hw_port_stats stats_prev; 481 struct ice_hw hw; 482 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 483 u16 dcbx_cap; 484 u32 tx_timeout_count; 485 unsigned long tx_timeout_last_recovery; 486 u32 tx_timeout_recovery_level; 487 char int_name[ICE_INT_NAME_STR_LEN]; 488 struct auxiliary_device *adev; 489 int aux_idx; 490 u32 sw_int_count; 491 492 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 493 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 494 struct ice_link_default_override_tlv link_dflt_override; 495 struct ice_lag *lag; /* Link Aggregation information */ 496 497 #define ICE_INVALID_AGG_NODE_ID 0 498 #define ICE_PF_AGG_NODE_ID_START 1 499 #define ICE_MAX_PF_AGG_NODES 32 500 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 501 #define ICE_VF_AGG_NODE_ID_START 65 502 #define ICE_MAX_VF_AGG_NODES 32 503 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 504 }; 505 506 struct ice_netdev_priv { 507 struct ice_vsi *vsi; 508 }; 509 510 /** 511 * ice_irq_dynamic_ena - Enable default interrupt generation settings 512 * @hw: pointer to HW struct 513 * @vsi: pointer to VSI struct, can be NULL 514 * @q_vector: pointer to q_vector, can be NULL 515 */ 516 static inline void 517 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 518 struct ice_q_vector *q_vector) 519 { 520 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 521 ((struct ice_pf *)hw->back)->oicr_idx; 522 int itr = ICE_ITR_NONE; 523 u32 val; 524 525 /* clear the PBA here, as this function is meant to clean out all 526 * previous interrupts and enable the interrupt 527 */ 528 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 529 (itr << GLINT_DYN_CTL_ITR_INDX_S); 530 if (vsi) 531 if (test_bit(ICE_VSI_DOWN, vsi->state)) 532 return; 533 wr32(hw, GLINT_DYN_CTL(vector), val); 534 } 535 536 /** 537 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 538 * @netdev: pointer to the netdev struct 539 */ 540 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 541 { 542 struct ice_netdev_priv *np = netdev_priv(netdev); 543 544 return np->vsi->back; 545 } 546 547 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 548 { 549 return !!vsi->xdp_prog; 550 } 551 552 static inline void ice_set_ring_xdp(struct ice_ring *ring) 553 { 554 ring->flags |= ICE_TX_FLAGS_RING_XDP; 555 } 556 557 /** 558 * ice_xsk_pool - get XSK buffer pool bound to a ring 559 * @ring: ring to use 560 * 561 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 562 * NULL otherwise. 563 */ 564 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring) 565 { 566 struct ice_vsi *vsi = ring->vsi; 567 u16 qid = ring->q_index; 568 569 if (ice_ring_is_xdp(ring)) 570 qid -= vsi->num_xdp_txq; 571 572 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 573 return NULL; 574 575 return xsk_get_pool_from_qid(vsi->netdev, qid); 576 } 577 578 /** 579 * ice_get_main_vsi - Get the PF VSI 580 * @pf: PF instance 581 * 582 * returns pf->vsi[0], which by definition is the PF VSI 583 */ 584 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 585 { 586 if (pf->vsi) 587 return pf->vsi[0]; 588 589 return NULL; 590 } 591 592 /** 593 * ice_get_ctrl_vsi - Get the control VSI 594 * @pf: PF instance 595 */ 596 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 597 { 598 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 599 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 600 return NULL; 601 602 return pf->vsi[pf->ctrl_vsi_idx]; 603 } 604 605 /** 606 * ice_set_sriov_cap - enable SRIOV in PF flags 607 * @pf: PF struct 608 */ 609 static inline void ice_set_sriov_cap(struct ice_pf *pf) 610 { 611 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 612 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 613 } 614 615 /** 616 * ice_clear_sriov_cap - disable SRIOV in PF flags 617 * @pf: PF struct 618 */ 619 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 620 { 621 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 622 } 623 624 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 625 #define ICE_FD_STAT_PF_IDX(base_idx) \ 626 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 627 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 628 629 bool netif_is_ice(struct net_device *dev); 630 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 631 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 632 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 633 void ice_set_ethtool_ops(struct net_device *netdev); 634 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 635 u16 ice_get_avail_txq_count(struct ice_pf *pf); 636 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 637 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 638 void ice_update_vsi_stats(struct ice_vsi *vsi); 639 void ice_update_pf_stats(struct ice_pf *pf); 640 int ice_up(struct ice_vsi *vsi); 641 int ice_down(struct ice_vsi *vsi); 642 int ice_vsi_cfg(struct ice_vsi *vsi); 643 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 644 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 645 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 646 int 647 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 648 u32 flags); 649 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 650 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 651 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 652 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 653 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 654 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 655 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 656 int ice_plug_aux_dev(struct ice_pf *pf); 657 void ice_unplug_aux_dev(struct ice_pf *pf); 658 int ice_init_rdma(struct ice_pf *pf); 659 const char *ice_stat_str(enum ice_status stat_err); 660 const char *ice_aq_str(enum ice_aq_err aq_err); 661 bool ice_is_wol_supported(struct ice_hw *hw); 662 int 663 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 664 bool is_tun); 665 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 666 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 667 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 668 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 669 int 670 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 671 u32 *rule_locs); 672 void ice_fdir_release_flows(struct ice_hw *hw); 673 void ice_fdir_replay_flows(struct ice_hw *hw); 674 void ice_fdir_replay_fltrs(struct ice_pf *pf); 675 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 676 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 677 struct ice_rq_event_info *event); 678 int ice_open(struct net_device *netdev); 679 int ice_open_internal(struct net_device *netdev); 680 int ice_stop(struct net_device *netdev); 681 void ice_service_task_schedule(struct ice_pf *pf); 682 683 /** 684 * ice_set_rdma_cap - enable RDMA support 685 * @pf: PF struct 686 */ 687 static inline void ice_set_rdma_cap(struct ice_pf *pf) 688 { 689 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 690 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 691 ice_plug_aux_dev(pf); 692 } 693 } 694 695 /** 696 * ice_clear_rdma_cap - disable RDMA support 697 * @pf: PF struct 698 */ 699 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 700 { 701 ice_unplug_aux_dev(pf); 702 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 703 } 704 #endif /* _ICE_H_ */ 705