1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/auxiliary_bus.h> 38 #include <linux/avf/virtchnl.h> 39 #include <linux/cpu_rmap.h> 40 #include <linux/dim.h> 41 #include <net/devlink.h> 42 #include <net/ipv6.h> 43 #include <net/xdp_sock.h> 44 #include <net/xdp_sock_drv.h> 45 #include <net/geneve.h> 46 #include <net/gre.h> 47 #include <net/udp_tunnel.h> 48 #include <net/vxlan.h> 49 #if IS_ENABLED(CONFIG_DCB) 50 #include <scsi/iscsi_proto.h> 51 #endif /* CONFIG_DCB */ 52 #include "ice_devids.h" 53 #include "ice_type.h" 54 #include "ice_txrx.h" 55 #include "ice_dcb.h" 56 #include "ice_switch.h" 57 #include "ice_common.h" 58 #include "ice_sched.h" 59 #include "ice_idc_int.h" 60 #include "ice_virtchnl_pf.h" 61 #include "ice_sriov.h" 62 #include "ice_ptp.h" 63 #include "ice_fdir.h" 64 #include "ice_xsk.h" 65 #include "ice_arfs.h" 66 #include "ice_repr.h" 67 #include "ice_eswitch.h" 68 #include "ice_lag.h" 69 70 #define ICE_BAR0 0 71 #define ICE_REQ_DESC_MULTIPLE 32 72 #define ICE_MIN_NUM_DESC 64 73 #define ICE_MAX_NUM_DESC 8160 74 #define ICE_DFLT_MIN_RX_DESC 512 75 #define ICE_DFLT_NUM_TX_DESC 256 76 #define ICE_DFLT_NUM_RX_DESC 2048 77 78 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 79 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 80 #define ICE_AQ_LEN 192 81 #define ICE_MBXSQ_LEN 64 82 #define ICE_SBQ_LEN 64 83 #define ICE_MIN_LAN_TXRX_MSIX 1 84 #define ICE_MIN_LAN_OICR_MSIX 1 85 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 86 #define ICE_FDIR_MSIX 2 87 #define ICE_RDMA_NUM_AEQ_MSIX 4 88 #define ICE_MIN_RDMA_MSIX 2 89 #define ICE_ESWITCH_MSIX 1 90 #define ICE_NO_VSI 0xffff 91 #define ICE_VSI_MAP_CONTIG 0 92 #define ICE_VSI_MAP_SCATTER 1 93 #define ICE_MAX_SCATTER_TXQS 16 94 #define ICE_MAX_SCATTER_RXQS 16 95 #define ICE_Q_WAIT_RETRY_LIMIT 10 96 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 97 #define ICE_MAX_LG_RSS_QS 256 98 #define ICE_RES_VALID_BIT 0x8000 99 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 100 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 101 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 102 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 103 #define ICE_INVAL_Q_INDEX 0xffff 104 #define ICE_INVAL_VFID 256 105 106 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 107 #define ICE_MAX_RESET_WAIT 20 108 109 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 110 111 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 112 113 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 114 115 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 116 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 117 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 118 119 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 120 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 121 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 122 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 123 124 /* Macro for each VSI in a PF */ 125 #define ice_for_each_vsi(pf, i) \ 126 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 127 128 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 129 #define ice_for_each_txq(vsi, i) \ 130 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 131 132 #define ice_for_each_xdp_txq(vsi, i) \ 133 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 134 135 #define ice_for_each_rxq(vsi, i) \ 136 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 137 138 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 139 #define ice_for_each_alloc_txq(vsi, i) \ 140 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 141 142 #define ice_for_each_alloc_rxq(vsi, i) \ 143 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 144 145 #define ice_for_each_q_vector(vsi, i) \ 146 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 147 148 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 149 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 150 151 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 152 ICE_PROMISC_MCAST_TX | \ 153 ICE_PROMISC_UCAST_RX | \ 154 ICE_PROMISC_MCAST_RX | \ 155 ICE_PROMISC_VLAN_TX | \ 156 ICE_PROMISC_VLAN_RX) 157 158 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 159 160 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 161 ICE_PROMISC_MCAST_RX | \ 162 ICE_PROMISC_VLAN_TX | \ 163 ICE_PROMISC_VLAN_RX) 164 165 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 166 167 enum ice_feature { 168 ICE_F_DSCP, 169 ICE_F_SMA_CTRL, 170 ICE_F_MAX 171 }; 172 173 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 174 175 struct ice_txq_meta { 176 u32 q_teid; /* Tx-scheduler element identifier */ 177 u16 q_id; /* Entry in VSI's txq_map bitmap */ 178 u16 q_handle; /* Relative index of Tx queue within TC */ 179 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 180 u8 tc; /* TC number that Tx queue belongs to */ 181 }; 182 183 struct ice_tc_info { 184 u16 qoffset; 185 u16 qcount_tx; 186 u16 qcount_rx; 187 u8 netdev_tc; 188 }; 189 190 struct ice_tc_cfg { 191 u8 numtc; /* Total number of enabled TCs */ 192 u8 ena_tc; /* Tx map */ 193 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 194 }; 195 196 struct ice_res_tracker { 197 u16 num_entries; 198 u16 end; 199 u16 list[]; 200 }; 201 202 struct ice_qs_cfg { 203 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 204 unsigned long *pf_map; 205 unsigned long pf_map_size; 206 unsigned int q_count; 207 unsigned int scatter_count; 208 u16 *vsi_map; 209 u16 vsi_map_offset; 210 u8 mapping_mode; 211 }; 212 213 struct ice_sw { 214 struct ice_pf *pf; 215 u16 sw_id; /* switch ID for this switch */ 216 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 217 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 218 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 219 }; 220 221 enum ice_pf_state { 222 ICE_TESTING, 223 ICE_DOWN, 224 ICE_NEEDS_RESTART, 225 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 226 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 227 ICE_PFR_REQ, /* set by driver */ 228 ICE_CORER_REQ, /* set by driver */ 229 ICE_GLOBR_REQ, /* set by driver */ 230 ICE_CORER_RECV, /* set by OICR handler */ 231 ICE_GLOBR_RECV, /* set by OICR handler */ 232 ICE_EMPR_RECV, /* set by OICR handler */ 233 ICE_SUSPENDED, /* set on module remove path */ 234 ICE_RESET_FAILED, /* set by reset/rebuild */ 235 /* When checking for the PF to be in a nominal operating state, the 236 * bits that are grouped at the beginning of the list need to be 237 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 238 * be checked. If you need to add a bit into consideration for nominal 239 * operating state, it must be added before 240 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 241 * without appropriate consideration. 242 */ 243 ICE_STATE_NOMINAL_CHECK_BITS, 244 ICE_ADMINQ_EVENT_PENDING, 245 ICE_MAILBOXQ_EVENT_PENDING, 246 ICE_SIDEBANDQ_EVENT_PENDING, 247 ICE_MDD_EVENT_PENDING, 248 ICE_VFLR_EVENT_PENDING, 249 ICE_FLTR_OVERFLOW_PROMISC, 250 ICE_VF_DIS, 251 ICE_VF_DEINIT_IN_PROGRESS, 252 ICE_CFG_BUSY, 253 ICE_SERVICE_SCHED, 254 ICE_SERVICE_DIS, 255 ICE_FD_FLUSH_REQ, 256 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 257 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 258 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 259 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 260 ICE_PHY_INIT_COMPLETE, 261 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 262 ICE_STATE_NBITS /* must be last */ 263 }; 264 265 enum ice_vsi_state { 266 ICE_VSI_DOWN, 267 ICE_VSI_NEEDS_RESTART, 268 ICE_VSI_NETDEV_ALLOCD, 269 ICE_VSI_NETDEV_REGISTERED, 270 ICE_VSI_UMAC_FLTR_CHANGED, 271 ICE_VSI_MMAC_FLTR_CHANGED, 272 ICE_VSI_VLAN_FLTR_CHANGED, 273 ICE_VSI_PROMISC_CHANGED, 274 ICE_VSI_STATE_NBITS /* must be last */ 275 }; 276 277 /* struct that defines a VSI, associated with a dev */ 278 struct ice_vsi { 279 struct net_device *netdev; 280 struct ice_sw *vsw; /* switch this VSI is on */ 281 struct ice_pf *back; /* back pointer to PF */ 282 struct ice_port_info *port_info; /* back pointer to port_info */ 283 struct ice_rx_ring **rx_rings; /* Rx ring array */ 284 struct ice_tx_ring **tx_rings; /* Tx ring array */ 285 struct ice_q_vector **q_vectors; /* q_vector array */ 286 287 irqreturn_t (*irq_handler)(int irq, void *data); 288 289 u64 tx_linearize; 290 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 291 unsigned int current_netdev_flags; 292 u32 tx_restart; 293 u32 tx_busy; 294 u32 rx_buf_failed; 295 u32 rx_page_failed; 296 u16 num_q_vectors; 297 u16 base_vector; /* IRQ base for OS reserved vectors */ 298 enum ice_vsi_type type; 299 u16 vsi_num; /* HW (absolute) index of this VSI */ 300 u16 idx; /* software index in pf->vsi[] */ 301 302 s16 vf_id; /* VF ID for SR-IOV VSIs */ 303 304 u16 ethtype; /* Ethernet protocol for pause frame */ 305 u16 num_gfltr; 306 u16 num_bfltr; 307 308 /* RSS config */ 309 u16 rss_table_size; /* HW RSS table size */ 310 u16 rss_size; /* Allocated RSS queues */ 311 u8 *rss_hkey_user; /* User configured hash keys */ 312 u8 *rss_lut_user; /* User configured lookup table entries */ 313 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 314 315 /* aRFS members only allocated for the PF VSI */ 316 #define ICE_MAX_ARFS_LIST 1024 317 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 318 struct hlist_head *arfs_fltr_list; 319 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 320 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 321 atomic_t *arfs_last_fltr_id; 322 323 u16 max_frame; 324 u16 rx_buf_len; 325 326 struct ice_aqc_vsi_props info; /* VSI properties */ 327 328 /* VSI stats */ 329 struct rtnl_link_stats64 net_stats; 330 struct ice_eth_stats eth_stats; 331 struct ice_eth_stats eth_stats_prev; 332 333 struct list_head tmp_sync_list; /* MAC filters to be synced */ 334 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 335 336 u8 irqs_ready:1; 337 u8 current_isup:1; /* Sync 'link up' logging */ 338 u8 stat_offsets_loaded:1; 339 u16 num_vlan; 340 341 /* queue information */ 342 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 343 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 344 u16 *txq_map; /* index in pf->avail_txqs */ 345 u16 *rxq_map; /* index in pf->avail_rxqs */ 346 u16 alloc_txq; /* Allocated Tx queues */ 347 u16 num_txq; /* Used Tx queues */ 348 u16 alloc_rxq; /* Allocated Rx queues */ 349 u16 num_rxq; /* Used Rx queues */ 350 u16 req_txq; /* User requested Tx queues */ 351 u16 req_rxq; /* User requested Rx queues */ 352 u16 num_rx_desc; 353 u16 num_tx_desc; 354 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 355 struct ice_tc_cfg tc_cfg; 356 struct bpf_prog *xdp_prog; 357 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 358 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 359 u16 num_xdp_txq; /* Used XDP queues */ 360 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 361 362 struct net_device **target_netdevs; 363 364 /* setup back reference, to which aggregator node this VSI 365 * corresponds to 366 */ 367 struct ice_agg_node *agg_node; 368 } ____cacheline_internodealigned_in_smp; 369 370 /* struct that defines an interrupt vector */ 371 struct ice_q_vector { 372 struct ice_vsi *vsi; 373 374 u16 v_idx; /* index in the vsi->q_vector array. */ 375 u16 reg_idx; 376 u8 num_ring_rx; /* total number of Rx rings in vector */ 377 u8 num_ring_tx; /* total number of Tx rings in vector */ 378 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 379 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 380 * value to the device 381 */ 382 u8 intrl; 383 384 struct napi_struct napi; 385 386 struct ice_ring_container rx; 387 struct ice_ring_container tx; 388 389 cpumask_t affinity_mask; 390 struct irq_affinity_notify affinity_notify; 391 392 char name[ICE_INT_NAME_STR_LEN]; 393 394 u16 total_events; /* net_dim(): number of interrupts processed */ 395 } ____cacheline_internodealigned_in_smp; 396 397 enum ice_pf_flags { 398 ICE_FLAG_FLTR_SYNC, 399 ICE_FLAG_RDMA_ENA, 400 ICE_FLAG_RSS_ENA, 401 ICE_FLAG_SRIOV_ENA, 402 ICE_FLAG_SRIOV_CAPABLE, 403 ICE_FLAG_DCB_CAPABLE, 404 ICE_FLAG_DCB_ENA, 405 ICE_FLAG_FD_ENA, 406 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 407 ICE_FLAG_PTP, /* PTP is enabled by software */ 408 ICE_FLAG_AUX_ENA, 409 ICE_FLAG_ADV_FEATURES, 410 ICE_FLAG_CLS_FLOWER, 411 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 412 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 413 ICE_FLAG_NO_MEDIA, 414 ICE_FLAG_FW_LLDP_AGENT, 415 ICE_FLAG_MOD_POWER_UNSUPPORTED, 416 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 417 ICE_FLAG_LEGACY_RX, 418 ICE_FLAG_VF_TRUE_PROMISC_ENA, 419 ICE_FLAG_MDD_AUTO_RESET_VF, 420 ICE_FLAG_LINK_LENIENT_MODE_ENA, 421 ICE_PF_FLAGS_NBITS /* must be last */ 422 }; 423 424 struct ice_switchdev_info { 425 struct ice_vsi *control_vsi; 426 struct ice_vsi *uplink_vsi; 427 bool is_running; 428 }; 429 430 struct ice_agg_node { 431 u32 agg_id; 432 #define ICE_MAX_VSIS_IN_AGG_NODE 64 433 u32 num_vsis; 434 u8 valid; 435 }; 436 437 struct ice_pf { 438 struct pci_dev *pdev; 439 440 struct devlink_region *nvm_region; 441 struct devlink_region *devcaps_region; 442 443 /* devlink port data */ 444 struct devlink_port devlink_port; 445 446 /* OS reserved IRQ details */ 447 struct msix_entry *msix_entries; 448 struct ice_res_tracker *irq_tracker; 449 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 450 * number of MSIX vectors needed for all SR-IOV VFs from the number of 451 * MSIX vectors allowed on this PF. 452 */ 453 u16 sriov_base_vector; 454 455 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 456 457 struct ice_vsi **vsi; /* VSIs created by the driver */ 458 struct ice_sw *first_sw; /* first switch created by firmware */ 459 u16 eswitch_mode; /* current mode of eswitch */ 460 /* Virtchnl/SR-IOV config info */ 461 struct ice_vf *vf; 462 u16 num_alloc_vfs; /* actual number of VFs allocated */ 463 u16 num_vfs_supported; /* num VFs supported for this PF */ 464 u16 num_qps_per_vf; 465 u16 num_msix_per_vf; 466 /* used to ratelimit the MDD event logging */ 467 unsigned long last_printed_mdd_jiffies; 468 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT); 469 DECLARE_BITMAP(features, ICE_F_MAX); 470 DECLARE_BITMAP(state, ICE_STATE_NBITS); 471 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 472 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 473 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 474 unsigned long serv_tmr_period; 475 unsigned long serv_tmr_prev; 476 struct timer_list serv_tmr; 477 struct work_struct serv_task; 478 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 479 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 480 struct mutex tc_mutex; /* lock to protect TC changes */ 481 u32 msg_enable; 482 struct ice_ptp ptp; 483 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 484 u16 rdma_base_vector; 485 486 /* spinlock to protect the AdminQ wait list */ 487 spinlock_t aq_wait_lock; 488 struct hlist_head aq_wait_list; 489 wait_queue_head_t aq_wait_queue; 490 491 wait_queue_head_t reset_wait_queue; 492 493 u32 hw_csum_rx_error; 494 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 495 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 496 u16 max_pf_txqs; /* Total Tx queues PF wide */ 497 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 498 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 499 u16 num_lan_tx; /* num LAN Tx queues setup */ 500 u16 num_lan_rx; /* num LAN Rx queues setup */ 501 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 502 u16 num_alloc_vsi; 503 u16 corer_count; /* Core reset count */ 504 u16 globr_count; /* Global reset count */ 505 u16 empr_count; /* EMP reset count */ 506 u16 pfr_count; /* PF reset count */ 507 508 u8 wol_ena : 1; /* software state of WoL */ 509 u32 wakeup_reason; /* last wakeup reason */ 510 struct ice_hw_port_stats stats; 511 struct ice_hw_port_stats stats_prev; 512 struct ice_hw hw; 513 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 514 u16 dcbx_cap; 515 u32 tx_timeout_count; 516 unsigned long tx_timeout_last_recovery; 517 u32 tx_timeout_recovery_level; 518 char int_name[ICE_INT_NAME_STR_LEN]; 519 struct auxiliary_device *adev; 520 int aux_idx; 521 u32 sw_int_count; 522 523 struct hlist_head tc_flower_fltr_list; 524 525 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 526 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 527 struct ice_link_default_override_tlv link_dflt_override; 528 struct ice_lag *lag; /* Link Aggregation information */ 529 530 struct ice_switchdev_info switchdev; 531 532 #define ICE_INVALID_AGG_NODE_ID 0 533 #define ICE_PF_AGG_NODE_ID_START 1 534 #define ICE_MAX_PF_AGG_NODES 32 535 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 536 #define ICE_VF_AGG_NODE_ID_START 65 537 #define ICE_MAX_VF_AGG_NODES 32 538 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 539 }; 540 541 struct ice_netdev_priv { 542 struct ice_vsi *vsi; 543 struct ice_repr *repr; 544 }; 545 546 /** 547 * ice_irq_dynamic_ena - Enable default interrupt generation settings 548 * @hw: pointer to HW struct 549 * @vsi: pointer to VSI struct, can be NULL 550 * @q_vector: pointer to q_vector, can be NULL 551 */ 552 static inline void 553 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 554 struct ice_q_vector *q_vector) 555 { 556 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 557 ((struct ice_pf *)hw->back)->oicr_idx; 558 int itr = ICE_ITR_NONE; 559 u32 val; 560 561 /* clear the PBA here, as this function is meant to clean out all 562 * previous interrupts and enable the interrupt 563 */ 564 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 565 (itr << GLINT_DYN_CTL_ITR_INDX_S); 566 if (vsi) 567 if (test_bit(ICE_VSI_DOWN, vsi->state)) 568 return; 569 wr32(hw, GLINT_DYN_CTL(vector), val); 570 } 571 572 /** 573 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 574 * @netdev: pointer to the netdev struct 575 */ 576 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 577 { 578 struct ice_netdev_priv *np = netdev_priv(netdev); 579 580 return np->vsi->back; 581 } 582 583 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 584 { 585 return !!vsi->xdp_prog; 586 } 587 588 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 589 { 590 ring->flags |= ICE_TX_FLAGS_RING_XDP; 591 } 592 593 /** 594 * ice_xsk_pool - get XSK buffer pool bound to a ring 595 * @ring: Rx ring to use 596 * 597 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 598 * NULL otherwise. 599 */ 600 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 601 { 602 struct ice_vsi *vsi = ring->vsi; 603 u16 qid = ring->q_index; 604 605 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 606 return NULL; 607 608 return xsk_get_pool_from_qid(vsi->netdev, qid); 609 } 610 611 /** 612 * ice_tx_xsk_pool - get XSK buffer pool bound to a ring 613 * @ring: Tx ring to use 614 * 615 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 616 * NULL otherwise. Tx equivalent of ice_xsk_pool. 617 */ 618 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring) 619 { 620 struct ice_vsi *vsi = ring->vsi; 621 u16 qid; 622 623 qid = ring->q_index - vsi->num_xdp_txq; 624 625 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 626 return NULL; 627 628 return xsk_get_pool_from_qid(vsi->netdev, qid); 629 } 630 631 /** 632 * ice_get_main_vsi - Get the PF VSI 633 * @pf: PF instance 634 * 635 * returns pf->vsi[0], which by definition is the PF VSI 636 */ 637 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 638 { 639 if (pf->vsi) 640 return pf->vsi[0]; 641 642 return NULL; 643 } 644 645 /** 646 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 647 * @np: private netdev structure 648 */ 649 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 650 { 651 /* In case of port representor return source port VSI. */ 652 if (np->repr) 653 return np->repr->src_vsi; 654 else 655 return np->vsi; 656 } 657 658 /** 659 * ice_get_ctrl_vsi - Get the control VSI 660 * @pf: PF instance 661 */ 662 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 663 { 664 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 665 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 666 return NULL; 667 668 return pf->vsi[pf->ctrl_vsi_idx]; 669 } 670 671 /** 672 * ice_is_switchdev_running - check if switchdev is configured 673 * @pf: pointer to PF structure 674 * 675 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 676 * and switchdev is configured, false otherwise. 677 */ 678 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 679 { 680 return pf->switchdev.is_running; 681 } 682 683 /** 684 * ice_set_sriov_cap - enable SRIOV in PF flags 685 * @pf: PF struct 686 */ 687 static inline void ice_set_sriov_cap(struct ice_pf *pf) 688 { 689 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 690 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 691 } 692 693 /** 694 * ice_clear_sriov_cap - disable SRIOV in PF flags 695 * @pf: PF struct 696 */ 697 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 698 { 699 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 700 } 701 702 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 703 #define ICE_FD_STAT_PF_IDX(base_idx) \ 704 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 705 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 706 707 bool netif_is_ice(struct net_device *dev); 708 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 709 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 710 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 711 int ice_vsi_open(struct ice_vsi *vsi); 712 void ice_set_ethtool_ops(struct net_device *netdev); 713 void ice_set_ethtool_repr_ops(struct net_device *netdev); 714 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 715 u16 ice_get_avail_txq_count(struct ice_pf *pf); 716 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 717 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 718 void ice_update_vsi_stats(struct ice_vsi *vsi); 719 void ice_update_pf_stats(struct ice_pf *pf); 720 int ice_up(struct ice_vsi *vsi); 721 int ice_down(struct ice_vsi *vsi); 722 int ice_vsi_cfg(struct ice_vsi *vsi); 723 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 724 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 725 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 726 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 727 int 728 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 729 u32 flags); 730 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 731 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 732 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 733 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 734 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 735 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 736 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 737 int ice_plug_aux_dev(struct ice_pf *pf); 738 void ice_unplug_aux_dev(struct ice_pf *pf); 739 int ice_init_rdma(struct ice_pf *pf); 740 const char *ice_stat_str(enum ice_status stat_err); 741 const char *ice_aq_str(enum ice_aq_err aq_err); 742 bool ice_is_wol_supported(struct ice_hw *hw); 743 int 744 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 745 bool is_tun); 746 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 747 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 748 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 749 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 750 int 751 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 752 u32 *rule_locs); 753 void ice_fdir_release_flows(struct ice_hw *hw); 754 void ice_fdir_replay_flows(struct ice_hw *hw); 755 void ice_fdir_replay_fltrs(struct ice_pf *pf); 756 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 757 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 758 struct ice_rq_event_info *event); 759 int ice_open(struct net_device *netdev); 760 int ice_open_internal(struct net_device *netdev); 761 int ice_stop(struct net_device *netdev); 762 void ice_service_task_schedule(struct ice_pf *pf); 763 764 /** 765 * ice_set_rdma_cap - enable RDMA support 766 * @pf: PF struct 767 */ 768 static inline void ice_set_rdma_cap(struct ice_pf *pf) 769 { 770 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 771 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 772 set_bit(ICE_FLAG_AUX_ENA, pf->flags); 773 ice_plug_aux_dev(pf); 774 } 775 } 776 777 /** 778 * ice_clear_rdma_cap - disable RDMA support 779 * @pf: PF struct 780 */ 781 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 782 { 783 ice_unplug_aux_dev(pf); 784 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 785 clear_bit(ICE_FLAG_AUX_ENA, pf->flags); 786 } 787 #endif /* _ICE_H_ */ 788