xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision 45ed13d9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
30 #include <linux/ip.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <net/pkt_cls.h>
43 #include <net/tc_act/tc_mirred.h>
44 #include <net/tc_act/tc_gact.h>
45 #include <net/ip.h>
46 #include <net/devlink.h>
47 #include <net/ipv6.h>
48 #include <net/xdp_sock.h>
49 #include <net/xdp_sock_drv.h>
50 #include <net/geneve.h>
51 #include <net/gre.h>
52 #include <net/udp_tunnel.h>
53 #include <net/vxlan.h>
54 #include <net/gtp.h>
55 #include "ice_devids.h"
56 #include "ice_type.h"
57 #include "ice_txrx.h"
58 #include "ice_dcb.h"
59 #include "ice_switch.h"
60 #include "ice_common.h"
61 #include "ice_flow.h"
62 #include "ice_sched.h"
63 #include "ice_idc_int.h"
64 #include "ice_sriov.h"
65 #include "ice_vf_mbx.h"
66 #include "ice_ptp.h"
67 #include "ice_fdir.h"
68 #include "ice_xsk.h"
69 #include "ice_arfs.h"
70 #include "ice_repr.h"
71 #include "ice_eswitch.h"
72 #include "ice_lag.h"
73 #include "ice_vsi_vlan_ops.h"
74 #include "ice_gnss.h"
75 
76 #define ICE_BAR0		0
77 #define ICE_REQ_DESC_MULTIPLE	32
78 #define ICE_MIN_NUM_DESC	64
79 #define ICE_MAX_NUM_DESC	8160
80 #define ICE_DFLT_MIN_RX_DESC	512
81 #define ICE_DFLT_NUM_TX_DESC	256
82 #define ICE_DFLT_NUM_RX_DESC	2048
83 
84 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
85 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
86 #define ICE_AQ_LEN		192
87 #define ICE_MBXSQ_LEN		64
88 #define ICE_SBQ_LEN		64
89 #define ICE_MIN_LAN_TXRX_MSIX	1
90 #define ICE_MIN_LAN_OICR_MSIX	1
91 #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
92 #define ICE_FDIR_MSIX		2
93 #define ICE_RDMA_NUM_AEQ_MSIX	4
94 #define ICE_MIN_RDMA_MSIX	2
95 #define ICE_ESWITCH_MSIX	1
96 #define ICE_NO_VSI		0xffff
97 #define ICE_VSI_MAP_CONTIG	0
98 #define ICE_VSI_MAP_SCATTER	1
99 #define ICE_MAX_SCATTER_TXQS	16
100 #define ICE_MAX_SCATTER_RXQS	16
101 #define ICE_Q_WAIT_RETRY_LIMIT	10
102 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
103 #define ICE_MAX_LG_RSS_QS	256
104 #define ICE_RES_VALID_BIT	0x8000
105 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
106 #define ICE_RES_RDMA_VEC_ID	(ICE_RES_MISC_VEC_ID - 1)
107 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
108 #define ICE_RES_VF_CTRL_VEC_ID	(ICE_RES_RDMA_VEC_ID - 1)
109 #define ICE_INVAL_Q_INDEX	0xffff
110 
111 #define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
112 
113 #define ICE_CHNL_START_TC		1
114 
115 #define ICE_MAX_RESET_WAIT		20
116 
117 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
118 
119 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
120 
121 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
122 
123 #define ICE_UP_TABLE_TRANSLATE(val, i) \
124 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
125 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
126 
127 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
128 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
129 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
130 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
131 
132 /* Minimum BW limit is 500 Kbps for any scheduler node */
133 #define ICE_MIN_BW_LIMIT		500
134 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
135  * use it to convert user specified BW limit into Kbps
136  */
137 #define ICE_BW_KBPS_DIVISOR		125
138 
139 /* Macro for each VSI in a PF */
140 #define ice_for_each_vsi(pf, i) \
141 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
142 
143 /* Macros for each Tx/Xdp/Rx ring in a VSI */
144 #define ice_for_each_txq(vsi, i) \
145 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
146 
147 #define ice_for_each_xdp_txq(vsi, i) \
148 	for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
149 
150 #define ice_for_each_rxq(vsi, i) \
151 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
152 
153 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
154 #define ice_for_each_alloc_txq(vsi, i) \
155 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
156 
157 #define ice_for_each_alloc_rxq(vsi, i) \
158 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
159 
160 #define ice_for_each_q_vector(vsi, i) \
161 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
162 
163 #define ice_for_each_chnl_tc(i)	\
164 	for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
165 
166 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
167 
168 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
169 				     ICE_PROMISC_UCAST_RX | \
170 				     ICE_PROMISC_VLAN_TX  | \
171 				     ICE_PROMISC_VLAN_RX)
172 
173 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
174 
175 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
176 				     ICE_PROMISC_MCAST_RX | \
177 				     ICE_PROMISC_VLAN_TX  | \
178 				     ICE_PROMISC_VLAN_RX)
179 
180 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
181 
182 enum ice_feature {
183 	ICE_F_DSCP,
184 	ICE_F_SMA_CTRL,
185 	ICE_F_GNSS,
186 	ICE_F_MAX
187 };
188 
189 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
190 
191 struct ice_channel {
192 	struct list_head list;
193 	u8 type;
194 	u16 sw_id;
195 	u16 base_q;
196 	u16 num_rxq;
197 	u16 num_txq;
198 	u16 vsi_num;
199 	u8 ena_tc;
200 	struct ice_aqc_vsi_props info;
201 	u64 max_tx_rate;
202 	u64 min_tx_rate;
203 	atomic_t num_sb_fltr;
204 	struct ice_vsi *ch_vsi;
205 };
206 
207 struct ice_txq_meta {
208 	u32 q_teid;	/* Tx-scheduler element identifier */
209 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
210 	u16 q_handle;	/* Relative index of Tx queue within TC */
211 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
212 	u8 tc;		/* TC number that Tx queue belongs to */
213 };
214 
215 struct ice_tc_info {
216 	u16 qoffset;
217 	u16 qcount_tx;
218 	u16 qcount_rx;
219 	u8 netdev_tc;
220 };
221 
222 struct ice_tc_cfg {
223 	u8 numtc; /* Total number of enabled TCs */
224 	u16 ena_tc; /* Tx map */
225 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
226 };
227 
228 struct ice_res_tracker {
229 	u16 num_entries;
230 	u16 end;
231 	u16 list[];
232 };
233 
234 struct ice_qs_cfg {
235 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
236 	unsigned long *pf_map;
237 	unsigned long pf_map_size;
238 	unsigned int q_count;
239 	unsigned int scatter_count;
240 	u16 *vsi_map;
241 	u16 vsi_map_offset;
242 	u8 mapping_mode;
243 };
244 
245 struct ice_sw {
246 	struct ice_pf *pf;
247 	u16 sw_id;		/* switch ID for this switch */
248 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
249 	struct ice_vsi *dflt_vsi;	/* default VSI for this switch */
250 	u8 dflt_vsi_ena:1;	/* true if above dflt_vsi is enabled */
251 };
252 
253 enum ice_pf_state {
254 	ICE_TESTING,
255 	ICE_DOWN,
256 	ICE_NEEDS_RESTART,
257 	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
258 	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
259 	ICE_PFR_REQ,		/* set by driver */
260 	ICE_CORER_REQ,		/* set by driver */
261 	ICE_GLOBR_REQ,		/* set by driver */
262 	ICE_CORER_RECV,		/* set by OICR handler */
263 	ICE_GLOBR_RECV,		/* set by OICR handler */
264 	ICE_EMPR_RECV,		/* set by OICR handler */
265 	ICE_SUSPENDED,		/* set on module remove path */
266 	ICE_RESET_FAILED,		/* set by reset/rebuild */
267 	/* When checking for the PF to be in a nominal operating state, the
268 	 * bits that are grouped at the beginning of the list need to be
269 	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
270 	 * be checked. If you need to add a bit into consideration for nominal
271 	 * operating state, it must be added before
272 	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
273 	 * without appropriate consideration.
274 	 */
275 	ICE_STATE_NOMINAL_CHECK_BITS,
276 	ICE_ADMINQ_EVENT_PENDING,
277 	ICE_MAILBOXQ_EVENT_PENDING,
278 	ICE_SIDEBANDQ_EVENT_PENDING,
279 	ICE_MDD_EVENT_PENDING,
280 	ICE_VFLR_EVENT_PENDING,
281 	ICE_FLTR_OVERFLOW_PROMISC,
282 	ICE_VF_DIS,
283 	ICE_CFG_BUSY,
284 	ICE_SERVICE_SCHED,
285 	ICE_SERVICE_DIS,
286 	ICE_FD_FLUSH_REQ,
287 	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
288 	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
289 	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
290 	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
291 	ICE_PHY_INIT_COMPLETE,
292 	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
293 	ICE_AUX_ERR_PENDING,
294 	ICE_STATE_NBITS		/* must be last */
295 };
296 
297 enum ice_vsi_state {
298 	ICE_VSI_DOWN,
299 	ICE_VSI_NEEDS_RESTART,
300 	ICE_VSI_NETDEV_ALLOCD,
301 	ICE_VSI_NETDEV_REGISTERED,
302 	ICE_VSI_UMAC_FLTR_CHANGED,
303 	ICE_VSI_MMAC_FLTR_CHANGED,
304 	ICE_VSI_PROMISC_CHANGED,
305 	ICE_VSI_STATE_NBITS		/* must be last */
306 };
307 
308 /* struct that defines a VSI, associated with a dev */
309 struct ice_vsi {
310 	struct net_device *netdev;
311 	struct ice_sw *vsw;		 /* switch this VSI is on */
312 	struct ice_pf *back;		 /* back pointer to PF */
313 	struct ice_port_info *port_info; /* back pointer to port_info */
314 	struct ice_rx_ring **rx_rings;	 /* Rx ring array */
315 	struct ice_tx_ring **tx_rings;	 /* Tx ring array */
316 	struct ice_q_vector **q_vectors; /* q_vector array */
317 
318 	irqreturn_t (*irq_handler)(int irq, void *data);
319 
320 	u64 tx_linearize;
321 	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
322 	unsigned int current_netdev_flags;
323 	u32 tx_restart;
324 	u32 tx_busy;
325 	u32 rx_buf_failed;
326 	u32 rx_page_failed;
327 	u16 num_q_vectors;
328 	u16 base_vector;		/* IRQ base for OS reserved vectors */
329 	enum ice_vsi_type type;
330 	u16 vsi_num;			/* HW (absolute) index of this VSI */
331 	u16 idx;			/* software index in pf->vsi[] */
332 
333 	struct ice_vf *vf;		/* VF associated with this VSI */
334 
335 	u16 ethtype;			/* Ethernet protocol for pause frame */
336 	u16 num_gfltr;
337 	u16 num_bfltr;
338 
339 	/* RSS config */
340 	u16 rss_table_size;	/* HW RSS table size */
341 	u16 rss_size;		/* Allocated RSS queues */
342 	u8 *rss_hkey_user;	/* User configured hash keys */
343 	u8 *rss_lut_user;	/* User configured lookup table entries */
344 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
345 
346 	/* aRFS members only allocated for the PF VSI */
347 #define ICE_MAX_ARFS_LIST	1024
348 #define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
349 	struct hlist_head *arfs_fltr_list;
350 	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
351 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
352 	atomic_t *arfs_last_fltr_id;
353 
354 	u16 max_frame;
355 	u16 rx_buf_len;
356 
357 	struct ice_aqc_vsi_props info;	 /* VSI properties */
358 
359 	/* VSI stats */
360 	struct rtnl_link_stats64 net_stats;
361 	struct ice_eth_stats eth_stats;
362 	struct ice_eth_stats eth_stats_prev;
363 
364 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
365 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
366 
367 	u8 irqs_ready:1;
368 	u8 current_isup:1;		 /* Sync 'link up' logging */
369 	u8 stat_offsets_loaded:1;
370 	struct ice_vsi_vlan_ops inner_vlan_ops;
371 	struct ice_vsi_vlan_ops outer_vlan_ops;
372 	u16 num_vlan;
373 
374 	/* queue information */
375 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
376 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
377 	u16 *txq_map;			 /* index in pf->avail_txqs */
378 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
379 	u16 alloc_txq;			 /* Allocated Tx queues */
380 	u16 num_txq;			 /* Used Tx queues */
381 	u16 alloc_rxq;			 /* Allocated Rx queues */
382 	u16 num_rxq;			 /* Used Rx queues */
383 	u16 req_txq;			 /* User requested Tx queues */
384 	u16 req_rxq;			 /* User requested Rx queues */
385 	u16 num_rx_desc;
386 	u16 num_tx_desc;
387 	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
388 	struct ice_tc_cfg tc_cfg;
389 	struct bpf_prog *xdp_prog;
390 	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */
391 	unsigned long *af_xdp_zc_qps;	 /* tracks AF_XDP ZC enabled qps */
392 	u16 num_xdp_txq;		 /* Used XDP queues */
393 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
394 
395 	struct net_device **target_netdevs;
396 
397 	struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
398 
399 	/* Channel Specific Fields */
400 	struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
401 	u16 cnt_q_avail;
402 	u16 next_base_q;	/* next queue to be used for channel setup */
403 	struct list_head ch_list;
404 	u16 num_chnl_rxq;
405 	u16 num_chnl_txq;
406 	u16 ch_rss_size;
407 	u16 num_chnl_fltr;
408 	/* store away rss size info before configuring ADQ channels so that,
409 	 * it can be used after tc-qdisc delete, to get back RSS setting as
410 	 * they were before
411 	 */
412 	u16 orig_rss_size;
413 	/* this keeps tracks of all enabled TC with and without DCB
414 	 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
415 	 * information
416 	 */
417 	u8 all_numtc;
418 	u16 all_enatc;
419 
420 	/* store away TC info, to be used for rebuild logic */
421 	u8 old_numtc;
422 	u16 old_ena_tc;
423 
424 	struct ice_channel *ch;
425 
426 	/* setup back reference, to which aggregator node this VSI
427 	 * corresponds to
428 	 */
429 	struct ice_agg_node *agg_node;
430 } ____cacheline_internodealigned_in_smp;
431 
432 /* struct that defines an interrupt vector */
433 struct ice_q_vector {
434 	struct ice_vsi *vsi;
435 
436 	u16 v_idx;			/* index in the vsi->q_vector array. */
437 	u16 reg_idx;
438 	u8 num_ring_rx;			/* total number of Rx rings in vector */
439 	u8 num_ring_tx;			/* total number of Tx rings in vector */
440 	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
441 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
442 	 * value to the device
443 	 */
444 	u8 intrl;
445 
446 	struct napi_struct napi;
447 
448 	struct ice_ring_container rx;
449 	struct ice_ring_container tx;
450 
451 	cpumask_t affinity_mask;
452 	struct irq_affinity_notify affinity_notify;
453 
454 	struct ice_channel *ch;
455 
456 	char name[ICE_INT_NAME_STR_LEN];
457 
458 	u16 total_events;	/* net_dim(): number of interrupts processed */
459 } ____cacheline_internodealigned_in_smp;
460 
461 enum ice_pf_flags {
462 	ICE_FLAG_FLTR_SYNC,
463 	ICE_FLAG_RDMA_ENA,
464 	ICE_FLAG_RSS_ENA,
465 	ICE_FLAG_SRIOV_ENA,
466 	ICE_FLAG_SRIOV_CAPABLE,
467 	ICE_FLAG_DCB_CAPABLE,
468 	ICE_FLAG_DCB_ENA,
469 	ICE_FLAG_FD_ENA,
470 	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
471 	ICE_FLAG_PTP,			/* PTP is enabled by software */
472 	ICE_FLAG_ADV_FEATURES,
473 	ICE_FLAG_TC_MQPRIO,		/* support for Multi queue TC */
474 	ICE_FLAG_CLS_FLOWER,
475 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
476 	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
477 	ICE_FLAG_NO_MEDIA,
478 	ICE_FLAG_FW_LLDP_AGENT,
479 	ICE_FLAG_MOD_POWER_UNSUPPORTED,
480 	ICE_FLAG_PHY_FW_LOAD_FAILED,
481 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
482 	ICE_FLAG_LEGACY_RX,
483 	ICE_FLAG_VF_TRUE_PROMISC_ENA,
484 	ICE_FLAG_MDD_AUTO_RESET_VF,
485 	ICE_FLAG_VF_VLAN_PRUNING,
486 	ICE_FLAG_LINK_LENIENT_MODE_ENA,
487 	ICE_FLAG_PLUG_AUX_DEV,
488 	ICE_FLAG_MTU_CHANGED,
489 	ICE_FLAG_GNSS,			/* GNSS successfully initialized */
490 	ICE_PF_FLAGS_NBITS		/* must be last */
491 };
492 
493 struct ice_switchdev_info {
494 	struct ice_vsi *control_vsi;
495 	struct ice_vsi *uplink_vsi;
496 	bool is_running;
497 };
498 
499 struct ice_agg_node {
500 	u32 agg_id;
501 #define ICE_MAX_VSIS_IN_AGG_NODE	64
502 	u32 num_vsis;
503 	u8 valid;
504 };
505 
506 struct ice_pf {
507 	struct pci_dev *pdev;
508 
509 	struct devlink_region *nvm_region;
510 	struct devlink_region *sram_region;
511 	struct devlink_region *devcaps_region;
512 
513 	/* devlink port data */
514 	struct devlink_port devlink_port;
515 
516 	/* OS reserved IRQ details */
517 	struct msix_entry *msix_entries;
518 	struct ice_res_tracker *irq_tracker;
519 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
520 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
521 	 * MSIX vectors allowed on this PF.
522 	 */
523 	u16 sriov_base_vector;
524 
525 	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
526 
527 	struct ice_vsi **vsi;		/* VSIs created by the driver */
528 	struct ice_sw *first_sw;	/* first switch created by firmware */
529 	u16 eswitch_mode;		/* current mode of eswitch */
530 	struct ice_vfs vfs;
531 	DECLARE_BITMAP(features, ICE_F_MAX);
532 	DECLARE_BITMAP(state, ICE_STATE_NBITS);
533 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
534 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
535 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
536 	unsigned long serv_tmr_period;
537 	unsigned long serv_tmr_prev;
538 	struct timer_list serv_tmr;
539 	struct work_struct serv_task;
540 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
541 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
542 	struct mutex tc_mutex;		/* lock to protect TC changes */
543 	struct mutex adev_mutex;	/* lock to protect aux device access */
544 	u32 msg_enable;
545 	struct ice_ptp ptp;
546 	struct tty_driver *ice_gnss_tty_driver;
547 	struct tty_port gnss_tty_port;
548 	struct gnss_serial *gnss_serial;
549 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
550 	u16 rdma_base_vector;
551 
552 	/* spinlock to protect the AdminQ wait list */
553 	spinlock_t aq_wait_lock;
554 	struct hlist_head aq_wait_list;
555 	wait_queue_head_t aq_wait_queue;
556 	bool fw_emp_reset_disabled;
557 
558 	wait_queue_head_t reset_wait_queue;
559 
560 	u32 hw_csum_rx_error;
561 	u32 oicr_err_reg;
562 	u16 oicr_idx;		/* Other interrupt cause MSIX vector index */
563 	u16 num_avail_sw_msix;	/* remaining MSIX SW vectors left unclaimed */
564 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
565 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
566 	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
567 	u16 num_lan_tx;		/* num LAN Tx queues setup */
568 	u16 num_lan_rx;		/* num LAN Rx queues setup */
569 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
570 	u16 num_alloc_vsi;
571 	u16 corer_count;	/* Core reset count */
572 	u16 globr_count;	/* Global reset count */
573 	u16 empr_count;		/* EMP reset count */
574 	u16 pfr_count;		/* PF reset count */
575 
576 	u8 wol_ena : 1;		/* software state of WoL */
577 	u32 wakeup_reason;	/* last wakeup reason */
578 	struct ice_hw_port_stats stats;
579 	struct ice_hw_port_stats stats_prev;
580 	struct ice_hw hw;
581 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
582 	u8 rdma_mode;
583 	u16 dcbx_cap;
584 	u32 tx_timeout_count;
585 	unsigned long tx_timeout_last_recovery;
586 	u32 tx_timeout_recovery_level;
587 	char int_name[ICE_INT_NAME_STR_LEN];
588 	struct auxiliary_device *adev;
589 	int aux_idx;
590 	u32 sw_int_count;
591 	/* count of tc_flower filters specific to channel (aka where filter
592 	 * action is "hw_tc <tc_num>")
593 	 */
594 	u16 num_dmac_chnl_fltrs;
595 	struct hlist_head tc_flower_fltr_list;
596 
597 	__le64 nvm_phy_type_lo; /* NVM PHY type low */
598 	__le64 nvm_phy_type_hi; /* NVM PHY type high */
599 	struct ice_link_default_override_tlv link_dflt_override;
600 	struct ice_lag *lag; /* Link Aggregation information */
601 
602 	struct ice_switchdev_info switchdev;
603 
604 #define ICE_INVALID_AGG_NODE_ID		0
605 #define ICE_PF_AGG_NODE_ID_START	1
606 #define ICE_MAX_PF_AGG_NODES		32
607 	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
608 #define ICE_VF_AGG_NODE_ID_START	65
609 #define ICE_MAX_VF_AGG_NODES		32
610 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
611 };
612 
613 struct ice_netdev_priv {
614 	struct ice_vsi *vsi;
615 	struct ice_repr *repr;
616 	/* indirect block callbacks on registered higher level devices
617 	 * (e.g. tunnel devices)
618 	 *
619 	 * tc_indr_block_cb_priv_list is used to look up indirect callback
620 	 * private data
621 	 */
622 	struct list_head tc_indr_block_priv_list;
623 };
624 
625 /**
626  * ice_vector_ch_enabled
627  * @qv: pointer to q_vector, can be NULL
628  *
629  * This function returns true if vector is channel enabled otherwise false
630  */
631 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
632 {
633 	return !!qv->ch; /* Enable it to run with TC */
634 }
635 
636 /**
637  * ice_irq_dynamic_ena - Enable default interrupt generation settings
638  * @hw: pointer to HW struct
639  * @vsi: pointer to VSI struct, can be NULL
640  * @q_vector: pointer to q_vector, can be NULL
641  */
642 static inline void
643 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
644 		    struct ice_q_vector *q_vector)
645 {
646 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
647 				((struct ice_pf *)hw->back)->oicr_idx;
648 	int itr = ICE_ITR_NONE;
649 	u32 val;
650 
651 	/* clear the PBA here, as this function is meant to clean out all
652 	 * previous interrupts and enable the interrupt
653 	 */
654 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
655 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
656 	if (vsi)
657 		if (test_bit(ICE_VSI_DOWN, vsi->state))
658 			return;
659 	wr32(hw, GLINT_DYN_CTL(vector), val);
660 }
661 
662 /**
663  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
664  * @netdev: pointer to the netdev struct
665  */
666 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
667 {
668 	struct ice_netdev_priv *np = netdev_priv(netdev);
669 
670 	return np->vsi->back;
671 }
672 
673 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
674 {
675 	return !!READ_ONCE(vsi->xdp_prog);
676 }
677 
678 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
679 {
680 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
681 }
682 
683 /**
684  * ice_xsk_pool - get XSK buffer pool bound to a ring
685  * @ring: Rx ring to use
686  *
687  * Returns a pointer to xdp_umem structure if there is a buffer pool present,
688  * NULL otherwise.
689  */
690 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
691 {
692 	struct ice_vsi *vsi = ring->vsi;
693 	u16 qid = ring->q_index;
694 
695 	if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
696 		return NULL;
697 
698 	return xsk_get_pool_from_qid(vsi->netdev, qid);
699 }
700 
701 /**
702  * ice_tx_xsk_pool - get XSK buffer pool bound to a ring
703  * @ring: Tx ring to use
704  *
705  * Returns a pointer to xdp_umem structure if there is a buffer pool present,
706  * NULL otherwise. Tx equivalent of ice_xsk_pool.
707  */
708 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring)
709 {
710 	struct ice_vsi *vsi = ring->vsi;
711 	u16 qid;
712 
713 	qid = ring->q_index - vsi->alloc_txq;
714 
715 	if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
716 		return NULL;
717 
718 	return xsk_get_pool_from_qid(vsi->netdev, qid);
719 }
720 
721 /**
722  * ice_get_main_vsi - Get the PF VSI
723  * @pf: PF instance
724  *
725  * returns pf->vsi[0], which by definition is the PF VSI
726  */
727 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
728 {
729 	if (pf->vsi)
730 		return pf->vsi[0];
731 
732 	return NULL;
733 }
734 
735 /**
736  * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
737  * @np: private netdev structure
738  */
739 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
740 {
741 	/* In case of port representor return source port VSI. */
742 	if (np->repr)
743 		return np->repr->src_vsi;
744 	else
745 		return np->vsi;
746 }
747 
748 /**
749  * ice_get_ctrl_vsi - Get the control VSI
750  * @pf: PF instance
751  */
752 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
753 {
754 	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
755 	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
756 		return NULL;
757 
758 	return pf->vsi[pf->ctrl_vsi_idx];
759 }
760 
761 /**
762  * ice_find_vsi - Find the VSI from VSI ID
763  * @pf: The PF pointer to search in
764  * @vsi_num: The VSI ID to search for
765  */
766 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
767 {
768 	int i;
769 
770 	ice_for_each_vsi(pf, i)
771 		if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
772 			return  pf->vsi[i];
773 	return NULL;
774 }
775 
776 /**
777  * ice_is_switchdev_running - check if switchdev is configured
778  * @pf: pointer to PF structure
779  *
780  * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
781  * and switchdev is configured, false otherwise.
782  */
783 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
784 {
785 	return pf->switchdev.is_running;
786 }
787 
788 /**
789  * ice_set_sriov_cap - enable SRIOV in PF flags
790  * @pf: PF struct
791  */
792 static inline void ice_set_sriov_cap(struct ice_pf *pf)
793 {
794 	if (pf->hw.func_caps.common_cap.sr_iov_1_1)
795 		set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
796 }
797 
798 /**
799  * ice_clear_sriov_cap - disable SRIOV in PF flags
800  * @pf: PF struct
801  */
802 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
803 {
804 	clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
805 }
806 
807 #define ICE_FD_STAT_CTR_BLOCK_COUNT	256
808 #define ICE_FD_STAT_PF_IDX(base_idx) \
809 			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
810 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
811 #define ICE_FD_STAT_CH			1
812 #define ICE_FD_CH_STAT_IDX(base_idx) \
813 			(ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
814 
815 /**
816  * ice_is_adq_active - any active ADQs
817  * @pf: pointer to PF
818  *
819  * This function returns true if there are any ADQs configured (which is
820  * determined by looking at VSI type (which should be VSI_PF), numtc, and
821  * TC_MQPRIO flag) otherwise return false
822  */
823 static inline bool ice_is_adq_active(struct ice_pf *pf)
824 {
825 	struct ice_vsi *vsi;
826 
827 	vsi = ice_get_main_vsi(pf);
828 	if (!vsi)
829 		return false;
830 
831 	/* is ADQ configured */
832 	if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
833 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
834 		return true;
835 
836 	return false;
837 }
838 
839 bool netif_is_ice(struct net_device *dev);
840 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
841 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
842 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
843 int ice_vsi_open(struct ice_vsi *vsi);
844 void ice_set_ethtool_ops(struct net_device *netdev);
845 void ice_set_ethtool_repr_ops(struct net_device *netdev);
846 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
847 u16 ice_get_avail_txq_count(struct ice_pf *pf);
848 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
849 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
850 void ice_update_vsi_stats(struct ice_vsi *vsi);
851 void ice_update_pf_stats(struct ice_pf *pf);
852 void
853 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
854 			     struct ice_q_stats stats, u64 *pkts, u64 *bytes);
855 int ice_up(struct ice_vsi *vsi);
856 int ice_down(struct ice_vsi *vsi);
857 int ice_vsi_cfg(struct ice_vsi *vsi);
858 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
859 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
860 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
861 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
862 int
863 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
864 	     u32 flags);
865 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
866 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
867 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
868 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
869 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
870 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
871 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
872 int ice_plug_aux_dev(struct ice_pf *pf);
873 void ice_unplug_aux_dev(struct ice_pf *pf);
874 int ice_init_rdma(struct ice_pf *pf);
875 const char *ice_aq_str(enum ice_aq_err aq_err);
876 bool ice_is_wol_supported(struct ice_hw *hw);
877 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
878 int
879 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
880 		    bool is_tun);
881 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
882 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
883 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
884 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
885 int
886 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
887 		      u32 *rule_locs);
888 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
889 void ice_fdir_release_flows(struct ice_hw *hw);
890 void ice_fdir_replay_flows(struct ice_hw *hw);
891 void ice_fdir_replay_fltrs(struct ice_pf *pf);
892 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
893 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
894 			  struct ice_rq_event_info *event);
895 int ice_open(struct net_device *netdev);
896 int ice_open_internal(struct net_device *netdev);
897 int ice_stop(struct net_device *netdev);
898 void ice_service_task_schedule(struct ice_pf *pf);
899 
900 /**
901  * ice_set_rdma_cap - enable RDMA support
902  * @pf: PF struct
903  */
904 static inline void ice_set_rdma_cap(struct ice_pf *pf)
905 {
906 	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
907 		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
908 		set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
909 	}
910 }
911 
912 /**
913  * ice_clear_rdma_cap - disable RDMA support
914  * @pf: PF struct
915  */
916 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
917 {
918 	/* We can directly unplug aux device here only if the flag bit
919 	 * ICE_FLAG_PLUG_AUX_DEV is not set because ice_unplug_aux_dev()
920 	 * could race with ice_plug_aux_dev() called from
921 	 * ice_service_task(). In this case we only clear that bit now and
922 	 * aux device will be unplugged later once ice_plug_aux_device()
923 	 * called from ice_service_task() finishes (see ice_service_task()).
924 	 */
925 	if (!test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags))
926 		ice_unplug_aux_dev(pf);
927 
928 	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
929 }
930 #endif /* _ICE_H_ */
931