1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/avf/virtchnl.h> 38 #include <linux/cpu_rmap.h> 39 #include <net/devlink.h> 40 #include <net/ipv6.h> 41 #include <net/xdp_sock.h> 42 #include <net/geneve.h> 43 #include <net/gre.h> 44 #include <net/udp_tunnel.h> 45 #include <net/vxlan.h> 46 #include "ice_devids.h" 47 #include "ice_type.h" 48 #include "ice_txrx.h" 49 #include "ice_dcb.h" 50 #include "ice_switch.h" 51 #include "ice_common.h" 52 #include "ice_sched.h" 53 #include "ice_virtchnl_pf.h" 54 #include "ice_sriov.h" 55 #include "ice_fdir.h" 56 #include "ice_xsk.h" 57 #include "ice_arfs.h" 58 59 #define ICE_BAR0 0 60 #define ICE_REQ_DESC_MULTIPLE 32 61 #define ICE_MIN_NUM_DESC 64 62 #define ICE_MAX_NUM_DESC 8160 63 #define ICE_DFLT_MIN_RX_DESC 512 64 #define ICE_DFLT_NUM_TX_DESC 256 65 #define ICE_DFLT_NUM_RX_DESC 2048 66 67 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 68 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 69 #define ICE_AQ_LEN 64 70 #define ICE_MBXSQ_LEN 64 71 #define ICE_MIN_LAN_TXRX_MSIX 1 72 #define ICE_MIN_LAN_OICR_MSIX 1 73 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 74 #define ICE_FDIR_MSIX 1 75 #define ICE_NO_VSI 0xffff 76 #define ICE_VSI_MAP_CONTIG 0 77 #define ICE_VSI_MAP_SCATTER 1 78 #define ICE_MAX_SCATTER_TXQS 16 79 #define ICE_MAX_SCATTER_RXQS 16 80 #define ICE_Q_WAIT_RETRY_LIMIT 10 81 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 82 #define ICE_MAX_LG_RSS_QS 256 83 #define ICE_RES_VALID_BIT 0x8000 84 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 85 #define ICE_INVAL_Q_INDEX 0xffff 86 #define ICE_INVAL_VFID 256 87 88 #define ICE_MAX_RESET_WAIT 20 89 90 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 91 92 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 93 94 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 95 96 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 97 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 98 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 99 100 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 101 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 102 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 103 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 104 105 /* Macro for each VSI in a PF */ 106 #define ice_for_each_vsi(pf, i) \ 107 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 108 109 /* Macros for each Tx/Rx ring in a VSI */ 110 #define ice_for_each_txq(vsi, i) \ 111 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 112 113 #define ice_for_each_rxq(vsi, i) \ 114 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 115 116 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 117 #define ice_for_each_alloc_txq(vsi, i) \ 118 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 119 120 #define ice_for_each_alloc_rxq(vsi, i) \ 121 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 122 123 #define ice_for_each_q_vector(vsi, i) \ 124 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 125 126 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 127 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 128 129 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 130 ICE_PROMISC_MCAST_TX | \ 131 ICE_PROMISC_UCAST_RX | \ 132 ICE_PROMISC_MCAST_RX | \ 133 ICE_PROMISC_VLAN_TX | \ 134 ICE_PROMISC_VLAN_RX) 135 136 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 137 138 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 139 ICE_PROMISC_MCAST_RX | \ 140 ICE_PROMISC_VLAN_TX | \ 141 ICE_PROMISC_VLAN_RX) 142 143 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 144 145 struct ice_txq_meta { 146 u32 q_teid; /* Tx-scheduler element identifier */ 147 u16 q_id; /* Entry in VSI's txq_map bitmap */ 148 u16 q_handle; /* Relative index of Tx queue within TC */ 149 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 150 u8 tc; /* TC number that Tx queue belongs to */ 151 }; 152 153 struct ice_tc_info { 154 u16 qoffset; 155 u16 qcount_tx; 156 u16 qcount_rx; 157 u8 netdev_tc; 158 }; 159 160 struct ice_tc_cfg { 161 u8 numtc; /* Total number of enabled TCs */ 162 u8 ena_tc; /* Tx map */ 163 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 164 }; 165 166 struct ice_res_tracker { 167 u16 num_entries; 168 u16 end; 169 u16 list[1]; 170 }; 171 172 struct ice_qs_cfg { 173 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 174 unsigned long *pf_map; 175 unsigned long pf_map_size; 176 unsigned int q_count; 177 unsigned int scatter_count; 178 u16 *vsi_map; 179 u16 vsi_map_offset; 180 u8 mapping_mode; 181 }; 182 183 struct ice_sw { 184 struct ice_pf *pf; 185 u16 sw_id; /* switch ID for this switch */ 186 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 187 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 188 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 189 }; 190 191 enum ice_state { 192 __ICE_TESTING, 193 __ICE_DOWN, 194 __ICE_NEEDS_RESTART, 195 __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 196 __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 197 __ICE_DCBNL_DEVRESET, /* set by dcbnl devreset */ 198 __ICE_PFR_REQ, /* set by driver and peers */ 199 __ICE_CORER_REQ, /* set by driver and peers */ 200 __ICE_GLOBR_REQ, /* set by driver and peers */ 201 __ICE_CORER_RECV, /* set by OICR handler */ 202 __ICE_GLOBR_RECV, /* set by OICR handler */ 203 __ICE_EMPR_RECV, /* set by OICR handler */ 204 __ICE_SUSPENDED, /* set on module remove path */ 205 __ICE_RESET_FAILED, /* set by reset/rebuild */ 206 /* When checking for the PF to be in a nominal operating state, the 207 * bits that are grouped at the beginning of the list need to be 208 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 209 * be checked. If you need to add a bit into consideration for nominal 210 * operating state, it must be added before 211 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 212 * without appropriate consideration. 213 */ 214 __ICE_STATE_NOMINAL_CHECK_BITS, 215 __ICE_ADMINQ_EVENT_PENDING, 216 __ICE_MAILBOXQ_EVENT_PENDING, 217 __ICE_MDD_EVENT_PENDING, 218 __ICE_VFLR_EVENT_PENDING, 219 __ICE_FLTR_OVERFLOW_PROMISC, 220 __ICE_VF_DIS, 221 __ICE_CFG_BUSY, 222 __ICE_SERVICE_SCHED, 223 __ICE_SERVICE_DIS, 224 __ICE_FD_FLUSH_REQ, 225 __ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 226 __ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 227 __ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 228 __ICE_LINK_DEFAULT_OVERRIDE_PENDING, 229 __ICE_PHY_INIT_COMPLETE, 230 __ICE_STATE_NBITS /* must be last */ 231 }; 232 233 enum ice_vsi_flags { 234 ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 235 ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 236 ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 237 ICE_VSI_FLAG_PROMISC_CHANGED, 238 ICE_VSI_FLAG_NBITS /* must be last */ 239 }; 240 241 /* struct that defines a VSI, associated with a dev */ 242 struct ice_vsi { 243 struct net_device *netdev; 244 struct ice_sw *vsw; /* switch this VSI is on */ 245 struct ice_pf *back; /* back pointer to PF */ 246 struct ice_port_info *port_info; /* back pointer to port_info */ 247 struct ice_ring **rx_rings; /* Rx ring array */ 248 struct ice_ring **tx_rings; /* Tx ring array */ 249 struct ice_q_vector **q_vectors; /* q_vector array */ 250 251 irqreturn_t (*irq_handler)(int irq, void *data); 252 253 u64 tx_linearize; 254 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 255 DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 256 unsigned int current_netdev_flags; 257 u32 tx_restart; 258 u32 tx_busy; 259 u32 rx_buf_failed; 260 u32 rx_page_failed; 261 u32 rx_gro_dropped; 262 u16 num_q_vectors; 263 u16 base_vector; /* IRQ base for OS reserved vectors */ 264 enum ice_vsi_type type; 265 u16 vsi_num; /* HW (absolute) index of this VSI */ 266 u16 idx; /* software index in pf->vsi[] */ 267 268 s16 vf_id; /* VF ID for SR-IOV VSIs */ 269 270 u16 ethtype; /* Ethernet protocol for pause frame */ 271 u16 num_gfltr; 272 u16 num_bfltr; 273 274 /* RSS config */ 275 u16 rss_table_size; /* HW RSS table size */ 276 u16 rss_size; /* Allocated RSS queues */ 277 u8 *rss_hkey_user; /* User configured hash keys */ 278 u8 *rss_lut_user; /* User configured lookup table entries */ 279 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 280 281 /* aRFS members only allocated for the PF VSI */ 282 #define ICE_MAX_ARFS_LIST 1024 283 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 284 struct hlist_head *arfs_fltr_list; 285 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 286 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 287 atomic_t *arfs_last_fltr_id; 288 289 /* devlink port data */ 290 struct devlink_port devlink_port; 291 bool devlink_port_registered; 292 293 u16 max_frame; 294 u16 rx_buf_len; 295 296 struct ice_aqc_vsi_props info; /* VSI properties */ 297 298 /* VSI stats */ 299 struct rtnl_link_stats64 net_stats; 300 struct ice_eth_stats eth_stats; 301 struct ice_eth_stats eth_stats_prev; 302 303 struct list_head tmp_sync_list; /* MAC filters to be synced */ 304 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 305 306 u8 irqs_ready:1; 307 u8 current_isup:1; /* Sync 'link up' logging */ 308 u8 stat_offsets_loaded:1; 309 u16 num_vlan; 310 311 /* queue information */ 312 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 313 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 314 u16 *txq_map; /* index in pf->avail_txqs */ 315 u16 *rxq_map; /* index in pf->avail_rxqs */ 316 u16 alloc_txq; /* Allocated Tx queues */ 317 u16 num_txq; /* Used Tx queues */ 318 u16 alloc_rxq; /* Allocated Rx queues */ 319 u16 num_rxq; /* Used Rx queues */ 320 u16 req_txq; /* User requested Tx queues */ 321 u16 req_rxq; /* User requested Rx queues */ 322 u16 num_rx_desc; 323 u16 num_tx_desc; 324 struct ice_tc_cfg tc_cfg; 325 struct bpf_prog *xdp_prog; 326 struct ice_ring **xdp_rings; /* XDP ring array */ 327 u16 num_xdp_txq; /* Used XDP queues */ 328 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 329 struct xsk_buff_pool **xsk_pools; 330 u16 num_xsk_pools_used; 331 u16 num_xsk_pools; 332 } ____cacheline_internodealigned_in_smp; 333 334 /* struct that defines an interrupt vector */ 335 struct ice_q_vector { 336 struct ice_vsi *vsi; 337 338 u16 v_idx; /* index in the vsi->q_vector array. */ 339 u16 reg_idx; 340 u8 num_ring_rx; /* total number of Rx rings in vector */ 341 u8 num_ring_tx; /* total number of Tx rings in vector */ 342 u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 343 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 344 * value to the device 345 */ 346 u8 intrl; 347 348 struct napi_struct napi; 349 350 struct ice_ring_container rx; 351 struct ice_ring_container tx; 352 353 cpumask_t affinity_mask; 354 struct irq_affinity_notify affinity_notify; 355 356 char name[ICE_INT_NAME_STR_LEN]; 357 } ____cacheline_internodealigned_in_smp; 358 359 enum ice_pf_flags { 360 ICE_FLAG_FLTR_SYNC, 361 ICE_FLAG_RSS_ENA, 362 ICE_FLAG_SRIOV_ENA, 363 ICE_FLAG_SRIOV_CAPABLE, 364 ICE_FLAG_DCB_CAPABLE, 365 ICE_FLAG_DCB_ENA, 366 ICE_FLAG_FD_ENA, 367 ICE_FLAG_ADV_FEATURES, 368 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 369 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 370 ICE_FLAG_NO_MEDIA, 371 ICE_FLAG_FW_LLDP_AGENT, 372 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 373 ICE_FLAG_LEGACY_RX, 374 ICE_FLAG_VF_TRUE_PROMISC_ENA, 375 ICE_FLAG_MDD_AUTO_RESET_VF, 376 ICE_FLAG_LINK_LENIENT_MODE_ENA, 377 ICE_PF_FLAGS_NBITS /* must be last */ 378 }; 379 380 struct ice_pf { 381 struct pci_dev *pdev; 382 383 struct devlink_region *nvm_region; 384 struct devlink_region *devcaps_region; 385 386 /* OS reserved IRQ details */ 387 struct msix_entry *msix_entries; 388 struct ice_res_tracker *irq_tracker; 389 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 390 * number of MSIX vectors needed for all SR-IOV VFs from the number of 391 * MSIX vectors allowed on this PF. 392 */ 393 u16 sriov_base_vector; 394 395 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 396 397 struct ice_vsi **vsi; /* VSIs created by the driver */ 398 struct ice_sw *first_sw; /* first switch created by firmware */ 399 /* Virtchnl/SR-IOV config info */ 400 struct ice_vf *vf; 401 u16 num_alloc_vfs; /* actual number of VFs allocated */ 402 u16 num_vfs_supported; /* num VFs supported for this PF */ 403 u16 num_qps_per_vf; 404 u16 num_msix_per_vf; 405 /* used to ratelimit the MDD event logging */ 406 unsigned long last_printed_mdd_jiffies; 407 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 408 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 409 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 410 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 411 unsigned long serv_tmr_period; 412 unsigned long serv_tmr_prev; 413 struct timer_list serv_tmr; 414 struct work_struct serv_task; 415 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 416 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 417 struct mutex tc_mutex; /* lock to protect TC changes */ 418 u32 msg_enable; 419 420 /* spinlock to protect the AdminQ wait list */ 421 spinlock_t aq_wait_lock; 422 struct hlist_head aq_wait_list; 423 wait_queue_head_t aq_wait_queue; 424 425 u32 hw_csum_rx_error; 426 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 427 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 428 u16 max_pf_txqs; /* Total Tx queues PF wide */ 429 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 430 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 431 u16 num_lan_tx; /* num LAN Tx queues setup */ 432 u16 num_lan_rx; /* num LAN Rx queues setup */ 433 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 434 u16 num_alloc_vsi; 435 u16 corer_count; /* Core reset count */ 436 u16 globr_count; /* Global reset count */ 437 u16 empr_count; /* EMP reset count */ 438 u16 pfr_count; /* PF reset count */ 439 440 u8 wol_ena : 1; /* software state of WoL */ 441 u32 wakeup_reason; /* last wakeup reason */ 442 struct ice_hw_port_stats stats; 443 struct ice_hw_port_stats stats_prev; 444 struct ice_hw hw; 445 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 446 #ifdef CONFIG_DCB 447 u16 dcbx_cap; 448 #endif /* CONFIG_DCB */ 449 u32 tx_timeout_count; 450 unsigned long tx_timeout_last_recovery; 451 u32 tx_timeout_recovery_level; 452 char int_name[ICE_INT_NAME_STR_LEN]; 453 u32 sw_int_count; 454 455 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 456 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 457 struct ice_link_default_override_tlv link_dflt_override; 458 }; 459 460 struct ice_netdev_priv { 461 struct ice_vsi *vsi; 462 }; 463 464 /** 465 * ice_irq_dynamic_ena - Enable default interrupt generation settings 466 * @hw: pointer to HW struct 467 * @vsi: pointer to VSI struct, can be NULL 468 * @q_vector: pointer to q_vector, can be NULL 469 */ 470 static inline void 471 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 472 struct ice_q_vector *q_vector) 473 { 474 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 475 ((struct ice_pf *)hw->back)->oicr_idx; 476 int itr = ICE_ITR_NONE; 477 u32 val; 478 479 /* clear the PBA here, as this function is meant to clean out all 480 * previous interrupts and enable the interrupt 481 */ 482 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 483 (itr << GLINT_DYN_CTL_ITR_INDX_S); 484 if (vsi) 485 if (test_bit(__ICE_DOWN, vsi->state)) 486 return; 487 wr32(hw, GLINT_DYN_CTL(vector), val); 488 } 489 490 /** 491 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 492 * @netdev: pointer to the netdev struct 493 */ 494 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 495 { 496 struct ice_netdev_priv *np = netdev_priv(netdev); 497 498 return np->vsi->back; 499 } 500 501 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 502 { 503 return !!vsi->xdp_prog; 504 } 505 506 static inline void ice_set_ring_xdp(struct ice_ring *ring) 507 { 508 ring->flags |= ICE_TX_FLAGS_RING_XDP; 509 } 510 511 /** 512 * ice_xsk_pool - get XSK buffer pool bound to a ring 513 * @ring: ring to use 514 * 515 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 516 * NULL otherwise. 517 */ 518 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring) 519 { 520 struct xsk_buff_pool **pools = ring->vsi->xsk_pools; 521 u16 qid = ring->q_index; 522 523 if (ice_ring_is_xdp(ring)) 524 qid -= ring->vsi->num_xdp_txq; 525 526 if (qid >= ring->vsi->num_xsk_pools || !pools || !pools[qid] || 527 !ice_is_xdp_ena_vsi(ring->vsi)) 528 return NULL; 529 530 return pools[qid]; 531 } 532 533 /** 534 * ice_get_main_vsi - Get the PF VSI 535 * @pf: PF instance 536 * 537 * returns pf->vsi[0], which by definition is the PF VSI 538 */ 539 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 540 { 541 if (pf->vsi) 542 return pf->vsi[0]; 543 544 return NULL; 545 } 546 547 /** 548 * ice_get_ctrl_vsi - Get the control VSI 549 * @pf: PF instance 550 */ 551 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 552 { 553 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 554 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 555 return NULL; 556 557 return pf->vsi[pf->ctrl_vsi_idx]; 558 } 559 560 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 561 #define ICE_FD_STAT_PF_IDX(base_idx) \ 562 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 563 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 564 565 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 566 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 567 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 568 void ice_set_ethtool_ops(struct net_device *netdev); 569 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 570 u16 ice_get_avail_txq_count(struct ice_pf *pf); 571 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 572 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 573 void ice_update_vsi_stats(struct ice_vsi *vsi); 574 void ice_update_pf_stats(struct ice_pf *pf); 575 int ice_up(struct ice_vsi *vsi); 576 int ice_down(struct ice_vsi *vsi); 577 int ice_vsi_cfg(struct ice_vsi *vsi); 578 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 579 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 580 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 581 int 582 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 583 u32 flags); 584 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 585 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 586 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 587 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 588 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 589 const char *ice_stat_str(enum ice_status stat_err); 590 const char *ice_aq_str(enum ice_aq_err aq_err); 591 bool ice_is_wol_supported(struct ice_pf *pf); 592 int 593 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 594 bool is_tun); 595 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 596 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 597 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 598 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 599 int 600 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 601 u32 *rule_locs); 602 void ice_fdir_release_flows(struct ice_hw *hw); 603 void ice_fdir_replay_flows(struct ice_hw *hw); 604 void ice_fdir_replay_fltrs(struct ice_pf *pf); 605 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 606 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 607 struct ice_rq_event_info *event); 608 int ice_open(struct net_device *netdev); 609 int ice_stop(struct net_device *netdev); 610 void ice_service_task_schedule(struct ice_pf *pf); 611 612 #endif /* _ICE_H_ */ 613