1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/avf/virtchnl.h> 38 #include <linux/cpu_rmap.h> 39 #include <linux/dim.h> 40 #include <net/devlink.h> 41 #include <net/ipv6.h> 42 #include <net/xdp_sock.h> 43 #include <net/xdp_sock_drv.h> 44 #include <net/geneve.h> 45 #include <net/gre.h> 46 #include <net/udp_tunnel.h> 47 #include <net/vxlan.h> 48 #if IS_ENABLED(CONFIG_DCB) 49 #include <scsi/iscsi_proto.h> 50 #endif /* CONFIG_DCB */ 51 #include "ice_devids.h" 52 #include "ice_type.h" 53 #include "ice_txrx.h" 54 #include "ice_dcb.h" 55 #include "ice_switch.h" 56 #include "ice_common.h" 57 #include "ice_sched.h" 58 #include "ice_virtchnl_pf.h" 59 #include "ice_sriov.h" 60 #include "ice_fdir.h" 61 #include "ice_xsk.h" 62 #include "ice_arfs.h" 63 #include "ice_lag.h" 64 65 #define ICE_BAR0 0 66 #define ICE_REQ_DESC_MULTIPLE 32 67 #define ICE_MIN_NUM_DESC 64 68 #define ICE_MAX_NUM_DESC 8160 69 #define ICE_DFLT_MIN_RX_DESC 512 70 #define ICE_DFLT_NUM_TX_DESC 256 71 #define ICE_DFLT_NUM_RX_DESC 2048 72 73 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 74 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 75 #define ICE_AQ_LEN 64 76 #define ICE_MBXSQ_LEN 64 77 #define ICE_MIN_LAN_TXRX_MSIX 1 78 #define ICE_MIN_LAN_OICR_MSIX 1 79 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 80 #define ICE_FDIR_MSIX 2 81 #define ICE_NO_VSI 0xffff 82 #define ICE_VSI_MAP_CONTIG 0 83 #define ICE_VSI_MAP_SCATTER 1 84 #define ICE_MAX_SCATTER_TXQS 16 85 #define ICE_MAX_SCATTER_RXQS 16 86 #define ICE_Q_WAIT_RETRY_LIMIT 10 87 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 88 #define ICE_MAX_LG_RSS_QS 256 89 #define ICE_RES_VALID_BIT 0x8000 90 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 91 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 92 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 93 #define ICE_INVAL_Q_INDEX 0xffff 94 #define ICE_INVAL_VFID 256 95 96 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 97 #define ICE_MAX_RESET_WAIT 20 98 99 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 100 101 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 102 103 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 104 105 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 106 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 107 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 108 109 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 110 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 111 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 112 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 113 114 /* Macro for each VSI in a PF */ 115 #define ice_for_each_vsi(pf, i) \ 116 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 117 118 /* Macros for each Tx/Rx ring in a VSI */ 119 #define ice_for_each_txq(vsi, i) \ 120 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 121 122 #define ice_for_each_rxq(vsi, i) \ 123 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 124 125 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 126 #define ice_for_each_alloc_txq(vsi, i) \ 127 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 128 129 #define ice_for_each_alloc_rxq(vsi, i) \ 130 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 131 132 #define ice_for_each_q_vector(vsi, i) \ 133 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 134 135 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 136 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 137 138 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 139 ICE_PROMISC_MCAST_TX | \ 140 ICE_PROMISC_UCAST_RX | \ 141 ICE_PROMISC_MCAST_RX | \ 142 ICE_PROMISC_VLAN_TX | \ 143 ICE_PROMISC_VLAN_RX) 144 145 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 146 147 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 148 ICE_PROMISC_MCAST_RX | \ 149 ICE_PROMISC_VLAN_TX | \ 150 ICE_PROMISC_VLAN_RX) 151 152 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 153 154 struct ice_txq_meta { 155 u32 q_teid; /* Tx-scheduler element identifier */ 156 u16 q_id; /* Entry in VSI's txq_map bitmap */ 157 u16 q_handle; /* Relative index of Tx queue within TC */ 158 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 159 u8 tc; /* TC number that Tx queue belongs to */ 160 }; 161 162 struct ice_tc_info { 163 u16 qoffset; 164 u16 qcount_tx; 165 u16 qcount_rx; 166 u8 netdev_tc; 167 }; 168 169 struct ice_tc_cfg { 170 u8 numtc; /* Total number of enabled TCs */ 171 u8 ena_tc; /* Tx map */ 172 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 173 }; 174 175 struct ice_res_tracker { 176 u16 num_entries; 177 u16 end; 178 u16 list[]; 179 }; 180 181 struct ice_qs_cfg { 182 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 183 unsigned long *pf_map; 184 unsigned long pf_map_size; 185 unsigned int q_count; 186 unsigned int scatter_count; 187 u16 *vsi_map; 188 u16 vsi_map_offset; 189 u8 mapping_mode; 190 }; 191 192 struct ice_sw { 193 struct ice_pf *pf; 194 u16 sw_id; /* switch ID for this switch */ 195 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 196 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 197 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 198 }; 199 200 enum ice_pf_state { 201 ICE_TESTING, 202 ICE_DOWN, 203 ICE_NEEDS_RESTART, 204 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 205 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 206 ICE_PFR_REQ, /* set by driver and peers */ 207 ICE_CORER_REQ, /* set by driver and peers */ 208 ICE_GLOBR_REQ, /* set by driver and peers */ 209 ICE_CORER_RECV, /* set by OICR handler */ 210 ICE_GLOBR_RECV, /* set by OICR handler */ 211 ICE_EMPR_RECV, /* set by OICR handler */ 212 ICE_SUSPENDED, /* set on module remove path */ 213 ICE_RESET_FAILED, /* set by reset/rebuild */ 214 /* When checking for the PF to be in a nominal operating state, the 215 * bits that are grouped at the beginning of the list need to be 216 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 217 * be checked. If you need to add a bit into consideration for nominal 218 * operating state, it must be added before 219 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 220 * without appropriate consideration. 221 */ 222 ICE_STATE_NOMINAL_CHECK_BITS, 223 ICE_ADMINQ_EVENT_PENDING, 224 ICE_MAILBOXQ_EVENT_PENDING, 225 ICE_MDD_EVENT_PENDING, 226 ICE_VFLR_EVENT_PENDING, 227 ICE_FLTR_OVERFLOW_PROMISC, 228 ICE_VF_DIS, 229 ICE_CFG_BUSY, 230 ICE_SERVICE_SCHED, 231 ICE_SERVICE_DIS, 232 ICE_FD_FLUSH_REQ, 233 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 234 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 235 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 236 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 237 ICE_PHY_INIT_COMPLETE, 238 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 239 ICE_STATE_NBITS /* must be last */ 240 }; 241 242 enum ice_vsi_state { 243 ICE_VSI_DOWN, 244 ICE_VSI_NEEDS_RESTART, 245 ICE_VSI_NETDEV_ALLOCD, 246 ICE_VSI_NETDEV_REGISTERED, 247 ICE_VSI_UMAC_FLTR_CHANGED, 248 ICE_VSI_MMAC_FLTR_CHANGED, 249 ICE_VSI_VLAN_FLTR_CHANGED, 250 ICE_VSI_PROMISC_CHANGED, 251 ICE_VSI_STATE_NBITS /* must be last */ 252 }; 253 254 /* struct that defines a VSI, associated with a dev */ 255 struct ice_vsi { 256 struct net_device *netdev; 257 struct ice_sw *vsw; /* switch this VSI is on */ 258 struct ice_pf *back; /* back pointer to PF */ 259 struct ice_port_info *port_info; /* back pointer to port_info */ 260 struct ice_ring **rx_rings; /* Rx ring array */ 261 struct ice_ring **tx_rings; /* Tx ring array */ 262 struct ice_q_vector **q_vectors; /* q_vector array */ 263 264 irqreturn_t (*irq_handler)(int irq, void *data); 265 266 u64 tx_linearize; 267 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 268 unsigned int current_netdev_flags; 269 u32 tx_restart; 270 u32 tx_busy; 271 u32 rx_buf_failed; 272 u32 rx_page_failed; 273 u16 num_q_vectors; 274 u16 base_vector; /* IRQ base for OS reserved vectors */ 275 enum ice_vsi_type type; 276 u16 vsi_num; /* HW (absolute) index of this VSI */ 277 u16 idx; /* software index in pf->vsi[] */ 278 279 s16 vf_id; /* VF ID for SR-IOV VSIs */ 280 281 u16 ethtype; /* Ethernet protocol for pause frame */ 282 u16 num_gfltr; 283 u16 num_bfltr; 284 285 /* RSS config */ 286 u16 rss_table_size; /* HW RSS table size */ 287 u16 rss_size; /* Allocated RSS queues */ 288 u8 *rss_hkey_user; /* User configured hash keys */ 289 u8 *rss_lut_user; /* User configured lookup table entries */ 290 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 291 292 /* aRFS members only allocated for the PF VSI */ 293 #define ICE_MAX_ARFS_LIST 1024 294 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 295 struct hlist_head *arfs_fltr_list; 296 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 297 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 298 atomic_t *arfs_last_fltr_id; 299 300 /* devlink port data */ 301 struct devlink_port devlink_port; 302 bool devlink_port_registered; 303 304 u16 max_frame; 305 u16 rx_buf_len; 306 307 struct ice_aqc_vsi_props info; /* VSI properties */ 308 309 /* VSI stats */ 310 struct rtnl_link_stats64 net_stats; 311 struct ice_eth_stats eth_stats; 312 struct ice_eth_stats eth_stats_prev; 313 314 struct list_head tmp_sync_list; /* MAC filters to be synced */ 315 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 316 317 u8 irqs_ready:1; 318 u8 current_isup:1; /* Sync 'link up' logging */ 319 u8 stat_offsets_loaded:1; 320 u16 num_vlan; 321 322 /* queue information */ 323 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 324 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 325 u16 *txq_map; /* index in pf->avail_txqs */ 326 u16 *rxq_map; /* index in pf->avail_rxqs */ 327 u16 alloc_txq; /* Allocated Tx queues */ 328 u16 num_txq; /* Used Tx queues */ 329 u16 alloc_rxq; /* Allocated Rx queues */ 330 u16 num_rxq; /* Used Rx queues */ 331 u16 req_txq; /* User requested Tx queues */ 332 u16 req_rxq; /* User requested Rx queues */ 333 u16 num_rx_desc; 334 u16 num_tx_desc; 335 struct ice_tc_cfg tc_cfg; 336 struct bpf_prog *xdp_prog; 337 struct ice_ring **xdp_rings; /* XDP ring array */ 338 u16 num_xdp_txq; /* Used XDP queues */ 339 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 340 341 /* setup back reference, to which aggregator node this VSI 342 * corresponds to 343 */ 344 struct ice_agg_node *agg_node; 345 } ____cacheline_internodealigned_in_smp; 346 347 /* struct that defines an interrupt vector */ 348 struct ice_q_vector { 349 struct ice_vsi *vsi; 350 351 u16 v_idx; /* index in the vsi->q_vector array. */ 352 u16 reg_idx; 353 u8 num_ring_rx; /* total number of Rx rings in vector */ 354 u8 num_ring_tx; /* total number of Tx rings in vector */ 355 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 356 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 357 * value to the device 358 */ 359 u8 intrl; 360 361 struct napi_struct napi; 362 363 struct ice_ring_container rx; 364 struct ice_ring_container tx; 365 366 cpumask_t affinity_mask; 367 struct irq_affinity_notify affinity_notify; 368 369 char name[ICE_INT_NAME_STR_LEN]; 370 371 u16 total_events; /* net_dim(): number of interrupts processed */ 372 } ____cacheline_internodealigned_in_smp; 373 374 enum ice_pf_flags { 375 ICE_FLAG_FLTR_SYNC, 376 ICE_FLAG_RSS_ENA, 377 ICE_FLAG_SRIOV_ENA, 378 ICE_FLAG_SRIOV_CAPABLE, 379 ICE_FLAG_DCB_CAPABLE, 380 ICE_FLAG_DCB_ENA, 381 ICE_FLAG_FD_ENA, 382 ICE_FLAG_ADV_FEATURES, 383 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 384 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 385 ICE_FLAG_NO_MEDIA, 386 ICE_FLAG_FW_LLDP_AGENT, 387 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 388 ICE_FLAG_LEGACY_RX, 389 ICE_FLAG_VF_TRUE_PROMISC_ENA, 390 ICE_FLAG_MDD_AUTO_RESET_VF, 391 ICE_FLAG_LINK_LENIENT_MODE_ENA, 392 ICE_PF_FLAGS_NBITS /* must be last */ 393 }; 394 395 struct ice_agg_node { 396 u32 agg_id; 397 #define ICE_MAX_VSIS_IN_AGG_NODE 64 398 u32 num_vsis; 399 u8 valid; 400 }; 401 402 struct ice_pf { 403 struct pci_dev *pdev; 404 405 struct devlink_region *nvm_region; 406 struct devlink_region *devcaps_region; 407 408 /* OS reserved IRQ details */ 409 struct msix_entry *msix_entries; 410 struct ice_res_tracker *irq_tracker; 411 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 412 * number of MSIX vectors needed for all SR-IOV VFs from the number of 413 * MSIX vectors allowed on this PF. 414 */ 415 u16 sriov_base_vector; 416 417 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 418 419 struct ice_vsi **vsi; /* VSIs created by the driver */ 420 struct ice_sw *first_sw; /* first switch created by firmware */ 421 /* Virtchnl/SR-IOV config info */ 422 struct ice_vf *vf; 423 u16 num_alloc_vfs; /* actual number of VFs allocated */ 424 u16 num_vfs_supported; /* num VFs supported for this PF */ 425 u16 num_qps_per_vf; 426 u16 num_msix_per_vf; 427 /* used to ratelimit the MDD event logging */ 428 unsigned long last_printed_mdd_jiffies; 429 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT); 430 DECLARE_BITMAP(state, ICE_STATE_NBITS); 431 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 432 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 433 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 434 unsigned long serv_tmr_period; 435 unsigned long serv_tmr_prev; 436 struct timer_list serv_tmr; 437 struct work_struct serv_task; 438 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 439 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 440 struct mutex tc_mutex; /* lock to protect TC changes */ 441 u32 msg_enable; 442 443 /* spinlock to protect the AdminQ wait list */ 444 spinlock_t aq_wait_lock; 445 struct hlist_head aq_wait_list; 446 wait_queue_head_t aq_wait_queue; 447 448 u32 hw_csum_rx_error; 449 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 450 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 451 u16 max_pf_txqs; /* Total Tx queues PF wide */ 452 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 453 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 454 u16 num_lan_tx; /* num LAN Tx queues setup */ 455 u16 num_lan_rx; /* num LAN Rx queues setup */ 456 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 457 u16 num_alloc_vsi; 458 u16 corer_count; /* Core reset count */ 459 u16 globr_count; /* Global reset count */ 460 u16 empr_count; /* EMP reset count */ 461 u16 pfr_count; /* PF reset count */ 462 463 u8 wol_ena : 1; /* software state of WoL */ 464 u32 wakeup_reason; /* last wakeup reason */ 465 struct ice_hw_port_stats stats; 466 struct ice_hw_port_stats stats_prev; 467 struct ice_hw hw; 468 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 469 u16 dcbx_cap; 470 u32 tx_timeout_count; 471 unsigned long tx_timeout_last_recovery; 472 u32 tx_timeout_recovery_level; 473 char int_name[ICE_INT_NAME_STR_LEN]; 474 u32 sw_int_count; 475 476 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 477 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 478 struct ice_link_default_override_tlv link_dflt_override; 479 struct ice_lag *lag; /* Link Aggregation information */ 480 481 #define ICE_INVALID_AGG_NODE_ID 0 482 #define ICE_PF_AGG_NODE_ID_START 1 483 #define ICE_MAX_PF_AGG_NODES 32 484 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 485 #define ICE_VF_AGG_NODE_ID_START 65 486 #define ICE_MAX_VF_AGG_NODES 32 487 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 488 }; 489 490 struct ice_netdev_priv { 491 struct ice_vsi *vsi; 492 }; 493 494 /** 495 * ice_irq_dynamic_ena - Enable default interrupt generation settings 496 * @hw: pointer to HW struct 497 * @vsi: pointer to VSI struct, can be NULL 498 * @q_vector: pointer to q_vector, can be NULL 499 */ 500 static inline void 501 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 502 struct ice_q_vector *q_vector) 503 { 504 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 505 ((struct ice_pf *)hw->back)->oicr_idx; 506 int itr = ICE_ITR_NONE; 507 u32 val; 508 509 /* clear the PBA here, as this function is meant to clean out all 510 * previous interrupts and enable the interrupt 511 */ 512 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 513 (itr << GLINT_DYN_CTL_ITR_INDX_S); 514 if (vsi) 515 if (test_bit(ICE_VSI_DOWN, vsi->state)) 516 return; 517 wr32(hw, GLINT_DYN_CTL(vector), val); 518 } 519 520 /** 521 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 522 * @netdev: pointer to the netdev struct 523 */ 524 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 525 { 526 struct ice_netdev_priv *np = netdev_priv(netdev); 527 528 return np->vsi->back; 529 } 530 531 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 532 { 533 return !!vsi->xdp_prog; 534 } 535 536 static inline void ice_set_ring_xdp(struct ice_ring *ring) 537 { 538 ring->flags |= ICE_TX_FLAGS_RING_XDP; 539 } 540 541 /** 542 * ice_xsk_pool - get XSK buffer pool bound to a ring 543 * @ring: ring to use 544 * 545 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 546 * NULL otherwise. 547 */ 548 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring) 549 { 550 u16 qid = ring->q_index; 551 552 if (ice_ring_is_xdp(ring)) 553 qid -= ring->vsi->num_xdp_txq; 554 555 if (!ice_is_xdp_ena_vsi(ring->vsi)) 556 return NULL; 557 558 return xsk_get_pool_from_qid(ring->vsi->netdev, qid); 559 } 560 561 /** 562 * ice_get_main_vsi - Get the PF VSI 563 * @pf: PF instance 564 * 565 * returns pf->vsi[0], which by definition is the PF VSI 566 */ 567 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 568 { 569 if (pf->vsi) 570 return pf->vsi[0]; 571 572 return NULL; 573 } 574 575 /** 576 * ice_get_ctrl_vsi - Get the control VSI 577 * @pf: PF instance 578 */ 579 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 580 { 581 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 582 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 583 return NULL; 584 585 return pf->vsi[pf->ctrl_vsi_idx]; 586 } 587 588 /** 589 * ice_set_sriov_cap - enable SRIOV in PF flags 590 * @pf: PF struct 591 */ 592 static inline void ice_set_sriov_cap(struct ice_pf *pf) 593 { 594 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 595 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 596 } 597 598 /** 599 * ice_clear_sriov_cap - disable SRIOV in PF flags 600 * @pf: PF struct 601 */ 602 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 603 { 604 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 605 } 606 607 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 608 #define ICE_FD_STAT_PF_IDX(base_idx) \ 609 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 610 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 611 612 bool netif_is_ice(struct net_device *dev); 613 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 614 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 615 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 616 void ice_set_ethtool_ops(struct net_device *netdev); 617 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 618 u16 ice_get_avail_txq_count(struct ice_pf *pf); 619 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 620 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 621 void ice_update_vsi_stats(struct ice_vsi *vsi); 622 void ice_update_pf_stats(struct ice_pf *pf); 623 int ice_up(struct ice_vsi *vsi); 624 int ice_down(struct ice_vsi *vsi); 625 int ice_vsi_cfg(struct ice_vsi *vsi); 626 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 627 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 628 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 629 int 630 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 631 u32 flags); 632 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 633 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 634 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 635 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 636 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 637 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 638 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 639 const char *ice_stat_str(enum ice_status stat_err); 640 const char *ice_aq_str(enum ice_aq_err aq_err); 641 bool ice_is_wol_supported(struct ice_hw *hw); 642 int 643 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 644 bool is_tun); 645 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 646 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 647 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 648 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 649 int 650 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 651 u32 *rule_locs); 652 void ice_fdir_release_flows(struct ice_hw *hw); 653 void ice_fdir_replay_flows(struct ice_hw *hw); 654 void ice_fdir_replay_fltrs(struct ice_pf *pf); 655 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 656 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 657 struct ice_rq_event_info *event); 658 int ice_open(struct net_device *netdev); 659 int ice_open_internal(struct net_device *netdev); 660 int ice_stop(struct net_device *netdev); 661 void ice_service_task_schedule(struct ice_pf *pf); 662 663 #endif /* _ICE_H_ */ 664