xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision 1fa0a7dc)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/netdevice.h>
12 #include <linux/compiler.h>
13 #include <linux/etherdevice.h>
14 #include <linux/skbuff.h>
15 #include <linux/cpumask.h>
16 #include <linux/rtnetlink.h>
17 #include <linux/if_vlan.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/workqueue.h>
21 #include <linux/aer.h>
22 #include <linux/interrupt.h>
23 #include <linux/ethtool.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/bitmap.h>
27 #include <linux/log2.h>
28 #include <linux/ip.h>
29 #include <linux/sctp.h>
30 #include <linux/ipv6.h>
31 #include <linux/if_bridge.h>
32 #include <linux/avf/virtchnl.h>
33 #include <net/ipv6.h>
34 #include "ice_devids.h"
35 #include "ice_type.h"
36 #include "ice_txrx.h"
37 #include "ice_dcb.h"
38 #include "ice_switch.h"
39 #include "ice_common.h"
40 #include "ice_sched.h"
41 #include "ice_virtchnl_pf.h"
42 #include "ice_sriov.h"
43 
44 extern const char ice_drv_ver[];
45 #define ICE_BAR0		0
46 #define ICE_REQ_DESC_MULTIPLE	32
47 #define ICE_MIN_NUM_DESC	ICE_REQ_DESC_MULTIPLE
48 #define ICE_MAX_NUM_DESC	8160
49 /* set default number of Rx/Tx descriptors to the minimum between
50  * ICE_MAX_NUM_DESC and the number of descriptors to fill up an entire page
51  */
52 #define ICE_DFLT_NUM_RX_DESC	min_t(u16, ICE_MAX_NUM_DESC, \
53 				      ALIGN(PAGE_SIZE / \
54 					    sizeof(union ice_32byte_rx_desc), \
55 					    ICE_REQ_DESC_MULTIPLE))
56 #define ICE_DFLT_NUM_TX_DESC	min_t(u16, ICE_MAX_NUM_DESC, \
57 				      ALIGN(PAGE_SIZE / \
58 					    sizeof(struct ice_tx_desc), \
59 					    ICE_REQ_DESC_MULTIPLE))
60 
61 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
62 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
63 #define ICE_ETHTOOL_FWVER_LEN	32
64 #define ICE_AQ_LEN		64
65 #define ICE_MBXQ_LEN		64
66 #define ICE_MIN_MSIX		2
67 #define ICE_NO_VSI		0xffff
68 #define ICE_MAX_TXQS		2048
69 #define ICE_MAX_RXQS		2048
70 #define ICE_VSI_MAP_CONTIG	0
71 #define ICE_VSI_MAP_SCATTER	1
72 #define ICE_MAX_SCATTER_TXQS	16
73 #define ICE_MAX_SCATTER_RXQS	16
74 #define ICE_Q_WAIT_RETRY_LIMIT	10
75 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
76 #define ICE_MAX_LG_RSS_QS	256
77 #define ICE_MAX_SMALL_RSS_QS	8
78 #define ICE_RES_VALID_BIT	0x8000
79 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
80 #define ICE_INVAL_Q_INDEX	0xffff
81 #define ICE_INVAL_VFID		256
82 #define ICE_MAX_VF_COUNT	256
83 #define ICE_MAX_QS_PER_VF		256
84 #define ICE_MIN_QS_PER_VF		1
85 #define ICE_DFLT_QS_PER_VF		4
86 #define ICE_NONQ_VECS_VF		1
87 #define ICE_MAX_SCATTER_QS_PER_VF	16
88 #define ICE_MAX_BASE_QS_PER_VF		16
89 #define ICE_MAX_INTR_PER_VF		65
90 #define ICE_MIN_INTR_PER_VF		(ICE_MIN_QS_PER_VF + 1)
91 #define ICE_DFLT_INTR_PER_VF		(ICE_DFLT_QS_PER_VF + 1)
92 
93 #define ICE_MAX_RESET_WAIT		20
94 
95 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
96 
97 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
98 
99 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \
100 			(ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2)))
101 
102 #define ICE_UP_TABLE_TRANSLATE(val, i) \
103 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
104 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
105 
106 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
107 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
108 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
109 
110 /* Macro for each VSI in a PF */
111 #define ice_for_each_vsi(pf, i) \
112 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
113 
114 /* Macros for each Tx/Rx ring in a VSI */
115 #define ice_for_each_txq(vsi, i) \
116 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
117 
118 #define ice_for_each_rxq(vsi, i) \
119 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
120 
121 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
122 #define ice_for_each_alloc_txq(vsi, i) \
123 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
124 
125 #define ice_for_each_alloc_rxq(vsi, i) \
126 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
127 
128 #define ice_for_each_q_vector(vsi, i) \
129 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
130 
131 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
132 				ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
133 
134 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
135 				     ICE_PROMISC_MCAST_TX | \
136 				     ICE_PROMISC_UCAST_RX | \
137 				     ICE_PROMISC_MCAST_RX | \
138 				     ICE_PROMISC_VLAN_TX  | \
139 				     ICE_PROMISC_VLAN_RX)
140 
141 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
142 
143 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
144 				     ICE_PROMISC_MCAST_RX | \
145 				     ICE_PROMISC_VLAN_TX  | \
146 				     ICE_PROMISC_VLAN_RX)
147 
148 struct ice_tc_info {
149 	u16 qoffset;
150 	u16 qcount_tx;
151 	u16 qcount_rx;
152 	u8 netdev_tc;
153 };
154 
155 struct ice_tc_cfg {
156 	u8 numtc; /* Total number of enabled TCs */
157 	u8 ena_tc; /* Tx map */
158 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
159 };
160 
161 struct ice_res_tracker {
162 	u16 num_entries;
163 	u16 search_hint;
164 	u16 list[1];
165 };
166 
167 struct ice_qs_cfg {
168 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
169 	unsigned long *pf_map;
170 	unsigned long pf_map_size;
171 	unsigned int q_count;
172 	unsigned int scatter_count;
173 	u16 *vsi_map;
174 	u16 vsi_map_offset;
175 	u8 mapping_mode;
176 };
177 
178 struct ice_sw {
179 	struct ice_pf *pf;
180 	u16 sw_id;		/* switch ID for this switch */
181 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
182 };
183 
184 enum ice_state {
185 	__ICE_DOWN,
186 	__ICE_NEEDS_RESTART,
187 	__ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
188 	__ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
189 	__ICE_PFR_REQ,			/* set by driver and peers */
190 	__ICE_CORER_REQ,		/* set by driver and peers */
191 	__ICE_GLOBR_REQ,		/* set by driver and peers */
192 	__ICE_CORER_RECV,		/* set by OICR handler */
193 	__ICE_GLOBR_RECV,		/* set by OICR handler */
194 	__ICE_EMPR_RECV,		/* set by OICR handler */
195 	__ICE_SUSPENDED,		/* set on module remove path */
196 	__ICE_RESET_FAILED,		/* set by reset/rebuild */
197 	/* When checking for the PF to be in a nominal operating state, the
198 	 * bits that are grouped at the beginning of the list need to be
199 	 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
200 	 * be checked. If you need to add a bit into consideration for nominal
201 	 * operating state, it must be added before
202 	 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
203 	 * without appropriate consideration.
204 	 */
205 	__ICE_STATE_NOMINAL_CHECK_BITS,
206 	__ICE_ADMINQ_EVENT_PENDING,
207 	__ICE_MAILBOXQ_EVENT_PENDING,
208 	__ICE_MDD_EVENT_PENDING,
209 	__ICE_VFLR_EVENT_PENDING,
210 	__ICE_FLTR_OVERFLOW_PROMISC,
211 	__ICE_VF_DIS,
212 	__ICE_CFG_BUSY,
213 	__ICE_SERVICE_SCHED,
214 	__ICE_SERVICE_DIS,
215 	__ICE_STATE_NBITS		/* must be last */
216 };
217 
218 enum ice_vsi_flags {
219 	ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
220 	ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
221 	ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
222 	ICE_VSI_FLAG_PROMISC_CHANGED,
223 	ICE_VSI_FLAG_NBITS		/* must be last */
224 };
225 
226 /* struct that defines a VSI, associated with a dev */
227 struct ice_vsi {
228 	struct net_device *netdev;
229 	struct ice_sw *vsw;		 /* switch this VSI is on */
230 	struct ice_pf *back;		 /* back pointer to PF */
231 	struct ice_port_info *port_info; /* back pointer to port_info */
232 	struct ice_ring **rx_rings;	 /* Rx ring array */
233 	struct ice_ring **tx_rings;	 /* Tx ring array */
234 	struct ice_q_vector **q_vectors; /* q_vector array */
235 
236 	irqreturn_t (*irq_handler)(int irq, void *data);
237 
238 	u64 tx_linearize;
239 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
240 	DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
241 	unsigned int current_netdev_flags;
242 	u32 tx_restart;
243 	u32 tx_busy;
244 	u32 rx_buf_failed;
245 	u32 rx_page_failed;
246 	int num_q_vectors;
247 	int sw_base_vector;		/* Irq base for OS reserved vectors */
248 	int hw_base_vector;		/* HW (absolute) index of a vector */
249 	enum ice_vsi_type type;
250 	u16 vsi_num;			/* HW (absolute) index of this VSI */
251 	u16 idx;			/* software index in pf->vsi[] */
252 
253 	/* Interrupt thresholds */
254 	u16 work_lmt;
255 
256 	s16 vf_id;			/* VF ID for SR-IOV VSIs */
257 
258 	u16 ethtype;			/* Ethernet protocol for pause frame */
259 
260 	/* RSS config */
261 	u16 rss_table_size;	/* HW RSS table size */
262 	u16 rss_size;		/* Allocated RSS queues */
263 	u8 *rss_hkey_user;	/* User configured hash keys */
264 	u8 *rss_lut_user;	/* User configured lookup table entries */
265 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
266 
267 	u16 max_frame;
268 	u16 rx_buf_len;
269 
270 	struct ice_aqc_vsi_props info;	 /* VSI properties */
271 
272 	/* VSI stats */
273 	struct rtnl_link_stats64 net_stats;
274 	struct ice_eth_stats eth_stats;
275 	struct ice_eth_stats eth_stats_prev;
276 
277 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
278 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
279 
280 	u8 irqs_ready;
281 	u8 current_isup;		 /* Sync 'link up' logging */
282 	u8 stat_offsets_loaded;
283 	u8 vlan_ena;
284 
285 	/* queue information */
286 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
287 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
288 	u16 txq_map[ICE_MAX_TXQS];	 /* index in pf->avail_txqs */
289 	u16 rxq_map[ICE_MAX_RXQS];	 /* index in pf->avail_rxqs */
290 	u16 alloc_txq;			 /* Allocated Tx queues */
291 	u16 num_txq;			 /* Used Tx queues */
292 	u16 alloc_rxq;			 /* Allocated Rx queues */
293 	u16 num_rxq;			 /* Used Rx queues */
294 	u16 num_rx_desc;
295 	u16 num_tx_desc;
296 	struct ice_tc_cfg tc_cfg;
297 } ____cacheline_internodealigned_in_smp;
298 
299 /* struct that defines an interrupt vector */
300 struct ice_q_vector {
301 	struct ice_vsi *vsi;
302 
303 	u16 v_idx;			/* index in the vsi->q_vector array. */
304 	u16 reg_idx;
305 	u8 num_ring_rx;			/* total number of Rx rings in vector */
306 	u8 num_ring_tx;			/* total number of Tx rings in vector */
307 	u8 itr_countdown;		/* when 0 should adjust adaptive ITR */
308 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
309 	 * value to the device
310 	 */
311 	u8 intrl;
312 
313 	struct napi_struct napi;
314 
315 	struct ice_ring_container rx;
316 	struct ice_ring_container tx;
317 
318 	cpumask_t affinity_mask;
319 	struct irq_affinity_notify affinity_notify;
320 
321 	char name[ICE_INT_NAME_STR_LEN];
322 } ____cacheline_internodealigned_in_smp;
323 
324 enum ice_pf_flags {
325 	ICE_FLAG_MSIX_ENA,
326 	ICE_FLAG_FLTR_SYNC,
327 	ICE_FLAG_RSS_ENA,
328 	ICE_FLAG_SRIOV_ENA,
329 	ICE_FLAG_SRIOV_CAPABLE,
330 	ICE_FLAG_DCB_CAPABLE,
331 	ICE_FLAG_DCB_ENA,
332 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
333 	ICE_FLAG_DISABLE_FW_LLDP,
334 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
335 	ICE_PF_FLAGS_NBITS		/* must be last */
336 };
337 
338 struct ice_pf {
339 	struct pci_dev *pdev;
340 
341 	/* OS reserved IRQ details */
342 	struct msix_entry *msix_entries;
343 	struct ice_res_tracker *sw_irq_tracker;
344 
345 	/* HW reserved Interrupts for this PF */
346 	struct ice_res_tracker *hw_irq_tracker;
347 
348 	struct ice_vsi **vsi;		/* VSIs created by the driver */
349 	struct ice_sw *first_sw;	/* first switch created by firmware */
350 	/* Virtchnl/SR-IOV config info */
351 	struct ice_vf *vf;
352 	int num_alloc_vfs;		/* actual number of VFs allocated */
353 	u16 num_vfs_supported;		/* num VFs supported for this PF */
354 	u16 num_vf_qps;			/* num queue pairs per VF */
355 	u16 num_vf_msix;		/* num vectors per VF */
356 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
357 	DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS);
358 	DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS);
359 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
360 	unsigned long serv_tmr_period;
361 	unsigned long serv_tmr_prev;
362 	struct timer_list serv_tmr;
363 	struct work_struct serv_task;
364 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
365 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
366 	u32 msg_enable;
367 	u32 hw_csum_rx_error;
368 	u32 sw_oicr_idx;	/* Other interrupt cause SW vector index */
369 	u32 num_avail_sw_msix;	/* remaining MSIX SW vectors left unclaimed */
370 	u32 hw_oicr_idx;	/* Other interrupt cause vector HW index */
371 	u32 num_avail_hw_msix;	/* remaining HW MSIX vectors left unclaimed */
372 	u32 num_lan_msix;	/* Total MSIX vectors for base driver */
373 	u16 num_lan_tx;		/* num LAN Tx queues setup */
374 	u16 num_lan_rx;		/* num LAN Rx queues setup */
375 	u16 q_left_tx;		/* remaining num Tx queues left unclaimed */
376 	u16 q_left_rx;		/* remaining num Rx queues left unclaimed */
377 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
378 	u16 num_alloc_vsi;
379 	u16 corer_count;	/* Core reset count */
380 	u16 globr_count;	/* Global reset count */
381 	u16 empr_count;		/* EMP reset count */
382 	u16 pfr_count;		/* PF reset count */
383 
384 	struct ice_hw_port_stats stats;
385 	struct ice_hw_port_stats stats_prev;
386 	struct ice_hw hw;
387 	u8 stat_prev_loaded;	/* has previous stats been loaded */
388 #ifdef CONFIG_DCB
389 	u16 dcbx_cap;
390 #endif /* CONFIG_DCB */
391 	u32 tx_timeout_count;
392 	unsigned long tx_timeout_last_recovery;
393 	u32 tx_timeout_recovery_level;
394 	char int_name[ICE_INT_NAME_STR_LEN];
395 };
396 
397 struct ice_netdev_priv {
398 	struct ice_vsi *vsi;
399 };
400 
401 /**
402  * ice_irq_dynamic_ena - Enable default interrupt generation settings
403  * @hw: pointer to HW struct
404  * @vsi: pointer to VSI struct, can be NULL
405  * @q_vector: pointer to q_vector, can be NULL
406  */
407 static inline void
408 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
409 		    struct ice_q_vector *q_vector)
410 {
411 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
412 				((struct ice_pf *)hw->back)->hw_oicr_idx;
413 	int itr = ICE_ITR_NONE;
414 	u32 val;
415 
416 	/* clear the PBA here, as this function is meant to clean out all
417 	 * previous interrupts and enable the interrupt
418 	 */
419 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
420 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
421 	if (vsi)
422 		if (test_bit(__ICE_DOWN, vsi->state))
423 			return;
424 	wr32(hw, GLINT_DYN_CTL(vector), val);
425 }
426 
427 /**
428  * ice_find_vsi_by_type - Find and return VSI of a given type
429  * @pf: PF to search for VSI
430  * @type: Value indicating type of VSI we are looking for
431  */
432 static inline struct ice_vsi *
433 ice_find_vsi_by_type(struct ice_pf *pf, enum ice_vsi_type type)
434 {
435 	int i;
436 
437 	for (i = 0; i < pf->num_alloc_vsi; i++) {
438 		struct ice_vsi *vsi = pf->vsi[i];
439 
440 		if (vsi && vsi->type == type)
441 			return vsi;
442 	}
443 
444 	return NULL;
445 }
446 
447 void ice_set_ethtool_ops(struct net_device *netdev);
448 int ice_up(struct ice_vsi *vsi);
449 int ice_down(struct ice_vsi *vsi);
450 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
451 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
452 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
453 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
454 void ice_napi_del(struct ice_vsi *vsi);
455 #ifdef CONFIG_DCB
456 int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked);
457 void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked);
458 #endif /* CONFIG_DCB */
459 
460 #endif /* _ICE_H_ */
461