1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/compiler.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/cpumask.h> 16 #include <linux/rtnetlink.h> 17 #include <linux/if_vlan.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/pci.h> 20 #include <linux/workqueue.h> 21 #include <linux/aer.h> 22 #include <linux/interrupt.h> 23 #include <linux/ethtool.h> 24 #include <linux/timer.h> 25 #include <linux/delay.h> 26 #include <linux/bitmap.h> 27 #include <linux/log2.h> 28 #include <linux/ip.h> 29 #include <linux/sctp.h> 30 #include <linux/ipv6.h> 31 #include <linux/if_bridge.h> 32 #include <linux/avf/virtchnl.h> 33 #include <net/ipv6.h> 34 #include "ice_devids.h" 35 #include "ice_type.h" 36 #include "ice_txrx.h" 37 #include "ice_switch.h" 38 #include "ice_common.h" 39 #include "ice_sched.h" 40 #include "ice_virtchnl_pf.h" 41 #include "ice_sriov.h" 42 43 extern const char ice_drv_ver[]; 44 #define ICE_BAR0 0 45 #define ICE_DFLT_NUM_DESC 128 46 #define ICE_REQ_DESC_MULTIPLE 32 47 #define ICE_MIN_NUM_DESC ICE_REQ_DESC_MULTIPLE 48 #define ICE_MAX_NUM_DESC 8160 49 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 50 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 51 #define ICE_ETHTOOL_FWVER_LEN 32 52 #define ICE_AQ_LEN 64 53 #define ICE_MBXQ_LEN 64 54 #define ICE_MIN_MSIX 2 55 #define ICE_NO_VSI 0xffff 56 #define ICE_MAX_TXQS 2048 57 #define ICE_MAX_RXQS 2048 58 #define ICE_VSI_MAP_CONTIG 0 59 #define ICE_VSI_MAP_SCATTER 1 60 #define ICE_MAX_SCATTER_TXQS 16 61 #define ICE_MAX_SCATTER_RXQS 16 62 #define ICE_Q_WAIT_RETRY_LIMIT 10 63 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 64 #define ICE_MAX_LG_RSS_QS 256 65 #define ICE_MAX_SMALL_RSS_QS 8 66 #define ICE_RES_VALID_BIT 0x8000 67 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 68 #define ICE_INVAL_Q_INDEX 0xffff 69 #define ICE_INVAL_VFID 256 70 #define ICE_MAX_VF_COUNT 256 71 #define ICE_MAX_QS_PER_VF 256 72 #define ICE_MIN_QS_PER_VF 1 73 #define ICE_DFLT_QS_PER_VF 4 74 #define ICE_MAX_BASE_QS_PER_VF 16 75 #define ICE_MAX_INTR_PER_VF 65 76 #define ICE_MIN_INTR_PER_VF (ICE_MIN_QS_PER_VF + 1) 77 #define ICE_DFLT_INTR_PER_VF (ICE_DFLT_QS_PER_VF + 1) 78 79 #define ICE_MAX_RESET_WAIT 20 80 81 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 82 83 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 84 85 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ 86 (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) 87 88 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 89 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 90 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 91 92 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 93 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 94 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 95 96 /* Macro for each VSI in a PF */ 97 #define ice_for_each_vsi(pf, i) \ 98 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 99 100 /* Macros for each Tx/Rx ring in a VSI */ 101 #define ice_for_each_txq(vsi, i) \ 102 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 103 104 #define ice_for_each_rxq(vsi, i) \ 105 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 106 107 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 108 #define ice_for_each_alloc_txq(vsi, i) \ 109 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 110 111 #define ice_for_each_alloc_rxq(vsi, i) \ 112 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 113 114 #define ice_for_each_q_vector(vsi, i) \ 115 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 116 117 struct ice_tc_info { 118 u16 qoffset; 119 u16 qcount_tx; 120 u16 qcount_rx; 121 u8 netdev_tc; 122 }; 123 124 struct ice_tc_cfg { 125 u8 numtc; /* Total number of enabled TCs */ 126 u8 ena_tc; /* TX map */ 127 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 128 }; 129 130 struct ice_res_tracker { 131 u16 num_entries; 132 u16 search_hint; 133 u16 list[1]; 134 }; 135 136 struct ice_qs_cfg { 137 struct mutex *qs_mutex; /* will be assgined to &pf->avail_q_mutex */ 138 unsigned long *pf_map; 139 unsigned long pf_map_size; 140 unsigned int q_count; 141 unsigned int scatter_count; 142 u16 *vsi_map; 143 u16 vsi_map_offset; 144 u8 mapping_mode; 145 }; 146 147 struct ice_sw { 148 struct ice_pf *pf; 149 u16 sw_id; /* switch ID for this switch */ 150 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 151 }; 152 153 enum ice_state { 154 __ICE_DOWN, 155 __ICE_NEEDS_RESTART, 156 __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 157 __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 158 __ICE_PFR_REQ, /* set by driver and peers */ 159 __ICE_CORER_REQ, /* set by driver and peers */ 160 __ICE_GLOBR_REQ, /* set by driver and peers */ 161 __ICE_CORER_RECV, /* set by OICR handler */ 162 __ICE_GLOBR_RECV, /* set by OICR handler */ 163 __ICE_EMPR_RECV, /* set by OICR handler */ 164 __ICE_SUSPENDED, /* set on module remove path */ 165 __ICE_RESET_FAILED, /* set by reset/rebuild */ 166 /* When checking for the PF to be in a nominal operating state, the 167 * bits that are grouped at the beginning of the list need to be 168 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 169 * be checked. If you need to add a bit into consideration for nominal 170 * operating state, it must be added before 171 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 172 * without appropriate consideration. 173 */ 174 __ICE_STATE_NOMINAL_CHECK_BITS, 175 __ICE_ADMINQ_EVENT_PENDING, 176 __ICE_MAILBOXQ_EVENT_PENDING, 177 __ICE_MDD_EVENT_PENDING, 178 __ICE_VFLR_EVENT_PENDING, 179 __ICE_FLTR_OVERFLOW_PROMISC, 180 __ICE_VF_DIS, 181 __ICE_CFG_BUSY, 182 __ICE_SERVICE_SCHED, 183 __ICE_SERVICE_DIS, 184 __ICE_STATE_NBITS /* must be last */ 185 }; 186 187 enum ice_vsi_flags { 188 ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 189 ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 190 ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 191 ICE_VSI_FLAG_PROMISC_CHANGED, 192 ICE_VSI_FLAG_NBITS /* must be last */ 193 }; 194 195 /* struct that defines a VSI, associated with a dev */ 196 struct ice_vsi { 197 struct net_device *netdev; 198 struct ice_sw *vsw; /* switch this VSI is on */ 199 struct ice_pf *back; /* back pointer to PF */ 200 struct ice_port_info *port_info; /* back pointer to port_info */ 201 struct ice_ring **rx_rings; /* Rx ring array */ 202 struct ice_ring **tx_rings; /* Tx ring array */ 203 struct ice_q_vector **q_vectors; /* q_vector array */ 204 205 irqreturn_t (*irq_handler)(int irq, void *data); 206 207 u64 tx_linearize; 208 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 209 DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 210 unsigned int current_netdev_flags; 211 u32 tx_restart; 212 u32 tx_busy; 213 u32 rx_buf_failed; 214 u32 rx_page_failed; 215 int num_q_vectors; 216 int sw_base_vector; /* Irq base for OS reserved vectors */ 217 int hw_base_vector; /* HW (absolute) index of a vector */ 218 enum ice_vsi_type type; 219 u16 vsi_num; /* HW (absolute) index of this VSI */ 220 u16 idx; /* software index in pf->vsi[] */ 221 222 /* Interrupt thresholds */ 223 u16 work_lmt; 224 225 s16 vf_id; /* VF ID for SR-IOV VSIs */ 226 227 /* RSS config */ 228 u16 rss_table_size; /* HW RSS table size */ 229 u16 rss_size; /* Allocated RSS queues */ 230 u8 *rss_hkey_user; /* User configured hash keys */ 231 u8 *rss_lut_user; /* User configured lookup table entries */ 232 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 233 234 u16 max_frame; 235 u16 rx_buf_len; 236 237 struct ice_aqc_vsi_props info; /* VSI properties */ 238 239 /* VSI stats */ 240 struct rtnl_link_stats64 net_stats; 241 struct ice_eth_stats eth_stats; 242 struct ice_eth_stats eth_stats_prev; 243 244 struct list_head tmp_sync_list; /* MAC filters to be synced */ 245 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 246 247 u8 irqs_ready; 248 u8 current_isup; /* Sync 'link up' logging */ 249 u8 stat_offsets_loaded; 250 251 /* queue information */ 252 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 253 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 254 u16 txq_map[ICE_MAX_TXQS]; /* index in pf->avail_txqs */ 255 u16 rxq_map[ICE_MAX_RXQS]; /* index in pf->avail_rxqs */ 256 u16 alloc_txq; /* Allocated Tx queues */ 257 u16 num_txq; /* Used Tx queues */ 258 u16 alloc_rxq; /* Allocated Rx queues */ 259 u16 num_rxq; /* Used Rx queues */ 260 u16 num_desc; 261 struct ice_tc_cfg tc_cfg; 262 } ____cacheline_internodealigned_in_smp; 263 264 /* struct that defines an interrupt vector */ 265 struct ice_q_vector { 266 struct ice_vsi *vsi; 267 cpumask_t affinity_mask; 268 struct napi_struct napi; 269 struct ice_ring_container rx; 270 struct ice_ring_container tx; 271 struct irq_affinity_notify affinity_notify; 272 u16 v_idx; /* index in the vsi->q_vector array. */ 273 u8 num_ring_tx; /* total number of Tx rings in vector */ 274 u8 num_ring_rx; /* total number of Rx rings in vector */ 275 char name[ICE_INT_NAME_STR_LEN]; 276 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 277 * value to the device 278 */ 279 u8 intrl; 280 } ____cacheline_internodealigned_in_smp; 281 282 enum ice_pf_flags { 283 ICE_FLAG_MSIX_ENA, 284 ICE_FLAG_FLTR_SYNC, 285 ICE_FLAG_RSS_ENA, 286 ICE_FLAG_SRIOV_ENA, 287 ICE_FLAG_SRIOV_CAPABLE, 288 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 289 ICE_PF_FLAGS_NBITS /* must be last */ 290 }; 291 292 struct ice_pf { 293 struct pci_dev *pdev; 294 295 /* OS reserved IRQ details */ 296 struct msix_entry *msix_entries; 297 struct ice_res_tracker *sw_irq_tracker; 298 299 /* HW reserved Interrupts for this PF */ 300 struct ice_res_tracker *hw_irq_tracker; 301 302 struct ice_vsi **vsi; /* VSIs created by the driver */ 303 struct ice_sw *first_sw; /* first switch created by firmware */ 304 /* Virtchnl/SR-IOV config info */ 305 struct ice_vf *vf; 306 int num_alloc_vfs; /* actual number of VFs allocated */ 307 u16 num_vfs_supported; /* num VFs supported for this PF */ 308 u16 num_vf_qps; /* num queue pairs per VF */ 309 u16 num_vf_msix; /* num vectors per VF */ 310 DECLARE_BITMAP(state, __ICE_STATE_NBITS); 311 DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS); 312 DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS); 313 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 314 unsigned long serv_tmr_period; 315 unsigned long serv_tmr_prev; 316 struct timer_list serv_tmr; 317 struct work_struct serv_task; 318 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 319 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 320 u32 msg_enable; 321 u32 hw_csum_rx_error; 322 u32 sw_oicr_idx; /* Other interrupt cause SW vector index */ 323 u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 324 u32 hw_oicr_idx; /* Other interrupt cause vector HW index */ 325 u32 num_avail_hw_msix; /* remaining HW MSIX vectors left unclaimed */ 326 u32 num_lan_msix; /* Total MSIX vectors for base driver */ 327 u16 num_lan_tx; /* num lan Tx queues setup */ 328 u16 num_lan_rx; /* num lan Rx queues setup */ 329 u16 q_left_tx; /* remaining num Tx queues left unclaimed */ 330 u16 q_left_rx; /* remaining num Rx queues left unclaimed */ 331 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 332 u16 num_alloc_vsi; 333 u16 corer_count; /* Core reset count */ 334 u16 globr_count; /* Global reset count */ 335 u16 empr_count; /* EMP reset count */ 336 u16 pfr_count; /* PF reset count */ 337 338 struct ice_hw_port_stats stats; 339 struct ice_hw_port_stats stats_prev; 340 struct ice_hw hw; 341 u8 stat_prev_loaded; /* has previous stats been loaded */ 342 u32 tx_timeout_count; 343 unsigned long tx_timeout_last_recovery; 344 u32 tx_timeout_recovery_level; 345 char int_name[ICE_INT_NAME_STR_LEN]; 346 }; 347 348 struct ice_netdev_priv { 349 struct ice_vsi *vsi; 350 }; 351 352 /** 353 * ice_irq_dynamic_ena - Enable default interrupt generation settings 354 * @hw: pointer to hw struct 355 * @vsi: pointer to vsi struct, can be NULL 356 * @q_vector: pointer to q_vector, can be NULL 357 */ 358 static inline void ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 359 struct ice_q_vector *q_vector) 360 { 361 u32 vector = (vsi && q_vector) ? vsi->hw_base_vector + q_vector->v_idx : 362 ((struct ice_pf *)hw->back)->hw_oicr_idx; 363 int itr = ICE_ITR_NONE; 364 u32 val; 365 366 /* clear the PBA here, as this function is meant to clean out all 367 * previous interrupts and enable the interrupt 368 */ 369 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 370 (itr << GLINT_DYN_CTL_ITR_INDX_S); 371 if (vsi) 372 if (test_bit(__ICE_DOWN, vsi->state)) 373 return; 374 wr32(hw, GLINT_DYN_CTL(vector), val); 375 } 376 377 static inline void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 378 { 379 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 380 vsi->tc_cfg.numtc = 1; 381 } 382 383 void ice_set_ethtool_ops(struct net_device *netdev); 384 int ice_up(struct ice_vsi *vsi); 385 int ice_down(struct ice_vsi *vsi); 386 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 387 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 388 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 389 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 390 void ice_napi_del(struct ice_vsi *vsi); 391 392 #endif /* _ICE_H_ */ 393