1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <net/pkt_cls.h> 43 #include <net/tc_act/tc_mirred.h> 44 #include <net/tc_act/tc_gact.h> 45 #include <net/ip.h> 46 #include <net/devlink.h> 47 #include <net/ipv6.h> 48 #include <net/xdp_sock.h> 49 #include <net/xdp_sock_drv.h> 50 #include <net/geneve.h> 51 #include <net/gre.h> 52 #include <net/udp_tunnel.h> 53 #include <net/vxlan.h> 54 #include <net/gtp.h> 55 #include <linux/ppp_defs.h> 56 #include "ice_devids.h" 57 #include "ice_type.h" 58 #include "ice_txrx.h" 59 #include "ice_dcb.h" 60 #include "ice_switch.h" 61 #include "ice_common.h" 62 #include "ice_flow.h" 63 #include "ice_sched.h" 64 #include "ice_idc_int.h" 65 #include "ice_sriov.h" 66 #include "ice_vf_mbx.h" 67 #include "ice_ptp.h" 68 #include "ice_fdir.h" 69 #include "ice_xsk.h" 70 #include "ice_arfs.h" 71 #include "ice_repr.h" 72 #include "ice_eswitch.h" 73 #include "ice_lag.h" 74 #include "ice_vsi_vlan_ops.h" 75 #include "ice_gnss.h" 76 77 #define ICE_BAR0 0 78 #define ICE_REQ_DESC_MULTIPLE 32 79 #define ICE_MIN_NUM_DESC 64 80 #define ICE_MAX_NUM_DESC 8160 81 #define ICE_DFLT_MIN_RX_DESC 512 82 #define ICE_DFLT_NUM_TX_DESC 256 83 #define ICE_DFLT_NUM_RX_DESC 2048 84 85 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 86 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 87 #define ICE_AQ_LEN 192 88 #define ICE_MBXSQ_LEN 64 89 #define ICE_SBQ_LEN 64 90 #define ICE_MIN_LAN_TXRX_MSIX 1 91 #define ICE_MIN_LAN_OICR_MSIX 1 92 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 93 #define ICE_FDIR_MSIX 2 94 #define ICE_RDMA_NUM_AEQ_MSIX 4 95 #define ICE_MIN_RDMA_MSIX 2 96 #define ICE_ESWITCH_MSIX 1 97 #define ICE_NO_VSI 0xffff 98 #define ICE_VSI_MAP_CONTIG 0 99 #define ICE_VSI_MAP_SCATTER 1 100 #define ICE_MAX_SCATTER_TXQS 16 101 #define ICE_MAX_SCATTER_RXQS 16 102 #define ICE_Q_WAIT_RETRY_LIMIT 10 103 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 104 #define ICE_MAX_LG_RSS_QS 256 105 #define ICE_RES_VALID_BIT 0x8000 106 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 107 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 108 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 109 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 110 #define ICE_INVAL_Q_INDEX 0xffff 111 112 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 113 114 #define ICE_CHNL_START_TC 1 115 116 #define ICE_MAX_RESET_WAIT 20 117 118 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 119 120 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 121 122 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 123 124 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 125 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 126 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 127 128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 132 133 /* Minimum BW limit is 500 Kbps for any scheduler node */ 134 #define ICE_MIN_BW_LIMIT 500 135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 136 * use it to convert user specified BW limit into Kbps 137 */ 138 #define ICE_BW_KBPS_DIVISOR 125 139 140 /* Default recipes have priority 4 and below, hence priority values between 5..7 141 * can be used as filter priority for advanced switch filter (advanced switch 142 * filters need new recipe to be created for specified extraction sequence 143 * because default recipe extraction sequence does not represent custom 144 * extraction) 145 */ 146 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 147 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 148 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 149 * SYN/FIN/RST)) 150 */ 151 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 152 #define ICE_SWITCH_FLTR_PRIO_VSI 5 153 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 154 155 /* Macro for each VSI in a PF */ 156 #define ice_for_each_vsi(pf, i) \ 157 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 158 159 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 160 #define ice_for_each_txq(vsi, i) \ 161 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 162 163 #define ice_for_each_xdp_txq(vsi, i) \ 164 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 165 166 #define ice_for_each_rxq(vsi, i) \ 167 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 168 169 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 170 #define ice_for_each_alloc_txq(vsi, i) \ 171 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 172 173 #define ice_for_each_alloc_rxq(vsi, i) \ 174 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 175 176 #define ice_for_each_q_vector(vsi, i) \ 177 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 178 179 #define ice_for_each_chnl_tc(i) \ 180 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 181 182 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX) 183 184 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 185 ICE_PROMISC_UCAST_RX | \ 186 ICE_PROMISC_VLAN_TX | \ 187 ICE_PROMISC_VLAN_RX) 188 189 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 190 191 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 192 ICE_PROMISC_MCAST_RX | \ 193 ICE_PROMISC_VLAN_TX | \ 194 ICE_PROMISC_VLAN_RX) 195 196 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 197 198 enum ice_feature { 199 ICE_F_DSCP, 200 ICE_F_PTP_EXTTS, 201 ICE_F_SMA_CTRL, 202 ICE_F_GNSS, 203 ICE_F_MAX 204 }; 205 206 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 207 208 struct ice_channel { 209 struct list_head list; 210 u8 type; 211 u16 sw_id; 212 u16 base_q; 213 u16 num_rxq; 214 u16 num_txq; 215 u16 vsi_num; 216 u8 ena_tc; 217 struct ice_aqc_vsi_props info; 218 u64 max_tx_rate; 219 u64 min_tx_rate; 220 atomic_t num_sb_fltr; 221 struct ice_vsi *ch_vsi; 222 }; 223 224 struct ice_txq_meta { 225 u32 q_teid; /* Tx-scheduler element identifier */ 226 u16 q_id; /* Entry in VSI's txq_map bitmap */ 227 u16 q_handle; /* Relative index of Tx queue within TC */ 228 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 229 u8 tc; /* TC number that Tx queue belongs to */ 230 }; 231 232 struct ice_tc_info { 233 u16 qoffset; 234 u16 qcount_tx; 235 u16 qcount_rx; 236 u8 netdev_tc; 237 }; 238 239 struct ice_tc_cfg { 240 u8 numtc; /* Total number of enabled TCs */ 241 u16 ena_tc; /* Tx map */ 242 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 243 }; 244 245 struct ice_res_tracker { 246 u16 num_entries; 247 u16 end; 248 u16 list[]; 249 }; 250 251 struct ice_qs_cfg { 252 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 253 unsigned long *pf_map; 254 unsigned long pf_map_size; 255 unsigned int q_count; 256 unsigned int scatter_count; 257 u16 *vsi_map; 258 u16 vsi_map_offset; 259 u8 mapping_mode; 260 }; 261 262 struct ice_sw { 263 struct ice_pf *pf; 264 u16 sw_id; /* switch ID for this switch */ 265 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 266 }; 267 268 enum ice_pf_state { 269 ICE_TESTING, 270 ICE_DOWN, 271 ICE_NEEDS_RESTART, 272 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 273 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 274 ICE_PFR_REQ, /* set by driver */ 275 ICE_CORER_REQ, /* set by driver */ 276 ICE_GLOBR_REQ, /* set by driver */ 277 ICE_CORER_RECV, /* set by OICR handler */ 278 ICE_GLOBR_RECV, /* set by OICR handler */ 279 ICE_EMPR_RECV, /* set by OICR handler */ 280 ICE_SUSPENDED, /* set on module remove path */ 281 ICE_RESET_FAILED, /* set by reset/rebuild */ 282 /* When checking for the PF to be in a nominal operating state, the 283 * bits that are grouped at the beginning of the list need to be 284 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 285 * be checked. If you need to add a bit into consideration for nominal 286 * operating state, it must be added before 287 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 288 * without appropriate consideration. 289 */ 290 ICE_STATE_NOMINAL_CHECK_BITS, 291 ICE_ADMINQ_EVENT_PENDING, 292 ICE_MAILBOXQ_EVENT_PENDING, 293 ICE_SIDEBANDQ_EVENT_PENDING, 294 ICE_MDD_EVENT_PENDING, 295 ICE_VFLR_EVENT_PENDING, 296 ICE_FLTR_OVERFLOW_PROMISC, 297 ICE_VF_DIS, 298 ICE_CFG_BUSY, 299 ICE_SERVICE_SCHED, 300 ICE_SERVICE_DIS, 301 ICE_FD_FLUSH_REQ, 302 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 303 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 304 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 305 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 306 ICE_PHY_INIT_COMPLETE, 307 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 308 ICE_AUX_ERR_PENDING, 309 ICE_STATE_NBITS /* must be last */ 310 }; 311 312 enum ice_vsi_state { 313 ICE_VSI_DOWN, 314 ICE_VSI_NEEDS_RESTART, 315 ICE_VSI_NETDEV_ALLOCD, 316 ICE_VSI_NETDEV_REGISTERED, 317 ICE_VSI_UMAC_FLTR_CHANGED, 318 ICE_VSI_MMAC_FLTR_CHANGED, 319 ICE_VSI_PROMISC_CHANGED, 320 ICE_VSI_STATE_NBITS /* must be last */ 321 }; 322 323 struct ice_vsi_stats { 324 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 325 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 326 }; 327 328 /* struct that defines a VSI, associated with a dev */ 329 struct ice_vsi { 330 struct net_device *netdev; 331 struct ice_sw *vsw; /* switch this VSI is on */ 332 struct ice_pf *back; /* back pointer to PF */ 333 struct ice_port_info *port_info; /* back pointer to port_info */ 334 struct ice_rx_ring **rx_rings; /* Rx ring array */ 335 struct ice_tx_ring **tx_rings; /* Tx ring array */ 336 struct ice_q_vector **q_vectors; /* q_vector array */ 337 338 irqreturn_t (*irq_handler)(int irq, void *data); 339 340 u64 tx_linearize; 341 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 342 unsigned int current_netdev_flags; 343 u32 tx_restart; 344 u32 tx_busy; 345 u32 rx_buf_failed; 346 u32 rx_page_failed; 347 u16 num_q_vectors; 348 u16 base_vector; /* IRQ base for OS reserved vectors */ 349 enum ice_vsi_type type; 350 u16 vsi_num; /* HW (absolute) index of this VSI */ 351 u16 idx; /* software index in pf->vsi[] */ 352 353 struct ice_vf *vf; /* VF associated with this VSI */ 354 355 u16 ethtype; /* Ethernet protocol for pause frame */ 356 u16 num_gfltr; 357 u16 num_bfltr; 358 359 /* RSS config */ 360 u16 rss_table_size; /* HW RSS table size */ 361 u16 rss_size; /* Allocated RSS queues */ 362 u8 *rss_hkey_user; /* User configured hash keys */ 363 u8 *rss_lut_user; /* User configured lookup table entries */ 364 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 365 366 /* aRFS members only allocated for the PF VSI */ 367 #define ICE_MAX_ARFS_LIST 1024 368 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 369 struct hlist_head *arfs_fltr_list; 370 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 371 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 372 atomic_t *arfs_last_fltr_id; 373 374 u16 max_frame; 375 u16 rx_buf_len; 376 377 struct ice_aqc_vsi_props info; /* VSI properties */ 378 379 /* VSI stats */ 380 struct rtnl_link_stats64 net_stats; 381 struct rtnl_link_stats64 net_stats_prev; 382 struct ice_eth_stats eth_stats; 383 struct ice_eth_stats eth_stats_prev; 384 385 struct list_head tmp_sync_list; /* MAC filters to be synced */ 386 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 387 388 u8 irqs_ready:1; 389 u8 current_isup:1; /* Sync 'link up' logging */ 390 u8 stat_offsets_loaded:1; 391 struct ice_vsi_vlan_ops inner_vlan_ops; 392 struct ice_vsi_vlan_ops outer_vlan_ops; 393 u16 num_vlan; 394 395 /* queue information */ 396 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 397 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 398 u16 *txq_map; /* index in pf->avail_txqs */ 399 u16 *rxq_map; /* index in pf->avail_rxqs */ 400 u16 alloc_txq; /* Allocated Tx queues */ 401 u16 num_txq; /* Used Tx queues */ 402 u16 alloc_rxq; /* Allocated Rx queues */ 403 u16 num_rxq; /* Used Rx queues */ 404 u16 req_txq; /* User requested Tx queues */ 405 u16 req_rxq; /* User requested Rx queues */ 406 u16 num_rx_desc; 407 u16 num_tx_desc; 408 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 409 struct ice_tc_cfg tc_cfg; 410 struct bpf_prog *xdp_prog; 411 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 412 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 413 u16 num_xdp_txq; /* Used XDP queues */ 414 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 415 416 struct net_device **target_netdevs; 417 418 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 419 420 /* Channel Specific Fields */ 421 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 422 u16 cnt_q_avail; 423 u16 next_base_q; /* next queue to be used for channel setup */ 424 struct list_head ch_list; 425 u16 num_chnl_rxq; 426 u16 num_chnl_txq; 427 u16 ch_rss_size; 428 u16 num_chnl_fltr; 429 /* store away rss size info before configuring ADQ channels so that, 430 * it can be used after tc-qdisc delete, to get back RSS setting as 431 * they were before 432 */ 433 u16 orig_rss_size; 434 /* this keeps tracks of all enabled TC with and without DCB 435 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 436 * information 437 */ 438 u8 all_numtc; 439 u16 all_enatc; 440 441 /* store away TC info, to be used for rebuild logic */ 442 u8 old_numtc; 443 u16 old_ena_tc; 444 445 struct ice_channel *ch; 446 447 /* setup back reference, to which aggregator node this VSI 448 * corresponds to 449 */ 450 struct ice_agg_node *agg_node; 451 } ____cacheline_internodealigned_in_smp; 452 453 /* struct that defines an interrupt vector */ 454 struct ice_q_vector { 455 struct ice_vsi *vsi; 456 457 u16 v_idx; /* index in the vsi->q_vector array. */ 458 u16 reg_idx; 459 u8 num_ring_rx; /* total number of Rx rings in vector */ 460 u8 num_ring_tx; /* total number of Tx rings in vector */ 461 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 462 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 463 * value to the device 464 */ 465 u8 intrl; 466 467 struct napi_struct napi; 468 469 struct ice_ring_container rx; 470 struct ice_ring_container tx; 471 472 cpumask_t affinity_mask; 473 struct irq_affinity_notify affinity_notify; 474 475 struct ice_channel *ch; 476 477 char name[ICE_INT_NAME_STR_LEN]; 478 479 u16 total_events; /* net_dim(): number of interrupts processed */ 480 } ____cacheline_internodealigned_in_smp; 481 482 enum ice_pf_flags { 483 ICE_FLAG_FLTR_SYNC, 484 ICE_FLAG_RDMA_ENA, 485 ICE_FLAG_RSS_ENA, 486 ICE_FLAG_SRIOV_ENA, 487 ICE_FLAG_SRIOV_CAPABLE, 488 ICE_FLAG_DCB_CAPABLE, 489 ICE_FLAG_DCB_ENA, 490 ICE_FLAG_FD_ENA, 491 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 492 ICE_FLAG_PTP, /* PTP is enabled by software */ 493 ICE_FLAG_ADV_FEATURES, 494 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 495 ICE_FLAG_CLS_FLOWER, 496 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 497 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 498 ICE_FLAG_NO_MEDIA, 499 ICE_FLAG_FW_LLDP_AGENT, 500 ICE_FLAG_MOD_POWER_UNSUPPORTED, 501 ICE_FLAG_PHY_FW_LOAD_FAILED, 502 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 503 ICE_FLAG_LEGACY_RX, 504 ICE_FLAG_VF_TRUE_PROMISC_ENA, 505 ICE_FLAG_MDD_AUTO_RESET_VF, 506 ICE_FLAG_VF_VLAN_PRUNING, 507 ICE_FLAG_LINK_LENIENT_MODE_ENA, 508 ICE_FLAG_PLUG_AUX_DEV, 509 ICE_FLAG_MTU_CHANGED, 510 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 511 ICE_PF_FLAGS_NBITS /* must be last */ 512 }; 513 514 struct ice_switchdev_info { 515 struct ice_vsi *control_vsi; 516 struct ice_vsi *uplink_vsi; 517 bool is_running; 518 }; 519 520 struct ice_agg_node { 521 u32 agg_id; 522 #define ICE_MAX_VSIS_IN_AGG_NODE 64 523 u32 num_vsis; 524 u8 valid; 525 }; 526 527 struct ice_pf { 528 struct pci_dev *pdev; 529 530 struct devlink_region *nvm_region; 531 struct devlink_region *sram_region; 532 struct devlink_region *devcaps_region; 533 534 /* devlink port data */ 535 struct devlink_port devlink_port; 536 537 /* OS reserved IRQ details */ 538 struct msix_entry *msix_entries; 539 struct ice_res_tracker *irq_tracker; 540 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 541 * number of MSIX vectors needed for all SR-IOV VFs from the number of 542 * MSIX vectors allowed on this PF. 543 */ 544 u16 sriov_base_vector; 545 546 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 547 548 struct ice_vsi **vsi; /* VSIs created by the driver */ 549 struct ice_vsi_stats **vsi_stats; 550 struct ice_sw *first_sw; /* first switch created by firmware */ 551 u16 eswitch_mode; /* current mode of eswitch */ 552 struct ice_vfs vfs; 553 DECLARE_BITMAP(features, ICE_F_MAX); 554 DECLARE_BITMAP(state, ICE_STATE_NBITS); 555 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 556 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 557 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 558 unsigned long serv_tmr_period; 559 unsigned long serv_tmr_prev; 560 struct timer_list serv_tmr; 561 struct work_struct serv_task; 562 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 563 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 564 struct mutex tc_mutex; /* lock to protect TC changes */ 565 struct mutex adev_mutex; /* lock to protect aux device access */ 566 u32 msg_enable; 567 struct ice_ptp ptp; 568 struct tty_driver *ice_gnss_tty_driver; 569 struct tty_port *gnss_tty_port[ICE_GNSS_TTY_MINOR_DEVICES]; 570 struct gnss_serial *gnss_serial[ICE_GNSS_TTY_MINOR_DEVICES]; 571 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 572 u16 rdma_base_vector; 573 574 /* spinlock to protect the AdminQ wait list */ 575 spinlock_t aq_wait_lock; 576 struct hlist_head aq_wait_list; 577 wait_queue_head_t aq_wait_queue; 578 bool fw_emp_reset_disabled; 579 580 wait_queue_head_t reset_wait_queue; 581 582 u32 hw_csum_rx_error; 583 u32 oicr_err_reg; 584 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 585 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 586 u16 max_pf_txqs; /* Total Tx queues PF wide */ 587 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 588 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 589 u16 num_lan_tx; /* num LAN Tx queues setup */ 590 u16 num_lan_rx; /* num LAN Rx queues setup */ 591 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 592 u16 num_alloc_vsi; 593 u16 corer_count; /* Core reset count */ 594 u16 globr_count; /* Global reset count */ 595 u16 empr_count; /* EMP reset count */ 596 u16 pfr_count; /* PF reset count */ 597 598 u8 wol_ena : 1; /* software state of WoL */ 599 u32 wakeup_reason; /* last wakeup reason */ 600 struct ice_hw_port_stats stats; 601 struct ice_hw_port_stats stats_prev; 602 struct ice_hw hw; 603 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 604 u8 rdma_mode; 605 u16 dcbx_cap; 606 u32 tx_timeout_count; 607 unsigned long tx_timeout_last_recovery; 608 u32 tx_timeout_recovery_level; 609 char int_name[ICE_INT_NAME_STR_LEN]; 610 struct auxiliary_device *adev; 611 int aux_idx; 612 u32 sw_int_count; 613 /* count of tc_flower filters specific to channel (aka where filter 614 * action is "hw_tc <tc_num>") 615 */ 616 u16 num_dmac_chnl_fltrs; 617 struct hlist_head tc_flower_fltr_list; 618 619 u64 supported_rxdids; 620 621 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 622 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 623 struct ice_link_default_override_tlv link_dflt_override; 624 struct ice_lag *lag; /* Link Aggregation information */ 625 626 struct ice_switchdev_info switchdev; 627 628 #define ICE_INVALID_AGG_NODE_ID 0 629 #define ICE_PF_AGG_NODE_ID_START 1 630 #define ICE_MAX_PF_AGG_NODES 32 631 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 632 #define ICE_VF_AGG_NODE_ID_START 65 633 #define ICE_MAX_VF_AGG_NODES 32 634 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 635 }; 636 637 struct ice_netdev_priv { 638 struct ice_vsi *vsi; 639 struct ice_repr *repr; 640 /* indirect block callbacks on registered higher level devices 641 * (e.g. tunnel devices) 642 * 643 * tc_indr_block_cb_priv_list is used to look up indirect callback 644 * private data 645 */ 646 struct list_head tc_indr_block_priv_list; 647 }; 648 649 /** 650 * ice_vector_ch_enabled 651 * @qv: pointer to q_vector, can be NULL 652 * 653 * This function returns true if vector is channel enabled otherwise false 654 */ 655 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 656 { 657 return !!qv->ch; /* Enable it to run with TC */ 658 } 659 660 /** 661 * ice_irq_dynamic_ena - Enable default interrupt generation settings 662 * @hw: pointer to HW struct 663 * @vsi: pointer to VSI struct, can be NULL 664 * @q_vector: pointer to q_vector, can be NULL 665 */ 666 static inline void 667 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 668 struct ice_q_vector *q_vector) 669 { 670 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 671 ((struct ice_pf *)hw->back)->oicr_idx; 672 int itr = ICE_ITR_NONE; 673 u32 val; 674 675 /* clear the PBA here, as this function is meant to clean out all 676 * previous interrupts and enable the interrupt 677 */ 678 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 679 (itr << GLINT_DYN_CTL_ITR_INDX_S); 680 if (vsi) 681 if (test_bit(ICE_VSI_DOWN, vsi->state)) 682 return; 683 wr32(hw, GLINT_DYN_CTL(vector), val); 684 } 685 686 /** 687 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 688 * @netdev: pointer to the netdev struct 689 */ 690 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 691 { 692 struct ice_netdev_priv *np = netdev_priv(netdev); 693 694 return np->vsi->back; 695 } 696 697 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 698 { 699 return !!READ_ONCE(vsi->xdp_prog); 700 } 701 702 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 703 { 704 ring->flags |= ICE_TX_FLAGS_RING_XDP; 705 } 706 707 /** 708 * ice_xsk_pool - get XSK buffer pool bound to a ring 709 * @ring: Rx ring to use 710 * 711 * Returns a pointer to xsk_buff_pool structure if there is a buffer pool 712 * present, NULL otherwise. 713 */ 714 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 715 { 716 struct ice_vsi *vsi = ring->vsi; 717 u16 qid = ring->q_index; 718 719 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 720 return NULL; 721 722 return xsk_get_pool_from_qid(vsi->netdev, qid); 723 } 724 725 /** 726 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 727 * @vsi: pointer to VSI 728 * @qid: index of a queue to look at XSK buff pool presence 729 * 730 * Sets XSK buff pool pointer on XDP ring. 731 * 732 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 733 * queue id. Reason for doing so is that queue vectors might have assigned more 734 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 735 * carries a pointer to one of these XDP rings for its own purposes, such as 736 * handling XDP_TX action, therefore we can piggyback here on the 737 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 738 */ 739 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 740 { 741 struct ice_tx_ring *ring; 742 743 ring = vsi->rx_rings[qid]->xdp_ring; 744 if (!ring) 745 return; 746 747 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) { 748 ring->xsk_pool = NULL; 749 return; 750 } 751 752 ring->xsk_pool = xsk_get_pool_from_qid(vsi->netdev, qid); 753 } 754 755 /** 756 * ice_get_main_vsi - Get the PF VSI 757 * @pf: PF instance 758 * 759 * returns pf->vsi[0], which by definition is the PF VSI 760 */ 761 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 762 { 763 if (pf->vsi) 764 return pf->vsi[0]; 765 766 return NULL; 767 } 768 769 /** 770 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 771 * @np: private netdev structure 772 */ 773 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 774 { 775 /* In case of port representor return source port VSI. */ 776 if (np->repr) 777 return np->repr->src_vsi; 778 else 779 return np->vsi; 780 } 781 782 /** 783 * ice_get_ctrl_vsi - Get the control VSI 784 * @pf: PF instance 785 */ 786 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 787 { 788 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 789 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 790 return NULL; 791 792 return pf->vsi[pf->ctrl_vsi_idx]; 793 } 794 795 /** 796 * ice_find_vsi - Find the VSI from VSI ID 797 * @pf: The PF pointer to search in 798 * @vsi_num: The VSI ID to search for 799 */ 800 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 801 { 802 int i; 803 804 ice_for_each_vsi(pf, i) 805 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 806 return pf->vsi[i]; 807 return NULL; 808 } 809 810 /** 811 * ice_is_switchdev_running - check if switchdev is configured 812 * @pf: pointer to PF structure 813 * 814 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 815 * and switchdev is configured, false otherwise. 816 */ 817 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 818 { 819 return pf->switchdev.is_running; 820 } 821 822 /** 823 * ice_set_sriov_cap - enable SRIOV in PF flags 824 * @pf: PF struct 825 */ 826 static inline void ice_set_sriov_cap(struct ice_pf *pf) 827 { 828 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 829 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 830 } 831 832 /** 833 * ice_clear_sriov_cap - disable SRIOV in PF flags 834 * @pf: PF struct 835 */ 836 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 837 { 838 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 839 } 840 841 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 842 #define ICE_FD_STAT_PF_IDX(base_idx) \ 843 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 844 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 845 #define ICE_FD_STAT_CH 1 846 #define ICE_FD_CH_STAT_IDX(base_idx) \ 847 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 848 849 /** 850 * ice_is_adq_active - any active ADQs 851 * @pf: pointer to PF 852 * 853 * This function returns true if there are any ADQs configured (which is 854 * determined by looking at VSI type (which should be VSI_PF), numtc, and 855 * TC_MQPRIO flag) otherwise return false 856 */ 857 static inline bool ice_is_adq_active(struct ice_pf *pf) 858 { 859 struct ice_vsi *vsi; 860 861 vsi = ice_get_main_vsi(pf); 862 if (!vsi) 863 return false; 864 865 /* is ADQ configured */ 866 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 867 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 868 return true; 869 870 return false; 871 } 872 873 bool netif_is_ice(struct net_device *dev); 874 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 875 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 876 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 877 int ice_vsi_open(struct ice_vsi *vsi); 878 void ice_set_ethtool_ops(struct net_device *netdev); 879 void ice_set_ethtool_repr_ops(struct net_device *netdev); 880 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 881 u16 ice_get_avail_txq_count(struct ice_pf *pf); 882 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 883 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 884 void ice_update_vsi_stats(struct ice_vsi *vsi); 885 void ice_update_pf_stats(struct ice_pf *pf); 886 void 887 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 888 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 889 int ice_up(struct ice_vsi *vsi); 890 int ice_down(struct ice_vsi *vsi); 891 int ice_down_up(struct ice_vsi *vsi); 892 int ice_vsi_cfg(struct ice_vsi *vsi); 893 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 894 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 895 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 896 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 897 int 898 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 899 u32 flags); 900 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 901 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 902 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 903 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 904 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 905 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 906 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 907 int ice_plug_aux_dev(struct ice_pf *pf); 908 void ice_unplug_aux_dev(struct ice_pf *pf); 909 int ice_init_rdma(struct ice_pf *pf); 910 const char *ice_aq_str(enum ice_aq_err aq_err); 911 bool ice_is_wol_supported(struct ice_hw *hw); 912 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 913 int 914 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 915 bool is_tun); 916 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 917 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 918 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 919 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 920 int 921 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 922 u32 *rule_locs); 923 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 924 void ice_fdir_release_flows(struct ice_hw *hw); 925 void ice_fdir_replay_flows(struct ice_hw *hw); 926 void ice_fdir_replay_fltrs(struct ice_pf *pf); 927 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 928 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 929 struct ice_rq_event_info *event); 930 int ice_open(struct net_device *netdev); 931 int ice_open_internal(struct net_device *netdev); 932 int ice_stop(struct net_device *netdev); 933 void ice_service_task_schedule(struct ice_pf *pf); 934 935 /** 936 * ice_set_rdma_cap - enable RDMA support 937 * @pf: PF struct 938 */ 939 static inline void ice_set_rdma_cap(struct ice_pf *pf) 940 { 941 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 942 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 943 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 944 } 945 } 946 947 /** 948 * ice_clear_rdma_cap - disable RDMA support 949 * @pf: PF struct 950 */ 951 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 952 { 953 /* We can directly unplug aux device here only if the flag bit 954 * ICE_FLAG_PLUG_AUX_DEV is not set because ice_unplug_aux_dev() 955 * could race with ice_plug_aux_dev() called from 956 * ice_service_task(). In this case we only clear that bit now and 957 * aux device will be unplugged later once ice_plug_aux_device() 958 * called from ice_service_task() finishes (see ice_service_task()). 959 */ 960 if (!test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags)) 961 ice_unplug_aux_dev(pf); 962 963 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 964 } 965 #endif /* _ICE_H_ */ 966