1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2014 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* Local includes */ 28 #include "i40e.h" 29 #include "i40e_diag.h" 30 #ifdef CONFIG_I40E_VXLAN 31 #include <net/vxlan.h> 32 #endif 33 34 const char i40e_driver_name[] = "i40e"; 35 static const char i40e_driver_string[] = 36 "Intel(R) Ethernet Connection XL710 Network Driver"; 37 38 #define DRV_KERN "-k" 39 40 #define DRV_VERSION_MAJOR 1 41 #define DRV_VERSION_MINOR 2 42 #define DRV_VERSION_BUILD 2 43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 44 __stringify(DRV_VERSION_MINOR) "." \ 45 __stringify(DRV_VERSION_BUILD) DRV_KERN 46 const char i40e_driver_version_str[] = DRV_VERSION; 47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 48 49 /* a bit of forward declarations */ 50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 51 static void i40e_handle_reset_warning(struct i40e_pf *pf); 52 static int i40e_add_vsi(struct i40e_vsi *vsi); 53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 55 static int i40e_setup_misc_vector(struct i40e_pf *pf); 56 static void i40e_determine_queue_usage(struct i40e_pf *pf); 57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 58 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 59 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 60 61 /* i40e_pci_tbl - PCI Device ID Table 62 * 63 * Last entry must be all 0s 64 * 65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 66 * Class, Class Mask, private data (not used) } 67 */ 68 static const struct pci_device_id i40e_pci_tbl[] = { 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 78 /* required last entry */ 79 {0, } 80 }; 81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 82 83 #define I40E_MAX_VF_COUNT 128 84 static int debug = -1; 85 module_param(debug, int, 0); 86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 87 88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 90 MODULE_LICENSE("GPL"); 91 MODULE_VERSION(DRV_VERSION); 92 93 /** 94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 95 * @hw: pointer to the HW structure 96 * @mem: ptr to mem struct to fill out 97 * @size: size of memory requested 98 * @alignment: what to align the allocation to 99 **/ 100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 101 u64 size, u32 alignment) 102 { 103 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 104 105 mem->size = ALIGN(size, alignment); 106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 107 &mem->pa, GFP_KERNEL); 108 if (!mem->va) 109 return -ENOMEM; 110 111 return 0; 112 } 113 114 /** 115 * i40e_free_dma_mem_d - OS specific memory free for shared code 116 * @hw: pointer to the HW structure 117 * @mem: ptr to mem struct to free 118 **/ 119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 120 { 121 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 122 123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 124 mem->va = NULL; 125 mem->pa = 0; 126 mem->size = 0; 127 128 return 0; 129 } 130 131 /** 132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 133 * @hw: pointer to the HW structure 134 * @mem: ptr to mem struct to fill out 135 * @size: size of memory requested 136 **/ 137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 138 u32 size) 139 { 140 mem->size = size; 141 mem->va = kzalloc(size, GFP_KERNEL); 142 143 if (!mem->va) 144 return -ENOMEM; 145 146 return 0; 147 } 148 149 /** 150 * i40e_free_virt_mem_d - OS specific memory free for shared code 151 * @hw: pointer to the HW structure 152 * @mem: ptr to mem struct to free 153 **/ 154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 155 { 156 /* it's ok to kfree a NULL pointer */ 157 kfree(mem->va); 158 mem->va = NULL; 159 mem->size = 0; 160 161 return 0; 162 } 163 164 /** 165 * i40e_get_lump - find a lump of free generic resource 166 * @pf: board private structure 167 * @pile: the pile of resource to search 168 * @needed: the number of items needed 169 * @id: an owner id to stick on the items assigned 170 * 171 * Returns the base item index of the lump, or negative for error 172 * 173 * The search_hint trick and lack of advanced fit-finding only work 174 * because we're highly likely to have all the same size lump requests. 175 * Linear search time and any fragmentation should be minimal. 176 **/ 177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 178 u16 needed, u16 id) 179 { 180 int ret = -ENOMEM; 181 int i, j; 182 183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 184 dev_info(&pf->pdev->dev, 185 "param err: pile=%p needed=%d id=0x%04x\n", 186 pile, needed, id); 187 return -EINVAL; 188 } 189 190 /* start the linear search with an imperfect hint */ 191 i = pile->search_hint; 192 while (i < pile->num_entries) { 193 /* skip already allocated entries */ 194 if (pile->list[i] & I40E_PILE_VALID_BIT) { 195 i++; 196 continue; 197 } 198 199 /* do we have enough in this lump? */ 200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 201 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 202 break; 203 } 204 205 if (j == needed) { 206 /* there was enough, so assign it to the requestor */ 207 for (j = 0; j < needed; j++) 208 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 209 ret = i; 210 pile->search_hint = i + j; 211 break; 212 } else { 213 /* not enough, so skip over it and continue looking */ 214 i += j; 215 } 216 } 217 218 return ret; 219 } 220 221 /** 222 * i40e_put_lump - return a lump of generic resource 223 * @pile: the pile of resource to search 224 * @index: the base item index 225 * @id: the owner id of the items assigned 226 * 227 * Returns the count of items in the lump 228 **/ 229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 230 { 231 int valid_id = (id | I40E_PILE_VALID_BIT); 232 int count = 0; 233 int i; 234 235 if (!pile || index >= pile->num_entries) 236 return -EINVAL; 237 238 for (i = index; 239 i < pile->num_entries && pile->list[i] == valid_id; 240 i++) { 241 pile->list[i] = 0; 242 count++; 243 } 244 245 if (count && index < pile->search_hint) 246 pile->search_hint = index; 247 248 return count; 249 } 250 251 /** 252 * i40e_service_event_schedule - Schedule the service task to wake up 253 * @pf: board private structure 254 * 255 * If not already scheduled, this puts the task into the work queue 256 **/ 257 static void i40e_service_event_schedule(struct i40e_pf *pf) 258 { 259 if (!test_bit(__I40E_DOWN, &pf->state) && 260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 262 schedule_work(&pf->service_task); 263 } 264 265 /** 266 * i40e_tx_timeout - Respond to a Tx Hang 267 * @netdev: network interface device structure 268 * 269 * If any port has noticed a Tx timeout, it is likely that the whole 270 * device is munged, not just the one netdev port, so go for the full 271 * reset. 272 **/ 273 #ifdef I40E_FCOE 274 void i40e_tx_timeout(struct net_device *netdev) 275 #else 276 static void i40e_tx_timeout(struct net_device *netdev) 277 #endif 278 { 279 struct i40e_netdev_priv *np = netdev_priv(netdev); 280 struct i40e_vsi *vsi = np->vsi; 281 struct i40e_pf *pf = vsi->back; 282 283 pf->tx_timeout_count++; 284 285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 286 pf->tx_timeout_recovery_level = 1; 287 pf->tx_timeout_last_recovery = jiffies; 288 netdev_info(netdev, "tx_timeout recovery level %d\n", 289 pf->tx_timeout_recovery_level); 290 291 switch (pf->tx_timeout_recovery_level) { 292 case 0: 293 /* disable and re-enable queues for the VSI */ 294 if (in_interrupt()) { 295 set_bit(__I40E_REINIT_REQUESTED, &pf->state); 296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state); 297 } else { 298 i40e_vsi_reinit_locked(vsi); 299 } 300 break; 301 case 1: 302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 303 break; 304 case 2: 305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 306 break; 307 case 3: 308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 309 break; 310 default: 311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 312 set_bit(__I40E_DOWN_REQUESTED, &pf->state); 313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state); 314 break; 315 } 316 i40e_service_event_schedule(pf); 317 pf->tx_timeout_recovery_level++; 318 } 319 320 /** 321 * i40e_release_rx_desc - Store the new tail and head values 322 * @rx_ring: ring to bump 323 * @val: new head index 324 **/ 325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) 326 { 327 rx_ring->next_to_use = val; 328 329 /* Force memory writes to complete before letting h/w 330 * know there are new descriptors to fetch. (Only 331 * applicable for weak-ordered memory model archs, 332 * such as IA-64). 333 */ 334 wmb(); 335 writel(val, rx_ring->tail); 336 } 337 338 /** 339 * i40e_get_vsi_stats_struct - Get System Network Statistics 340 * @vsi: the VSI we care about 341 * 342 * Returns the address of the device statistics structure. 343 * The statistics are actually updated from the service task. 344 **/ 345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 346 { 347 return &vsi->net_stats; 348 } 349 350 /** 351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 352 * @netdev: network interface device structure 353 * 354 * Returns the address of the device statistics structure. 355 * The statistics are actually updated from the service task. 356 **/ 357 #ifdef I40E_FCOE 358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 359 struct net_device *netdev, 360 struct rtnl_link_stats64 *stats) 361 #else 362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 363 struct net_device *netdev, 364 struct rtnl_link_stats64 *stats) 365 #endif 366 { 367 struct i40e_netdev_priv *np = netdev_priv(netdev); 368 struct i40e_ring *tx_ring, *rx_ring; 369 struct i40e_vsi *vsi = np->vsi; 370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 371 int i; 372 373 if (test_bit(__I40E_DOWN, &vsi->state)) 374 return stats; 375 376 if (!vsi->tx_rings) 377 return stats; 378 379 rcu_read_lock(); 380 for (i = 0; i < vsi->num_queue_pairs; i++) { 381 u64 bytes, packets; 382 unsigned int start; 383 384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 385 if (!tx_ring) 386 continue; 387 388 do { 389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 390 packets = tx_ring->stats.packets; 391 bytes = tx_ring->stats.bytes; 392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 393 394 stats->tx_packets += packets; 395 stats->tx_bytes += bytes; 396 rx_ring = &tx_ring[1]; 397 398 do { 399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 400 packets = rx_ring->stats.packets; 401 bytes = rx_ring->stats.bytes; 402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 403 404 stats->rx_packets += packets; 405 stats->rx_bytes += bytes; 406 } 407 rcu_read_unlock(); 408 409 /* following stats updated by i40e_watchdog_subtask() */ 410 stats->multicast = vsi_stats->multicast; 411 stats->tx_errors = vsi_stats->tx_errors; 412 stats->tx_dropped = vsi_stats->tx_dropped; 413 stats->rx_errors = vsi_stats->rx_errors; 414 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 415 stats->rx_length_errors = vsi_stats->rx_length_errors; 416 417 return stats; 418 } 419 420 /** 421 * i40e_vsi_reset_stats - Resets all stats of the given vsi 422 * @vsi: the VSI to have its stats reset 423 **/ 424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 425 { 426 struct rtnl_link_stats64 *ns; 427 int i; 428 429 if (!vsi) 430 return; 431 432 ns = i40e_get_vsi_stats_struct(vsi); 433 memset(ns, 0, sizeof(*ns)); 434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 437 if (vsi->rx_rings && vsi->rx_rings[0]) { 438 for (i = 0; i < vsi->num_queue_pairs; i++) { 439 memset(&vsi->rx_rings[i]->stats, 0 , 440 sizeof(vsi->rx_rings[i]->stats)); 441 memset(&vsi->rx_rings[i]->rx_stats, 0 , 442 sizeof(vsi->rx_rings[i]->rx_stats)); 443 memset(&vsi->tx_rings[i]->stats, 0 , 444 sizeof(vsi->tx_rings[i]->stats)); 445 memset(&vsi->tx_rings[i]->tx_stats, 0, 446 sizeof(vsi->tx_rings[i]->tx_stats)); 447 } 448 } 449 vsi->stat_offsets_loaded = false; 450 } 451 452 /** 453 * i40e_pf_reset_stats - Reset all of the stats for the given pf 454 * @pf: the PF to be reset 455 **/ 456 void i40e_pf_reset_stats(struct i40e_pf *pf) 457 { 458 int i; 459 460 memset(&pf->stats, 0, sizeof(pf->stats)); 461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 462 pf->stat_offsets_loaded = false; 463 464 for (i = 0; i < I40E_MAX_VEB; i++) { 465 if (pf->veb[i]) { 466 memset(&pf->veb[i]->stats, 0, 467 sizeof(pf->veb[i]->stats)); 468 memset(&pf->veb[i]->stats_offsets, 0, 469 sizeof(pf->veb[i]->stats_offsets)); 470 pf->veb[i]->stat_offsets_loaded = false; 471 } 472 } 473 } 474 475 /** 476 * i40e_stat_update48 - read and update a 48 bit stat from the chip 477 * @hw: ptr to the hardware info 478 * @hireg: the high 32 bit reg to read 479 * @loreg: the low 32 bit reg to read 480 * @offset_loaded: has the initial offset been loaded yet 481 * @offset: ptr to current offset value 482 * @stat: ptr to the stat 483 * 484 * Since the device stats are not reset at PFReset, they likely will not 485 * be zeroed when the driver starts. We'll save the first values read 486 * and use them as offsets to be subtracted from the raw values in order 487 * to report stats that count from zero. In the process, we also manage 488 * the potential roll-over. 489 **/ 490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 491 bool offset_loaded, u64 *offset, u64 *stat) 492 { 493 u64 new_data; 494 495 if (hw->device_id == I40E_DEV_ID_QEMU) { 496 new_data = rd32(hw, loreg); 497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 498 } else { 499 new_data = rd64(hw, loreg); 500 } 501 if (!offset_loaded) 502 *offset = new_data; 503 if (likely(new_data >= *offset)) 504 *stat = new_data - *offset; 505 else 506 *stat = (new_data + ((u64)1 << 48)) - *offset; 507 *stat &= 0xFFFFFFFFFFFFULL; 508 } 509 510 /** 511 * i40e_stat_update32 - read and update a 32 bit stat from the chip 512 * @hw: ptr to the hardware info 513 * @reg: the hw reg to read 514 * @offset_loaded: has the initial offset been loaded yet 515 * @offset: ptr to current offset value 516 * @stat: ptr to the stat 517 **/ 518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 519 bool offset_loaded, u64 *offset, u64 *stat) 520 { 521 u32 new_data; 522 523 new_data = rd32(hw, reg); 524 if (!offset_loaded) 525 *offset = new_data; 526 if (likely(new_data >= *offset)) 527 *stat = (u32)(new_data - *offset); 528 else 529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); 530 } 531 532 /** 533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 534 * @vsi: the VSI to be updated 535 **/ 536 void i40e_update_eth_stats(struct i40e_vsi *vsi) 537 { 538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 539 struct i40e_pf *pf = vsi->back; 540 struct i40e_hw *hw = &pf->hw; 541 struct i40e_eth_stats *oes; 542 struct i40e_eth_stats *es; /* device's eth stats */ 543 544 es = &vsi->eth_stats; 545 oes = &vsi->eth_stats_offsets; 546 547 /* Gather up the stats that the hw collects */ 548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 549 vsi->stat_offsets_loaded, 550 &oes->tx_errors, &es->tx_errors); 551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 552 vsi->stat_offsets_loaded, 553 &oes->rx_discards, &es->rx_discards); 554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 555 vsi->stat_offsets_loaded, 556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 558 vsi->stat_offsets_loaded, 559 &oes->tx_errors, &es->tx_errors); 560 561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 562 I40E_GLV_GORCL(stat_idx), 563 vsi->stat_offsets_loaded, 564 &oes->rx_bytes, &es->rx_bytes); 565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 566 I40E_GLV_UPRCL(stat_idx), 567 vsi->stat_offsets_loaded, 568 &oes->rx_unicast, &es->rx_unicast); 569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 570 I40E_GLV_MPRCL(stat_idx), 571 vsi->stat_offsets_loaded, 572 &oes->rx_multicast, &es->rx_multicast); 573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 574 I40E_GLV_BPRCL(stat_idx), 575 vsi->stat_offsets_loaded, 576 &oes->rx_broadcast, &es->rx_broadcast); 577 578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 579 I40E_GLV_GOTCL(stat_idx), 580 vsi->stat_offsets_loaded, 581 &oes->tx_bytes, &es->tx_bytes); 582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 583 I40E_GLV_UPTCL(stat_idx), 584 vsi->stat_offsets_loaded, 585 &oes->tx_unicast, &es->tx_unicast); 586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 587 I40E_GLV_MPTCL(stat_idx), 588 vsi->stat_offsets_loaded, 589 &oes->tx_multicast, &es->tx_multicast); 590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 591 I40E_GLV_BPTCL(stat_idx), 592 vsi->stat_offsets_loaded, 593 &oes->tx_broadcast, &es->tx_broadcast); 594 vsi->stat_offsets_loaded = true; 595 } 596 597 /** 598 * i40e_update_veb_stats - Update Switch component statistics 599 * @veb: the VEB being updated 600 **/ 601 static void i40e_update_veb_stats(struct i40e_veb *veb) 602 { 603 struct i40e_pf *pf = veb->pf; 604 struct i40e_hw *hw = &pf->hw; 605 struct i40e_eth_stats *oes; 606 struct i40e_eth_stats *es; /* device's eth stats */ 607 int idx = 0; 608 609 idx = veb->stats_idx; 610 es = &veb->stats; 611 oes = &veb->stats_offsets; 612 613 /* Gather up the stats that the hw collects */ 614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 615 veb->stat_offsets_loaded, 616 &oes->tx_discards, &es->tx_discards); 617 if (hw->revision_id > 0) 618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 619 veb->stat_offsets_loaded, 620 &oes->rx_unknown_protocol, 621 &es->rx_unknown_protocol); 622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 623 veb->stat_offsets_loaded, 624 &oes->rx_bytes, &es->rx_bytes); 625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 626 veb->stat_offsets_loaded, 627 &oes->rx_unicast, &es->rx_unicast); 628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 629 veb->stat_offsets_loaded, 630 &oes->rx_multicast, &es->rx_multicast); 631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 632 veb->stat_offsets_loaded, 633 &oes->rx_broadcast, &es->rx_broadcast); 634 635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 636 veb->stat_offsets_loaded, 637 &oes->tx_bytes, &es->tx_bytes); 638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 639 veb->stat_offsets_loaded, 640 &oes->tx_unicast, &es->tx_unicast); 641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 642 veb->stat_offsets_loaded, 643 &oes->tx_multicast, &es->tx_multicast); 644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 645 veb->stat_offsets_loaded, 646 &oes->tx_broadcast, &es->tx_broadcast); 647 veb->stat_offsets_loaded = true; 648 } 649 650 #ifdef I40E_FCOE 651 /** 652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 653 * @vsi: the VSI that is capable of doing FCoE 654 **/ 655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 656 { 657 struct i40e_pf *pf = vsi->back; 658 struct i40e_hw *hw = &pf->hw; 659 struct i40e_fcoe_stats *ofs; 660 struct i40e_fcoe_stats *fs; /* device's eth stats */ 661 int idx; 662 663 if (vsi->type != I40E_VSI_FCOE) 664 return; 665 666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET; 667 fs = &vsi->fcoe_stats; 668 ofs = &vsi->fcoe_stats_offsets; 669 670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 671 vsi->fcoe_stat_offsets_loaded, 672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 674 vsi->fcoe_stat_offsets_loaded, 675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 677 vsi->fcoe_stat_offsets_loaded, 678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 680 vsi->fcoe_stat_offsets_loaded, 681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 683 vsi->fcoe_stat_offsets_loaded, 684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 686 vsi->fcoe_stat_offsets_loaded, 687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 689 vsi->fcoe_stat_offsets_loaded, 690 &ofs->fcoe_last_error, &fs->fcoe_last_error); 691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 692 vsi->fcoe_stat_offsets_loaded, 693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 694 695 vsi->fcoe_stat_offsets_loaded = true; 696 } 697 698 #endif 699 /** 700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode 701 * @pf: the corresponding PF 702 * 703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode 704 **/ 705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf) 706 { 707 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 708 struct i40e_hw_port_stats *nsd = &pf->stats; 709 struct i40e_hw *hw = &pf->hw; 710 u64 xoff = 0; 711 u16 i, v; 712 713 if ((hw->fc.current_mode != I40E_FC_FULL) && 714 (hw->fc.current_mode != I40E_FC_RX_PAUSE)) 715 return; 716 717 xoff = nsd->link_xoff_rx; 718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 719 pf->stat_offsets_loaded, 720 &osd->link_xoff_rx, &nsd->link_xoff_rx); 721 722 /* No new LFC xoff rx */ 723 if (!(nsd->link_xoff_rx - xoff)) 724 return; 725 726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ 727 for (v = 0; v < pf->num_alloc_vsi; v++) { 728 struct i40e_vsi *vsi = pf->vsi[v]; 729 730 if (!vsi || !vsi->tx_rings[0]) 731 continue; 732 733 for (i = 0; i < vsi->num_queue_pairs; i++) { 734 struct i40e_ring *ring = vsi->tx_rings[i]; 735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 736 } 737 } 738 } 739 740 /** 741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode 742 * @pf: the corresponding PF 743 * 744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode 745 **/ 746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) 747 { 748 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 749 struct i40e_hw_port_stats *nsd = &pf->stats; 750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; 751 struct i40e_dcbx_config *dcb_cfg; 752 struct i40e_hw *hw = &pf->hw; 753 u16 i, v; 754 u8 tc; 755 756 dcb_cfg = &hw->local_dcbx_config; 757 758 /* See if DCB enabled with PFC TC */ 759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) || 760 !(dcb_cfg->pfc.pfcenable)) { 761 i40e_update_link_xoff_rx(pf); 762 return; 763 } 764 765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 766 u64 prio_xoff = nsd->priority_xoff_rx[i]; 767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 768 pf->stat_offsets_loaded, 769 &osd->priority_xoff_rx[i], 770 &nsd->priority_xoff_rx[i]); 771 772 /* No new PFC xoff rx */ 773 if (!(nsd->priority_xoff_rx[i] - prio_xoff)) 774 continue; 775 /* Get the TC for given priority */ 776 tc = dcb_cfg->etscfg.prioritytable[i]; 777 xoff[tc] = true; 778 } 779 780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ 781 for (v = 0; v < pf->num_alloc_vsi; v++) { 782 struct i40e_vsi *vsi = pf->vsi[v]; 783 784 if (!vsi || !vsi->tx_rings[0]) 785 continue; 786 787 for (i = 0; i < vsi->num_queue_pairs; i++) { 788 struct i40e_ring *ring = vsi->tx_rings[i]; 789 790 tc = ring->dcb_tc; 791 if (xoff[tc]) 792 clear_bit(__I40E_HANG_CHECK_ARMED, 793 &ring->state); 794 } 795 } 796 } 797 798 /** 799 * i40e_update_vsi_stats - Update the vsi statistics counters. 800 * @vsi: the VSI to be updated 801 * 802 * There are a few instances where we store the same stat in a 803 * couple of different structs. This is partly because we have 804 * the netdev stats that need to be filled out, which is slightly 805 * different from the "eth_stats" defined by the chip and used in 806 * VF communications. We sort it out here. 807 **/ 808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 809 { 810 struct i40e_pf *pf = vsi->back; 811 struct rtnl_link_stats64 *ons; 812 struct rtnl_link_stats64 *ns; /* netdev stats */ 813 struct i40e_eth_stats *oes; 814 struct i40e_eth_stats *es; /* device's eth stats */ 815 u32 tx_restart, tx_busy; 816 struct i40e_ring *p; 817 u32 rx_page, rx_buf; 818 u64 bytes, packets; 819 unsigned int start; 820 u64 rx_p, rx_b; 821 u64 tx_p, tx_b; 822 u16 q; 823 824 if (test_bit(__I40E_DOWN, &vsi->state) || 825 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 826 return; 827 828 ns = i40e_get_vsi_stats_struct(vsi); 829 ons = &vsi->net_stats_offsets; 830 es = &vsi->eth_stats; 831 oes = &vsi->eth_stats_offsets; 832 833 /* Gather up the netdev and vsi stats that the driver collects 834 * on the fly during packet processing 835 */ 836 rx_b = rx_p = 0; 837 tx_b = tx_p = 0; 838 tx_restart = tx_busy = 0; 839 rx_page = 0; 840 rx_buf = 0; 841 rcu_read_lock(); 842 for (q = 0; q < vsi->num_queue_pairs; q++) { 843 /* locate Tx ring */ 844 p = ACCESS_ONCE(vsi->tx_rings[q]); 845 846 do { 847 start = u64_stats_fetch_begin_irq(&p->syncp); 848 packets = p->stats.packets; 849 bytes = p->stats.bytes; 850 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 851 tx_b += bytes; 852 tx_p += packets; 853 tx_restart += p->tx_stats.restart_queue; 854 tx_busy += p->tx_stats.tx_busy; 855 856 /* Rx queue is part of the same block as Tx queue */ 857 p = &p[1]; 858 do { 859 start = u64_stats_fetch_begin_irq(&p->syncp); 860 packets = p->stats.packets; 861 bytes = p->stats.bytes; 862 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 863 rx_b += bytes; 864 rx_p += packets; 865 rx_buf += p->rx_stats.alloc_buff_failed; 866 rx_page += p->rx_stats.alloc_page_failed; 867 } 868 rcu_read_unlock(); 869 vsi->tx_restart = tx_restart; 870 vsi->tx_busy = tx_busy; 871 vsi->rx_page_failed = rx_page; 872 vsi->rx_buf_failed = rx_buf; 873 874 ns->rx_packets = rx_p; 875 ns->rx_bytes = rx_b; 876 ns->tx_packets = tx_p; 877 ns->tx_bytes = tx_b; 878 879 /* update netdev stats from eth stats */ 880 i40e_update_eth_stats(vsi); 881 ons->tx_errors = oes->tx_errors; 882 ns->tx_errors = es->tx_errors; 883 ons->multicast = oes->rx_multicast; 884 ns->multicast = es->rx_multicast; 885 ons->rx_dropped = oes->rx_discards; 886 ns->rx_dropped = es->rx_discards; 887 ons->tx_dropped = oes->tx_discards; 888 ns->tx_dropped = es->tx_discards; 889 890 /* pull in a couple PF stats if this is the main vsi */ 891 if (vsi == pf->vsi[pf->lan_vsi]) { 892 ns->rx_crc_errors = pf->stats.crc_errors; 893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 894 ns->rx_length_errors = pf->stats.rx_length_errors; 895 } 896 } 897 898 /** 899 * i40e_update_pf_stats - Update the pf statistics counters. 900 * @pf: the PF to be updated 901 **/ 902 static void i40e_update_pf_stats(struct i40e_pf *pf) 903 { 904 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 905 struct i40e_hw_port_stats *nsd = &pf->stats; 906 struct i40e_hw *hw = &pf->hw; 907 u32 val; 908 int i; 909 910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 911 I40E_GLPRT_GORCL(hw->port), 912 pf->stat_offsets_loaded, 913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 915 I40E_GLPRT_GOTCL(hw->port), 916 pf->stat_offsets_loaded, 917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 919 pf->stat_offsets_loaded, 920 &osd->eth.rx_discards, 921 &nsd->eth.rx_discards); 922 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port), 923 pf->stat_offsets_loaded, 924 &osd->eth.tx_discards, 925 &nsd->eth.tx_discards); 926 927 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 928 I40E_GLPRT_UPRCL(hw->port), 929 pf->stat_offsets_loaded, 930 &osd->eth.rx_unicast, 931 &nsd->eth.rx_unicast); 932 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 933 I40E_GLPRT_MPRCL(hw->port), 934 pf->stat_offsets_loaded, 935 &osd->eth.rx_multicast, 936 &nsd->eth.rx_multicast); 937 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 938 I40E_GLPRT_BPRCL(hw->port), 939 pf->stat_offsets_loaded, 940 &osd->eth.rx_broadcast, 941 &nsd->eth.rx_broadcast); 942 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 943 I40E_GLPRT_UPTCL(hw->port), 944 pf->stat_offsets_loaded, 945 &osd->eth.tx_unicast, 946 &nsd->eth.tx_unicast); 947 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 948 I40E_GLPRT_MPTCL(hw->port), 949 pf->stat_offsets_loaded, 950 &osd->eth.tx_multicast, 951 &nsd->eth.tx_multicast); 952 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 953 I40E_GLPRT_BPTCL(hw->port), 954 pf->stat_offsets_loaded, 955 &osd->eth.tx_broadcast, 956 &nsd->eth.tx_broadcast); 957 958 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 959 pf->stat_offsets_loaded, 960 &osd->tx_dropped_link_down, 961 &nsd->tx_dropped_link_down); 962 963 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 964 pf->stat_offsets_loaded, 965 &osd->crc_errors, &nsd->crc_errors); 966 967 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 968 pf->stat_offsets_loaded, 969 &osd->illegal_bytes, &nsd->illegal_bytes); 970 971 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 972 pf->stat_offsets_loaded, 973 &osd->mac_local_faults, 974 &nsd->mac_local_faults); 975 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 976 pf->stat_offsets_loaded, 977 &osd->mac_remote_faults, 978 &nsd->mac_remote_faults); 979 980 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 981 pf->stat_offsets_loaded, 982 &osd->rx_length_errors, 983 &nsd->rx_length_errors); 984 985 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 986 pf->stat_offsets_loaded, 987 &osd->link_xon_rx, &nsd->link_xon_rx); 988 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 989 pf->stat_offsets_loaded, 990 &osd->link_xon_tx, &nsd->link_xon_tx); 991 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ 992 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 993 pf->stat_offsets_loaded, 994 &osd->link_xoff_tx, &nsd->link_xoff_tx); 995 996 for (i = 0; i < 8; i++) { 997 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 998 pf->stat_offsets_loaded, 999 &osd->priority_xon_rx[i], 1000 &nsd->priority_xon_rx[i]); 1001 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 1002 pf->stat_offsets_loaded, 1003 &osd->priority_xon_tx[i], 1004 &nsd->priority_xon_tx[i]); 1005 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 1006 pf->stat_offsets_loaded, 1007 &osd->priority_xoff_tx[i], 1008 &nsd->priority_xoff_tx[i]); 1009 i40e_stat_update32(hw, 1010 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 1011 pf->stat_offsets_loaded, 1012 &osd->priority_xon_2_xoff[i], 1013 &nsd->priority_xon_2_xoff[i]); 1014 } 1015 1016 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1017 I40E_GLPRT_PRC64L(hw->port), 1018 pf->stat_offsets_loaded, 1019 &osd->rx_size_64, &nsd->rx_size_64); 1020 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1021 I40E_GLPRT_PRC127L(hw->port), 1022 pf->stat_offsets_loaded, 1023 &osd->rx_size_127, &nsd->rx_size_127); 1024 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1025 I40E_GLPRT_PRC255L(hw->port), 1026 pf->stat_offsets_loaded, 1027 &osd->rx_size_255, &nsd->rx_size_255); 1028 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1029 I40E_GLPRT_PRC511L(hw->port), 1030 pf->stat_offsets_loaded, 1031 &osd->rx_size_511, &nsd->rx_size_511); 1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1033 I40E_GLPRT_PRC1023L(hw->port), 1034 pf->stat_offsets_loaded, 1035 &osd->rx_size_1023, &nsd->rx_size_1023); 1036 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1037 I40E_GLPRT_PRC1522L(hw->port), 1038 pf->stat_offsets_loaded, 1039 &osd->rx_size_1522, &nsd->rx_size_1522); 1040 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1041 I40E_GLPRT_PRC9522L(hw->port), 1042 pf->stat_offsets_loaded, 1043 &osd->rx_size_big, &nsd->rx_size_big); 1044 1045 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1046 I40E_GLPRT_PTC64L(hw->port), 1047 pf->stat_offsets_loaded, 1048 &osd->tx_size_64, &nsd->tx_size_64); 1049 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1050 I40E_GLPRT_PTC127L(hw->port), 1051 pf->stat_offsets_loaded, 1052 &osd->tx_size_127, &nsd->tx_size_127); 1053 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1054 I40E_GLPRT_PTC255L(hw->port), 1055 pf->stat_offsets_loaded, 1056 &osd->tx_size_255, &nsd->tx_size_255); 1057 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1058 I40E_GLPRT_PTC511L(hw->port), 1059 pf->stat_offsets_loaded, 1060 &osd->tx_size_511, &nsd->tx_size_511); 1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1062 I40E_GLPRT_PTC1023L(hw->port), 1063 pf->stat_offsets_loaded, 1064 &osd->tx_size_1023, &nsd->tx_size_1023); 1065 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1066 I40E_GLPRT_PTC1522L(hw->port), 1067 pf->stat_offsets_loaded, 1068 &osd->tx_size_1522, &nsd->tx_size_1522); 1069 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1070 I40E_GLPRT_PTC9522L(hw->port), 1071 pf->stat_offsets_loaded, 1072 &osd->tx_size_big, &nsd->tx_size_big); 1073 1074 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1075 pf->stat_offsets_loaded, 1076 &osd->rx_undersize, &nsd->rx_undersize); 1077 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1078 pf->stat_offsets_loaded, 1079 &osd->rx_fragments, &nsd->rx_fragments); 1080 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1081 pf->stat_offsets_loaded, 1082 &osd->rx_oversize, &nsd->rx_oversize); 1083 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1084 pf->stat_offsets_loaded, 1085 &osd->rx_jabber, &nsd->rx_jabber); 1086 1087 /* FDIR stats */ 1088 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx), 1089 pf->stat_offsets_loaded, 1090 &osd->fd_atr_match, &nsd->fd_atr_match); 1091 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx), 1092 pf->stat_offsets_loaded, 1093 &osd->fd_sb_match, &nsd->fd_sb_match); 1094 1095 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1096 nsd->tx_lpi_status = 1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1099 nsd->rx_lpi_status = 1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1103 pf->stat_offsets_loaded, 1104 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1106 pf->stat_offsets_loaded, 1107 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1108 1109 pf->stat_offsets_loaded = true; 1110 } 1111 1112 /** 1113 * i40e_update_stats - Update the various statistics counters. 1114 * @vsi: the VSI to be updated 1115 * 1116 * Update the various stats for this VSI and its related entities. 1117 **/ 1118 void i40e_update_stats(struct i40e_vsi *vsi) 1119 { 1120 struct i40e_pf *pf = vsi->back; 1121 1122 if (vsi == pf->vsi[pf->lan_vsi]) 1123 i40e_update_pf_stats(pf); 1124 1125 i40e_update_vsi_stats(vsi); 1126 #ifdef I40E_FCOE 1127 i40e_update_fcoe_stats(vsi); 1128 #endif 1129 } 1130 1131 /** 1132 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1133 * @vsi: the VSI to be searched 1134 * @macaddr: the MAC address 1135 * @vlan: the vlan 1136 * @is_vf: make sure its a vf filter, else doesn't matter 1137 * @is_netdev: make sure its a netdev filter, else doesn't matter 1138 * 1139 * Returns ptr to the filter object or NULL 1140 **/ 1141 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1142 u8 *macaddr, s16 vlan, 1143 bool is_vf, bool is_netdev) 1144 { 1145 struct i40e_mac_filter *f; 1146 1147 if (!vsi || !macaddr) 1148 return NULL; 1149 1150 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1151 if ((ether_addr_equal(macaddr, f->macaddr)) && 1152 (vlan == f->vlan) && 1153 (!is_vf || f->is_vf) && 1154 (!is_netdev || f->is_netdev)) 1155 return f; 1156 } 1157 return NULL; 1158 } 1159 1160 /** 1161 * i40e_find_mac - Find a mac addr in the macvlan filters list 1162 * @vsi: the VSI to be searched 1163 * @macaddr: the MAC address we are searching for 1164 * @is_vf: make sure its a vf filter, else doesn't matter 1165 * @is_netdev: make sure its a netdev filter, else doesn't matter 1166 * 1167 * Returns the first filter with the provided MAC address or NULL if 1168 * MAC address was not found 1169 **/ 1170 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, 1171 bool is_vf, bool is_netdev) 1172 { 1173 struct i40e_mac_filter *f; 1174 1175 if (!vsi || !macaddr) 1176 return NULL; 1177 1178 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1179 if ((ether_addr_equal(macaddr, f->macaddr)) && 1180 (!is_vf || f->is_vf) && 1181 (!is_netdev || f->is_netdev)) 1182 return f; 1183 } 1184 return NULL; 1185 } 1186 1187 /** 1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1189 * @vsi: the VSI to be searched 1190 * 1191 * Returns true if VSI is in vlan mode or false otherwise 1192 **/ 1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1194 { 1195 struct i40e_mac_filter *f; 1196 1197 /* Only -1 for all the filters denotes not in vlan mode 1198 * so we have to go through all the list in order to make sure 1199 */ 1200 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1201 if (f->vlan >= 0) 1202 return true; 1203 } 1204 1205 return false; 1206 } 1207 1208 /** 1209 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans 1210 * @vsi: the VSI to be searched 1211 * @macaddr: the mac address to be filtered 1212 * @is_vf: true if it is a vf 1213 * @is_netdev: true if it is a netdev 1214 * 1215 * Goes through all the macvlan filters and adds a 1216 * macvlan filter for each unique vlan that already exists 1217 * 1218 * Returns first filter found on success, else NULL 1219 **/ 1220 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1221 bool is_vf, bool is_netdev) 1222 { 1223 struct i40e_mac_filter *f; 1224 1225 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1226 if (!i40e_find_filter(vsi, macaddr, f->vlan, 1227 is_vf, is_netdev)) { 1228 if (!i40e_add_filter(vsi, macaddr, f->vlan, 1229 is_vf, is_netdev)) 1230 return NULL; 1231 } 1232 } 1233 1234 return list_first_entry_or_null(&vsi->mac_filter_list, 1235 struct i40e_mac_filter, list); 1236 } 1237 1238 /** 1239 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1240 * @vsi: the PF Main VSI - inappropriate for any other VSI 1241 * @macaddr: the MAC address 1242 * 1243 * Some older firmware configurations set up a default promiscuous VLAN 1244 * filter that needs to be removed. 1245 **/ 1246 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1247 { 1248 struct i40e_aqc_remove_macvlan_element_data element; 1249 struct i40e_pf *pf = vsi->back; 1250 i40e_status aq_ret; 1251 1252 /* Only appropriate for the PF main VSI */ 1253 if (vsi->type != I40E_VSI_MAIN) 1254 return -EINVAL; 1255 1256 memset(&element, 0, sizeof(element)); 1257 ether_addr_copy(element.mac_addr, macaddr); 1258 element.vlan_tag = 0; 1259 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1260 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1261 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1262 if (aq_ret) 1263 return -ENOENT; 1264 1265 return 0; 1266 } 1267 1268 /** 1269 * i40e_add_filter - Add a mac/vlan filter to the VSI 1270 * @vsi: the VSI to be searched 1271 * @macaddr: the MAC address 1272 * @vlan: the vlan 1273 * @is_vf: make sure its a vf filter, else doesn't matter 1274 * @is_netdev: make sure its a netdev filter, else doesn't matter 1275 * 1276 * Returns ptr to the filter object or NULL when no memory available. 1277 **/ 1278 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1279 u8 *macaddr, s16 vlan, 1280 bool is_vf, bool is_netdev) 1281 { 1282 struct i40e_mac_filter *f; 1283 1284 if (!vsi || !macaddr) 1285 return NULL; 1286 1287 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1288 if (!f) { 1289 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1290 if (!f) 1291 goto add_filter_out; 1292 1293 ether_addr_copy(f->macaddr, macaddr); 1294 f->vlan = vlan; 1295 f->changed = true; 1296 1297 INIT_LIST_HEAD(&f->list); 1298 list_add(&f->list, &vsi->mac_filter_list); 1299 } 1300 1301 /* increment counter and add a new flag if needed */ 1302 if (is_vf) { 1303 if (!f->is_vf) { 1304 f->is_vf = true; 1305 f->counter++; 1306 } 1307 } else if (is_netdev) { 1308 if (!f->is_netdev) { 1309 f->is_netdev = true; 1310 f->counter++; 1311 } 1312 } else { 1313 f->counter++; 1314 } 1315 1316 /* changed tells sync_filters_subtask to 1317 * push the filter down to the firmware 1318 */ 1319 if (f->changed) { 1320 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1321 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1322 } 1323 1324 add_filter_out: 1325 return f; 1326 } 1327 1328 /** 1329 * i40e_del_filter - Remove a mac/vlan filter from the VSI 1330 * @vsi: the VSI to be searched 1331 * @macaddr: the MAC address 1332 * @vlan: the vlan 1333 * @is_vf: make sure it's a vf filter, else doesn't matter 1334 * @is_netdev: make sure it's a netdev filter, else doesn't matter 1335 **/ 1336 void i40e_del_filter(struct i40e_vsi *vsi, 1337 u8 *macaddr, s16 vlan, 1338 bool is_vf, bool is_netdev) 1339 { 1340 struct i40e_mac_filter *f; 1341 1342 if (!vsi || !macaddr) 1343 return; 1344 1345 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1346 if (!f || f->counter == 0) 1347 return; 1348 1349 if (is_vf) { 1350 if (f->is_vf) { 1351 f->is_vf = false; 1352 f->counter--; 1353 } 1354 } else if (is_netdev) { 1355 if (f->is_netdev) { 1356 f->is_netdev = false; 1357 f->counter--; 1358 } 1359 } else { 1360 /* make sure we don't remove a filter in use by vf or netdev */ 1361 int min_f = 0; 1362 min_f += (f->is_vf ? 1 : 0); 1363 min_f += (f->is_netdev ? 1 : 0); 1364 1365 if (f->counter > min_f) 1366 f->counter--; 1367 } 1368 1369 /* counter == 0 tells sync_filters_subtask to 1370 * remove the filter from the firmware's list 1371 */ 1372 if (f->counter == 0) { 1373 f->changed = true; 1374 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1375 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1376 } 1377 } 1378 1379 /** 1380 * i40e_set_mac - NDO callback to set mac address 1381 * @netdev: network interface device structure 1382 * @p: pointer to an address structure 1383 * 1384 * Returns 0 on success, negative on failure 1385 **/ 1386 #ifdef I40E_FCOE 1387 int i40e_set_mac(struct net_device *netdev, void *p) 1388 #else 1389 static int i40e_set_mac(struct net_device *netdev, void *p) 1390 #endif 1391 { 1392 struct i40e_netdev_priv *np = netdev_priv(netdev); 1393 struct i40e_vsi *vsi = np->vsi; 1394 struct i40e_pf *pf = vsi->back; 1395 struct i40e_hw *hw = &pf->hw; 1396 struct sockaddr *addr = p; 1397 struct i40e_mac_filter *f; 1398 1399 if (!is_valid_ether_addr(addr->sa_data)) 1400 return -EADDRNOTAVAIL; 1401 1402 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1403 netdev_info(netdev, "already using mac address %pM\n", 1404 addr->sa_data); 1405 return 0; 1406 } 1407 1408 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1409 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1410 return -EADDRNOTAVAIL; 1411 1412 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1413 netdev_info(netdev, "returning to hw mac address %pM\n", 1414 hw->mac.addr); 1415 else 1416 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1417 1418 if (vsi->type == I40E_VSI_MAIN) { 1419 i40e_status ret; 1420 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1421 I40E_AQC_WRITE_TYPE_LAA_WOL, 1422 addr->sa_data, NULL); 1423 if (ret) { 1424 netdev_info(netdev, 1425 "Addr change for Main VSI failed: %d\n", 1426 ret); 1427 return -EADDRNOTAVAIL; 1428 } 1429 } 1430 1431 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) { 1432 struct i40e_aqc_remove_macvlan_element_data element; 1433 1434 memset(&element, 0, sizeof(element)); 1435 ether_addr_copy(element.mac_addr, netdev->dev_addr); 1436 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1437 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1438 } else { 1439 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 1440 false, false); 1441 } 1442 1443 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) { 1444 struct i40e_aqc_add_macvlan_element_data element; 1445 1446 memset(&element, 0, sizeof(element)); 1447 ether_addr_copy(element.mac_addr, hw->mac.addr); 1448 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 1449 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1450 } else { 1451 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, 1452 false, false); 1453 if (f) 1454 f->is_laa = true; 1455 } 1456 1457 i40e_sync_vsi_filters(vsi); 1458 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1459 1460 return 0; 1461 } 1462 1463 /** 1464 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1465 * @vsi: the VSI being setup 1466 * @ctxt: VSI context structure 1467 * @enabled_tc: Enabled TCs bitmap 1468 * @is_add: True if called before Add VSI 1469 * 1470 * Setup VSI queue mapping for enabled traffic classes. 1471 **/ 1472 #ifdef I40E_FCOE 1473 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1474 struct i40e_vsi_context *ctxt, 1475 u8 enabled_tc, 1476 bool is_add) 1477 #else 1478 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1479 struct i40e_vsi_context *ctxt, 1480 u8 enabled_tc, 1481 bool is_add) 1482 #endif 1483 { 1484 struct i40e_pf *pf = vsi->back; 1485 u16 sections = 0; 1486 u8 netdev_tc = 0; 1487 u16 numtc = 0; 1488 u16 qcount; 1489 u8 offset; 1490 u16 qmap; 1491 int i; 1492 u16 num_tc_qps = 0; 1493 1494 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1495 offset = 0; 1496 1497 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1498 /* Find numtc from enabled TC bitmap */ 1499 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1500 if (enabled_tc & (1 << i)) /* TC is enabled */ 1501 numtc++; 1502 } 1503 if (!numtc) { 1504 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1505 numtc = 1; 1506 } 1507 } else { 1508 /* At least TC0 is enabled in case of non-DCB case */ 1509 numtc = 1; 1510 } 1511 1512 vsi->tc_config.numtc = numtc; 1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1514 /* Number of queues per enabled TC */ 1515 num_tc_qps = vsi->alloc_queue_pairs/numtc; 1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1517 1518 /* Setup queue offset/count for all TCs for given VSI */ 1519 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1520 /* See if the given TC is enabled for the given VSI */ 1521 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ 1522 int pow, num_qps; 1523 1524 switch (vsi->type) { 1525 case I40E_VSI_MAIN: 1526 qcount = min_t(int, pf->rss_size, num_tc_qps); 1527 break; 1528 #ifdef I40E_FCOE 1529 case I40E_VSI_FCOE: 1530 qcount = num_tc_qps; 1531 break; 1532 #endif 1533 case I40E_VSI_FDIR: 1534 case I40E_VSI_SRIOV: 1535 case I40E_VSI_VMDQ2: 1536 default: 1537 qcount = num_tc_qps; 1538 WARN_ON(i != 0); 1539 break; 1540 } 1541 vsi->tc_config.tc_info[i].qoffset = offset; 1542 vsi->tc_config.tc_info[i].qcount = qcount; 1543 1544 /* find the power-of-2 of the number of queue pairs */ 1545 num_qps = qcount; 1546 pow = 0; 1547 while (num_qps && ((1 << pow) < qcount)) { 1548 pow++; 1549 num_qps >>= 1; 1550 } 1551 1552 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1553 qmap = 1554 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1555 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1556 1557 offset += qcount; 1558 } else { 1559 /* TC is not enabled so set the offset to 1560 * default queue and allocate one queue 1561 * for the given TC. 1562 */ 1563 vsi->tc_config.tc_info[i].qoffset = 0; 1564 vsi->tc_config.tc_info[i].qcount = 1; 1565 vsi->tc_config.tc_info[i].netdev_tc = 0; 1566 1567 qmap = 0; 1568 } 1569 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1570 } 1571 1572 /* Set actual Tx/Rx queue pairs */ 1573 vsi->num_queue_pairs = offset; 1574 1575 /* Scheduler section valid can only be set for ADD VSI */ 1576 if (is_add) { 1577 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1578 1579 ctxt->info.up_enable_bits = enabled_tc; 1580 } 1581 if (vsi->type == I40E_VSI_SRIOV) { 1582 ctxt->info.mapping_flags |= 1583 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1584 for (i = 0; i < vsi->num_queue_pairs; i++) 1585 ctxt->info.queue_mapping[i] = 1586 cpu_to_le16(vsi->base_queue + i); 1587 } else { 1588 ctxt->info.mapping_flags |= 1589 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1590 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1591 } 1592 ctxt->info.valid_sections |= cpu_to_le16(sections); 1593 } 1594 1595 /** 1596 * i40e_set_rx_mode - NDO callback to set the netdev filters 1597 * @netdev: network interface device structure 1598 **/ 1599 #ifdef I40E_FCOE 1600 void i40e_set_rx_mode(struct net_device *netdev) 1601 #else 1602 static void i40e_set_rx_mode(struct net_device *netdev) 1603 #endif 1604 { 1605 struct i40e_netdev_priv *np = netdev_priv(netdev); 1606 struct i40e_mac_filter *f, *ftmp; 1607 struct i40e_vsi *vsi = np->vsi; 1608 struct netdev_hw_addr *uca; 1609 struct netdev_hw_addr *mca; 1610 struct netdev_hw_addr *ha; 1611 1612 /* add addr if not already in the filter list */ 1613 netdev_for_each_uc_addr(uca, netdev) { 1614 if (!i40e_find_mac(vsi, uca->addr, false, true)) { 1615 if (i40e_is_vsi_in_vlan(vsi)) 1616 i40e_put_mac_in_vlan(vsi, uca->addr, 1617 false, true); 1618 else 1619 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, 1620 false, true); 1621 } 1622 } 1623 1624 netdev_for_each_mc_addr(mca, netdev) { 1625 if (!i40e_find_mac(vsi, mca->addr, false, true)) { 1626 if (i40e_is_vsi_in_vlan(vsi)) 1627 i40e_put_mac_in_vlan(vsi, mca->addr, 1628 false, true); 1629 else 1630 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, 1631 false, true); 1632 } 1633 } 1634 1635 /* remove filter if not in netdev list */ 1636 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1637 bool found = false; 1638 1639 if (!f->is_netdev) 1640 continue; 1641 1642 if (is_multicast_ether_addr(f->macaddr)) { 1643 netdev_for_each_mc_addr(mca, netdev) { 1644 if (ether_addr_equal(mca->addr, f->macaddr)) { 1645 found = true; 1646 break; 1647 } 1648 } 1649 } else { 1650 netdev_for_each_uc_addr(uca, netdev) { 1651 if (ether_addr_equal(uca->addr, f->macaddr)) { 1652 found = true; 1653 break; 1654 } 1655 } 1656 1657 for_each_dev_addr(netdev, ha) { 1658 if (ether_addr_equal(ha->addr, f->macaddr)) { 1659 found = true; 1660 break; 1661 } 1662 } 1663 } 1664 if (!found) 1665 i40e_del_filter( 1666 vsi, f->macaddr, I40E_VLAN_ANY, false, true); 1667 } 1668 1669 /* check for other flag changes */ 1670 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1671 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1672 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1673 } 1674 } 1675 1676 /** 1677 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 1678 * @vsi: ptr to the VSI 1679 * 1680 * Push any outstanding VSI filter changes through the AdminQ. 1681 * 1682 * Returns 0 or error value 1683 **/ 1684 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 1685 { 1686 struct i40e_mac_filter *f, *ftmp; 1687 bool promisc_forced_on = false; 1688 bool add_happened = false; 1689 int filter_list_len = 0; 1690 u32 changed_flags = 0; 1691 i40e_status aq_ret = 0; 1692 struct i40e_pf *pf; 1693 int num_add = 0; 1694 int num_del = 0; 1695 u16 cmd_flags; 1696 1697 /* empty array typed pointers, kcalloc later */ 1698 struct i40e_aqc_add_macvlan_element_data *add_list; 1699 struct i40e_aqc_remove_macvlan_element_data *del_list; 1700 1701 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 1702 usleep_range(1000, 2000); 1703 pf = vsi->back; 1704 1705 if (vsi->netdev) { 1706 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 1707 vsi->current_netdev_flags = vsi->netdev->flags; 1708 } 1709 1710 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 1711 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 1712 1713 filter_list_len = pf->hw.aq.asq_buf_size / 1714 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1715 del_list = kcalloc(filter_list_len, 1716 sizeof(struct i40e_aqc_remove_macvlan_element_data), 1717 GFP_KERNEL); 1718 if (!del_list) 1719 return -ENOMEM; 1720 1721 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1722 if (!f->changed) 1723 continue; 1724 1725 if (f->counter != 0) 1726 continue; 1727 f->changed = false; 1728 cmd_flags = 0; 1729 1730 /* add to delete list */ 1731 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 1732 del_list[num_del].vlan_tag = 1733 cpu_to_le16((u16)(f->vlan == 1734 I40E_VLAN_ANY ? 0 : f->vlan)); 1735 1736 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1737 del_list[num_del].flags = cmd_flags; 1738 num_del++; 1739 1740 /* unlink from filter list */ 1741 list_del(&f->list); 1742 kfree(f); 1743 1744 /* flush a full buffer */ 1745 if (num_del == filter_list_len) { 1746 aq_ret = i40e_aq_remove_macvlan(&pf->hw, 1747 vsi->seid, del_list, num_del, 1748 NULL); 1749 num_del = 0; 1750 memset(del_list, 0, sizeof(*del_list)); 1751 1752 if (aq_ret && 1753 pf->hw.aq.asq_last_status != 1754 I40E_AQ_RC_ENOENT) 1755 dev_info(&pf->pdev->dev, 1756 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", 1757 aq_ret, 1758 pf->hw.aq.asq_last_status); 1759 } 1760 } 1761 if (num_del) { 1762 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, 1763 del_list, num_del, NULL); 1764 num_del = 0; 1765 1766 if (aq_ret && 1767 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT) 1768 dev_info(&pf->pdev->dev, 1769 "ignoring delete macvlan error, err %d, aq_err %d\n", 1770 aq_ret, pf->hw.aq.asq_last_status); 1771 } 1772 1773 kfree(del_list); 1774 del_list = NULL; 1775 1776 /* do all the adds now */ 1777 filter_list_len = pf->hw.aq.asq_buf_size / 1778 sizeof(struct i40e_aqc_add_macvlan_element_data), 1779 add_list = kcalloc(filter_list_len, 1780 sizeof(struct i40e_aqc_add_macvlan_element_data), 1781 GFP_KERNEL); 1782 if (!add_list) 1783 return -ENOMEM; 1784 1785 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1786 if (!f->changed) 1787 continue; 1788 1789 if (f->counter == 0) 1790 continue; 1791 f->changed = false; 1792 add_happened = true; 1793 cmd_flags = 0; 1794 1795 /* add to add array */ 1796 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); 1797 add_list[num_add].vlan_tag = 1798 cpu_to_le16( 1799 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 1800 add_list[num_add].queue_number = 0; 1801 1802 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 1803 add_list[num_add].flags = cpu_to_le16(cmd_flags); 1804 num_add++; 1805 1806 /* flush a full buffer */ 1807 if (num_add == filter_list_len) { 1808 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1809 add_list, num_add, 1810 NULL); 1811 num_add = 0; 1812 1813 if (aq_ret) 1814 break; 1815 memset(add_list, 0, sizeof(*add_list)); 1816 } 1817 } 1818 if (num_add) { 1819 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1820 add_list, num_add, NULL); 1821 num_add = 0; 1822 } 1823 kfree(add_list); 1824 add_list = NULL; 1825 1826 if (add_happened && aq_ret && 1827 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) { 1828 dev_info(&pf->pdev->dev, 1829 "add filter failed, err %d, aq_err %d\n", 1830 aq_ret, pf->hw.aq.asq_last_status); 1831 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && 1832 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1833 &vsi->state)) { 1834 promisc_forced_on = true; 1835 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1836 &vsi->state); 1837 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); 1838 } 1839 } 1840 } 1841 1842 /* check for changes in promiscuous modes */ 1843 if (changed_flags & IFF_ALLMULTI) { 1844 bool cur_multipromisc; 1845 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 1846 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 1847 vsi->seid, 1848 cur_multipromisc, 1849 NULL); 1850 if (aq_ret) 1851 dev_info(&pf->pdev->dev, 1852 "set multi promisc failed, err %d, aq_err %d\n", 1853 aq_ret, pf->hw.aq.asq_last_status); 1854 } 1855 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { 1856 bool cur_promisc; 1857 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 1858 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1859 &vsi->state)); 1860 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, 1861 vsi->seid, 1862 cur_promisc, NULL); 1863 if (aq_ret) 1864 dev_info(&pf->pdev->dev, 1865 "set uni promisc failed, err %d, aq_err %d\n", 1866 aq_ret, pf->hw.aq.asq_last_status); 1867 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 1868 vsi->seid, 1869 cur_promisc, NULL); 1870 if (aq_ret) 1871 dev_info(&pf->pdev->dev, 1872 "set brdcast promisc failed, err %d, aq_err %d\n", 1873 aq_ret, pf->hw.aq.asq_last_status); 1874 } 1875 1876 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 1877 return 0; 1878 } 1879 1880 /** 1881 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 1882 * @pf: board private structure 1883 **/ 1884 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 1885 { 1886 int v; 1887 1888 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 1889 return; 1890 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 1891 1892 for (v = 0; v < pf->num_alloc_vsi; v++) { 1893 if (pf->vsi[v] && 1894 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) 1895 i40e_sync_vsi_filters(pf->vsi[v]); 1896 } 1897 } 1898 1899 /** 1900 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 1901 * @netdev: network interface device structure 1902 * @new_mtu: new value for maximum frame size 1903 * 1904 * Returns 0 on success, negative on failure 1905 **/ 1906 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 1907 { 1908 struct i40e_netdev_priv *np = netdev_priv(netdev); 1909 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 1910 struct i40e_vsi *vsi = np->vsi; 1911 1912 /* MTU < 68 is an error and causes problems on some kernels */ 1913 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) 1914 return -EINVAL; 1915 1916 netdev_info(netdev, "changing MTU from %d to %d\n", 1917 netdev->mtu, new_mtu); 1918 netdev->mtu = new_mtu; 1919 if (netif_running(netdev)) 1920 i40e_vsi_reinit_locked(vsi); 1921 1922 return 0; 1923 } 1924 1925 /** 1926 * i40e_ioctl - Access the hwtstamp interface 1927 * @netdev: network interface device structure 1928 * @ifr: interface request data 1929 * @cmd: ioctl command 1930 **/ 1931 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 1932 { 1933 struct i40e_netdev_priv *np = netdev_priv(netdev); 1934 struct i40e_pf *pf = np->vsi->back; 1935 1936 switch (cmd) { 1937 case SIOCGHWTSTAMP: 1938 return i40e_ptp_get_ts_config(pf, ifr); 1939 case SIOCSHWTSTAMP: 1940 return i40e_ptp_set_ts_config(pf, ifr); 1941 default: 1942 return -EOPNOTSUPP; 1943 } 1944 } 1945 1946 /** 1947 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 1948 * @vsi: the vsi being adjusted 1949 **/ 1950 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 1951 { 1952 struct i40e_vsi_context ctxt; 1953 i40e_status ret; 1954 1955 if ((vsi->info.valid_sections & 1956 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 1957 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 1958 return; /* already enabled */ 1959 1960 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 1961 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 1962 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 1963 1964 ctxt.seid = vsi->seid; 1965 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); 1966 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 1967 if (ret) { 1968 dev_info(&vsi->back->pdev->dev, 1969 "%s: update vsi failed, aq_err=%d\n", 1970 __func__, vsi->back->hw.aq.asq_last_status); 1971 } 1972 } 1973 1974 /** 1975 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 1976 * @vsi: the vsi being adjusted 1977 **/ 1978 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 1979 { 1980 struct i40e_vsi_context ctxt; 1981 i40e_status ret; 1982 1983 if ((vsi->info.valid_sections & 1984 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 1985 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 1986 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 1987 return; /* already disabled */ 1988 1989 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 1990 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 1991 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 1992 1993 ctxt.seid = vsi->seid; 1994 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); 1995 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 1996 if (ret) { 1997 dev_info(&vsi->back->pdev->dev, 1998 "%s: update vsi failed, aq_err=%d\n", 1999 __func__, vsi->back->hw.aq.asq_last_status); 2000 } 2001 } 2002 2003 /** 2004 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2005 * @netdev: network interface to be adjusted 2006 * @features: netdev features to test if VLAN offload is enabled or not 2007 **/ 2008 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2009 { 2010 struct i40e_netdev_priv *np = netdev_priv(netdev); 2011 struct i40e_vsi *vsi = np->vsi; 2012 2013 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2014 i40e_vlan_stripping_enable(vsi); 2015 else 2016 i40e_vlan_stripping_disable(vsi); 2017 } 2018 2019 /** 2020 * i40e_vsi_add_vlan - Add vsi membership for given vlan 2021 * @vsi: the vsi being configured 2022 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2023 **/ 2024 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) 2025 { 2026 struct i40e_mac_filter *f, *add_f; 2027 bool is_netdev, is_vf; 2028 2029 is_vf = (vsi->type == I40E_VSI_SRIOV); 2030 is_netdev = !!(vsi->netdev); 2031 2032 if (is_netdev) { 2033 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, 2034 is_vf, is_netdev); 2035 if (!add_f) { 2036 dev_info(&vsi->back->pdev->dev, 2037 "Could not add vlan filter %d for %pM\n", 2038 vid, vsi->netdev->dev_addr); 2039 return -ENOMEM; 2040 } 2041 } 2042 2043 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2044 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2045 if (!add_f) { 2046 dev_info(&vsi->back->pdev->dev, 2047 "Could not add vlan filter %d for %pM\n", 2048 vid, f->macaddr); 2049 return -ENOMEM; 2050 } 2051 } 2052 2053 /* Now if we add a vlan tag, make sure to check if it is the first 2054 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" 2055 * with 0, so we now accept untagged and specified tagged traffic 2056 * (and not any taged and untagged) 2057 */ 2058 if (vid > 0) { 2059 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, 2060 I40E_VLAN_ANY, 2061 is_vf, is_netdev)) { 2062 i40e_del_filter(vsi, vsi->netdev->dev_addr, 2063 I40E_VLAN_ANY, is_vf, is_netdev); 2064 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, 2065 is_vf, is_netdev); 2066 if (!add_f) { 2067 dev_info(&vsi->back->pdev->dev, 2068 "Could not add filter 0 for %pM\n", 2069 vsi->netdev->dev_addr); 2070 return -ENOMEM; 2071 } 2072 } 2073 } 2074 2075 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ 2076 if (vid > 0 && !vsi->info.pvid) { 2077 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2078 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2079 is_vf, is_netdev)) { 2080 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2081 is_vf, is_netdev); 2082 add_f = i40e_add_filter(vsi, f->macaddr, 2083 0, is_vf, is_netdev); 2084 if (!add_f) { 2085 dev_info(&vsi->back->pdev->dev, 2086 "Could not add filter 0 for %pM\n", 2087 f->macaddr); 2088 return -ENOMEM; 2089 } 2090 } 2091 } 2092 } 2093 2094 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2095 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2096 return 0; 2097 2098 return i40e_sync_vsi_filters(vsi); 2099 } 2100 2101 /** 2102 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan 2103 * @vsi: the vsi being configured 2104 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2105 * 2106 * Return: 0 on success or negative otherwise 2107 **/ 2108 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) 2109 { 2110 struct net_device *netdev = vsi->netdev; 2111 struct i40e_mac_filter *f, *add_f; 2112 bool is_vf, is_netdev; 2113 int filter_count = 0; 2114 2115 is_vf = (vsi->type == I40E_VSI_SRIOV); 2116 is_netdev = !!(netdev); 2117 2118 if (is_netdev) 2119 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); 2120 2121 list_for_each_entry(f, &vsi->mac_filter_list, list) 2122 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2123 2124 /* go through all the filters for this VSI and if there is only 2125 * vid == 0 it means there are no other filters, so vid 0 must 2126 * be replaced with -1. This signifies that we should from now 2127 * on accept any traffic (with any tag present, or untagged) 2128 */ 2129 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2130 if (is_netdev) { 2131 if (f->vlan && 2132 ether_addr_equal(netdev->dev_addr, f->macaddr)) 2133 filter_count++; 2134 } 2135 2136 if (f->vlan) 2137 filter_count++; 2138 } 2139 2140 if (!filter_count && is_netdev) { 2141 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); 2142 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 2143 is_vf, is_netdev); 2144 if (!f) { 2145 dev_info(&vsi->back->pdev->dev, 2146 "Could not add filter %d for %pM\n", 2147 I40E_VLAN_ANY, netdev->dev_addr); 2148 return -ENOMEM; 2149 } 2150 } 2151 2152 if (!filter_count) { 2153 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2154 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); 2155 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2156 is_vf, is_netdev); 2157 if (!add_f) { 2158 dev_info(&vsi->back->pdev->dev, 2159 "Could not add filter %d for %pM\n", 2160 I40E_VLAN_ANY, f->macaddr); 2161 return -ENOMEM; 2162 } 2163 } 2164 } 2165 2166 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2167 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2168 return 0; 2169 2170 return i40e_sync_vsi_filters(vsi); 2171 } 2172 2173 /** 2174 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2175 * @netdev: network interface to be adjusted 2176 * @vid: vlan id to be added 2177 * 2178 * net_device_ops implementation for adding vlan ids 2179 **/ 2180 #ifdef I40E_FCOE 2181 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2182 __always_unused __be16 proto, u16 vid) 2183 #else 2184 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2185 __always_unused __be16 proto, u16 vid) 2186 #endif 2187 { 2188 struct i40e_netdev_priv *np = netdev_priv(netdev); 2189 struct i40e_vsi *vsi = np->vsi; 2190 int ret = 0; 2191 2192 if (vid > 4095) 2193 return -EINVAL; 2194 2195 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); 2196 2197 /* If the network stack called us with vid = 0 then 2198 * it is asking to receive priority tagged packets with 2199 * vlan id 0. Our HW receives them by default when configured 2200 * to receive untagged packets so there is no need to add an 2201 * extra filter for vlan 0 tagged packets. 2202 */ 2203 if (vid) 2204 ret = i40e_vsi_add_vlan(vsi, vid); 2205 2206 if (!ret && (vid < VLAN_N_VID)) 2207 set_bit(vid, vsi->active_vlans); 2208 2209 return ret; 2210 } 2211 2212 /** 2213 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2214 * @netdev: network interface to be adjusted 2215 * @vid: vlan id to be removed 2216 * 2217 * net_device_ops implementation for removing vlan ids 2218 **/ 2219 #ifdef I40E_FCOE 2220 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2221 __always_unused __be16 proto, u16 vid) 2222 #else 2223 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2224 __always_unused __be16 proto, u16 vid) 2225 #endif 2226 { 2227 struct i40e_netdev_priv *np = netdev_priv(netdev); 2228 struct i40e_vsi *vsi = np->vsi; 2229 2230 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); 2231 2232 /* return code is ignored as there is nothing a user 2233 * can do about failure to remove and a log message was 2234 * already printed from the other function 2235 */ 2236 i40e_vsi_kill_vlan(vsi, vid); 2237 2238 clear_bit(vid, vsi->active_vlans); 2239 2240 return 0; 2241 } 2242 2243 /** 2244 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2245 * @vsi: the vsi being brought back up 2246 **/ 2247 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2248 { 2249 u16 vid; 2250 2251 if (!vsi->netdev) 2252 return; 2253 2254 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2255 2256 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2257 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2258 vid); 2259 } 2260 2261 /** 2262 * i40e_vsi_add_pvid - Add pvid for the VSI 2263 * @vsi: the vsi being adjusted 2264 * @vid: the vlan id to set as a PVID 2265 **/ 2266 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2267 { 2268 struct i40e_vsi_context ctxt; 2269 i40e_status aq_ret; 2270 2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2272 vsi->info.pvid = cpu_to_le16(vid); 2273 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2274 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2275 I40E_AQ_VSI_PVLAN_EMOD_STR; 2276 2277 ctxt.seid = vsi->seid; 2278 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); 2279 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2280 if (aq_ret) { 2281 dev_info(&vsi->back->pdev->dev, 2282 "%s: update vsi failed, aq_err=%d\n", 2283 __func__, vsi->back->hw.aq.asq_last_status); 2284 return -ENOENT; 2285 } 2286 2287 return 0; 2288 } 2289 2290 /** 2291 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2292 * @vsi: the vsi being adjusted 2293 * 2294 * Just use the vlan_rx_register() service to put it back to normal 2295 **/ 2296 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2297 { 2298 i40e_vlan_stripping_disable(vsi); 2299 2300 vsi->info.pvid = 0; 2301 } 2302 2303 /** 2304 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2305 * @vsi: ptr to the VSI 2306 * 2307 * If this function returns with an error, then it's possible one or 2308 * more of the rings is populated (while the rest are not). It is the 2309 * callers duty to clean those orphaned rings. 2310 * 2311 * Return 0 on success, negative on failure 2312 **/ 2313 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2314 { 2315 int i, err = 0; 2316 2317 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2318 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2319 2320 return err; 2321 } 2322 2323 /** 2324 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2325 * @vsi: ptr to the VSI 2326 * 2327 * Free VSI's transmit software resources 2328 **/ 2329 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2330 { 2331 int i; 2332 2333 if (!vsi->tx_rings) 2334 return; 2335 2336 for (i = 0; i < vsi->num_queue_pairs; i++) 2337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2338 i40e_free_tx_resources(vsi->tx_rings[i]); 2339 } 2340 2341 /** 2342 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2343 * @vsi: ptr to the VSI 2344 * 2345 * If this function returns with an error, then it's possible one or 2346 * more of the rings is populated (while the rest are not). It is the 2347 * callers duty to clean those orphaned rings. 2348 * 2349 * Return 0 on success, negative on failure 2350 **/ 2351 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2352 { 2353 int i, err = 0; 2354 2355 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2356 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2357 #ifdef I40E_FCOE 2358 i40e_fcoe_setup_ddp_resources(vsi); 2359 #endif 2360 return err; 2361 } 2362 2363 /** 2364 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2365 * @vsi: ptr to the VSI 2366 * 2367 * Free all receive software resources 2368 **/ 2369 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2370 { 2371 int i; 2372 2373 if (!vsi->rx_rings) 2374 return; 2375 2376 for (i = 0; i < vsi->num_queue_pairs; i++) 2377 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2378 i40e_free_rx_resources(vsi->rx_rings[i]); 2379 #ifdef I40E_FCOE 2380 i40e_fcoe_free_ddp_resources(vsi); 2381 #endif 2382 } 2383 2384 /** 2385 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2386 * @ring: The Tx ring to configure 2387 * 2388 * This enables/disables XPS for a given Tx descriptor ring 2389 * based on the TCs enabled for the VSI that ring belongs to. 2390 **/ 2391 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2392 { 2393 struct i40e_vsi *vsi = ring->vsi; 2394 cpumask_var_t mask; 2395 2396 if (ring->q_vector && ring->netdev) { 2397 /* Single TC mode enable XPS */ 2398 if (vsi->tc_config.numtc <= 1 && 2399 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) { 2400 netif_set_xps_queue(ring->netdev, 2401 &ring->q_vector->affinity_mask, 2402 ring->queue_index); 2403 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2404 /* Disable XPS to allow selection based on TC */ 2405 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2406 netif_set_xps_queue(ring->netdev, mask, 2407 ring->queue_index); 2408 free_cpumask_var(mask); 2409 } 2410 } 2411 } 2412 2413 /** 2414 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2415 * @ring: The Tx ring to configure 2416 * 2417 * Configure the Tx descriptor ring in the HMC context. 2418 **/ 2419 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2420 { 2421 struct i40e_vsi *vsi = ring->vsi; 2422 u16 pf_q = vsi->base_queue + ring->queue_index; 2423 struct i40e_hw *hw = &vsi->back->hw; 2424 struct i40e_hmc_obj_txq tx_ctx; 2425 i40e_status err = 0; 2426 u32 qtx_ctl = 0; 2427 2428 /* some ATR related tx ring init */ 2429 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 2430 ring->atr_sample_rate = vsi->back->atr_sample_rate; 2431 ring->atr_count = 0; 2432 } else { 2433 ring->atr_sample_rate = 0; 2434 } 2435 2436 /* configure XPS */ 2437 i40e_config_xps_tx_ring(ring); 2438 2439 /* clear the context structure first */ 2440 memset(&tx_ctx, 0, sizeof(tx_ctx)); 2441 2442 tx_ctx.new_context = 1; 2443 tx_ctx.base = (ring->dma / 128); 2444 tx_ctx.qlen = ring->count; 2445 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 2446 I40E_FLAG_FD_ATR_ENABLED)); 2447 #ifdef I40E_FCOE 2448 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2449 #endif 2450 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 2451 /* FDIR VSI tx ring can still use RS bit and writebacks */ 2452 if (vsi->type != I40E_VSI_FDIR) 2453 tx_ctx.head_wb_ena = 1; 2454 tx_ctx.head_wb_addr = ring->dma + 2455 (ring->count * sizeof(struct i40e_tx_desc)); 2456 2457 /* As part of VSI creation/update, FW allocates certain 2458 * Tx arbitration queue sets for each TC enabled for 2459 * the VSI. The FW returns the handles to these queue 2460 * sets as part of the response buffer to Add VSI, 2461 * Update VSI, etc. AQ commands. It is expected that 2462 * these queue set handles be associated with the Tx 2463 * queues by the driver as part of the TX queue context 2464 * initialization. This has to be done regardless of 2465 * DCB as by default everything is mapped to TC0. 2466 */ 2467 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 2468 tx_ctx.rdylist_act = 0; 2469 2470 /* clear the context in the HMC */ 2471 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 2472 if (err) { 2473 dev_info(&vsi->back->pdev->dev, 2474 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 2475 ring->queue_index, pf_q, err); 2476 return -ENOMEM; 2477 } 2478 2479 /* set the context in the HMC */ 2480 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 2481 if (err) { 2482 dev_info(&vsi->back->pdev->dev, 2483 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 2484 ring->queue_index, pf_q, err); 2485 return -ENOMEM; 2486 } 2487 2488 /* Now associate this queue with this PCI function */ 2489 if (vsi->type == I40E_VSI_VMDQ2) { 2490 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 2491 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 2492 I40E_QTX_CTL_VFVM_INDX_MASK; 2493 } else { 2494 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 2495 } 2496 2497 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 2498 I40E_QTX_CTL_PF_INDX_MASK); 2499 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 2500 i40e_flush(hw); 2501 2502 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 2503 2504 /* cache tail off for easier writes later */ 2505 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 2506 2507 return 0; 2508 } 2509 2510 /** 2511 * i40e_configure_rx_ring - Configure a receive ring context 2512 * @ring: The Rx ring to configure 2513 * 2514 * Configure the Rx descriptor ring in the HMC context. 2515 **/ 2516 static int i40e_configure_rx_ring(struct i40e_ring *ring) 2517 { 2518 struct i40e_vsi *vsi = ring->vsi; 2519 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 2520 u16 pf_q = vsi->base_queue + ring->queue_index; 2521 struct i40e_hw *hw = &vsi->back->hw; 2522 struct i40e_hmc_obj_rxq rx_ctx; 2523 i40e_status err = 0; 2524 2525 ring->state = 0; 2526 2527 /* clear the context structure first */ 2528 memset(&rx_ctx, 0, sizeof(rx_ctx)); 2529 2530 ring->rx_buf_len = vsi->rx_buf_len; 2531 ring->rx_hdr_len = vsi->rx_hdr_len; 2532 2533 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 2534 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; 2535 2536 rx_ctx.base = (ring->dma / 128); 2537 rx_ctx.qlen = ring->count; 2538 2539 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { 2540 set_ring_16byte_desc_enabled(ring); 2541 rx_ctx.dsize = 0; 2542 } else { 2543 rx_ctx.dsize = 1; 2544 } 2545 2546 rx_ctx.dtype = vsi->dtype; 2547 if (vsi->dtype) { 2548 set_ring_ps_enabled(ring); 2549 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | 2550 I40E_RX_SPLIT_IP | 2551 I40E_RX_SPLIT_TCP_UDP | 2552 I40E_RX_SPLIT_SCTP; 2553 } else { 2554 rx_ctx.hsplit_0 = 0; 2555 } 2556 2557 rx_ctx.rxmax = min_t(u16, vsi->max_frame, 2558 (chain_len * ring->rx_buf_len)); 2559 if (hw->revision_id == 0) 2560 rx_ctx.lrxqthresh = 0; 2561 else 2562 rx_ctx.lrxqthresh = 2; 2563 rx_ctx.crcstrip = 1; 2564 rx_ctx.l2tsel = 1; 2565 rx_ctx.showiv = 1; 2566 #ifdef I40E_FCOE 2567 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2568 #endif 2569 /* set the prefena field to 1 because the manual says to */ 2570 rx_ctx.prefena = 1; 2571 2572 /* clear the context in the HMC */ 2573 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2574 if (err) { 2575 dev_info(&vsi->back->pdev->dev, 2576 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2577 ring->queue_index, pf_q, err); 2578 return -ENOMEM; 2579 } 2580 2581 /* set the context in the HMC */ 2582 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 2583 if (err) { 2584 dev_info(&vsi->back->pdev->dev, 2585 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2586 ring->queue_index, pf_q, err); 2587 return -ENOMEM; 2588 } 2589 2590 /* cache tail for quicker writes, and clear the reg before use */ 2591 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 2592 writel(0, ring->tail); 2593 2594 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); 2595 2596 return 0; 2597 } 2598 2599 /** 2600 * i40e_vsi_configure_tx - Configure the VSI for Tx 2601 * @vsi: VSI structure describing this set of rings and resources 2602 * 2603 * Configure the Tx VSI for operation. 2604 **/ 2605 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 2606 { 2607 int err = 0; 2608 u16 i; 2609 2610 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 2611 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 2612 2613 return err; 2614 } 2615 2616 /** 2617 * i40e_vsi_configure_rx - Configure the VSI for Rx 2618 * @vsi: the VSI being configured 2619 * 2620 * Configure the Rx VSI for operation. 2621 **/ 2622 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 2623 { 2624 int err = 0; 2625 u16 i; 2626 2627 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 2628 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 2629 + ETH_FCS_LEN + VLAN_HLEN; 2630 else 2631 vsi->max_frame = I40E_RXBUFFER_2048; 2632 2633 /* figure out correct receive buffer length */ 2634 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | 2635 I40E_FLAG_RX_PS_ENABLED)) { 2636 case I40E_FLAG_RX_1BUF_ENABLED: 2637 vsi->rx_hdr_len = 0; 2638 vsi->rx_buf_len = vsi->max_frame; 2639 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2640 break; 2641 case I40E_FLAG_RX_PS_ENABLED: 2642 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2643 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2644 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; 2645 break; 2646 default: 2647 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2648 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2649 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; 2650 break; 2651 } 2652 2653 #ifdef I40E_FCOE 2654 /* setup rx buffer for FCoE */ 2655 if ((vsi->type == I40E_VSI_FCOE) && 2656 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 2657 vsi->rx_hdr_len = 0; 2658 vsi->rx_buf_len = I40E_RXBUFFER_3072; 2659 vsi->max_frame = I40E_RXBUFFER_3072; 2660 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2661 } 2662 2663 #endif /* I40E_FCOE */ 2664 /* round up for the chip's needs */ 2665 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, 2666 (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); 2667 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 2668 (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); 2669 2670 /* set up individual rings */ 2671 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2672 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 2673 2674 return err; 2675 } 2676 2677 /** 2678 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 2679 * @vsi: ptr to the VSI 2680 **/ 2681 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2682 { 2683 struct i40e_ring *tx_ring, *rx_ring; 2684 u16 qoffset, qcount; 2685 int i, n; 2686 2687 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) 2688 return; 2689 2690 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2691 if (!(vsi->tc_config.enabled_tc & (1 << n))) 2692 continue; 2693 2694 qoffset = vsi->tc_config.tc_info[n].qoffset; 2695 qcount = vsi->tc_config.tc_info[n].qcount; 2696 for (i = qoffset; i < (qoffset + qcount); i++) { 2697 rx_ring = vsi->rx_rings[i]; 2698 tx_ring = vsi->tx_rings[i]; 2699 rx_ring->dcb_tc = n; 2700 tx_ring->dcb_tc = n; 2701 } 2702 } 2703 } 2704 2705 /** 2706 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 2707 * @vsi: ptr to the VSI 2708 **/ 2709 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 2710 { 2711 if (vsi->netdev) 2712 i40e_set_rx_mode(vsi->netdev); 2713 } 2714 2715 /** 2716 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 2717 * @vsi: Pointer to the targeted VSI 2718 * 2719 * This function replays the hlist on the hw where all the SB Flow Director 2720 * filters were saved. 2721 **/ 2722 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 2723 { 2724 struct i40e_fdir_filter *filter; 2725 struct i40e_pf *pf = vsi->back; 2726 struct hlist_node *node; 2727 2728 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 2729 return; 2730 2731 hlist_for_each_entry_safe(filter, node, 2732 &pf->fdir_filter_list, fdir_node) { 2733 i40e_add_del_fdir(vsi, filter, true); 2734 } 2735 } 2736 2737 /** 2738 * i40e_vsi_configure - Set up the VSI for action 2739 * @vsi: the VSI being configured 2740 **/ 2741 static int i40e_vsi_configure(struct i40e_vsi *vsi) 2742 { 2743 int err; 2744 2745 i40e_set_vsi_rx_mode(vsi); 2746 i40e_restore_vlan(vsi); 2747 i40e_vsi_config_dcb_rings(vsi); 2748 err = i40e_vsi_configure_tx(vsi); 2749 if (!err) 2750 err = i40e_vsi_configure_rx(vsi); 2751 2752 return err; 2753 } 2754 2755 /** 2756 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 2757 * @vsi: the VSI being configured 2758 **/ 2759 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 2760 { 2761 struct i40e_pf *pf = vsi->back; 2762 struct i40e_q_vector *q_vector; 2763 struct i40e_hw *hw = &pf->hw; 2764 u16 vector; 2765 int i, q; 2766 u32 val; 2767 u32 qp; 2768 2769 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 2770 * and PFINT_LNKLSTn registers, e.g.: 2771 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 2772 */ 2773 qp = vsi->base_queue; 2774 vector = vsi->base_vector; 2775 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 2776 q_vector = vsi->q_vectors[i]; 2777 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2778 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2779 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 2780 q_vector->rx.itr); 2781 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2782 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2783 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 2784 q_vector->tx.itr); 2785 2786 /* Linked list for the queuepairs assigned to this vector */ 2787 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 2788 for (q = 0; q < q_vector->num_ringpairs; q++) { 2789 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2790 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2791 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 2792 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 2793 (I40E_QUEUE_TYPE_TX 2794 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 2795 2796 wr32(hw, I40E_QINT_RQCTL(qp), val); 2797 2798 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2799 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2800 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 2801 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 2802 (I40E_QUEUE_TYPE_RX 2803 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2804 2805 /* Terminate the linked list */ 2806 if (q == (q_vector->num_ringpairs - 1)) 2807 val |= (I40E_QUEUE_END_OF_LIST 2808 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2809 2810 wr32(hw, I40E_QINT_TQCTL(qp), val); 2811 qp++; 2812 } 2813 } 2814 2815 i40e_flush(hw); 2816 } 2817 2818 /** 2819 * i40e_enable_misc_int_causes - enable the non-queue interrupts 2820 * @hw: ptr to the hardware info 2821 **/ 2822 static void i40e_enable_misc_int_causes(struct i40e_hw *hw) 2823 { 2824 u32 val; 2825 2826 /* clear things first */ 2827 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 2828 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 2829 2830 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 2831 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 2832 I40E_PFINT_ICR0_ENA_GRST_MASK | 2833 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 2834 I40E_PFINT_ICR0_ENA_GPIO_MASK | 2835 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK | 2836 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 2837 I40E_PFINT_ICR0_ENA_VFLR_MASK | 2838 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 2839 2840 wr32(hw, I40E_PFINT_ICR0_ENA, val); 2841 2842 /* SW_ITR_IDX = 0, but don't change INTENA */ 2843 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 2844 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 2845 2846 /* OTHER_ITR_IDX = 0 */ 2847 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 2848 } 2849 2850 /** 2851 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 2852 * @vsi: the VSI being configured 2853 **/ 2854 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 2855 { 2856 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 2857 struct i40e_pf *pf = vsi->back; 2858 struct i40e_hw *hw = &pf->hw; 2859 u32 val; 2860 2861 /* set the ITR configuration */ 2862 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2863 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2864 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 2865 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2866 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2867 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 2868 2869 i40e_enable_misc_int_causes(hw); 2870 2871 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 2872 wr32(hw, I40E_PFINT_LNKLST0, 0); 2873 2874 /* Associate the queue pair to the vector and enable the queue int */ 2875 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2876 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2877 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2878 2879 wr32(hw, I40E_QINT_RQCTL(0), val); 2880 2881 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2882 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2883 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2884 2885 wr32(hw, I40E_QINT_TQCTL(0), val); 2886 i40e_flush(hw); 2887 } 2888 2889 /** 2890 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 2891 * @pf: board private structure 2892 **/ 2893 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 2894 { 2895 struct i40e_hw *hw = &pf->hw; 2896 2897 wr32(hw, I40E_PFINT_DYN_CTL0, 2898 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2899 i40e_flush(hw); 2900 } 2901 2902 /** 2903 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 2904 * @pf: board private structure 2905 **/ 2906 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 2907 { 2908 struct i40e_hw *hw = &pf->hw; 2909 u32 val; 2910 2911 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 2912 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 2913 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 2914 2915 wr32(hw, I40E_PFINT_DYN_CTL0, val); 2916 i40e_flush(hw); 2917 } 2918 2919 /** 2920 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 2921 * @vsi: pointer to a vsi 2922 * @vector: enable a particular Hw Interrupt vector 2923 **/ 2924 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 2925 { 2926 struct i40e_pf *pf = vsi->back; 2927 struct i40e_hw *hw = &pf->hw; 2928 u32 val; 2929 2930 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 2931 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 2932 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2933 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2934 /* skip the flush */ 2935 } 2936 2937 /** 2938 * i40e_irq_dynamic_disable - Disable default interrupt generation settings 2939 * @vsi: pointer to a vsi 2940 * @vector: enable a particular Hw Interrupt vector 2941 **/ 2942 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector) 2943 { 2944 struct i40e_pf *pf = vsi->back; 2945 struct i40e_hw *hw = &pf->hw; 2946 u32 val; 2947 2948 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT; 2949 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2950 i40e_flush(hw); 2951 } 2952 2953 /** 2954 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 2955 * @irq: interrupt number 2956 * @data: pointer to a q_vector 2957 **/ 2958 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 2959 { 2960 struct i40e_q_vector *q_vector = data; 2961 2962 if (!q_vector->tx.ring && !q_vector->rx.ring) 2963 return IRQ_HANDLED; 2964 2965 napi_schedule(&q_vector->napi); 2966 2967 return IRQ_HANDLED; 2968 } 2969 2970 /** 2971 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 2972 * @vsi: the VSI being configured 2973 * @basename: name for the vector 2974 * 2975 * Allocates MSI-X vectors and requests interrupts from the kernel. 2976 **/ 2977 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 2978 { 2979 int q_vectors = vsi->num_q_vectors; 2980 struct i40e_pf *pf = vsi->back; 2981 int base = vsi->base_vector; 2982 int rx_int_idx = 0; 2983 int tx_int_idx = 0; 2984 int vector, err; 2985 2986 for (vector = 0; vector < q_vectors; vector++) { 2987 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 2988 2989 if (q_vector->tx.ring && q_vector->rx.ring) { 2990 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 2991 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 2992 tx_int_idx++; 2993 } else if (q_vector->rx.ring) { 2994 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 2995 "%s-%s-%d", basename, "rx", rx_int_idx++); 2996 } else if (q_vector->tx.ring) { 2997 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 2998 "%s-%s-%d", basename, "tx", tx_int_idx++); 2999 } else { 3000 /* skip this unused q_vector */ 3001 continue; 3002 } 3003 err = request_irq(pf->msix_entries[base + vector].vector, 3004 vsi->irq_handler, 3005 0, 3006 q_vector->name, 3007 q_vector); 3008 if (err) { 3009 dev_info(&pf->pdev->dev, 3010 "%s: request_irq failed, error: %d\n", 3011 __func__, err); 3012 goto free_queue_irqs; 3013 } 3014 /* assign the mask for this irq */ 3015 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3016 &q_vector->affinity_mask); 3017 } 3018 3019 vsi->irqs_ready = true; 3020 return 0; 3021 3022 free_queue_irqs: 3023 while (vector) { 3024 vector--; 3025 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3026 NULL); 3027 free_irq(pf->msix_entries[base + vector].vector, 3028 &(vsi->q_vectors[vector])); 3029 } 3030 return err; 3031 } 3032 3033 /** 3034 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3035 * @vsi: the VSI being un-configured 3036 **/ 3037 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3038 { 3039 struct i40e_pf *pf = vsi->back; 3040 struct i40e_hw *hw = &pf->hw; 3041 int base = vsi->base_vector; 3042 int i; 3043 3044 for (i = 0; i < vsi->num_queue_pairs; i++) { 3045 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3046 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3047 } 3048 3049 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3050 for (i = vsi->base_vector; 3051 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3052 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3053 3054 i40e_flush(hw); 3055 for (i = 0; i < vsi->num_q_vectors; i++) 3056 synchronize_irq(pf->msix_entries[i + base].vector); 3057 } else { 3058 /* Legacy and MSI mode - this stops all interrupt handling */ 3059 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3060 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3061 i40e_flush(hw); 3062 synchronize_irq(pf->pdev->irq); 3063 } 3064 } 3065 3066 /** 3067 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3068 * @vsi: the VSI being configured 3069 **/ 3070 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3071 { 3072 struct i40e_pf *pf = vsi->back; 3073 int i; 3074 3075 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3076 for (i = vsi->base_vector; 3077 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3078 i40e_irq_dynamic_enable(vsi, i); 3079 } else { 3080 i40e_irq_dynamic_enable_icr0(pf); 3081 } 3082 3083 i40e_flush(&pf->hw); 3084 return 0; 3085 } 3086 3087 /** 3088 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3089 * @pf: board private structure 3090 **/ 3091 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3092 { 3093 /* Disable ICR 0 */ 3094 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3095 i40e_flush(&pf->hw); 3096 } 3097 3098 /** 3099 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3100 * @irq: interrupt number 3101 * @data: pointer to a q_vector 3102 * 3103 * This is the handler used for all MSI/Legacy interrupts, and deals 3104 * with both queue and non-queue interrupts. This is also used in 3105 * MSIX mode to handle the non-queue interrupts. 3106 **/ 3107 static irqreturn_t i40e_intr(int irq, void *data) 3108 { 3109 struct i40e_pf *pf = (struct i40e_pf *)data; 3110 struct i40e_hw *hw = &pf->hw; 3111 irqreturn_t ret = IRQ_NONE; 3112 u32 icr0, icr0_remaining; 3113 u32 val, ena_mask; 3114 3115 icr0 = rd32(hw, I40E_PFINT_ICR0); 3116 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3117 3118 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3119 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3120 goto enable_intr; 3121 3122 /* if interrupt but no bits showing, must be SWINT */ 3123 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3124 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3125 pf->sw_int_count++; 3126 3127 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3128 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3129 3130 /* temporarily disable queue cause for NAPI processing */ 3131 u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); 3132 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3133 wr32(hw, I40E_QINT_RQCTL(0), qval); 3134 3135 qval = rd32(hw, I40E_QINT_TQCTL(0)); 3136 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3137 wr32(hw, I40E_QINT_TQCTL(0), qval); 3138 3139 if (!test_bit(__I40E_DOWN, &pf->state)) 3140 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); 3141 } 3142 3143 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3144 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3145 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3146 } 3147 3148 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3149 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3150 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3151 } 3152 3153 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3154 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3155 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3156 } 3157 3158 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3159 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3160 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3161 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3162 val = rd32(hw, I40E_GLGEN_RSTAT); 3163 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3164 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3165 if (val == I40E_RESET_CORER) { 3166 pf->corer_count++; 3167 } else if (val == I40E_RESET_GLOBR) { 3168 pf->globr_count++; 3169 } else if (val == I40E_RESET_EMPR) { 3170 pf->empr_count++; 3171 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state); 3172 } 3173 } 3174 3175 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3176 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3177 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3178 } 3179 3180 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3181 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3182 3183 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3184 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3185 i40e_ptp_tx_hwtstamp(pf); 3186 } 3187 } 3188 3189 /* If a critical error is pending we have no choice but to reset the 3190 * device. 3191 * Report and mask out any remaining unexpected interrupts. 3192 */ 3193 icr0_remaining = icr0 & ena_mask; 3194 if (icr0_remaining) { 3195 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3196 icr0_remaining); 3197 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3198 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3199 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3200 dev_info(&pf->pdev->dev, "device will be reset\n"); 3201 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3202 i40e_service_event_schedule(pf); 3203 } 3204 ena_mask &= ~icr0_remaining; 3205 } 3206 ret = IRQ_HANDLED; 3207 3208 enable_intr: 3209 /* re-enable interrupt causes */ 3210 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3211 if (!test_bit(__I40E_DOWN, &pf->state)) { 3212 i40e_service_event_schedule(pf); 3213 i40e_irq_dynamic_enable_icr0(pf); 3214 } 3215 3216 return ret; 3217 } 3218 3219 /** 3220 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3221 * @tx_ring: tx ring to clean 3222 * @budget: how many cleans we're allowed 3223 * 3224 * Returns true if there's any budget left (e.g. the clean is finished) 3225 **/ 3226 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3227 { 3228 struct i40e_vsi *vsi = tx_ring->vsi; 3229 u16 i = tx_ring->next_to_clean; 3230 struct i40e_tx_buffer *tx_buf; 3231 struct i40e_tx_desc *tx_desc; 3232 3233 tx_buf = &tx_ring->tx_bi[i]; 3234 tx_desc = I40E_TX_DESC(tx_ring, i); 3235 i -= tx_ring->count; 3236 3237 do { 3238 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3239 3240 /* if next_to_watch is not set then there is no work pending */ 3241 if (!eop_desc) 3242 break; 3243 3244 /* prevent any other reads prior to eop_desc */ 3245 read_barrier_depends(); 3246 3247 /* if the descriptor isn't done, no work yet to do */ 3248 if (!(eop_desc->cmd_type_offset_bsz & 3249 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3250 break; 3251 3252 /* clear next_to_watch to prevent false hangs */ 3253 tx_buf->next_to_watch = NULL; 3254 3255 tx_desc->buffer_addr = 0; 3256 tx_desc->cmd_type_offset_bsz = 0; 3257 /* move past filter desc */ 3258 tx_buf++; 3259 tx_desc++; 3260 i++; 3261 if (unlikely(!i)) { 3262 i -= tx_ring->count; 3263 tx_buf = tx_ring->tx_bi; 3264 tx_desc = I40E_TX_DESC(tx_ring, 0); 3265 } 3266 /* unmap skb header data */ 3267 dma_unmap_single(tx_ring->dev, 3268 dma_unmap_addr(tx_buf, dma), 3269 dma_unmap_len(tx_buf, len), 3270 DMA_TO_DEVICE); 3271 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3272 kfree(tx_buf->raw_buf); 3273 3274 tx_buf->raw_buf = NULL; 3275 tx_buf->tx_flags = 0; 3276 tx_buf->next_to_watch = NULL; 3277 dma_unmap_len_set(tx_buf, len, 0); 3278 tx_desc->buffer_addr = 0; 3279 tx_desc->cmd_type_offset_bsz = 0; 3280 3281 /* move us past the eop_desc for start of next FD desc */ 3282 tx_buf++; 3283 tx_desc++; 3284 i++; 3285 if (unlikely(!i)) { 3286 i -= tx_ring->count; 3287 tx_buf = tx_ring->tx_bi; 3288 tx_desc = I40E_TX_DESC(tx_ring, 0); 3289 } 3290 3291 /* update budget accounting */ 3292 budget--; 3293 } while (likely(budget)); 3294 3295 i += tx_ring->count; 3296 tx_ring->next_to_clean = i; 3297 3298 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { 3299 i40e_irq_dynamic_enable(vsi, 3300 tx_ring->q_vector->v_idx + vsi->base_vector); 3301 } 3302 return budget > 0; 3303 } 3304 3305 /** 3306 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3307 * @irq: interrupt number 3308 * @data: pointer to a q_vector 3309 **/ 3310 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3311 { 3312 struct i40e_q_vector *q_vector = data; 3313 struct i40e_vsi *vsi; 3314 3315 if (!q_vector->tx.ring) 3316 return IRQ_HANDLED; 3317 3318 vsi = q_vector->tx.ring->vsi; 3319 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3320 3321 return IRQ_HANDLED; 3322 } 3323 3324 /** 3325 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3326 * @vsi: the VSI being configured 3327 * @v_idx: vector index 3328 * @qp_idx: queue pair index 3329 **/ 3330 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3331 { 3332 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3333 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3334 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3335 3336 tx_ring->q_vector = q_vector; 3337 tx_ring->next = q_vector->tx.ring; 3338 q_vector->tx.ring = tx_ring; 3339 q_vector->tx.count++; 3340 3341 rx_ring->q_vector = q_vector; 3342 rx_ring->next = q_vector->rx.ring; 3343 q_vector->rx.ring = rx_ring; 3344 q_vector->rx.count++; 3345 } 3346 3347 /** 3348 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3349 * @vsi: the VSI being configured 3350 * 3351 * This function maps descriptor rings to the queue-specific vectors 3352 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3353 * one vector per queue pair, but on a constrained vector budget, we 3354 * group the queue pairs as "efficiently" as possible. 3355 **/ 3356 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3357 { 3358 int qp_remaining = vsi->num_queue_pairs; 3359 int q_vectors = vsi->num_q_vectors; 3360 int num_ringpairs; 3361 int v_start = 0; 3362 int qp_idx = 0; 3363 3364 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3365 * group them so there are multiple queues per vector. 3366 * It is also important to go through all the vectors available to be 3367 * sure that if we don't use all the vectors, that the remaining vectors 3368 * are cleared. This is especially important when decreasing the 3369 * number of queues in use. 3370 */ 3371 for (; v_start < q_vectors; v_start++) { 3372 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3373 3374 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3375 3376 q_vector->num_ringpairs = num_ringpairs; 3377 3378 q_vector->rx.count = 0; 3379 q_vector->tx.count = 0; 3380 q_vector->rx.ring = NULL; 3381 q_vector->tx.ring = NULL; 3382 3383 while (num_ringpairs--) { 3384 map_vector_to_qp(vsi, v_start, qp_idx); 3385 qp_idx++; 3386 qp_remaining--; 3387 } 3388 } 3389 } 3390 3391 /** 3392 * i40e_vsi_request_irq - Request IRQ from the OS 3393 * @vsi: the VSI being configured 3394 * @basename: name for the vector 3395 **/ 3396 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3397 { 3398 struct i40e_pf *pf = vsi->back; 3399 int err; 3400 3401 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3402 err = i40e_vsi_request_irq_msix(vsi, basename); 3403 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3404 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3405 pf->misc_int_name, pf); 3406 else 3407 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3408 pf->misc_int_name, pf); 3409 3410 if (err) 3411 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3412 3413 return err; 3414 } 3415 3416 #ifdef CONFIG_NET_POLL_CONTROLLER 3417 /** 3418 * i40e_netpoll - A Polling 'interrupt'handler 3419 * @netdev: network interface device structure 3420 * 3421 * This is used by netconsole to send skbs without having to re-enable 3422 * interrupts. It's not called while the normal interrupt routine is executing. 3423 **/ 3424 #ifdef I40E_FCOE 3425 void i40e_netpoll(struct net_device *netdev) 3426 #else 3427 static void i40e_netpoll(struct net_device *netdev) 3428 #endif 3429 { 3430 struct i40e_netdev_priv *np = netdev_priv(netdev); 3431 struct i40e_vsi *vsi = np->vsi; 3432 struct i40e_pf *pf = vsi->back; 3433 int i; 3434 3435 /* if interface is down do nothing */ 3436 if (test_bit(__I40E_DOWN, &vsi->state)) 3437 return; 3438 3439 pf->flags |= I40E_FLAG_IN_NETPOLL; 3440 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3441 for (i = 0; i < vsi->num_q_vectors; i++) 3442 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 3443 } else { 3444 i40e_intr(pf->pdev->irq, netdev); 3445 } 3446 pf->flags &= ~I40E_FLAG_IN_NETPOLL; 3447 } 3448 #endif 3449 3450 /** 3451 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 3452 * @pf: the PF being configured 3453 * @pf_q: the PF queue 3454 * @enable: enable or disable state of the queue 3455 * 3456 * This routine will wait for the given Tx queue of the PF to reach the 3457 * enabled or disabled state. 3458 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3459 * multiple retries; else will return 0 in case of success. 3460 **/ 3461 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3462 { 3463 int i; 3464 u32 tx_reg; 3465 3466 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3467 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 3468 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3469 break; 3470 3471 usleep_range(10, 20); 3472 } 3473 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3474 return -ETIMEDOUT; 3475 3476 return 0; 3477 } 3478 3479 /** 3480 * i40e_vsi_control_tx - Start or stop a VSI's rings 3481 * @vsi: the VSI being configured 3482 * @enable: start or stop the rings 3483 **/ 3484 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 3485 { 3486 struct i40e_pf *pf = vsi->back; 3487 struct i40e_hw *hw = &pf->hw; 3488 int i, j, pf_q, ret = 0; 3489 u32 tx_reg; 3490 3491 pf_q = vsi->base_queue; 3492 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3493 3494 /* warn the TX unit of coming changes */ 3495 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 3496 if (!enable) 3497 usleep_range(10, 20); 3498 3499 for (j = 0; j < 50; j++) { 3500 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3501 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3502 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 3503 break; 3504 usleep_range(1000, 2000); 3505 } 3506 /* Skip if the queue is already in the requested state */ 3507 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3508 continue; 3509 3510 /* turn on/off the queue */ 3511 if (enable) { 3512 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 3513 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3514 } else { 3515 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 3516 } 3517 3518 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 3519 /* No waiting for the Tx queue to disable */ 3520 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3521 continue; 3522 3523 /* wait for the change to finish */ 3524 ret = i40e_pf_txq_wait(pf, pf_q, enable); 3525 if (ret) { 3526 dev_info(&pf->pdev->dev, 3527 "%s: VSI seid %d Tx ring %d %sable timeout\n", 3528 __func__, vsi->seid, pf_q, 3529 (enable ? "en" : "dis")); 3530 break; 3531 } 3532 } 3533 3534 if (hw->revision_id == 0) 3535 mdelay(50); 3536 return ret; 3537 } 3538 3539 /** 3540 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 3541 * @pf: the PF being configured 3542 * @pf_q: the PF queue 3543 * @enable: enable or disable state of the queue 3544 * 3545 * This routine will wait for the given Rx queue of the PF to reach the 3546 * enabled or disabled state. 3547 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3548 * multiple retries; else will return 0 in case of success. 3549 **/ 3550 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3551 { 3552 int i; 3553 u32 rx_reg; 3554 3555 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3556 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 3557 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3558 break; 3559 3560 usleep_range(10, 20); 3561 } 3562 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3563 return -ETIMEDOUT; 3564 3565 return 0; 3566 } 3567 3568 /** 3569 * i40e_vsi_control_rx - Start or stop a VSI's rings 3570 * @vsi: the VSI being configured 3571 * @enable: start or stop the rings 3572 **/ 3573 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 3574 { 3575 struct i40e_pf *pf = vsi->back; 3576 struct i40e_hw *hw = &pf->hw; 3577 int i, j, pf_q, ret = 0; 3578 u32 rx_reg; 3579 3580 pf_q = vsi->base_queue; 3581 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3582 for (j = 0; j < 50; j++) { 3583 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3584 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 3585 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 3586 break; 3587 usleep_range(1000, 2000); 3588 } 3589 3590 /* Skip if the queue is already in the requested state */ 3591 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3592 continue; 3593 3594 /* turn on/off the queue */ 3595 if (enable) 3596 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 3597 else 3598 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 3599 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 3600 3601 /* wait for the change to finish */ 3602 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 3603 if (ret) { 3604 dev_info(&pf->pdev->dev, 3605 "%s: VSI seid %d Rx ring %d %sable timeout\n", 3606 __func__, vsi->seid, pf_q, 3607 (enable ? "en" : "dis")); 3608 break; 3609 } 3610 } 3611 3612 return ret; 3613 } 3614 3615 /** 3616 * i40e_vsi_control_rings - Start or stop a VSI's rings 3617 * @vsi: the VSI being configured 3618 * @enable: start or stop the rings 3619 **/ 3620 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) 3621 { 3622 int ret = 0; 3623 3624 /* do rx first for enable and last for disable */ 3625 if (request) { 3626 ret = i40e_vsi_control_rx(vsi, request); 3627 if (ret) 3628 return ret; 3629 ret = i40e_vsi_control_tx(vsi, request); 3630 } else { 3631 /* Ignore return value, we need to shutdown whatever we can */ 3632 i40e_vsi_control_tx(vsi, request); 3633 i40e_vsi_control_rx(vsi, request); 3634 } 3635 3636 return ret; 3637 } 3638 3639 /** 3640 * i40e_vsi_free_irq - Free the irq association with the OS 3641 * @vsi: the VSI being configured 3642 **/ 3643 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 3644 { 3645 struct i40e_pf *pf = vsi->back; 3646 struct i40e_hw *hw = &pf->hw; 3647 int base = vsi->base_vector; 3648 u32 val, qp; 3649 int i; 3650 3651 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3652 if (!vsi->q_vectors) 3653 return; 3654 3655 if (!vsi->irqs_ready) 3656 return; 3657 3658 vsi->irqs_ready = false; 3659 for (i = 0; i < vsi->num_q_vectors; i++) { 3660 u16 vector = i + base; 3661 3662 /* free only the irqs that were actually requested */ 3663 if (!vsi->q_vectors[i] || 3664 !vsi->q_vectors[i]->num_ringpairs) 3665 continue; 3666 3667 /* clear the affinity_mask in the IRQ descriptor */ 3668 irq_set_affinity_hint(pf->msix_entries[vector].vector, 3669 NULL); 3670 free_irq(pf->msix_entries[vector].vector, 3671 vsi->q_vectors[i]); 3672 3673 /* Tear down the interrupt queue link list 3674 * 3675 * We know that they come in pairs and always 3676 * the Rx first, then the Tx. To clear the 3677 * link list, stick the EOL value into the 3678 * next_q field of the registers. 3679 */ 3680 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 3681 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3682 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3683 val |= I40E_QUEUE_END_OF_LIST 3684 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3685 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 3686 3687 while (qp != I40E_QUEUE_END_OF_LIST) { 3688 u32 next; 3689 3690 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3691 3692 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3693 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3694 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3695 I40E_QINT_RQCTL_INTEVENT_MASK); 3696 3697 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3698 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3699 3700 wr32(hw, I40E_QINT_RQCTL(qp), val); 3701 3702 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3703 3704 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 3705 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 3706 3707 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3708 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3709 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3710 I40E_QINT_TQCTL_INTEVENT_MASK); 3711 3712 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3713 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3714 3715 wr32(hw, I40E_QINT_TQCTL(qp), val); 3716 qp = next; 3717 } 3718 } 3719 } else { 3720 free_irq(pf->pdev->irq, pf); 3721 3722 val = rd32(hw, I40E_PFINT_LNKLST0); 3723 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3724 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3725 val |= I40E_QUEUE_END_OF_LIST 3726 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 3727 wr32(hw, I40E_PFINT_LNKLST0, val); 3728 3729 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3730 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3731 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3732 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3733 I40E_QINT_RQCTL_INTEVENT_MASK); 3734 3735 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3736 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3737 3738 wr32(hw, I40E_QINT_RQCTL(qp), val); 3739 3740 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3741 3742 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3743 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3744 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3745 I40E_QINT_TQCTL_INTEVENT_MASK); 3746 3747 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3748 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3749 3750 wr32(hw, I40E_QINT_TQCTL(qp), val); 3751 } 3752 } 3753 3754 /** 3755 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 3756 * @vsi: the VSI being configured 3757 * @v_idx: Index of vector to be freed 3758 * 3759 * This function frees the memory allocated to the q_vector. In addition if 3760 * NAPI is enabled it will delete any references to the NAPI struct prior 3761 * to freeing the q_vector. 3762 **/ 3763 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 3764 { 3765 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3766 struct i40e_ring *ring; 3767 3768 if (!q_vector) 3769 return; 3770 3771 /* disassociate q_vector from rings */ 3772 i40e_for_each_ring(ring, q_vector->tx) 3773 ring->q_vector = NULL; 3774 3775 i40e_for_each_ring(ring, q_vector->rx) 3776 ring->q_vector = NULL; 3777 3778 /* only VSI w/ an associated netdev is set up w/ NAPI */ 3779 if (vsi->netdev) 3780 netif_napi_del(&q_vector->napi); 3781 3782 vsi->q_vectors[v_idx] = NULL; 3783 3784 kfree_rcu(q_vector, rcu); 3785 } 3786 3787 /** 3788 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 3789 * @vsi: the VSI being un-configured 3790 * 3791 * This frees the memory allocated to the q_vectors and 3792 * deletes references to the NAPI struct. 3793 **/ 3794 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 3795 { 3796 int v_idx; 3797 3798 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 3799 i40e_free_q_vector(vsi, v_idx); 3800 } 3801 3802 /** 3803 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 3804 * @pf: board private structure 3805 **/ 3806 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 3807 { 3808 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 3809 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3810 pci_disable_msix(pf->pdev); 3811 kfree(pf->msix_entries); 3812 pf->msix_entries = NULL; 3813 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 3814 pci_disable_msi(pf->pdev); 3815 } 3816 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 3817 } 3818 3819 /** 3820 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 3821 * @pf: board private structure 3822 * 3823 * We go through and clear interrupt specific resources and reset the structure 3824 * to pre-load conditions 3825 **/ 3826 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 3827 { 3828 int i; 3829 3830 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3831 for (i = 0; i < pf->num_alloc_vsi; i++) 3832 if (pf->vsi[i]) 3833 i40e_vsi_free_q_vectors(pf->vsi[i]); 3834 i40e_reset_interrupt_capability(pf); 3835 } 3836 3837 /** 3838 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 3839 * @vsi: the VSI being configured 3840 **/ 3841 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 3842 { 3843 int q_idx; 3844 3845 if (!vsi->netdev) 3846 return; 3847 3848 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3849 napi_enable(&vsi->q_vectors[q_idx]->napi); 3850 } 3851 3852 /** 3853 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 3854 * @vsi: the VSI being configured 3855 **/ 3856 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 3857 { 3858 int q_idx; 3859 3860 if (!vsi->netdev) 3861 return; 3862 3863 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3864 napi_disable(&vsi->q_vectors[q_idx]->napi); 3865 } 3866 3867 /** 3868 * i40e_vsi_close - Shut down a VSI 3869 * @vsi: the vsi to be quelled 3870 **/ 3871 static void i40e_vsi_close(struct i40e_vsi *vsi) 3872 { 3873 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 3874 i40e_down(vsi); 3875 i40e_vsi_free_irq(vsi); 3876 i40e_vsi_free_tx_resources(vsi); 3877 i40e_vsi_free_rx_resources(vsi); 3878 } 3879 3880 /** 3881 * i40e_quiesce_vsi - Pause a given VSI 3882 * @vsi: the VSI being paused 3883 **/ 3884 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 3885 { 3886 if (test_bit(__I40E_DOWN, &vsi->state)) 3887 return; 3888 3889 /* No need to disable FCoE VSI when Tx suspended */ 3890 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 3891 vsi->type == I40E_VSI_FCOE) { 3892 dev_dbg(&vsi->back->pdev->dev, 3893 "%s: VSI seid %d skipping FCoE VSI disable\n", 3894 __func__, vsi->seid); 3895 return; 3896 } 3897 3898 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 3899 if (vsi->netdev && netif_running(vsi->netdev)) { 3900 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 3901 } else { 3902 i40e_vsi_close(vsi); 3903 } 3904 } 3905 3906 /** 3907 * i40e_unquiesce_vsi - Resume a given VSI 3908 * @vsi: the VSI being resumed 3909 **/ 3910 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 3911 { 3912 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 3913 return; 3914 3915 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 3916 if (vsi->netdev && netif_running(vsi->netdev)) 3917 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 3918 else 3919 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 3920 } 3921 3922 /** 3923 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 3924 * @pf: the PF 3925 **/ 3926 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 3927 { 3928 int v; 3929 3930 for (v = 0; v < pf->num_alloc_vsi; v++) { 3931 if (pf->vsi[v]) 3932 i40e_quiesce_vsi(pf->vsi[v]); 3933 } 3934 } 3935 3936 /** 3937 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 3938 * @pf: the PF 3939 **/ 3940 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 3941 { 3942 int v; 3943 3944 for (v = 0; v < pf->num_alloc_vsi; v++) { 3945 if (pf->vsi[v]) 3946 i40e_unquiesce_vsi(pf->vsi[v]); 3947 } 3948 } 3949 3950 #ifdef CONFIG_I40E_DCB 3951 /** 3952 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled 3953 * @vsi: the VSI being configured 3954 * 3955 * This function waits for the given VSI's Tx queues to be disabled. 3956 **/ 3957 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi) 3958 { 3959 struct i40e_pf *pf = vsi->back; 3960 int i, pf_q, ret; 3961 3962 pf_q = vsi->base_queue; 3963 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3964 /* Check and wait for the disable status of the queue */ 3965 ret = i40e_pf_txq_wait(pf, pf_q, false); 3966 if (ret) { 3967 dev_info(&pf->pdev->dev, 3968 "%s: VSI seid %d Tx ring %d disable timeout\n", 3969 __func__, vsi->seid, pf_q); 3970 return ret; 3971 } 3972 } 3973 3974 return 0; 3975 } 3976 3977 /** 3978 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled 3979 * @pf: the PF 3980 * 3981 * This function waits for the Tx queues to be in disabled state for all the 3982 * VSIs that are managed by this PF. 3983 **/ 3984 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf) 3985 { 3986 int v, ret = 0; 3987 3988 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 3989 /* No need to wait for FCoE VSI queues */ 3990 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 3991 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]); 3992 if (ret) 3993 break; 3994 } 3995 } 3996 3997 return ret; 3998 } 3999 4000 #endif 4001 /** 4002 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4003 * @dcbcfg: the corresponding DCBx configuration structure 4004 * 4005 * Return the number of TCs from given DCBx configuration 4006 **/ 4007 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4008 { 4009 u8 num_tc = 0; 4010 int i; 4011 4012 /* Scan the ETS Config Priority Table to find 4013 * traffic class enabled for a given priority 4014 * and use the traffic class index to get the 4015 * number of traffic classes enabled 4016 */ 4017 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4018 if (dcbcfg->etscfg.prioritytable[i] > num_tc) 4019 num_tc = dcbcfg->etscfg.prioritytable[i]; 4020 } 4021 4022 /* Traffic class index starts from zero so 4023 * increment to return the actual count 4024 */ 4025 return num_tc + 1; 4026 } 4027 4028 /** 4029 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4030 * @dcbcfg: the corresponding DCBx configuration structure 4031 * 4032 * Query the current DCB configuration and return the number of 4033 * traffic classes enabled from the given DCBX config 4034 **/ 4035 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4036 { 4037 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4038 u8 enabled_tc = 1; 4039 u8 i; 4040 4041 for (i = 0; i < num_tc; i++) 4042 enabled_tc |= 1 << i; 4043 4044 return enabled_tc; 4045 } 4046 4047 /** 4048 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4049 * @pf: PF being queried 4050 * 4051 * Return number of traffic classes enabled for the given PF 4052 **/ 4053 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4054 { 4055 struct i40e_hw *hw = &pf->hw; 4056 u8 i, enabled_tc; 4057 u8 num_tc = 0; 4058 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4059 4060 /* If DCB is not enabled then always in single TC */ 4061 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4062 return 1; 4063 4064 /* MFP mode return count of enabled TCs for this PF */ 4065 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4066 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4067 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4068 if (enabled_tc & (1 << i)) 4069 num_tc++; 4070 } 4071 return num_tc; 4072 } 4073 4074 /* SFP mode will be enabled for all TCs on port */ 4075 return i40e_dcb_get_num_tc(dcbcfg); 4076 } 4077 4078 /** 4079 * i40e_pf_get_default_tc - Get bitmap for first enabled TC 4080 * @pf: PF being queried 4081 * 4082 * Return a bitmap for first enabled traffic class for this PF. 4083 **/ 4084 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) 4085 { 4086 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4087 u8 i = 0; 4088 4089 if (!enabled_tc) 4090 return 0x1; /* TC0 */ 4091 4092 /* Find the first enabled TC */ 4093 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4094 if (enabled_tc & (1 << i)) 4095 break; 4096 } 4097 4098 return 1 << i; 4099 } 4100 4101 /** 4102 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4103 * @pf: PF being queried 4104 * 4105 * Return a bitmap for enabled traffic classes for this PF. 4106 **/ 4107 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4108 { 4109 /* If DCB is not enabled for this PF then just return default TC */ 4110 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4111 return i40e_pf_get_default_tc(pf); 4112 4113 /* MFP mode will have enabled TCs set by FW */ 4114 if (pf->flags & I40E_FLAG_MFP_ENABLED) 4115 return pf->hw.func_caps.enabled_tcmap; 4116 4117 /* SFP mode we want PF to be enabled for all TCs */ 4118 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4119 } 4120 4121 /** 4122 * i40e_vsi_get_bw_info - Query VSI BW Information 4123 * @vsi: the VSI being queried 4124 * 4125 * Returns 0 on success, negative value on failure 4126 **/ 4127 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4128 { 4129 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4130 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4131 struct i40e_pf *pf = vsi->back; 4132 struct i40e_hw *hw = &pf->hw; 4133 i40e_status aq_ret; 4134 u32 tc_bw_max; 4135 int i; 4136 4137 /* Get the VSI level BW configuration */ 4138 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4139 if (aq_ret) { 4140 dev_info(&pf->pdev->dev, 4141 "couldn't get pf vsi bw config, err %d, aq_err %d\n", 4142 aq_ret, pf->hw.aq.asq_last_status); 4143 return -EINVAL; 4144 } 4145 4146 /* Get the VSI level BW configuration per TC */ 4147 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4148 NULL); 4149 if (aq_ret) { 4150 dev_info(&pf->pdev->dev, 4151 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n", 4152 aq_ret, pf->hw.aq.asq_last_status); 4153 return -EINVAL; 4154 } 4155 4156 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4157 dev_info(&pf->pdev->dev, 4158 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4159 bw_config.tc_valid_bits, 4160 bw_ets_config.tc_valid_bits); 4161 /* Still continuing */ 4162 } 4163 4164 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4165 vsi->bw_max_quanta = bw_config.max_bw; 4166 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4167 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4168 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4169 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4170 vsi->bw_ets_limit_credits[i] = 4171 le16_to_cpu(bw_ets_config.credits[i]); 4172 /* 3 bits out of 4 for each TC */ 4173 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4174 } 4175 4176 return 0; 4177 } 4178 4179 /** 4180 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4181 * @vsi: the VSI being configured 4182 * @enabled_tc: TC bitmap 4183 * @bw_credits: BW shared credits per TC 4184 * 4185 * Returns 0 on success, negative value on failure 4186 **/ 4187 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4188 u8 *bw_share) 4189 { 4190 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4191 i40e_status aq_ret; 4192 int i; 4193 4194 bw_data.tc_valid_bits = enabled_tc; 4195 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4196 bw_data.tc_bw_credits[i] = bw_share[i]; 4197 4198 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4199 NULL); 4200 if (aq_ret) { 4201 dev_info(&vsi->back->pdev->dev, 4202 "AQ command Config VSI BW allocation per TC failed = %d\n", 4203 vsi->back->hw.aq.asq_last_status); 4204 return -EINVAL; 4205 } 4206 4207 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4208 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4209 4210 return 0; 4211 } 4212 4213 /** 4214 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4215 * @vsi: the VSI being configured 4216 * @enabled_tc: TC map to be enabled 4217 * 4218 **/ 4219 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4220 { 4221 struct net_device *netdev = vsi->netdev; 4222 struct i40e_pf *pf = vsi->back; 4223 struct i40e_hw *hw = &pf->hw; 4224 u8 netdev_tc = 0; 4225 int i; 4226 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4227 4228 if (!netdev) 4229 return; 4230 4231 if (!enabled_tc) { 4232 netdev_reset_tc(netdev); 4233 return; 4234 } 4235 4236 /* Set up actual enabled TCs on the VSI */ 4237 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 4238 return; 4239 4240 /* set per TC queues for the VSI */ 4241 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4242 /* Only set TC queues for enabled tcs 4243 * 4244 * e.g. For a VSI that has TC0 and TC3 enabled the 4245 * enabled_tc bitmap would be 0x00001001; the driver 4246 * will set the numtc for netdev as 2 that will be 4247 * referenced by the netdev layer as TC 0 and 1. 4248 */ 4249 if (vsi->tc_config.enabled_tc & (1 << i)) 4250 netdev_set_tc_queue(netdev, 4251 vsi->tc_config.tc_info[i].netdev_tc, 4252 vsi->tc_config.tc_info[i].qcount, 4253 vsi->tc_config.tc_info[i].qoffset); 4254 } 4255 4256 /* Assign UP2TC map for the VSI */ 4257 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4258 /* Get the actual TC# for the UP */ 4259 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 4260 /* Get the mapped netdev TC# for the UP */ 4261 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 4262 netdev_set_prio_tc_map(netdev, i, netdev_tc); 4263 } 4264 } 4265 4266 /** 4267 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 4268 * @vsi: the VSI being configured 4269 * @ctxt: the ctxt buffer returned from AQ VSI update param command 4270 **/ 4271 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 4272 struct i40e_vsi_context *ctxt) 4273 { 4274 /* copy just the sections touched not the entire info 4275 * since not all sections are valid as returned by 4276 * update vsi params 4277 */ 4278 vsi->info.mapping_flags = ctxt->info.mapping_flags; 4279 memcpy(&vsi->info.queue_mapping, 4280 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 4281 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 4282 sizeof(vsi->info.tc_mapping)); 4283 } 4284 4285 /** 4286 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 4287 * @vsi: VSI to be configured 4288 * @enabled_tc: TC bitmap 4289 * 4290 * This configures a particular VSI for TCs that are mapped to the 4291 * given TC bitmap. It uses default bandwidth share for TCs across 4292 * VSIs to configure TC for a particular VSI. 4293 * 4294 * NOTE: 4295 * It is expected that the VSI queues have been quisced before calling 4296 * this function. 4297 **/ 4298 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4299 { 4300 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 4301 struct i40e_vsi_context ctxt; 4302 int ret = 0; 4303 int i; 4304 4305 /* Check if enabled_tc is same as existing or new TCs */ 4306 if (vsi->tc_config.enabled_tc == enabled_tc) 4307 return ret; 4308 4309 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 4310 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4311 if (enabled_tc & (1 << i)) 4312 bw_share[i] = 1; 4313 } 4314 4315 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 4316 if (ret) { 4317 dev_info(&vsi->back->pdev->dev, 4318 "Failed configuring TC map %d for VSI %d\n", 4319 enabled_tc, vsi->seid); 4320 goto out; 4321 } 4322 4323 /* Update Queue Pairs Mapping for currently enabled UPs */ 4324 ctxt.seid = vsi->seid; 4325 ctxt.pf_num = vsi->back->hw.pf_id; 4326 ctxt.vf_num = 0; 4327 ctxt.uplink_seid = vsi->uplink_seid; 4328 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); 4329 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 4330 4331 /* Update the VSI after updating the VSI queue-mapping information */ 4332 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 4333 if (ret) { 4334 dev_info(&vsi->back->pdev->dev, 4335 "update vsi failed, aq_err=%d\n", 4336 vsi->back->hw.aq.asq_last_status); 4337 goto out; 4338 } 4339 /* update the local VSI info with updated queue map */ 4340 i40e_vsi_update_queue_map(vsi, &ctxt); 4341 vsi->info.valid_sections = 0; 4342 4343 /* Update current VSI BW information */ 4344 ret = i40e_vsi_get_bw_info(vsi); 4345 if (ret) { 4346 dev_info(&vsi->back->pdev->dev, 4347 "Failed updating vsi bw info, aq_err=%d\n", 4348 vsi->back->hw.aq.asq_last_status); 4349 goto out; 4350 } 4351 4352 /* Update the netdev TC setup */ 4353 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 4354 out: 4355 return ret; 4356 } 4357 4358 /** 4359 * i40e_veb_config_tc - Configure TCs for given VEB 4360 * @veb: given VEB 4361 * @enabled_tc: TC bitmap 4362 * 4363 * Configures given TC bitmap for VEB (switching) element 4364 **/ 4365 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 4366 { 4367 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 4368 struct i40e_pf *pf = veb->pf; 4369 int ret = 0; 4370 int i; 4371 4372 /* No TCs or already enabled TCs just return */ 4373 if (!enabled_tc || veb->enabled_tc == enabled_tc) 4374 return ret; 4375 4376 bw_data.tc_valid_bits = enabled_tc; 4377 /* bw_data.absolute_credits is not set (relative) */ 4378 4379 /* Enable ETS TCs with equal BW Share for now */ 4380 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4381 if (enabled_tc & (1 << i)) 4382 bw_data.tc_bw_share_credits[i] = 1; 4383 } 4384 4385 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 4386 &bw_data, NULL); 4387 if (ret) { 4388 dev_info(&pf->pdev->dev, 4389 "veb bw config failed, aq_err=%d\n", 4390 pf->hw.aq.asq_last_status); 4391 goto out; 4392 } 4393 4394 /* Update the BW information */ 4395 ret = i40e_veb_get_bw_info(veb); 4396 if (ret) { 4397 dev_info(&pf->pdev->dev, 4398 "Failed getting veb bw config, aq_err=%d\n", 4399 pf->hw.aq.asq_last_status); 4400 } 4401 4402 out: 4403 return ret; 4404 } 4405 4406 #ifdef CONFIG_I40E_DCB 4407 /** 4408 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 4409 * @pf: PF struct 4410 * 4411 * Reconfigure VEB/VSIs on a given PF; it is assumed that 4412 * the caller would've quiesce all the VSIs before calling 4413 * this function 4414 **/ 4415 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 4416 { 4417 u8 tc_map = 0; 4418 int ret; 4419 u8 v; 4420 4421 /* Enable the TCs available on PF to all VEBs */ 4422 tc_map = i40e_pf_get_tc_map(pf); 4423 for (v = 0; v < I40E_MAX_VEB; v++) { 4424 if (!pf->veb[v]) 4425 continue; 4426 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 4427 if (ret) { 4428 dev_info(&pf->pdev->dev, 4429 "Failed configuring TC for VEB seid=%d\n", 4430 pf->veb[v]->seid); 4431 /* Will try to configure as many components */ 4432 } 4433 } 4434 4435 /* Update each VSI */ 4436 for (v = 0; v < pf->num_alloc_vsi; v++) { 4437 if (!pf->vsi[v]) 4438 continue; 4439 4440 /* - Enable all TCs for the LAN VSI 4441 #ifdef I40E_FCOE 4442 * - For FCoE VSI only enable the TC configured 4443 * as per the APP TLV 4444 #endif 4445 * - For all others keep them at TC0 for now 4446 */ 4447 if (v == pf->lan_vsi) 4448 tc_map = i40e_pf_get_tc_map(pf); 4449 else 4450 tc_map = i40e_pf_get_default_tc(pf); 4451 #ifdef I40E_FCOE 4452 if (pf->vsi[v]->type == I40E_VSI_FCOE) 4453 tc_map = i40e_get_fcoe_tc_map(pf); 4454 #endif /* #ifdef I40E_FCOE */ 4455 4456 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 4457 if (ret) { 4458 dev_info(&pf->pdev->dev, 4459 "Failed configuring TC for VSI seid=%d\n", 4460 pf->vsi[v]->seid); 4461 /* Will try to configure as many components */ 4462 } else { 4463 /* Re-configure VSI vectors based on updated TC map */ 4464 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 4465 if (pf->vsi[v]->netdev) 4466 i40e_dcbnl_set_all(pf->vsi[v]); 4467 } 4468 } 4469 } 4470 4471 /** 4472 * i40e_resume_port_tx - Resume port Tx 4473 * @pf: PF struct 4474 * 4475 * Resume a port's Tx and issue a PF reset in case of failure to 4476 * resume. 4477 **/ 4478 static int i40e_resume_port_tx(struct i40e_pf *pf) 4479 { 4480 struct i40e_hw *hw = &pf->hw; 4481 int ret; 4482 4483 ret = i40e_aq_resume_port_tx(hw, NULL); 4484 if (ret) { 4485 dev_info(&pf->pdev->dev, 4486 "AQ command Resume Port Tx failed = %d\n", 4487 pf->hw.aq.asq_last_status); 4488 /* Schedule PF reset to recover */ 4489 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 4490 i40e_service_event_schedule(pf); 4491 } 4492 4493 return ret; 4494 } 4495 4496 /** 4497 * i40e_init_pf_dcb - Initialize DCB configuration 4498 * @pf: PF being configured 4499 * 4500 * Query the current DCB configuration and cache it 4501 * in the hardware structure 4502 **/ 4503 static int i40e_init_pf_dcb(struct i40e_pf *pf) 4504 { 4505 struct i40e_hw *hw = &pf->hw; 4506 int err = 0; 4507 4508 if (pf->hw.func_caps.npar_enable) 4509 goto out; 4510 4511 /* Get the initial DCB configuration */ 4512 err = i40e_init_dcb(hw); 4513 if (!err) { 4514 /* Device/Function is not DCBX capable */ 4515 if ((!hw->func_caps.dcb) || 4516 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 4517 dev_info(&pf->pdev->dev, 4518 "DCBX offload is not supported or is disabled for this PF.\n"); 4519 4520 if (pf->flags & I40E_FLAG_MFP_ENABLED) 4521 goto out; 4522 4523 } else { 4524 /* When status is not DISABLED then DCBX in FW */ 4525 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 4526 DCB_CAP_DCBX_VER_IEEE; 4527 4528 pf->flags |= I40E_FLAG_DCB_CAPABLE; 4529 /* Enable DCB tagging only when more than one TC */ 4530 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 4531 pf->flags |= I40E_FLAG_DCB_ENABLED; 4532 dev_dbg(&pf->pdev->dev, 4533 "DCBX offload is supported for this PF.\n"); 4534 } 4535 } else { 4536 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n", 4537 pf->hw.aq.asq_last_status); 4538 } 4539 4540 out: 4541 return err; 4542 } 4543 #endif /* CONFIG_I40E_DCB */ 4544 #define SPEED_SIZE 14 4545 #define FC_SIZE 8 4546 /** 4547 * i40e_print_link_message - print link up or down 4548 * @vsi: the VSI for which link needs a message 4549 */ 4550 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 4551 { 4552 char speed[SPEED_SIZE] = "Unknown"; 4553 char fc[FC_SIZE] = "RX/TX"; 4554 4555 if (!isup) { 4556 netdev_info(vsi->netdev, "NIC Link is Down\n"); 4557 return; 4558 } 4559 4560 switch (vsi->back->hw.phy.link_info.link_speed) { 4561 case I40E_LINK_SPEED_40GB: 4562 strlcpy(speed, "40 Gbps", SPEED_SIZE); 4563 break; 4564 case I40E_LINK_SPEED_10GB: 4565 strlcpy(speed, "10 Gbps", SPEED_SIZE); 4566 break; 4567 case I40E_LINK_SPEED_1GB: 4568 strlcpy(speed, "1000 Mbps", SPEED_SIZE); 4569 break; 4570 case I40E_LINK_SPEED_100MB: 4571 strncpy(speed, "100 Mbps", SPEED_SIZE); 4572 break; 4573 default: 4574 break; 4575 } 4576 4577 switch (vsi->back->hw.fc.current_mode) { 4578 case I40E_FC_FULL: 4579 strlcpy(fc, "RX/TX", FC_SIZE); 4580 break; 4581 case I40E_FC_TX_PAUSE: 4582 strlcpy(fc, "TX", FC_SIZE); 4583 break; 4584 case I40E_FC_RX_PAUSE: 4585 strlcpy(fc, "RX", FC_SIZE); 4586 break; 4587 default: 4588 strlcpy(fc, "None", FC_SIZE); 4589 break; 4590 } 4591 4592 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n", 4593 speed, fc); 4594 } 4595 4596 /** 4597 * i40e_up_complete - Finish the last steps of bringing up a connection 4598 * @vsi: the VSI being configured 4599 **/ 4600 static int i40e_up_complete(struct i40e_vsi *vsi) 4601 { 4602 struct i40e_pf *pf = vsi->back; 4603 int err; 4604 4605 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4606 i40e_vsi_configure_msix(vsi); 4607 else 4608 i40e_configure_msi_and_legacy(vsi); 4609 4610 /* start rings */ 4611 err = i40e_vsi_control_rings(vsi, true); 4612 if (err) 4613 return err; 4614 4615 clear_bit(__I40E_DOWN, &vsi->state); 4616 i40e_napi_enable_all(vsi); 4617 i40e_vsi_enable_irq(vsi); 4618 4619 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 4620 (vsi->netdev)) { 4621 i40e_print_link_message(vsi, true); 4622 netif_tx_start_all_queues(vsi->netdev); 4623 netif_carrier_on(vsi->netdev); 4624 } else if (vsi->netdev) { 4625 i40e_print_link_message(vsi, false); 4626 /* need to check for qualified module here*/ 4627 if ((pf->hw.phy.link_info.link_info & 4628 I40E_AQ_MEDIA_AVAILABLE) && 4629 (!(pf->hw.phy.link_info.an_info & 4630 I40E_AQ_QUALIFIED_MODULE))) 4631 netdev_err(vsi->netdev, 4632 "the driver failed to link because an unqualified module was detected."); 4633 } 4634 4635 /* replay FDIR SB filters */ 4636 if (vsi->type == I40E_VSI_FDIR) { 4637 /* reset fd counters */ 4638 pf->fd_add_err = pf->fd_atr_cnt = 0; 4639 if (pf->fd_tcp_rule > 0) { 4640 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 4641 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 4642 pf->fd_tcp_rule = 0; 4643 } 4644 i40e_fdir_filter_restore(vsi); 4645 } 4646 i40e_service_event_schedule(pf); 4647 4648 return 0; 4649 } 4650 4651 /** 4652 * i40e_vsi_reinit_locked - Reset the VSI 4653 * @vsi: the VSI being configured 4654 * 4655 * Rebuild the ring structs after some configuration 4656 * has changed, e.g. MTU size. 4657 **/ 4658 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 4659 { 4660 struct i40e_pf *pf = vsi->back; 4661 4662 WARN_ON(in_interrupt()); 4663 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 4664 usleep_range(1000, 2000); 4665 i40e_down(vsi); 4666 4667 /* Give a VF some time to respond to the reset. The 4668 * two second wait is based upon the watchdog cycle in 4669 * the VF driver. 4670 */ 4671 if (vsi->type == I40E_VSI_SRIOV) 4672 msleep(2000); 4673 i40e_up(vsi); 4674 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 4675 } 4676 4677 /** 4678 * i40e_up - Bring the connection back up after being down 4679 * @vsi: the VSI being configured 4680 **/ 4681 int i40e_up(struct i40e_vsi *vsi) 4682 { 4683 int err; 4684 4685 err = i40e_vsi_configure(vsi); 4686 if (!err) 4687 err = i40e_up_complete(vsi); 4688 4689 return err; 4690 } 4691 4692 /** 4693 * i40e_down - Shutdown the connection processing 4694 * @vsi: the VSI being stopped 4695 **/ 4696 void i40e_down(struct i40e_vsi *vsi) 4697 { 4698 int i; 4699 4700 /* It is assumed that the caller of this function 4701 * sets the vsi->state __I40E_DOWN bit. 4702 */ 4703 if (vsi->netdev) { 4704 netif_carrier_off(vsi->netdev); 4705 netif_tx_disable(vsi->netdev); 4706 } 4707 i40e_vsi_disable_irq(vsi); 4708 i40e_vsi_control_rings(vsi, false); 4709 i40e_napi_disable_all(vsi); 4710 4711 for (i = 0; i < vsi->num_queue_pairs; i++) { 4712 i40e_clean_tx_ring(vsi->tx_rings[i]); 4713 i40e_clean_rx_ring(vsi->rx_rings[i]); 4714 } 4715 } 4716 4717 /** 4718 * i40e_setup_tc - configure multiple traffic classes 4719 * @netdev: net device to configure 4720 * @tc: number of traffic classes to enable 4721 **/ 4722 #ifdef I40E_FCOE 4723 int i40e_setup_tc(struct net_device *netdev, u8 tc) 4724 #else 4725 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 4726 #endif 4727 { 4728 struct i40e_netdev_priv *np = netdev_priv(netdev); 4729 struct i40e_vsi *vsi = np->vsi; 4730 struct i40e_pf *pf = vsi->back; 4731 u8 enabled_tc = 0; 4732 int ret = -EINVAL; 4733 int i; 4734 4735 /* Check if DCB enabled to continue */ 4736 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 4737 netdev_info(netdev, "DCB is not enabled for adapter\n"); 4738 goto exit; 4739 } 4740 4741 /* Check if MFP enabled */ 4742 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4743 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 4744 goto exit; 4745 } 4746 4747 /* Check whether tc count is within enabled limit */ 4748 if (tc > i40e_pf_get_num_tc(pf)) { 4749 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 4750 goto exit; 4751 } 4752 4753 /* Generate TC map for number of tc requested */ 4754 for (i = 0; i < tc; i++) 4755 enabled_tc |= (1 << i); 4756 4757 /* Requesting same TC configuration as already enabled */ 4758 if (enabled_tc == vsi->tc_config.enabled_tc) 4759 return 0; 4760 4761 /* Quiesce VSI queues */ 4762 i40e_quiesce_vsi(vsi); 4763 4764 /* Configure VSI for enabled TCs */ 4765 ret = i40e_vsi_config_tc(vsi, enabled_tc); 4766 if (ret) { 4767 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 4768 vsi->seid); 4769 goto exit; 4770 } 4771 4772 /* Unquiesce VSI */ 4773 i40e_unquiesce_vsi(vsi); 4774 4775 exit: 4776 return ret; 4777 } 4778 4779 /** 4780 * i40e_open - Called when a network interface is made active 4781 * @netdev: network interface device structure 4782 * 4783 * The open entry point is called when a network interface is made 4784 * active by the system (IFF_UP). At this point all resources needed 4785 * for transmit and receive operations are allocated, the interrupt 4786 * handler is registered with the OS, the netdev watchdog subtask is 4787 * enabled, and the stack is notified that the interface is ready. 4788 * 4789 * Returns 0 on success, negative value on failure 4790 **/ 4791 #ifdef I40E_FCOE 4792 int i40e_open(struct net_device *netdev) 4793 #else 4794 static int i40e_open(struct net_device *netdev) 4795 #endif 4796 { 4797 struct i40e_netdev_priv *np = netdev_priv(netdev); 4798 struct i40e_vsi *vsi = np->vsi; 4799 struct i40e_pf *pf = vsi->back; 4800 int err; 4801 4802 /* disallow open during test or if eeprom is broken */ 4803 if (test_bit(__I40E_TESTING, &pf->state) || 4804 test_bit(__I40E_BAD_EEPROM, &pf->state)) 4805 return -EBUSY; 4806 4807 netif_carrier_off(netdev); 4808 4809 err = i40e_vsi_open(vsi); 4810 if (err) 4811 return err; 4812 4813 /* configure global TSO hardware offload settings */ 4814 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 4815 TCP_FLAG_FIN) >> 16); 4816 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 4817 TCP_FLAG_FIN | 4818 TCP_FLAG_CWR) >> 16); 4819 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 4820 4821 #ifdef CONFIG_I40E_VXLAN 4822 vxlan_get_rx_port(netdev); 4823 #endif 4824 4825 return 0; 4826 } 4827 4828 /** 4829 * i40e_vsi_open - 4830 * @vsi: the VSI to open 4831 * 4832 * Finish initialization of the VSI. 4833 * 4834 * Returns 0 on success, negative value on failure 4835 **/ 4836 int i40e_vsi_open(struct i40e_vsi *vsi) 4837 { 4838 struct i40e_pf *pf = vsi->back; 4839 char int_name[IFNAMSIZ]; 4840 int err; 4841 4842 /* allocate descriptors */ 4843 err = i40e_vsi_setup_tx_resources(vsi); 4844 if (err) 4845 goto err_setup_tx; 4846 err = i40e_vsi_setup_rx_resources(vsi); 4847 if (err) 4848 goto err_setup_rx; 4849 4850 err = i40e_vsi_configure(vsi); 4851 if (err) 4852 goto err_setup_rx; 4853 4854 if (vsi->netdev) { 4855 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 4856 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 4857 err = i40e_vsi_request_irq(vsi, int_name); 4858 if (err) 4859 goto err_setup_rx; 4860 4861 /* Notify the stack of the actual queue counts. */ 4862 err = netif_set_real_num_tx_queues(vsi->netdev, 4863 vsi->num_queue_pairs); 4864 if (err) 4865 goto err_set_queues; 4866 4867 err = netif_set_real_num_rx_queues(vsi->netdev, 4868 vsi->num_queue_pairs); 4869 if (err) 4870 goto err_set_queues; 4871 4872 } else if (vsi->type == I40E_VSI_FDIR) { 4873 snprintf(int_name, sizeof(int_name) - 1, "%s-%s-fdir", 4874 dev_driver_string(&pf->pdev->dev), 4875 dev_name(&pf->pdev->dev)); 4876 err = i40e_vsi_request_irq(vsi, int_name); 4877 4878 } else { 4879 err = -EINVAL; 4880 goto err_setup_rx; 4881 } 4882 4883 err = i40e_up_complete(vsi); 4884 if (err) 4885 goto err_up_complete; 4886 4887 return 0; 4888 4889 err_up_complete: 4890 i40e_down(vsi); 4891 err_set_queues: 4892 i40e_vsi_free_irq(vsi); 4893 err_setup_rx: 4894 i40e_vsi_free_rx_resources(vsi); 4895 err_setup_tx: 4896 i40e_vsi_free_tx_resources(vsi); 4897 if (vsi == pf->vsi[pf->lan_vsi]) 4898 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 4899 4900 return err; 4901 } 4902 4903 /** 4904 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 4905 * @pf: Pointer to pf 4906 * 4907 * This function destroys the hlist where all the Flow Director 4908 * filters were saved. 4909 **/ 4910 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 4911 { 4912 struct i40e_fdir_filter *filter; 4913 struct hlist_node *node2; 4914 4915 hlist_for_each_entry_safe(filter, node2, 4916 &pf->fdir_filter_list, fdir_node) { 4917 hlist_del(&filter->fdir_node); 4918 kfree(filter); 4919 } 4920 pf->fdir_pf_active_filters = 0; 4921 } 4922 4923 /** 4924 * i40e_close - Disables a network interface 4925 * @netdev: network interface device structure 4926 * 4927 * The close entry point is called when an interface is de-activated 4928 * by the OS. The hardware is still under the driver's control, but 4929 * this netdev interface is disabled. 4930 * 4931 * Returns 0, this is not allowed to fail 4932 **/ 4933 #ifdef I40E_FCOE 4934 int i40e_close(struct net_device *netdev) 4935 #else 4936 static int i40e_close(struct net_device *netdev) 4937 #endif 4938 { 4939 struct i40e_netdev_priv *np = netdev_priv(netdev); 4940 struct i40e_vsi *vsi = np->vsi; 4941 4942 i40e_vsi_close(vsi); 4943 4944 return 0; 4945 } 4946 4947 /** 4948 * i40e_do_reset - Start a PF or Core Reset sequence 4949 * @pf: board private structure 4950 * @reset_flags: which reset is requested 4951 * 4952 * The essential difference in resets is that the PF Reset 4953 * doesn't clear the packet buffers, doesn't reset the PE 4954 * firmware, and doesn't bother the other PFs on the chip. 4955 **/ 4956 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 4957 { 4958 u32 val; 4959 4960 WARN_ON(in_interrupt()); 4961 4962 if (i40e_check_asq_alive(&pf->hw)) 4963 i40e_vc_notify_reset(pf); 4964 4965 /* do the biggest reset indicated */ 4966 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { 4967 4968 /* Request a Global Reset 4969 * 4970 * This will start the chip's countdown to the actual full 4971 * chip reset event, and a warning interrupt to be sent 4972 * to all PFs, including the requestor. Our handler 4973 * for the warning interrupt will deal with the shutdown 4974 * and recovery of the switch setup. 4975 */ 4976 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 4977 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 4978 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 4979 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 4980 4981 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { 4982 4983 /* Request a Core Reset 4984 * 4985 * Same as Global Reset, except does *not* include the MAC/PHY 4986 */ 4987 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 4988 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 4989 val |= I40E_GLGEN_RTRIG_CORER_MASK; 4990 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 4991 i40e_flush(&pf->hw); 4992 4993 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) { 4994 4995 /* Request a Firmware Reset 4996 * 4997 * Same as Global reset, plus restarting the 4998 * embedded firmware engine. 4999 */ 5000 /* enable EMP Reset */ 5001 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP); 5002 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK; 5003 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val); 5004 5005 /* force the reset */ 5006 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5007 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK; 5008 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5009 i40e_flush(&pf->hw); 5010 5011 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { 5012 5013 /* Request a PF Reset 5014 * 5015 * Resets only the PF-specific registers 5016 * 5017 * This goes directly to the tear-down and rebuild of 5018 * the switch, since we need to do all the recovery as 5019 * for the Core Reset. 5020 */ 5021 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5022 i40e_handle_reset_warning(pf); 5023 5024 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { 5025 int v; 5026 5027 /* Find the VSI(s) that requested a re-init */ 5028 dev_info(&pf->pdev->dev, 5029 "VSI reinit requested\n"); 5030 for (v = 0; v < pf->num_alloc_vsi; v++) { 5031 struct i40e_vsi *vsi = pf->vsi[v]; 5032 if (vsi != NULL && 5033 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5034 i40e_vsi_reinit_locked(pf->vsi[v]); 5035 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5036 } 5037 } 5038 5039 /* no further action needed, so return now */ 5040 return; 5041 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) { 5042 int v; 5043 5044 /* Find the VSI(s) that needs to be brought down */ 5045 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5046 for (v = 0; v < pf->num_alloc_vsi; v++) { 5047 struct i40e_vsi *vsi = pf->vsi[v]; 5048 if (vsi != NULL && 5049 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5050 set_bit(__I40E_DOWN, &vsi->state); 5051 i40e_down(vsi); 5052 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5053 } 5054 } 5055 5056 /* no further action needed, so return now */ 5057 return; 5058 } else { 5059 dev_info(&pf->pdev->dev, 5060 "bad reset request 0x%08x\n", reset_flags); 5061 return; 5062 } 5063 } 5064 5065 #ifdef CONFIG_I40E_DCB 5066 /** 5067 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5068 * @pf: board private structure 5069 * @old_cfg: current DCB config 5070 * @new_cfg: new DCB config 5071 **/ 5072 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5073 struct i40e_dcbx_config *old_cfg, 5074 struct i40e_dcbx_config *new_cfg) 5075 { 5076 bool need_reconfig = false; 5077 5078 /* Check if ETS configuration has changed */ 5079 if (memcmp(&new_cfg->etscfg, 5080 &old_cfg->etscfg, 5081 sizeof(new_cfg->etscfg))) { 5082 /* If Priority Table has changed reconfig is needed */ 5083 if (memcmp(&new_cfg->etscfg.prioritytable, 5084 &old_cfg->etscfg.prioritytable, 5085 sizeof(new_cfg->etscfg.prioritytable))) { 5086 need_reconfig = true; 5087 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5088 } 5089 5090 if (memcmp(&new_cfg->etscfg.tcbwtable, 5091 &old_cfg->etscfg.tcbwtable, 5092 sizeof(new_cfg->etscfg.tcbwtable))) 5093 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5094 5095 if (memcmp(&new_cfg->etscfg.tsatable, 5096 &old_cfg->etscfg.tsatable, 5097 sizeof(new_cfg->etscfg.tsatable))) 5098 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5099 } 5100 5101 /* Check if PFC configuration has changed */ 5102 if (memcmp(&new_cfg->pfc, 5103 &old_cfg->pfc, 5104 sizeof(new_cfg->pfc))) { 5105 need_reconfig = true; 5106 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5107 } 5108 5109 /* Check if APP Table has changed */ 5110 if (memcmp(&new_cfg->app, 5111 &old_cfg->app, 5112 sizeof(new_cfg->app))) { 5113 need_reconfig = true; 5114 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5115 } 5116 5117 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__, 5118 need_reconfig); 5119 return need_reconfig; 5120 } 5121 5122 /** 5123 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5124 * @pf: board private structure 5125 * @e: event info posted on ARQ 5126 **/ 5127 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5128 struct i40e_arq_event_info *e) 5129 { 5130 struct i40e_aqc_lldp_get_mib *mib = 5131 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5132 struct i40e_hw *hw = &pf->hw; 5133 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 5134 struct i40e_dcbx_config tmp_dcbx_cfg; 5135 bool need_reconfig = false; 5136 int ret = 0; 5137 u8 type; 5138 5139 /* Not DCB capable or capability disabled */ 5140 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5141 return ret; 5142 5143 /* Ignore if event is not for Nearest Bridge */ 5144 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5145 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5146 dev_dbg(&pf->pdev->dev, 5147 "%s: LLDP event mib bridge type 0x%x\n", __func__, type); 5148 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5149 return ret; 5150 5151 /* Check MIB Type and return if event for Remote MIB update */ 5152 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5153 dev_dbg(&pf->pdev->dev, 5154 "%s: LLDP event mib type %s\n", __func__, 5155 type ? "remote" : "local"); 5156 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5157 /* Update the remote cached instance and return */ 5158 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5159 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5160 &hw->remote_dcbx_config); 5161 goto exit; 5162 } 5163 5164 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg)); 5165 /* Store the old configuration */ 5166 tmp_dcbx_cfg = *dcbx_cfg; 5167 5168 /* Get updated DCBX data from firmware */ 5169 ret = i40e_get_dcb_config(&pf->hw); 5170 if (ret) { 5171 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n"); 5172 goto exit; 5173 } 5174 5175 /* No change detected in DCBX configs */ 5176 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) { 5177 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5178 goto exit; 5179 } 5180 5181 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, dcbx_cfg); 5182 5183 i40e_dcbnl_flush_apps(pf, dcbx_cfg); 5184 5185 if (!need_reconfig) 5186 goto exit; 5187 5188 /* Enable DCB tagging only when more than one TC */ 5189 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1) 5190 pf->flags |= I40E_FLAG_DCB_ENABLED; 5191 else 5192 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5193 5194 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5195 /* Reconfiguration needed quiesce all VSIs */ 5196 i40e_pf_quiesce_all_vsi(pf); 5197 5198 /* Changes in configuration update VEB/VSI */ 5199 i40e_dcb_reconfigure(pf); 5200 5201 ret = i40e_resume_port_tx(pf); 5202 5203 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5204 /* In case of error no point in resuming VSIs */ 5205 if (ret) 5206 goto exit; 5207 5208 /* Wait for the PF's Tx queues to be disabled */ 5209 ret = i40e_pf_wait_txq_disabled(pf); 5210 if (!ret) 5211 i40e_pf_unquiesce_all_vsi(pf); 5212 exit: 5213 return ret; 5214 } 5215 #endif /* CONFIG_I40E_DCB */ 5216 5217 /** 5218 * i40e_do_reset_safe - Protected reset path for userland calls. 5219 * @pf: board private structure 5220 * @reset_flags: which reset is requested 5221 * 5222 **/ 5223 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 5224 { 5225 rtnl_lock(); 5226 i40e_do_reset(pf, reset_flags); 5227 rtnl_unlock(); 5228 } 5229 5230 /** 5231 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 5232 * @pf: board private structure 5233 * @e: event info posted on ARQ 5234 * 5235 * Handler for LAN Queue Overflow Event generated by the firmware for PF 5236 * and VF queues 5237 **/ 5238 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 5239 struct i40e_arq_event_info *e) 5240 { 5241 struct i40e_aqc_lan_overflow *data = 5242 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 5243 u32 queue = le32_to_cpu(data->prtdcb_rupto); 5244 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 5245 struct i40e_hw *hw = &pf->hw; 5246 struct i40e_vf *vf; 5247 u16 vf_id; 5248 5249 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 5250 queue, qtx_ctl); 5251 5252 /* Queue belongs to VF, find the VF and issue VF reset */ 5253 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 5254 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 5255 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 5256 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 5257 vf_id -= hw->func_caps.vf_base_id; 5258 vf = &pf->vf[vf_id]; 5259 i40e_vc_notify_vf_reset(vf); 5260 /* Allow VF to process pending reset notification */ 5261 msleep(20); 5262 i40e_reset_vf(vf, false); 5263 } 5264 } 5265 5266 /** 5267 * i40e_service_event_complete - Finish up the service event 5268 * @pf: board private structure 5269 **/ 5270 static void i40e_service_event_complete(struct i40e_pf *pf) 5271 { 5272 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); 5273 5274 /* flush memory to make sure state is correct before next watchog */ 5275 smp_mb__before_atomic(); 5276 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 5277 } 5278 5279 /** 5280 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 5281 * @pf: board private structure 5282 **/ 5283 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 5284 { 5285 int val, fcnt_prog; 5286 5287 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5288 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 5289 return fcnt_prog; 5290 } 5291 5292 /** 5293 * i40e_get_current_fd_count - Get the count of total FD filters programmed 5294 * @pf: board private structure 5295 **/ 5296 int i40e_get_current_fd_count(struct i40e_pf *pf) 5297 { 5298 int val, fcnt_prog; 5299 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5300 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 5301 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 5302 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 5303 return fcnt_prog; 5304 } 5305 5306 /** 5307 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 5308 * @pf: board private structure 5309 **/ 5310 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 5311 { 5312 u32 fcnt_prog, fcnt_avail; 5313 5314 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5315 return; 5316 5317 /* Check if, FD SB or ATR was auto disabled and if there is enough room 5318 * to re-enable 5319 */ 5320 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf); 5321 fcnt_avail = pf->fdir_pf_filter_count; 5322 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 5323 (pf->fd_add_err == 0) || 5324 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 5325 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 5326 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 5327 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5328 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 5329 } 5330 } 5331 /* Wait for some more space to be available to turn on ATR */ 5332 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 5333 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 5334 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5335 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5336 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); 5337 } 5338 } 5339 } 5340 5341 #define I40E_MIN_FD_FLUSH_INTERVAL 10 5342 /** 5343 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 5344 * @pf: board private structure 5345 **/ 5346 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 5347 { 5348 int flush_wait_retry = 50; 5349 int reg; 5350 5351 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5352 return; 5353 5354 if (time_after(jiffies, pf->fd_flush_timestamp + 5355 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) { 5356 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5357 pf->fd_flush_timestamp = jiffies; 5358 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED; 5359 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5360 /* flush all filters */ 5361 wr32(&pf->hw, I40E_PFQF_CTL_1, 5362 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 5363 i40e_flush(&pf->hw); 5364 pf->fd_flush_cnt++; 5365 pf->fd_add_err = 0; 5366 do { 5367 /* Check FD flush status every 5-6msec */ 5368 usleep_range(5000, 6000); 5369 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 5370 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 5371 break; 5372 } while (flush_wait_retry--); 5373 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 5374 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 5375 } else { 5376 /* replay sideband filters */ 5377 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 5378 5379 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 5380 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5381 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5382 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5383 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 5384 } 5385 } 5386 } 5387 5388 /** 5389 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 5390 * @pf: board private structure 5391 **/ 5392 int i40e_get_current_atr_cnt(struct i40e_pf *pf) 5393 { 5394 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 5395 } 5396 5397 /* We can see up to 256 filter programming desc in transit if the filters are 5398 * being applied really fast; before we see the first 5399 * filter miss error on Rx queue 0. Accumulating enough error messages before 5400 * reacting will make sure we don't cause flush too often. 5401 */ 5402 #define I40E_MAX_FD_PROGRAM_ERROR 256 5403 5404 /** 5405 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 5406 * @pf: board private structure 5407 **/ 5408 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 5409 { 5410 5411 /* if interface is down do nothing */ 5412 if (test_bit(__I40E_DOWN, &pf->state)) 5413 return; 5414 5415 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5416 return; 5417 5418 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) && 5419 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) && 5420 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count)) 5421 i40e_fdir_flush_and_replay(pf); 5422 5423 i40e_fdir_check_and_reenable(pf); 5424 5425 } 5426 5427 /** 5428 * i40e_vsi_link_event - notify VSI of a link event 5429 * @vsi: vsi to be notified 5430 * @link_up: link up or down 5431 **/ 5432 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 5433 { 5434 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 5435 return; 5436 5437 switch (vsi->type) { 5438 case I40E_VSI_MAIN: 5439 #ifdef I40E_FCOE 5440 case I40E_VSI_FCOE: 5441 #endif 5442 if (!vsi->netdev || !vsi->netdev_registered) 5443 break; 5444 5445 if (link_up) { 5446 netif_carrier_on(vsi->netdev); 5447 netif_tx_wake_all_queues(vsi->netdev); 5448 } else { 5449 netif_carrier_off(vsi->netdev); 5450 netif_tx_stop_all_queues(vsi->netdev); 5451 } 5452 break; 5453 5454 case I40E_VSI_SRIOV: 5455 case I40E_VSI_VMDQ2: 5456 case I40E_VSI_CTRL: 5457 case I40E_VSI_MIRROR: 5458 default: 5459 /* there is no notification for other VSIs */ 5460 break; 5461 } 5462 } 5463 5464 /** 5465 * i40e_veb_link_event - notify elements on the veb of a link event 5466 * @veb: veb to be notified 5467 * @link_up: link up or down 5468 **/ 5469 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 5470 { 5471 struct i40e_pf *pf; 5472 int i; 5473 5474 if (!veb || !veb->pf) 5475 return; 5476 pf = veb->pf; 5477 5478 /* depth first... */ 5479 for (i = 0; i < I40E_MAX_VEB; i++) 5480 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 5481 i40e_veb_link_event(pf->veb[i], link_up); 5482 5483 /* ... now the local VSIs */ 5484 for (i = 0; i < pf->num_alloc_vsi; i++) 5485 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 5486 i40e_vsi_link_event(pf->vsi[i], link_up); 5487 } 5488 5489 /** 5490 * i40e_link_event - Update netif_carrier status 5491 * @pf: board private structure 5492 **/ 5493 static void i40e_link_event(struct i40e_pf *pf) 5494 { 5495 bool new_link, old_link; 5496 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5497 5498 /* set this to force the get_link_status call to refresh state */ 5499 pf->hw.phy.get_link_info = true; 5500 5501 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 5502 new_link = i40e_get_link_status(&pf->hw); 5503 5504 if (new_link == old_link && 5505 (test_bit(__I40E_DOWN, &vsi->state) || 5506 new_link == netif_carrier_ok(vsi->netdev))) 5507 return; 5508 5509 if (!test_bit(__I40E_DOWN, &vsi->state)) 5510 i40e_print_link_message(vsi, new_link); 5511 5512 /* Notify the base of the switch tree connected to 5513 * the link. Floating VEBs are not notified. 5514 */ 5515 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 5516 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 5517 else 5518 i40e_vsi_link_event(vsi, new_link); 5519 5520 if (pf->vf) 5521 i40e_vc_notify_link_state(pf); 5522 5523 if (pf->flags & I40E_FLAG_PTP) 5524 i40e_ptp_set_increment(pf); 5525 } 5526 5527 /** 5528 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts 5529 * @pf: board private structure 5530 * 5531 * Set the per-queue flags to request a check for stuck queues in the irq 5532 * clean functions, then force interrupts to be sure the irq clean is called. 5533 **/ 5534 static void i40e_check_hang_subtask(struct i40e_pf *pf) 5535 { 5536 int i, v; 5537 5538 /* If we're down or resetting, just bail */ 5539 if (test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5540 return; 5541 5542 /* for each VSI/netdev 5543 * for each Tx queue 5544 * set the check flag 5545 * for each q_vector 5546 * force an interrupt 5547 */ 5548 for (v = 0; v < pf->num_alloc_vsi; v++) { 5549 struct i40e_vsi *vsi = pf->vsi[v]; 5550 int armed = 0; 5551 5552 if (!pf->vsi[v] || 5553 test_bit(__I40E_DOWN, &vsi->state) || 5554 (vsi->netdev && !netif_carrier_ok(vsi->netdev))) 5555 continue; 5556 5557 for (i = 0; i < vsi->num_queue_pairs; i++) { 5558 set_check_for_tx_hang(vsi->tx_rings[i]); 5559 if (test_bit(__I40E_HANG_CHECK_ARMED, 5560 &vsi->tx_rings[i]->state)) 5561 armed++; 5562 } 5563 5564 if (armed) { 5565 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 5566 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, 5567 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 5568 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 5569 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 5570 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 5571 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 5572 } else { 5573 u16 vec = vsi->base_vector - 1; 5574 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | 5575 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK | 5576 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | 5577 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK | 5578 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK); 5579 for (i = 0; i < vsi->num_q_vectors; i++, vec++) 5580 wr32(&vsi->back->hw, 5581 I40E_PFINT_DYN_CTLN(vec), val); 5582 } 5583 i40e_flush(&vsi->back->hw); 5584 } 5585 } 5586 } 5587 5588 /** 5589 * i40e_watchdog_subtask - periodic checks not using event driven response 5590 * @pf: board private structure 5591 **/ 5592 static void i40e_watchdog_subtask(struct i40e_pf *pf) 5593 { 5594 int i; 5595 5596 /* if interface is down do nothing */ 5597 if (test_bit(__I40E_DOWN, &pf->state) || 5598 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5599 return; 5600 5601 /* make sure we don't do these things too often */ 5602 if (time_before(jiffies, (pf->service_timer_previous + 5603 pf->service_timer_period))) 5604 return; 5605 pf->service_timer_previous = jiffies; 5606 5607 i40e_check_hang_subtask(pf); 5608 i40e_link_event(pf); 5609 5610 /* Update the stats for active netdevs so the network stack 5611 * can look at updated numbers whenever it cares to 5612 */ 5613 for (i = 0; i < pf->num_alloc_vsi; i++) 5614 if (pf->vsi[i] && pf->vsi[i]->netdev) 5615 i40e_update_stats(pf->vsi[i]); 5616 5617 /* Update the stats for the active switching components */ 5618 for (i = 0; i < I40E_MAX_VEB; i++) 5619 if (pf->veb[i]) 5620 i40e_update_veb_stats(pf->veb[i]); 5621 5622 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 5623 } 5624 5625 /** 5626 * i40e_reset_subtask - Set up for resetting the device and driver 5627 * @pf: board private structure 5628 **/ 5629 static void i40e_reset_subtask(struct i40e_pf *pf) 5630 { 5631 u32 reset_flags = 0; 5632 5633 rtnl_lock(); 5634 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 5635 reset_flags |= (1 << __I40E_REINIT_REQUESTED); 5636 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 5637 } 5638 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 5639 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); 5640 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5641 } 5642 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 5643 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); 5644 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 5645 } 5646 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 5647 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); 5648 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 5649 } 5650 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 5651 reset_flags |= (1 << __I40E_DOWN_REQUESTED); 5652 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 5653 } 5654 5655 /* If there's a recovery already waiting, it takes 5656 * precedence before starting a new reset sequence. 5657 */ 5658 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 5659 i40e_handle_reset_warning(pf); 5660 goto unlock; 5661 } 5662 5663 /* If we're already down or resetting, just bail */ 5664 if (reset_flags && 5665 !test_bit(__I40E_DOWN, &pf->state) && 5666 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5667 i40e_do_reset(pf, reset_flags); 5668 5669 unlock: 5670 rtnl_unlock(); 5671 } 5672 5673 /** 5674 * i40e_handle_link_event - Handle link event 5675 * @pf: board private structure 5676 * @e: event info posted on ARQ 5677 **/ 5678 static void i40e_handle_link_event(struct i40e_pf *pf, 5679 struct i40e_arq_event_info *e) 5680 { 5681 struct i40e_hw *hw = &pf->hw; 5682 struct i40e_aqc_get_link_status *status = 5683 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 5684 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 5685 5686 /* save off old link status information */ 5687 memcpy(&pf->hw.phy.link_info_old, hw_link_info, 5688 sizeof(pf->hw.phy.link_info_old)); 5689 5690 /* Do a new status request to re-enable LSE reporting 5691 * and load new status information into the hw struct 5692 * This completely ignores any state information 5693 * in the ARQ event info, instead choosing to always 5694 * issue the AQ update link status command. 5695 */ 5696 i40e_link_event(pf); 5697 5698 /* check for unqualified module, if link is down */ 5699 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 5700 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 5701 (!(status->link_info & I40E_AQ_LINK_UP))) 5702 dev_err(&pf->pdev->dev, 5703 "The driver failed to link because an unqualified module was detected.\n"); 5704 } 5705 5706 /** 5707 * i40e_clean_adminq_subtask - Clean the AdminQ rings 5708 * @pf: board private structure 5709 **/ 5710 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 5711 { 5712 struct i40e_arq_event_info event; 5713 struct i40e_hw *hw = &pf->hw; 5714 u16 pending, i = 0; 5715 i40e_status ret; 5716 u16 opcode; 5717 u32 oldval; 5718 u32 val; 5719 5720 /* Do not run clean AQ when PF reset fails */ 5721 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 5722 return; 5723 5724 /* check for error indications */ 5725 val = rd32(&pf->hw, pf->hw.aq.arq.len); 5726 oldval = val; 5727 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 5728 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 5729 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 5730 } 5731 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 5732 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 5733 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 5734 } 5735 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 5736 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 5737 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 5738 } 5739 if (oldval != val) 5740 wr32(&pf->hw, pf->hw.aq.arq.len, val); 5741 5742 val = rd32(&pf->hw, pf->hw.aq.asq.len); 5743 oldval = val; 5744 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 5745 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 5746 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 5747 } 5748 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 5749 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 5750 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 5751 } 5752 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 5753 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 5754 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 5755 } 5756 if (oldval != val) 5757 wr32(&pf->hw, pf->hw.aq.asq.len, val); 5758 5759 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 5760 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 5761 if (!event.msg_buf) 5762 return; 5763 5764 do { 5765 ret = i40e_clean_arq_element(hw, &event, &pending); 5766 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 5767 break; 5768 else if (ret) { 5769 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 5770 break; 5771 } 5772 5773 opcode = le16_to_cpu(event.desc.opcode); 5774 switch (opcode) { 5775 5776 case i40e_aqc_opc_get_link_status: 5777 i40e_handle_link_event(pf, &event); 5778 break; 5779 case i40e_aqc_opc_send_msg_to_pf: 5780 ret = i40e_vc_process_vf_msg(pf, 5781 le16_to_cpu(event.desc.retval), 5782 le32_to_cpu(event.desc.cookie_high), 5783 le32_to_cpu(event.desc.cookie_low), 5784 event.msg_buf, 5785 event.msg_len); 5786 break; 5787 case i40e_aqc_opc_lldp_update_mib: 5788 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 5789 #ifdef CONFIG_I40E_DCB 5790 rtnl_lock(); 5791 ret = i40e_handle_lldp_event(pf, &event); 5792 rtnl_unlock(); 5793 #endif /* CONFIG_I40E_DCB */ 5794 break; 5795 case i40e_aqc_opc_event_lan_overflow: 5796 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 5797 i40e_handle_lan_overflow_event(pf, &event); 5798 break; 5799 case i40e_aqc_opc_send_msg_to_peer: 5800 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 5801 break; 5802 default: 5803 dev_info(&pf->pdev->dev, 5804 "ARQ Error: Unknown event 0x%04x received\n", 5805 opcode); 5806 break; 5807 } 5808 } while (pending && (i++ < pf->adminq_work_limit)); 5809 5810 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 5811 /* re-enable Admin queue interrupt cause */ 5812 val = rd32(hw, I40E_PFINT_ICR0_ENA); 5813 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 5814 wr32(hw, I40E_PFINT_ICR0_ENA, val); 5815 i40e_flush(hw); 5816 5817 kfree(event.msg_buf); 5818 } 5819 5820 /** 5821 * i40e_verify_eeprom - make sure eeprom is good to use 5822 * @pf: board private structure 5823 **/ 5824 static void i40e_verify_eeprom(struct i40e_pf *pf) 5825 { 5826 int err; 5827 5828 err = i40e_diag_eeprom_test(&pf->hw); 5829 if (err) { 5830 /* retry in case of garbage read */ 5831 err = i40e_diag_eeprom_test(&pf->hw); 5832 if (err) { 5833 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 5834 err); 5835 set_bit(__I40E_BAD_EEPROM, &pf->state); 5836 } 5837 } 5838 5839 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 5840 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 5841 clear_bit(__I40E_BAD_EEPROM, &pf->state); 5842 } 5843 } 5844 5845 /** 5846 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 5847 * @veb: pointer to the VEB instance 5848 * 5849 * This is a recursive function that first builds the attached VSIs then 5850 * recurses in to build the next layer of VEB. We track the connections 5851 * through our own index numbers because the seid's from the HW could 5852 * change across the reset. 5853 **/ 5854 static int i40e_reconstitute_veb(struct i40e_veb *veb) 5855 { 5856 struct i40e_vsi *ctl_vsi = NULL; 5857 struct i40e_pf *pf = veb->pf; 5858 int v, veb_idx; 5859 int ret; 5860 5861 /* build VSI that owns this VEB, temporarily attached to base VEB */ 5862 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 5863 if (pf->vsi[v] && 5864 pf->vsi[v]->veb_idx == veb->idx && 5865 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 5866 ctl_vsi = pf->vsi[v]; 5867 break; 5868 } 5869 } 5870 if (!ctl_vsi) { 5871 dev_info(&pf->pdev->dev, 5872 "missing owner VSI for veb_idx %d\n", veb->idx); 5873 ret = -ENOENT; 5874 goto end_reconstitute; 5875 } 5876 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 5877 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 5878 ret = i40e_add_vsi(ctl_vsi); 5879 if (ret) { 5880 dev_info(&pf->pdev->dev, 5881 "rebuild of owner VSI failed: %d\n", ret); 5882 goto end_reconstitute; 5883 } 5884 i40e_vsi_reset_stats(ctl_vsi); 5885 5886 /* create the VEB in the switch and move the VSI onto the VEB */ 5887 ret = i40e_add_veb(veb, ctl_vsi); 5888 if (ret) 5889 goto end_reconstitute; 5890 5891 /* Enable LB mode for the main VSI now that it is on a VEB */ 5892 i40e_enable_pf_switch_lb(pf); 5893 5894 /* create the remaining VSIs attached to this VEB */ 5895 for (v = 0; v < pf->num_alloc_vsi; v++) { 5896 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 5897 continue; 5898 5899 if (pf->vsi[v]->veb_idx == veb->idx) { 5900 struct i40e_vsi *vsi = pf->vsi[v]; 5901 vsi->uplink_seid = veb->seid; 5902 ret = i40e_add_vsi(vsi); 5903 if (ret) { 5904 dev_info(&pf->pdev->dev, 5905 "rebuild of vsi_idx %d failed: %d\n", 5906 v, ret); 5907 goto end_reconstitute; 5908 } 5909 i40e_vsi_reset_stats(vsi); 5910 } 5911 } 5912 5913 /* create any VEBs attached to this VEB - RECURSION */ 5914 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 5915 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 5916 pf->veb[veb_idx]->uplink_seid = veb->seid; 5917 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 5918 if (ret) 5919 break; 5920 } 5921 } 5922 5923 end_reconstitute: 5924 return ret; 5925 } 5926 5927 /** 5928 * i40e_get_capabilities - get info about the HW 5929 * @pf: the PF struct 5930 **/ 5931 static int i40e_get_capabilities(struct i40e_pf *pf) 5932 { 5933 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 5934 u16 data_size; 5935 int buf_len; 5936 int err; 5937 5938 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 5939 do { 5940 cap_buf = kzalloc(buf_len, GFP_KERNEL); 5941 if (!cap_buf) 5942 return -ENOMEM; 5943 5944 /* this loads the data into the hw struct for us */ 5945 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 5946 &data_size, 5947 i40e_aqc_opc_list_func_capabilities, 5948 NULL); 5949 /* data loaded, buffer no longer needed */ 5950 kfree(cap_buf); 5951 5952 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 5953 /* retry with a larger buffer */ 5954 buf_len = data_size; 5955 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 5956 dev_info(&pf->pdev->dev, 5957 "capability discovery failed: aq=%d\n", 5958 pf->hw.aq.asq_last_status); 5959 return -ENODEV; 5960 } 5961 } while (err); 5962 5963 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || 5964 (pf->hw.aq.fw_maj_ver < 2)) { 5965 pf->hw.func_caps.num_msix_vectors++; 5966 pf->hw.func_caps.num_msix_vectors_vf++; 5967 } 5968 5969 if (pf->hw.debug_mask & I40E_DEBUG_USER) 5970 dev_info(&pf->pdev->dev, 5971 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 5972 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 5973 pf->hw.func_caps.num_msix_vectors, 5974 pf->hw.func_caps.num_msix_vectors_vf, 5975 pf->hw.func_caps.fd_filters_guaranteed, 5976 pf->hw.func_caps.fd_filters_best_effort, 5977 pf->hw.func_caps.num_tx_qp, 5978 pf->hw.func_caps.num_vsis); 5979 5980 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 5981 + pf->hw.func_caps.num_vfs) 5982 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 5983 dev_info(&pf->pdev->dev, 5984 "got num_vsis %d, setting num_vsis to %d\n", 5985 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 5986 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 5987 } 5988 5989 return 0; 5990 } 5991 5992 static int i40e_vsi_clear(struct i40e_vsi *vsi); 5993 5994 /** 5995 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 5996 * @pf: board private structure 5997 **/ 5998 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 5999 { 6000 struct i40e_vsi *vsi; 6001 int i; 6002 6003 /* quick workaround for an NVM issue that leaves a critical register 6004 * uninitialized 6005 */ 6006 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6007 static const u32 hkey[] = { 6008 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6009 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6010 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6011 0x95b3a76d}; 6012 6013 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6014 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6015 } 6016 6017 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6018 return; 6019 6020 /* find existing VSI and see if it needs configuring */ 6021 vsi = NULL; 6022 for (i = 0; i < pf->num_alloc_vsi; i++) { 6023 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6024 vsi = pf->vsi[i]; 6025 break; 6026 } 6027 } 6028 6029 /* create a new VSI if none exists */ 6030 if (!vsi) { 6031 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6032 pf->vsi[pf->lan_vsi]->seid, 0); 6033 if (!vsi) { 6034 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6035 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6036 return; 6037 } 6038 } 6039 6040 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6041 } 6042 6043 /** 6044 * i40e_fdir_teardown - release the Flow Director resources 6045 * @pf: board private structure 6046 **/ 6047 static void i40e_fdir_teardown(struct i40e_pf *pf) 6048 { 6049 int i; 6050 6051 i40e_fdir_filter_exit(pf); 6052 for (i = 0; i < pf->num_alloc_vsi; i++) { 6053 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6054 i40e_vsi_release(pf->vsi[i]); 6055 break; 6056 } 6057 } 6058 } 6059 6060 /** 6061 * i40e_prep_for_reset - prep for the core to reset 6062 * @pf: board private structure 6063 * 6064 * Close up the VFs and other things in prep for pf Reset. 6065 **/ 6066 static void i40e_prep_for_reset(struct i40e_pf *pf) 6067 { 6068 struct i40e_hw *hw = &pf->hw; 6069 i40e_status ret = 0; 6070 u32 v; 6071 6072 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6073 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6074 return; 6075 6076 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6077 6078 /* quiesce the VSIs and their queues that are not already DOWN */ 6079 i40e_pf_quiesce_all_vsi(pf); 6080 6081 for (v = 0; v < pf->num_alloc_vsi; v++) { 6082 if (pf->vsi[v]) 6083 pf->vsi[v]->seid = 0; 6084 } 6085 6086 i40e_shutdown_adminq(&pf->hw); 6087 6088 /* call shutdown HMC */ 6089 if (hw->hmc.hmc_obj) { 6090 ret = i40e_shutdown_lan_hmc(hw); 6091 if (ret) 6092 dev_warn(&pf->pdev->dev, 6093 "shutdown_lan_hmc failed: %d\n", ret); 6094 } 6095 } 6096 6097 /** 6098 * i40e_send_version - update firmware with driver version 6099 * @pf: PF struct 6100 */ 6101 static void i40e_send_version(struct i40e_pf *pf) 6102 { 6103 struct i40e_driver_version dv; 6104 6105 dv.major_version = DRV_VERSION_MAJOR; 6106 dv.minor_version = DRV_VERSION_MINOR; 6107 dv.build_version = DRV_VERSION_BUILD; 6108 dv.subbuild_version = 0; 6109 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 6110 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 6111 } 6112 6113 /** 6114 * i40e_reset_and_rebuild - reset and rebuild using a saved config 6115 * @pf: board private structure 6116 * @reinit: if the Main VSI needs to re-initialized. 6117 **/ 6118 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 6119 { 6120 struct i40e_hw *hw = &pf->hw; 6121 u8 set_fc_aq_fail = 0; 6122 i40e_status ret; 6123 u32 v; 6124 6125 /* Now we wait for GRST to settle out. 6126 * We don't have to delete the VEBs or VSIs from the hw switch 6127 * because the reset will make them disappear. 6128 */ 6129 ret = i40e_pf_reset(hw); 6130 if (ret) { 6131 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 6132 set_bit(__I40E_RESET_FAILED, &pf->state); 6133 goto clear_recovery; 6134 } 6135 pf->pfr_count++; 6136 6137 if (test_bit(__I40E_DOWN, &pf->state)) 6138 goto clear_recovery; 6139 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 6140 6141 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 6142 ret = i40e_init_adminq(&pf->hw); 6143 if (ret) { 6144 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); 6145 goto clear_recovery; 6146 } 6147 6148 /* re-verify the eeprom if we just had an EMP reset */ 6149 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) { 6150 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state); 6151 i40e_verify_eeprom(pf); 6152 } 6153 6154 i40e_clear_pxe_mode(hw); 6155 ret = i40e_get_capabilities(pf); 6156 if (ret) { 6157 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", 6158 ret); 6159 goto end_core_reset; 6160 } 6161 6162 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 6163 hw->func_caps.num_rx_qp, 6164 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 6165 if (ret) { 6166 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 6167 goto end_core_reset; 6168 } 6169 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 6170 if (ret) { 6171 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 6172 goto end_core_reset; 6173 } 6174 6175 #ifdef CONFIG_I40E_DCB 6176 ret = i40e_init_pf_dcb(pf); 6177 if (ret) { 6178 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret); 6179 goto end_core_reset; 6180 } 6181 #endif /* CONFIG_I40E_DCB */ 6182 #ifdef I40E_FCOE 6183 ret = i40e_init_pf_fcoe(pf); 6184 if (ret) 6185 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret); 6186 6187 #endif 6188 /* do basic switch setup */ 6189 ret = i40e_setup_pf_switch(pf, reinit); 6190 if (ret) 6191 goto end_core_reset; 6192 6193 /* driver is only interested in link up/down and module qualification 6194 * reports from firmware 6195 */ 6196 ret = i40e_aq_set_phy_int_mask(&pf->hw, 6197 I40E_AQ_EVENT_LINK_UPDOWN | 6198 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 6199 if (ret) 6200 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret); 6201 6202 /* make sure our flow control settings are restored */ 6203 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 6204 if (ret) 6205 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret); 6206 6207 /* Rebuild the VSIs and VEBs that existed before reset. 6208 * They are still in our local switch element arrays, so only 6209 * need to rebuild the switch model in the HW. 6210 * 6211 * If there were VEBs but the reconstitution failed, we'll try 6212 * try to recover minimal use by getting the basic PF VSI working. 6213 */ 6214 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 6215 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 6216 /* find the one VEB connected to the MAC, and find orphans */ 6217 for (v = 0; v < I40E_MAX_VEB; v++) { 6218 if (!pf->veb[v]) 6219 continue; 6220 6221 if (pf->veb[v]->uplink_seid == pf->mac_seid || 6222 pf->veb[v]->uplink_seid == 0) { 6223 ret = i40e_reconstitute_veb(pf->veb[v]); 6224 6225 if (!ret) 6226 continue; 6227 6228 /* If Main VEB failed, we're in deep doodoo, 6229 * so give up rebuilding the switch and set up 6230 * for minimal rebuild of PF VSI. 6231 * If orphan failed, we'll report the error 6232 * but try to keep going. 6233 */ 6234 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 6235 dev_info(&pf->pdev->dev, 6236 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 6237 ret); 6238 pf->vsi[pf->lan_vsi]->uplink_seid 6239 = pf->mac_seid; 6240 break; 6241 } else if (pf->veb[v]->uplink_seid == 0) { 6242 dev_info(&pf->pdev->dev, 6243 "rebuild of orphan VEB failed: %d\n", 6244 ret); 6245 } 6246 } 6247 } 6248 } 6249 6250 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 6251 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 6252 /* no VEB, so rebuild only the Main VSI */ 6253 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 6254 if (ret) { 6255 dev_info(&pf->pdev->dev, 6256 "rebuild of Main VSI failed: %d\n", ret); 6257 goto end_core_reset; 6258 } 6259 } 6260 6261 msleep(75); 6262 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6263 if (ret) { 6264 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 6265 pf->hw.aq.asq_last_status); 6266 } 6267 6268 /* reinit the misc interrupt */ 6269 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6270 ret = i40e_setup_misc_vector(pf); 6271 6272 /* restart the VSIs that were rebuilt and running before the reset */ 6273 i40e_pf_unquiesce_all_vsi(pf); 6274 6275 if (pf->num_alloc_vfs) { 6276 for (v = 0; v < pf->num_alloc_vfs; v++) 6277 i40e_reset_vf(&pf->vf[v], true); 6278 } 6279 6280 /* tell the firmware that we're starting */ 6281 i40e_send_version(pf); 6282 6283 end_core_reset: 6284 clear_bit(__I40E_RESET_FAILED, &pf->state); 6285 clear_recovery: 6286 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 6287 } 6288 6289 /** 6290 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild 6291 * @pf: board private structure 6292 * 6293 * Close up the VFs and other things in prep for a Core Reset, 6294 * then get ready to rebuild the world. 6295 **/ 6296 static void i40e_handle_reset_warning(struct i40e_pf *pf) 6297 { 6298 i40e_prep_for_reset(pf); 6299 i40e_reset_and_rebuild(pf, false); 6300 } 6301 6302 /** 6303 * i40e_handle_mdd_event 6304 * @pf: pointer to the pf structure 6305 * 6306 * Called from the MDD irq handler to identify possibly malicious vfs 6307 **/ 6308 static void i40e_handle_mdd_event(struct i40e_pf *pf) 6309 { 6310 struct i40e_hw *hw = &pf->hw; 6311 bool mdd_detected = false; 6312 bool pf_mdd_detected = false; 6313 struct i40e_vf *vf; 6314 u32 reg; 6315 int i; 6316 6317 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 6318 return; 6319 6320 /* find what triggered the MDD event */ 6321 reg = rd32(hw, I40E_GL_MDET_TX); 6322 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 6323 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 6324 I40E_GL_MDET_TX_PF_NUM_SHIFT; 6325 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 6326 I40E_GL_MDET_TX_VF_NUM_SHIFT; 6327 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 6328 I40E_GL_MDET_TX_EVENT_SHIFT; 6329 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 6330 I40E_GL_MDET_TX_QUEUE_SHIFT) - 6331 pf->hw.func_caps.base_queue; 6332 if (netif_msg_tx_err(pf)) 6333 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n", 6334 event, queue, pf_num, vf_num); 6335 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 6336 mdd_detected = true; 6337 } 6338 reg = rd32(hw, I40E_GL_MDET_RX); 6339 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 6340 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 6341 I40E_GL_MDET_RX_FUNCTION_SHIFT; 6342 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 6343 I40E_GL_MDET_RX_EVENT_SHIFT; 6344 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 6345 I40E_GL_MDET_RX_QUEUE_SHIFT) - 6346 pf->hw.func_caps.base_queue; 6347 if (netif_msg_rx_err(pf)) 6348 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 6349 event, queue, func); 6350 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 6351 mdd_detected = true; 6352 } 6353 6354 if (mdd_detected) { 6355 reg = rd32(hw, I40E_PF_MDET_TX); 6356 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 6357 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 6358 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 6359 pf_mdd_detected = true; 6360 } 6361 reg = rd32(hw, I40E_PF_MDET_RX); 6362 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 6363 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 6364 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 6365 pf_mdd_detected = true; 6366 } 6367 /* Queue belongs to the PF, initiate a reset */ 6368 if (pf_mdd_detected) { 6369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6370 i40e_service_event_schedule(pf); 6371 } 6372 } 6373 6374 /* see if one of the VFs needs its hand slapped */ 6375 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 6376 vf = &(pf->vf[i]); 6377 reg = rd32(hw, I40E_VP_MDET_TX(i)); 6378 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 6379 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 6380 vf->num_mdd_events++; 6381 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 6382 i); 6383 } 6384 6385 reg = rd32(hw, I40E_VP_MDET_RX(i)); 6386 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 6387 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 6388 vf->num_mdd_events++; 6389 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 6390 i); 6391 } 6392 6393 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 6394 dev_info(&pf->pdev->dev, 6395 "Too many MDD events on VF %d, disabled\n", i); 6396 dev_info(&pf->pdev->dev, 6397 "Use PF Control I/F to re-enable the VF\n"); 6398 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 6399 } 6400 } 6401 6402 /* re-enable mdd interrupt cause */ 6403 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 6404 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 6405 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 6406 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 6407 i40e_flush(hw); 6408 } 6409 6410 #ifdef CONFIG_I40E_VXLAN 6411 /** 6412 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW 6413 * @pf: board private structure 6414 **/ 6415 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) 6416 { 6417 struct i40e_hw *hw = &pf->hw; 6418 i40e_status ret; 6419 u8 filter_index; 6420 __be16 port; 6421 int i; 6422 6423 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC)) 6424 return; 6425 6426 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC; 6427 6428 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 6429 if (pf->pending_vxlan_bitmap & (1 << i)) { 6430 pf->pending_vxlan_bitmap &= ~(1 << i); 6431 port = pf->vxlan_ports[i]; 6432 ret = port ? 6433 i40e_aq_add_udp_tunnel(hw, ntohs(port), 6434 I40E_AQC_TUNNEL_TYPE_VXLAN, 6435 &filter_index, NULL) 6436 : i40e_aq_del_udp_tunnel(hw, i, NULL); 6437 6438 if (ret) { 6439 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n", 6440 port ? "adding" : "deleting", 6441 ntohs(port), port ? i : i); 6442 6443 pf->vxlan_ports[i] = 0; 6444 } else { 6445 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n", 6446 port ? "Added" : "Deleted", 6447 ntohs(port), port ? i : filter_index); 6448 } 6449 } 6450 } 6451 } 6452 6453 #endif 6454 /** 6455 * i40e_service_task - Run the driver's async subtasks 6456 * @work: pointer to work_struct containing our data 6457 **/ 6458 static void i40e_service_task(struct work_struct *work) 6459 { 6460 struct i40e_pf *pf = container_of(work, 6461 struct i40e_pf, 6462 service_task); 6463 unsigned long start_time = jiffies; 6464 6465 /* don't bother with service tasks if a reset is in progress */ 6466 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 6467 i40e_service_event_complete(pf); 6468 return; 6469 } 6470 6471 i40e_reset_subtask(pf); 6472 i40e_handle_mdd_event(pf); 6473 i40e_vc_process_vflr_event(pf); 6474 i40e_watchdog_subtask(pf); 6475 i40e_fdir_reinit_subtask(pf); 6476 i40e_sync_filters_subtask(pf); 6477 #ifdef CONFIG_I40E_VXLAN 6478 i40e_sync_vxlan_filters_subtask(pf); 6479 #endif 6480 i40e_clean_adminq_subtask(pf); 6481 6482 i40e_service_event_complete(pf); 6483 6484 /* If the tasks have taken longer than one timer cycle or there 6485 * is more work to be done, reschedule the service task now 6486 * rather than wait for the timer to tick again. 6487 */ 6488 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 6489 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 6490 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 6491 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 6492 i40e_service_event_schedule(pf); 6493 } 6494 6495 /** 6496 * i40e_service_timer - timer callback 6497 * @data: pointer to PF struct 6498 **/ 6499 static void i40e_service_timer(unsigned long data) 6500 { 6501 struct i40e_pf *pf = (struct i40e_pf *)data; 6502 6503 mod_timer(&pf->service_timer, 6504 round_jiffies(jiffies + pf->service_timer_period)); 6505 i40e_service_event_schedule(pf); 6506 } 6507 6508 /** 6509 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 6510 * @vsi: the VSI being configured 6511 **/ 6512 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 6513 { 6514 struct i40e_pf *pf = vsi->back; 6515 6516 switch (vsi->type) { 6517 case I40E_VSI_MAIN: 6518 vsi->alloc_queue_pairs = pf->num_lan_qps; 6519 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6520 I40E_REQ_DESCRIPTOR_MULTIPLE); 6521 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6522 vsi->num_q_vectors = pf->num_lan_msix; 6523 else 6524 vsi->num_q_vectors = 1; 6525 6526 break; 6527 6528 case I40E_VSI_FDIR: 6529 vsi->alloc_queue_pairs = 1; 6530 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 6531 I40E_REQ_DESCRIPTOR_MULTIPLE); 6532 vsi->num_q_vectors = 1; 6533 break; 6534 6535 case I40E_VSI_VMDQ2: 6536 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 6537 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6538 I40E_REQ_DESCRIPTOR_MULTIPLE); 6539 vsi->num_q_vectors = pf->num_vmdq_msix; 6540 break; 6541 6542 case I40E_VSI_SRIOV: 6543 vsi->alloc_queue_pairs = pf->num_vf_qps; 6544 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6545 I40E_REQ_DESCRIPTOR_MULTIPLE); 6546 break; 6547 6548 #ifdef I40E_FCOE 6549 case I40E_VSI_FCOE: 6550 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 6551 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6552 I40E_REQ_DESCRIPTOR_MULTIPLE); 6553 vsi->num_q_vectors = pf->num_fcoe_msix; 6554 break; 6555 6556 #endif /* I40E_FCOE */ 6557 default: 6558 WARN_ON(1); 6559 return -ENODATA; 6560 } 6561 6562 return 0; 6563 } 6564 6565 /** 6566 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 6567 * @type: VSI pointer 6568 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 6569 * 6570 * On error: returns error code (negative) 6571 * On success: returns 0 6572 **/ 6573 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 6574 { 6575 int size; 6576 int ret = 0; 6577 6578 /* allocate memory for both Tx and Rx ring pointers */ 6579 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 6580 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 6581 if (!vsi->tx_rings) 6582 return -ENOMEM; 6583 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 6584 6585 if (alloc_qvectors) { 6586 /* allocate memory for q_vector pointers */ 6587 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 6588 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 6589 if (!vsi->q_vectors) { 6590 ret = -ENOMEM; 6591 goto err_vectors; 6592 } 6593 } 6594 return ret; 6595 6596 err_vectors: 6597 kfree(vsi->tx_rings); 6598 return ret; 6599 } 6600 6601 /** 6602 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 6603 * @pf: board private structure 6604 * @type: type of VSI 6605 * 6606 * On error: returns error code (negative) 6607 * On success: returns vsi index in PF (positive) 6608 **/ 6609 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 6610 { 6611 int ret = -ENODEV; 6612 struct i40e_vsi *vsi; 6613 int vsi_idx; 6614 int i; 6615 6616 /* Need to protect the allocation of the VSIs at the PF level */ 6617 mutex_lock(&pf->switch_mutex); 6618 6619 /* VSI list may be fragmented if VSI creation/destruction has 6620 * been happening. We can afford to do a quick scan to look 6621 * for any free VSIs in the list. 6622 * 6623 * find next empty vsi slot, looping back around if necessary 6624 */ 6625 i = pf->next_vsi; 6626 while (i < pf->num_alloc_vsi && pf->vsi[i]) 6627 i++; 6628 if (i >= pf->num_alloc_vsi) { 6629 i = 0; 6630 while (i < pf->next_vsi && pf->vsi[i]) 6631 i++; 6632 } 6633 6634 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 6635 vsi_idx = i; /* Found one! */ 6636 } else { 6637 ret = -ENODEV; 6638 goto unlock_pf; /* out of VSI slots! */ 6639 } 6640 pf->next_vsi = ++i; 6641 6642 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 6643 if (!vsi) { 6644 ret = -ENOMEM; 6645 goto unlock_pf; 6646 } 6647 vsi->type = type; 6648 vsi->back = pf; 6649 set_bit(__I40E_DOWN, &vsi->state); 6650 vsi->flags = 0; 6651 vsi->idx = vsi_idx; 6652 vsi->rx_itr_setting = pf->rx_itr_default; 6653 vsi->tx_itr_setting = pf->tx_itr_default; 6654 vsi->netdev_registered = false; 6655 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 6656 INIT_LIST_HEAD(&vsi->mac_filter_list); 6657 vsi->irqs_ready = false; 6658 6659 ret = i40e_set_num_rings_in_vsi(vsi); 6660 if (ret) 6661 goto err_rings; 6662 6663 ret = i40e_vsi_alloc_arrays(vsi, true); 6664 if (ret) 6665 goto err_rings; 6666 6667 /* Setup default MSIX irq handler for VSI */ 6668 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 6669 6670 pf->vsi[vsi_idx] = vsi; 6671 ret = vsi_idx; 6672 goto unlock_pf; 6673 6674 err_rings: 6675 pf->next_vsi = i - 1; 6676 kfree(vsi); 6677 unlock_pf: 6678 mutex_unlock(&pf->switch_mutex); 6679 return ret; 6680 } 6681 6682 /** 6683 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 6684 * @type: VSI pointer 6685 * @free_qvectors: a bool to specify if q_vectors need to be freed. 6686 * 6687 * On error: returns error code (negative) 6688 * On success: returns 0 6689 **/ 6690 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 6691 { 6692 /* free the ring and vector containers */ 6693 if (free_qvectors) { 6694 kfree(vsi->q_vectors); 6695 vsi->q_vectors = NULL; 6696 } 6697 kfree(vsi->tx_rings); 6698 vsi->tx_rings = NULL; 6699 vsi->rx_rings = NULL; 6700 } 6701 6702 /** 6703 * i40e_vsi_clear - Deallocate the VSI provided 6704 * @vsi: the VSI being un-configured 6705 **/ 6706 static int i40e_vsi_clear(struct i40e_vsi *vsi) 6707 { 6708 struct i40e_pf *pf; 6709 6710 if (!vsi) 6711 return 0; 6712 6713 if (!vsi->back) 6714 goto free_vsi; 6715 pf = vsi->back; 6716 6717 mutex_lock(&pf->switch_mutex); 6718 if (!pf->vsi[vsi->idx]) { 6719 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 6720 vsi->idx, vsi->idx, vsi, vsi->type); 6721 goto unlock_vsi; 6722 } 6723 6724 if (pf->vsi[vsi->idx] != vsi) { 6725 dev_err(&pf->pdev->dev, 6726 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 6727 pf->vsi[vsi->idx]->idx, 6728 pf->vsi[vsi->idx], 6729 pf->vsi[vsi->idx]->type, 6730 vsi->idx, vsi, vsi->type); 6731 goto unlock_vsi; 6732 } 6733 6734 /* updates the pf for this cleared vsi */ 6735 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 6736 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 6737 6738 i40e_vsi_free_arrays(vsi, true); 6739 6740 pf->vsi[vsi->idx] = NULL; 6741 if (vsi->idx < pf->next_vsi) 6742 pf->next_vsi = vsi->idx; 6743 6744 unlock_vsi: 6745 mutex_unlock(&pf->switch_mutex); 6746 free_vsi: 6747 kfree(vsi); 6748 6749 return 0; 6750 } 6751 6752 /** 6753 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 6754 * @vsi: the VSI being cleaned 6755 **/ 6756 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 6757 { 6758 int i; 6759 6760 if (vsi->tx_rings && vsi->tx_rings[0]) { 6761 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6762 kfree_rcu(vsi->tx_rings[i], rcu); 6763 vsi->tx_rings[i] = NULL; 6764 vsi->rx_rings[i] = NULL; 6765 } 6766 } 6767 } 6768 6769 /** 6770 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 6771 * @vsi: the VSI being configured 6772 **/ 6773 static int i40e_alloc_rings(struct i40e_vsi *vsi) 6774 { 6775 struct i40e_ring *tx_ring, *rx_ring; 6776 struct i40e_pf *pf = vsi->back; 6777 int i; 6778 6779 /* Set basic values in the rings to be used later during open() */ 6780 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6781 /* allocate space for both Tx and Rx in one shot */ 6782 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 6783 if (!tx_ring) 6784 goto err_out; 6785 6786 tx_ring->queue_index = i; 6787 tx_ring->reg_idx = vsi->base_queue + i; 6788 tx_ring->ring_active = false; 6789 tx_ring->vsi = vsi; 6790 tx_ring->netdev = vsi->netdev; 6791 tx_ring->dev = &pf->pdev->dev; 6792 tx_ring->count = vsi->num_desc; 6793 tx_ring->size = 0; 6794 tx_ring->dcb_tc = 0; 6795 vsi->tx_rings[i] = tx_ring; 6796 6797 rx_ring = &tx_ring[1]; 6798 rx_ring->queue_index = i; 6799 rx_ring->reg_idx = vsi->base_queue + i; 6800 rx_ring->ring_active = false; 6801 rx_ring->vsi = vsi; 6802 rx_ring->netdev = vsi->netdev; 6803 rx_ring->dev = &pf->pdev->dev; 6804 rx_ring->count = vsi->num_desc; 6805 rx_ring->size = 0; 6806 rx_ring->dcb_tc = 0; 6807 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) 6808 set_ring_16byte_desc_enabled(rx_ring); 6809 else 6810 clear_ring_16byte_desc_enabled(rx_ring); 6811 vsi->rx_rings[i] = rx_ring; 6812 } 6813 6814 return 0; 6815 6816 err_out: 6817 i40e_vsi_clear_rings(vsi); 6818 return -ENOMEM; 6819 } 6820 6821 /** 6822 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 6823 * @pf: board private structure 6824 * @vectors: the number of MSI-X vectors to request 6825 * 6826 * Returns the number of vectors reserved, or error 6827 **/ 6828 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 6829 { 6830 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 6831 I40E_MIN_MSIX, vectors); 6832 if (vectors < 0) { 6833 dev_info(&pf->pdev->dev, 6834 "MSI-X vector reservation failed: %d\n", vectors); 6835 vectors = 0; 6836 } 6837 6838 return vectors; 6839 } 6840 6841 /** 6842 * i40e_init_msix - Setup the MSIX capability 6843 * @pf: board private structure 6844 * 6845 * Work with the OS to set up the MSIX vectors needed. 6846 * 6847 * Returns 0 on success, negative on failure 6848 **/ 6849 static int i40e_init_msix(struct i40e_pf *pf) 6850 { 6851 i40e_status err = 0; 6852 struct i40e_hw *hw = &pf->hw; 6853 int other_vecs = 0; 6854 int v_budget, i; 6855 int vec; 6856 6857 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 6858 return -ENODEV; 6859 6860 /* The number of vectors we'll request will be comprised of: 6861 * - Add 1 for "other" cause for Admin Queue events, etc. 6862 * - The number of LAN queue pairs 6863 * - Queues being used for RSS. 6864 * We don't need as many as max_rss_size vectors. 6865 * use rss_size instead in the calculation since that 6866 * is governed by number of cpus in the system. 6867 * - assumes symmetric Tx/Rx pairing 6868 * - The number of VMDq pairs 6869 #ifdef I40E_FCOE 6870 * - The number of FCOE qps. 6871 #endif 6872 * Once we count this up, try the request. 6873 * 6874 * If we can't get what we want, we'll simplify to nearly nothing 6875 * and try again. If that still fails, we punt. 6876 */ 6877 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size); 6878 pf->num_vmdq_msix = pf->num_vmdq_qps; 6879 other_vecs = 1; 6880 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix); 6881 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) 6882 other_vecs++; 6883 6884 #ifdef I40E_FCOE 6885 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 6886 pf->num_fcoe_msix = pf->num_fcoe_qps; 6887 v_budget += pf->num_fcoe_msix; 6888 } 6889 6890 #endif 6891 /* Scale down if necessary, and the rings will share vectors */ 6892 pf->num_lan_msix = min_t(int, pf->num_lan_msix, 6893 (hw->func_caps.num_msix_vectors - other_vecs)); 6894 v_budget = pf->num_lan_msix + other_vecs; 6895 6896 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 6897 GFP_KERNEL); 6898 if (!pf->msix_entries) 6899 return -ENOMEM; 6900 6901 for (i = 0; i < v_budget; i++) 6902 pf->msix_entries[i].entry = i; 6903 vec = i40e_reserve_msix_vectors(pf, v_budget); 6904 6905 if (vec != v_budget) { 6906 /* If we have limited resources, we will start with no vectors 6907 * for the special features and then allocate vectors to some 6908 * of these features based on the policy and at the end disable 6909 * the features that did not get any vectors. 6910 */ 6911 #ifdef I40E_FCOE 6912 pf->num_fcoe_qps = 0; 6913 pf->num_fcoe_msix = 0; 6914 #endif 6915 pf->num_vmdq_msix = 0; 6916 } 6917 6918 if (vec < I40E_MIN_MSIX) { 6919 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 6920 kfree(pf->msix_entries); 6921 pf->msix_entries = NULL; 6922 return -ENODEV; 6923 6924 } else if (vec == I40E_MIN_MSIX) { 6925 /* Adjust for minimal MSIX use */ 6926 pf->num_vmdq_vsis = 0; 6927 pf->num_vmdq_qps = 0; 6928 pf->num_lan_qps = 1; 6929 pf->num_lan_msix = 1; 6930 6931 } else if (vec != v_budget) { 6932 /* reserve the misc vector */ 6933 vec--; 6934 6935 /* Scale vector usage down */ 6936 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 6937 pf->num_vmdq_vsis = 1; 6938 6939 /* partition out the remaining vectors */ 6940 switch (vec) { 6941 case 2: 6942 pf->num_lan_msix = 1; 6943 break; 6944 case 3: 6945 #ifdef I40E_FCOE 6946 /* give one vector to FCoE */ 6947 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 6948 pf->num_lan_msix = 1; 6949 pf->num_fcoe_msix = 1; 6950 } 6951 #else 6952 pf->num_lan_msix = 2; 6953 #endif 6954 break; 6955 default: 6956 #ifdef I40E_FCOE 6957 /* give one vector to FCoE */ 6958 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 6959 pf->num_fcoe_msix = 1; 6960 vec--; 6961 } 6962 #endif 6963 pf->num_lan_msix = min_t(int, (vec / 2), 6964 pf->num_lan_qps); 6965 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix), 6966 I40E_DEFAULT_NUM_VMDQ_VSI); 6967 break; 6968 } 6969 } 6970 6971 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 6972 (pf->num_vmdq_msix == 0)) { 6973 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 6974 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 6975 } 6976 #ifdef I40E_FCOE 6977 6978 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 6979 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 6980 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 6981 } 6982 #endif 6983 return err; 6984 } 6985 6986 /** 6987 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 6988 * @vsi: the VSI being configured 6989 * @v_idx: index of the vector in the vsi struct 6990 * 6991 * We allocate one q_vector. If allocation fails we return -ENOMEM. 6992 **/ 6993 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) 6994 { 6995 struct i40e_q_vector *q_vector; 6996 6997 /* allocate q_vector */ 6998 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 6999 if (!q_vector) 7000 return -ENOMEM; 7001 7002 q_vector->vsi = vsi; 7003 q_vector->v_idx = v_idx; 7004 cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 7005 if (vsi->netdev) 7006 netif_napi_add(vsi->netdev, &q_vector->napi, 7007 i40e_napi_poll, NAPI_POLL_WEIGHT); 7008 7009 q_vector->rx.latency_range = I40E_LOW_LATENCY; 7010 q_vector->tx.latency_range = I40E_LOW_LATENCY; 7011 7012 /* tie q_vector and vsi together */ 7013 vsi->q_vectors[v_idx] = q_vector; 7014 7015 return 0; 7016 } 7017 7018 /** 7019 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 7020 * @vsi: the VSI being configured 7021 * 7022 * We allocate one q_vector per queue interrupt. If allocation fails we 7023 * return -ENOMEM. 7024 **/ 7025 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 7026 { 7027 struct i40e_pf *pf = vsi->back; 7028 int v_idx, num_q_vectors; 7029 int err; 7030 7031 /* if not MSIX, give the one vector only to the LAN VSI */ 7032 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7033 num_q_vectors = vsi->num_q_vectors; 7034 else if (vsi == pf->vsi[pf->lan_vsi]) 7035 num_q_vectors = 1; 7036 else 7037 return -EINVAL; 7038 7039 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 7040 err = i40e_vsi_alloc_q_vector(vsi, v_idx); 7041 if (err) 7042 goto err_out; 7043 } 7044 7045 return 0; 7046 7047 err_out: 7048 while (v_idx--) 7049 i40e_free_q_vector(vsi, v_idx); 7050 7051 return err; 7052 } 7053 7054 /** 7055 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 7056 * @pf: board private structure to initialize 7057 **/ 7058 static void i40e_init_interrupt_scheme(struct i40e_pf *pf) 7059 { 7060 int err = 0; 7061 7062 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 7063 err = i40e_init_msix(pf); 7064 if (err) { 7065 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 7066 #ifdef I40E_FCOE 7067 I40E_FLAG_FCOE_ENABLED | 7068 #endif 7069 I40E_FLAG_RSS_ENABLED | 7070 I40E_FLAG_DCB_CAPABLE | 7071 I40E_FLAG_SRIOV_ENABLED | 7072 I40E_FLAG_FD_SB_ENABLED | 7073 I40E_FLAG_FD_ATR_ENABLED | 7074 I40E_FLAG_VMDQ_ENABLED); 7075 7076 /* rework the queue expectations without MSIX */ 7077 i40e_determine_queue_usage(pf); 7078 } 7079 } 7080 7081 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 7082 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 7083 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 7084 err = pci_enable_msi(pf->pdev); 7085 if (err) { 7086 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err); 7087 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 7088 } 7089 } 7090 7091 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 7092 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 7093 7094 /* track first vector for misc interrupts */ 7095 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1); 7096 } 7097 7098 /** 7099 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 7100 * @pf: board private structure 7101 * 7102 * This sets up the handler for MSIX 0, which is used to manage the 7103 * non-queue interrupts, e.g. AdminQ and errors. This is not used 7104 * when in MSI or Legacy interrupt mode. 7105 **/ 7106 static int i40e_setup_misc_vector(struct i40e_pf *pf) 7107 { 7108 struct i40e_hw *hw = &pf->hw; 7109 int err = 0; 7110 7111 /* Only request the irq if this is the first time through, and 7112 * not when we're rebuilding after a Reset 7113 */ 7114 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7115 err = request_irq(pf->msix_entries[0].vector, 7116 i40e_intr, 0, pf->misc_int_name, pf); 7117 if (err) { 7118 dev_info(&pf->pdev->dev, 7119 "request_irq for %s failed: %d\n", 7120 pf->misc_int_name, err); 7121 return -EFAULT; 7122 } 7123 } 7124 7125 i40e_enable_misc_int_causes(hw); 7126 7127 /* associate no queues to the misc vector */ 7128 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 7129 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 7130 7131 i40e_flush(hw); 7132 7133 i40e_irq_dynamic_enable_icr0(pf); 7134 7135 return err; 7136 } 7137 7138 /** 7139 * i40e_config_rss - Prepare for RSS if used 7140 * @pf: board private structure 7141 **/ 7142 static int i40e_config_rss(struct i40e_pf *pf) 7143 { 7144 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1]; 7145 struct i40e_hw *hw = &pf->hw; 7146 u32 lut = 0; 7147 int i, j; 7148 u64 hena; 7149 u32 reg_val; 7150 7151 netdev_rss_key_fill(rss_key, sizeof(rss_key)); 7152 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 7153 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]); 7154 7155 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 7156 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | 7157 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); 7158 hena |= I40E_DEFAULT_RSS_HENA; 7159 wr32(hw, I40E_PFQF_HENA(0), (u32)hena); 7160 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 7161 7162 /* Check capability and Set table size and register per hw expectation*/ 7163 reg_val = rd32(hw, I40E_PFQF_CTL_0); 7164 if (hw->func_caps.rss_table_size == 512) { 7165 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7166 pf->rss_table_size = 512; 7167 } else { 7168 pf->rss_table_size = 128; 7169 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7170 } 7171 wr32(hw, I40E_PFQF_CTL_0, reg_val); 7172 7173 /* Populate the LUT with max no. of queues in round robin fashion */ 7174 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) { 7175 7176 /* The assumption is that lan qp count will be the highest 7177 * qp count for any PF VSI that needs RSS. 7178 * If multiple VSIs need RSS support, all the qp counts 7179 * for those VSIs should be a power of 2 for RSS to work. 7180 * If LAN VSI is the only consumer for RSS then this requirement 7181 * is not necessary. 7182 */ 7183 if (j == pf->rss_size) 7184 j = 0; 7185 /* lut = 4-byte sliding window of 4 lut entries */ 7186 lut = (lut << 8) | (j & 7187 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); 7188 /* On i = 3, we have 4 entries in lut; write to the register */ 7189 if ((i & 3) == 3) 7190 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); 7191 } 7192 i40e_flush(hw); 7193 7194 return 0; 7195 } 7196 7197 /** 7198 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 7199 * @pf: board private structure 7200 * @queue_count: the requested queue count for rss. 7201 * 7202 * returns 0 if rss is not enabled, if enabled returns the final rss queue 7203 * count which may be different from the requested queue count. 7204 **/ 7205 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 7206 { 7207 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 7208 return 0; 7209 7210 queue_count = min_t(int, queue_count, pf->rss_size_max); 7211 7212 if (queue_count != pf->rss_size) { 7213 i40e_prep_for_reset(pf); 7214 7215 pf->rss_size = queue_count; 7216 7217 i40e_reset_and_rebuild(pf, true); 7218 i40e_config_rss(pf); 7219 } 7220 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); 7221 return pf->rss_size; 7222 } 7223 7224 /** 7225 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 7226 * @pf: board private structure to initialize 7227 * 7228 * i40e_sw_init initializes the Adapter private data structure. 7229 * Fields are initialized based on PCI device information and 7230 * OS network device settings (MTU size). 7231 **/ 7232 static int i40e_sw_init(struct i40e_pf *pf) 7233 { 7234 int err = 0; 7235 int size; 7236 7237 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, 7238 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); 7239 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; 7240 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { 7241 if (I40E_DEBUG_USER & debug) 7242 pf->hw.debug_mask = debug; 7243 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), 7244 I40E_DEFAULT_MSG_ENABLE); 7245 } 7246 7247 /* Set default capability flags */ 7248 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 7249 I40E_FLAG_MSI_ENABLED | 7250 I40E_FLAG_MSIX_ENABLED | 7251 I40E_FLAG_RX_1BUF_ENABLED; 7252 7253 /* Set default ITR */ 7254 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 7255 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 7256 7257 /* Depending on PF configurations, it is possible that the RSS 7258 * maximum might end up larger than the available queues 7259 */ 7260 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; 7261 pf->rss_size = 1; 7262 pf->rss_size_max = min_t(int, pf->rss_size_max, 7263 pf->hw.func_caps.num_tx_qp); 7264 if (pf->hw.func_caps.rss) { 7265 pf->flags |= I40E_FLAG_RSS_ENABLED; 7266 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); 7267 } 7268 7269 /* MFP mode enabled */ 7270 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { 7271 pf->flags |= I40E_FLAG_MFP_ENABLED; 7272 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 7273 } 7274 7275 /* FW/NVM is not yet fixed in this regard */ 7276 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 7277 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 7278 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7279 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 7280 /* Setup a counter for fd_atr per pf */ 7281 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id); 7282 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { 7283 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7284 /* Setup a counter for fd_sb per pf */ 7285 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 7286 } else { 7287 dev_info(&pf->pdev->dev, 7288 "Flow Director Sideband mode Disabled in MFP mode\n"); 7289 } 7290 pf->fdir_pf_filter_count = 7291 pf->hw.func_caps.fd_filters_guaranteed; 7292 pf->hw.fdir_shared_filter_count = 7293 pf->hw.func_caps.fd_filters_best_effort; 7294 } 7295 7296 if (pf->hw.func_caps.vmdq) { 7297 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 7298 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 7299 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; 7300 } 7301 7302 #ifdef I40E_FCOE 7303 err = i40e_init_pf_fcoe(pf); 7304 if (err) 7305 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err); 7306 7307 #endif /* I40E_FCOE */ 7308 #ifdef CONFIG_PCI_IOV 7309 if (pf->hw.func_caps.num_vfs) { 7310 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 7311 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 7312 pf->num_req_vfs = min_t(int, 7313 pf->hw.func_caps.num_vfs, 7314 I40E_MAX_VF_COUNT); 7315 } 7316 #endif /* CONFIG_PCI_IOV */ 7317 pf->eeprom_version = 0xDEAD; 7318 pf->lan_veb = I40E_NO_VEB; 7319 pf->lan_vsi = I40E_NO_VSI; 7320 7321 /* set up queue assignment tracking */ 7322 size = sizeof(struct i40e_lump_tracking) 7323 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 7324 pf->qp_pile = kzalloc(size, GFP_KERNEL); 7325 if (!pf->qp_pile) { 7326 err = -ENOMEM; 7327 goto sw_init_done; 7328 } 7329 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 7330 pf->qp_pile->search_hint = 0; 7331 7332 /* set up vector assignment tracking */ 7333 size = sizeof(struct i40e_lump_tracking) 7334 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors); 7335 pf->irq_pile = kzalloc(size, GFP_KERNEL); 7336 if (!pf->irq_pile) { 7337 kfree(pf->qp_pile); 7338 err = -ENOMEM; 7339 goto sw_init_done; 7340 } 7341 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors; 7342 pf->irq_pile->search_hint = 0; 7343 7344 pf->tx_timeout_recovery_level = 1; 7345 7346 mutex_init(&pf->switch_mutex); 7347 7348 sw_init_done: 7349 return err; 7350 } 7351 7352 /** 7353 * i40e_set_ntuple - set the ntuple feature flag and take action 7354 * @pf: board private structure to initialize 7355 * @features: the feature set that the stack is suggesting 7356 * 7357 * returns a bool to indicate if reset needs to happen 7358 **/ 7359 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 7360 { 7361 bool need_reset = false; 7362 7363 /* Check if Flow Director n-tuple support was enabled or disabled. If 7364 * the state changed, we need to reset. 7365 */ 7366 if (features & NETIF_F_NTUPLE) { 7367 /* Enable filters and mark for reset */ 7368 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 7369 need_reset = true; 7370 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7371 } else { 7372 /* turn off filters, mark for reset and clear SW filter list */ 7373 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7374 need_reset = true; 7375 i40e_fdir_filter_exit(pf); 7376 } 7377 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7378 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 7379 /* reset fd counters */ 7380 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 7381 pf->fdir_pf_active_filters = 0; 7382 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7383 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 7384 /* if ATR was auto disabled it can be re-enabled. */ 7385 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 7386 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 7387 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 7388 } 7389 return need_reset; 7390 } 7391 7392 /** 7393 * i40e_set_features - set the netdev feature flags 7394 * @netdev: ptr to the netdev being adjusted 7395 * @features: the feature set that the stack is suggesting 7396 **/ 7397 static int i40e_set_features(struct net_device *netdev, 7398 netdev_features_t features) 7399 { 7400 struct i40e_netdev_priv *np = netdev_priv(netdev); 7401 struct i40e_vsi *vsi = np->vsi; 7402 struct i40e_pf *pf = vsi->back; 7403 bool need_reset; 7404 7405 if (features & NETIF_F_HW_VLAN_CTAG_RX) 7406 i40e_vlan_stripping_enable(vsi); 7407 else 7408 i40e_vlan_stripping_disable(vsi); 7409 7410 need_reset = i40e_set_ntuple(pf, features); 7411 7412 if (need_reset) 7413 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 7414 7415 return 0; 7416 } 7417 7418 #ifdef CONFIG_I40E_VXLAN 7419 /** 7420 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port 7421 * @pf: board private structure 7422 * @port: The UDP port to look up 7423 * 7424 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 7425 **/ 7426 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port) 7427 { 7428 u8 i; 7429 7430 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7431 if (pf->vxlan_ports[i] == port) 7432 return i; 7433 } 7434 7435 return i; 7436 } 7437 7438 /** 7439 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up 7440 * @netdev: This physical port's netdev 7441 * @sa_family: Socket Family that VXLAN is notifying us about 7442 * @port: New UDP port number that VXLAN started listening to 7443 **/ 7444 static void i40e_add_vxlan_port(struct net_device *netdev, 7445 sa_family_t sa_family, __be16 port) 7446 { 7447 struct i40e_netdev_priv *np = netdev_priv(netdev); 7448 struct i40e_vsi *vsi = np->vsi; 7449 struct i40e_pf *pf = vsi->back; 7450 u8 next_idx; 7451 u8 idx; 7452 7453 if (sa_family == AF_INET6) 7454 return; 7455 7456 idx = i40e_get_vxlan_port_idx(pf, port); 7457 7458 /* Check if port already exists */ 7459 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7460 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port)); 7461 return; 7462 } 7463 7464 /* Now check if there is space to add the new port */ 7465 next_idx = i40e_get_vxlan_port_idx(pf, 0); 7466 7467 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7468 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n", 7469 ntohs(port)); 7470 return; 7471 } 7472 7473 /* New port: add it and mark its index in the bitmap */ 7474 pf->vxlan_ports[next_idx] = port; 7475 pf->pending_vxlan_bitmap |= (1 << next_idx); 7476 7477 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7478 } 7479 7480 /** 7481 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away 7482 * @netdev: This physical port's netdev 7483 * @sa_family: Socket Family that VXLAN is notifying us about 7484 * @port: UDP port number that VXLAN stopped listening to 7485 **/ 7486 static void i40e_del_vxlan_port(struct net_device *netdev, 7487 sa_family_t sa_family, __be16 port) 7488 { 7489 struct i40e_netdev_priv *np = netdev_priv(netdev); 7490 struct i40e_vsi *vsi = np->vsi; 7491 struct i40e_pf *pf = vsi->back; 7492 u8 idx; 7493 7494 if (sa_family == AF_INET6) 7495 return; 7496 7497 idx = i40e_get_vxlan_port_idx(pf, port); 7498 7499 /* Check if port already exists */ 7500 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7501 /* if port exists, set it to 0 (mark for deletion) 7502 * and make it pending 7503 */ 7504 pf->vxlan_ports[idx] = 0; 7505 7506 pf->pending_vxlan_bitmap |= (1 << idx); 7507 7508 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7509 } else { 7510 netdev_warn(netdev, "Port %d was not found, not deleting\n", 7511 ntohs(port)); 7512 } 7513 } 7514 7515 #endif 7516 static int i40e_get_phys_port_id(struct net_device *netdev, 7517 struct netdev_phys_item_id *ppid) 7518 { 7519 struct i40e_netdev_priv *np = netdev_priv(netdev); 7520 struct i40e_pf *pf = np->vsi->back; 7521 struct i40e_hw *hw = &pf->hw; 7522 7523 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 7524 return -EOPNOTSUPP; 7525 7526 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 7527 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 7528 7529 return 0; 7530 } 7531 7532 /** 7533 * i40e_ndo_fdb_add - add an entry to the hardware database 7534 * @ndm: the input from the stack 7535 * @tb: pointer to array of nladdr (unused) 7536 * @dev: the net device pointer 7537 * @addr: the MAC address entry being added 7538 * @flags: instructions from stack about fdb operation 7539 */ 7540 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 7541 struct net_device *dev, 7542 const unsigned char *addr, u16 vid, 7543 u16 flags) 7544 { 7545 struct i40e_netdev_priv *np = netdev_priv(dev); 7546 struct i40e_pf *pf = np->vsi->back; 7547 int err = 0; 7548 7549 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 7550 return -EOPNOTSUPP; 7551 7552 if (vid) { 7553 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 7554 return -EINVAL; 7555 } 7556 7557 /* Hardware does not support aging addresses so if a 7558 * ndm_state is given only allow permanent addresses 7559 */ 7560 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 7561 netdev_info(dev, "FDB only supports static addresses\n"); 7562 return -EINVAL; 7563 } 7564 7565 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 7566 err = dev_uc_add_excl(dev, addr); 7567 else if (is_multicast_ether_addr(addr)) 7568 err = dev_mc_add_excl(dev, addr); 7569 else 7570 err = -EINVAL; 7571 7572 /* Only return duplicate errors if NLM_F_EXCL is set */ 7573 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 7574 err = 0; 7575 7576 return err; 7577 } 7578 7579 static const struct net_device_ops i40e_netdev_ops = { 7580 .ndo_open = i40e_open, 7581 .ndo_stop = i40e_close, 7582 .ndo_start_xmit = i40e_lan_xmit_frame, 7583 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 7584 .ndo_set_rx_mode = i40e_set_rx_mode, 7585 .ndo_validate_addr = eth_validate_addr, 7586 .ndo_set_mac_address = i40e_set_mac, 7587 .ndo_change_mtu = i40e_change_mtu, 7588 .ndo_do_ioctl = i40e_ioctl, 7589 .ndo_tx_timeout = i40e_tx_timeout, 7590 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 7591 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 7592 #ifdef CONFIG_NET_POLL_CONTROLLER 7593 .ndo_poll_controller = i40e_netpoll, 7594 #endif 7595 .ndo_setup_tc = i40e_setup_tc, 7596 #ifdef I40E_FCOE 7597 .ndo_fcoe_enable = i40e_fcoe_enable, 7598 .ndo_fcoe_disable = i40e_fcoe_disable, 7599 #endif 7600 .ndo_set_features = i40e_set_features, 7601 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 7602 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 7603 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 7604 .ndo_get_vf_config = i40e_ndo_get_vf_config, 7605 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 7606 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 7607 #ifdef CONFIG_I40E_VXLAN 7608 .ndo_add_vxlan_port = i40e_add_vxlan_port, 7609 .ndo_del_vxlan_port = i40e_del_vxlan_port, 7610 #endif 7611 .ndo_get_phys_port_id = i40e_get_phys_port_id, 7612 .ndo_fdb_add = i40e_ndo_fdb_add, 7613 }; 7614 7615 /** 7616 * i40e_config_netdev - Setup the netdev flags 7617 * @vsi: the VSI being configured 7618 * 7619 * Returns 0 on success, negative value on failure 7620 **/ 7621 static int i40e_config_netdev(struct i40e_vsi *vsi) 7622 { 7623 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 7624 struct i40e_pf *pf = vsi->back; 7625 struct i40e_hw *hw = &pf->hw; 7626 struct i40e_netdev_priv *np; 7627 struct net_device *netdev; 7628 u8 mac_addr[ETH_ALEN]; 7629 int etherdev_size; 7630 7631 etherdev_size = sizeof(struct i40e_netdev_priv); 7632 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 7633 if (!netdev) 7634 return -ENOMEM; 7635 7636 vsi->netdev = netdev; 7637 np = netdev_priv(netdev); 7638 np->vsi = vsi; 7639 7640 netdev->hw_enc_features |= NETIF_F_IP_CSUM | 7641 NETIF_F_GSO_UDP_TUNNEL | 7642 NETIF_F_TSO; 7643 7644 netdev->features = NETIF_F_SG | 7645 NETIF_F_IP_CSUM | 7646 NETIF_F_SCTP_CSUM | 7647 NETIF_F_HIGHDMA | 7648 NETIF_F_GSO_UDP_TUNNEL | 7649 NETIF_F_HW_VLAN_CTAG_TX | 7650 NETIF_F_HW_VLAN_CTAG_RX | 7651 NETIF_F_HW_VLAN_CTAG_FILTER | 7652 NETIF_F_IPV6_CSUM | 7653 NETIF_F_TSO | 7654 NETIF_F_TSO_ECN | 7655 NETIF_F_TSO6 | 7656 NETIF_F_RXCSUM | 7657 NETIF_F_RXHASH | 7658 0; 7659 7660 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 7661 netdev->features |= NETIF_F_NTUPLE; 7662 7663 /* copy netdev features into list of user selectable features */ 7664 netdev->hw_features |= netdev->features; 7665 7666 if (vsi->type == I40E_VSI_MAIN) { 7667 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 7668 ether_addr_copy(mac_addr, hw->mac.perm_addr); 7669 /* The following steps are necessary to prevent reception 7670 * of tagged packets - some older NVM configurations load a 7671 * default a MAC-VLAN filter that accepts any tagged packet 7672 * which must be replaced by a normal filter. 7673 */ 7674 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) 7675 i40e_add_filter(vsi, mac_addr, 7676 I40E_VLAN_ANY, false, true); 7677 } else { 7678 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 7679 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 7680 pf->vsi[pf->lan_vsi]->netdev->name); 7681 random_ether_addr(mac_addr); 7682 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); 7683 } 7684 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 7685 7686 ether_addr_copy(netdev->dev_addr, mac_addr); 7687 ether_addr_copy(netdev->perm_addr, mac_addr); 7688 /* vlan gets same features (except vlan offload) 7689 * after any tweaks for specific VSI types 7690 */ 7691 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | 7692 NETIF_F_HW_VLAN_CTAG_RX | 7693 NETIF_F_HW_VLAN_CTAG_FILTER); 7694 netdev->priv_flags |= IFF_UNICAST_FLT; 7695 netdev->priv_flags |= IFF_SUPP_NOFCS; 7696 /* Setup netdev TC information */ 7697 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 7698 7699 netdev->netdev_ops = &i40e_netdev_ops; 7700 netdev->watchdog_timeo = 5 * HZ; 7701 i40e_set_ethtool_ops(netdev); 7702 #ifdef I40E_FCOE 7703 i40e_fcoe_config_netdev(netdev, vsi); 7704 #endif 7705 7706 return 0; 7707 } 7708 7709 /** 7710 * i40e_vsi_delete - Delete a VSI from the switch 7711 * @vsi: the VSI being removed 7712 * 7713 * Returns 0 on success, negative value on failure 7714 **/ 7715 static void i40e_vsi_delete(struct i40e_vsi *vsi) 7716 { 7717 /* remove default VSI is not allowed */ 7718 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 7719 return; 7720 7721 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 7722 } 7723 7724 /** 7725 * i40e_add_vsi - Add a VSI to the switch 7726 * @vsi: the VSI being configured 7727 * 7728 * This initializes a VSI context depending on the VSI type to be added and 7729 * passes it down to the add_vsi aq command. 7730 **/ 7731 static int i40e_add_vsi(struct i40e_vsi *vsi) 7732 { 7733 int ret = -ENODEV; 7734 struct i40e_mac_filter *f, *ftmp; 7735 struct i40e_pf *pf = vsi->back; 7736 struct i40e_hw *hw = &pf->hw; 7737 struct i40e_vsi_context ctxt; 7738 u8 enabled_tc = 0x1; /* TC0 enabled */ 7739 int f_count = 0; 7740 7741 memset(&ctxt, 0, sizeof(ctxt)); 7742 switch (vsi->type) { 7743 case I40E_VSI_MAIN: 7744 /* The PF's main VSI is already setup as part of the 7745 * device initialization, so we'll not bother with 7746 * the add_vsi call, but we will retrieve the current 7747 * VSI context. 7748 */ 7749 ctxt.seid = pf->main_vsi_seid; 7750 ctxt.pf_num = pf->hw.pf_id; 7751 ctxt.vf_num = 0; 7752 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 7753 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 7754 if (ret) { 7755 dev_info(&pf->pdev->dev, 7756 "couldn't get pf vsi config, err %d, aq_err %d\n", 7757 ret, pf->hw.aq.asq_last_status); 7758 return -ENOENT; 7759 } 7760 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); 7761 vsi->info.valid_sections = 0; 7762 7763 vsi->seid = ctxt.seid; 7764 vsi->id = ctxt.vsi_number; 7765 7766 enabled_tc = i40e_pf_get_tc_map(pf); 7767 7768 /* MFP mode setup queue map and update VSI */ 7769 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 7770 memset(&ctxt, 0, sizeof(ctxt)); 7771 ctxt.seid = pf->main_vsi_seid; 7772 ctxt.pf_num = pf->hw.pf_id; 7773 ctxt.vf_num = 0; 7774 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 7775 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 7776 if (ret) { 7777 dev_info(&pf->pdev->dev, 7778 "update vsi failed, aq_err=%d\n", 7779 pf->hw.aq.asq_last_status); 7780 ret = -ENOENT; 7781 goto err; 7782 } 7783 /* update the local VSI info queue map */ 7784 i40e_vsi_update_queue_map(vsi, &ctxt); 7785 vsi->info.valid_sections = 0; 7786 } else { 7787 /* Default/Main VSI is only enabled for TC0 7788 * reconfigure it to enable all TCs that are 7789 * available on the port in SFP mode. 7790 */ 7791 ret = i40e_vsi_config_tc(vsi, enabled_tc); 7792 if (ret) { 7793 dev_info(&pf->pdev->dev, 7794 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", 7795 enabled_tc, ret, 7796 pf->hw.aq.asq_last_status); 7797 ret = -ENOENT; 7798 } 7799 } 7800 break; 7801 7802 case I40E_VSI_FDIR: 7803 ctxt.pf_num = hw->pf_id; 7804 ctxt.vf_num = 0; 7805 ctxt.uplink_seid = vsi->uplink_seid; 7806 ctxt.connection_type = 0x1; /* regular data port */ 7807 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 7808 ctxt.info.valid_sections |= 7809 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 7810 ctxt.info.switch_id = 7811 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 7812 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 7813 break; 7814 7815 case I40E_VSI_VMDQ2: 7816 ctxt.pf_num = hw->pf_id; 7817 ctxt.vf_num = 0; 7818 ctxt.uplink_seid = vsi->uplink_seid; 7819 ctxt.connection_type = 0x1; /* regular data port */ 7820 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 7821 7822 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 7823 7824 /* This VSI is connected to VEB so the switch_id 7825 * should be set to zero by default. 7826 */ 7827 ctxt.info.switch_id = 0; 7828 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 7829 7830 /* Setup the VSI tx/rx queue map for TC0 only for now */ 7831 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 7832 break; 7833 7834 case I40E_VSI_SRIOV: 7835 ctxt.pf_num = hw->pf_id; 7836 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 7837 ctxt.uplink_seid = vsi->uplink_seid; 7838 ctxt.connection_type = 0x1; /* regular data port */ 7839 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 7840 7841 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 7842 7843 /* This VSI is connected to VEB so the switch_id 7844 * should be set to zero by default. 7845 */ 7846 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 7847 7848 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 7849 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 7850 if (pf->vf[vsi->vf_id].spoofchk) { 7851 ctxt.info.valid_sections |= 7852 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 7853 ctxt.info.sec_flags |= 7854 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 7855 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 7856 } 7857 /* Setup the VSI tx/rx queue map for TC0 only for now */ 7858 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 7859 break; 7860 7861 #ifdef I40E_FCOE 7862 case I40E_VSI_FCOE: 7863 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 7864 if (ret) { 7865 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 7866 return ret; 7867 } 7868 break; 7869 7870 #endif /* I40E_FCOE */ 7871 default: 7872 return -ENODEV; 7873 } 7874 7875 if (vsi->type != I40E_VSI_MAIN) { 7876 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 7877 if (ret) { 7878 dev_info(&vsi->back->pdev->dev, 7879 "add vsi failed, aq_err=%d\n", 7880 vsi->back->hw.aq.asq_last_status); 7881 ret = -ENOENT; 7882 goto err; 7883 } 7884 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); 7885 vsi->info.valid_sections = 0; 7886 vsi->seid = ctxt.seid; 7887 vsi->id = ctxt.vsi_number; 7888 } 7889 7890 /* If macvlan filters already exist, force them to get loaded */ 7891 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 7892 f->changed = true; 7893 f_count++; 7894 7895 if (f->is_laa && vsi->type == I40E_VSI_MAIN) { 7896 struct i40e_aqc_remove_macvlan_element_data element; 7897 7898 memset(&element, 0, sizeof(element)); 7899 ether_addr_copy(element.mac_addr, f->macaddr); 7900 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 7901 ret = i40e_aq_remove_macvlan(hw, vsi->seid, 7902 &element, 1, NULL); 7903 if (ret) { 7904 /* some older FW has a different default */ 7905 element.flags |= 7906 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 7907 i40e_aq_remove_macvlan(hw, vsi->seid, 7908 &element, 1, NULL); 7909 } 7910 7911 i40e_aq_mac_address_write(hw, 7912 I40E_AQC_WRITE_TYPE_LAA_WOL, 7913 f->macaddr, NULL); 7914 } 7915 } 7916 if (f_count) { 7917 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 7918 pf->flags |= I40E_FLAG_FILTER_SYNC; 7919 } 7920 7921 /* Update VSI BW information */ 7922 ret = i40e_vsi_get_bw_info(vsi); 7923 if (ret) { 7924 dev_info(&pf->pdev->dev, 7925 "couldn't get vsi bw info, err %d, aq_err %d\n", 7926 ret, pf->hw.aq.asq_last_status); 7927 /* VSI is already added so not tearing that up */ 7928 ret = 0; 7929 } 7930 7931 err: 7932 return ret; 7933 } 7934 7935 /** 7936 * i40e_vsi_release - Delete a VSI and free its resources 7937 * @vsi: the VSI being removed 7938 * 7939 * Returns 0 on success or < 0 on error 7940 **/ 7941 int i40e_vsi_release(struct i40e_vsi *vsi) 7942 { 7943 struct i40e_mac_filter *f, *ftmp; 7944 struct i40e_veb *veb = NULL; 7945 struct i40e_pf *pf; 7946 u16 uplink_seid; 7947 int i, n; 7948 7949 pf = vsi->back; 7950 7951 /* release of a VEB-owner or last VSI is not allowed */ 7952 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 7953 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 7954 vsi->seid, vsi->uplink_seid); 7955 return -ENODEV; 7956 } 7957 if (vsi == pf->vsi[pf->lan_vsi] && 7958 !test_bit(__I40E_DOWN, &pf->state)) { 7959 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 7960 return -ENODEV; 7961 } 7962 7963 uplink_seid = vsi->uplink_seid; 7964 if (vsi->type != I40E_VSI_SRIOV) { 7965 if (vsi->netdev_registered) { 7966 vsi->netdev_registered = false; 7967 if (vsi->netdev) { 7968 /* results in a call to i40e_close() */ 7969 unregister_netdev(vsi->netdev); 7970 } 7971 } else { 7972 i40e_vsi_close(vsi); 7973 } 7974 i40e_vsi_disable_irq(vsi); 7975 } 7976 7977 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) 7978 i40e_del_filter(vsi, f->macaddr, f->vlan, 7979 f->is_vf, f->is_netdev); 7980 i40e_sync_vsi_filters(vsi); 7981 7982 i40e_vsi_delete(vsi); 7983 i40e_vsi_free_q_vectors(vsi); 7984 if (vsi->netdev) { 7985 free_netdev(vsi->netdev); 7986 vsi->netdev = NULL; 7987 } 7988 i40e_vsi_clear_rings(vsi); 7989 i40e_vsi_clear(vsi); 7990 7991 /* If this was the last thing on the VEB, except for the 7992 * controlling VSI, remove the VEB, which puts the controlling 7993 * VSI onto the next level down in the switch. 7994 * 7995 * Well, okay, there's one more exception here: don't remove 7996 * the orphan VEBs yet. We'll wait for an explicit remove request 7997 * from up the network stack. 7998 */ 7999 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 8000 if (pf->vsi[i] && 8001 pf->vsi[i]->uplink_seid == uplink_seid && 8002 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8003 n++; /* count the VSIs */ 8004 } 8005 } 8006 for (i = 0; i < I40E_MAX_VEB; i++) { 8007 if (!pf->veb[i]) 8008 continue; 8009 if (pf->veb[i]->uplink_seid == uplink_seid) 8010 n++; /* count the VEBs */ 8011 if (pf->veb[i]->seid == uplink_seid) 8012 veb = pf->veb[i]; 8013 } 8014 if (n == 0 && veb && veb->uplink_seid != 0) 8015 i40e_veb_release(veb); 8016 8017 return 0; 8018 } 8019 8020 /** 8021 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 8022 * @vsi: ptr to the VSI 8023 * 8024 * This should only be called after i40e_vsi_mem_alloc() which allocates the 8025 * corresponding SW VSI structure and initializes num_queue_pairs for the 8026 * newly allocated VSI. 8027 * 8028 * Returns 0 on success or negative on failure 8029 **/ 8030 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 8031 { 8032 int ret = -ENOENT; 8033 struct i40e_pf *pf = vsi->back; 8034 8035 if (vsi->q_vectors[0]) { 8036 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 8037 vsi->seid); 8038 return -EEXIST; 8039 } 8040 8041 if (vsi->base_vector) { 8042 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 8043 vsi->seid, vsi->base_vector); 8044 return -EEXIST; 8045 } 8046 8047 ret = i40e_vsi_alloc_q_vectors(vsi); 8048 if (ret) { 8049 dev_info(&pf->pdev->dev, 8050 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 8051 vsi->num_q_vectors, vsi->seid, ret); 8052 vsi->num_q_vectors = 0; 8053 goto vector_setup_out; 8054 } 8055 8056 if (vsi->num_q_vectors) 8057 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 8058 vsi->num_q_vectors, vsi->idx); 8059 if (vsi->base_vector < 0) { 8060 dev_info(&pf->pdev->dev, 8061 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 8062 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 8063 i40e_vsi_free_q_vectors(vsi); 8064 ret = -ENOENT; 8065 goto vector_setup_out; 8066 } 8067 8068 vector_setup_out: 8069 return ret; 8070 } 8071 8072 /** 8073 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 8074 * @vsi: pointer to the vsi. 8075 * 8076 * This re-allocates a vsi's queue resources. 8077 * 8078 * Returns pointer to the successfully allocated and configured VSI sw struct 8079 * on success, otherwise returns NULL on failure. 8080 **/ 8081 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 8082 { 8083 struct i40e_pf *pf = vsi->back; 8084 u8 enabled_tc; 8085 int ret; 8086 8087 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 8088 i40e_vsi_clear_rings(vsi); 8089 8090 i40e_vsi_free_arrays(vsi, false); 8091 i40e_set_num_rings_in_vsi(vsi); 8092 ret = i40e_vsi_alloc_arrays(vsi, false); 8093 if (ret) 8094 goto err_vsi; 8095 8096 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 8097 if (ret < 0) { 8098 dev_info(&pf->pdev->dev, 8099 "failed to get tracking for %d queues for VSI %d err=%d\n", 8100 vsi->alloc_queue_pairs, vsi->seid, ret); 8101 goto err_vsi; 8102 } 8103 vsi->base_queue = ret; 8104 8105 /* Update the FW view of the VSI. Force a reset of TC and queue 8106 * layout configurations. 8107 */ 8108 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 8109 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 8110 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 8111 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 8112 8113 /* assign it some queues */ 8114 ret = i40e_alloc_rings(vsi); 8115 if (ret) 8116 goto err_rings; 8117 8118 /* map all of the rings to the q_vectors */ 8119 i40e_vsi_map_rings_to_vectors(vsi); 8120 return vsi; 8121 8122 err_rings: 8123 i40e_vsi_free_q_vectors(vsi); 8124 if (vsi->netdev_registered) { 8125 vsi->netdev_registered = false; 8126 unregister_netdev(vsi->netdev); 8127 free_netdev(vsi->netdev); 8128 vsi->netdev = NULL; 8129 } 8130 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8131 err_vsi: 8132 i40e_vsi_clear(vsi); 8133 return NULL; 8134 } 8135 8136 /** 8137 * i40e_vsi_setup - Set up a VSI by a given type 8138 * @pf: board private structure 8139 * @type: VSI type 8140 * @uplink_seid: the switch element to link to 8141 * @param1: usage depends upon VSI type. For VF types, indicates VF id 8142 * 8143 * This allocates the sw VSI structure and its queue resources, then add a VSI 8144 * to the identified VEB. 8145 * 8146 * Returns pointer to the successfully allocated and configure VSI sw struct on 8147 * success, otherwise returns NULL on failure. 8148 **/ 8149 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 8150 u16 uplink_seid, u32 param1) 8151 { 8152 struct i40e_vsi *vsi = NULL; 8153 struct i40e_veb *veb = NULL; 8154 int ret, i; 8155 int v_idx; 8156 8157 /* The requested uplink_seid must be either 8158 * - the PF's port seid 8159 * no VEB is needed because this is the PF 8160 * or this is a Flow Director special case VSI 8161 * - seid of an existing VEB 8162 * - seid of a VSI that owns an existing VEB 8163 * - seid of a VSI that doesn't own a VEB 8164 * a new VEB is created and the VSI becomes the owner 8165 * - seid of the PF VSI, which is what creates the first VEB 8166 * this is a special case of the previous 8167 * 8168 * Find which uplink_seid we were given and create a new VEB if needed 8169 */ 8170 for (i = 0; i < I40E_MAX_VEB; i++) { 8171 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 8172 veb = pf->veb[i]; 8173 break; 8174 } 8175 } 8176 8177 if (!veb && uplink_seid != pf->mac_seid) { 8178 8179 for (i = 0; i < pf->num_alloc_vsi; i++) { 8180 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 8181 vsi = pf->vsi[i]; 8182 break; 8183 } 8184 } 8185 if (!vsi) { 8186 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 8187 uplink_seid); 8188 return NULL; 8189 } 8190 8191 if (vsi->uplink_seid == pf->mac_seid) 8192 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 8193 vsi->tc_config.enabled_tc); 8194 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 8195 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8196 vsi->tc_config.enabled_tc); 8197 if (veb) { 8198 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 8199 dev_info(&vsi->back->pdev->dev, 8200 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n", 8201 __func__); 8202 return NULL; 8203 } 8204 i40e_enable_pf_switch_lb(pf); 8205 } 8206 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8207 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8208 veb = pf->veb[i]; 8209 } 8210 if (!veb) { 8211 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 8212 return NULL; 8213 } 8214 8215 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 8216 uplink_seid = veb->seid; 8217 } 8218 8219 /* get vsi sw struct */ 8220 v_idx = i40e_vsi_mem_alloc(pf, type); 8221 if (v_idx < 0) 8222 goto err_alloc; 8223 vsi = pf->vsi[v_idx]; 8224 if (!vsi) 8225 goto err_alloc; 8226 vsi->type = type; 8227 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 8228 8229 if (type == I40E_VSI_MAIN) 8230 pf->lan_vsi = v_idx; 8231 else if (type == I40E_VSI_SRIOV) 8232 vsi->vf_id = param1; 8233 /* assign it some queues */ 8234 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 8235 vsi->idx); 8236 if (ret < 0) { 8237 dev_info(&pf->pdev->dev, 8238 "failed to get tracking for %d queues for VSI %d err=%d\n", 8239 vsi->alloc_queue_pairs, vsi->seid, ret); 8240 goto err_vsi; 8241 } 8242 vsi->base_queue = ret; 8243 8244 /* get a VSI from the hardware */ 8245 vsi->uplink_seid = uplink_seid; 8246 ret = i40e_add_vsi(vsi); 8247 if (ret) 8248 goto err_vsi; 8249 8250 switch (vsi->type) { 8251 /* setup the netdev if needed */ 8252 case I40E_VSI_MAIN: 8253 case I40E_VSI_VMDQ2: 8254 case I40E_VSI_FCOE: 8255 ret = i40e_config_netdev(vsi); 8256 if (ret) 8257 goto err_netdev; 8258 ret = register_netdev(vsi->netdev); 8259 if (ret) 8260 goto err_netdev; 8261 vsi->netdev_registered = true; 8262 netif_carrier_off(vsi->netdev); 8263 #ifdef CONFIG_I40E_DCB 8264 /* Setup DCB netlink interface */ 8265 i40e_dcbnl_setup(vsi); 8266 #endif /* CONFIG_I40E_DCB */ 8267 /* fall through */ 8268 8269 case I40E_VSI_FDIR: 8270 /* set up vectors and rings if needed */ 8271 ret = i40e_vsi_setup_vectors(vsi); 8272 if (ret) 8273 goto err_msix; 8274 8275 ret = i40e_alloc_rings(vsi); 8276 if (ret) 8277 goto err_rings; 8278 8279 /* map all of the rings to the q_vectors */ 8280 i40e_vsi_map_rings_to_vectors(vsi); 8281 8282 i40e_vsi_reset_stats(vsi); 8283 break; 8284 8285 default: 8286 /* no netdev or rings for the other VSI types */ 8287 break; 8288 } 8289 8290 return vsi; 8291 8292 err_rings: 8293 i40e_vsi_free_q_vectors(vsi); 8294 err_msix: 8295 if (vsi->netdev_registered) { 8296 vsi->netdev_registered = false; 8297 unregister_netdev(vsi->netdev); 8298 free_netdev(vsi->netdev); 8299 vsi->netdev = NULL; 8300 } 8301 err_netdev: 8302 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8303 err_vsi: 8304 i40e_vsi_clear(vsi); 8305 err_alloc: 8306 return NULL; 8307 } 8308 8309 /** 8310 * i40e_veb_get_bw_info - Query VEB BW information 8311 * @veb: the veb to query 8312 * 8313 * Query the Tx scheduler BW configuration data for given VEB 8314 **/ 8315 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 8316 { 8317 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 8318 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 8319 struct i40e_pf *pf = veb->pf; 8320 struct i40e_hw *hw = &pf->hw; 8321 u32 tc_bw_max; 8322 int ret = 0; 8323 int i; 8324 8325 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 8326 &bw_data, NULL); 8327 if (ret) { 8328 dev_info(&pf->pdev->dev, 8329 "query veb bw config failed, aq_err=%d\n", 8330 hw->aq.asq_last_status); 8331 goto out; 8332 } 8333 8334 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 8335 &ets_data, NULL); 8336 if (ret) { 8337 dev_info(&pf->pdev->dev, 8338 "query veb bw ets config failed, aq_err=%d\n", 8339 hw->aq.asq_last_status); 8340 goto out; 8341 } 8342 8343 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 8344 veb->bw_max_quanta = ets_data.tc_bw_max; 8345 veb->is_abs_credits = bw_data.absolute_credits_enable; 8346 veb->enabled_tc = ets_data.tc_valid_bits; 8347 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 8348 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 8349 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 8350 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 8351 veb->bw_tc_limit_credits[i] = 8352 le16_to_cpu(bw_data.tc_bw_limits[i]); 8353 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 8354 } 8355 8356 out: 8357 return ret; 8358 } 8359 8360 /** 8361 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 8362 * @pf: board private structure 8363 * 8364 * On error: returns error code (negative) 8365 * On success: returns vsi index in PF (positive) 8366 **/ 8367 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 8368 { 8369 int ret = -ENOENT; 8370 struct i40e_veb *veb; 8371 int i; 8372 8373 /* Need to protect the allocation of switch elements at the PF level */ 8374 mutex_lock(&pf->switch_mutex); 8375 8376 /* VEB list may be fragmented if VEB creation/destruction has 8377 * been happening. We can afford to do a quick scan to look 8378 * for any free slots in the list. 8379 * 8380 * find next empty veb slot, looping back around if necessary 8381 */ 8382 i = 0; 8383 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 8384 i++; 8385 if (i >= I40E_MAX_VEB) { 8386 ret = -ENOMEM; 8387 goto err_alloc_veb; /* out of VEB slots! */ 8388 } 8389 8390 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 8391 if (!veb) { 8392 ret = -ENOMEM; 8393 goto err_alloc_veb; 8394 } 8395 veb->pf = pf; 8396 veb->idx = i; 8397 veb->enabled_tc = 1; 8398 8399 pf->veb[i] = veb; 8400 ret = i; 8401 err_alloc_veb: 8402 mutex_unlock(&pf->switch_mutex); 8403 return ret; 8404 } 8405 8406 /** 8407 * i40e_switch_branch_release - Delete a branch of the switch tree 8408 * @branch: where to start deleting 8409 * 8410 * This uses recursion to find the tips of the branch to be 8411 * removed, deleting until we get back to and can delete this VEB. 8412 **/ 8413 static void i40e_switch_branch_release(struct i40e_veb *branch) 8414 { 8415 struct i40e_pf *pf = branch->pf; 8416 u16 branch_seid = branch->seid; 8417 u16 veb_idx = branch->idx; 8418 int i; 8419 8420 /* release any VEBs on this VEB - RECURSION */ 8421 for (i = 0; i < I40E_MAX_VEB; i++) { 8422 if (!pf->veb[i]) 8423 continue; 8424 if (pf->veb[i]->uplink_seid == branch->seid) 8425 i40e_switch_branch_release(pf->veb[i]); 8426 } 8427 8428 /* Release the VSIs on this VEB, but not the owner VSI. 8429 * 8430 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 8431 * the VEB itself, so don't use (*branch) after this loop. 8432 */ 8433 for (i = 0; i < pf->num_alloc_vsi; i++) { 8434 if (!pf->vsi[i]) 8435 continue; 8436 if (pf->vsi[i]->uplink_seid == branch_seid && 8437 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8438 i40e_vsi_release(pf->vsi[i]); 8439 } 8440 } 8441 8442 /* There's one corner case where the VEB might not have been 8443 * removed, so double check it here and remove it if needed. 8444 * This case happens if the veb was created from the debugfs 8445 * commands and no VSIs were added to it. 8446 */ 8447 if (pf->veb[veb_idx]) 8448 i40e_veb_release(pf->veb[veb_idx]); 8449 } 8450 8451 /** 8452 * i40e_veb_clear - remove veb struct 8453 * @veb: the veb to remove 8454 **/ 8455 static void i40e_veb_clear(struct i40e_veb *veb) 8456 { 8457 if (!veb) 8458 return; 8459 8460 if (veb->pf) { 8461 struct i40e_pf *pf = veb->pf; 8462 8463 mutex_lock(&pf->switch_mutex); 8464 if (pf->veb[veb->idx] == veb) 8465 pf->veb[veb->idx] = NULL; 8466 mutex_unlock(&pf->switch_mutex); 8467 } 8468 8469 kfree(veb); 8470 } 8471 8472 /** 8473 * i40e_veb_release - Delete a VEB and free its resources 8474 * @veb: the VEB being removed 8475 **/ 8476 void i40e_veb_release(struct i40e_veb *veb) 8477 { 8478 struct i40e_vsi *vsi = NULL; 8479 struct i40e_pf *pf; 8480 int i, n = 0; 8481 8482 pf = veb->pf; 8483 8484 /* find the remaining VSI and check for extras */ 8485 for (i = 0; i < pf->num_alloc_vsi; i++) { 8486 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 8487 n++; 8488 vsi = pf->vsi[i]; 8489 } 8490 } 8491 if (n != 1) { 8492 dev_info(&pf->pdev->dev, 8493 "can't remove VEB %d with %d VSIs left\n", 8494 veb->seid, n); 8495 return; 8496 } 8497 8498 /* move the remaining VSI to uplink veb */ 8499 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 8500 if (veb->uplink_seid) { 8501 vsi->uplink_seid = veb->uplink_seid; 8502 if (veb->uplink_seid == pf->mac_seid) 8503 vsi->veb_idx = I40E_NO_VEB; 8504 else 8505 vsi->veb_idx = veb->veb_idx; 8506 } else { 8507 /* floating VEB */ 8508 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 8509 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 8510 } 8511 8512 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 8513 i40e_veb_clear(veb); 8514 } 8515 8516 /** 8517 * i40e_add_veb - create the VEB in the switch 8518 * @veb: the VEB to be instantiated 8519 * @vsi: the controlling VSI 8520 **/ 8521 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 8522 { 8523 bool is_default = false; 8524 bool is_cloud = false; 8525 int ret; 8526 8527 /* get a VEB from the hardware */ 8528 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, 8529 veb->enabled_tc, is_default, 8530 is_cloud, &veb->seid, NULL); 8531 if (ret) { 8532 dev_info(&veb->pf->pdev->dev, 8533 "couldn't add VEB, err %d, aq_err %d\n", 8534 ret, veb->pf->hw.aq.asq_last_status); 8535 return -EPERM; 8536 } 8537 8538 /* get statistics counter */ 8539 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, 8540 &veb->stats_idx, NULL, NULL, NULL); 8541 if (ret) { 8542 dev_info(&veb->pf->pdev->dev, 8543 "couldn't get VEB statistics idx, err %d, aq_err %d\n", 8544 ret, veb->pf->hw.aq.asq_last_status); 8545 return -EPERM; 8546 } 8547 ret = i40e_veb_get_bw_info(veb); 8548 if (ret) { 8549 dev_info(&veb->pf->pdev->dev, 8550 "couldn't get VEB bw info, err %d, aq_err %d\n", 8551 ret, veb->pf->hw.aq.asq_last_status); 8552 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); 8553 return -ENOENT; 8554 } 8555 8556 vsi->uplink_seid = veb->seid; 8557 vsi->veb_idx = veb->idx; 8558 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 8559 8560 return 0; 8561 } 8562 8563 /** 8564 * i40e_veb_setup - Set up a VEB 8565 * @pf: board private structure 8566 * @flags: VEB setup flags 8567 * @uplink_seid: the switch element to link to 8568 * @vsi_seid: the initial VSI seid 8569 * @enabled_tc: Enabled TC bit-map 8570 * 8571 * This allocates the sw VEB structure and links it into the switch 8572 * It is possible and legal for this to be a duplicate of an already 8573 * existing VEB. It is also possible for both uplink and vsi seids 8574 * to be zero, in order to create a floating VEB. 8575 * 8576 * Returns pointer to the successfully allocated VEB sw struct on 8577 * success, otherwise returns NULL on failure. 8578 **/ 8579 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 8580 u16 uplink_seid, u16 vsi_seid, 8581 u8 enabled_tc) 8582 { 8583 struct i40e_veb *veb, *uplink_veb = NULL; 8584 int vsi_idx, veb_idx; 8585 int ret; 8586 8587 /* if one seid is 0, the other must be 0 to create a floating relay */ 8588 if ((uplink_seid == 0 || vsi_seid == 0) && 8589 (uplink_seid + vsi_seid != 0)) { 8590 dev_info(&pf->pdev->dev, 8591 "one, not both seid's are 0: uplink=%d vsi=%d\n", 8592 uplink_seid, vsi_seid); 8593 return NULL; 8594 } 8595 8596 /* make sure there is such a vsi and uplink */ 8597 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 8598 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 8599 break; 8600 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 8601 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 8602 vsi_seid); 8603 return NULL; 8604 } 8605 8606 if (uplink_seid && uplink_seid != pf->mac_seid) { 8607 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 8608 if (pf->veb[veb_idx] && 8609 pf->veb[veb_idx]->seid == uplink_seid) { 8610 uplink_veb = pf->veb[veb_idx]; 8611 break; 8612 } 8613 } 8614 if (!uplink_veb) { 8615 dev_info(&pf->pdev->dev, 8616 "uplink seid %d not found\n", uplink_seid); 8617 return NULL; 8618 } 8619 } 8620 8621 /* get veb sw struct */ 8622 veb_idx = i40e_veb_mem_alloc(pf); 8623 if (veb_idx < 0) 8624 goto err_alloc; 8625 veb = pf->veb[veb_idx]; 8626 veb->flags = flags; 8627 veb->uplink_seid = uplink_seid; 8628 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 8629 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 8630 8631 /* create the VEB in the switch */ 8632 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 8633 if (ret) 8634 goto err_veb; 8635 if (vsi_idx == pf->lan_vsi) 8636 pf->lan_veb = veb->idx; 8637 8638 return veb; 8639 8640 err_veb: 8641 i40e_veb_clear(veb); 8642 err_alloc: 8643 return NULL; 8644 } 8645 8646 /** 8647 * i40e_setup_pf_switch_element - set pf vars based on switch type 8648 * @pf: board private structure 8649 * @ele: element we are building info from 8650 * @num_reported: total number of elements 8651 * @printconfig: should we print the contents 8652 * 8653 * helper function to assist in extracting a few useful SEID values. 8654 **/ 8655 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 8656 struct i40e_aqc_switch_config_element_resp *ele, 8657 u16 num_reported, bool printconfig) 8658 { 8659 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 8660 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 8661 u8 element_type = ele->element_type; 8662 u16 seid = le16_to_cpu(ele->seid); 8663 8664 if (printconfig) 8665 dev_info(&pf->pdev->dev, 8666 "type=%d seid=%d uplink=%d downlink=%d\n", 8667 element_type, seid, uplink_seid, downlink_seid); 8668 8669 switch (element_type) { 8670 case I40E_SWITCH_ELEMENT_TYPE_MAC: 8671 pf->mac_seid = seid; 8672 break; 8673 case I40E_SWITCH_ELEMENT_TYPE_VEB: 8674 /* Main VEB? */ 8675 if (uplink_seid != pf->mac_seid) 8676 break; 8677 if (pf->lan_veb == I40E_NO_VEB) { 8678 int v; 8679 8680 /* find existing or else empty VEB */ 8681 for (v = 0; v < I40E_MAX_VEB; v++) { 8682 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 8683 pf->lan_veb = v; 8684 break; 8685 } 8686 } 8687 if (pf->lan_veb == I40E_NO_VEB) { 8688 v = i40e_veb_mem_alloc(pf); 8689 if (v < 0) 8690 break; 8691 pf->lan_veb = v; 8692 } 8693 } 8694 8695 pf->veb[pf->lan_veb]->seid = seid; 8696 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 8697 pf->veb[pf->lan_veb]->pf = pf; 8698 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 8699 break; 8700 case I40E_SWITCH_ELEMENT_TYPE_VSI: 8701 if (num_reported != 1) 8702 break; 8703 /* This is immediately after a reset so we can assume this is 8704 * the PF's VSI 8705 */ 8706 pf->mac_seid = uplink_seid; 8707 pf->pf_seid = downlink_seid; 8708 pf->main_vsi_seid = seid; 8709 if (printconfig) 8710 dev_info(&pf->pdev->dev, 8711 "pf_seid=%d main_vsi_seid=%d\n", 8712 pf->pf_seid, pf->main_vsi_seid); 8713 break; 8714 case I40E_SWITCH_ELEMENT_TYPE_PF: 8715 case I40E_SWITCH_ELEMENT_TYPE_VF: 8716 case I40E_SWITCH_ELEMENT_TYPE_EMP: 8717 case I40E_SWITCH_ELEMENT_TYPE_BMC: 8718 case I40E_SWITCH_ELEMENT_TYPE_PE: 8719 case I40E_SWITCH_ELEMENT_TYPE_PA: 8720 /* ignore these for now */ 8721 break; 8722 default: 8723 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 8724 element_type, seid); 8725 break; 8726 } 8727 } 8728 8729 /** 8730 * i40e_fetch_switch_configuration - Get switch config from firmware 8731 * @pf: board private structure 8732 * @printconfig: should we print the contents 8733 * 8734 * Get the current switch configuration from the device and 8735 * extract a few useful SEID values. 8736 **/ 8737 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 8738 { 8739 struct i40e_aqc_get_switch_config_resp *sw_config; 8740 u16 next_seid = 0; 8741 int ret = 0; 8742 u8 *aq_buf; 8743 int i; 8744 8745 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 8746 if (!aq_buf) 8747 return -ENOMEM; 8748 8749 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 8750 do { 8751 u16 num_reported, num_total; 8752 8753 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 8754 I40E_AQ_LARGE_BUF, 8755 &next_seid, NULL); 8756 if (ret) { 8757 dev_info(&pf->pdev->dev, 8758 "get switch config failed %d aq_err=%x\n", 8759 ret, pf->hw.aq.asq_last_status); 8760 kfree(aq_buf); 8761 return -ENOENT; 8762 } 8763 8764 num_reported = le16_to_cpu(sw_config->header.num_reported); 8765 num_total = le16_to_cpu(sw_config->header.num_total); 8766 8767 if (printconfig) 8768 dev_info(&pf->pdev->dev, 8769 "header: %d reported %d total\n", 8770 num_reported, num_total); 8771 8772 for (i = 0; i < num_reported; i++) { 8773 struct i40e_aqc_switch_config_element_resp *ele = 8774 &sw_config->element[i]; 8775 8776 i40e_setup_pf_switch_element(pf, ele, num_reported, 8777 printconfig); 8778 } 8779 } while (next_seid != 0); 8780 8781 kfree(aq_buf); 8782 return ret; 8783 } 8784 8785 /** 8786 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 8787 * @pf: board private structure 8788 * @reinit: if the Main VSI needs to re-initialized. 8789 * 8790 * Returns 0 on success, negative value on failure 8791 **/ 8792 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 8793 { 8794 int ret; 8795 8796 /* find out what's out there already */ 8797 ret = i40e_fetch_switch_configuration(pf, false); 8798 if (ret) { 8799 dev_info(&pf->pdev->dev, 8800 "couldn't fetch switch config, err %d, aq_err %d\n", 8801 ret, pf->hw.aq.asq_last_status); 8802 return ret; 8803 } 8804 i40e_pf_reset_stats(pf); 8805 8806 /* first time setup */ 8807 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 8808 struct i40e_vsi *vsi = NULL; 8809 u16 uplink_seid; 8810 8811 /* Set up the PF VSI associated with the PF's main VSI 8812 * that is already in the HW switch 8813 */ 8814 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 8815 uplink_seid = pf->veb[pf->lan_veb]->seid; 8816 else 8817 uplink_seid = pf->mac_seid; 8818 if (pf->lan_vsi == I40E_NO_VSI) 8819 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 8820 else if (reinit) 8821 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 8822 if (!vsi) { 8823 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 8824 i40e_fdir_teardown(pf); 8825 return -EAGAIN; 8826 } 8827 } else { 8828 /* force a reset of TC and queue layout configurations */ 8829 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 8830 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 8831 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 8832 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 8833 } 8834 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 8835 8836 i40e_fdir_sb_setup(pf); 8837 8838 /* Setup static PF queue filter control settings */ 8839 ret = i40e_setup_pf_filter_control(pf); 8840 if (ret) { 8841 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 8842 ret); 8843 /* Failure here should not stop continuing other steps */ 8844 } 8845 8846 /* enable RSS in the HW, even for only one queue, as the stack can use 8847 * the hash 8848 */ 8849 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 8850 i40e_config_rss(pf); 8851 8852 /* fill in link information and enable LSE reporting */ 8853 i40e_update_link_info(&pf->hw, true); 8854 i40e_link_event(pf); 8855 8856 /* Initialize user-specific link properties */ 8857 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 8858 I40E_AQ_AN_COMPLETED) ? true : false); 8859 8860 /* fill in link information and enable LSE reporting */ 8861 i40e_update_link_info(&pf->hw, true); 8862 i40e_link_event(pf); 8863 8864 /* Initialize user-specific link properties */ 8865 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 8866 I40E_AQ_AN_COMPLETED) ? true : false); 8867 8868 i40e_ptp_init(pf); 8869 8870 return ret; 8871 } 8872 8873 /** 8874 * i40e_determine_queue_usage - Work out queue distribution 8875 * @pf: board private structure 8876 **/ 8877 static void i40e_determine_queue_usage(struct i40e_pf *pf) 8878 { 8879 int queues_left; 8880 8881 pf->num_lan_qps = 0; 8882 #ifdef I40E_FCOE 8883 pf->num_fcoe_qps = 0; 8884 #endif 8885 8886 /* Find the max queues to be put into basic use. We'll always be 8887 * using TC0, whether or not DCB is running, and TC0 will get the 8888 * big RSS set. 8889 */ 8890 queues_left = pf->hw.func_caps.num_tx_qp; 8891 8892 if ((queues_left == 1) || 8893 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 8894 /* one qp for PF, no queues for anything else */ 8895 queues_left = 0; 8896 pf->rss_size = pf->num_lan_qps = 1; 8897 8898 /* make sure all the fancies are disabled */ 8899 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 8900 #ifdef I40E_FCOE 8901 I40E_FLAG_FCOE_ENABLED | 8902 #endif 8903 I40E_FLAG_FD_SB_ENABLED | 8904 I40E_FLAG_FD_ATR_ENABLED | 8905 I40E_FLAG_DCB_CAPABLE | 8906 I40E_FLAG_SRIOV_ENABLED | 8907 I40E_FLAG_VMDQ_ENABLED); 8908 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 8909 I40E_FLAG_FD_SB_ENABLED | 8910 I40E_FLAG_FD_ATR_ENABLED | 8911 I40E_FLAG_DCB_CAPABLE))) { 8912 /* one qp for PF */ 8913 pf->rss_size = pf->num_lan_qps = 1; 8914 queues_left -= pf->num_lan_qps; 8915 8916 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 8917 #ifdef I40E_FCOE 8918 I40E_FLAG_FCOE_ENABLED | 8919 #endif 8920 I40E_FLAG_FD_SB_ENABLED | 8921 I40E_FLAG_FD_ATR_ENABLED | 8922 I40E_FLAG_DCB_ENABLED | 8923 I40E_FLAG_VMDQ_ENABLED); 8924 } else { 8925 /* Not enough queues for all TCs */ 8926 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 8927 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 8928 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 8929 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 8930 } 8931 pf->num_lan_qps = pf->rss_size_max; 8932 queues_left -= pf->num_lan_qps; 8933 } 8934 8935 #ifdef I40E_FCOE 8936 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 8937 if (I40E_DEFAULT_FCOE <= queues_left) { 8938 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 8939 } else if (I40E_MINIMUM_FCOE <= queues_left) { 8940 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 8941 } else { 8942 pf->num_fcoe_qps = 0; 8943 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 8944 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 8945 } 8946 8947 queues_left -= pf->num_fcoe_qps; 8948 } 8949 8950 #endif 8951 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 8952 if (queues_left > 1) { 8953 queues_left -= 1; /* save 1 queue for FD */ 8954 } else { 8955 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8956 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 8957 } 8958 } 8959 8960 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 8961 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 8962 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 8963 (queues_left / pf->num_vf_qps)); 8964 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 8965 } 8966 8967 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 8968 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 8969 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 8970 (queues_left / pf->num_vmdq_qps)); 8971 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 8972 } 8973 8974 pf->queues_left = queues_left; 8975 #ifdef I40E_FCOE 8976 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 8977 #endif 8978 } 8979 8980 /** 8981 * i40e_setup_pf_filter_control - Setup PF static filter control 8982 * @pf: PF to be setup 8983 * 8984 * i40e_setup_pf_filter_control sets up a pf's initial filter control 8985 * settings. If PE/FCoE are enabled then it will also set the per PF 8986 * based filter sizes required for them. It also enables Flow director, 8987 * ethertype and macvlan type filter settings for the pf. 8988 * 8989 * Returns 0 on success, negative on failure 8990 **/ 8991 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 8992 { 8993 struct i40e_filter_control_settings *settings = &pf->filter_settings; 8994 8995 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 8996 8997 /* Flow Director is enabled */ 8998 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 8999 settings->enable_fdir = true; 9000 9001 /* Ethtype and MACVLAN filters enabled for PF */ 9002 settings->enable_ethtype = true; 9003 settings->enable_macvlan = true; 9004 9005 if (i40e_set_filter_control(&pf->hw, settings)) 9006 return -ENOENT; 9007 9008 return 0; 9009 } 9010 9011 #define INFO_STRING_LEN 255 9012 static void i40e_print_features(struct i40e_pf *pf) 9013 { 9014 struct i40e_hw *hw = &pf->hw; 9015 char *buf, *string; 9016 9017 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); 9018 if (!string) { 9019 dev_err(&pf->pdev->dev, "Features string allocation failed\n"); 9020 return; 9021 } 9022 9023 buf = string; 9024 9025 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id); 9026 #ifdef CONFIG_PCI_IOV 9027 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs); 9028 #endif 9029 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis, 9030 pf->vsi[pf->lan_vsi]->num_queue_pairs); 9031 9032 if (pf->flags & I40E_FLAG_RSS_ENABLED) 9033 buf += sprintf(buf, "RSS "); 9034 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 9035 buf += sprintf(buf, "FD_ATR "); 9036 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9037 buf += sprintf(buf, "FD_SB "); 9038 buf += sprintf(buf, "NTUPLE "); 9039 } 9040 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 9041 buf += sprintf(buf, "DCB "); 9042 if (pf->flags & I40E_FLAG_PTP) 9043 buf += sprintf(buf, "PTP "); 9044 #ifdef I40E_FCOE 9045 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 9046 buf += sprintf(buf, "FCOE "); 9047 #endif 9048 9049 BUG_ON(buf > (string + INFO_STRING_LEN)); 9050 dev_info(&pf->pdev->dev, "%s\n", string); 9051 kfree(string); 9052 } 9053 9054 /** 9055 * i40e_probe - Device initialization routine 9056 * @pdev: PCI device information struct 9057 * @ent: entry in i40e_pci_tbl 9058 * 9059 * i40e_probe initializes a pf identified by a pci_dev structure. 9060 * The OS initialization, configuring of the pf private structure, 9061 * and a hardware reset occur. 9062 * 9063 * Returns 0 on success, negative on failure 9064 **/ 9065 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 9066 { 9067 struct i40e_pf *pf; 9068 struct i40e_hw *hw; 9069 static u16 pfs_found; 9070 u16 link_status; 9071 int err = 0; 9072 u32 len; 9073 u32 i; 9074 9075 err = pci_enable_device_mem(pdev); 9076 if (err) 9077 return err; 9078 9079 /* set up for high or low dma */ 9080 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9081 if (err) { 9082 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9083 if (err) { 9084 dev_err(&pdev->dev, 9085 "DMA configuration failed: 0x%x\n", err); 9086 goto err_dma; 9087 } 9088 } 9089 9090 /* set up pci connections */ 9091 err = pci_request_selected_regions(pdev, pci_select_bars(pdev, 9092 IORESOURCE_MEM), i40e_driver_name); 9093 if (err) { 9094 dev_info(&pdev->dev, 9095 "pci_request_selected_regions failed %d\n", err); 9096 goto err_pci_reg; 9097 } 9098 9099 pci_enable_pcie_error_reporting(pdev); 9100 pci_set_master(pdev); 9101 9102 /* Now that we have a PCI connection, we need to do the 9103 * low level device setup. This is primarily setting up 9104 * the Admin Queue structures and then querying for the 9105 * device's current profile information. 9106 */ 9107 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 9108 if (!pf) { 9109 err = -ENOMEM; 9110 goto err_pf_alloc; 9111 } 9112 pf->next_vsi = 0; 9113 pf->pdev = pdev; 9114 set_bit(__I40E_DOWN, &pf->state); 9115 9116 hw = &pf->hw; 9117 hw->back = pf; 9118 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 9119 pci_resource_len(pdev, 0)); 9120 if (!hw->hw_addr) { 9121 err = -EIO; 9122 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 9123 (unsigned int)pci_resource_start(pdev, 0), 9124 (unsigned int)pci_resource_len(pdev, 0), err); 9125 goto err_ioremap; 9126 } 9127 hw->vendor_id = pdev->vendor; 9128 hw->device_id = pdev->device; 9129 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 9130 hw->subsystem_vendor_id = pdev->subsystem_vendor; 9131 hw->subsystem_device_id = pdev->subsystem_device; 9132 hw->bus.device = PCI_SLOT(pdev->devfn); 9133 hw->bus.func = PCI_FUNC(pdev->devfn); 9134 pf->instance = pfs_found; 9135 9136 if (debug != -1) { 9137 pf->msg_enable = pf->hw.debug_mask; 9138 pf->msg_enable = debug; 9139 } 9140 9141 /* do a special CORER for clearing PXE mode once at init */ 9142 if (hw->revision_id == 0 && 9143 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 9144 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 9145 i40e_flush(hw); 9146 msleep(200); 9147 pf->corer_count++; 9148 9149 i40e_clear_pxe_mode(hw); 9150 } 9151 9152 /* Reset here to make sure all is clean and to define PF 'n' */ 9153 i40e_clear_hw(hw); 9154 err = i40e_pf_reset(hw); 9155 if (err) { 9156 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 9157 goto err_pf_reset; 9158 } 9159 pf->pfr_count++; 9160 9161 hw->aq.num_arq_entries = I40E_AQ_LEN; 9162 hw->aq.num_asq_entries = I40E_AQ_LEN; 9163 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9164 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9165 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 9166 9167 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1, 9168 "%s-%s:misc", 9169 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 9170 9171 err = i40e_init_shared_code(hw); 9172 if (err) { 9173 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); 9174 goto err_pf_reset; 9175 } 9176 9177 /* set up a default setting for link flow control */ 9178 pf->hw.fc.requested_mode = I40E_FC_NONE; 9179 9180 err = i40e_init_adminq(hw); 9181 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); 9182 if (err) { 9183 dev_info(&pdev->dev, 9184 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 9185 goto err_pf_reset; 9186 } 9187 9188 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 9189 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 9190 dev_info(&pdev->dev, 9191 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 9192 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 9193 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 9194 dev_info(&pdev->dev, 9195 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 9196 9197 9198 i40e_verify_eeprom(pf); 9199 9200 /* Rev 0 hardware was never productized */ 9201 if (hw->revision_id < 1) 9202 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 9203 9204 i40e_clear_pxe_mode(hw); 9205 err = i40e_get_capabilities(pf); 9206 if (err) 9207 goto err_adminq_setup; 9208 9209 err = i40e_sw_init(pf); 9210 if (err) { 9211 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 9212 goto err_sw_init; 9213 } 9214 9215 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 9216 hw->func_caps.num_rx_qp, 9217 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 9218 if (err) { 9219 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 9220 goto err_init_lan_hmc; 9221 } 9222 9223 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 9224 if (err) { 9225 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 9226 err = -ENOENT; 9227 goto err_configure_lan_hmc; 9228 } 9229 9230 i40e_get_mac_addr(hw, hw->mac.addr); 9231 if (!is_valid_ether_addr(hw->mac.addr)) { 9232 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 9233 err = -EIO; 9234 goto err_mac_addr; 9235 } 9236 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 9237 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 9238 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 9239 if (is_valid_ether_addr(hw->mac.port_addr)) 9240 pf->flags |= I40E_FLAG_PORT_ID_VALID; 9241 #ifdef I40E_FCOE 9242 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 9243 if (err) 9244 dev_info(&pdev->dev, 9245 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 9246 if (!is_valid_ether_addr(hw->mac.san_addr)) { 9247 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 9248 hw->mac.san_addr); 9249 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 9250 } 9251 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 9252 #endif /* I40E_FCOE */ 9253 9254 pci_set_drvdata(pdev, pf); 9255 pci_save_state(pdev); 9256 #ifdef CONFIG_I40E_DCB 9257 err = i40e_init_pf_dcb(pf); 9258 if (err) { 9259 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err); 9260 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9261 /* Continue without DCB enabled */ 9262 } 9263 #endif /* CONFIG_I40E_DCB */ 9264 9265 /* set up periodic task facility */ 9266 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 9267 pf->service_timer_period = HZ; 9268 9269 INIT_WORK(&pf->service_task, i40e_service_task); 9270 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 9271 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 9272 pf->link_check_timeout = jiffies; 9273 9274 /* WoL defaults to disabled */ 9275 pf->wol_en = false; 9276 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 9277 9278 /* set up the main switch operations */ 9279 i40e_determine_queue_usage(pf); 9280 i40e_init_interrupt_scheme(pf); 9281 9282 /* The number of VSIs reported by the FW is the minimum guaranteed 9283 * to us; HW supports far more and we share the remaining pool with 9284 * the other PFs. We allocate space for more than the guarantee with 9285 * the understanding that we might not get them all later. 9286 */ 9287 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 9288 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 9289 else 9290 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 9291 9292 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 9293 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi; 9294 pf->vsi = kzalloc(len, GFP_KERNEL); 9295 if (!pf->vsi) { 9296 err = -ENOMEM; 9297 goto err_switch_setup; 9298 } 9299 9300 err = i40e_setup_pf_switch(pf, false); 9301 if (err) { 9302 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 9303 goto err_vsis; 9304 } 9305 /* if FDIR VSI was set up, start it now */ 9306 for (i = 0; i < pf->num_alloc_vsi; i++) { 9307 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 9308 i40e_vsi_open(pf->vsi[i]); 9309 break; 9310 } 9311 } 9312 9313 /* driver is only interested in link up/down and module qualification 9314 * reports from firmware 9315 */ 9316 err = i40e_aq_set_phy_int_mask(&pf->hw, 9317 I40E_AQ_EVENT_LINK_UPDOWN | 9318 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 9319 if (err) 9320 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err); 9321 9322 msleep(75); 9323 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 9324 if (err) { 9325 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 9326 pf->hw.aq.asq_last_status); 9327 } 9328 9329 /* The main driver is (mostly) up and happy. We need to set this state 9330 * before setting up the misc vector or we get a race and the vector 9331 * ends up disabled forever. 9332 */ 9333 clear_bit(__I40E_DOWN, &pf->state); 9334 9335 /* In case of MSIX we are going to setup the misc vector right here 9336 * to handle admin queue events etc. In case of legacy and MSI 9337 * the misc functionality and queue processing is combined in 9338 * the same vector and that gets setup at open. 9339 */ 9340 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 9341 err = i40e_setup_misc_vector(pf); 9342 if (err) { 9343 dev_info(&pdev->dev, 9344 "setup of misc vector failed: %d\n", err); 9345 goto err_vsis; 9346 } 9347 } 9348 9349 #ifdef CONFIG_PCI_IOV 9350 /* prep for VF support */ 9351 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9352 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 9353 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 9354 u32 val; 9355 9356 /* disable link interrupts for VFs */ 9357 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 9358 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 9359 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 9360 i40e_flush(hw); 9361 9362 if (pci_num_vf(pdev)) { 9363 dev_info(&pdev->dev, 9364 "Active VFs found, allocating resources.\n"); 9365 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 9366 if (err) 9367 dev_info(&pdev->dev, 9368 "Error %d allocating resources for existing VFs\n", 9369 err); 9370 } 9371 } 9372 #endif /* CONFIG_PCI_IOV */ 9373 9374 pfs_found++; 9375 9376 i40e_dbg_pf_init(pf); 9377 9378 /* tell the firmware that we're starting */ 9379 i40e_send_version(pf); 9380 9381 /* since everything's happy, start the service_task timer */ 9382 mod_timer(&pf->service_timer, 9383 round_jiffies(jiffies + pf->service_timer_period)); 9384 9385 #ifdef I40E_FCOE 9386 /* create FCoE interface */ 9387 i40e_fcoe_vsi_setup(pf); 9388 9389 #endif 9390 /* Get the negotiated link width and speed from PCI config space */ 9391 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); 9392 9393 i40e_set_pci_config_data(hw, link_status); 9394 9395 dev_info(&pdev->dev, "PCI-Express: %s %s\n", 9396 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : 9397 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : 9398 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : 9399 "Unknown"), 9400 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : 9401 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : 9402 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : 9403 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : 9404 "Unknown")); 9405 9406 if (hw->bus.width < i40e_bus_width_pcie_x8 || 9407 hw->bus.speed < i40e_bus_speed_8000) { 9408 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 9409 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 9410 } 9411 9412 /* print a string summarizing features */ 9413 i40e_print_features(pf); 9414 9415 return 0; 9416 9417 /* Unwind what we've done if something failed in the setup */ 9418 err_vsis: 9419 set_bit(__I40E_DOWN, &pf->state); 9420 i40e_clear_interrupt_scheme(pf); 9421 kfree(pf->vsi); 9422 err_switch_setup: 9423 i40e_reset_interrupt_capability(pf); 9424 del_timer_sync(&pf->service_timer); 9425 err_mac_addr: 9426 err_configure_lan_hmc: 9427 (void)i40e_shutdown_lan_hmc(hw); 9428 err_init_lan_hmc: 9429 kfree(pf->qp_pile); 9430 kfree(pf->irq_pile); 9431 err_sw_init: 9432 err_adminq_setup: 9433 (void)i40e_shutdown_adminq(hw); 9434 err_pf_reset: 9435 iounmap(hw->hw_addr); 9436 err_ioremap: 9437 kfree(pf); 9438 err_pf_alloc: 9439 pci_disable_pcie_error_reporting(pdev); 9440 pci_release_selected_regions(pdev, 9441 pci_select_bars(pdev, IORESOURCE_MEM)); 9442 err_pci_reg: 9443 err_dma: 9444 pci_disable_device(pdev); 9445 return err; 9446 } 9447 9448 /** 9449 * i40e_remove - Device removal routine 9450 * @pdev: PCI device information struct 9451 * 9452 * i40e_remove is called by the PCI subsystem to alert the driver 9453 * that is should release a PCI device. This could be caused by a 9454 * Hot-Plug event, or because the driver is going to be removed from 9455 * memory. 9456 **/ 9457 static void i40e_remove(struct pci_dev *pdev) 9458 { 9459 struct i40e_pf *pf = pci_get_drvdata(pdev); 9460 i40e_status ret_code; 9461 int i; 9462 9463 i40e_dbg_pf_exit(pf); 9464 9465 i40e_ptp_stop(pf); 9466 9467 /* no more scheduling of any task */ 9468 set_bit(__I40E_DOWN, &pf->state); 9469 del_timer_sync(&pf->service_timer); 9470 cancel_work_sync(&pf->service_task); 9471 9472 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 9473 i40e_free_vfs(pf); 9474 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 9475 } 9476 9477 i40e_fdir_teardown(pf); 9478 9479 /* If there is a switch structure or any orphans, remove them. 9480 * This will leave only the PF's VSI remaining. 9481 */ 9482 for (i = 0; i < I40E_MAX_VEB; i++) { 9483 if (!pf->veb[i]) 9484 continue; 9485 9486 if (pf->veb[i]->uplink_seid == pf->mac_seid || 9487 pf->veb[i]->uplink_seid == 0) 9488 i40e_switch_branch_release(pf->veb[i]); 9489 } 9490 9491 /* Now we can shutdown the PF's VSI, just before we kill 9492 * adminq and hmc. 9493 */ 9494 if (pf->vsi[pf->lan_vsi]) 9495 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 9496 9497 i40e_stop_misc_vector(pf); 9498 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 9499 synchronize_irq(pf->msix_entries[0].vector); 9500 free_irq(pf->msix_entries[0].vector, pf); 9501 } 9502 9503 /* shutdown and destroy the HMC */ 9504 if (pf->hw.hmc.hmc_obj) { 9505 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 9506 if (ret_code) 9507 dev_warn(&pdev->dev, 9508 "Failed to destroy the HMC resources: %d\n", 9509 ret_code); 9510 } 9511 9512 /* shutdown the adminq */ 9513 ret_code = i40e_shutdown_adminq(&pf->hw); 9514 if (ret_code) 9515 dev_warn(&pdev->dev, 9516 "Failed to destroy the Admin Queue resources: %d\n", 9517 ret_code); 9518 9519 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 9520 i40e_clear_interrupt_scheme(pf); 9521 for (i = 0; i < pf->num_alloc_vsi; i++) { 9522 if (pf->vsi[i]) { 9523 i40e_vsi_clear_rings(pf->vsi[i]); 9524 i40e_vsi_clear(pf->vsi[i]); 9525 pf->vsi[i] = NULL; 9526 } 9527 } 9528 9529 for (i = 0; i < I40E_MAX_VEB; i++) { 9530 kfree(pf->veb[i]); 9531 pf->veb[i] = NULL; 9532 } 9533 9534 kfree(pf->qp_pile); 9535 kfree(pf->irq_pile); 9536 kfree(pf->vsi); 9537 9538 iounmap(pf->hw.hw_addr); 9539 kfree(pf); 9540 pci_release_selected_regions(pdev, 9541 pci_select_bars(pdev, IORESOURCE_MEM)); 9542 9543 pci_disable_pcie_error_reporting(pdev); 9544 pci_disable_device(pdev); 9545 } 9546 9547 /** 9548 * i40e_pci_error_detected - warning that something funky happened in PCI land 9549 * @pdev: PCI device information struct 9550 * 9551 * Called to warn that something happened and the error handling steps 9552 * are in progress. Allows the driver to quiesce things, be ready for 9553 * remediation. 9554 **/ 9555 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 9556 enum pci_channel_state error) 9557 { 9558 struct i40e_pf *pf = pci_get_drvdata(pdev); 9559 9560 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 9561 9562 /* shutdown all operations */ 9563 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 9564 rtnl_lock(); 9565 i40e_prep_for_reset(pf); 9566 rtnl_unlock(); 9567 } 9568 9569 /* Request a slot reset */ 9570 return PCI_ERS_RESULT_NEED_RESET; 9571 } 9572 9573 /** 9574 * i40e_pci_error_slot_reset - a PCI slot reset just happened 9575 * @pdev: PCI device information struct 9576 * 9577 * Called to find if the driver can work with the device now that 9578 * the pci slot has been reset. If a basic connection seems good 9579 * (registers are readable and have sane content) then return a 9580 * happy little PCI_ERS_RESULT_xxx. 9581 **/ 9582 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 9583 { 9584 struct i40e_pf *pf = pci_get_drvdata(pdev); 9585 pci_ers_result_t result; 9586 int err; 9587 u32 reg; 9588 9589 dev_info(&pdev->dev, "%s\n", __func__); 9590 if (pci_enable_device_mem(pdev)) { 9591 dev_info(&pdev->dev, 9592 "Cannot re-enable PCI device after reset.\n"); 9593 result = PCI_ERS_RESULT_DISCONNECT; 9594 } else { 9595 pci_set_master(pdev); 9596 pci_restore_state(pdev); 9597 pci_save_state(pdev); 9598 pci_wake_from_d3(pdev, false); 9599 9600 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 9601 if (reg == 0) 9602 result = PCI_ERS_RESULT_RECOVERED; 9603 else 9604 result = PCI_ERS_RESULT_DISCONNECT; 9605 } 9606 9607 err = pci_cleanup_aer_uncorrect_error_status(pdev); 9608 if (err) { 9609 dev_info(&pdev->dev, 9610 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 9611 err); 9612 /* non-fatal, continue */ 9613 } 9614 9615 return result; 9616 } 9617 9618 /** 9619 * i40e_pci_error_resume - restart operations after PCI error recovery 9620 * @pdev: PCI device information struct 9621 * 9622 * Called to allow the driver to bring things back up after PCI error 9623 * and/or reset recovery has finished. 9624 **/ 9625 static void i40e_pci_error_resume(struct pci_dev *pdev) 9626 { 9627 struct i40e_pf *pf = pci_get_drvdata(pdev); 9628 9629 dev_info(&pdev->dev, "%s\n", __func__); 9630 if (test_bit(__I40E_SUSPENDED, &pf->state)) 9631 return; 9632 9633 rtnl_lock(); 9634 i40e_handle_reset_warning(pf); 9635 rtnl_lock(); 9636 } 9637 9638 /** 9639 * i40e_shutdown - PCI callback for shutting down 9640 * @pdev: PCI device information struct 9641 **/ 9642 static void i40e_shutdown(struct pci_dev *pdev) 9643 { 9644 struct i40e_pf *pf = pci_get_drvdata(pdev); 9645 struct i40e_hw *hw = &pf->hw; 9646 9647 set_bit(__I40E_SUSPENDED, &pf->state); 9648 set_bit(__I40E_DOWN, &pf->state); 9649 rtnl_lock(); 9650 i40e_prep_for_reset(pf); 9651 rtnl_unlock(); 9652 9653 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 9654 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 9655 9656 if (system_state == SYSTEM_POWER_OFF) { 9657 pci_wake_from_d3(pdev, pf->wol_en); 9658 pci_set_power_state(pdev, PCI_D3hot); 9659 } 9660 } 9661 9662 #ifdef CONFIG_PM 9663 /** 9664 * i40e_suspend - PCI callback for moving to D3 9665 * @pdev: PCI device information struct 9666 **/ 9667 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 9668 { 9669 struct i40e_pf *pf = pci_get_drvdata(pdev); 9670 struct i40e_hw *hw = &pf->hw; 9671 9672 set_bit(__I40E_SUSPENDED, &pf->state); 9673 set_bit(__I40E_DOWN, &pf->state); 9674 rtnl_lock(); 9675 i40e_prep_for_reset(pf); 9676 rtnl_unlock(); 9677 9678 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 9679 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 9680 9681 pci_wake_from_d3(pdev, pf->wol_en); 9682 pci_set_power_state(pdev, PCI_D3hot); 9683 9684 return 0; 9685 } 9686 9687 /** 9688 * i40e_resume - PCI callback for waking up from D3 9689 * @pdev: PCI device information struct 9690 **/ 9691 static int i40e_resume(struct pci_dev *pdev) 9692 { 9693 struct i40e_pf *pf = pci_get_drvdata(pdev); 9694 u32 err; 9695 9696 pci_set_power_state(pdev, PCI_D0); 9697 pci_restore_state(pdev); 9698 /* pci_restore_state() clears dev->state_saves, so 9699 * call pci_save_state() again to restore it. 9700 */ 9701 pci_save_state(pdev); 9702 9703 err = pci_enable_device_mem(pdev); 9704 if (err) { 9705 dev_err(&pdev->dev, 9706 "%s: Cannot enable PCI device from suspend\n", 9707 __func__); 9708 return err; 9709 } 9710 pci_set_master(pdev); 9711 9712 /* no wakeup events while running */ 9713 pci_wake_from_d3(pdev, false); 9714 9715 /* handling the reset will rebuild the device state */ 9716 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 9717 clear_bit(__I40E_DOWN, &pf->state); 9718 rtnl_lock(); 9719 i40e_reset_and_rebuild(pf, false); 9720 rtnl_unlock(); 9721 } 9722 9723 return 0; 9724 } 9725 9726 #endif 9727 static const struct pci_error_handlers i40e_err_handler = { 9728 .error_detected = i40e_pci_error_detected, 9729 .slot_reset = i40e_pci_error_slot_reset, 9730 .resume = i40e_pci_error_resume, 9731 }; 9732 9733 static struct pci_driver i40e_driver = { 9734 .name = i40e_driver_name, 9735 .id_table = i40e_pci_tbl, 9736 .probe = i40e_probe, 9737 .remove = i40e_remove, 9738 #ifdef CONFIG_PM 9739 .suspend = i40e_suspend, 9740 .resume = i40e_resume, 9741 #endif 9742 .shutdown = i40e_shutdown, 9743 .err_handler = &i40e_err_handler, 9744 .sriov_configure = i40e_pci_sriov_configure, 9745 }; 9746 9747 /** 9748 * i40e_init_module - Driver registration routine 9749 * 9750 * i40e_init_module is the first routine called when the driver is 9751 * loaded. All it does is register with the PCI subsystem. 9752 **/ 9753 static int __init i40e_init_module(void) 9754 { 9755 pr_info("%s: %s - version %s\n", i40e_driver_name, 9756 i40e_driver_string, i40e_driver_version_str); 9757 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 9758 i40e_dbg_init(); 9759 return pci_register_driver(&i40e_driver); 9760 } 9761 module_init(i40e_init_module); 9762 9763 /** 9764 * i40e_exit_module - Driver exit cleanup routine 9765 * 9766 * i40e_exit_module is called just before the driver is removed 9767 * from memory. 9768 **/ 9769 static void __exit i40e_exit_module(void) 9770 { 9771 pci_unregister_driver(&i40e_driver); 9772 i40e_dbg_exit(); 9773 } 9774 module_exit(i40e_exit_module); 9775