1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2021 Intel Corporation. */ 3 4 #include <linux/etherdevice.h> 5 #include <linux/of_net.h> 6 #include <linux/pci.h> 7 #include <linux/bpf.h> 8 #include <generated/utsrelease.h> 9 #include <linux/crash_dump.h> 10 11 /* Local includes */ 12 #include "i40e.h" 13 #include "i40e_diag.h" 14 #include "i40e_xsk.h" 15 #include <net/udp_tunnel.h> 16 #include <net/xdp_sock_drv.h> 17 /* All i40e tracepoints are defined by the include below, which 18 * must be included exactly once across the whole kernel with 19 * CREATE_TRACE_POINTS defined 20 */ 21 #define CREATE_TRACE_POINTS 22 #include "i40e_trace.h" 23 24 const char i40e_driver_name[] = "i40e"; 25 static const char i40e_driver_string[] = 26 "Intel(R) Ethernet Connection XL710 Network Driver"; 27 28 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation."; 29 30 /* a bit of forward declarations */ 31 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 32 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired); 33 static int i40e_add_vsi(struct i40e_vsi *vsi); 34 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 35 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired); 36 static int i40e_setup_misc_vector(struct i40e_pf *pf); 37 static void i40e_determine_queue_usage(struct i40e_pf *pf); 38 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 39 static void i40e_prep_for_reset(struct i40e_pf *pf); 40 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit, 41 bool lock_acquired); 42 static int i40e_reset(struct i40e_pf *pf); 43 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired); 44 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf); 45 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf); 46 static bool i40e_check_recovery_mode(struct i40e_pf *pf); 47 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw); 48 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 49 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 50 static int i40e_get_capabilities(struct i40e_pf *pf, 51 enum i40e_admin_queue_opc list_type); 52 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf); 53 54 /* i40e_pci_tbl - PCI Device ID Table 55 * 56 * Last entry must be all 0s 57 * 58 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 59 * Class, Class Mask, private data (not used) } 60 */ 61 static const struct pci_device_id i40e_pci_tbl[] = { 62 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 63 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 64 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, 79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0}, 80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0}, 82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0}, 83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0}, 84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0}, 85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0}, 86 /* required last entry */ 87 {0, } 88 }; 89 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 90 91 #define I40E_MAX_VF_COUNT 128 92 static int debug = -1; 93 module_param(debug, uint, 0); 94 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)"); 95 96 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 97 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 98 MODULE_LICENSE("GPL v2"); 99 100 static struct workqueue_struct *i40e_wq; 101 102 /** 103 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 104 * @hw: pointer to the HW structure 105 * @mem: ptr to mem struct to fill out 106 * @size: size of memory requested 107 * @alignment: what to align the allocation to 108 **/ 109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 110 u64 size, u32 alignment) 111 { 112 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 113 114 mem->size = ALIGN(size, alignment); 115 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa, 116 GFP_KERNEL); 117 if (!mem->va) 118 return -ENOMEM; 119 120 return 0; 121 } 122 123 /** 124 * i40e_free_dma_mem_d - OS specific memory free for shared code 125 * @hw: pointer to the HW structure 126 * @mem: ptr to mem struct to free 127 **/ 128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 129 { 130 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 131 132 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 133 mem->va = NULL; 134 mem->pa = 0; 135 mem->size = 0; 136 137 return 0; 138 } 139 140 /** 141 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 142 * @hw: pointer to the HW structure 143 * @mem: ptr to mem struct to fill out 144 * @size: size of memory requested 145 **/ 146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 147 u32 size) 148 { 149 mem->size = size; 150 mem->va = kzalloc(size, GFP_KERNEL); 151 152 if (!mem->va) 153 return -ENOMEM; 154 155 return 0; 156 } 157 158 /** 159 * i40e_free_virt_mem_d - OS specific memory free for shared code 160 * @hw: pointer to the HW structure 161 * @mem: ptr to mem struct to free 162 **/ 163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 164 { 165 /* it's ok to kfree a NULL pointer */ 166 kfree(mem->va); 167 mem->va = NULL; 168 mem->size = 0; 169 170 return 0; 171 } 172 173 /** 174 * i40e_get_lump - find a lump of free generic resource 175 * @pf: board private structure 176 * @pile: the pile of resource to search 177 * @needed: the number of items needed 178 * @id: an owner id to stick on the items assigned 179 * 180 * Returns the base item index of the lump, or negative for error 181 * 182 * The search_hint trick and lack of advanced fit-finding only work 183 * because we're highly likely to have all the same size lump requests. 184 * Linear search time and any fragmentation should be minimal. 185 **/ 186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 187 u16 needed, u16 id) 188 { 189 int ret = -ENOMEM; 190 int i, j; 191 192 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 193 dev_info(&pf->pdev->dev, 194 "param err: pile=%s needed=%d id=0x%04x\n", 195 pile ? "<valid>" : "<null>", needed, id); 196 return -EINVAL; 197 } 198 199 /* start the linear search with an imperfect hint */ 200 i = pile->search_hint; 201 while (i < pile->num_entries) { 202 /* skip already allocated entries */ 203 if (pile->list[i] & I40E_PILE_VALID_BIT) { 204 i++; 205 continue; 206 } 207 208 /* do we have enough in this lump? */ 209 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 210 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 211 break; 212 } 213 214 if (j == needed) { 215 /* there was enough, so assign it to the requestor */ 216 for (j = 0; j < needed; j++) 217 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 218 ret = i; 219 pile->search_hint = i + j; 220 break; 221 } 222 223 /* not enough, so skip over it and continue looking */ 224 i += j; 225 } 226 227 return ret; 228 } 229 230 /** 231 * i40e_put_lump - return a lump of generic resource 232 * @pile: the pile of resource to search 233 * @index: the base item index 234 * @id: the owner id of the items assigned 235 * 236 * Returns the count of items in the lump 237 **/ 238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 239 { 240 int valid_id = (id | I40E_PILE_VALID_BIT); 241 int count = 0; 242 int i; 243 244 if (!pile || index >= pile->num_entries) 245 return -EINVAL; 246 247 for (i = index; 248 i < pile->num_entries && pile->list[i] == valid_id; 249 i++) { 250 pile->list[i] = 0; 251 count++; 252 } 253 254 if (count && index < pile->search_hint) 255 pile->search_hint = index; 256 257 return count; 258 } 259 260 /** 261 * i40e_find_vsi_from_id - searches for the vsi with the given id 262 * @pf: the pf structure to search for the vsi 263 * @id: id of the vsi it is searching for 264 **/ 265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 266 { 267 int i; 268 269 for (i = 0; i < pf->num_alloc_vsi; i++) 270 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 271 return pf->vsi[i]; 272 273 return NULL; 274 } 275 276 /** 277 * i40e_service_event_schedule - Schedule the service task to wake up 278 * @pf: board private structure 279 * 280 * If not already scheduled, this puts the task into the work queue 281 **/ 282 void i40e_service_event_schedule(struct i40e_pf *pf) 283 { 284 if ((!test_bit(__I40E_DOWN, pf->state) && 285 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) || 286 test_bit(__I40E_RECOVERY_MODE, pf->state)) 287 queue_work(i40e_wq, &pf->service_task); 288 } 289 290 /** 291 * i40e_tx_timeout - Respond to a Tx Hang 292 * @netdev: network interface device structure 293 * @txqueue: queue number timing out 294 * 295 * If any port has noticed a Tx timeout, it is likely that the whole 296 * device is munged, not just the one netdev port, so go for the full 297 * reset. 298 **/ 299 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue) 300 { 301 struct i40e_netdev_priv *np = netdev_priv(netdev); 302 struct i40e_vsi *vsi = np->vsi; 303 struct i40e_pf *pf = vsi->back; 304 struct i40e_ring *tx_ring = NULL; 305 unsigned int i; 306 u32 head, val; 307 308 pf->tx_timeout_count++; 309 310 /* with txqueue index, find the tx_ring struct */ 311 for (i = 0; i < vsi->num_queue_pairs; i++) { 312 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 313 if (txqueue == 314 vsi->tx_rings[i]->queue_index) { 315 tx_ring = vsi->tx_rings[i]; 316 break; 317 } 318 } 319 } 320 321 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 322 pf->tx_timeout_recovery_level = 1; /* reset after some time */ 323 else if (time_before(jiffies, 324 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo))) 325 return; /* don't do any new action before the next timeout */ 326 327 /* don't kick off another recovery if one is already pending */ 328 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state)) 329 return; 330 331 if (tx_ring) { 332 head = i40e_get_head(tx_ring); 333 /* Read interrupt register */ 334 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 335 val = rd32(&pf->hw, 336 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 337 tx_ring->vsi->base_vector - 1)); 338 else 339 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 340 341 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n", 342 vsi->seid, txqueue, tx_ring->next_to_clean, 343 head, tx_ring->next_to_use, 344 readl(tx_ring->tail), val); 345 } 346 347 pf->tx_timeout_last_recovery = jiffies; 348 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n", 349 pf->tx_timeout_recovery_level, txqueue); 350 351 switch (pf->tx_timeout_recovery_level) { 352 case 1: 353 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 354 break; 355 case 2: 356 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 357 break; 358 case 3: 359 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state); 360 break; 361 default: 362 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 363 break; 364 } 365 366 i40e_service_event_schedule(pf); 367 pf->tx_timeout_recovery_level++; 368 } 369 370 /** 371 * i40e_get_vsi_stats_struct - Get System Network Statistics 372 * @vsi: the VSI we care about 373 * 374 * Returns the address of the device statistics structure. 375 * The statistics are actually updated from the service task. 376 **/ 377 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 378 { 379 return &vsi->net_stats; 380 } 381 382 /** 383 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring 384 * @ring: Tx ring to get statistics from 385 * @stats: statistics entry to be updated 386 **/ 387 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring, 388 struct rtnl_link_stats64 *stats) 389 { 390 u64 bytes, packets; 391 unsigned int start; 392 393 do { 394 start = u64_stats_fetch_begin_irq(&ring->syncp); 395 packets = ring->stats.packets; 396 bytes = ring->stats.bytes; 397 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 398 399 stats->tx_packets += packets; 400 stats->tx_bytes += bytes; 401 } 402 403 /** 404 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 405 * @netdev: network interface device structure 406 * @stats: data structure to store statistics 407 * 408 * Returns the address of the device statistics structure. 409 * The statistics are actually updated from the service task. 410 **/ 411 static void i40e_get_netdev_stats_struct(struct net_device *netdev, 412 struct rtnl_link_stats64 *stats) 413 { 414 struct i40e_netdev_priv *np = netdev_priv(netdev); 415 struct i40e_vsi *vsi = np->vsi; 416 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 417 struct i40e_ring *ring; 418 int i; 419 420 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 421 return; 422 423 if (!vsi->tx_rings) 424 return; 425 426 rcu_read_lock(); 427 for (i = 0; i < vsi->num_queue_pairs; i++) { 428 u64 bytes, packets; 429 unsigned int start; 430 431 ring = READ_ONCE(vsi->tx_rings[i]); 432 if (!ring) 433 continue; 434 i40e_get_netdev_stats_struct_tx(ring, stats); 435 436 if (i40e_enabled_xdp_vsi(vsi)) { 437 ring = READ_ONCE(vsi->xdp_rings[i]); 438 if (!ring) 439 continue; 440 i40e_get_netdev_stats_struct_tx(ring, stats); 441 } 442 443 ring = READ_ONCE(vsi->rx_rings[i]); 444 if (!ring) 445 continue; 446 do { 447 start = u64_stats_fetch_begin_irq(&ring->syncp); 448 packets = ring->stats.packets; 449 bytes = ring->stats.bytes; 450 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 451 452 stats->rx_packets += packets; 453 stats->rx_bytes += bytes; 454 455 } 456 rcu_read_unlock(); 457 458 /* following stats updated by i40e_watchdog_subtask() */ 459 stats->multicast = vsi_stats->multicast; 460 stats->tx_errors = vsi_stats->tx_errors; 461 stats->tx_dropped = vsi_stats->tx_dropped; 462 stats->rx_errors = vsi_stats->rx_errors; 463 stats->rx_dropped = vsi_stats->rx_dropped; 464 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 465 stats->rx_length_errors = vsi_stats->rx_length_errors; 466 } 467 468 /** 469 * i40e_vsi_reset_stats - Resets all stats of the given vsi 470 * @vsi: the VSI to have its stats reset 471 **/ 472 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 473 { 474 struct rtnl_link_stats64 *ns; 475 int i; 476 477 if (!vsi) 478 return; 479 480 ns = i40e_get_vsi_stats_struct(vsi); 481 memset(ns, 0, sizeof(*ns)); 482 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 483 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 484 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 485 if (vsi->rx_rings && vsi->rx_rings[0]) { 486 for (i = 0; i < vsi->num_queue_pairs; i++) { 487 memset(&vsi->rx_rings[i]->stats, 0, 488 sizeof(vsi->rx_rings[i]->stats)); 489 memset(&vsi->rx_rings[i]->rx_stats, 0, 490 sizeof(vsi->rx_rings[i]->rx_stats)); 491 memset(&vsi->tx_rings[i]->stats, 0, 492 sizeof(vsi->tx_rings[i]->stats)); 493 memset(&vsi->tx_rings[i]->tx_stats, 0, 494 sizeof(vsi->tx_rings[i]->tx_stats)); 495 } 496 } 497 vsi->stat_offsets_loaded = false; 498 } 499 500 /** 501 * i40e_pf_reset_stats - Reset all of the stats for the given PF 502 * @pf: the PF to be reset 503 **/ 504 void i40e_pf_reset_stats(struct i40e_pf *pf) 505 { 506 int i; 507 508 memset(&pf->stats, 0, sizeof(pf->stats)); 509 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 510 pf->stat_offsets_loaded = false; 511 512 for (i = 0; i < I40E_MAX_VEB; i++) { 513 if (pf->veb[i]) { 514 memset(&pf->veb[i]->stats, 0, 515 sizeof(pf->veb[i]->stats)); 516 memset(&pf->veb[i]->stats_offsets, 0, 517 sizeof(pf->veb[i]->stats_offsets)); 518 memset(&pf->veb[i]->tc_stats, 0, 519 sizeof(pf->veb[i]->tc_stats)); 520 memset(&pf->veb[i]->tc_stats_offsets, 0, 521 sizeof(pf->veb[i]->tc_stats_offsets)); 522 pf->veb[i]->stat_offsets_loaded = false; 523 } 524 } 525 pf->hw_csum_rx_error = 0; 526 } 527 528 /** 529 * i40e_stat_update48 - read and update a 48 bit stat from the chip 530 * @hw: ptr to the hardware info 531 * @hireg: the high 32 bit reg to read 532 * @loreg: the low 32 bit reg to read 533 * @offset_loaded: has the initial offset been loaded yet 534 * @offset: ptr to current offset value 535 * @stat: ptr to the stat 536 * 537 * Since the device stats are not reset at PFReset, they likely will not 538 * be zeroed when the driver starts. We'll save the first values read 539 * and use them as offsets to be subtracted from the raw values in order 540 * to report stats that count from zero. In the process, we also manage 541 * the potential roll-over. 542 **/ 543 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 544 bool offset_loaded, u64 *offset, u64 *stat) 545 { 546 u64 new_data; 547 548 if (hw->device_id == I40E_DEV_ID_QEMU) { 549 new_data = rd32(hw, loreg); 550 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 551 } else { 552 new_data = rd64(hw, loreg); 553 } 554 if (!offset_loaded) 555 *offset = new_data; 556 if (likely(new_data >= *offset)) 557 *stat = new_data - *offset; 558 else 559 *stat = (new_data + BIT_ULL(48)) - *offset; 560 *stat &= 0xFFFFFFFFFFFFULL; 561 } 562 563 /** 564 * i40e_stat_update32 - read and update a 32 bit stat from the chip 565 * @hw: ptr to the hardware info 566 * @reg: the hw reg to read 567 * @offset_loaded: has the initial offset been loaded yet 568 * @offset: ptr to current offset value 569 * @stat: ptr to the stat 570 **/ 571 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 572 bool offset_loaded, u64 *offset, u64 *stat) 573 { 574 u32 new_data; 575 576 new_data = rd32(hw, reg); 577 if (!offset_loaded) 578 *offset = new_data; 579 if (likely(new_data >= *offset)) 580 *stat = (u32)(new_data - *offset); 581 else 582 *stat = (u32)((new_data + BIT_ULL(32)) - *offset); 583 } 584 585 /** 586 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat 587 * @hw: ptr to the hardware info 588 * @reg: the hw reg to read and clear 589 * @stat: ptr to the stat 590 **/ 591 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat) 592 { 593 u32 new_data = rd32(hw, reg); 594 595 wr32(hw, reg, 1); /* must write a nonzero value to clear register */ 596 *stat += new_data; 597 } 598 599 /** 600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 601 * @vsi: the VSI to be updated 602 **/ 603 void i40e_update_eth_stats(struct i40e_vsi *vsi) 604 { 605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 606 struct i40e_pf *pf = vsi->back; 607 struct i40e_hw *hw = &pf->hw; 608 struct i40e_eth_stats *oes; 609 struct i40e_eth_stats *es; /* device's eth stats */ 610 611 es = &vsi->eth_stats; 612 oes = &vsi->eth_stats_offsets; 613 614 /* Gather up the stats that the hw collects */ 615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 616 vsi->stat_offsets_loaded, 617 &oes->tx_errors, &es->tx_errors); 618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 619 vsi->stat_offsets_loaded, 620 &oes->rx_discards, &es->rx_discards); 621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 622 vsi->stat_offsets_loaded, 623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 624 625 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 626 I40E_GLV_GORCL(stat_idx), 627 vsi->stat_offsets_loaded, 628 &oes->rx_bytes, &es->rx_bytes); 629 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 630 I40E_GLV_UPRCL(stat_idx), 631 vsi->stat_offsets_loaded, 632 &oes->rx_unicast, &es->rx_unicast); 633 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 634 I40E_GLV_MPRCL(stat_idx), 635 vsi->stat_offsets_loaded, 636 &oes->rx_multicast, &es->rx_multicast); 637 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 638 I40E_GLV_BPRCL(stat_idx), 639 vsi->stat_offsets_loaded, 640 &oes->rx_broadcast, &es->rx_broadcast); 641 642 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 643 I40E_GLV_GOTCL(stat_idx), 644 vsi->stat_offsets_loaded, 645 &oes->tx_bytes, &es->tx_bytes); 646 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 647 I40E_GLV_UPTCL(stat_idx), 648 vsi->stat_offsets_loaded, 649 &oes->tx_unicast, &es->tx_unicast); 650 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 651 I40E_GLV_MPTCL(stat_idx), 652 vsi->stat_offsets_loaded, 653 &oes->tx_multicast, &es->tx_multicast); 654 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 655 I40E_GLV_BPTCL(stat_idx), 656 vsi->stat_offsets_loaded, 657 &oes->tx_broadcast, &es->tx_broadcast); 658 vsi->stat_offsets_loaded = true; 659 } 660 661 /** 662 * i40e_update_veb_stats - Update Switch component statistics 663 * @veb: the VEB being updated 664 **/ 665 void i40e_update_veb_stats(struct i40e_veb *veb) 666 { 667 struct i40e_pf *pf = veb->pf; 668 struct i40e_hw *hw = &pf->hw; 669 struct i40e_eth_stats *oes; 670 struct i40e_eth_stats *es; /* device's eth stats */ 671 struct i40e_veb_tc_stats *veb_oes; 672 struct i40e_veb_tc_stats *veb_es; 673 int i, idx = 0; 674 675 idx = veb->stats_idx; 676 es = &veb->stats; 677 oes = &veb->stats_offsets; 678 veb_es = &veb->tc_stats; 679 veb_oes = &veb->tc_stats_offsets; 680 681 /* Gather up the stats that the hw collects */ 682 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 683 veb->stat_offsets_loaded, 684 &oes->tx_discards, &es->tx_discards); 685 if (hw->revision_id > 0) 686 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 687 veb->stat_offsets_loaded, 688 &oes->rx_unknown_protocol, 689 &es->rx_unknown_protocol); 690 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 691 veb->stat_offsets_loaded, 692 &oes->rx_bytes, &es->rx_bytes); 693 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 694 veb->stat_offsets_loaded, 695 &oes->rx_unicast, &es->rx_unicast); 696 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 697 veb->stat_offsets_loaded, 698 &oes->rx_multicast, &es->rx_multicast); 699 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 700 veb->stat_offsets_loaded, 701 &oes->rx_broadcast, &es->rx_broadcast); 702 703 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 704 veb->stat_offsets_loaded, 705 &oes->tx_bytes, &es->tx_bytes); 706 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 707 veb->stat_offsets_loaded, 708 &oes->tx_unicast, &es->tx_unicast); 709 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 710 veb->stat_offsets_loaded, 711 &oes->tx_multicast, &es->tx_multicast); 712 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 713 veb->stat_offsets_loaded, 714 &oes->tx_broadcast, &es->tx_broadcast); 715 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 716 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx), 717 I40E_GLVEBTC_RPCL(i, idx), 718 veb->stat_offsets_loaded, 719 &veb_oes->tc_rx_packets[i], 720 &veb_es->tc_rx_packets[i]); 721 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx), 722 I40E_GLVEBTC_RBCL(i, idx), 723 veb->stat_offsets_loaded, 724 &veb_oes->tc_rx_bytes[i], 725 &veb_es->tc_rx_bytes[i]); 726 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx), 727 I40E_GLVEBTC_TPCL(i, idx), 728 veb->stat_offsets_loaded, 729 &veb_oes->tc_tx_packets[i], 730 &veb_es->tc_tx_packets[i]); 731 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx), 732 I40E_GLVEBTC_TBCL(i, idx), 733 veb->stat_offsets_loaded, 734 &veb_oes->tc_tx_bytes[i], 735 &veb_es->tc_tx_bytes[i]); 736 } 737 veb->stat_offsets_loaded = true; 738 } 739 740 /** 741 * i40e_update_vsi_stats - Update the vsi statistics counters. 742 * @vsi: the VSI to be updated 743 * 744 * There are a few instances where we store the same stat in a 745 * couple of different structs. This is partly because we have 746 * the netdev stats that need to be filled out, which is slightly 747 * different from the "eth_stats" defined by the chip and used in 748 * VF communications. We sort it out here. 749 **/ 750 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 751 { 752 struct i40e_pf *pf = vsi->back; 753 struct rtnl_link_stats64 *ons; 754 struct rtnl_link_stats64 *ns; /* netdev stats */ 755 struct i40e_eth_stats *oes; 756 struct i40e_eth_stats *es; /* device's eth stats */ 757 u32 tx_restart, tx_busy; 758 struct i40e_ring *p; 759 u32 rx_page, rx_buf; 760 u64 bytes, packets; 761 unsigned int start; 762 u64 tx_linearize; 763 u64 tx_force_wb; 764 u64 rx_p, rx_b; 765 u64 tx_p, tx_b; 766 u16 q; 767 768 if (test_bit(__I40E_VSI_DOWN, vsi->state) || 769 test_bit(__I40E_CONFIG_BUSY, pf->state)) 770 return; 771 772 ns = i40e_get_vsi_stats_struct(vsi); 773 ons = &vsi->net_stats_offsets; 774 es = &vsi->eth_stats; 775 oes = &vsi->eth_stats_offsets; 776 777 /* Gather up the netdev and vsi stats that the driver collects 778 * on the fly during packet processing 779 */ 780 rx_b = rx_p = 0; 781 tx_b = tx_p = 0; 782 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0; 783 rx_page = 0; 784 rx_buf = 0; 785 rcu_read_lock(); 786 for (q = 0; q < vsi->num_queue_pairs; q++) { 787 /* locate Tx ring */ 788 p = READ_ONCE(vsi->tx_rings[q]); 789 if (!p) 790 continue; 791 792 do { 793 start = u64_stats_fetch_begin_irq(&p->syncp); 794 packets = p->stats.packets; 795 bytes = p->stats.bytes; 796 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 797 tx_b += bytes; 798 tx_p += packets; 799 tx_restart += p->tx_stats.restart_queue; 800 tx_busy += p->tx_stats.tx_busy; 801 tx_linearize += p->tx_stats.tx_linearize; 802 tx_force_wb += p->tx_stats.tx_force_wb; 803 804 /* locate Rx ring */ 805 p = READ_ONCE(vsi->rx_rings[q]); 806 if (!p) 807 continue; 808 809 do { 810 start = u64_stats_fetch_begin_irq(&p->syncp); 811 packets = p->stats.packets; 812 bytes = p->stats.bytes; 813 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 814 rx_b += bytes; 815 rx_p += packets; 816 rx_buf += p->rx_stats.alloc_buff_failed; 817 rx_page += p->rx_stats.alloc_page_failed; 818 819 if (i40e_enabled_xdp_vsi(vsi)) { 820 /* locate XDP ring */ 821 p = READ_ONCE(vsi->xdp_rings[q]); 822 if (!p) 823 continue; 824 825 do { 826 start = u64_stats_fetch_begin_irq(&p->syncp); 827 packets = p->stats.packets; 828 bytes = p->stats.bytes; 829 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 830 tx_b += bytes; 831 tx_p += packets; 832 tx_restart += p->tx_stats.restart_queue; 833 tx_busy += p->tx_stats.tx_busy; 834 tx_linearize += p->tx_stats.tx_linearize; 835 tx_force_wb += p->tx_stats.tx_force_wb; 836 } 837 } 838 rcu_read_unlock(); 839 vsi->tx_restart = tx_restart; 840 vsi->tx_busy = tx_busy; 841 vsi->tx_linearize = tx_linearize; 842 vsi->tx_force_wb = tx_force_wb; 843 vsi->rx_page_failed = rx_page; 844 vsi->rx_buf_failed = rx_buf; 845 846 ns->rx_packets = rx_p; 847 ns->rx_bytes = rx_b; 848 ns->tx_packets = tx_p; 849 ns->tx_bytes = tx_b; 850 851 /* update netdev stats from eth stats */ 852 i40e_update_eth_stats(vsi); 853 ons->tx_errors = oes->tx_errors; 854 ns->tx_errors = es->tx_errors; 855 ons->multicast = oes->rx_multicast; 856 ns->multicast = es->rx_multicast; 857 ons->rx_dropped = oes->rx_discards; 858 ns->rx_dropped = es->rx_discards; 859 ons->tx_dropped = oes->tx_discards; 860 ns->tx_dropped = es->tx_discards; 861 862 /* pull in a couple PF stats if this is the main vsi */ 863 if (vsi == pf->vsi[pf->lan_vsi]) { 864 ns->rx_crc_errors = pf->stats.crc_errors; 865 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 866 ns->rx_length_errors = pf->stats.rx_length_errors; 867 } 868 } 869 870 /** 871 * i40e_update_pf_stats - Update the PF statistics counters. 872 * @pf: the PF to be updated 873 **/ 874 static void i40e_update_pf_stats(struct i40e_pf *pf) 875 { 876 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 877 struct i40e_hw_port_stats *nsd = &pf->stats; 878 struct i40e_hw *hw = &pf->hw; 879 u32 val; 880 int i; 881 882 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 883 I40E_GLPRT_GORCL(hw->port), 884 pf->stat_offsets_loaded, 885 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 886 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 887 I40E_GLPRT_GOTCL(hw->port), 888 pf->stat_offsets_loaded, 889 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 890 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 891 pf->stat_offsets_loaded, 892 &osd->eth.rx_discards, 893 &nsd->eth.rx_discards); 894 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 895 I40E_GLPRT_UPRCL(hw->port), 896 pf->stat_offsets_loaded, 897 &osd->eth.rx_unicast, 898 &nsd->eth.rx_unicast); 899 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 900 I40E_GLPRT_MPRCL(hw->port), 901 pf->stat_offsets_loaded, 902 &osd->eth.rx_multicast, 903 &nsd->eth.rx_multicast); 904 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 905 I40E_GLPRT_BPRCL(hw->port), 906 pf->stat_offsets_loaded, 907 &osd->eth.rx_broadcast, 908 &nsd->eth.rx_broadcast); 909 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 910 I40E_GLPRT_UPTCL(hw->port), 911 pf->stat_offsets_loaded, 912 &osd->eth.tx_unicast, 913 &nsd->eth.tx_unicast); 914 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 915 I40E_GLPRT_MPTCL(hw->port), 916 pf->stat_offsets_loaded, 917 &osd->eth.tx_multicast, 918 &nsd->eth.tx_multicast); 919 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 920 I40E_GLPRT_BPTCL(hw->port), 921 pf->stat_offsets_loaded, 922 &osd->eth.tx_broadcast, 923 &nsd->eth.tx_broadcast); 924 925 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 926 pf->stat_offsets_loaded, 927 &osd->tx_dropped_link_down, 928 &nsd->tx_dropped_link_down); 929 930 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 931 pf->stat_offsets_loaded, 932 &osd->crc_errors, &nsd->crc_errors); 933 934 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 935 pf->stat_offsets_loaded, 936 &osd->illegal_bytes, &nsd->illegal_bytes); 937 938 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 939 pf->stat_offsets_loaded, 940 &osd->mac_local_faults, 941 &nsd->mac_local_faults); 942 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 943 pf->stat_offsets_loaded, 944 &osd->mac_remote_faults, 945 &nsd->mac_remote_faults); 946 947 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 948 pf->stat_offsets_loaded, 949 &osd->rx_length_errors, 950 &nsd->rx_length_errors); 951 952 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 953 pf->stat_offsets_loaded, 954 &osd->link_xon_rx, &nsd->link_xon_rx); 955 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 956 pf->stat_offsets_loaded, 957 &osd->link_xon_tx, &nsd->link_xon_tx); 958 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 959 pf->stat_offsets_loaded, 960 &osd->link_xoff_rx, &nsd->link_xoff_rx); 961 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 962 pf->stat_offsets_loaded, 963 &osd->link_xoff_tx, &nsd->link_xoff_tx); 964 965 for (i = 0; i < 8; i++) { 966 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 967 pf->stat_offsets_loaded, 968 &osd->priority_xoff_rx[i], 969 &nsd->priority_xoff_rx[i]); 970 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 971 pf->stat_offsets_loaded, 972 &osd->priority_xon_rx[i], 973 &nsd->priority_xon_rx[i]); 974 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 975 pf->stat_offsets_loaded, 976 &osd->priority_xon_tx[i], 977 &nsd->priority_xon_tx[i]); 978 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 979 pf->stat_offsets_loaded, 980 &osd->priority_xoff_tx[i], 981 &nsd->priority_xoff_tx[i]); 982 i40e_stat_update32(hw, 983 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 984 pf->stat_offsets_loaded, 985 &osd->priority_xon_2_xoff[i], 986 &nsd->priority_xon_2_xoff[i]); 987 } 988 989 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 990 I40E_GLPRT_PRC64L(hw->port), 991 pf->stat_offsets_loaded, 992 &osd->rx_size_64, &nsd->rx_size_64); 993 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 994 I40E_GLPRT_PRC127L(hw->port), 995 pf->stat_offsets_loaded, 996 &osd->rx_size_127, &nsd->rx_size_127); 997 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 998 I40E_GLPRT_PRC255L(hw->port), 999 pf->stat_offsets_loaded, 1000 &osd->rx_size_255, &nsd->rx_size_255); 1001 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1002 I40E_GLPRT_PRC511L(hw->port), 1003 pf->stat_offsets_loaded, 1004 &osd->rx_size_511, &nsd->rx_size_511); 1005 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1006 I40E_GLPRT_PRC1023L(hw->port), 1007 pf->stat_offsets_loaded, 1008 &osd->rx_size_1023, &nsd->rx_size_1023); 1009 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1010 I40E_GLPRT_PRC1522L(hw->port), 1011 pf->stat_offsets_loaded, 1012 &osd->rx_size_1522, &nsd->rx_size_1522); 1013 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1014 I40E_GLPRT_PRC9522L(hw->port), 1015 pf->stat_offsets_loaded, 1016 &osd->rx_size_big, &nsd->rx_size_big); 1017 1018 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1019 I40E_GLPRT_PTC64L(hw->port), 1020 pf->stat_offsets_loaded, 1021 &osd->tx_size_64, &nsd->tx_size_64); 1022 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1023 I40E_GLPRT_PTC127L(hw->port), 1024 pf->stat_offsets_loaded, 1025 &osd->tx_size_127, &nsd->tx_size_127); 1026 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1027 I40E_GLPRT_PTC255L(hw->port), 1028 pf->stat_offsets_loaded, 1029 &osd->tx_size_255, &nsd->tx_size_255); 1030 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1031 I40E_GLPRT_PTC511L(hw->port), 1032 pf->stat_offsets_loaded, 1033 &osd->tx_size_511, &nsd->tx_size_511); 1034 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1035 I40E_GLPRT_PTC1023L(hw->port), 1036 pf->stat_offsets_loaded, 1037 &osd->tx_size_1023, &nsd->tx_size_1023); 1038 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1039 I40E_GLPRT_PTC1522L(hw->port), 1040 pf->stat_offsets_loaded, 1041 &osd->tx_size_1522, &nsd->tx_size_1522); 1042 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1043 I40E_GLPRT_PTC9522L(hw->port), 1044 pf->stat_offsets_loaded, 1045 &osd->tx_size_big, &nsd->tx_size_big); 1046 1047 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1048 pf->stat_offsets_loaded, 1049 &osd->rx_undersize, &nsd->rx_undersize); 1050 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1051 pf->stat_offsets_loaded, 1052 &osd->rx_fragments, &nsd->rx_fragments); 1053 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1054 pf->stat_offsets_loaded, 1055 &osd->rx_oversize, &nsd->rx_oversize); 1056 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1057 pf->stat_offsets_loaded, 1058 &osd->rx_jabber, &nsd->rx_jabber); 1059 1060 /* FDIR stats */ 1061 i40e_stat_update_and_clear32(hw, 1062 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)), 1063 &nsd->fd_atr_match); 1064 i40e_stat_update_and_clear32(hw, 1065 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)), 1066 &nsd->fd_sb_match); 1067 i40e_stat_update_and_clear32(hw, 1068 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)), 1069 &nsd->fd_atr_tunnel_match); 1070 1071 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1072 nsd->tx_lpi_status = 1073 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1074 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1075 nsd->rx_lpi_status = 1076 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1077 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1078 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1079 pf->stat_offsets_loaded, 1080 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1081 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1082 pf->stat_offsets_loaded, 1083 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1084 1085 if (pf->flags & I40E_FLAG_FD_SB_ENABLED && 1086 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 1087 nsd->fd_sb_status = true; 1088 else 1089 nsd->fd_sb_status = false; 1090 1091 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && 1092 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) 1093 nsd->fd_atr_status = true; 1094 else 1095 nsd->fd_atr_status = false; 1096 1097 pf->stat_offsets_loaded = true; 1098 } 1099 1100 /** 1101 * i40e_update_stats - Update the various statistics counters. 1102 * @vsi: the VSI to be updated 1103 * 1104 * Update the various stats for this VSI and its related entities. 1105 **/ 1106 void i40e_update_stats(struct i40e_vsi *vsi) 1107 { 1108 struct i40e_pf *pf = vsi->back; 1109 1110 if (vsi == pf->vsi[pf->lan_vsi]) 1111 i40e_update_pf_stats(pf); 1112 1113 i40e_update_vsi_stats(vsi); 1114 } 1115 1116 /** 1117 * i40e_count_filters - counts VSI mac filters 1118 * @vsi: the VSI to be searched 1119 * 1120 * Returns count of mac filters 1121 **/ 1122 int i40e_count_filters(struct i40e_vsi *vsi) 1123 { 1124 struct i40e_mac_filter *f; 1125 struct hlist_node *h; 1126 int bkt; 1127 int cnt = 0; 1128 1129 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) 1130 ++cnt; 1131 1132 return cnt; 1133 } 1134 1135 /** 1136 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1137 * @vsi: the VSI to be searched 1138 * @macaddr: the MAC address 1139 * @vlan: the vlan 1140 * 1141 * Returns ptr to the filter object or NULL 1142 **/ 1143 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1144 const u8 *macaddr, s16 vlan) 1145 { 1146 struct i40e_mac_filter *f; 1147 u64 key; 1148 1149 if (!vsi || !macaddr) 1150 return NULL; 1151 1152 key = i40e_addr_to_hkey(macaddr); 1153 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1154 if ((ether_addr_equal(macaddr, f->macaddr)) && 1155 (vlan == f->vlan)) 1156 return f; 1157 } 1158 return NULL; 1159 } 1160 1161 /** 1162 * i40e_find_mac - Find a mac addr in the macvlan filters list 1163 * @vsi: the VSI to be searched 1164 * @macaddr: the MAC address we are searching for 1165 * 1166 * Returns the first filter with the provided MAC address or NULL if 1167 * MAC address was not found 1168 **/ 1169 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr) 1170 { 1171 struct i40e_mac_filter *f; 1172 u64 key; 1173 1174 if (!vsi || !macaddr) 1175 return NULL; 1176 1177 key = i40e_addr_to_hkey(macaddr); 1178 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1179 if ((ether_addr_equal(macaddr, f->macaddr))) 1180 return f; 1181 } 1182 return NULL; 1183 } 1184 1185 /** 1186 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1187 * @vsi: the VSI to be searched 1188 * 1189 * Returns true if VSI is in vlan mode or false otherwise 1190 **/ 1191 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1192 { 1193 /* If we have a PVID, always operate in VLAN mode */ 1194 if (vsi->info.pvid) 1195 return true; 1196 1197 /* We need to operate in VLAN mode whenever we have any filters with 1198 * a VLAN other than I40E_VLAN_ALL. We could check the table each 1199 * time, incurring search cost repeatedly. However, we can notice two 1200 * things: 1201 * 1202 * 1) the only place where we can gain a VLAN filter is in 1203 * i40e_add_filter. 1204 * 1205 * 2) the only place where filters are actually removed is in 1206 * i40e_sync_filters_subtask. 1207 * 1208 * Thus, we can simply use a boolean value, has_vlan_filters which we 1209 * will set to true when we add a VLAN filter in i40e_add_filter. Then 1210 * we have to perform the full search after deleting filters in 1211 * i40e_sync_filters_subtask, but we already have to search 1212 * filters here and can perform the check at the same time. This 1213 * results in avoiding embedding a loop for VLAN mode inside another 1214 * loop over all the filters, and should maintain correctness as noted 1215 * above. 1216 */ 1217 return vsi->has_vlan_filter; 1218 } 1219 1220 /** 1221 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary 1222 * @vsi: the VSI to configure 1223 * @tmp_add_list: list of filters ready to be added 1224 * @tmp_del_list: list of filters ready to be deleted 1225 * @vlan_filters: the number of active VLAN filters 1226 * 1227 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they 1228 * behave as expected. If we have any active VLAN filters remaining or about 1229 * to be added then we need to update non-VLAN filters to be marked as VLAN=0 1230 * so that they only match against untagged traffic. If we no longer have any 1231 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1 1232 * so that they match against both tagged and untagged traffic. In this way, 1233 * we ensure that we correctly receive the desired traffic. This ensures that 1234 * when we have an active VLAN we will receive only untagged traffic and 1235 * traffic matching active VLANs. If we have no active VLANs then we will 1236 * operate in non-VLAN mode and receive all traffic, tagged or untagged. 1237 * 1238 * Finally, in a similar fashion, this function also corrects filters when 1239 * there is an active PVID assigned to this VSI. 1240 * 1241 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0. 1242 * 1243 * This function is only expected to be called from within 1244 * i40e_sync_vsi_filters. 1245 * 1246 * NOTE: This function expects to be called while under the 1247 * mac_filter_hash_lock 1248 */ 1249 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi, 1250 struct hlist_head *tmp_add_list, 1251 struct hlist_head *tmp_del_list, 1252 int vlan_filters) 1253 { 1254 s16 pvid = le16_to_cpu(vsi->info.pvid); 1255 struct i40e_mac_filter *f, *add_head; 1256 struct i40e_new_mac_filter *new; 1257 struct hlist_node *h; 1258 int bkt, new_vlan; 1259 1260 /* To determine if a particular filter needs to be replaced we 1261 * have the three following conditions: 1262 * 1263 * a) if we have a PVID assigned, then all filters which are 1264 * not marked as VLAN=PVID must be replaced with filters that 1265 * are. 1266 * b) otherwise, if we have any active VLANS, all filters 1267 * which are marked as VLAN=-1 must be replaced with 1268 * filters marked as VLAN=0 1269 * c) finally, if we do not have any active VLANS, all filters 1270 * which are marked as VLAN=0 must be replaced with filters 1271 * marked as VLAN=-1 1272 */ 1273 1274 /* Update the filters about to be added in place */ 1275 hlist_for_each_entry(new, tmp_add_list, hlist) { 1276 if (pvid && new->f->vlan != pvid) 1277 new->f->vlan = pvid; 1278 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY) 1279 new->f->vlan = 0; 1280 else if (!vlan_filters && new->f->vlan == 0) 1281 new->f->vlan = I40E_VLAN_ANY; 1282 } 1283 1284 /* Update the remaining active filters */ 1285 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1286 /* Combine the checks for whether a filter needs to be changed 1287 * and then determine the new VLAN inside the if block, in 1288 * order to avoid duplicating code for adding the new filter 1289 * then deleting the old filter. 1290 */ 1291 if ((pvid && f->vlan != pvid) || 1292 (vlan_filters && f->vlan == I40E_VLAN_ANY) || 1293 (!vlan_filters && f->vlan == 0)) { 1294 /* Determine the new vlan we will be adding */ 1295 if (pvid) 1296 new_vlan = pvid; 1297 else if (vlan_filters) 1298 new_vlan = 0; 1299 else 1300 new_vlan = I40E_VLAN_ANY; 1301 1302 /* Create the new filter */ 1303 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan); 1304 if (!add_head) 1305 return -ENOMEM; 1306 1307 /* Create a temporary i40e_new_mac_filter */ 1308 new = kzalloc(sizeof(*new), GFP_ATOMIC); 1309 if (!new) 1310 return -ENOMEM; 1311 1312 new->f = add_head; 1313 new->state = add_head->state; 1314 1315 /* Add the new filter to the tmp list */ 1316 hlist_add_head(&new->hlist, tmp_add_list); 1317 1318 /* Put the original filter into the delete list */ 1319 f->state = I40E_FILTER_REMOVE; 1320 hash_del(&f->hlist); 1321 hlist_add_head(&f->hlist, tmp_del_list); 1322 } 1323 } 1324 1325 vsi->has_vlan_filter = !!vlan_filters; 1326 1327 return 0; 1328 } 1329 1330 /** 1331 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1332 * @vsi: the PF Main VSI - inappropriate for any other VSI 1333 * @macaddr: the MAC address 1334 * 1335 * Remove whatever filter the firmware set up so the driver can manage 1336 * its own filtering intelligently. 1337 **/ 1338 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1339 { 1340 struct i40e_aqc_remove_macvlan_element_data element; 1341 struct i40e_pf *pf = vsi->back; 1342 1343 /* Only appropriate for the PF main VSI */ 1344 if (vsi->type != I40E_VSI_MAIN) 1345 return; 1346 1347 memset(&element, 0, sizeof(element)); 1348 ether_addr_copy(element.mac_addr, macaddr); 1349 element.vlan_tag = 0; 1350 /* Ignore error returns, some firmware does it this way... */ 1351 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1352 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1353 1354 memset(&element, 0, sizeof(element)); 1355 ether_addr_copy(element.mac_addr, macaddr); 1356 element.vlan_tag = 0; 1357 /* ...and some firmware does it this way. */ 1358 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1359 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1360 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1361 } 1362 1363 /** 1364 * i40e_add_filter - Add a mac/vlan filter to the VSI 1365 * @vsi: the VSI to be searched 1366 * @macaddr: the MAC address 1367 * @vlan: the vlan 1368 * 1369 * Returns ptr to the filter object or NULL when no memory available. 1370 * 1371 * NOTE: This function is expected to be called with mac_filter_hash_lock 1372 * being held. 1373 **/ 1374 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1375 const u8 *macaddr, s16 vlan) 1376 { 1377 struct i40e_mac_filter *f; 1378 u64 key; 1379 1380 if (!vsi || !macaddr) 1381 return NULL; 1382 1383 f = i40e_find_filter(vsi, macaddr, vlan); 1384 if (!f) { 1385 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1386 if (!f) 1387 return NULL; 1388 1389 /* Update the boolean indicating if we need to function in 1390 * VLAN mode. 1391 */ 1392 if (vlan >= 0) 1393 vsi->has_vlan_filter = true; 1394 1395 ether_addr_copy(f->macaddr, macaddr); 1396 f->vlan = vlan; 1397 f->state = I40E_FILTER_NEW; 1398 INIT_HLIST_NODE(&f->hlist); 1399 1400 key = i40e_addr_to_hkey(macaddr); 1401 hash_add(vsi->mac_filter_hash, &f->hlist, key); 1402 1403 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1404 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state); 1405 } 1406 1407 /* If we're asked to add a filter that has been marked for removal, it 1408 * is safe to simply restore it to active state. __i40e_del_filter 1409 * will have simply deleted any filters which were previously marked 1410 * NEW or FAILED, so if it is currently marked REMOVE it must have 1411 * previously been ACTIVE. Since we haven't yet run the sync filters 1412 * task, just restore this filter to the ACTIVE state so that the 1413 * sync task leaves it in place 1414 */ 1415 if (f->state == I40E_FILTER_REMOVE) 1416 f->state = I40E_FILTER_ACTIVE; 1417 1418 return f; 1419 } 1420 1421 /** 1422 * __i40e_del_filter - Remove a specific filter from the VSI 1423 * @vsi: VSI to remove from 1424 * @f: the filter to remove from the list 1425 * 1426 * This function should be called instead of i40e_del_filter only if you know 1427 * the exact filter you will remove already, such as via i40e_find_filter or 1428 * i40e_find_mac. 1429 * 1430 * NOTE: This function is expected to be called with mac_filter_hash_lock 1431 * being held. 1432 * ANOTHER NOTE: This function MUST be called from within the context of 1433 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1434 * instead of list_for_each_entry(). 1435 **/ 1436 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f) 1437 { 1438 if (!f) 1439 return; 1440 1441 /* If the filter was never added to firmware then we can just delete it 1442 * directly and we don't want to set the status to remove or else an 1443 * admin queue command will unnecessarily fire. 1444 */ 1445 if ((f->state == I40E_FILTER_FAILED) || 1446 (f->state == I40E_FILTER_NEW)) { 1447 hash_del(&f->hlist); 1448 kfree(f); 1449 } else { 1450 f->state = I40E_FILTER_REMOVE; 1451 } 1452 1453 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1454 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state); 1455 } 1456 1457 /** 1458 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI 1459 * @vsi: the VSI to be searched 1460 * @macaddr: the MAC address 1461 * @vlan: the VLAN 1462 * 1463 * NOTE: This function is expected to be called with mac_filter_hash_lock 1464 * being held. 1465 * ANOTHER NOTE: This function MUST be called from within the context of 1466 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1467 * instead of list_for_each_entry(). 1468 **/ 1469 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan) 1470 { 1471 struct i40e_mac_filter *f; 1472 1473 if (!vsi || !macaddr) 1474 return; 1475 1476 f = i40e_find_filter(vsi, macaddr, vlan); 1477 __i40e_del_filter(vsi, f); 1478 } 1479 1480 /** 1481 * i40e_add_mac_filter - Add a MAC filter for all active VLANs 1482 * @vsi: the VSI to be searched 1483 * @macaddr: the mac address to be filtered 1484 * 1485 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise, 1486 * go through all the macvlan filters and add a macvlan filter for each 1487 * unique vlan that already exists. If a PVID has been assigned, instead only 1488 * add the macaddr to that VLAN. 1489 * 1490 * Returns last filter added on success, else NULL 1491 **/ 1492 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, 1493 const u8 *macaddr) 1494 { 1495 struct i40e_mac_filter *f, *add = NULL; 1496 struct hlist_node *h; 1497 int bkt; 1498 1499 if (vsi->info.pvid) 1500 return i40e_add_filter(vsi, macaddr, 1501 le16_to_cpu(vsi->info.pvid)); 1502 1503 if (!i40e_is_vsi_in_vlan(vsi)) 1504 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY); 1505 1506 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1507 if (f->state == I40E_FILTER_REMOVE) 1508 continue; 1509 add = i40e_add_filter(vsi, macaddr, f->vlan); 1510 if (!add) 1511 return NULL; 1512 } 1513 1514 return add; 1515 } 1516 1517 /** 1518 * i40e_del_mac_filter - Remove a MAC filter from all VLANs 1519 * @vsi: the VSI to be searched 1520 * @macaddr: the mac address to be removed 1521 * 1522 * Removes a given MAC address from a VSI regardless of what VLAN it has been 1523 * associated with. 1524 * 1525 * Returns 0 for success, or error 1526 **/ 1527 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr) 1528 { 1529 struct i40e_mac_filter *f; 1530 struct hlist_node *h; 1531 bool found = false; 1532 int bkt; 1533 1534 lockdep_assert_held(&vsi->mac_filter_hash_lock); 1535 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1536 if (ether_addr_equal(macaddr, f->macaddr)) { 1537 __i40e_del_filter(vsi, f); 1538 found = true; 1539 } 1540 } 1541 1542 if (found) 1543 return 0; 1544 else 1545 return -ENOENT; 1546 } 1547 1548 /** 1549 * i40e_set_mac - NDO callback to set mac address 1550 * @netdev: network interface device structure 1551 * @p: pointer to an address structure 1552 * 1553 * Returns 0 on success, negative on failure 1554 **/ 1555 static int i40e_set_mac(struct net_device *netdev, void *p) 1556 { 1557 struct i40e_netdev_priv *np = netdev_priv(netdev); 1558 struct i40e_vsi *vsi = np->vsi; 1559 struct i40e_pf *pf = vsi->back; 1560 struct i40e_hw *hw = &pf->hw; 1561 struct sockaddr *addr = p; 1562 1563 if (!is_valid_ether_addr(addr->sa_data)) 1564 return -EADDRNOTAVAIL; 1565 1566 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1567 netdev_info(netdev, "already using mac address %pM\n", 1568 addr->sa_data); 1569 return 0; 1570 } 1571 1572 if (test_bit(__I40E_DOWN, pf->state) || 1573 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 1574 return -EADDRNOTAVAIL; 1575 1576 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1577 netdev_info(netdev, "returning to hw mac address %pM\n", 1578 hw->mac.addr); 1579 else 1580 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1581 1582 /* Copy the address first, so that we avoid a possible race with 1583 * .set_rx_mode(). 1584 * - Remove old address from MAC filter 1585 * - Copy new address 1586 * - Add new address to MAC filter 1587 */ 1588 spin_lock_bh(&vsi->mac_filter_hash_lock); 1589 i40e_del_mac_filter(vsi, netdev->dev_addr); 1590 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1591 i40e_add_mac_filter(vsi, netdev->dev_addr); 1592 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1593 1594 if (vsi->type == I40E_VSI_MAIN) { 1595 i40e_status ret; 1596 1597 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL, 1598 addr->sa_data, NULL); 1599 if (ret) 1600 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n", 1601 i40e_stat_str(hw, ret), 1602 i40e_aq_str(hw, hw->aq.asq_last_status)); 1603 } 1604 1605 /* schedule our worker thread which will take care of 1606 * applying the new filter changes 1607 */ 1608 i40e_service_event_schedule(pf); 1609 return 0; 1610 } 1611 1612 /** 1613 * i40e_config_rss_aq - Prepare for RSS using AQ commands 1614 * @vsi: vsi structure 1615 * @seed: RSS hash seed 1616 * @lut: pointer to lookup table of lut_size 1617 * @lut_size: size of the lookup table 1618 **/ 1619 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 1620 u8 *lut, u16 lut_size) 1621 { 1622 struct i40e_pf *pf = vsi->back; 1623 struct i40e_hw *hw = &pf->hw; 1624 int ret = 0; 1625 1626 if (seed) { 1627 struct i40e_aqc_get_set_rss_key_data *seed_dw = 1628 (struct i40e_aqc_get_set_rss_key_data *)seed; 1629 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw); 1630 if (ret) { 1631 dev_info(&pf->pdev->dev, 1632 "Cannot set RSS key, err %s aq_err %s\n", 1633 i40e_stat_str(hw, ret), 1634 i40e_aq_str(hw, hw->aq.asq_last_status)); 1635 return ret; 1636 } 1637 } 1638 if (lut) { 1639 bool pf_lut = vsi->type == I40E_VSI_MAIN; 1640 1641 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 1642 if (ret) { 1643 dev_info(&pf->pdev->dev, 1644 "Cannot set RSS lut, err %s aq_err %s\n", 1645 i40e_stat_str(hw, ret), 1646 i40e_aq_str(hw, hw->aq.asq_last_status)); 1647 return ret; 1648 } 1649 } 1650 return ret; 1651 } 1652 1653 /** 1654 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used 1655 * @vsi: VSI structure 1656 **/ 1657 static int i40e_vsi_config_rss(struct i40e_vsi *vsi) 1658 { 1659 struct i40e_pf *pf = vsi->back; 1660 u8 seed[I40E_HKEY_ARRAY_SIZE]; 1661 u8 *lut; 1662 int ret; 1663 1664 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)) 1665 return 0; 1666 if (!vsi->rss_size) 1667 vsi->rss_size = min_t(int, pf->alloc_rss_size, 1668 vsi->num_queue_pairs); 1669 if (!vsi->rss_size) 1670 return -EINVAL; 1671 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1672 if (!lut) 1673 return -ENOMEM; 1674 1675 /* Use the user configured hash keys and lookup table if there is one, 1676 * otherwise use default 1677 */ 1678 if (vsi->rss_lut_user) 1679 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1680 else 1681 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 1682 if (vsi->rss_hkey_user) 1683 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 1684 else 1685 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 1686 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size); 1687 kfree(lut); 1688 return ret; 1689 } 1690 1691 /** 1692 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config 1693 * @vsi: the VSI being configured, 1694 * @ctxt: VSI context structure 1695 * @enabled_tc: number of traffic classes to enable 1696 * 1697 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 1698 **/ 1699 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi, 1700 struct i40e_vsi_context *ctxt, 1701 u8 enabled_tc) 1702 { 1703 u16 qcount = 0, max_qcount, qmap, sections = 0; 1704 int i, override_q, pow, num_qps, ret; 1705 u8 netdev_tc = 0, offset = 0; 1706 1707 if (vsi->type != I40E_VSI_MAIN) 1708 return -EINVAL; 1709 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1710 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1711 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc; 1712 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1713 num_qps = vsi->mqprio_qopt.qopt.count[0]; 1714 1715 /* find the next higher power-of-2 of num queue pairs */ 1716 pow = ilog2(num_qps); 1717 if (!is_power_of_2(num_qps)) 1718 pow++; 1719 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1720 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1721 1722 /* Setup queue offset/count for all TCs for given VSI */ 1723 max_qcount = vsi->mqprio_qopt.qopt.count[0]; 1724 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1725 /* See if the given TC is enabled for the given VSI */ 1726 if (vsi->tc_config.enabled_tc & BIT(i)) { 1727 offset = vsi->mqprio_qopt.qopt.offset[i]; 1728 qcount = vsi->mqprio_qopt.qopt.count[i]; 1729 if (qcount > max_qcount) 1730 max_qcount = qcount; 1731 vsi->tc_config.tc_info[i].qoffset = offset; 1732 vsi->tc_config.tc_info[i].qcount = qcount; 1733 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1734 } else { 1735 /* TC is not enabled so set the offset to 1736 * default queue and allocate one queue 1737 * for the given TC. 1738 */ 1739 vsi->tc_config.tc_info[i].qoffset = 0; 1740 vsi->tc_config.tc_info[i].qcount = 1; 1741 vsi->tc_config.tc_info[i].netdev_tc = 0; 1742 } 1743 } 1744 1745 /* Set actual Tx/Rx queue pairs */ 1746 vsi->num_queue_pairs = offset + qcount; 1747 1748 /* Setup queue TC[0].qmap for given VSI context */ 1749 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1750 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1751 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1752 ctxt->info.valid_sections |= cpu_to_le16(sections); 1753 1754 /* Reconfigure RSS for main VSI with max queue count */ 1755 vsi->rss_size = max_qcount; 1756 ret = i40e_vsi_config_rss(vsi); 1757 if (ret) { 1758 dev_info(&vsi->back->pdev->dev, 1759 "Failed to reconfig rss for num_queues (%u)\n", 1760 max_qcount); 1761 return ret; 1762 } 1763 vsi->reconfig_rss = true; 1764 dev_dbg(&vsi->back->pdev->dev, 1765 "Reconfigured rss with num_queues (%u)\n", max_qcount); 1766 1767 /* Find queue count available for channel VSIs and starting offset 1768 * for channel VSIs 1769 */ 1770 override_q = vsi->mqprio_qopt.qopt.count[0]; 1771 if (override_q && override_q < vsi->num_queue_pairs) { 1772 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q; 1773 vsi->next_base_queue = override_q; 1774 } 1775 return 0; 1776 } 1777 1778 /** 1779 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1780 * @vsi: the VSI being setup 1781 * @ctxt: VSI context structure 1782 * @enabled_tc: Enabled TCs bitmap 1783 * @is_add: True if called before Add VSI 1784 * 1785 * Setup VSI queue mapping for enabled traffic classes. 1786 **/ 1787 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1788 struct i40e_vsi_context *ctxt, 1789 u8 enabled_tc, 1790 bool is_add) 1791 { 1792 struct i40e_pf *pf = vsi->back; 1793 u16 sections = 0; 1794 u8 netdev_tc = 0; 1795 u16 numtc = 1; 1796 u16 qcount; 1797 u8 offset; 1798 u16 qmap; 1799 int i; 1800 u16 num_tc_qps = 0; 1801 1802 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1803 offset = 0; 1804 1805 /* Number of queues per enabled TC */ 1806 num_tc_qps = vsi->alloc_queue_pairs; 1807 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1808 /* Find numtc from enabled TC bitmap */ 1809 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1810 if (enabled_tc & BIT(i)) /* TC is enabled */ 1811 numtc++; 1812 } 1813 if (!numtc) { 1814 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1815 numtc = 1; 1816 } 1817 num_tc_qps = num_tc_qps / numtc; 1818 num_tc_qps = min_t(int, num_tc_qps, 1819 i40e_pf_get_max_q_per_tc(pf)); 1820 } 1821 1822 vsi->tc_config.numtc = numtc; 1823 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1824 1825 /* Do not allow use more TC queue pairs than MSI-X vectors exist */ 1826 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1827 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix); 1828 1829 /* Setup queue offset/count for all TCs for given VSI */ 1830 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1831 /* See if the given TC is enabled for the given VSI */ 1832 if (vsi->tc_config.enabled_tc & BIT(i)) { 1833 /* TC is enabled */ 1834 int pow, num_qps; 1835 1836 switch (vsi->type) { 1837 case I40E_VSI_MAIN: 1838 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | 1839 I40E_FLAG_FD_ATR_ENABLED)) || 1840 vsi->tc_config.enabled_tc != 1) { 1841 qcount = min_t(int, pf->alloc_rss_size, 1842 num_tc_qps); 1843 break; 1844 } 1845 fallthrough; 1846 case I40E_VSI_FDIR: 1847 case I40E_VSI_SRIOV: 1848 case I40E_VSI_VMDQ2: 1849 default: 1850 qcount = num_tc_qps; 1851 WARN_ON(i != 0); 1852 break; 1853 } 1854 vsi->tc_config.tc_info[i].qoffset = offset; 1855 vsi->tc_config.tc_info[i].qcount = qcount; 1856 1857 /* find the next higher power-of-2 of num queue pairs */ 1858 num_qps = qcount; 1859 pow = 0; 1860 while (num_qps && (BIT_ULL(pow) < qcount)) { 1861 pow++; 1862 num_qps >>= 1; 1863 } 1864 1865 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1866 qmap = 1867 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1868 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1869 1870 offset += qcount; 1871 } else { 1872 /* TC is not enabled so set the offset to 1873 * default queue and allocate one queue 1874 * for the given TC. 1875 */ 1876 vsi->tc_config.tc_info[i].qoffset = 0; 1877 vsi->tc_config.tc_info[i].qcount = 1; 1878 vsi->tc_config.tc_info[i].netdev_tc = 0; 1879 1880 qmap = 0; 1881 } 1882 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1883 } 1884 1885 /* Set actual Tx/Rx queue pairs */ 1886 vsi->num_queue_pairs = offset; 1887 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1888 if (vsi->req_queue_pairs > 0) 1889 vsi->num_queue_pairs = vsi->req_queue_pairs; 1890 else if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1891 vsi->num_queue_pairs = pf->num_lan_msix; 1892 } 1893 1894 /* Scheduler section valid can only be set for ADD VSI */ 1895 if (is_add) { 1896 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1897 1898 ctxt->info.up_enable_bits = enabled_tc; 1899 } 1900 if (vsi->type == I40E_VSI_SRIOV) { 1901 ctxt->info.mapping_flags |= 1902 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1903 for (i = 0; i < vsi->num_queue_pairs; i++) 1904 ctxt->info.queue_mapping[i] = 1905 cpu_to_le16(vsi->base_queue + i); 1906 } else { 1907 ctxt->info.mapping_flags |= 1908 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1909 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1910 } 1911 ctxt->info.valid_sections |= cpu_to_le16(sections); 1912 } 1913 1914 /** 1915 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address 1916 * @netdev: the netdevice 1917 * @addr: address to add 1918 * 1919 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call 1920 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1921 */ 1922 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr) 1923 { 1924 struct i40e_netdev_priv *np = netdev_priv(netdev); 1925 struct i40e_vsi *vsi = np->vsi; 1926 1927 if (i40e_add_mac_filter(vsi, addr)) 1928 return 0; 1929 else 1930 return -ENOMEM; 1931 } 1932 1933 /** 1934 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address 1935 * @netdev: the netdevice 1936 * @addr: address to add 1937 * 1938 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call 1939 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1940 */ 1941 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr) 1942 { 1943 struct i40e_netdev_priv *np = netdev_priv(netdev); 1944 struct i40e_vsi *vsi = np->vsi; 1945 1946 /* Under some circumstances, we might receive a request to delete 1947 * our own device address from our uc list. Because we store the 1948 * device address in the VSI's MAC/VLAN filter list, we need to ignore 1949 * such requests and not delete our device address from this list. 1950 */ 1951 if (ether_addr_equal(addr, netdev->dev_addr)) 1952 return 0; 1953 1954 i40e_del_mac_filter(vsi, addr); 1955 1956 return 0; 1957 } 1958 1959 /** 1960 * i40e_set_rx_mode - NDO callback to set the netdev filters 1961 * @netdev: network interface device structure 1962 **/ 1963 static void i40e_set_rx_mode(struct net_device *netdev) 1964 { 1965 struct i40e_netdev_priv *np = netdev_priv(netdev); 1966 struct i40e_vsi *vsi = np->vsi; 1967 1968 spin_lock_bh(&vsi->mac_filter_hash_lock); 1969 1970 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1971 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1972 1973 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1974 1975 /* check for other flag changes */ 1976 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1977 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1978 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state); 1979 } 1980 } 1981 1982 /** 1983 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries 1984 * @vsi: Pointer to VSI struct 1985 * @from: Pointer to list which contains MAC filter entries - changes to 1986 * those entries needs to be undone. 1987 * 1988 * MAC filter entries from this list were slated for deletion. 1989 **/ 1990 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi, 1991 struct hlist_head *from) 1992 { 1993 struct i40e_mac_filter *f; 1994 struct hlist_node *h; 1995 1996 hlist_for_each_entry_safe(f, h, from, hlist) { 1997 u64 key = i40e_addr_to_hkey(f->macaddr); 1998 1999 /* Move the element back into MAC filter list*/ 2000 hlist_del(&f->hlist); 2001 hash_add(vsi->mac_filter_hash, &f->hlist, key); 2002 } 2003 } 2004 2005 /** 2006 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries 2007 * @vsi: Pointer to vsi struct 2008 * @from: Pointer to list which contains MAC filter entries - changes to 2009 * those entries needs to be undone. 2010 * 2011 * MAC filter entries from this list were slated for addition. 2012 **/ 2013 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi, 2014 struct hlist_head *from) 2015 { 2016 struct i40e_new_mac_filter *new; 2017 struct hlist_node *h; 2018 2019 hlist_for_each_entry_safe(new, h, from, hlist) { 2020 /* We can simply free the wrapper structure */ 2021 hlist_del(&new->hlist); 2022 kfree(new); 2023 } 2024 } 2025 2026 /** 2027 * i40e_next_filter - Get the next non-broadcast filter from a list 2028 * @next: pointer to filter in list 2029 * 2030 * Returns the next non-broadcast filter in the list. Required so that we 2031 * ignore broadcast filters within the list, since these are not handled via 2032 * the normal firmware update path. 2033 */ 2034 static 2035 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next) 2036 { 2037 hlist_for_each_entry_continue(next, hlist) { 2038 if (!is_broadcast_ether_addr(next->f->macaddr)) 2039 return next; 2040 } 2041 2042 return NULL; 2043 } 2044 2045 /** 2046 * i40e_update_filter_state - Update filter state based on return data 2047 * from firmware 2048 * @count: Number of filters added 2049 * @add_list: return data from fw 2050 * @add_head: pointer to first filter in current batch 2051 * 2052 * MAC filter entries from list were slated to be added to device. Returns 2053 * number of successful filters. Note that 0 does NOT mean success! 2054 **/ 2055 static int 2056 i40e_update_filter_state(int count, 2057 struct i40e_aqc_add_macvlan_element_data *add_list, 2058 struct i40e_new_mac_filter *add_head) 2059 { 2060 int retval = 0; 2061 int i; 2062 2063 for (i = 0; i < count; i++) { 2064 /* Always check status of each filter. We don't need to check 2065 * the firmware return status because we pre-set the filter 2066 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter 2067 * request to the adminq. Thus, if it no longer matches then 2068 * we know the filter is active. 2069 */ 2070 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) { 2071 add_head->state = I40E_FILTER_FAILED; 2072 } else { 2073 add_head->state = I40E_FILTER_ACTIVE; 2074 retval++; 2075 } 2076 2077 add_head = i40e_next_filter(add_head); 2078 if (!add_head) 2079 break; 2080 } 2081 2082 return retval; 2083 } 2084 2085 /** 2086 * i40e_aqc_del_filters - Request firmware to delete a set of filters 2087 * @vsi: ptr to the VSI 2088 * @vsi_name: name to display in messages 2089 * @list: the list of filters to send to firmware 2090 * @num_del: the number of filters to delete 2091 * @retval: Set to -EIO on failure to delete 2092 * 2093 * Send a request to firmware via AdminQ to delete a set of filters. Uses 2094 * *retval instead of a return value so that success does not force ret_val to 2095 * be set to 0. This ensures that a sequence of calls to this function 2096 * preserve the previous value of *retval on successful delete. 2097 */ 2098 static 2099 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name, 2100 struct i40e_aqc_remove_macvlan_element_data *list, 2101 int num_del, int *retval) 2102 { 2103 struct i40e_hw *hw = &vsi->back->hw; 2104 i40e_status aq_ret; 2105 int aq_err; 2106 2107 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL); 2108 aq_err = hw->aq.asq_last_status; 2109 2110 /* Explicitly ignore and do not report when firmware returns ENOENT */ 2111 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) { 2112 *retval = -EIO; 2113 dev_info(&vsi->back->pdev->dev, 2114 "ignoring delete macvlan error on %s, err %s, aq_err %s\n", 2115 vsi_name, i40e_stat_str(hw, aq_ret), 2116 i40e_aq_str(hw, aq_err)); 2117 } 2118 } 2119 2120 /** 2121 * i40e_aqc_add_filters - Request firmware to add a set of filters 2122 * @vsi: ptr to the VSI 2123 * @vsi_name: name to display in messages 2124 * @list: the list of filters to send to firmware 2125 * @add_head: Position in the add hlist 2126 * @num_add: the number of filters to add 2127 * 2128 * Send a request to firmware via AdminQ to add a chunk of filters. Will set 2129 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of 2130 * space for more filters. 2131 */ 2132 static 2133 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name, 2134 struct i40e_aqc_add_macvlan_element_data *list, 2135 struct i40e_new_mac_filter *add_head, 2136 int num_add) 2137 { 2138 struct i40e_hw *hw = &vsi->back->hw; 2139 int aq_err, fcnt; 2140 2141 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL); 2142 aq_err = hw->aq.asq_last_status; 2143 fcnt = i40e_update_filter_state(num_add, list, add_head); 2144 2145 if (fcnt != num_add) { 2146 if (vsi->type == I40E_VSI_MAIN) { 2147 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2148 dev_warn(&vsi->back->pdev->dev, 2149 "Error %s adding RX filters on %s, promiscuous mode forced on\n", 2150 i40e_aq_str(hw, aq_err), vsi_name); 2151 } else if (vsi->type == I40E_VSI_SRIOV || 2152 vsi->type == I40E_VSI_VMDQ1 || 2153 vsi->type == I40E_VSI_VMDQ2) { 2154 dev_warn(&vsi->back->pdev->dev, 2155 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n", 2156 i40e_aq_str(hw, aq_err), vsi_name, vsi_name); 2157 } else { 2158 dev_warn(&vsi->back->pdev->dev, 2159 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n", 2160 i40e_aq_str(hw, aq_err), vsi_name, vsi->type); 2161 } 2162 } 2163 } 2164 2165 /** 2166 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags 2167 * @vsi: pointer to the VSI 2168 * @vsi_name: the VSI name 2169 * @f: filter data 2170 * 2171 * This function sets or clears the promiscuous broadcast flags for VLAN 2172 * filters in order to properly receive broadcast frames. Assumes that only 2173 * broadcast filters are passed. 2174 * 2175 * Returns status indicating success or failure; 2176 **/ 2177 static i40e_status 2178 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name, 2179 struct i40e_mac_filter *f) 2180 { 2181 bool enable = f->state == I40E_FILTER_NEW; 2182 struct i40e_hw *hw = &vsi->back->hw; 2183 i40e_status aq_ret; 2184 2185 if (f->vlan == I40E_VLAN_ANY) { 2186 aq_ret = i40e_aq_set_vsi_broadcast(hw, 2187 vsi->seid, 2188 enable, 2189 NULL); 2190 } else { 2191 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw, 2192 vsi->seid, 2193 enable, 2194 f->vlan, 2195 NULL); 2196 } 2197 2198 if (aq_ret) { 2199 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2200 dev_warn(&vsi->back->pdev->dev, 2201 "Error %s, forcing overflow promiscuous on %s\n", 2202 i40e_aq_str(hw, hw->aq.asq_last_status), 2203 vsi_name); 2204 } 2205 2206 return aq_ret; 2207 } 2208 2209 /** 2210 * i40e_set_promiscuous - set promiscuous mode 2211 * @pf: board private structure 2212 * @promisc: promisc on or off 2213 * 2214 * There are different ways of setting promiscuous mode on a PF depending on 2215 * what state/environment we're in. This identifies and sets it appropriately. 2216 * Returns 0 on success. 2217 **/ 2218 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc) 2219 { 2220 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 2221 struct i40e_hw *hw = &pf->hw; 2222 i40e_status aq_ret; 2223 2224 if (vsi->type == I40E_VSI_MAIN && 2225 pf->lan_veb != I40E_NO_VEB && 2226 !(pf->flags & I40E_FLAG_MFP_ENABLED)) { 2227 /* set defport ON for Main VSI instead of true promisc 2228 * this way we will get all unicast/multicast and VLAN 2229 * promisc behavior but will not get VF or VMDq traffic 2230 * replicated on the Main VSI. 2231 */ 2232 if (promisc) 2233 aq_ret = i40e_aq_set_default_vsi(hw, 2234 vsi->seid, 2235 NULL); 2236 else 2237 aq_ret = i40e_aq_clear_default_vsi(hw, 2238 vsi->seid, 2239 NULL); 2240 if (aq_ret) { 2241 dev_info(&pf->pdev->dev, 2242 "Set default VSI failed, err %s, aq_err %s\n", 2243 i40e_stat_str(hw, aq_ret), 2244 i40e_aq_str(hw, hw->aq.asq_last_status)); 2245 } 2246 } else { 2247 aq_ret = i40e_aq_set_vsi_unicast_promiscuous( 2248 hw, 2249 vsi->seid, 2250 promisc, NULL, 2251 true); 2252 if (aq_ret) { 2253 dev_info(&pf->pdev->dev, 2254 "set unicast promisc failed, err %s, aq_err %s\n", 2255 i40e_stat_str(hw, aq_ret), 2256 i40e_aq_str(hw, hw->aq.asq_last_status)); 2257 } 2258 aq_ret = i40e_aq_set_vsi_multicast_promiscuous( 2259 hw, 2260 vsi->seid, 2261 promisc, NULL); 2262 if (aq_ret) { 2263 dev_info(&pf->pdev->dev, 2264 "set multicast promisc failed, err %s, aq_err %s\n", 2265 i40e_stat_str(hw, aq_ret), 2266 i40e_aq_str(hw, hw->aq.asq_last_status)); 2267 } 2268 } 2269 2270 if (!aq_ret) 2271 pf->cur_promisc = promisc; 2272 2273 return aq_ret; 2274 } 2275 2276 /** 2277 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 2278 * @vsi: ptr to the VSI 2279 * 2280 * Push any outstanding VSI filter changes through the AdminQ. 2281 * 2282 * Returns 0 or error value 2283 **/ 2284 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 2285 { 2286 struct hlist_head tmp_add_list, tmp_del_list; 2287 struct i40e_mac_filter *f; 2288 struct i40e_new_mac_filter *new, *add_head = NULL; 2289 struct i40e_hw *hw = &vsi->back->hw; 2290 bool old_overflow, new_overflow; 2291 unsigned int failed_filters = 0; 2292 unsigned int vlan_filters = 0; 2293 char vsi_name[16] = "PF"; 2294 int filter_list_len = 0; 2295 i40e_status aq_ret = 0; 2296 u32 changed_flags = 0; 2297 struct hlist_node *h; 2298 struct i40e_pf *pf; 2299 int num_add = 0; 2300 int num_del = 0; 2301 int retval = 0; 2302 u16 cmd_flags; 2303 int list_size; 2304 int bkt; 2305 2306 /* empty array typed pointers, kcalloc later */ 2307 struct i40e_aqc_add_macvlan_element_data *add_list; 2308 struct i40e_aqc_remove_macvlan_element_data *del_list; 2309 2310 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state)) 2311 usleep_range(1000, 2000); 2312 pf = vsi->back; 2313 2314 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2315 2316 if (vsi->netdev) { 2317 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 2318 vsi->current_netdev_flags = vsi->netdev->flags; 2319 } 2320 2321 INIT_HLIST_HEAD(&tmp_add_list); 2322 INIT_HLIST_HEAD(&tmp_del_list); 2323 2324 if (vsi->type == I40E_VSI_SRIOV) 2325 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id); 2326 else if (vsi->type != I40E_VSI_MAIN) 2327 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid); 2328 2329 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 2330 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 2331 2332 spin_lock_bh(&vsi->mac_filter_hash_lock); 2333 /* Create a list of filters to delete. */ 2334 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2335 if (f->state == I40E_FILTER_REMOVE) { 2336 /* Move the element into temporary del_list */ 2337 hash_del(&f->hlist); 2338 hlist_add_head(&f->hlist, &tmp_del_list); 2339 2340 /* Avoid counting removed filters */ 2341 continue; 2342 } 2343 if (f->state == I40E_FILTER_NEW) { 2344 /* Create a temporary i40e_new_mac_filter */ 2345 new = kzalloc(sizeof(*new), GFP_ATOMIC); 2346 if (!new) 2347 goto err_no_memory_locked; 2348 2349 /* Store pointer to the real filter */ 2350 new->f = f; 2351 new->state = f->state; 2352 2353 /* Add it to the hash list */ 2354 hlist_add_head(&new->hlist, &tmp_add_list); 2355 } 2356 2357 /* Count the number of active (current and new) VLAN 2358 * filters we have now. Does not count filters which 2359 * are marked for deletion. 2360 */ 2361 if (f->vlan > 0) 2362 vlan_filters++; 2363 } 2364 2365 retval = i40e_correct_mac_vlan_filters(vsi, 2366 &tmp_add_list, 2367 &tmp_del_list, 2368 vlan_filters); 2369 if (retval) 2370 goto err_no_memory_locked; 2371 2372 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2373 } 2374 2375 /* Now process 'del_list' outside the lock */ 2376 if (!hlist_empty(&tmp_del_list)) { 2377 filter_list_len = hw->aq.asq_buf_size / 2378 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2379 list_size = filter_list_len * 2380 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2381 del_list = kzalloc(list_size, GFP_ATOMIC); 2382 if (!del_list) 2383 goto err_no_memory; 2384 2385 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) { 2386 cmd_flags = 0; 2387 2388 /* handle broadcast filters by updating the broadcast 2389 * promiscuous flag and release filter list. 2390 */ 2391 if (is_broadcast_ether_addr(f->macaddr)) { 2392 i40e_aqc_broadcast_filter(vsi, vsi_name, f); 2393 2394 hlist_del(&f->hlist); 2395 kfree(f); 2396 continue; 2397 } 2398 2399 /* add to delete list */ 2400 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 2401 if (f->vlan == I40E_VLAN_ANY) { 2402 del_list[num_del].vlan_tag = 0; 2403 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 2404 } else { 2405 del_list[num_del].vlan_tag = 2406 cpu_to_le16((u16)(f->vlan)); 2407 } 2408 2409 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 2410 del_list[num_del].flags = cmd_flags; 2411 num_del++; 2412 2413 /* flush a full buffer */ 2414 if (num_del == filter_list_len) { 2415 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2416 num_del, &retval); 2417 memset(del_list, 0, list_size); 2418 num_del = 0; 2419 } 2420 /* Release memory for MAC filter entries which were 2421 * synced up with HW. 2422 */ 2423 hlist_del(&f->hlist); 2424 kfree(f); 2425 } 2426 2427 if (num_del) { 2428 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2429 num_del, &retval); 2430 } 2431 2432 kfree(del_list); 2433 del_list = NULL; 2434 } 2435 2436 if (!hlist_empty(&tmp_add_list)) { 2437 /* Do all the adds now. */ 2438 filter_list_len = hw->aq.asq_buf_size / 2439 sizeof(struct i40e_aqc_add_macvlan_element_data); 2440 list_size = filter_list_len * 2441 sizeof(struct i40e_aqc_add_macvlan_element_data); 2442 add_list = kzalloc(list_size, GFP_ATOMIC); 2443 if (!add_list) 2444 goto err_no_memory; 2445 2446 num_add = 0; 2447 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2448 /* handle broadcast filters by updating the broadcast 2449 * promiscuous flag instead of adding a MAC filter. 2450 */ 2451 if (is_broadcast_ether_addr(new->f->macaddr)) { 2452 if (i40e_aqc_broadcast_filter(vsi, vsi_name, 2453 new->f)) 2454 new->state = I40E_FILTER_FAILED; 2455 else 2456 new->state = I40E_FILTER_ACTIVE; 2457 continue; 2458 } 2459 2460 /* add to add array */ 2461 if (num_add == 0) 2462 add_head = new; 2463 cmd_flags = 0; 2464 ether_addr_copy(add_list[num_add].mac_addr, 2465 new->f->macaddr); 2466 if (new->f->vlan == I40E_VLAN_ANY) { 2467 add_list[num_add].vlan_tag = 0; 2468 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; 2469 } else { 2470 add_list[num_add].vlan_tag = 2471 cpu_to_le16((u16)(new->f->vlan)); 2472 } 2473 add_list[num_add].queue_number = 0; 2474 /* set invalid match method for later detection */ 2475 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES; 2476 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 2477 add_list[num_add].flags = cpu_to_le16(cmd_flags); 2478 num_add++; 2479 2480 /* flush a full buffer */ 2481 if (num_add == filter_list_len) { 2482 i40e_aqc_add_filters(vsi, vsi_name, add_list, 2483 add_head, num_add); 2484 memset(add_list, 0, list_size); 2485 num_add = 0; 2486 } 2487 } 2488 if (num_add) { 2489 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head, 2490 num_add); 2491 } 2492 /* Now move all of the filters from the temp add list back to 2493 * the VSI's list. 2494 */ 2495 spin_lock_bh(&vsi->mac_filter_hash_lock); 2496 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2497 /* Only update the state if we're still NEW */ 2498 if (new->f->state == I40E_FILTER_NEW) 2499 new->f->state = new->state; 2500 hlist_del(&new->hlist); 2501 kfree(new); 2502 } 2503 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2504 kfree(add_list); 2505 add_list = NULL; 2506 } 2507 2508 /* Determine the number of active and failed filters. */ 2509 spin_lock_bh(&vsi->mac_filter_hash_lock); 2510 vsi->active_filters = 0; 2511 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) { 2512 if (f->state == I40E_FILTER_ACTIVE) 2513 vsi->active_filters++; 2514 else if (f->state == I40E_FILTER_FAILED) 2515 failed_filters++; 2516 } 2517 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2518 2519 /* Check if we are able to exit overflow promiscuous mode. We can 2520 * safely exit if we didn't just enter, we no longer have any failed 2521 * filters, and we have reduced filters below the threshold value. 2522 */ 2523 if (old_overflow && !failed_filters && 2524 vsi->active_filters < vsi->promisc_threshold) { 2525 dev_info(&pf->pdev->dev, 2526 "filter logjam cleared on %s, leaving overflow promiscuous mode\n", 2527 vsi_name); 2528 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2529 vsi->promisc_threshold = 0; 2530 } 2531 2532 /* if the VF is not trusted do not do promisc */ 2533 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) { 2534 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2535 goto out; 2536 } 2537 2538 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2539 2540 /* If we are entering overflow promiscuous, we need to calculate a new 2541 * threshold for when we are safe to exit 2542 */ 2543 if (!old_overflow && new_overflow) 2544 vsi->promisc_threshold = (vsi->active_filters * 3) / 4; 2545 2546 /* check for changes in promiscuous modes */ 2547 if (changed_flags & IFF_ALLMULTI) { 2548 bool cur_multipromisc; 2549 2550 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 2551 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 2552 vsi->seid, 2553 cur_multipromisc, 2554 NULL); 2555 if (aq_ret) { 2556 retval = i40e_aq_rc_to_posix(aq_ret, 2557 hw->aq.asq_last_status); 2558 dev_info(&pf->pdev->dev, 2559 "set multi promisc failed on %s, err %s aq_err %s\n", 2560 vsi_name, 2561 i40e_stat_str(hw, aq_ret), 2562 i40e_aq_str(hw, hw->aq.asq_last_status)); 2563 } else { 2564 dev_info(&pf->pdev->dev, "%s allmulti mode.\n", 2565 cur_multipromisc ? "entering" : "leaving"); 2566 } 2567 } 2568 2569 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) { 2570 bool cur_promisc; 2571 2572 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 2573 new_overflow); 2574 aq_ret = i40e_set_promiscuous(pf, cur_promisc); 2575 if (aq_ret) { 2576 retval = i40e_aq_rc_to_posix(aq_ret, 2577 hw->aq.asq_last_status); 2578 dev_info(&pf->pdev->dev, 2579 "Setting promiscuous %s failed on %s, err %s aq_err %s\n", 2580 cur_promisc ? "on" : "off", 2581 vsi_name, 2582 i40e_stat_str(hw, aq_ret), 2583 i40e_aq_str(hw, hw->aq.asq_last_status)); 2584 } 2585 } 2586 out: 2587 /* if something went wrong then set the changed flag so we try again */ 2588 if (retval) 2589 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2590 2591 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state); 2592 return retval; 2593 2594 err_no_memory: 2595 /* Restore elements on the temporary add and delete lists */ 2596 spin_lock_bh(&vsi->mac_filter_hash_lock); 2597 err_no_memory_locked: 2598 i40e_undo_del_filter_entries(vsi, &tmp_del_list); 2599 i40e_undo_add_filter_entries(vsi, &tmp_add_list); 2600 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2601 2602 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2603 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state); 2604 return -ENOMEM; 2605 } 2606 2607 /** 2608 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 2609 * @pf: board private structure 2610 **/ 2611 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 2612 { 2613 int v; 2614 2615 if (!pf) 2616 return; 2617 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state)) 2618 return; 2619 if (test_bit(__I40E_VF_DISABLE, pf->state)) { 2620 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state); 2621 return; 2622 } 2623 2624 for (v = 0; v < pf->num_alloc_vsi; v++) { 2625 if (pf->vsi[v] && 2626 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { 2627 int ret = i40e_sync_vsi_filters(pf->vsi[v]); 2628 2629 if (ret) { 2630 /* come back and try again later */ 2631 set_bit(__I40E_MACVLAN_SYNC_PENDING, 2632 pf->state); 2633 break; 2634 } 2635 } 2636 } 2637 } 2638 2639 /** 2640 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP 2641 * @vsi: the vsi 2642 **/ 2643 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi) 2644 { 2645 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) 2646 return I40E_RXBUFFER_2048; 2647 else 2648 return I40E_RXBUFFER_3072; 2649 } 2650 2651 /** 2652 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 2653 * @netdev: network interface device structure 2654 * @new_mtu: new value for maximum frame size 2655 * 2656 * Returns 0 on success, negative on failure 2657 **/ 2658 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 2659 { 2660 struct i40e_netdev_priv *np = netdev_priv(netdev); 2661 struct i40e_vsi *vsi = np->vsi; 2662 struct i40e_pf *pf = vsi->back; 2663 2664 if (i40e_enabled_xdp_vsi(vsi)) { 2665 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 2666 2667 if (frame_size > i40e_max_xdp_frame_size(vsi)) 2668 return -EINVAL; 2669 } 2670 2671 netdev_dbg(netdev, "changing MTU from %d to %d\n", 2672 netdev->mtu, new_mtu); 2673 netdev->mtu = new_mtu; 2674 if (netif_running(netdev)) 2675 i40e_vsi_reinit_locked(vsi); 2676 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state); 2677 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state); 2678 return 0; 2679 } 2680 2681 /** 2682 * i40e_ioctl - Access the hwtstamp interface 2683 * @netdev: network interface device structure 2684 * @ifr: interface request data 2685 * @cmd: ioctl command 2686 **/ 2687 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2688 { 2689 struct i40e_netdev_priv *np = netdev_priv(netdev); 2690 struct i40e_pf *pf = np->vsi->back; 2691 2692 switch (cmd) { 2693 case SIOCGHWTSTAMP: 2694 return i40e_ptp_get_ts_config(pf, ifr); 2695 case SIOCSHWTSTAMP: 2696 return i40e_ptp_set_ts_config(pf, ifr); 2697 default: 2698 return -EOPNOTSUPP; 2699 } 2700 } 2701 2702 /** 2703 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 2704 * @vsi: the vsi being adjusted 2705 **/ 2706 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 2707 { 2708 struct i40e_vsi_context ctxt; 2709 i40e_status ret; 2710 2711 /* Don't modify stripping options if a port VLAN is active */ 2712 if (vsi->info.pvid) 2713 return; 2714 2715 if ((vsi->info.valid_sections & 2716 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2717 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 2718 return; /* already enabled */ 2719 2720 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2721 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2722 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 2723 2724 ctxt.seid = vsi->seid; 2725 ctxt.info = vsi->info; 2726 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2727 if (ret) { 2728 dev_info(&vsi->back->pdev->dev, 2729 "update vlan stripping failed, err %s aq_err %s\n", 2730 i40e_stat_str(&vsi->back->hw, ret), 2731 i40e_aq_str(&vsi->back->hw, 2732 vsi->back->hw.aq.asq_last_status)); 2733 } 2734 } 2735 2736 /** 2737 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2738 * @vsi: the vsi being adjusted 2739 **/ 2740 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2741 { 2742 struct i40e_vsi_context ctxt; 2743 i40e_status ret; 2744 2745 /* Don't modify stripping options if a port VLAN is active */ 2746 if (vsi->info.pvid) 2747 return; 2748 2749 if ((vsi->info.valid_sections & 2750 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2751 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2752 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2753 return; /* already disabled */ 2754 2755 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2756 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2757 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2758 2759 ctxt.seid = vsi->seid; 2760 ctxt.info = vsi->info; 2761 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2762 if (ret) { 2763 dev_info(&vsi->back->pdev->dev, 2764 "update vlan stripping failed, err %s aq_err %s\n", 2765 i40e_stat_str(&vsi->back->hw, ret), 2766 i40e_aq_str(&vsi->back->hw, 2767 vsi->back->hw.aq.asq_last_status)); 2768 } 2769 } 2770 2771 /** 2772 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address 2773 * @vsi: the vsi being configured 2774 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2775 * 2776 * This is a helper function for adding a new MAC/VLAN filter with the 2777 * specified VLAN for each existing MAC address already in the hash table. 2778 * This function does *not* perform any accounting to update filters based on 2779 * VLAN mode. 2780 * 2781 * NOTE: this function expects to be called while under the 2782 * mac_filter_hash_lock 2783 **/ 2784 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2785 { 2786 struct i40e_mac_filter *f, *add_f; 2787 struct hlist_node *h; 2788 int bkt; 2789 2790 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2791 if (f->state == I40E_FILTER_REMOVE) 2792 continue; 2793 add_f = i40e_add_filter(vsi, f->macaddr, vid); 2794 if (!add_f) { 2795 dev_info(&vsi->back->pdev->dev, 2796 "Could not add vlan filter %d for %pM\n", 2797 vid, f->macaddr); 2798 return -ENOMEM; 2799 } 2800 } 2801 2802 return 0; 2803 } 2804 2805 /** 2806 * i40e_vsi_add_vlan - Add VSI membership for given VLAN 2807 * @vsi: the VSI being configured 2808 * @vid: VLAN id to be added 2809 **/ 2810 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid) 2811 { 2812 int err; 2813 2814 if (vsi->info.pvid) 2815 return -EINVAL; 2816 2817 /* The network stack will attempt to add VID=0, with the intention to 2818 * receive priority tagged packets with a VLAN of 0. Our HW receives 2819 * these packets by default when configured to receive untagged 2820 * packets, so we don't need to add a filter for this case. 2821 * Additionally, HW interprets adding a VID=0 filter as meaning to 2822 * receive *only* tagged traffic and stops receiving untagged traffic. 2823 * Thus, we do not want to actually add a filter for VID=0 2824 */ 2825 if (!vid) 2826 return 0; 2827 2828 /* Locked once because all functions invoked below iterates list*/ 2829 spin_lock_bh(&vsi->mac_filter_hash_lock); 2830 err = i40e_add_vlan_all_mac(vsi, vid); 2831 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2832 if (err) 2833 return err; 2834 2835 /* schedule our worker thread which will take care of 2836 * applying the new filter changes 2837 */ 2838 i40e_service_event_schedule(vsi->back); 2839 return 0; 2840 } 2841 2842 /** 2843 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN 2844 * @vsi: the vsi being configured 2845 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2846 * 2847 * This function should be used to remove all VLAN filters which match the 2848 * given VID. It does not schedule the service event and does not take the 2849 * mac_filter_hash_lock so it may be combined with other operations under 2850 * a single invocation of the mac_filter_hash_lock. 2851 * 2852 * NOTE: this function expects to be called while under the 2853 * mac_filter_hash_lock 2854 */ 2855 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2856 { 2857 struct i40e_mac_filter *f; 2858 struct hlist_node *h; 2859 int bkt; 2860 2861 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2862 if (f->vlan == vid) 2863 __i40e_del_filter(vsi, f); 2864 } 2865 } 2866 2867 /** 2868 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN 2869 * @vsi: the VSI being configured 2870 * @vid: VLAN id to be removed 2871 **/ 2872 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid) 2873 { 2874 if (!vid || vsi->info.pvid) 2875 return; 2876 2877 spin_lock_bh(&vsi->mac_filter_hash_lock); 2878 i40e_rm_vlan_all_mac(vsi, vid); 2879 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2880 2881 /* schedule our worker thread which will take care of 2882 * applying the new filter changes 2883 */ 2884 i40e_service_event_schedule(vsi->back); 2885 } 2886 2887 /** 2888 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2889 * @netdev: network interface to be adjusted 2890 * @proto: unused protocol value 2891 * @vid: vlan id to be added 2892 * 2893 * net_device_ops implementation for adding vlan ids 2894 **/ 2895 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2896 __always_unused __be16 proto, u16 vid) 2897 { 2898 struct i40e_netdev_priv *np = netdev_priv(netdev); 2899 struct i40e_vsi *vsi = np->vsi; 2900 int ret = 0; 2901 2902 if (vid >= VLAN_N_VID) 2903 return -EINVAL; 2904 2905 ret = i40e_vsi_add_vlan(vsi, vid); 2906 if (!ret) 2907 set_bit(vid, vsi->active_vlans); 2908 2909 return ret; 2910 } 2911 2912 /** 2913 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path 2914 * @netdev: network interface to be adjusted 2915 * @proto: unused protocol value 2916 * @vid: vlan id to be added 2917 **/ 2918 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev, 2919 __always_unused __be16 proto, u16 vid) 2920 { 2921 struct i40e_netdev_priv *np = netdev_priv(netdev); 2922 struct i40e_vsi *vsi = np->vsi; 2923 2924 if (vid >= VLAN_N_VID) 2925 return; 2926 set_bit(vid, vsi->active_vlans); 2927 } 2928 2929 /** 2930 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2931 * @netdev: network interface to be adjusted 2932 * @proto: unused protocol value 2933 * @vid: vlan id to be removed 2934 * 2935 * net_device_ops implementation for removing vlan ids 2936 **/ 2937 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2938 __always_unused __be16 proto, u16 vid) 2939 { 2940 struct i40e_netdev_priv *np = netdev_priv(netdev); 2941 struct i40e_vsi *vsi = np->vsi; 2942 2943 /* return code is ignored as there is nothing a user 2944 * can do about failure to remove and a log message was 2945 * already printed from the other function 2946 */ 2947 i40e_vsi_kill_vlan(vsi, vid); 2948 2949 clear_bit(vid, vsi->active_vlans); 2950 2951 return 0; 2952 } 2953 2954 /** 2955 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2956 * @vsi: the vsi being brought back up 2957 **/ 2958 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2959 { 2960 u16 vid; 2961 2962 if (!vsi->netdev) 2963 return; 2964 2965 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) 2966 i40e_vlan_stripping_enable(vsi); 2967 else 2968 i40e_vlan_stripping_disable(vsi); 2969 2970 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2971 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q), 2972 vid); 2973 } 2974 2975 /** 2976 * i40e_vsi_add_pvid - Add pvid for the VSI 2977 * @vsi: the vsi being adjusted 2978 * @vid: the vlan id to set as a PVID 2979 **/ 2980 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2981 { 2982 struct i40e_vsi_context ctxt; 2983 i40e_status ret; 2984 2985 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2986 vsi->info.pvid = cpu_to_le16(vid); 2987 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2988 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2989 I40E_AQ_VSI_PVLAN_EMOD_STR; 2990 2991 ctxt.seid = vsi->seid; 2992 ctxt.info = vsi->info; 2993 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2994 if (ret) { 2995 dev_info(&vsi->back->pdev->dev, 2996 "add pvid failed, err %s aq_err %s\n", 2997 i40e_stat_str(&vsi->back->hw, ret), 2998 i40e_aq_str(&vsi->back->hw, 2999 vsi->back->hw.aq.asq_last_status)); 3000 return -ENOENT; 3001 } 3002 3003 return 0; 3004 } 3005 3006 /** 3007 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 3008 * @vsi: the vsi being adjusted 3009 * 3010 * Just use the vlan_rx_register() service to put it back to normal 3011 **/ 3012 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 3013 { 3014 vsi->info.pvid = 0; 3015 3016 i40e_vlan_stripping_disable(vsi); 3017 } 3018 3019 /** 3020 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 3021 * @vsi: ptr to the VSI 3022 * 3023 * If this function returns with an error, then it's possible one or 3024 * more of the rings is populated (while the rest are not). It is the 3025 * callers duty to clean those orphaned rings. 3026 * 3027 * Return 0 on success, negative on failure 3028 **/ 3029 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 3030 { 3031 int i, err = 0; 3032 3033 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3034 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 3035 3036 if (!i40e_enabled_xdp_vsi(vsi)) 3037 return err; 3038 3039 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3040 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]); 3041 3042 return err; 3043 } 3044 3045 /** 3046 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 3047 * @vsi: ptr to the VSI 3048 * 3049 * Free VSI's transmit software resources 3050 **/ 3051 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 3052 { 3053 int i; 3054 3055 if (vsi->tx_rings) { 3056 for (i = 0; i < vsi->num_queue_pairs; i++) 3057 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 3058 i40e_free_tx_resources(vsi->tx_rings[i]); 3059 } 3060 3061 if (vsi->xdp_rings) { 3062 for (i = 0; i < vsi->num_queue_pairs; i++) 3063 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc) 3064 i40e_free_tx_resources(vsi->xdp_rings[i]); 3065 } 3066 } 3067 3068 /** 3069 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 3070 * @vsi: ptr to the VSI 3071 * 3072 * If this function returns with an error, then it's possible one or 3073 * more of the rings is populated (while the rest are not). It is the 3074 * callers duty to clean those orphaned rings. 3075 * 3076 * Return 0 on success, negative on failure 3077 **/ 3078 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 3079 { 3080 int i, err = 0; 3081 3082 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3083 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 3084 return err; 3085 } 3086 3087 /** 3088 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 3089 * @vsi: ptr to the VSI 3090 * 3091 * Free all receive software resources 3092 **/ 3093 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 3094 { 3095 int i; 3096 3097 if (!vsi->rx_rings) 3098 return; 3099 3100 for (i = 0; i < vsi->num_queue_pairs; i++) 3101 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 3102 i40e_free_rx_resources(vsi->rx_rings[i]); 3103 } 3104 3105 /** 3106 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 3107 * @ring: The Tx ring to configure 3108 * 3109 * This enables/disables XPS for a given Tx descriptor ring 3110 * based on the TCs enabled for the VSI that ring belongs to. 3111 **/ 3112 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 3113 { 3114 int cpu; 3115 3116 if (!ring->q_vector || !ring->netdev || ring->ch) 3117 return; 3118 3119 /* We only initialize XPS once, so as not to overwrite user settings */ 3120 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state)) 3121 return; 3122 3123 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1); 3124 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu), 3125 ring->queue_index); 3126 } 3127 3128 /** 3129 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled 3130 * @ring: The Tx or Rx ring 3131 * 3132 * Returns the AF_XDP buffer pool or NULL. 3133 **/ 3134 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring) 3135 { 3136 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi); 3137 int qid = ring->queue_index; 3138 3139 if (ring_is_xdp(ring)) 3140 qid -= ring->vsi->alloc_queue_pairs; 3141 3142 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps)) 3143 return NULL; 3144 3145 return xsk_get_pool_from_qid(ring->vsi->netdev, qid); 3146 } 3147 3148 /** 3149 * i40e_configure_tx_ring - Configure a transmit ring context and rest 3150 * @ring: The Tx ring to configure 3151 * 3152 * Configure the Tx descriptor ring in the HMC context. 3153 **/ 3154 static int i40e_configure_tx_ring(struct i40e_ring *ring) 3155 { 3156 struct i40e_vsi *vsi = ring->vsi; 3157 u16 pf_q = vsi->base_queue + ring->queue_index; 3158 struct i40e_hw *hw = &vsi->back->hw; 3159 struct i40e_hmc_obj_txq tx_ctx; 3160 i40e_status err = 0; 3161 u32 qtx_ctl = 0; 3162 3163 if (ring_is_xdp(ring)) 3164 ring->xsk_pool = i40e_xsk_pool(ring); 3165 3166 /* some ATR related tx ring init */ 3167 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 3168 ring->atr_sample_rate = vsi->back->atr_sample_rate; 3169 ring->atr_count = 0; 3170 } else { 3171 ring->atr_sample_rate = 0; 3172 } 3173 3174 /* configure XPS */ 3175 i40e_config_xps_tx_ring(ring); 3176 3177 /* clear the context structure first */ 3178 memset(&tx_ctx, 0, sizeof(tx_ctx)); 3179 3180 tx_ctx.new_context = 1; 3181 tx_ctx.base = (ring->dma / 128); 3182 tx_ctx.qlen = ring->count; 3183 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 3184 I40E_FLAG_FD_ATR_ENABLED)); 3185 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 3186 /* FDIR VSI tx ring can still use RS bit and writebacks */ 3187 if (vsi->type != I40E_VSI_FDIR) 3188 tx_ctx.head_wb_ena = 1; 3189 tx_ctx.head_wb_addr = ring->dma + 3190 (ring->count * sizeof(struct i40e_tx_desc)); 3191 3192 /* As part of VSI creation/update, FW allocates certain 3193 * Tx arbitration queue sets for each TC enabled for 3194 * the VSI. The FW returns the handles to these queue 3195 * sets as part of the response buffer to Add VSI, 3196 * Update VSI, etc. AQ commands. It is expected that 3197 * these queue set handles be associated with the Tx 3198 * queues by the driver as part of the TX queue context 3199 * initialization. This has to be done regardless of 3200 * DCB as by default everything is mapped to TC0. 3201 */ 3202 3203 if (ring->ch) 3204 tx_ctx.rdylist = 3205 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]); 3206 3207 else 3208 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 3209 3210 tx_ctx.rdylist_act = 0; 3211 3212 /* clear the context in the HMC */ 3213 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 3214 if (err) { 3215 dev_info(&vsi->back->pdev->dev, 3216 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 3217 ring->queue_index, pf_q, err); 3218 return -ENOMEM; 3219 } 3220 3221 /* set the context in the HMC */ 3222 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 3223 if (err) { 3224 dev_info(&vsi->back->pdev->dev, 3225 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 3226 ring->queue_index, pf_q, err); 3227 return -ENOMEM; 3228 } 3229 3230 /* Now associate this queue with this PCI function */ 3231 if (ring->ch) { 3232 if (ring->ch->type == I40E_VSI_VMDQ2) 3233 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 3234 else 3235 return -EINVAL; 3236 3237 qtx_ctl |= (ring->ch->vsi_number << 3238 I40E_QTX_CTL_VFVM_INDX_SHIFT) & 3239 I40E_QTX_CTL_VFVM_INDX_MASK; 3240 } else { 3241 if (vsi->type == I40E_VSI_VMDQ2) { 3242 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 3243 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 3244 I40E_QTX_CTL_VFVM_INDX_MASK; 3245 } else { 3246 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 3247 } 3248 } 3249 3250 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 3251 I40E_QTX_CTL_PF_INDX_MASK); 3252 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 3253 i40e_flush(hw); 3254 3255 /* cache tail off for easier writes later */ 3256 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 3257 3258 return 0; 3259 } 3260 3261 /** 3262 * i40e_rx_offset - Return expected offset into page to access data 3263 * @rx_ring: Ring we are requesting offset of 3264 * 3265 * Returns the offset value for ring into the data buffer. 3266 */ 3267 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring) 3268 { 3269 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0; 3270 } 3271 3272 /** 3273 * i40e_configure_rx_ring - Configure a receive ring context 3274 * @ring: The Rx ring to configure 3275 * 3276 * Configure the Rx descriptor ring in the HMC context. 3277 **/ 3278 static int i40e_configure_rx_ring(struct i40e_ring *ring) 3279 { 3280 struct i40e_vsi *vsi = ring->vsi; 3281 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 3282 u16 pf_q = vsi->base_queue + ring->queue_index; 3283 struct i40e_hw *hw = &vsi->back->hw; 3284 struct i40e_hmc_obj_rxq rx_ctx; 3285 i40e_status err = 0; 3286 bool ok; 3287 int ret; 3288 3289 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS); 3290 3291 /* clear the context structure first */ 3292 memset(&rx_ctx, 0, sizeof(rx_ctx)); 3293 3294 if (ring->vsi->type == I40E_VSI_MAIN) 3295 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq); 3296 3297 kfree(ring->rx_bi); 3298 ring->xsk_pool = i40e_xsk_pool(ring); 3299 if (ring->xsk_pool) { 3300 ret = i40e_alloc_rx_bi_zc(ring); 3301 if (ret) 3302 return ret; 3303 ring->rx_buf_len = 3304 xsk_pool_get_rx_frame_size(ring->xsk_pool); 3305 /* For AF_XDP ZC, we disallow packets to span on 3306 * multiple buffers, thus letting us skip that 3307 * handling in the fast-path. 3308 */ 3309 chain_len = 1; 3310 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 3311 MEM_TYPE_XSK_BUFF_POOL, 3312 NULL); 3313 if (ret) 3314 return ret; 3315 dev_info(&vsi->back->pdev->dev, 3316 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n", 3317 ring->queue_index); 3318 3319 } else { 3320 ret = i40e_alloc_rx_bi(ring); 3321 if (ret) 3322 return ret; 3323 ring->rx_buf_len = vsi->rx_buf_len; 3324 if (ring->vsi->type == I40E_VSI_MAIN) { 3325 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, 3326 MEM_TYPE_PAGE_SHARED, 3327 NULL); 3328 if (ret) 3329 return ret; 3330 } 3331 } 3332 3333 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len, 3334 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); 3335 3336 rx_ctx.base = (ring->dma / 128); 3337 rx_ctx.qlen = ring->count; 3338 3339 /* use 16 byte descriptors */ 3340 rx_ctx.dsize = 0; 3341 3342 /* descriptor type is always zero 3343 * rx_ctx.dtype = 0; 3344 */ 3345 rx_ctx.hsplit_0 = 0; 3346 3347 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len); 3348 if (hw->revision_id == 0) 3349 rx_ctx.lrxqthresh = 0; 3350 else 3351 rx_ctx.lrxqthresh = 1; 3352 rx_ctx.crcstrip = 1; 3353 rx_ctx.l2tsel = 1; 3354 /* this controls whether VLAN is stripped from inner headers */ 3355 rx_ctx.showiv = 0; 3356 /* set the prefena field to 1 because the manual says to */ 3357 rx_ctx.prefena = 1; 3358 3359 /* clear the context in the HMC */ 3360 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 3361 if (err) { 3362 dev_info(&vsi->back->pdev->dev, 3363 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3364 ring->queue_index, pf_q, err); 3365 return -ENOMEM; 3366 } 3367 3368 /* set the context in the HMC */ 3369 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 3370 if (err) { 3371 dev_info(&vsi->back->pdev->dev, 3372 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3373 ring->queue_index, pf_q, err); 3374 return -ENOMEM; 3375 } 3376 3377 /* configure Rx buffer alignment */ 3378 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) 3379 clear_ring_build_skb_enabled(ring); 3380 else 3381 set_ring_build_skb_enabled(ring); 3382 3383 ring->rx_offset = i40e_rx_offset(ring); 3384 3385 /* cache tail for quicker writes, and clear the reg before use */ 3386 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 3387 writel(0, ring->tail); 3388 3389 if (ring->xsk_pool) { 3390 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq); 3391 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring)); 3392 } else { 3393 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); 3394 } 3395 if (!ok) { 3396 /* Log this in case the user has forgotten to give the kernel 3397 * any buffers, even later in the application. 3398 */ 3399 dev_info(&vsi->back->pdev->dev, 3400 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n", 3401 ring->xsk_pool ? "AF_XDP ZC enabled " : "", 3402 ring->queue_index, pf_q); 3403 } 3404 3405 return 0; 3406 } 3407 3408 /** 3409 * i40e_vsi_configure_tx - Configure the VSI for Tx 3410 * @vsi: VSI structure describing this set of rings and resources 3411 * 3412 * Configure the Tx VSI for operation. 3413 **/ 3414 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 3415 { 3416 int err = 0; 3417 u16 i; 3418 3419 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 3420 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 3421 3422 if (err || !i40e_enabled_xdp_vsi(vsi)) 3423 return err; 3424 3425 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 3426 err = i40e_configure_tx_ring(vsi->xdp_rings[i]); 3427 3428 return err; 3429 } 3430 3431 /** 3432 * i40e_vsi_configure_rx - Configure the VSI for Rx 3433 * @vsi: the VSI being configured 3434 * 3435 * Configure the Rx VSI for operation. 3436 **/ 3437 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 3438 { 3439 int err = 0; 3440 u16 i; 3441 3442 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) { 3443 vsi->max_frame = I40E_MAX_RXBUFFER; 3444 vsi->rx_buf_len = I40E_RXBUFFER_2048; 3445 #if (PAGE_SIZE < 8192) 3446 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING && 3447 (vsi->netdev->mtu <= ETH_DATA_LEN)) { 3448 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN; 3449 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN; 3450 #endif 3451 } else { 3452 vsi->max_frame = I40E_MAX_RXBUFFER; 3453 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 : 3454 I40E_RXBUFFER_2048; 3455 } 3456 3457 /* set up individual rings */ 3458 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3459 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 3460 3461 return err; 3462 } 3463 3464 /** 3465 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 3466 * @vsi: ptr to the VSI 3467 **/ 3468 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 3469 { 3470 struct i40e_ring *tx_ring, *rx_ring; 3471 u16 qoffset, qcount; 3472 int i, n; 3473 3474 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 3475 /* Reset the TC information */ 3476 for (i = 0; i < vsi->num_queue_pairs; i++) { 3477 rx_ring = vsi->rx_rings[i]; 3478 tx_ring = vsi->tx_rings[i]; 3479 rx_ring->dcb_tc = 0; 3480 tx_ring->dcb_tc = 0; 3481 } 3482 return; 3483 } 3484 3485 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 3486 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) 3487 continue; 3488 3489 qoffset = vsi->tc_config.tc_info[n].qoffset; 3490 qcount = vsi->tc_config.tc_info[n].qcount; 3491 for (i = qoffset; i < (qoffset + qcount); i++) { 3492 rx_ring = vsi->rx_rings[i]; 3493 tx_ring = vsi->tx_rings[i]; 3494 rx_ring->dcb_tc = n; 3495 tx_ring->dcb_tc = n; 3496 } 3497 } 3498 } 3499 3500 /** 3501 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 3502 * @vsi: ptr to the VSI 3503 **/ 3504 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 3505 { 3506 if (vsi->netdev) 3507 i40e_set_rx_mode(vsi->netdev); 3508 } 3509 3510 /** 3511 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters 3512 * @pf: Pointer to the targeted PF 3513 * 3514 * Set all flow director counters to 0. 3515 */ 3516 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf) 3517 { 3518 pf->fd_tcp4_filter_cnt = 0; 3519 pf->fd_udp4_filter_cnt = 0; 3520 pf->fd_sctp4_filter_cnt = 0; 3521 pf->fd_ip4_filter_cnt = 0; 3522 pf->fd_tcp6_filter_cnt = 0; 3523 pf->fd_udp6_filter_cnt = 0; 3524 pf->fd_sctp6_filter_cnt = 0; 3525 pf->fd_ip6_filter_cnt = 0; 3526 } 3527 3528 /** 3529 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 3530 * @vsi: Pointer to the targeted VSI 3531 * 3532 * This function replays the hlist on the hw where all the SB Flow Director 3533 * filters were saved. 3534 **/ 3535 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 3536 { 3537 struct i40e_fdir_filter *filter; 3538 struct i40e_pf *pf = vsi->back; 3539 struct hlist_node *node; 3540 3541 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3542 return; 3543 3544 /* Reset FDir counters as we're replaying all existing filters */ 3545 i40e_reset_fdir_filter_cnt(pf); 3546 3547 hlist_for_each_entry_safe(filter, node, 3548 &pf->fdir_filter_list, fdir_node) { 3549 i40e_add_del_fdir(vsi, filter, true); 3550 } 3551 } 3552 3553 /** 3554 * i40e_vsi_configure - Set up the VSI for action 3555 * @vsi: the VSI being configured 3556 **/ 3557 static int i40e_vsi_configure(struct i40e_vsi *vsi) 3558 { 3559 int err; 3560 3561 i40e_set_vsi_rx_mode(vsi); 3562 i40e_restore_vlan(vsi); 3563 i40e_vsi_config_dcb_rings(vsi); 3564 err = i40e_vsi_configure_tx(vsi); 3565 if (!err) 3566 err = i40e_vsi_configure_rx(vsi); 3567 3568 return err; 3569 } 3570 3571 /** 3572 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 3573 * @vsi: the VSI being configured 3574 **/ 3575 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 3576 { 3577 bool has_xdp = i40e_enabled_xdp_vsi(vsi); 3578 struct i40e_pf *pf = vsi->back; 3579 struct i40e_hw *hw = &pf->hw; 3580 u16 vector; 3581 int i, q; 3582 u32 qp; 3583 3584 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 3585 * and PFINT_LNKLSTn registers, e.g.: 3586 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 3587 */ 3588 qp = vsi->base_queue; 3589 vector = vsi->base_vector; 3590 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 3591 struct i40e_q_vector *q_vector = vsi->q_vectors[i]; 3592 3593 q_vector->rx.next_update = jiffies + 1; 3594 q_vector->rx.target_itr = 3595 ITR_TO_REG(vsi->rx_rings[i]->itr_setting); 3596 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 3597 q_vector->rx.target_itr >> 1); 3598 q_vector->rx.current_itr = q_vector->rx.target_itr; 3599 3600 q_vector->tx.next_update = jiffies + 1; 3601 q_vector->tx.target_itr = 3602 ITR_TO_REG(vsi->tx_rings[i]->itr_setting); 3603 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 3604 q_vector->tx.target_itr >> 1); 3605 q_vector->tx.current_itr = q_vector->tx.target_itr; 3606 3607 wr32(hw, I40E_PFINT_RATEN(vector - 1), 3608 i40e_intrl_usec_to_reg(vsi->int_rate_limit)); 3609 3610 /* Linked list for the queuepairs assigned to this vector */ 3611 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 3612 for (q = 0; q < q_vector->num_ringpairs; q++) { 3613 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp; 3614 u32 val; 3615 3616 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3617 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3618 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 3619 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | 3620 (I40E_QUEUE_TYPE_TX << 3621 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 3622 3623 wr32(hw, I40E_QINT_RQCTL(qp), val); 3624 3625 if (has_xdp) { 3626 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3627 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3628 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3629 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | 3630 (I40E_QUEUE_TYPE_TX << 3631 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3632 3633 wr32(hw, I40E_QINT_TQCTL(nextqp), val); 3634 } 3635 3636 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3637 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3638 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3639 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | 3640 (I40E_QUEUE_TYPE_RX << 3641 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3642 3643 /* Terminate the linked list */ 3644 if (q == (q_vector->num_ringpairs - 1)) 3645 val |= (I40E_QUEUE_END_OF_LIST << 3646 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3647 3648 wr32(hw, I40E_QINT_TQCTL(qp), val); 3649 qp++; 3650 } 3651 } 3652 3653 i40e_flush(hw); 3654 } 3655 3656 /** 3657 * i40e_enable_misc_int_causes - enable the non-queue interrupts 3658 * @pf: pointer to private device data structure 3659 **/ 3660 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 3661 { 3662 struct i40e_hw *hw = &pf->hw; 3663 u32 val; 3664 3665 /* clear things first */ 3666 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 3667 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 3668 3669 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 3670 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 3671 I40E_PFINT_ICR0_ENA_GRST_MASK | 3672 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 3673 I40E_PFINT_ICR0_ENA_GPIO_MASK | 3674 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 3675 I40E_PFINT_ICR0_ENA_VFLR_MASK | 3676 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3677 3678 if (pf->flags & I40E_FLAG_IWARP_ENABLED) 3679 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3680 3681 if (pf->flags & I40E_FLAG_PTP) 3682 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3683 3684 wr32(hw, I40E_PFINT_ICR0_ENA, val); 3685 3686 /* SW_ITR_IDX = 0, but don't change INTENA */ 3687 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 3688 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 3689 3690 /* OTHER_ITR_IDX = 0 */ 3691 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 3692 } 3693 3694 /** 3695 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 3696 * @vsi: the VSI being configured 3697 **/ 3698 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 3699 { 3700 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0; 3701 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3702 struct i40e_pf *pf = vsi->back; 3703 struct i40e_hw *hw = &pf->hw; 3704 u32 val; 3705 3706 /* set the ITR configuration */ 3707 q_vector->rx.next_update = jiffies + 1; 3708 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting); 3709 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1); 3710 q_vector->rx.current_itr = q_vector->rx.target_itr; 3711 q_vector->tx.next_update = jiffies + 1; 3712 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting); 3713 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1); 3714 q_vector->tx.current_itr = q_vector->tx.target_itr; 3715 3716 i40e_enable_misc_int_causes(pf); 3717 3718 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 3719 wr32(hw, I40E_PFINT_LNKLST0, 0); 3720 3721 /* Associate the queue pair to the vector and enable the queue int */ 3722 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3723 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3724 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 3725 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3726 3727 wr32(hw, I40E_QINT_RQCTL(0), val); 3728 3729 if (i40e_enabled_xdp_vsi(vsi)) { 3730 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3731 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)| 3732 (I40E_QUEUE_TYPE_TX 3733 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3734 3735 wr32(hw, I40E_QINT_TQCTL(nextqp), val); 3736 } 3737 3738 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3739 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3740 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3741 3742 wr32(hw, I40E_QINT_TQCTL(0), val); 3743 i40e_flush(hw); 3744 } 3745 3746 /** 3747 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 3748 * @pf: board private structure 3749 **/ 3750 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 3751 { 3752 struct i40e_hw *hw = &pf->hw; 3753 3754 wr32(hw, I40E_PFINT_DYN_CTL0, 3755 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 3756 i40e_flush(hw); 3757 } 3758 3759 /** 3760 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 3761 * @pf: board private structure 3762 **/ 3763 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 3764 { 3765 struct i40e_hw *hw = &pf->hw; 3766 u32 val; 3767 3768 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 3769 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 3770 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 3771 3772 wr32(hw, I40E_PFINT_DYN_CTL0, val); 3773 i40e_flush(hw); 3774 } 3775 3776 /** 3777 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 3778 * @irq: interrupt number 3779 * @data: pointer to a q_vector 3780 **/ 3781 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3782 { 3783 struct i40e_q_vector *q_vector = data; 3784 3785 if (!q_vector->tx.ring && !q_vector->rx.ring) 3786 return IRQ_HANDLED; 3787 3788 napi_schedule_irqoff(&q_vector->napi); 3789 3790 return IRQ_HANDLED; 3791 } 3792 3793 /** 3794 * i40e_irq_affinity_notify - Callback for affinity changes 3795 * @notify: context as to what irq was changed 3796 * @mask: the new affinity mask 3797 * 3798 * This is a callback function used by the irq_set_affinity_notifier function 3799 * so that we may register to receive changes to the irq affinity masks. 3800 **/ 3801 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify, 3802 const cpumask_t *mask) 3803 { 3804 struct i40e_q_vector *q_vector = 3805 container_of(notify, struct i40e_q_vector, affinity_notify); 3806 3807 cpumask_copy(&q_vector->affinity_mask, mask); 3808 } 3809 3810 /** 3811 * i40e_irq_affinity_release - Callback for affinity notifier release 3812 * @ref: internal core kernel usage 3813 * 3814 * This is a callback function used by the irq_set_affinity_notifier function 3815 * to inform the current notification subscriber that they will no longer 3816 * receive notifications. 3817 **/ 3818 static void i40e_irq_affinity_release(struct kref *ref) {} 3819 3820 /** 3821 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3822 * @vsi: the VSI being configured 3823 * @basename: name for the vector 3824 * 3825 * Allocates MSI-X vectors and requests interrupts from the kernel. 3826 **/ 3827 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3828 { 3829 int q_vectors = vsi->num_q_vectors; 3830 struct i40e_pf *pf = vsi->back; 3831 int base = vsi->base_vector; 3832 int rx_int_idx = 0; 3833 int tx_int_idx = 0; 3834 int vector, err; 3835 int irq_num; 3836 int cpu; 3837 3838 for (vector = 0; vector < q_vectors; vector++) { 3839 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3840 3841 irq_num = pf->msix_entries[base + vector].vector; 3842 3843 if (q_vector->tx.ring && q_vector->rx.ring) { 3844 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3845 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3846 tx_int_idx++; 3847 } else if (q_vector->rx.ring) { 3848 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3849 "%s-%s-%d", basename, "rx", rx_int_idx++); 3850 } else if (q_vector->tx.ring) { 3851 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3852 "%s-%s-%d", basename, "tx", tx_int_idx++); 3853 } else { 3854 /* skip this unused q_vector */ 3855 continue; 3856 } 3857 err = request_irq(irq_num, 3858 vsi->irq_handler, 3859 0, 3860 q_vector->name, 3861 q_vector); 3862 if (err) { 3863 dev_info(&pf->pdev->dev, 3864 "MSIX request_irq failed, error: %d\n", err); 3865 goto free_queue_irqs; 3866 } 3867 3868 /* register for affinity change notifications */ 3869 q_vector->affinity_notify.notify = i40e_irq_affinity_notify; 3870 q_vector->affinity_notify.release = i40e_irq_affinity_release; 3871 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify); 3872 /* Spread affinity hints out across online CPUs. 3873 * 3874 * get_cpu_mask returns a static constant mask with 3875 * a permanent lifetime so it's ok to pass to 3876 * irq_set_affinity_hint without making a copy. 3877 */ 3878 cpu = cpumask_local_spread(q_vector->v_idx, -1); 3879 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu)); 3880 } 3881 3882 vsi->irqs_ready = true; 3883 return 0; 3884 3885 free_queue_irqs: 3886 while (vector) { 3887 vector--; 3888 irq_num = pf->msix_entries[base + vector].vector; 3889 irq_set_affinity_notifier(irq_num, NULL); 3890 irq_set_affinity_hint(irq_num, NULL); 3891 free_irq(irq_num, &vsi->q_vectors[vector]); 3892 } 3893 return err; 3894 } 3895 3896 /** 3897 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3898 * @vsi: the VSI being un-configured 3899 **/ 3900 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3901 { 3902 struct i40e_pf *pf = vsi->back; 3903 struct i40e_hw *hw = &pf->hw; 3904 int base = vsi->base_vector; 3905 int i; 3906 3907 /* disable interrupt causation from each queue */ 3908 for (i = 0; i < vsi->num_queue_pairs; i++) { 3909 u32 val; 3910 3911 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx)); 3912 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3913 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val); 3914 3915 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx)); 3916 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3917 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val); 3918 3919 if (!i40e_enabled_xdp_vsi(vsi)) 3920 continue; 3921 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0); 3922 } 3923 3924 /* disable each interrupt */ 3925 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3926 for (i = vsi->base_vector; 3927 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3928 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3929 3930 i40e_flush(hw); 3931 for (i = 0; i < vsi->num_q_vectors; i++) 3932 synchronize_irq(pf->msix_entries[i + base].vector); 3933 } else { 3934 /* Legacy and MSI mode - this stops all interrupt handling */ 3935 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3936 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3937 i40e_flush(hw); 3938 synchronize_irq(pf->pdev->irq); 3939 } 3940 } 3941 3942 /** 3943 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3944 * @vsi: the VSI being configured 3945 **/ 3946 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3947 { 3948 struct i40e_pf *pf = vsi->back; 3949 int i; 3950 3951 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3952 for (i = 0; i < vsi->num_q_vectors; i++) 3953 i40e_irq_dynamic_enable(vsi, i); 3954 } else { 3955 i40e_irq_dynamic_enable_icr0(pf); 3956 } 3957 3958 i40e_flush(&pf->hw); 3959 return 0; 3960 } 3961 3962 /** 3963 * i40e_free_misc_vector - Free the vector that handles non-queue events 3964 * @pf: board private structure 3965 **/ 3966 static void i40e_free_misc_vector(struct i40e_pf *pf) 3967 { 3968 /* Disable ICR 0 */ 3969 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3970 i40e_flush(&pf->hw); 3971 3972 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) { 3973 synchronize_irq(pf->msix_entries[0].vector); 3974 free_irq(pf->msix_entries[0].vector, pf); 3975 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state); 3976 } 3977 } 3978 3979 /** 3980 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3981 * @irq: interrupt number 3982 * @data: pointer to a q_vector 3983 * 3984 * This is the handler used for all MSI/Legacy interrupts, and deals 3985 * with both queue and non-queue interrupts. This is also used in 3986 * MSIX mode to handle the non-queue interrupts. 3987 **/ 3988 static irqreturn_t i40e_intr(int irq, void *data) 3989 { 3990 struct i40e_pf *pf = (struct i40e_pf *)data; 3991 struct i40e_hw *hw = &pf->hw; 3992 irqreturn_t ret = IRQ_NONE; 3993 u32 icr0, icr0_remaining; 3994 u32 val, ena_mask; 3995 3996 icr0 = rd32(hw, I40E_PFINT_ICR0); 3997 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3998 3999 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 4000 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 4001 goto enable_intr; 4002 4003 /* if interrupt but no bits showing, must be SWINT */ 4004 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 4005 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 4006 pf->sw_int_count++; 4007 4008 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 4009 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { 4010 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 4011 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n"); 4012 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 4013 } 4014 4015 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 4016 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 4017 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 4018 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 4019 4020 /* We do not have a way to disarm Queue causes while leaving 4021 * interrupt enabled for all other causes, ideally 4022 * interrupt should be disabled while we are in NAPI but 4023 * this is not a performance path and napi_schedule() 4024 * can deal with rescheduling. 4025 */ 4026 if (!test_bit(__I40E_DOWN, pf->state)) 4027 napi_schedule_irqoff(&q_vector->napi); 4028 } 4029 4030 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 4031 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 4032 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state); 4033 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n"); 4034 } 4035 4036 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 4037 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 4038 set_bit(__I40E_MDD_EVENT_PENDING, pf->state); 4039 } 4040 4041 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 4042 /* disable any further VFLR event notifications */ 4043 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) { 4044 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 4045 4046 reg &= ~I40E_PFINT_ICR0_VFLR_MASK; 4047 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 4048 } else { 4049 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 4050 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state); 4051 } 4052 } 4053 4054 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 4055 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 4056 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state); 4057 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 4058 val = rd32(hw, I40E_GLGEN_RSTAT); 4059 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 4060 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 4061 if (val == I40E_RESET_CORER) { 4062 pf->corer_count++; 4063 } else if (val == I40E_RESET_GLOBR) { 4064 pf->globr_count++; 4065 } else if (val == I40E_RESET_EMPR) { 4066 pf->empr_count++; 4067 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state); 4068 } 4069 } 4070 4071 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 4072 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 4073 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 4074 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 4075 rd32(hw, I40E_PFHMC_ERRORINFO), 4076 rd32(hw, I40E_PFHMC_ERRORDATA)); 4077 } 4078 4079 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 4080 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 4081 4082 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 4083 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 4084 i40e_ptp_tx_hwtstamp(pf); 4085 } 4086 } 4087 4088 /* If a critical error is pending we have no choice but to reset the 4089 * device. 4090 * Report and mask out any remaining unexpected interrupts. 4091 */ 4092 icr0_remaining = icr0 & ena_mask; 4093 if (icr0_remaining) { 4094 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 4095 icr0_remaining); 4096 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 4097 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 4098 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 4099 dev_info(&pf->pdev->dev, "device will be reset\n"); 4100 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 4101 i40e_service_event_schedule(pf); 4102 } 4103 ena_mask &= ~icr0_remaining; 4104 } 4105 ret = IRQ_HANDLED; 4106 4107 enable_intr: 4108 /* re-enable interrupt causes */ 4109 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 4110 if (!test_bit(__I40E_DOWN, pf->state) || 4111 test_bit(__I40E_RECOVERY_MODE, pf->state)) { 4112 i40e_service_event_schedule(pf); 4113 i40e_irq_dynamic_enable_icr0(pf); 4114 } 4115 4116 return ret; 4117 } 4118 4119 /** 4120 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 4121 * @tx_ring: tx ring to clean 4122 * @budget: how many cleans we're allowed 4123 * 4124 * Returns true if there's any budget left (e.g. the clean is finished) 4125 **/ 4126 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 4127 { 4128 struct i40e_vsi *vsi = tx_ring->vsi; 4129 u16 i = tx_ring->next_to_clean; 4130 struct i40e_tx_buffer *tx_buf; 4131 struct i40e_tx_desc *tx_desc; 4132 4133 tx_buf = &tx_ring->tx_bi[i]; 4134 tx_desc = I40E_TX_DESC(tx_ring, i); 4135 i -= tx_ring->count; 4136 4137 do { 4138 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 4139 4140 /* if next_to_watch is not set then there is no work pending */ 4141 if (!eop_desc) 4142 break; 4143 4144 /* prevent any other reads prior to eop_desc */ 4145 smp_rmb(); 4146 4147 /* if the descriptor isn't done, no work yet to do */ 4148 if (!(eop_desc->cmd_type_offset_bsz & 4149 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 4150 break; 4151 4152 /* clear next_to_watch to prevent false hangs */ 4153 tx_buf->next_to_watch = NULL; 4154 4155 tx_desc->buffer_addr = 0; 4156 tx_desc->cmd_type_offset_bsz = 0; 4157 /* move past filter desc */ 4158 tx_buf++; 4159 tx_desc++; 4160 i++; 4161 if (unlikely(!i)) { 4162 i -= tx_ring->count; 4163 tx_buf = tx_ring->tx_bi; 4164 tx_desc = I40E_TX_DESC(tx_ring, 0); 4165 } 4166 /* unmap skb header data */ 4167 dma_unmap_single(tx_ring->dev, 4168 dma_unmap_addr(tx_buf, dma), 4169 dma_unmap_len(tx_buf, len), 4170 DMA_TO_DEVICE); 4171 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 4172 kfree(tx_buf->raw_buf); 4173 4174 tx_buf->raw_buf = NULL; 4175 tx_buf->tx_flags = 0; 4176 tx_buf->next_to_watch = NULL; 4177 dma_unmap_len_set(tx_buf, len, 0); 4178 tx_desc->buffer_addr = 0; 4179 tx_desc->cmd_type_offset_bsz = 0; 4180 4181 /* move us past the eop_desc for start of next FD desc */ 4182 tx_buf++; 4183 tx_desc++; 4184 i++; 4185 if (unlikely(!i)) { 4186 i -= tx_ring->count; 4187 tx_buf = tx_ring->tx_bi; 4188 tx_desc = I40E_TX_DESC(tx_ring, 0); 4189 } 4190 4191 /* update budget accounting */ 4192 budget--; 4193 } while (likely(budget)); 4194 4195 i += tx_ring->count; 4196 tx_ring->next_to_clean = i; 4197 4198 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) 4199 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx); 4200 4201 return budget > 0; 4202 } 4203 4204 /** 4205 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 4206 * @irq: interrupt number 4207 * @data: pointer to a q_vector 4208 **/ 4209 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 4210 { 4211 struct i40e_q_vector *q_vector = data; 4212 struct i40e_vsi *vsi; 4213 4214 if (!q_vector->tx.ring) 4215 return IRQ_HANDLED; 4216 4217 vsi = q_vector->tx.ring->vsi; 4218 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 4219 4220 return IRQ_HANDLED; 4221 } 4222 4223 /** 4224 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 4225 * @vsi: the VSI being configured 4226 * @v_idx: vector index 4227 * @qp_idx: queue pair index 4228 **/ 4229 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 4230 { 4231 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4232 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 4233 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 4234 4235 tx_ring->q_vector = q_vector; 4236 tx_ring->next = q_vector->tx.ring; 4237 q_vector->tx.ring = tx_ring; 4238 q_vector->tx.count++; 4239 4240 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */ 4241 if (i40e_enabled_xdp_vsi(vsi)) { 4242 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx]; 4243 4244 xdp_ring->q_vector = q_vector; 4245 xdp_ring->next = q_vector->tx.ring; 4246 q_vector->tx.ring = xdp_ring; 4247 q_vector->tx.count++; 4248 } 4249 4250 rx_ring->q_vector = q_vector; 4251 rx_ring->next = q_vector->rx.ring; 4252 q_vector->rx.ring = rx_ring; 4253 q_vector->rx.count++; 4254 } 4255 4256 /** 4257 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 4258 * @vsi: the VSI being configured 4259 * 4260 * This function maps descriptor rings to the queue-specific vectors 4261 * we were allotted through the MSI-X enabling code. Ideally, we'd have 4262 * one vector per queue pair, but on a constrained vector budget, we 4263 * group the queue pairs as "efficiently" as possible. 4264 **/ 4265 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 4266 { 4267 int qp_remaining = vsi->num_queue_pairs; 4268 int q_vectors = vsi->num_q_vectors; 4269 int num_ringpairs; 4270 int v_start = 0; 4271 int qp_idx = 0; 4272 4273 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 4274 * group them so there are multiple queues per vector. 4275 * It is also important to go through all the vectors available to be 4276 * sure that if we don't use all the vectors, that the remaining vectors 4277 * are cleared. This is especially important when decreasing the 4278 * number of queues in use. 4279 */ 4280 for (; v_start < q_vectors; v_start++) { 4281 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 4282 4283 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 4284 4285 q_vector->num_ringpairs = num_ringpairs; 4286 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1; 4287 4288 q_vector->rx.count = 0; 4289 q_vector->tx.count = 0; 4290 q_vector->rx.ring = NULL; 4291 q_vector->tx.ring = NULL; 4292 4293 while (num_ringpairs--) { 4294 i40e_map_vector_to_qp(vsi, v_start, qp_idx); 4295 qp_idx++; 4296 qp_remaining--; 4297 } 4298 } 4299 } 4300 4301 /** 4302 * i40e_vsi_request_irq - Request IRQ from the OS 4303 * @vsi: the VSI being configured 4304 * @basename: name for the vector 4305 **/ 4306 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 4307 { 4308 struct i40e_pf *pf = vsi->back; 4309 int err; 4310 4311 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4312 err = i40e_vsi_request_irq_msix(vsi, basename); 4313 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 4314 err = request_irq(pf->pdev->irq, i40e_intr, 0, 4315 pf->int_name, pf); 4316 else 4317 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 4318 pf->int_name, pf); 4319 4320 if (err) 4321 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 4322 4323 return err; 4324 } 4325 4326 #ifdef CONFIG_NET_POLL_CONTROLLER 4327 /** 4328 * i40e_netpoll - A Polling 'interrupt' handler 4329 * @netdev: network interface device structure 4330 * 4331 * This is used by netconsole to send skbs without having to re-enable 4332 * interrupts. It's not called while the normal interrupt routine is executing. 4333 **/ 4334 static void i40e_netpoll(struct net_device *netdev) 4335 { 4336 struct i40e_netdev_priv *np = netdev_priv(netdev); 4337 struct i40e_vsi *vsi = np->vsi; 4338 struct i40e_pf *pf = vsi->back; 4339 int i; 4340 4341 /* if interface is down do nothing */ 4342 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 4343 return; 4344 4345 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4346 for (i = 0; i < vsi->num_q_vectors; i++) 4347 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 4348 } else { 4349 i40e_intr(pf->pdev->irq, netdev); 4350 } 4351 } 4352 #endif 4353 4354 #define I40E_QTX_ENA_WAIT_COUNT 50 4355 4356 /** 4357 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 4358 * @pf: the PF being configured 4359 * @pf_q: the PF queue 4360 * @enable: enable or disable state of the queue 4361 * 4362 * This routine will wait for the given Tx queue of the PF to reach the 4363 * enabled or disabled state. 4364 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4365 * multiple retries; else will return 0 in case of success. 4366 **/ 4367 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4368 { 4369 int i; 4370 u32 tx_reg; 4371 4372 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4373 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 4374 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4375 break; 4376 4377 usleep_range(10, 20); 4378 } 4379 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4380 return -ETIMEDOUT; 4381 4382 return 0; 4383 } 4384 4385 /** 4386 * i40e_control_tx_q - Start or stop a particular Tx queue 4387 * @pf: the PF structure 4388 * @pf_q: the PF queue to configure 4389 * @enable: start or stop the queue 4390 * 4391 * This function enables or disables a single queue. Note that any delay 4392 * required after the operation is expected to be handled by the caller of 4393 * this function. 4394 **/ 4395 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable) 4396 { 4397 struct i40e_hw *hw = &pf->hw; 4398 u32 tx_reg; 4399 int i; 4400 4401 /* warn the TX unit of coming changes */ 4402 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 4403 if (!enable) 4404 usleep_range(10, 20); 4405 4406 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { 4407 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 4408 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 4409 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 4410 break; 4411 usleep_range(1000, 2000); 4412 } 4413 4414 /* Skip if the queue is already in the requested state */ 4415 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4416 return; 4417 4418 /* turn on/off the queue */ 4419 if (enable) { 4420 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 4421 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 4422 } else { 4423 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 4424 } 4425 4426 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 4427 } 4428 4429 /** 4430 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion 4431 * @seid: VSI SEID 4432 * @pf: the PF structure 4433 * @pf_q: the PF queue to configure 4434 * @is_xdp: true if the queue is used for XDP 4435 * @enable: start or stop the queue 4436 **/ 4437 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, 4438 bool is_xdp, bool enable) 4439 { 4440 int ret; 4441 4442 i40e_control_tx_q(pf, pf_q, enable); 4443 4444 /* wait for the change to finish */ 4445 ret = i40e_pf_txq_wait(pf, pf_q, enable); 4446 if (ret) { 4447 dev_info(&pf->pdev->dev, 4448 "VSI seid %d %sTx ring %d %sable timeout\n", 4449 seid, (is_xdp ? "XDP " : ""), pf_q, 4450 (enable ? "en" : "dis")); 4451 } 4452 4453 return ret; 4454 } 4455 4456 /** 4457 * i40e_vsi_enable_tx - Start a VSI's rings 4458 * @vsi: the VSI being configured 4459 **/ 4460 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi) 4461 { 4462 struct i40e_pf *pf = vsi->back; 4463 int i, pf_q, ret = 0; 4464 4465 pf_q = vsi->base_queue; 4466 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4467 ret = i40e_control_wait_tx_q(vsi->seid, pf, 4468 pf_q, 4469 false /*is xdp*/, true); 4470 if (ret) 4471 break; 4472 4473 if (!i40e_enabled_xdp_vsi(vsi)) 4474 continue; 4475 4476 ret = i40e_control_wait_tx_q(vsi->seid, pf, 4477 pf_q + vsi->alloc_queue_pairs, 4478 true /*is xdp*/, true); 4479 if (ret) 4480 break; 4481 } 4482 return ret; 4483 } 4484 4485 /** 4486 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 4487 * @pf: the PF being configured 4488 * @pf_q: the PF queue 4489 * @enable: enable or disable state of the queue 4490 * 4491 * This routine will wait for the given Rx queue of the PF to reach the 4492 * enabled or disabled state. 4493 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4494 * multiple retries; else will return 0 in case of success. 4495 **/ 4496 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4497 { 4498 int i; 4499 u32 rx_reg; 4500 4501 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4502 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 4503 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4504 break; 4505 4506 usleep_range(10, 20); 4507 } 4508 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4509 return -ETIMEDOUT; 4510 4511 return 0; 4512 } 4513 4514 /** 4515 * i40e_control_rx_q - Start or stop a particular Rx queue 4516 * @pf: the PF structure 4517 * @pf_q: the PF queue to configure 4518 * @enable: start or stop the queue 4519 * 4520 * This function enables or disables a single queue. Note that 4521 * any delay required after the operation is expected to be 4522 * handled by the caller of this function. 4523 **/ 4524 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable) 4525 { 4526 struct i40e_hw *hw = &pf->hw; 4527 u32 rx_reg; 4528 int i; 4529 4530 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { 4531 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 4532 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 4533 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 4534 break; 4535 usleep_range(1000, 2000); 4536 } 4537 4538 /* Skip if the queue is already in the requested state */ 4539 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4540 return; 4541 4542 /* turn on/off the queue */ 4543 if (enable) 4544 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 4545 else 4546 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 4547 4548 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 4549 } 4550 4551 /** 4552 * i40e_control_wait_rx_q 4553 * @pf: the PF structure 4554 * @pf_q: queue being configured 4555 * @enable: start or stop the rings 4556 * 4557 * This function enables or disables a single queue along with waiting 4558 * for the change to finish. The caller of this function should handle 4559 * the delays needed in the case of disabling queues. 4560 **/ 4561 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable) 4562 { 4563 int ret = 0; 4564 4565 i40e_control_rx_q(pf, pf_q, enable); 4566 4567 /* wait for the change to finish */ 4568 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 4569 if (ret) 4570 return ret; 4571 4572 return ret; 4573 } 4574 4575 /** 4576 * i40e_vsi_enable_rx - Start a VSI's rings 4577 * @vsi: the VSI being configured 4578 **/ 4579 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi) 4580 { 4581 struct i40e_pf *pf = vsi->back; 4582 int i, pf_q, ret = 0; 4583 4584 pf_q = vsi->base_queue; 4585 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4586 ret = i40e_control_wait_rx_q(pf, pf_q, true); 4587 if (ret) { 4588 dev_info(&pf->pdev->dev, 4589 "VSI seid %d Rx ring %d enable timeout\n", 4590 vsi->seid, pf_q); 4591 break; 4592 } 4593 } 4594 4595 return ret; 4596 } 4597 4598 /** 4599 * i40e_vsi_start_rings - Start a VSI's rings 4600 * @vsi: the VSI being configured 4601 **/ 4602 int i40e_vsi_start_rings(struct i40e_vsi *vsi) 4603 { 4604 int ret = 0; 4605 4606 /* do rx first for enable and last for disable */ 4607 ret = i40e_vsi_enable_rx(vsi); 4608 if (ret) 4609 return ret; 4610 ret = i40e_vsi_enable_tx(vsi); 4611 4612 return ret; 4613 } 4614 4615 #define I40E_DISABLE_TX_GAP_MSEC 50 4616 4617 /** 4618 * i40e_vsi_stop_rings - Stop a VSI's rings 4619 * @vsi: the VSI being configured 4620 **/ 4621 void i40e_vsi_stop_rings(struct i40e_vsi *vsi) 4622 { 4623 struct i40e_pf *pf = vsi->back; 4624 int pf_q, err, q_end; 4625 4626 /* When port TX is suspended, don't wait */ 4627 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state)) 4628 return i40e_vsi_stop_rings_no_wait(vsi); 4629 4630 q_end = vsi->base_queue + vsi->num_queue_pairs; 4631 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) 4632 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false); 4633 4634 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) { 4635 err = i40e_control_wait_rx_q(pf, pf_q, false); 4636 if (err) 4637 dev_info(&pf->pdev->dev, 4638 "VSI seid %d Rx ring %d dissable timeout\n", 4639 vsi->seid, pf_q); 4640 } 4641 4642 msleep(I40E_DISABLE_TX_GAP_MSEC); 4643 pf_q = vsi->base_queue; 4644 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) 4645 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0); 4646 4647 i40e_vsi_wait_queues_disabled(vsi); 4648 } 4649 4650 /** 4651 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay 4652 * @vsi: the VSI being shutdown 4653 * 4654 * This function stops all the rings for a VSI but does not delay to verify 4655 * that rings have been disabled. It is expected that the caller is shutting 4656 * down multiple VSIs at once and will delay together for all the VSIs after 4657 * initiating the shutdown. This is particularly useful for shutting down lots 4658 * of VFs together. Otherwise, a large delay can be incurred while configuring 4659 * each VSI in serial. 4660 **/ 4661 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi) 4662 { 4663 struct i40e_pf *pf = vsi->back; 4664 int i, pf_q; 4665 4666 pf_q = vsi->base_queue; 4667 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4668 i40e_control_tx_q(pf, pf_q, false); 4669 i40e_control_rx_q(pf, pf_q, false); 4670 } 4671 } 4672 4673 /** 4674 * i40e_vsi_free_irq - Free the irq association with the OS 4675 * @vsi: the VSI being configured 4676 **/ 4677 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 4678 { 4679 struct i40e_pf *pf = vsi->back; 4680 struct i40e_hw *hw = &pf->hw; 4681 int base = vsi->base_vector; 4682 u32 val, qp; 4683 int i; 4684 4685 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4686 if (!vsi->q_vectors) 4687 return; 4688 4689 if (!vsi->irqs_ready) 4690 return; 4691 4692 vsi->irqs_ready = false; 4693 for (i = 0; i < vsi->num_q_vectors; i++) { 4694 int irq_num; 4695 u16 vector; 4696 4697 vector = i + base; 4698 irq_num = pf->msix_entries[vector].vector; 4699 4700 /* free only the irqs that were actually requested */ 4701 if (!vsi->q_vectors[i] || 4702 !vsi->q_vectors[i]->num_ringpairs) 4703 continue; 4704 4705 /* clear the affinity notifier in the IRQ descriptor */ 4706 irq_set_affinity_notifier(irq_num, NULL); 4707 /* remove our suggested affinity mask for this IRQ */ 4708 irq_set_affinity_hint(irq_num, NULL); 4709 synchronize_irq(irq_num); 4710 free_irq(irq_num, vsi->q_vectors[i]); 4711 4712 /* Tear down the interrupt queue link list 4713 * 4714 * We know that they come in pairs and always 4715 * the Rx first, then the Tx. To clear the 4716 * link list, stick the EOL value into the 4717 * next_q field of the registers. 4718 */ 4719 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 4720 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4721 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4722 val |= I40E_QUEUE_END_OF_LIST 4723 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4724 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 4725 4726 while (qp != I40E_QUEUE_END_OF_LIST) { 4727 u32 next; 4728 4729 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4730 4731 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4732 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4733 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4734 I40E_QINT_RQCTL_INTEVENT_MASK); 4735 4736 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4737 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4738 4739 wr32(hw, I40E_QINT_RQCTL(qp), val); 4740 4741 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4742 4743 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 4744 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 4745 4746 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4747 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4748 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4749 I40E_QINT_TQCTL_INTEVENT_MASK); 4750 4751 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4752 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4753 4754 wr32(hw, I40E_QINT_TQCTL(qp), val); 4755 qp = next; 4756 } 4757 } 4758 } else { 4759 free_irq(pf->pdev->irq, pf); 4760 4761 val = rd32(hw, I40E_PFINT_LNKLST0); 4762 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4763 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4764 val |= I40E_QUEUE_END_OF_LIST 4765 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 4766 wr32(hw, I40E_PFINT_LNKLST0, val); 4767 4768 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4769 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4770 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4771 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4772 I40E_QINT_RQCTL_INTEVENT_MASK); 4773 4774 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4775 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4776 4777 wr32(hw, I40E_QINT_RQCTL(qp), val); 4778 4779 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4780 4781 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4782 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4783 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4784 I40E_QINT_TQCTL_INTEVENT_MASK); 4785 4786 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4787 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4788 4789 wr32(hw, I40E_QINT_TQCTL(qp), val); 4790 } 4791 } 4792 4793 /** 4794 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 4795 * @vsi: the VSI being configured 4796 * @v_idx: Index of vector to be freed 4797 * 4798 * This function frees the memory allocated to the q_vector. In addition if 4799 * NAPI is enabled it will delete any references to the NAPI struct prior 4800 * to freeing the q_vector. 4801 **/ 4802 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 4803 { 4804 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4805 struct i40e_ring *ring; 4806 4807 if (!q_vector) 4808 return; 4809 4810 /* disassociate q_vector from rings */ 4811 i40e_for_each_ring(ring, q_vector->tx) 4812 ring->q_vector = NULL; 4813 4814 i40e_for_each_ring(ring, q_vector->rx) 4815 ring->q_vector = NULL; 4816 4817 /* only VSI w/ an associated netdev is set up w/ NAPI */ 4818 if (vsi->netdev) 4819 netif_napi_del(&q_vector->napi); 4820 4821 vsi->q_vectors[v_idx] = NULL; 4822 4823 kfree_rcu(q_vector, rcu); 4824 } 4825 4826 /** 4827 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 4828 * @vsi: the VSI being un-configured 4829 * 4830 * This frees the memory allocated to the q_vectors and 4831 * deletes references to the NAPI struct. 4832 **/ 4833 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 4834 { 4835 int v_idx; 4836 4837 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 4838 i40e_free_q_vector(vsi, v_idx); 4839 } 4840 4841 /** 4842 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 4843 * @pf: board private structure 4844 **/ 4845 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 4846 { 4847 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 4848 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4849 pci_disable_msix(pf->pdev); 4850 kfree(pf->msix_entries); 4851 pf->msix_entries = NULL; 4852 kfree(pf->irq_pile); 4853 pf->irq_pile = NULL; 4854 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 4855 pci_disable_msi(pf->pdev); 4856 } 4857 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 4858 } 4859 4860 /** 4861 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 4862 * @pf: board private structure 4863 * 4864 * We go through and clear interrupt specific resources and reset the structure 4865 * to pre-load conditions 4866 **/ 4867 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 4868 { 4869 int i; 4870 4871 i40e_free_misc_vector(pf); 4872 4873 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, 4874 I40E_IWARP_IRQ_PILE_ID); 4875 4876 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 4877 for (i = 0; i < pf->num_alloc_vsi; i++) 4878 if (pf->vsi[i]) 4879 i40e_vsi_free_q_vectors(pf->vsi[i]); 4880 i40e_reset_interrupt_capability(pf); 4881 } 4882 4883 /** 4884 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 4885 * @vsi: the VSI being configured 4886 **/ 4887 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 4888 { 4889 int q_idx; 4890 4891 if (!vsi->netdev) 4892 return; 4893 4894 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { 4895 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; 4896 4897 if (q_vector->rx.ring || q_vector->tx.ring) 4898 napi_enable(&q_vector->napi); 4899 } 4900 } 4901 4902 /** 4903 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 4904 * @vsi: the VSI being configured 4905 **/ 4906 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 4907 { 4908 int q_idx; 4909 4910 if (!vsi->netdev) 4911 return; 4912 4913 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { 4914 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; 4915 4916 if (q_vector->rx.ring || q_vector->tx.ring) 4917 napi_disable(&q_vector->napi); 4918 } 4919 } 4920 4921 /** 4922 * i40e_vsi_close - Shut down a VSI 4923 * @vsi: the vsi to be quelled 4924 **/ 4925 static void i40e_vsi_close(struct i40e_vsi *vsi) 4926 { 4927 struct i40e_pf *pf = vsi->back; 4928 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state)) 4929 i40e_down(vsi); 4930 i40e_vsi_free_irq(vsi); 4931 i40e_vsi_free_tx_resources(vsi); 4932 i40e_vsi_free_rx_resources(vsi); 4933 vsi->current_netdev_flags = 0; 4934 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state); 4935 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 4936 set_bit(__I40E_CLIENT_RESET, pf->state); 4937 } 4938 4939 /** 4940 * i40e_quiesce_vsi - Pause a given VSI 4941 * @vsi: the VSI being paused 4942 **/ 4943 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 4944 { 4945 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 4946 return; 4947 4948 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state); 4949 if (vsi->netdev && netif_running(vsi->netdev)) 4950 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 4951 else 4952 i40e_vsi_close(vsi); 4953 } 4954 4955 /** 4956 * i40e_unquiesce_vsi - Resume a given VSI 4957 * @vsi: the VSI being resumed 4958 **/ 4959 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 4960 { 4961 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state)) 4962 return; 4963 4964 if (vsi->netdev && netif_running(vsi->netdev)) 4965 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 4966 else 4967 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 4968 } 4969 4970 /** 4971 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 4972 * @pf: the PF 4973 **/ 4974 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 4975 { 4976 int v; 4977 4978 for (v = 0; v < pf->num_alloc_vsi; v++) { 4979 if (pf->vsi[v]) 4980 i40e_quiesce_vsi(pf->vsi[v]); 4981 } 4982 } 4983 4984 /** 4985 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 4986 * @pf: the PF 4987 **/ 4988 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 4989 { 4990 int v; 4991 4992 for (v = 0; v < pf->num_alloc_vsi; v++) { 4993 if (pf->vsi[v]) 4994 i40e_unquiesce_vsi(pf->vsi[v]); 4995 } 4996 } 4997 4998 /** 4999 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled 5000 * @vsi: the VSI being configured 5001 * 5002 * Wait until all queues on a given VSI have been disabled. 5003 **/ 5004 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi) 5005 { 5006 struct i40e_pf *pf = vsi->back; 5007 int i, pf_q, ret; 5008 5009 pf_q = vsi->base_queue; 5010 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 5011 /* Check and wait for the Tx queue */ 5012 ret = i40e_pf_txq_wait(pf, pf_q, false); 5013 if (ret) { 5014 dev_info(&pf->pdev->dev, 5015 "VSI seid %d Tx ring %d disable timeout\n", 5016 vsi->seid, pf_q); 5017 return ret; 5018 } 5019 5020 if (!i40e_enabled_xdp_vsi(vsi)) 5021 goto wait_rx; 5022 5023 /* Check and wait for the XDP Tx queue */ 5024 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs, 5025 false); 5026 if (ret) { 5027 dev_info(&pf->pdev->dev, 5028 "VSI seid %d XDP Tx ring %d disable timeout\n", 5029 vsi->seid, pf_q); 5030 return ret; 5031 } 5032 wait_rx: 5033 /* Check and wait for the Rx queue */ 5034 ret = i40e_pf_rxq_wait(pf, pf_q, false); 5035 if (ret) { 5036 dev_info(&pf->pdev->dev, 5037 "VSI seid %d Rx ring %d disable timeout\n", 5038 vsi->seid, pf_q); 5039 return ret; 5040 } 5041 } 5042 5043 return 0; 5044 } 5045 5046 #ifdef CONFIG_I40E_DCB 5047 /** 5048 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled 5049 * @pf: the PF 5050 * 5051 * This function waits for the queues to be in disabled state for all the 5052 * VSIs that are managed by this PF. 5053 **/ 5054 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf) 5055 { 5056 int v, ret = 0; 5057 5058 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 5059 if (pf->vsi[v]) { 5060 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); 5061 if (ret) 5062 break; 5063 } 5064 } 5065 5066 return ret; 5067 } 5068 5069 #endif 5070 5071 /** 5072 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 5073 * @pf: pointer to PF 5074 * 5075 * Get TC map for ISCSI PF type that will include iSCSI TC 5076 * and LAN TC. 5077 **/ 5078 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 5079 { 5080 struct i40e_dcb_app_priority_table app; 5081 struct i40e_hw *hw = &pf->hw; 5082 u8 enabled_tc = 1; /* TC0 is always enabled */ 5083 u8 tc, i; 5084 /* Get the iSCSI APP TLV */ 5085 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 5086 5087 for (i = 0; i < dcbcfg->numapps; i++) { 5088 app = dcbcfg->app[i]; 5089 if (app.selector == I40E_APP_SEL_TCPIP && 5090 app.protocolid == I40E_APP_PROTOID_ISCSI) { 5091 tc = dcbcfg->etscfg.prioritytable[app.priority]; 5092 enabled_tc |= BIT(tc); 5093 break; 5094 } 5095 } 5096 5097 return enabled_tc; 5098 } 5099 5100 /** 5101 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 5102 * @dcbcfg: the corresponding DCBx configuration structure 5103 * 5104 * Return the number of TCs from given DCBx configuration 5105 **/ 5106 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 5107 { 5108 int i, tc_unused = 0; 5109 u8 num_tc = 0; 5110 u8 ret = 0; 5111 5112 /* Scan the ETS Config Priority Table to find 5113 * traffic class enabled for a given priority 5114 * and create a bitmask of enabled TCs 5115 */ 5116 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 5117 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]); 5118 5119 /* Now scan the bitmask to check for 5120 * contiguous TCs starting with TC0 5121 */ 5122 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5123 if (num_tc & BIT(i)) { 5124 if (!tc_unused) { 5125 ret++; 5126 } else { 5127 pr_err("Non-contiguous TC - Disabling DCB\n"); 5128 return 1; 5129 } 5130 } else { 5131 tc_unused = 1; 5132 } 5133 } 5134 5135 /* There is always at least TC0 */ 5136 if (!ret) 5137 ret = 1; 5138 5139 return ret; 5140 } 5141 5142 /** 5143 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 5144 * @dcbcfg: the corresponding DCBx configuration structure 5145 * 5146 * Query the current DCB configuration and return the number of 5147 * traffic classes enabled from the given DCBX config 5148 **/ 5149 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 5150 { 5151 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 5152 u8 enabled_tc = 1; 5153 u8 i; 5154 5155 for (i = 0; i < num_tc; i++) 5156 enabled_tc |= BIT(i); 5157 5158 return enabled_tc; 5159 } 5160 5161 /** 5162 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes 5163 * @pf: PF being queried 5164 * 5165 * Query the current MQPRIO configuration and return the number of 5166 * traffic classes enabled. 5167 **/ 5168 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf) 5169 { 5170 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5171 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc; 5172 u8 enabled_tc = 1, i; 5173 5174 for (i = 1; i < num_tc; i++) 5175 enabled_tc |= BIT(i); 5176 return enabled_tc; 5177 } 5178 5179 /** 5180 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 5181 * @pf: PF being queried 5182 * 5183 * Return number of traffic classes enabled for the given PF 5184 **/ 5185 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 5186 { 5187 struct i40e_hw *hw = &pf->hw; 5188 u8 i, enabled_tc = 1; 5189 u8 num_tc = 0; 5190 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 5191 5192 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5193 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc; 5194 5195 /* If neither MQPRIO nor DCB is enabled, then always use single TC */ 5196 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 5197 return 1; 5198 5199 /* SFP mode will be enabled for all TCs on port */ 5200 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 5201 return i40e_dcb_get_num_tc(dcbcfg); 5202 5203 /* MFP mode return count of enabled TCs for this PF */ 5204 if (pf->hw.func_caps.iscsi) 5205 enabled_tc = i40e_get_iscsi_tc_map(pf); 5206 else 5207 return 1; /* Only TC0 */ 5208 5209 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5210 if (enabled_tc & BIT(i)) 5211 num_tc++; 5212 } 5213 return num_tc; 5214 } 5215 5216 /** 5217 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes 5218 * @pf: PF being queried 5219 * 5220 * Return a bitmap for enabled traffic classes for this PF. 5221 **/ 5222 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 5223 { 5224 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5225 return i40e_mqprio_get_enabled_tc(pf); 5226 5227 /* If neither MQPRIO nor DCB is enabled for this PF then just return 5228 * default TC 5229 */ 5230 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 5231 return I40E_DEFAULT_TRAFFIC_CLASS; 5232 5233 /* SFP mode we want PF to be enabled for all TCs */ 5234 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 5235 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 5236 5237 /* MFP enabled and iSCSI PF type */ 5238 if (pf->hw.func_caps.iscsi) 5239 return i40e_get_iscsi_tc_map(pf); 5240 else 5241 return I40E_DEFAULT_TRAFFIC_CLASS; 5242 } 5243 5244 /** 5245 * i40e_vsi_get_bw_info - Query VSI BW Information 5246 * @vsi: the VSI being queried 5247 * 5248 * Returns 0 on success, negative value on failure 5249 **/ 5250 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 5251 { 5252 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 5253 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 5254 struct i40e_pf *pf = vsi->back; 5255 struct i40e_hw *hw = &pf->hw; 5256 i40e_status ret; 5257 u32 tc_bw_max; 5258 int i; 5259 5260 /* Get the VSI level BW configuration */ 5261 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 5262 if (ret) { 5263 dev_info(&pf->pdev->dev, 5264 "couldn't get PF vsi bw config, err %s aq_err %s\n", 5265 i40e_stat_str(&pf->hw, ret), 5266 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5267 return -EINVAL; 5268 } 5269 5270 /* Get the VSI level BW configuration per TC */ 5271 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 5272 NULL); 5273 if (ret) { 5274 dev_info(&pf->pdev->dev, 5275 "couldn't get PF vsi ets bw config, err %s aq_err %s\n", 5276 i40e_stat_str(&pf->hw, ret), 5277 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5278 return -EINVAL; 5279 } 5280 5281 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 5282 dev_info(&pf->pdev->dev, 5283 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 5284 bw_config.tc_valid_bits, 5285 bw_ets_config.tc_valid_bits); 5286 /* Still continuing */ 5287 } 5288 5289 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 5290 vsi->bw_max_quanta = bw_config.max_bw; 5291 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 5292 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 5293 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5294 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 5295 vsi->bw_ets_limit_credits[i] = 5296 le16_to_cpu(bw_ets_config.credits[i]); 5297 /* 3 bits out of 4 for each TC */ 5298 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 5299 } 5300 5301 return 0; 5302 } 5303 5304 /** 5305 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 5306 * @vsi: the VSI being configured 5307 * @enabled_tc: TC bitmap 5308 * @bw_share: BW shared credits per TC 5309 * 5310 * Returns 0 on success, negative value on failure 5311 **/ 5312 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 5313 u8 *bw_share) 5314 { 5315 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 5316 struct i40e_pf *pf = vsi->back; 5317 i40e_status ret; 5318 int i; 5319 5320 /* There is no need to reset BW when mqprio mode is on. */ 5321 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5322 return 0; 5323 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) { 5324 ret = i40e_set_bw_limit(vsi, vsi->seid, 0); 5325 if (ret) 5326 dev_info(&pf->pdev->dev, 5327 "Failed to reset tx rate for vsi->seid %u\n", 5328 vsi->seid); 5329 return ret; 5330 } 5331 memset(&bw_data, 0, sizeof(bw_data)); 5332 bw_data.tc_valid_bits = enabled_tc; 5333 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5334 bw_data.tc_bw_credits[i] = bw_share[i]; 5335 5336 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL); 5337 if (ret) { 5338 dev_info(&pf->pdev->dev, 5339 "AQ command Config VSI BW allocation per TC failed = %d\n", 5340 pf->hw.aq.asq_last_status); 5341 return -EINVAL; 5342 } 5343 5344 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5345 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 5346 5347 return 0; 5348 } 5349 5350 /** 5351 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 5352 * @vsi: the VSI being configured 5353 * @enabled_tc: TC map to be enabled 5354 * 5355 **/ 5356 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 5357 { 5358 struct net_device *netdev = vsi->netdev; 5359 struct i40e_pf *pf = vsi->back; 5360 struct i40e_hw *hw = &pf->hw; 5361 u8 netdev_tc = 0; 5362 int i; 5363 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 5364 5365 if (!netdev) 5366 return; 5367 5368 if (!enabled_tc) { 5369 netdev_reset_tc(netdev); 5370 return; 5371 } 5372 5373 /* Set up actual enabled TCs on the VSI */ 5374 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 5375 return; 5376 5377 /* set per TC queues for the VSI */ 5378 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5379 /* Only set TC queues for enabled tcs 5380 * 5381 * e.g. For a VSI that has TC0 and TC3 enabled the 5382 * enabled_tc bitmap would be 0x00001001; the driver 5383 * will set the numtc for netdev as 2 that will be 5384 * referenced by the netdev layer as TC 0 and 1. 5385 */ 5386 if (vsi->tc_config.enabled_tc & BIT(i)) 5387 netdev_set_tc_queue(netdev, 5388 vsi->tc_config.tc_info[i].netdev_tc, 5389 vsi->tc_config.tc_info[i].qcount, 5390 vsi->tc_config.tc_info[i].qoffset); 5391 } 5392 5393 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5394 return; 5395 5396 /* Assign UP2TC map for the VSI */ 5397 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 5398 /* Get the actual TC# for the UP */ 5399 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 5400 /* Get the mapped netdev TC# for the UP */ 5401 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 5402 netdev_set_prio_tc_map(netdev, i, netdev_tc); 5403 } 5404 } 5405 5406 /** 5407 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 5408 * @vsi: the VSI being configured 5409 * @ctxt: the ctxt buffer returned from AQ VSI update param command 5410 **/ 5411 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 5412 struct i40e_vsi_context *ctxt) 5413 { 5414 /* copy just the sections touched not the entire info 5415 * since not all sections are valid as returned by 5416 * update vsi params 5417 */ 5418 vsi->info.mapping_flags = ctxt->info.mapping_flags; 5419 memcpy(&vsi->info.queue_mapping, 5420 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 5421 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 5422 sizeof(vsi->info.tc_mapping)); 5423 } 5424 5425 /** 5426 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 5427 * @vsi: VSI to be configured 5428 * @enabled_tc: TC bitmap 5429 * 5430 * This configures a particular VSI for TCs that are mapped to the 5431 * given TC bitmap. It uses default bandwidth share for TCs across 5432 * VSIs to configure TC for a particular VSI. 5433 * 5434 * NOTE: 5435 * It is expected that the VSI queues have been quisced before calling 5436 * this function. 5437 **/ 5438 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 5439 { 5440 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 5441 struct i40e_pf *pf = vsi->back; 5442 struct i40e_hw *hw = &pf->hw; 5443 struct i40e_vsi_context ctxt; 5444 int ret = 0; 5445 int i; 5446 5447 /* Check if enabled_tc is same as existing or new TCs */ 5448 if (vsi->tc_config.enabled_tc == enabled_tc && 5449 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 5450 return ret; 5451 5452 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 5453 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5454 if (enabled_tc & BIT(i)) 5455 bw_share[i] = 1; 5456 } 5457 5458 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 5459 if (ret) { 5460 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 5461 5462 dev_info(&pf->pdev->dev, 5463 "Failed configuring TC map %d for VSI %d\n", 5464 enabled_tc, vsi->seid); 5465 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, 5466 &bw_config, NULL); 5467 if (ret) { 5468 dev_info(&pf->pdev->dev, 5469 "Failed querying vsi bw info, err %s aq_err %s\n", 5470 i40e_stat_str(hw, ret), 5471 i40e_aq_str(hw, hw->aq.asq_last_status)); 5472 goto out; 5473 } 5474 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) { 5475 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc; 5476 5477 if (!valid_tc) 5478 valid_tc = bw_config.tc_valid_bits; 5479 /* Always enable TC0, no matter what */ 5480 valid_tc |= 1; 5481 dev_info(&pf->pdev->dev, 5482 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n", 5483 enabled_tc, bw_config.tc_valid_bits, valid_tc); 5484 enabled_tc = valid_tc; 5485 } 5486 5487 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 5488 if (ret) { 5489 dev_err(&pf->pdev->dev, 5490 "Unable to configure TC map %d for VSI %d\n", 5491 enabled_tc, vsi->seid); 5492 goto out; 5493 } 5494 } 5495 5496 /* Update Queue Pairs Mapping for currently enabled UPs */ 5497 ctxt.seid = vsi->seid; 5498 ctxt.pf_num = vsi->back->hw.pf_id; 5499 ctxt.vf_num = 0; 5500 ctxt.uplink_seid = vsi->uplink_seid; 5501 ctxt.info = vsi->info; 5502 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) { 5503 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc); 5504 if (ret) 5505 goto out; 5506 } else { 5507 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 5508 } 5509 5510 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled 5511 * queues changed. 5512 */ 5513 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) { 5514 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size, 5515 vsi->num_queue_pairs); 5516 ret = i40e_vsi_config_rss(vsi); 5517 if (ret) { 5518 dev_info(&vsi->back->pdev->dev, 5519 "Failed to reconfig rss for num_queues\n"); 5520 return ret; 5521 } 5522 vsi->reconfig_rss = false; 5523 } 5524 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 5525 ctxt.info.valid_sections |= 5526 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 5527 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA; 5528 } 5529 5530 /* Update the VSI after updating the VSI queue-mapping 5531 * information 5532 */ 5533 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 5534 if (ret) { 5535 dev_info(&pf->pdev->dev, 5536 "Update vsi tc config failed, err %s aq_err %s\n", 5537 i40e_stat_str(hw, ret), 5538 i40e_aq_str(hw, hw->aq.asq_last_status)); 5539 goto out; 5540 } 5541 /* update the local VSI info with updated queue map */ 5542 i40e_vsi_update_queue_map(vsi, &ctxt); 5543 vsi->info.valid_sections = 0; 5544 5545 /* Update current VSI BW information */ 5546 ret = i40e_vsi_get_bw_info(vsi); 5547 if (ret) { 5548 dev_info(&pf->pdev->dev, 5549 "Failed updating vsi bw info, err %s aq_err %s\n", 5550 i40e_stat_str(hw, ret), 5551 i40e_aq_str(hw, hw->aq.asq_last_status)); 5552 goto out; 5553 } 5554 5555 /* Update the netdev TC setup */ 5556 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 5557 out: 5558 return ret; 5559 } 5560 5561 /** 5562 * i40e_get_link_speed - Returns link speed for the interface 5563 * @vsi: VSI to be configured 5564 * 5565 **/ 5566 static int i40e_get_link_speed(struct i40e_vsi *vsi) 5567 { 5568 struct i40e_pf *pf = vsi->back; 5569 5570 switch (pf->hw.phy.link_info.link_speed) { 5571 case I40E_LINK_SPEED_40GB: 5572 return 40000; 5573 case I40E_LINK_SPEED_25GB: 5574 return 25000; 5575 case I40E_LINK_SPEED_20GB: 5576 return 20000; 5577 case I40E_LINK_SPEED_10GB: 5578 return 10000; 5579 case I40E_LINK_SPEED_1GB: 5580 return 1000; 5581 default: 5582 return -EINVAL; 5583 } 5584 } 5585 5586 /** 5587 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate 5588 * @vsi: VSI to be configured 5589 * @seid: seid of the channel/VSI 5590 * @max_tx_rate: max TX rate to be configured as BW limit 5591 * 5592 * Helper function to set BW limit for a given VSI 5593 **/ 5594 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate) 5595 { 5596 struct i40e_pf *pf = vsi->back; 5597 u64 credits = 0; 5598 int speed = 0; 5599 int ret = 0; 5600 5601 speed = i40e_get_link_speed(vsi); 5602 if (max_tx_rate > speed) { 5603 dev_err(&pf->pdev->dev, 5604 "Invalid max tx rate %llu specified for VSI seid %d.", 5605 max_tx_rate, seid); 5606 return -EINVAL; 5607 } 5608 if (max_tx_rate && max_tx_rate < 50) { 5609 dev_warn(&pf->pdev->dev, 5610 "Setting max tx rate to minimum usable value of 50Mbps.\n"); 5611 max_tx_rate = 50; 5612 } 5613 5614 /* Tx rate credits are in values of 50Mbps, 0 is disabled */ 5615 credits = max_tx_rate; 5616 do_div(credits, I40E_BW_CREDIT_DIVISOR); 5617 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits, 5618 I40E_MAX_BW_INACTIVE_ACCUM, NULL); 5619 if (ret) 5620 dev_err(&pf->pdev->dev, 5621 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n", 5622 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret), 5623 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5624 return ret; 5625 } 5626 5627 /** 5628 * i40e_remove_queue_channels - Remove queue channels for the TCs 5629 * @vsi: VSI to be configured 5630 * 5631 * Remove queue channels for the TCs 5632 **/ 5633 static void i40e_remove_queue_channels(struct i40e_vsi *vsi) 5634 { 5635 enum i40e_admin_queue_err last_aq_status; 5636 struct i40e_cloud_filter *cfilter; 5637 struct i40e_channel *ch, *ch_tmp; 5638 struct i40e_pf *pf = vsi->back; 5639 struct hlist_node *node; 5640 int ret, i; 5641 5642 /* Reset rss size that was stored when reconfiguring rss for 5643 * channel VSIs with non-power-of-2 queue count. 5644 */ 5645 vsi->current_rss_size = 0; 5646 5647 /* perform cleanup for channels if they exist */ 5648 if (list_empty(&vsi->ch_list)) 5649 return; 5650 5651 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5652 struct i40e_vsi *p_vsi; 5653 5654 list_del(&ch->list); 5655 p_vsi = ch->parent_vsi; 5656 if (!p_vsi || !ch->initialized) { 5657 kfree(ch); 5658 continue; 5659 } 5660 /* Reset queue contexts */ 5661 for (i = 0; i < ch->num_queue_pairs; i++) { 5662 struct i40e_ring *tx_ring, *rx_ring; 5663 u16 pf_q; 5664 5665 pf_q = ch->base_queue + i; 5666 tx_ring = vsi->tx_rings[pf_q]; 5667 tx_ring->ch = NULL; 5668 5669 rx_ring = vsi->rx_rings[pf_q]; 5670 rx_ring->ch = NULL; 5671 } 5672 5673 /* Reset BW configured for this VSI via mqprio */ 5674 ret = i40e_set_bw_limit(vsi, ch->seid, 0); 5675 if (ret) 5676 dev_info(&vsi->back->pdev->dev, 5677 "Failed to reset tx rate for ch->seid %u\n", 5678 ch->seid); 5679 5680 /* delete cloud filters associated with this channel */ 5681 hlist_for_each_entry_safe(cfilter, node, 5682 &pf->cloud_filter_list, cloud_node) { 5683 if (cfilter->seid != ch->seid) 5684 continue; 5685 5686 hash_del(&cfilter->cloud_node); 5687 if (cfilter->dst_port) 5688 ret = i40e_add_del_cloud_filter_big_buf(vsi, 5689 cfilter, 5690 false); 5691 else 5692 ret = i40e_add_del_cloud_filter(vsi, cfilter, 5693 false); 5694 last_aq_status = pf->hw.aq.asq_last_status; 5695 if (ret) 5696 dev_info(&pf->pdev->dev, 5697 "Failed to delete cloud filter, err %s aq_err %s\n", 5698 i40e_stat_str(&pf->hw, ret), 5699 i40e_aq_str(&pf->hw, last_aq_status)); 5700 kfree(cfilter); 5701 } 5702 5703 /* delete VSI from FW */ 5704 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid, 5705 NULL); 5706 if (ret) 5707 dev_err(&vsi->back->pdev->dev, 5708 "unable to remove channel (%d) for parent VSI(%d)\n", 5709 ch->seid, p_vsi->seid); 5710 kfree(ch); 5711 } 5712 INIT_LIST_HEAD(&vsi->ch_list); 5713 } 5714 5715 /** 5716 * i40e_is_any_channel - channel exist or not 5717 * @vsi: ptr to VSI to which channels are associated with 5718 * 5719 * Returns true or false if channel(s) exist for associated VSI or not 5720 **/ 5721 static bool i40e_is_any_channel(struct i40e_vsi *vsi) 5722 { 5723 struct i40e_channel *ch, *ch_tmp; 5724 5725 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5726 if (ch->initialized) 5727 return true; 5728 } 5729 5730 return false; 5731 } 5732 5733 /** 5734 * i40e_get_max_queues_for_channel 5735 * @vsi: ptr to VSI to which channels are associated with 5736 * 5737 * Helper function which returns max value among the queue counts set on the 5738 * channels/TCs created. 5739 **/ 5740 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi) 5741 { 5742 struct i40e_channel *ch, *ch_tmp; 5743 int max = 0; 5744 5745 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5746 if (!ch->initialized) 5747 continue; 5748 if (ch->num_queue_pairs > max) 5749 max = ch->num_queue_pairs; 5750 } 5751 5752 return max; 5753 } 5754 5755 /** 5756 * i40e_validate_num_queues - validate num_queues w.r.t channel 5757 * @pf: ptr to PF device 5758 * @num_queues: number of queues 5759 * @vsi: the parent VSI 5760 * @reconfig_rss: indicates should the RSS be reconfigured or not 5761 * 5762 * This function validates number of queues in the context of new channel 5763 * which is being established and determines if RSS should be reconfigured 5764 * or not for parent VSI. 5765 **/ 5766 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues, 5767 struct i40e_vsi *vsi, bool *reconfig_rss) 5768 { 5769 int max_ch_queues; 5770 5771 if (!reconfig_rss) 5772 return -EINVAL; 5773 5774 *reconfig_rss = false; 5775 if (vsi->current_rss_size) { 5776 if (num_queues > vsi->current_rss_size) { 5777 dev_dbg(&pf->pdev->dev, 5778 "Error: num_queues (%d) > vsi's current_size(%d)\n", 5779 num_queues, vsi->current_rss_size); 5780 return -EINVAL; 5781 } else if ((num_queues < vsi->current_rss_size) && 5782 (!is_power_of_2(num_queues))) { 5783 dev_dbg(&pf->pdev->dev, 5784 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n", 5785 num_queues, vsi->current_rss_size); 5786 return -EINVAL; 5787 } 5788 } 5789 5790 if (!is_power_of_2(num_queues)) { 5791 /* Find the max num_queues configured for channel if channel 5792 * exist. 5793 * if channel exist, then enforce 'num_queues' to be more than 5794 * max ever queues configured for channel. 5795 */ 5796 max_ch_queues = i40e_get_max_queues_for_channel(vsi); 5797 if (num_queues < max_ch_queues) { 5798 dev_dbg(&pf->pdev->dev, 5799 "Error: num_queues (%d) < max queues configured for channel(%d)\n", 5800 num_queues, max_ch_queues); 5801 return -EINVAL; 5802 } 5803 *reconfig_rss = true; 5804 } 5805 5806 return 0; 5807 } 5808 5809 /** 5810 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size 5811 * @vsi: the VSI being setup 5812 * @rss_size: size of RSS, accordingly LUT gets reprogrammed 5813 * 5814 * This function reconfigures RSS by reprogramming LUTs using 'rss_size' 5815 **/ 5816 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size) 5817 { 5818 struct i40e_pf *pf = vsi->back; 5819 u8 seed[I40E_HKEY_ARRAY_SIZE]; 5820 struct i40e_hw *hw = &pf->hw; 5821 int local_rss_size; 5822 u8 *lut; 5823 int ret; 5824 5825 if (!vsi->rss_size) 5826 return -EINVAL; 5827 5828 if (rss_size > vsi->rss_size) 5829 return -EINVAL; 5830 5831 local_rss_size = min_t(int, vsi->rss_size, rss_size); 5832 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 5833 if (!lut) 5834 return -ENOMEM; 5835 5836 /* Ignoring user configured lut if there is one */ 5837 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size); 5838 5839 /* Use user configured hash key if there is one, otherwise 5840 * use default. 5841 */ 5842 if (vsi->rss_hkey_user) 5843 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 5844 else 5845 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 5846 5847 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 5848 if (ret) { 5849 dev_info(&pf->pdev->dev, 5850 "Cannot set RSS lut, err %s aq_err %s\n", 5851 i40e_stat_str(hw, ret), 5852 i40e_aq_str(hw, hw->aq.asq_last_status)); 5853 kfree(lut); 5854 return ret; 5855 } 5856 kfree(lut); 5857 5858 /* Do the update w.r.t. storing rss_size */ 5859 if (!vsi->orig_rss_size) 5860 vsi->orig_rss_size = vsi->rss_size; 5861 vsi->current_rss_size = local_rss_size; 5862 5863 return ret; 5864 } 5865 5866 /** 5867 * i40e_channel_setup_queue_map - Setup a channel queue map 5868 * @pf: ptr to PF device 5869 * @ctxt: VSI context structure 5870 * @ch: ptr to channel structure 5871 * 5872 * Setup queue map for a specific channel 5873 **/ 5874 static void i40e_channel_setup_queue_map(struct i40e_pf *pf, 5875 struct i40e_vsi_context *ctxt, 5876 struct i40e_channel *ch) 5877 { 5878 u16 qcount, qmap, sections = 0; 5879 u8 offset = 0; 5880 int pow; 5881 5882 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 5883 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 5884 5885 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix); 5886 ch->num_queue_pairs = qcount; 5887 5888 /* find the next higher power-of-2 of num queue pairs */ 5889 pow = ilog2(qcount); 5890 if (!is_power_of_2(qcount)) 5891 pow++; 5892 5893 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 5894 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 5895 5896 /* Setup queue TC[0].qmap for given VSI context */ 5897 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 5898 5899 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */ 5900 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 5901 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue); 5902 ctxt->info.valid_sections |= cpu_to_le16(sections); 5903 } 5904 5905 /** 5906 * i40e_add_channel - add a channel by adding VSI 5907 * @pf: ptr to PF device 5908 * @uplink_seid: underlying HW switching element (VEB) ID 5909 * @ch: ptr to channel structure 5910 * 5911 * Add a channel (VSI) using add_vsi and queue_map 5912 **/ 5913 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid, 5914 struct i40e_channel *ch) 5915 { 5916 struct i40e_hw *hw = &pf->hw; 5917 struct i40e_vsi_context ctxt; 5918 u8 enabled_tc = 0x1; /* TC0 enabled */ 5919 int ret; 5920 5921 if (ch->type != I40E_VSI_VMDQ2) { 5922 dev_info(&pf->pdev->dev, 5923 "add new vsi failed, ch->type %d\n", ch->type); 5924 return -EINVAL; 5925 } 5926 5927 memset(&ctxt, 0, sizeof(ctxt)); 5928 ctxt.pf_num = hw->pf_id; 5929 ctxt.vf_num = 0; 5930 ctxt.uplink_seid = uplink_seid; 5931 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 5932 if (ch->type == I40E_VSI_VMDQ2) 5933 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 5934 5935 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) { 5936 ctxt.info.valid_sections |= 5937 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 5938 ctxt.info.switch_id = 5939 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 5940 } 5941 5942 /* Set queue map for a given VSI context */ 5943 i40e_channel_setup_queue_map(pf, &ctxt, ch); 5944 5945 /* Now time to create VSI */ 5946 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 5947 if (ret) { 5948 dev_info(&pf->pdev->dev, 5949 "add new vsi failed, err %s aq_err %s\n", 5950 i40e_stat_str(&pf->hw, ret), 5951 i40e_aq_str(&pf->hw, 5952 pf->hw.aq.asq_last_status)); 5953 return -ENOENT; 5954 } 5955 5956 /* Success, update channel, set enabled_tc only if the channel 5957 * is not a macvlan 5958 */ 5959 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc; 5960 ch->seid = ctxt.seid; 5961 ch->vsi_number = ctxt.vsi_number; 5962 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx); 5963 5964 /* copy just the sections touched not the entire info 5965 * since not all sections are valid as returned by 5966 * update vsi params 5967 */ 5968 ch->info.mapping_flags = ctxt.info.mapping_flags; 5969 memcpy(&ch->info.queue_mapping, 5970 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping)); 5971 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping, 5972 sizeof(ctxt.info.tc_mapping)); 5973 5974 return 0; 5975 } 5976 5977 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch, 5978 u8 *bw_share) 5979 { 5980 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 5981 i40e_status ret; 5982 int i; 5983 5984 memset(&bw_data, 0, sizeof(bw_data)); 5985 bw_data.tc_valid_bits = ch->enabled_tc; 5986 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5987 bw_data.tc_bw_credits[i] = bw_share[i]; 5988 5989 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid, 5990 &bw_data, NULL); 5991 if (ret) { 5992 dev_info(&vsi->back->pdev->dev, 5993 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n", 5994 vsi->back->hw.aq.asq_last_status, ch->seid); 5995 return -EINVAL; 5996 } 5997 5998 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5999 ch->info.qs_handle[i] = bw_data.qs_handles[i]; 6000 6001 return 0; 6002 } 6003 6004 /** 6005 * i40e_channel_config_tx_ring - config TX ring associated with new channel 6006 * @pf: ptr to PF device 6007 * @vsi: the VSI being setup 6008 * @ch: ptr to channel structure 6009 * 6010 * Configure TX rings associated with channel (VSI) since queues are being 6011 * from parent VSI. 6012 **/ 6013 static int i40e_channel_config_tx_ring(struct i40e_pf *pf, 6014 struct i40e_vsi *vsi, 6015 struct i40e_channel *ch) 6016 { 6017 i40e_status ret; 6018 int i; 6019 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 6020 6021 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 6022 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6023 if (ch->enabled_tc & BIT(i)) 6024 bw_share[i] = 1; 6025 } 6026 6027 /* configure BW for new VSI */ 6028 ret = i40e_channel_config_bw(vsi, ch, bw_share); 6029 if (ret) { 6030 dev_info(&vsi->back->pdev->dev, 6031 "Failed configuring TC map %d for channel (seid %u)\n", 6032 ch->enabled_tc, ch->seid); 6033 return ret; 6034 } 6035 6036 for (i = 0; i < ch->num_queue_pairs; i++) { 6037 struct i40e_ring *tx_ring, *rx_ring; 6038 u16 pf_q; 6039 6040 pf_q = ch->base_queue + i; 6041 6042 /* Get to TX ring ptr of main VSI, for re-setup TX queue 6043 * context 6044 */ 6045 tx_ring = vsi->tx_rings[pf_q]; 6046 tx_ring->ch = ch; 6047 6048 /* Get the RX ring ptr */ 6049 rx_ring = vsi->rx_rings[pf_q]; 6050 rx_ring->ch = ch; 6051 } 6052 6053 return 0; 6054 } 6055 6056 /** 6057 * i40e_setup_hw_channel - setup new channel 6058 * @pf: ptr to PF device 6059 * @vsi: the VSI being setup 6060 * @ch: ptr to channel structure 6061 * @uplink_seid: underlying HW switching element (VEB) ID 6062 * @type: type of channel to be created (VMDq2/VF) 6063 * 6064 * Setup new channel (VSI) based on specified type (VMDq2/VF) 6065 * and configures TX rings accordingly 6066 **/ 6067 static inline int i40e_setup_hw_channel(struct i40e_pf *pf, 6068 struct i40e_vsi *vsi, 6069 struct i40e_channel *ch, 6070 u16 uplink_seid, u8 type) 6071 { 6072 int ret; 6073 6074 ch->initialized = false; 6075 ch->base_queue = vsi->next_base_queue; 6076 ch->type = type; 6077 6078 /* Proceed with creation of channel (VMDq2) VSI */ 6079 ret = i40e_add_channel(pf, uplink_seid, ch); 6080 if (ret) { 6081 dev_info(&pf->pdev->dev, 6082 "failed to add_channel using uplink_seid %u\n", 6083 uplink_seid); 6084 return ret; 6085 } 6086 6087 /* Mark the successful creation of channel */ 6088 ch->initialized = true; 6089 6090 /* Reconfigure TX queues using QTX_CTL register */ 6091 ret = i40e_channel_config_tx_ring(pf, vsi, ch); 6092 if (ret) { 6093 dev_info(&pf->pdev->dev, 6094 "failed to configure TX rings for channel %u\n", 6095 ch->seid); 6096 return ret; 6097 } 6098 6099 /* update 'next_base_queue' */ 6100 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs; 6101 dev_dbg(&pf->pdev->dev, 6102 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n", 6103 ch->seid, ch->vsi_number, ch->stat_counter_idx, 6104 ch->num_queue_pairs, 6105 vsi->next_base_queue); 6106 return ret; 6107 } 6108 6109 /** 6110 * i40e_setup_channel - setup new channel using uplink element 6111 * @pf: ptr to PF device 6112 * @vsi: pointer to the VSI to set up the channel within 6113 * @ch: ptr to channel structure 6114 * 6115 * Setup new channel (VSI) based on specified type (VMDq2/VF) 6116 * and uplink switching element (uplink_seid) 6117 **/ 6118 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi, 6119 struct i40e_channel *ch) 6120 { 6121 u8 vsi_type; 6122 u16 seid; 6123 int ret; 6124 6125 if (vsi->type == I40E_VSI_MAIN) { 6126 vsi_type = I40E_VSI_VMDQ2; 6127 } else { 6128 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n", 6129 vsi->type); 6130 return false; 6131 } 6132 6133 /* underlying switching element */ 6134 seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6135 6136 /* create channel (VSI), configure TX rings */ 6137 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type); 6138 if (ret) { 6139 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n"); 6140 return false; 6141 } 6142 6143 return ch->initialized ? true : false; 6144 } 6145 6146 /** 6147 * i40e_validate_and_set_switch_mode - sets up switch mode correctly 6148 * @vsi: ptr to VSI which has PF backing 6149 * 6150 * Sets up switch mode correctly if it needs to be changed and perform 6151 * what are allowed modes. 6152 **/ 6153 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi) 6154 { 6155 u8 mode; 6156 struct i40e_pf *pf = vsi->back; 6157 struct i40e_hw *hw = &pf->hw; 6158 int ret; 6159 6160 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities); 6161 if (ret) 6162 return -EINVAL; 6163 6164 if (hw->dev_caps.switch_mode) { 6165 /* if switch mode is set, support mode2 (non-tunneled for 6166 * cloud filter) for now 6167 */ 6168 u32 switch_mode = hw->dev_caps.switch_mode & 6169 I40E_SWITCH_MODE_MASK; 6170 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) { 6171 if (switch_mode == I40E_CLOUD_FILTER_MODE2) 6172 return 0; 6173 dev_err(&pf->pdev->dev, 6174 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n", 6175 hw->dev_caps.switch_mode); 6176 return -EINVAL; 6177 } 6178 } 6179 6180 /* Set Bit 7 to be valid */ 6181 mode = I40E_AQ_SET_SWITCH_BIT7_VALID; 6182 6183 /* Set L4type for TCP support */ 6184 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP; 6185 6186 /* Set cloud filter mode */ 6187 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL; 6188 6189 /* Prep mode field for set_switch_config */ 6190 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags, 6191 pf->last_sw_conf_valid_flags, 6192 mode, NULL); 6193 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH) 6194 dev_err(&pf->pdev->dev, 6195 "couldn't set switch config bits, err %s aq_err %s\n", 6196 i40e_stat_str(hw, ret), 6197 i40e_aq_str(hw, 6198 hw->aq.asq_last_status)); 6199 6200 return ret; 6201 } 6202 6203 /** 6204 * i40e_create_queue_channel - function to create channel 6205 * @vsi: VSI to be configured 6206 * @ch: ptr to channel (it contains channel specific params) 6207 * 6208 * This function creates channel (VSI) using num_queues specified by user, 6209 * reconfigs RSS if needed. 6210 **/ 6211 int i40e_create_queue_channel(struct i40e_vsi *vsi, 6212 struct i40e_channel *ch) 6213 { 6214 struct i40e_pf *pf = vsi->back; 6215 bool reconfig_rss; 6216 int err; 6217 6218 if (!ch) 6219 return -EINVAL; 6220 6221 if (!ch->num_queue_pairs) { 6222 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n", 6223 ch->num_queue_pairs); 6224 return -EINVAL; 6225 } 6226 6227 /* validate user requested num_queues for channel */ 6228 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi, 6229 &reconfig_rss); 6230 if (err) { 6231 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n", 6232 ch->num_queue_pairs); 6233 return -EINVAL; 6234 } 6235 6236 /* By default we are in VEPA mode, if this is the first VF/VMDq 6237 * VSI to be added switch to VEB mode. 6238 */ 6239 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) || 6240 (!i40e_is_any_channel(vsi))) { 6241 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) { 6242 dev_dbg(&pf->pdev->dev, 6243 "Failed to create channel. Override queues (%u) not power of 2\n", 6244 vsi->tc_config.tc_info[0].qcount); 6245 return -EINVAL; 6246 } 6247 6248 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 6249 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 6250 6251 if (vsi->type == I40E_VSI_MAIN) { 6252 if (pf->flags & I40E_FLAG_TC_MQPRIO) 6253 i40e_do_reset(pf, I40E_PF_RESET_FLAG, 6254 true); 6255 else 6256 i40e_do_reset_safe(pf, 6257 I40E_PF_RESET_FLAG); 6258 } 6259 } 6260 /* now onwards for main VSI, number of queues will be value 6261 * of TC0's queue count 6262 */ 6263 } 6264 6265 /* By this time, vsi->cnt_q_avail shall be set to non-zero and 6266 * it should be more than num_queues 6267 */ 6268 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) { 6269 dev_dbg(&pf->pdev->dev, 6270 "Error: cnt_q_avail (%u) less than num_queues %d\n", 6271 vsi->cnt_q_avail, ch->num_queue_pairs); 6272 return -EINVAL; 6273 } 6274 6275 /* reconfig_rss only if vsi type is MAIN_VSI */ 6276 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) { 6277 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs); 6278 if (err) { 6279 dev_info(&pf->pdev->dev, 6280 "Error: unable to reconfig rss for num_queues (%u)\n", 6281 ch->num_queue_pairs); 6282 return -EINVAL; 6283 } 6284 } 6285 6286 if (!i40e_setup_channel(pf, vsi, ch)) { 6287 dev_info(&pf->pdev->dev, "Failed to setup channel\n"); 6288 return -EINVAL; 6289 } 6290 6291 dev_info(&pf->pdev->dev, 6292 "Setup channel (id:%u) utilizing num_queues %d\n", 6293 ch->seid, ch->num_queue_pairs); 6294 6295 /* configure VSI for BW limit */ 6296 if (ch->max_tx_rate) { 6297 u64 credits = ch->max_tx_rate; 6298 6299 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate)) 6300 return -EINVAL; 6301 6302 do_div(credits, I40E_BW_CREDIT_DIVISOR); 6303 dev_dbg(&pf->pdev->dev, 6304 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 6305 ch->max_tx_rate, 6306 credits, 6307 ch->seid); 6308 } 6309 6310 /* in case of VF, this will be main SRIOV VSI */ 6311 ch->parent_vsi = vsi; 6312 6313 /* and update main_vsi's count for queue_available to use */ 6314 vsi->cnt_q_avail -= ch->num_queue_pairs; 6315 6316 return 0; 6317 } 6318 6319 /** 6320 * i40e_configure_queue_channels - Add queue channel for the given TCs 6321 * @vsi: VSI to be configured 6322 * 6323 * Configures queue channel mapping to the given TCs 6324 **/ 6325 static int i40e_configure_queue_channels(struct i40e_vsi *vsi) 6326 { 6327 struct i40e_channel *ch; 6328 u64 max_rate = 0; 6329 int ret = 0, i; 6330 6331 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */ 6332 vsi->tc_seid_map[0] = vsi->seid; 6333 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6334 if (vsi->tc_config.enabled_tc & BIT(i)) { 6335 ch = kzalloc(sizeof(*ch), GFP_KERNEL); 6336 if (!ch) { 6337 ret = -ENOMEM; 6338 goto err_free; 6339 } 6340 6341 INIT_LIST_HEAD(&ch->list); 6342 ch->num_queue_pairs = 6343 vsi->tc_config.tc_info[i].qcount; 6344 ch->base_queue = 6345 vsi->tc_config.tc_info[i].qoffset; 6346 6347 /* Bandwidth limit through tc interface is in bytes/s, 6348 * change to Mbit/s 6349 */ 6350 max_rate = vsi->mqprio_qopt.max_rate[i]; 6351 do_div(max_rate, I40E_BW_MBPS_DIVISOR); 6352 ch->max_tx_rate = max_rate; 6353 6354 list_add_tail(&ch->list, &vsi->ch_list); 6355 6356 ret = i40e_create_queue_channel(vsi, ch); 6357 if (ret) { 6358 dev_err(&vsi->back->pdev->dev, 6359 "Failed creating queue channel with TC%d: queues %d\n", 6360 i, ch->num_queue_pairs); 6361 goto err_free; 6362 } 6363 vsi->tc_seid_map[i] = ch->seid; 6364 } 6365 } 6366 return ret; 6367 6368 err_free: 6369 i40e_remove_queue_channels(vsi); 6370 return ret; 6371 } 6372 6373 /** 6374 * i40e_veb_config_tc - Configure TCs for given VEB 6375 * @veb: given VEB 6376 * @enabled_tc: TC bitmap 6377 * 6378 * Configures given TC bitmap for VEB (switching) element 6379 **/ 6380 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 6381 { 6382 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 6383 struct i40e_pf *pf = veb->pf; 6384 int ret = 0; 6385 int i; 6386 6387 /* No TCs or already enabled TCs just return */ 6388 if (!enabled_tc || veb->enabled_tc == enabled_tc) 6389 return ret; 6390 6391 bw_data.tc_valid_bits = enabled_tc; 6392 /* bw_data.absolute_credits is not set (relative) */ 6393 6394 /* Enable ETS TCs with equal BW Share for now */ 6395 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6396 if (enabled_tc & BIT(i)) 6397 bw_data.tc_bw_share_credits[i] = 1; 6398 } 6399 6400 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 6401 &bw_data, NULL); 6402 if (ret) { 6403 dev_info(&pf->pdev->dev, 6404 "VEB bw config failed, err %s aq_err %s\n", 6405 i40e_stat_str(&pf->hw, ret), 6406 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6407 goto out; 6408 } 6409 6410 /* Update the BW information */ 6411 ret = i40e_veb_get_bw_info(veb); 6412 if (ret) { 6413 dev_info(&pf->pdev->dev, 6414 "Failed getting veb bw config, err %s aq_err %s\n", 6415 i40e_stat_str(&pf->hw, ret), 6416 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6417 } 6418 6419 out: 6420 return ret; 6421 } 6422 6423 #ifdef CONFIG_I40E_DCB 6424 /** 6425 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 6426 * @pf: PF struct 6427 * 6428 * Reconfigure VEB/VSIs on a given PF; it is assumed that 6429 * the caller would've quiesce all the VSIs before calling 6430 * this function 6431 **/ 6432 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 6433 { 6434 u8 tc_map = 0; 6435 int ret; 6436 u8 v; 6437 6438 /* Enable the TCs available on PF to all VEBs */ 6439 tc_map = i40e_pf_get_tc_map(pf); 6440 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS) 6441 return; 6442 6443 for (v = 0; v < I40E_MAX_VEB; v++) { 6444 if (!pf->veb[v]) 6445 continue; 6446 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 6447 if (ret) { 6448 dev_info(&pf->pdev->dev, 6449 "Failed configuring TC for VEB seid=%d\n", 6450 pf->veb[v]->seid); 6451 /* Will try to configure as many components */ 6452 } 6453 } 6454 6455 /* Update each VSI */ 6456 for (v = 0; v < pf->num_alloc_vsi; v++) { 6457 if (!pf->vsi[v]) 6458 continue; 6459 6460 /* - Enable all TCs for the LAN VSI 6461 * - For all others keep them at TC0 for now 6462 */ 6463 if (v == pf->lan_vsi) 6464 tc_map = i40e_pf_get_tc_map(pf); 6465 else 6466 tc_map = I40E_DEFAULT_TRAFFIC_CLASS; 6467 6468 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 6469 if (ret) { 6470 dev_info(&pf->pdev->dev, 6471 "Failed configuring TC for VSI seid=%d\n", 6472 pf->vsi[v]->seid); 6473 /* Will try to configure as many components */ 6474 } else { 6475 /* Re-configure VSI vectors based on updated TC map */ 6476 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 6477 if (pf->vsi[v]->netdev) 6478 i40e_dcbnl_set_all(pf->vsi[v]); 6479 } 6480 } 6481 } 6482 6483 /** 6484 * i40e_resume_port_tx - Resume port Tx 6485 * @pf: PF struct 6486 * 6487 * Resume a port's Tx and issue a PF reset in case of failure to 6488 * resume. 6489 **/ 6490 static int i40e_resume_port_tx(struct i40e_pf *pf) 6491 { 6492 struct i40e_hw *hw = &pf->hw; 6493 int ret; 6494 6495 ret = i40e_aq_resume_port_tx(hw, NULL); 6496 if (ret) { 6497 dev_info(&pf->pdev->dev, 6498 "Resume Port Tx failed, err %s aq_err %s\n", 6499 i40e_stat_str(&pf->hw, ret), 6500 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6501 /* Schedule PF reset to recover */ 6502 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 6503 i40e_service_event_schedule(pf); 6504 } 6505 6506 return ret; 6507 } 6508 6509 /** 6510 * i40e_suspend_port_tx - Suspend port Tx 6511 * @pf: PF struct 6512 * 6513 * Suspend a port's Tx and issue a PF reset in case of failure. 6514 **/ 6515 static int i40e_suspend_port_tx(struct i40e_pf *pf) 6516 { 6517 struct i40e_hw *hw = &pf->hw; 6518 int ret; 6519 6520 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL); 6521 if (ret) { 6522 dev_info(&pf->pdev->dev, 6523 "Suspend Port Tx failed, err %s aq_err %s\n", 6524 i40e_stat_str(&pf->hw, ret), 6525 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6526 /* Schedule PF reset to recover */ 6527 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 6528 i40e_service_event_schedule(pf); 6529 } 6530 6531 return ret; 6532 } 6533 6534 /** 6535 * i40e_hw_set_dcb_config - Program new DCBX settings into HW 6536 * @pf: PF being configured 6537 * @new_cfg: New DCBX configuration 6538 * 6539 * Program DCB settings into HW and reconfigure VEB/VSIs on 6540 * given PF. Uses "Set LLDP MIB" AQC to program the hardware. 6541 **/ 6542 static int i40e_hw_set_dcb_config(struct i40e_pf *pf, 6543 struct i40e_dcbx_config *new_cfg) 6544 { 6545 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config; 6546 int ret; 6547 6548 /* Check if need reconfiguration */ 6549 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) { 6550 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n"); 6551 return 0; 6552 } 6553 6554 /* Config change disable all VSIs */ 6555 i40e_pf_quiesce_all_vsi(pf); 6556 6557 /* Copy the new config to the current config */ 6558 *old_cfg = *new_cfg; 6559 old_cfg->etsrec = old_cfg->etscfg; 6560 ret = i40e_set_dcb_config(&pf->hw); 6561 if (ret) { 6562 dev_info(&pf->pdev->dev, 6563 "Set DCB Config failed, err %s aq_err %s\n", 6564 i40e_stat_str(&pf->hw, ret), 6565 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6566 goto out; 6567 } 6568 6569 /* Changes in configuration update VEB/VSI */ 6570 i40e_dcb_reconfigure(pf); 6571 out: 6572 /* In case of reset do not try to resume anything */ 6573 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) { 6574 /* Re-start the VSIs if disabled */ 6575 ret = i40e_resume_port_tx(pf); 6576 /* In case of error no point in resuming VSIs */ 6577 if (ret) 6578 goto err; 6579 i40e_pf_unquiesce_all_vsi(pf); 6580 } 6581 err: 6582 return ret; 6583 } 6584 6585 /** 6586 * i40e_hw_dcb_config - Program new DCBX settings into HW 6587 * @pf: PF being configured 6588 * @new_cfg: New DCBX configuration 6589 * 6590 * Program DCB settings into HW and reconfigure VEB/VSIs on 6591 * given PF 6592 **/ 6593 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg) 6594 { 6595 struct i40e_aqc_configure_switching_comp_ets_data ets_data; 6596 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0}; 6597 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS]; 6598 struct i40e_dcbx_config *old_cfg; 6599 u8 mode[I40E_MAX_TRAFFIC_CLASS]; 6600 struct i40e_rx_pb_config pb_cfg; 6601 struct i40e_hw *hw = &pf->hw; 6602 u8 num_ports = hw->num_ports; 6603 bool need_reconfig; 6604 int ret = -EINVAL; 6605 u8 lltc_map = 0; 6606 u8 tc_map = 0; 6607 u8 new_numtc; 6608 u8 i; 6609 6610 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n"); 6611 /* Un-pack information to Program ETS HW via shared API 6612 * numtc, tcmap 6613 * LLTC map 6614 * ETS/NON-ETS arbiter mode 6615 * max exponent (credit refills) 6616 * Total number of ports 6617 * PFC priority bit-map 6618 * Priority Table 6619 * BW % per TC 6620 * Arbiter mode between UPs sharing same TC 6621 * TSA table (ETS or non-ETS) 6622 * EEE enabled or not 6623 * MFS TC table 6624 */ 6625 6626 new_numtc = i40e_dcb_get_num_tc(new_cfg); 6627 6628 memset(&ets_data, 0, sizeof(ets_data)); 6629 for (i = 0; i < new_numtc; i++) { 6630 tc_map |= BIT(i); 6631 switch (new_cfg->etscfg.tsatable[i]) { 6632 case I40E_IEEE_TSA_ETS: 6633 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS; 6634 ets_data.tc_bw_share_credits[i] = 6635 new_cfg->etscfg.tcbwtable[i]; 6636 break; 6637 case I40E_IEEE_TSA_STRICT: 6638 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT; 6639 lltc_map |= BIT(i); 6640 ets_data.tc_bw_share_credits[i] = 6641 I40E_DCB_STRICT_PRIO_CREDITS; 6642 break; 6643 default: 6644 /* Invalid TSA type */ 6645 need_reconfig = false; 6646 goto out; 6647 } 6648 } 6649 6650 old_cfg = &hw->local_dcbx_config; 6651 /* Check if need reconfiguration */ 6652 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg); 6653 6654 /* If needed, enable/disable frame tagging, disable all VSIs 6655 * and suspend port tx 6656 */ 6657 if (need_reconfig) { 6658 /* Enable DCB tagging only when more than one TC */ 6659 if (new_numtc > 1) 6660 pf->flags |= I40E_FLAG_DCB_ENABLED; 6661 else 6662 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6663 6664 set_bit(__I40E_PORT_SUSPENDED, pf->state); 6665 /* Reconfiguration needed quiesce all VSIs */ 6666 i40e_pf_quiesce_all_vsi(pf); 6667 ret = i40e_suspend_port_tx(pf); 6668 if (ret) 6669 goto err; 6670 } 6671 6672 /* Configure Port ETS Tx Scheduler */ 6673 ets_data.tc_valid_bits = tc_map; 6674 ets_data.tc_strict_priority_flags = lltc_map; 6675 ret = i40e_aq_config_switch_comp_ets 6676 (hw, pf->mac_seid, &ets_data, 6677 i40e_aqc_opc_modify_switching_comp_ets, NULL); 6678 if (ret) { 6679 dev_info(&pf->pdev->dev, 6680 "Modify Port ETS failed, err %s aq_err %s\n", 6681 i40e_stat_str(&pf->hw, ret), 6682 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6683 goto out; 6684 } 6685 6686 /* Configure Rx ETS HW */ 6687 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode)); 6688 i40e_dcb_hw_set_num_tc(hw, new_numtc); 6689 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN, 6690 I40E_DCB_ARB_MODE_STRICT_PRIORITY, 6691 I40E_DCB_DEFAULT_MAX_EXPONENT, 6692 lltc_map); 6693 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports); 6694 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode, 6695 prio_type); 6696 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable, 6697 new_cfg->etscfg.prioritytable); 6698 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable); 6699 6700 /* Configure Rx Packet Buffers in HW */ 6701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6702 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu; 6703 mfs_tc[i] += I40E_PACKET_HDR_PAD; 6704 } 6705 6706 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports, 6707 false, new_cfg->pfc.pfcenable, 6708 mfs_tc, &pb_cfg); 6709 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg); 6710 6711 /* Update the local Rx Packet buffer config */ 6712 pf->pb_cfg = pb_cfg; 6713 6714 /* Inform the FW about changes to DCB configuration */ 6715 ret = i40e_aq_dcb_updated(&pf->hw, NULL); 6716 if (ret) { 6717 dev_info(&pf->pdev->dev, 6718 "DCB Updated failed, err %s aq_err %s\n", 6719 i40e_stat_str(&pf->hw, ret), 6720 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6721 goto out; 6722 } 6723 6724 /* Update the port DCBx configuration */ 6725 *old_cfg = *new_cfg; 6726 6727 /* Changes in configuration update VEB/VSI */ 6728 i40e_dcb_reconfigure(pf); 6729 out: 6730 /* Re-start the VSIs if disabled */ 6731 if (need_reconfig) { 6732 ret = i40e_resume_port_tx(pf); 6733 6734 clear_bit(__I40E_PORT_SUSPENDED, pf->state); 6735 /* In case of error no point in resuming VSIs */ 6736 if (ret) 6737 goto err; 6738 6739 /* Wait for the PF's queues to be disabled */ 6740 ret = i40e_pf_wait_queues_disabled(pf); 6741 if (ret) { 6742 /* Schedule PF reset to recover */ 6743 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 6744 i40e_service_event_schedule(pf); 6745 goto err; 6746 } else { 6747 i40e_pf_unquiesce_all_vsi(pf); 6748 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state); 6749 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state); 6750 } 6751 /* registers are set, lets apply */ 6752 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) 6753 ret = i40e_hw_set_dcb_config(pf, new_cfg); 6754 } 6755 6756 err: 6757 return ret; 6758 } 6759 6760 /** 6761 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW 6762 * @pf: PF being queried 6763 * 6764 * Set default DCB configuration in case DCB is to be done in SW. 6765 **/ 6766 int i40e_dcb_sw_default_config(struct i40e_pf *pf) 6767 { 6768 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config; 6769 struct i40e_aqc_configure_switching_comp_ets_data ets_data; 6770 struct i40e_hw *hw = &pf->hw; 6771 int err; 6772 6773 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) { 6774 /* Update the local cached instance with TC0 ETS */ 6775 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config)); 6776 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING; 6777 pf->tmp_cfg.etscfg.maxtcs = 0; 6778 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW; 6779 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 6780 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING; 6781 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 6782 /* FW needs one App to configure HW */ 6783 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS; 6784 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE; 6785 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO; 6786 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE; 6787 6788 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg); 6789 } 6790 6791 memset(&ets_data, 0, sizeof(ets_data)); 6792 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */ 6793 ets_data.tc_strict_priority_flags = 0; /* ETS */ 6794 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */ 6795 6796 /* Enable ETS on the Physical port */ 6797 err = i40e_aq_config_switch_comp_ets 6798 (hw, pf->mac_seid, &ets_data, 6799 i40e_aqc_opc_enable_switching_comp_ets, NULL); 6800 if (err) { 6801 dev_info(&pf->pdev->dev, 6802 "Enable Port ETS failed, err %s aq_err %s\n", 6803 i40e_stat_str(&pf->hw, err), 6804 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6805 err = -ENOENT; 6806 goto out; 6807 } 6808 6809 /* Update the local cached instance with TC0 ETS */ 6810 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING; 6811 dcb_cfg->etscfg.cbs = 0; 6812 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS; 6813 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW; 6814 6815 out: 6816 return err; 6817 } 6818 6819 /** 6820 * i40e_init_pf_dcb - Initialize DCB configuration 6821 * @pf: PF being configured 6822 * 6823 * Query the current DCB configuration and cache it 6824 * in the hardware structure 6825 **/ 6826 static int i40e_init_pf_dcb(struct i40e_pf *pf) 6827 { 6828 struct i40e_hw *hw = &pf->hw; 6829 int err; 6830 6831 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable 6832 * Also do not enable DCBx if FW LLDP agent is disabled 6833 */ 6834 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) { 6835 dev_info(&pf->pdev->dev, "DCB is not supported.\n"); 6836 err = I40E_NOT_SUPPORTED; 6837 goto out; 6838 } 6839 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 6840 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n"); 6841 err = i40e_dcb_sw_default_config(pf); 6842 if (err) { 6843 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n"); 6844 goto out; 6845 } 6846 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n"); 6847 pf->dcbx_cap = DCB_CAP_DCBX_HOST | 6848 DCB_CAP_DCBX_VER_IEEE; 6849 /* at init capable but disabled */ 6850 pf->flags |= I40E_FLAG_DCB_CAPABLE; 6851 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6852 goto out; 6853 } 6854 err = i40e_init_dcb(hw, true); 6855 if (!err) { 6856 /* Device/Function is not DCBX capable */ 6857 if ((!hw->func_caps.dcb) || 6858 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 6859 dev_info(&pf->pdev->dev, 6860 "DCBX offload is not supported or is disabled for this PF.\n"); 6861 } else { 6862 /* When status is not DISABLED then DCBX in FW */ 6863 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 6864 DCB_CAP_DCBX_VER_IEEE; 6865 6866 pf->flags |= I40E_FLAG_DCB_CAPABLE; 6867 /* Enable DCB tagging only when more than one TC 6868 * or explicitly disable if only one TC 6869 */ 6870 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 6871 pf->flags |= I40E_FLAG_DCB_ENABLED; 6872 else 6873 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6874 dev_dbg(&pf->pdev->dev, 6875 "DCBX offload is supported for this PF.\n"); 6876 } 6877 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) { 6878 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n"); 6879 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP; 6880 } else { 6881 dev_info(&pf->pdev->dev, 6882 "Query for DCB configuration failed, err %s aq_err %s\n", 6883 i40e_stat_str(&pf->hw, err), 6884 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6885 } 6886 6887 out: 6888 return err; 6889 } 6890 #endif /* CONFIG_I40E_DCB */ 6891 6892 /** 6893 * i40e_print_link_message - print link up or down 6894 * @vsi: the VSI for which link needs a message 6895 * @isup: true of link is up, false otherwise 6896 */ 6897 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 6898 { 6899 enum i40e_aq_link_speed new_speed; 6900 struct i40e_pf *pf = vsi->back; 6901 char *speed = "Unknown"; 6902 char *fc = "Unknown"; 6903 char *fec = ""; 6904 char *req_fec = ""; 6905 char *an = ""; 6906 6907 if (isup) 6908 new_speed = pf->hw.phy.link_info.link_speed; 6909 else 6910 new_speed = I40E_LINK_SPEED_UNKNOWN; 6911 6912 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed)) 6913 return; 6914 vsi->current_isup = isup; 6915 vsi->current_speed = new_speed; 6916 if (!isup) { 6917 netdev_info(vsi->netdev, "NIC Link is Down\n"); 6918 return; 6919 } 6920 6921 /* Warn user if link speed on NPAR enabled partition is not at 6922 * least 10GB 6923 */ 6924 if (pf->hw.func_caps.npar_enable && 6925 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 6926 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 6927 netdev_warn(vsi->netdev, 6928 "The partition detected link speed that is less than 10Gbps\n"); 6929 6930 switch (pf->hw.phy.link_info.link_speed) { 6931 case I40E_LINK_SPEED_40GB: 6932 speed = "40 G"; 6933 break; 6934 case I40E_LINK_SPEED_20GB: 6935 speed = "20 G"; 6936 break; 6937 case I40E_LINK_SPEED_25GB: 6938 speed = "25 G"; 6939 break; 6940 case I40E_LINK_SPEED_10GB: 6941 speed = "10 G"; 6942 break; 6943 case I40E_LINK_SPEED_5GB: 6944 speed = "5 G"; 6945 break; 6946 case I40E_LINK_SPEED_2_5GB: 6947 speed = "2.5 G"; 6948 break; 6949 case I40E_LINK_SPEED_1GB: 6950 speed = "1000 M"; 6951 break; 6952 case I40E_LINK_SPEED_100MB: 6953 speed = "100 M"; 6954 break; 6955 default: 6956 break; 6957 } 6958 6959 switch (pf->hw.fc.current_mode) { 6960 case I40E_FC_FULL: 6961 fc = "RX/TX"; 6962 break; 6963 case I40E_FC_TX_PAUSE: 6964 fc = "TX"; 6965 break; 6966 case I40E_FC_RX_PAUSE: 6967 fc = "RX"; 6968 break; 6969 default: 6970 fc = "None"; 6971 break; 6972 } 6973 6974 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) { 6975 req_fec = "None"; 6976 fec = "None"; 6977 an = "False"; 6978 6979 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED) 6980 an = "True"; 6981 6982 if (pf->hw.phy.link_info.fec_info & 6983 I40E_AQ_CONFIG_FEC_KR_ENA) 6984 fec = "CL74 FC-FEC/BASE-R"; 6985 else if (pf->hw.phy.link_info.fec_info & 6986 I40E_AQ_CONFIG_FEC_RS_ENA) 6987 fec = "CL108 RS-FEC"; 6988 6989 /* 'CL108 RS-FEC' should be displayed when RS is requested, or 6990 * both RS and FC are requested 6991 */ 6992 if (vsi->back->hw.phy.link_info.req_fec_info & 6993 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) { 6994 if (vsi->back->hw.phy.link_info.req_fec_info & 6995 I40E_AQ_REQUEST_FEC_RS) 6996 req_fec = "CL108 RS-FEC"; 6997 else 6998 req_fec = "CL74 FC-FEC/BASE-R"; 6999 } 7000 netdev_info(vsi->netdev, 7001 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n", 7002 speed, req_fec, fec, an, fc); 7003 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) { 7004 req_fec = "None"; 7005 fec = "None"; 7006 an = "False"; 7007 7008 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED) 7009 an = "True"; 7010 7011 if (pf->hw.phy.link_info.fec_info & 7012 I40E_AQ_CONFIG_FEC_KR_ENA) 7013 fec = "CL74 FC-FEC/BASE-R"; 7014 7015 if (pf->hw.phy.link_info.req_fec_info & 7016 I40E_AQ_REQUEST_FEC_KR) 7017 req_fec = "CL74 FC-FEC/BASE-R"; 7018 7019 netdev_info(vsi->netdev, 7020 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n", 7021 speed, req_fec, fec, an, fc); 7022 } else { 7023 netdev_info(vsi->netdev, 7024 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n", 7025 speed, fc); 7026 } 7027 7028 } 7029 7030 /** 7031 * i40e_up_complete - Finish the last steps of bringing up a connection 7032 * @vsi: the VSI being configured 7033 **/ 7034 static int i40e_up_complete(struct i40e_vsi *vsi) 7035 { 7036 struct i40e_pf *pf = vsi->back; 7037 int err; 7038 7039 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7040 i40e_vsi_configure_msix(vsi); 7041 else 7042 i40e_configure_msi_and_legacy(vsi); 7043 7044 /* start rings */ 7045 err = i40e_vsi_start_rings(vsi); 7046 if (err) 7047 return err; 7048 7049 clear_bit(__I40E_VSI_DOWN, vsi->state); 7050 i40e_napi_enable_all(vsi); 7051 i40e_vsi_enable_irq(vsi); 7052 7053 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 7054 (vsi->netdev)) { 7055 i40e_print_link_message(vsi, true); 7056 netif_tx_start_all_queues(vsi->netdev); 7057 netif_carrier_on(vsi->netdev); 7058 } 7059 7060 /* replay FDIR SB filters */ 7061 if (vsi->type == I40E_VSI_FDIR) { 7062 /* reset fd counters */ 7063 pf->fd_add_err = 0; 7064 pf->fd_atr_cnt = 0; 7065 i40e_fdir_filter_restore(vsi); 7066 } 7067 7068 /* On the next run of the service_task, notify any clients of the new 7069 * opened netdev 7070 */ 7071 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state); 7072 i40e_service_event_schedule(pf); 7073 7074 return 0; 7075 } 7076 7077 /** 7078 * i40e_vsi_reinit_locked - Reset the VSI 7079 * @vsi: the VSI being configured 7080 * 7081 * Rebuild the ring structs after some configuration 7082 * has changed, e.g. MTU size. 7083 **/ 7084 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 7085 { 7086 struct i40e_pf *pf = vsi->back; 7087 7088 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) 7089 usleep_range(1000, 2000); 7090 i40e_down(vsi); 7091 7092 i40e_up(vsi); 7093 clear_bit(__I40E_CONFIG_BUSY, pf->state); 7094 } 7095 7096 /** 7097 * i40e_force_link_state - Force the link status 7098 * @pf: board private structure 7099 * @is_up: whether the link state should be forced up or down 7100 **/ 7101 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up) 7102 { 7103 struct i40e_aq_get_phy_abilities_resp abilities; 7104 struct i40e_aq_set_phy_config config = {0}; 7105 bool non_zero_phy_type = is_up; 7106 struct i40e_hw *hw = &pf->hw; 7107 i40e_status err; 7108 u64 mask; 7109 u8 speed; 7110 7111 /* Card might've been put in an unstable state by other drivers 7112 * and applications, which causes incorrect speed values being 7113 * set on startup. In order to clear speed registers, we call 7114 * get_phy_capabilities twice, once to get initial state of 7115 * available speeds, and once to get current PHY config. 7116 */ 7117 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, 7118 NULL); 7119 if (err) { 7120 dev_err(&pf->pdev->dev, 7121 "failed to get phy cap., ret = %s last_status = %s\n", 7122 i40e_stat_str(hw, err), 7123 i40e_aq_str(hw, hw->aq.asq_last_status)); 7124 return err; 7125 } 7126 speed = abilities.link_speed; 7127 7128 /* Get the current phy config */ 7129 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 7130 NULL); 7131 if (err) { 7132 dev_err(&pf->pdev->dev, 7133 "failed to get phy cap., ret = %s last_status = %s\n", 7134 i40e_stat_str(hw, err), 7135 i40e_aq_str(hw, hw->aq.asq_last_status)); 7136 return err; 7137 } 7138 7139 /* If link needs to go up, but was not forced to go down, 7140 * and its speed values are OK, no need for a flap 7141 * if non_zero_phy_type was set, still need to force up 7142 */ 7143 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) 7144 non_zero_phy_type = true; 7145 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0) 7146 return I40E_SUCCESS; 7147 7148 /* To force link we need to set bits for all supported PHY types, 7149 * but there are now more than 32, so we need to split the bitmap 7150 * across two fields. 7151 */ 7152 mask = I40E_PHY_TYPES_BITMASK; 7153 config.phy_type = 7154 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0; 7155 config.phy_type_ext = 7156 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0; 7157 /* Copy the old settings, except of phy_type */ 7158 config.abilities = abilities.abilities; 7159 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) { 7160 if (is_up) 7161 config.abilities |= I40E_AQ_PHY_ENABLE_LINK; 7162 else 7163 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK); 7164 } 7165 if (abilities.link_speed != 0) 7166 config.link_speed = abilities.link_speed; 7167 else 7168 config.link_speed = speed; 7169 config.eee_capability = abilities.eee_capability; 7170 config.eeer = abilities.eeer_val; 7171 config.low_power_ctrl = abilities.d3_lpan; 7172 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 7173 I40E_AQ_PHY_FEC_CONFIG_MASK; 7174 err = i40e_aq_set_phy_config(hw, &config, NULL); 7175 7176 if (err) { 7177 dev_err(&pf->pdev->dev, 7178 "set phy config ret = %s last_status = %s\n", 7179 i40e_stat_str(&pf->hw, err), 7180 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7181 return err; 7182 } 7183 7184 /* Update the link info */ 7185 err = i40e_update_link_info(hw); 7186 if (err) { 7187 /* Wait a little bit (on 40G cards it sometimes takes a really 7188 * long time for link to come back from the atomic reset) 7189 * and try once more 7190 */ 7191 msleep(1000); 7192 i40e_update_link_info(hw); 7193 } 7194 7195 i40e_aq_set_link_restart_an(hw, is_up, NULL); 7196 7197 return I40E_SUCCESS; 7198 } 7199 7200 /** 7201 * i40e_up - Bring the connection back up after being down 7202 * @vsi: the VSI being configured 7203 **/ 7204 int i40e_up(struct i40e_vsi *vsi) 7205 { 7206 int err; 7207 7208 if (vsi->type == I40E_VSI_MAIN && 7209 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED || 7210 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) 7211 i40e_force_link_state(vsi->back, true); 7212 7213 err = i40e_vsi_configure(vsi); 7214 if (!err) 7215 err = i40e_up_complete(vsi); 7216 7217 return err; 7218 } 7219 7220 /** 7221 * i40e_down - Shutdown the connection processing 7222 * @vsi: the VSI being stopped 7223 **/ 7224 void i40e_down(struct i40e_vsi *vsi) 7225 { 7226 int i; 7227 7228 /* It is assumed that the caller of this function 7229 * sets the vsi->state __I40E_VSI_DOWN bit. 7230 */ 7231 if (vsi->netdev) { 7232 netif_carrier_off(vsi->netdev); 7233 netif_tx_disable(vsi->netdev); 7234 } 7235 i40e_vsi_disable_irq(vsi); 7236 i40e_vsi_stop_rings(vsi); 7237 if (vsi->type == I40E_VSI_MAIN && 7238 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED || 7239 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) 7240 i40e_force_link_state(vsi->back, false); 7241 i40e_napi_disable_all(vsi); 7242 7243 for (i = 0; i < vsi->num_queue_pairs; i++) { 7244 i40e_clean_tx_ring(vsi->tx_rings[i]); 7245 if (i40e_enabled_xdp_vsi(vsi)) { 7246 /* Make sure that in-progress ndo_xdp_xmit and 7247 * ndo_xsk_wakeup calls are completed. 7248 */ 7249 synchronize_rcu(); 7250 i40e_clean_tx_ring(vsi->xdp_rings[i]); 7251 } 7252 i40e_clean_rx_ring(vsi->rx_rings[i]); 7253 } 7254 7255 } 7256 7257 /** 7258 * i40e_validate_mqprio_qopt- validate queue mapping info 7259 * @vsi: the VSI being configured 7260 * @mqprio_qopt: queue parametrs 7261 **/ 7262 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi, 7263 struct tc_mqprio_qopt_offload *mqprio_qopt) 7264 { 7265 u64 sum_max_rate = 0; 7266 u64 max_rate = 0; 7267 int i; 7268 7269 if (mqprio_qopt->qopt.offset[0] != 0 || 7270 mqprio_qopt->qopt.num_tc < 1 || 7271 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS) 7272 return -EINVAL; 7273 for (i = 0; ; i++) { 7274 if (!mqprio_qopt->qopt.count[i]) 7275 return -EINVAL; 7276 if (mqprio_qopt->min_rate[i]) { 7277 dev_err(&vsi->back->pdev->dev, 7278 "Invalid min tx rate (greater than 0) specified\n"); 7279 return -EINVAL; 7280 } 7281 max_rate = mqprio_qopt->max_rate[i]; 7282 do_div(max_rate, I40E_BW_MBPS_DIVISOR); 7283 sum_max_rate += max_rate; 7284 7285 if (i >= mqprio_qopt->qopt.num_tc - 1) 7286 break; 7287 if (mqprio_qopt->qopt.offset[i + 1] != 7288 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) 7289 return -EINVAL; 7290 } 7291 if (vsi->num_queue_pairs < 7292 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) { 7293 dev_err(&vsi->back->pdev->dev, 7294 "Failed to create traffic channel, insufficient number of queues.\n"); 7295 return -EINVAL; 7296 } 7297 if (sum_max_rate > i40e_get_link_speed(vsi)) { 7298 dev_err(&vsi->back->pdev->dev, 7299 "Invalid max tx rate specified\n"); 7300 return -EINVAL; 7301 } 7302 return 0; 7303 } 7304 7305 /** 7306 * i40e_vsi_set_default_tc_config - set default values for tc configuration 7307 * @vsi: the VSI being configured 7308 **/ 7309 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi) 7310 { 7311 u16 qcount; 7312 int i; 7313 7314 /* Only TC0 is enabled */ 7315 vsi->tc_config.numtc = 1; 7316 vsi->tc_config.enabled_tc = 1; 7317 qcount = min_t(int, vsi->alloc_queue_pairs, 7318 i40e_pf_get_max_q_per_tc(vsi->back)); 7319 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 7320 /* For the TC that is not enabled set the offset to default 7321 * queue and allocate one queue for the given TC. 7322 */ 7323 vsi->tc_config.tc_info[i].qoffset = 0; 7324 if (i == 0) 7325 vsi->tc_config.tc_info[i].qcount = qcount; 7326 else 7327 vsi->tc_config.tc_info[i].qcount = 1; 7328 vsi->tc_config.tc_info[i].netdev_tc = 0; 7329 } 7330 } 7331 7332 /** 7333 * i40e_del_macvlan_filter 7334 * @hw: pointer to the HW structure 7335 * @seid: seid of the channel VSI 7336 * @macaddr: the mac address to apply as a filter 7337 * @aq_err: store the admin Q error 7338 * 7339 * This function deletes a mac filter on the channel VSI which serves as the 7340 * macvlan. Returns 0 on success. 7341 **/ 7342 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid, 7343 const u8 *macaddr, int *aq_err) 7344 { 7345 struct i40e_aqc_remove_macvlan_element_data element; 7346 i40e_status status; 7347 7348 memset(&element, 0, sizeof(element)); 7349 ether_addr_copy(element.mac_addr, macaddr); 7350 element.vlan_tag = 0; 7351 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 7352 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL); 7353 *aq_err = hw->aq.asq_last_status; 7354 7355 return status; 7356 } 7357 7358 /** 7359 * i40e_add_macvlan_filter 7360 * @hw: pointer to the HW structure 7361 * @seid: seid of the channel VSI 7362 * @macaddr: the mac address to apply as a filter 7363 * @aq_err: store the admin Q error 7364 * 7365 * This function adds a mac filter on the channel VSI which serves as the 7366 * macvlan. Returns 0 on success. 7367 **/ 7368 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid, 7369 const u8 *macaddr, int *aq_err) 7370 { 7371 struct i40e_aqc_add_macvlan_element_data element; 7372 i40e_status status; 7373 u16 cmd_flags = 0; 7374 7375 ether_addr_copy(element.mac_addr, macaddr); 7376 element.vlan_tag = 0; 7377 element.queue_number = 0; 7378 element.match_method = I40E_AQC_MM_ERR_NO_RES; 7379 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 7380 element.flags = cpu_to_le16(cmd_flags); 7381 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL); 7382 *aq_err = hw->aq.asq_last_status; 7383 7384 return status; 7385 } 7386 7387 /** 7388 * i40e_reset_ch_rings - Reset the queue contexts in a channel 7389 * @vsi: the VSI we want to access 7390 * @ch: the channel we want to access 7391 */ 7392 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch) 7393 { 7394 struct i40e_ring *tx_ring, *rx_ring; 7395 u16 pf_q; 7396 int i; 7397 7398 for (i = 0; i < ch->num_queue_pairs; i++) { 7399 pf_q = ch->base_queue + i; 7400 tx_ring = vsi->tx_rings[pf_q]; 7401 tx_ring->ch = NULL; 7402 rx_ring = vsi->rx_rings[pf_q]; 7403 rx_ring->ch = NULL; 7404 } 7405 } 7406 7407 /** 7408 * i40e_free_macvlan_channels 7409 * @vsi: the VSI we want to access 7410 * 7411 * This function frees the Qs of the channel VSI from 7412 * the stack and also deletes the channel VSIs which 7413 * serve as macvlans. 7414 */ 7415 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi) 7416 { 7417 struct i40e_channel *ch, *ch_tmp; 7418 int ret; 7419 7420 if (list_empty(&vsi->macvlan_list)) 7421 return; 7422 7423 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) { 7424 struct i40e_vsi *parent_vsi; 7425 7426 if (i40e_is_channel_macvlan(ch)) { 7427 i40e_reset_ch_rings(vsi, ch); 7428 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask); 7429 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev); 7430 netdev_set_sb_channel(ch->fwd->netdev, 0); 7431 kfree(ch->fwd); 7432 ch->fwd = NULL; 7433 } 7434 7435 list_del(&ch->list); 7436 parent_vsi = ch->parent_vsi; 7437 if (!parent_vsi || !ch->initialized) { 7438 kfree(ch); 7439 continue; 7440 } 7441 7442 /* remove the VSI */ 7443 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid, 7444 NULL); 7445 if (ret) 7446 dev_err(&vsi->back->pdev->dev, 7447 "unable to remove channel (%d) for parent VSI(%d)\n", 7448 ch->seid, parent_vsi->seid); 7449 kfree(ch); 7450 } 7451 vsi->macvlan_cnt = 0; 7452 } 7453 7454 /** 7455 * i40e_fwd_ring_up - bring the macvlan device up 7456 * @vsi: the VSI we want to access 7457 * @vdev: macvlan netdevice 7458 * @fwd: the private fwd structure 7459 */ 7460 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev, 7461 struct i40e_fwd_adapter *fwd) 7462 { 7463 int ret = 0, num_tc = 1, i, aq_err; 7464 struct i40e_channel *ch, *ch_tmp; 7465 struct i40e_pf *pf = vsi->back; 7466 struct i40e_hw *hw = &pf->hw; 7467 7468 if (list_empty(&vsi->macvlan_list)) 7469 return -EINVAL; 7470 7471 /* Go through the list and find an available channel */ 7472 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) { 7473 if (!i40e_is_channel_macvlan(ch)) { 7474 ch->fwd = fwd; 7475 /* record configuration for macvlan interface in vdev */ 7476 for (i = 0; i < num_tc; i++) 7477 netdev_bind_sb_channel_queue(vsi->netdev, vdev, 7478 i, 7479 ch->num_queue_pairs, 7480 ch->base_queue); 7481 for (i = 0; i < ch->num_queue_pairs; i++) { 7482 struct i40e_ring *tx_ring, *rx_ring; 7483 u16 pf_q; 7484 7485 pf_q = ch->base_queue + i; 7486 7487 /* Get to TX ring ptr */ 7488 tx_ring = vsi->tx_rings[pf_q]; 7489 tx_ring->ch = ch; 7490 7491 /* Get the RX ring ptr */ 7492 rx_ring = vsi->rx_rings[pf_q]; 7493 rx_ring->ch = ch; 7494 } 7495 break; 7496 } 7497 } 7498 7499 /* Guarantee all rings are updated before we update the 7500 * MAC address filter. 7501 */ 7502 wmb(); 7503 7504 /* Add a mac filter */ 7505 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err); 7506 if (ret) { 7507 /* if we cannot add the MAC rule then disable the offload */ 7508 macvlan_release_l2fw_offload(vdev); 7509 for (i = 0; i < ch->num_queue_pairs; i++) { 7510 struct i40e_ring *rx_ring; 7511 u16 pf_q; 7512 7513 pf_q = ch->base_queue + i; 7514 rx_ring = vsi->rx_rings[pf_q]; 7515 rx_ring->netdev = NULL; 7516 } 7517 dev_info(&pf->pdev->dev, 7518 "Error adding mac filter on macvlan err %s, aq_err %s\n", 7519 i40e_stat_str(hw, ret), 7520 i40e_aq_str(hw, aq_err)); 7521 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n"); 7522 } 7523 7524 return ret; 7525 } 7526 7527 /** 7528 * i40e_setup_macvlans - create the channels which will be macvlans 7529 * @vsi: the VSI we want to access 7530 * @macvlan_cnt: no. of macvlans to be setup 7531 * @qcnt: no. of Qs per macvlan 7532 * @vdev: macvlan netdevice 7533 */ 7534 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt, 7535 struct net_device *vdev) 7536 { 7537 struct i40e_pf *pf = vsi->back; 7538 struct i40e_hw *hw = &pf->hw; 7539 struct i40e_vsi_context ctxt; 7540 u16 sections, qmap, num_qps; 7541 struct i40e_channel *ch; 7542 int i, pow, ret = 0; 7543 u8 offset = 0; 7544 7545 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt) 7546 return -EINVAL; 7547 7548 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt); 7549 7550 /* find the next higher power-of-2 of num queue pairs */ 7551 pow = fls(roundup_pow_of_two(num_qps) - 1); 7552 7553 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 7554 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 7555 7556 /* Setup context bits for the main VSI */ 7557 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 7558 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 7559 memset(&ctxt, 0, sizeof(ctxt)); 7560 ctxt.seid = vsi->seid; 7561 ctxt.pf_num = vsi->back->hw.pf_id; 7562 ctxt.vf_num = 0; 7563 ctxt.uplink_seid = vsi->uplink_seid; 7564 ctxt.info = vsi->info; 7565 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap); 7566 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 7567 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 7568 ctxt.info.valid_sections |= cpu_to_le16(sections); 7569 7570 /* Reconfigure RSS for main VSI with new max queue count */ 7571 vsi->rss_size = max_t(u16, num_qps, qcnt); 7572 ret = i40e_vsi_config_rss(vsi); 7573 if (ret) { 7574 dev_info(&pf->pdev->dev, 7575 "Failed to reconfig RSS for num_queues (%u)\n", 7576 vsi->rss_size); 7577 return ret; 7578 } 7579 vsi->reconfig_rss = true; 7580 dev_dbg(&vsi->back->pdev->dev, 7581 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size); 7582 vsi->next_base_queue = num_qps; 7583 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps; 7584 7585 /* Update the VSI after updating the VSI queue-mapping 7586 * information 7587 */ 7588 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 7589 if (ret) { 7590 dev_info(&pf->pdev->dev, 7591 "Update vsi tc config failed, err %s aq_err %s\n", 7592 i40e_stat_str(hw, ret), 7593 i40e_aq_str(hw, hw->aq.asq_last_status)); 7594 return ret; 7595 } 7596 /* update the local VSI info with updated queue map */ 7597 i40e_vsi_update_queue_map(vsi, &ctxt); 7598 vsi->info.valid_sections = 0; 7599 7600 /* Create channels for macvlans */ 7601 INIT_LIST_HEAD(&vsi->macvlan_list); 7602 for (i = 0; i < macvlan_cnt; i++) { 7603 ch = kzalloc(sizeof(*ch), GFP_KERNEL); 7604 if (!ch) { 7605 ret = -ENOMEM; 7606 goto err_free; 7607 } 7608 INIT_LIST_HEAD(&ch->list); 7609 ch->num_queue_pairs = qcnt; 7610 if (!i40e_setup_channel(pf, vsi, ch)) { 7611 ret = -EINVAL; 7612 kfree(ch); 7613 goto err_free; 7614 } 7615 ch->parent_vsi = vsi; 7616 vsi->cnt_q_avail -= ch->num_queue_pairs; 7617 vsi->macvlan_cnt++; 7618 list_add_tail(&ch->list, &vsi->macvlan_list); 7619 } 7620 7621 return ret; 7622 7623 err_free: 7624 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n"); 7625 i40e_free_macvlan_channels(vsi); 7626 7627 return ret; 7628 } 7629 7630 /** 7631 * i40e_fwd_add - configure macvlans 7632 * @netdev: net device to configure 7633 * @vdev: macvlan netdevice 7634 **/ 7635 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev) 7636 { 7637 struct i40e_netdev_priv *np = netdev_priv(netdev); 7638 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors; 7639 struct i40e_vsi *vsi = np->vsi; 7640 struct i40e_pf *pf = vsi->back; 7641 struct i40e_fwd_adapter *fwd; 7642 int avail_macvlan, ret; 7643 7644 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) { 7645 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n"); 7646 return ERR_PTR(-EINVAL); 7647 } 7648 if ((pf->flags & I40E_FLAG_TC_MQPRIO)) { 7649 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n"); 7650 return ERR_PTR(-EINVAL); 7651 } 7652 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) { 7653 netdev_info(netdev, "Not enough vectors available to support macvlans\n"); 7654 return ERR_PTR(-EINVAL); 7655 } 7656 7657 /* The macvlan device has to be a single Q device so that the 7658 * tc_to_txq field can be reused to pick the tx queue. 7659 */ 7660 if (netif_is_multiqueue(vdev)) 7661 return ERR_PTR(-ERANGE); 7662 7663 if (!vsi->macvlan_cnt) { 7664 /* reserve bit 0 for the pf device */ 7665 set_bit(0, vsi->fwd_bitmask); 7666 7667 /* Try to reserve as many queues as possible for macvlans. First 7668 * reserve 3/4th of max vectors, then half, then quarter and 7669 * calculate Qs per macvlan as you go 7670 */ 7671 vectors = pf->num_lan_msix; 7672 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) { 7673 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/ 7674 q_per_macvlan = 4; 7675 macvlan_cnt = (vectors - 32) / 4; 7676 } else if (vectors <= 64 && vectors > 32) { 7677 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/ 7678 q_per_macvlan = 2; 7679 macvlan_cnt = (vectors - 16) / 2; 7680 } else if (vectors <= 32 && vectors > 16) { 7681 /* allocate 1 Q per macvlan and 16 Qs to the PF*/ 7682 q_per_macvlan = 1; 7683 macvlan_cnt = vectors - 16; 7684 } else if (vectors <= 16 && vectors > 8) { 7685 /* allocate 1 Q per macvlan and 8 Qs to the PF */ 7686 q_per_macvlan = 1; 7687 macvlan_cnt = vectors - 8; 7688 } else { 7689 /* allocate 1 Q per macvlan and 1 Q to the PF */ 7690 q_per_macvlan = 1; 7691 macvlan_cnt = vectors - 1; 7692 } 7693 7694 if (macvlan_cnt == 0) 7695 return ERR_PTR(-EBUSY); 7696 7697 /* Quiesce VSI queues */ 7698 i40e_quiesce_vsi(vsi); 7699 7700 /* sets up the macvlans but does not "enable" them */ 7701 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan, 7702 vdev); 7703 if (ret) 7704 return ERR_PTR(ret); 7705 7706 /* Unquiesce VSI */ 7707 i40e_unquiesce_vsi(vsi); 7708 } 7709 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask, 7710 vsi->macvlan_cnt); 7711 if (avail_macvlan >= I40E_MAX_MACVLANS) 7712 return ERR_PTR(-EBUSY); 7713 7714 /* create the fwd struct */ 7715 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL); 7716 if (!fwd) 7717 return ERR_PTR(-ENOMEM); 7718 7719 set_bit(avail_macvlan, vsi->fwd_bitmask); 7720 fwd->bit_no = avail_macvlan; 7721 netdev_set_sb_channel(vdev, avail_macvlan); 7722 fwd->netdev = vdev; 7723 7724 if (!netif_running(netdev)) 7725 return fwd; 7726 7727 /* Set fwd ring up */ 7728 ret = i40e_fwd_ring_up(vsi, vdev, fwd); 7729 if (ret) { 7730 /* unbind the queues and drop the subordinate channel config */ 7731 netdev_unbind_sb_channel(netdev, vdev); 7732 netdev_set_sb_channel(vdev, 0); 7733 7734 kfree(fwd); 7735 return ERR_PTR(-EINVAL); 7736 } 7737 7738 return fwd; 7739 } 7740 7741 /** 7742 * i40e_del_all_macvlans - Delete all the mac filters on the channels 7743 * @vsi: the VSI we want to access 7744 */ 7745 static void i40e_del_all_macvlans(struct i40e_vsi *vsi) 7746 { 7747 struct i40e_channel *ch, *ch_tmp; 7748 struct i40e_pf *pf = vsi->back; 7749 struct i40e_hw *hw = &pf->hw; 7750 int aq_err, ret = 0; 7751 7752 if (list_empty(&vsi->macvlan_list)) 7753 return; 7754 7755 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) { 7756 if (i40e_is_channel_macvlan(ch)) { 7757 ret = i40e_del_macvlan_filter(hw, ch->seid, 7758 i40e_channel_mac(ch), 7759 &aq_err); 7760 if (!ret) { 7761 /* Reset queue contexts */ 7762 i40e_reset_ch_rings(vsi, ch); 7763 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask); 7764 netdev_unbind_sb_channel(vsi->netdev, 7765 ch->fwd->netdev); 7766 netdev_set_sb_channel(ch->fwd->netdev, 0); 7767 kfree(ch->fwd); 7768 ch->fwd = NULL; 7769 } 7770 } 7771 } 7772 } 7773 7774 /** 7775 * i40e_fwd_del - delete macvlan interfaces 7776 * @netdev: net device to configure 7777 * @vdev: macvlan netdevice 7778 */ 7779 static void i40e_fwd_del(struct net_device *netdev, void *vdev) 7780 { 7781 struct i40e_netdev_priv *np = netdev_priv(netdev); 7782 struct i40e_fwd_adapter *fwd = vdev; 7783 struct i40e_channel *ch, *ch_tmp; 7784 struct i40e_vsi *vsi = np->vsi; 7785 struct i40e_pf *pf = vsi->back; 7786 struct i40e_hw *hw = &pf->hw; 7787 int aq_err, ret = 0; 7788 7789 /* Find the channel associated with the macvlan and del mac filter */ 7790 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) { 7791 if (i40e_is_channel_macvlan(ch) && 7792 ether_addr_equal(i40e_channel_mac(ch), 7793 fwd->netdev->dev_addr)) { 7794 ret = i40e_del_macvlan_filter(hw, ch->seid, 7795 i40e_channel_mac(ch), 7796 &aq_err); 7797 if (!ret) { 7798 /* Reset queue contexts */ 7799 i40e_reset_ch_rings(vsi, ch); 7800 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask); 7801 netdev_unbind_sb_channel(netdev, fwd->netdev); 7802 netdev_set_sb_channel(fwd->netdev, 0); 7803 kfree(ch->fwd); 7804 ch->fwd = NULL; 7805 } else { 7806 dev_info(&pf->pdev->dev, 7807 "Error deleting mac filter on macvlan err %s, aq_err %s\n", 7808 i40e_stat_str(hw, ret), 7809 i40e_aq_str(hw, aq_err)); 7810 } 7811 break; 7812 } 7813 } 7814 } 7815 7816 /** 7817 * i40e_setup_tc - configure multiple traffic classes 7818 * @netdev: net device to configure 7819 * @type_data: tc offload data 7820 **/ 7821 static int i40e_setup_tc(struct net_device *netdev, void *type_data) 7822 { 7823 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data; 7824 struct i40e_netdev_priv *np = netdev_priv(netdev); 7825 struct i40e_vsi *vsi = np->vsi; 7826 struct i40e_pf *pf = vsi->back; 7827 u8 enabled_tc = 0, num_tc, hw; 7828 bool need_reset = false; 7829 int old_queue_pairs; 7830 int ret = -EINVAL; 7831 u16 mode; 7832 int i; 7833 7834 old_queue_pairs = vsi->num_queue_pairs; 7835 num_tc = mqprio_qopt->qopt.num_tc; 7836 hw = mqprio_qopt->qopt.hw; 7837 mode = mqprio_qopt->mode; 7838 if (!hw) { 7839 pf->flags &= ~I40E_FLAG_TC_MQPRIO; 7840 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt)); 7841 goto config_tc; 7842 } 7843 7844 /* Check if MFP enabled */ 7845 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 7846 netdev_info(netdev, 7847 "Configuring TC not supported in MFP mode\n"); 7848 return ret; 7849 } 7850 switch (mode) { 7851 case TC_MQPRIO_MODE_DCB: 7852 pf->flags &= ~I40E_FLAG_TC_MQPRIO; 7853 7854 /* Check if DCB enabled to continue */ 7855 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 7856 netdev_info(netdev, 7857 "DCB is not enabled for adapter\n"); 7858 return ret; 7859 } 7860 7861 /* Check whether tc count is within enabled limit */ 7862 if (num_tc > i40e_pf_get_num_tc(pf)) { 7863 netdev_info(netdev, 7864 "TC count greater than enabled on link for adapter\n"); 7865 return ret; 7866 } 7867 break; 7868 case TC_MQPRIO_MODE_CHANNEL: 7869 if (pf->flags & I40E_FLAG_DCB_ENABLED) { 7870 netdev_info(netdev, 7871 "Full offload of TC Mqprio options is not supported when DCB is enabled\n"); 7872 return ret; 7873 } 7874 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7875 return ret; 7876 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt); 7877 if (ret) 7878 return ret; 7879 memcpy(&vsi->mqprio_qopt, mqprio_qopt, 7880 sizeof(*mqprio_qopt)); 7881 pf->flags |= I40E_FLAG_TC_MQPRIO; 7882 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 7883 break; 7884 default: 7885 return -EINVAL; 7886 } 7887 7888 config_tc: 7889 /* Generate TC map for number of tc requested */ 7890 for (i = 0; i < num_tc; i++) 7891 enabled_tc |= BIT(i); 7892 7893 /* Requesting same TC configuration as already enabled */ 7894 if (enabled_tc == vsi->tc_config.enabled_tc && 7895 mode != TC_MQPRIO_MODE_CHANNEL) 7896 return 0; 7897 7898 /* Quiesce VSI queues */ 7899 i40e_quiesce_vsi(vsi); 7900 7901 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO)) 7902 i40e_remove_queue_channels(vsi); 7903 7904 /* Configure VSI for enabled TCs */ 7905 ret = i40e_vsi_config_tc(vsi, enabled_tc); 7906 if (ret) { 7907 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 7908 vsi->seid); 7909 need_reset = true; 7910 goto exit; 7911 } else { 7912 dev_info(&vsi->back->pdev->dev, 7913 "Setup channel (id:%u) utilizing num_queues %d\n", 7914 vsi->seid, vsi->tc_config.tc_info[0].qcount); 7915 } 7916 7917 if (pf->flags & I40E_FLAG_TC_MQPRIO) { 7918 if (vsi->mqprio_qopt.max_rate[0]) { 7919 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0]; 7920 7921 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR); 7922 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate); 7923 if (!ret) { 7924 u64 credits = max_tx_rate; 7925 7926 do_div(credits, I40E_BW_CREDIT_DIVISOR); 7927 dev_dbg(&vsi->back->pdev->dev, 7928 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 7929 max_tx_rate, 7930 credits, 7931 vsi->seid); 7932 } else { 7933 need_reset = true; 7934 goto exit; 7935 } 7936 } 7937 ret = i40e_configure_queue_channels(vsi); 7938 if (ret) { 7939 vsi->num_queue_pairs = old_queue_pairs; 7940 netdev_info(netdev, 7941 "Failed configuring queue channels\n"); 7942 need_reset = true; 7943 goto exit; 7944 } 7945 } 7946 7947 exit: 7948 /* Reset the configuration data to defaults, only TC0 is enabled */ 7949 if (need_reset) { 7950 i40e_vsi_set_default_tc_config(vsi); 7951 need_reset = false; 7952 } 7953 7954 /* Unquiesce VSI */ 7955 i40e_unquiesce_vsi(vsi); 7956 return ret; 7957 } 7958 7959 /** 7960 * i40e_set_cld_element - sets cloud filter element data 7961 * @filter: cloud filter rule 7962 * @cld: ptr to cloud filter element data 7963 * 7964 * This is helper function to copy data into cloud filter element 7965 **/ 7966 static inline void 7967 i40e_set_cld_element(struct i40e_cloud_filter *filter, 7968 struct i40e_aqc_cloud_filters_element_data *cld) 7969 { 7970 u32 ipa; 7971 int i; 7972 7973 memset(cld, 0, sizeof(*cld)); 7974 ether_addr_copy(cld->outer_mac, filter->dst_mac); 7975 ether_addr_copy(cld->inner_mac, filter->src_mac); 7976 7977 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6) 7978 return; 7979 7980 if (filter->n_proto == ETH_P_IPV6) { 7981 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1) 7982 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) { 7983 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]); 7984 7985 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa); 7986 } 7987 } else { 7988 ipa = be32_to_cpu(filter->dst_ipv4); 7989 7990 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa)); 7991 } 7992 7993 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id)); 7994 7995 /* tenant_id is not supported by FW now, once the support is enabled 7996 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id) 7997 */ 7998 if (filter->tenant_id) 7999 return; 8000 } 8001 8002 /** 8003 * i40e_add_del_cloud_filter - Add/del cloud filter 8004 * @vsi: pointer to VSI 8005 * @filter: cloud filter rule 8006 * @add: if true, add, if false, delete 8007 * 8008 * Add or delete a cloud filter for a specific flow spec. 8009 * Returns 0 if the filter were successfully added. 8010 **/ 8011 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi, 8012 struct i40e_cloud_filter *filter, bool add) 8013 { 8014 struct i40e_aqc_cloud_filters_element_data cld_filter; 8015 struct i40e_pf *pf = vsi->back; 8016 int ret; 8017 static const u16 flag_table[128] = { 8018 [I40E_CLOUD_FILTER_FLAGS_OMAC] = 8019 I40E_AQC_ADD_CLOUD_FILTER_OMAC, 8020 [I40E_CLOUD_FILTER_FLAGS_IMAC] = 8021 I40E_AQC_ADD_CLOUD_FILTER_IMAC, 8022 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] = 8023 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN, 8024 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] = 8025 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID, 8026 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] = 8027 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC, 8028 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] = 8029 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID, 8030 [I40E_CLOUD_FILTER_FLAGS_IIP] = 8031 I40E_AQC_ADD_CLOUD_FILTER_IIP, 8032 }; 8033 8034 if (filter->flags >= ARRAY_SIZE(flag_table)) 8035 return I40E_ERR_CONFIG; 8036 8037 memset(&cld_filter, 0, sizeof(cld_filter)); 8038 8039 /* copy element needed to add cloud filter from filter */ 8040 i40e_set_cld_element(filter, &cld_filter); 8041 8042 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE) 8043 cld_filter.flags = cpu_to_le16(filter->tunnel_type << 8044 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT); 8045 8046 if (filter->n_proto == ETH_P_IPV6) 8047 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] | 8048 I40E_AQC_ADD_CLOUD_FLAGS_IPV6); 8049 else 8050 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] | 8051 I40E_AQC_ADD_CLOUD_FLAGS_IPV4); 8052 8053 if (add) 8054 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid, 8055 &cld_filter, 1); 8056 else 8057 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid, 8058 &cld_filter, 1); 8059 if (ret) 8060 dev_dbg(&pf->pdev->dev, 8061 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n", 8062 add ? "add" : "delete", filter->dst_port, ret, 8063 pf->hw.aq.asq_last_status); 8064 else 8065 dev_info(&pf->pdev->dev, 8066 "%s cloud filter for VSI: %d\n", 8067 add ? "Added" : "Deleted", filter->seid); 8068 return ret; 8069 } 8070 8071 /** 8072 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf 8073 * @vsi: pointer to VSI 8074 * @filter: cloud filter rule 8075 * @add: if true, add, if false, delete 8076 * 8077 * Add or delete a cloud filter for a specific flow spec using big buffer. 8078 * Returns 0 if the filter were successfully added. 8079 **/ 8080 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi, 8081 struct i40e_cloud_filter *filter, 8082 bool add) 8083 { 8084 struct i40e_aqc_cloud_filters_element_bb cld_filter; 8085 struct i40e_pf *pf = vsi->back; 8086 int ret; 8087 8088 /* Both (src/dst) valid mac_addr are not supported */ 8089 if ((is_valid_ether_addr(filter->dst_mac) && 8090 is_valid_ether_addr(filter->src_mac)) || 8091 (is_multicast_ether_addr(filter->dst_mac) && 8092 is_multicast_ether_addr(filter->src_mac))) 8093 return -EOPNOTSUPP; 8094 8095 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP 8096 * ports are not supported via big buffer now. 8097 */ 8098 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP) 8099 return -EOPNOTSUPP; 8100 8101 /* adding filter using src_port/src_ip is not supported at this stage */ 8102 if (filter->src_port || 8103 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) || 8104 !ipv6_addr_any(&filter->ip.v6.src_ip6)) 8105 return -EOPNOTSUPP; 8106 8107 memset(&cld_filter, 0, sizeof(cld_filter)); 8108 8109 /* copy element needed to add cloud filter from filter */ 8110 i40e_set_cld_element(filter, &cld_filter.element); 8111 8112 if (is_valid_ether_addr(filter->dst_mac) || 8113 is_valid_ether_addr(filter->src_mac) || 8114 is_multicast_ether_addr(filter->dst_mac) || 8115 is_multicast_ether_addr(filter->src_mac)) { 8116 /* MAC + IP : unsupported mode */ 8117 if (filter->dst_ipv4) 8118 return -EOPNOTSUPP; 8119 8120 /* since we validated that L4 port must be valid before 8121 * we get here, start with respective "flags" value 8122 * and update if vlan is present or not 8123 */ 8124 cld_filter.element.flags = 8125 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT); 8126 8127 if (filter->vlan_id) { 8128 cld_filter.element.flags = 8129 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT); 8130 } 8131 8132 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) || 8133 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) { 8134 cld_filter.element.flags = 8135 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT); 8136 if (filter->n_proto == ETH_P_IPV6) 8137 cld_filter.element.flags |= 8138 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6); 8139 else 8140 cld_filter.element.flags |= 8141 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4); 8142 } else { 8143 dev_err(&pf->pdev->dev, 8144 "either mac or ip has to be valid for cloud filter\n"); 8145 return -EINVAL; 8146 } 8147 8148 /* Now copy L4 port in Byte 6..7 in general fields */ 8149 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] = 8150 be16_to_cpu(filter->dst_port); 8151 8152 if (add) { 8153 /* Validate current device switch mode, change if necessary */ 8154 ret = i40e_validate_and_set_switch_mode(vsi); 8155 if (ret) { 8156 dev_err(&pf->pdev->dev, 8157 "failed to set switch mode, ret %d\n", 8158 ret); 8159 return ret; 8160 } 8161 8162 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid, 8163 &cld_filter, 1); 8164 } else { 8165 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid, 8166 &cld_filter, 1); 8167 } 8168 8169 if (ret) 8170 dev_dbg(&pf->pdev->dev, 8171 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n", 8172 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status); 8173 else 8174 dev_info(&pf->pdev->dev, 8175 "%s cloud filter for VSI: %d, L4 port: %d\n", 8176 add ? "add" : "delete", filter->seid, 8177 ntohs(filter->dst_port)); 8178 return ret; 8179 } 8180 8181 /** 8182 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel 8183 * @vsi: Pointer to VSI 8184 * @f: Pointer to struct flow_cls_offload 8185 * @filter: Pointer to cloud filter structure 8186 * 8187 **/ 8188 static int i40e_parse_cls_flower(struct i40e_vsi *vsi, 8189 struct flow_cls_offload *f, 8190 struct i40e_cloud_filter *filter) 8191 { 8192 struct flow_rule *rule = flow_cls_offload_flow_rule(f); 8193 struct flow_dissector *dissector = rule->match.dissector; 8194 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0; 8195 struct i40e_pf *pf = vsi->back; 8196 u8 field_flags = 0; 8197 8198 if (dissector->used_keys & 8199 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) | 8200 BIT(FLOW_DISSECTOR_KEY_BASIC) | 8201 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) | 8202 BIT(FLOW_DISSECTOR_KEY_VLAN) | 8203 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) | 8204 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) | 8205 BIT(FLOW_DISSECTOR_KEY_PORTS) | 8206 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) { 8207 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n", 8208 dissector->used_keys); 8209 return -EOPNOTSUPP; 8210 } 8211 8212 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) { 8213 struct flow_match_enc_keyid match; 8214 8215 flow_rule_match_enc_keyid(rule, &match); 8216 if (match.mask->keyid != 0) 8217 field_flags |= I40E_CLOUD_FIELD_TEN_ID; 8218 8219 filter->tenant_id = be32_to_cpu(match.key->keyid); 8220 } 8221 8222 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) { 8223 struct flow_match_basic match; 8224 8225 flow_rule_match_basic(rule, &match); 8226 n_proto_key = ntohs(match.key->n_proto); 8227 n_proto_mask = ntohs(match.mask->n_proto); 8228 8229 if (n_proto_key == ETH_P_ALL) { 8230 n_proto_key = 0; 8231 n_proto_mask = 0; 8232 } 8233 filter->n_proto = n_proto_key & n_proto_mask; 8234 filter->ip_proto = match.key->ip_proto; 8235 } 8236 8237 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) { 8238 struct flow_match_eth_addrs match; 8239 8240 flow_rule_match_eth_addrs(rule, &match); 8241 8242 /* use is_broadcast and is_zero to check for all 0xf or 0 */ 8243 if (!is_zero_ether_addr(match.mask->dst)) { 8244 if (is_broadcast_ether_addr(match.mask->dst)) { 8245 field_flags |= I40E_CLOUD_FIELD_OMAC; 8246 } else { 8247 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n", 8248 match.mask->dst); 8249 return I40E_ERR_CONFIG; 8250 } 8251 } 8252 8253 if (!is_zero_ether_addr(match.mask->src)) { 8254 if (is_broadcast_ether_addr(match.mask->src)) { 8255 field_flags |= I40E_CLOUD_FIELD_IMAC; 8256 } else { 8257 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n", 8258 match.mask->src); 8259 return I40E_ERR_CONFIG; 8260 } 8261 } 8262 ether_addr_copy(filter->dst_mac, match.key->dst); 8263 ether_addr_copy(filter->src_mac, match.key->src); 8264 } 8265 8266 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) { 8267 struct flow_match_vlan match; 8268 8269 flow_rule_match_vlan(rule, &match); 8270 if (match.mask->vlan_id) { 8271 if (match.mask->vlan_id == VLAN_VID_MASK) { 8272 field_flags |= I40E_CLOUD_FIELD_IVLAN; 8273 8274 } else { 8275 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n", 8276 match.mask->vlan_id); 8277 return I40E_ERR_CONFIG; 8278 } 8279 } 8280 8281 filter->vlan_id = cpu_to_be16(match.key->vlan_id); 8282 } 8283 8284 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) { 8285 struct flow_match_control match; 8286 8287 flow_rule_match_control(rule, &match); 8288 addr_type = match.key->addr_type; 8289 } 8290 8291 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) { 8292 struct flow_match_ipv4_addrs match; 8293 8294 flow_rule_match_ipv4_addrs(rule, &match); 8295 if (match.mask->dst) { 8296 if (match.mask->dst == cpu_to_be32(0xffffffff)) { 8297 field_flags |= I40E_CLOUD_FIELD_IIP; 8298 } else { 8299 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n", 8300 &match.mask->dst); 8301 return I40E_ERR_CONFIG; 8302 } 8303 } 8304 8305 if (match.mask->src) { 8306 if (match.mask->src == cpu_to_be32(0xffffffff)) { 8307 field_flags |= I40E_CLOUD_FIELD_IIP; 8308 } else { 8309 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n", 8310 &match.mask->src); 8311 return I40E_ERR_CONFIG; 8312 } 8313 } 8314 8315 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) { 8316 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n"); 8317 return I40E_ERR_CONFIG; 8318 } 8319 filter->dst_ipv4 = match.key->dst; 8320 filter->src_ipv4 = match.key->src; 8321 } 8322 8323 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { 8324 struct flow_match_ipv6_addrs match; 8325 8326 flow_rule_match_ipv6_addrs(rule, &match); 8327 8328 /* src and dest IPV6 address should not be LOOPBACK 8329 * (0:0:0:0:0:0:0:1), which can be represented as ::1 8330 */ 8331 if (ipv6_addr_loopback(&match.key->dst) || 8332 ipv6_addr_loopback(&match.key->src)) { 8333 dev_err(&pf->pdev->dev, 8334 "Bad ipv6, addr is LOOPBACK\n"); 8335 return I40E_ERR_CONFIG; 8336 } 8337 if (!ipv6_addr_any(&match.mask->dst) || 8338 !ipv6_addr_any(&match.mask->src)) 8339 field_flags |= I40E_CLOUD_FIELD_IIP; 8340 8341 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32, 8342 sizeof(filter->src_ipv6)); 8343 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32, 8344 sizeof(filter->dst_ipv6)); 8345 } 8346 8347 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) { 8348 struct flow_match_ports match; 8349 8350 flow_rule_match_ports(rule, &match); 8351 if (match.mask->src) { 8352 if (match.mask->src == cpu_to_be16(0xffff)) { 8353 field_flags |= I40E_CLOUD_FIELD_IIP; 8354 } else { 8355 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n", 8356 be16_to_cpu(match.mask->src)); 8357 return I40E_ERR_CONFIG; 8358 } 8359 } 8360 8361 if (match.mask->dst) { 8362 if (match.mask->dst == cpu_to_be16(0xffff)) { 8363 field_flags |= I40E_CLOUD_FIELD_IIP; 8364 } else { 8365 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n", 8366 be16_to_cpu(match.mask->dst)); 8367 return I40E_ERR_CONFIG; 8368 } 8369 } 8370 8371 filter->dst_port = match.key->dst; 8372 filter->src_port = match.key->src; 8373 8374 switch (filter->ip_proto) { 8375 case IPPROTO_TCP: 8376 case IPPROTO_UDP: 8377 break; 8378 default: 8379 dev_err(&pf->pdev->dev, 8380 "Only UDP and TCP transport are supported\n"); 8381 return -EINVAL; 8382 } 8383 } 8384 filter->flags = field_flags; 8385 return 0; 8386 } 8387 8388 /** 8389 * i40e_handle_tclass: Forward to a traffic class on the device 8390 * @vsi: Pointer to VSI 8391 * @tc: traffic class index on the device 8392 * @filter: Pointer to cloud filter structure 8393 * 8394 **/ 8395 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc, 8396 struct i40e_cloud_filter *filter) 8397 { 8398 struct i40e_channel *ch, *ch_tmp; 8399 8400 /* direct to a traffic class on the same device */ 8401 if (tc == 0) { 8402 filter->seid = vsi->seid; 8403 return 0; 8404 } else if (vsi->tc_config.enabled_tc & BIT(tc)) { 8405 if (!filter->dst_port) { 8406 dev_err(&vsi->back->pdev->dev, 8407 "Specify destination port to direct to traffic class that is not default\n"); 8408 return -EINVAL; 8409 } 8410 if (list_empty(&vsi->ch_list)) 8411 return -EINVAL; 8412 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, 8413 list) { 8414 if (ch->seid == vsi->tc_seid_map[tc]) 8415 filter->seid = ch->seid; 8416 } 8417 return 0; 8418 } 8419 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n"); 8420 return -EINVAL; 8421 } 8422 8423 /** 8424 * i40e_configure_clsflower - Configure tc flower filters 8425 * @vsi: Pointer to VSI 8426 * @cls_flower: Pointer to struct flow_cls_offload 8427 * 8428 **/ 8429 static int i40e_configure_clsflower(struct i40e_vsi *vsi, 8430 struct flow_cls_offload *cls_flower) 8431 { 8432 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid); 8433 struct i40e_cloud_filter *filter = NULL; 8434 struct i40e_pf *pf = vsi->back; 8435 int err = 0; 8436 8437 if (tc < 0) { 8438 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n"); 8439 return -EOPNOTSUPP; 8440 } 8441 8442 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 8443 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 8444 return -EBUSY; 8445 8446 if (pf->fdir_pf_active_filters || 8447 (!hlist_empty(&pf->fdir_filter_list))) { 8448 dev_err(&vsi->back->pdev->dev, 8449 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n"); 8450 return -EINVAL; 8451 } 8452 8453 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) { 8454 dev_err(&vsi->back->pdev->dev, 8455 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n"); 8456 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8457 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER; 8458 } 8459 8460 filter = kzalloc(sizeof(*filter), GFP_KERNEL); 8461 if (!filter) 8462 return -ENOMEM; 8463 8464 filter->cookie = cls_flower->cookie; 8465 8466 err = i40e_parse_cls_flower(vsi, cls_flower, filter); 8467 if (err < 0) 8468 goto err; 8469 8470 err = i40e_handle_tclass(vsi, tc, filter); 8471 if (err < 0) 8472 goto err; 8473 8474 /* Add cloud filter */ 8475 if (filter->dst_port) 8476 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true); 8477 else 8478 err = i40e_add_del_cloud_filter(vsi, filter, true); 8479 8480 if (err) { 8481 dev_err(&pf->pdev->dev, 8482 "Failed to add cloud filter, err %s\n", 8483 i40e_stat_str(&pf->hw, err)); 8484 goto err; 8485 } 8486 8487 /* add filter to the ordered list */ 8488 INIT_HLIST_NODE(&filter->cloud_node); 8489 8490 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list); 8491 8492 pf->num_cloud_filters++; 8493 8494 return err; 8495 err: 8496 kfree(filter); 8497 return err; 8498 } 8499 8500 /** 8501 * i40e_find_cloud_filter - Find the could filter in the list 8502 * @vsi: Pointer to VSI 8503 * @cookie: filter specific cookie 8504 * 8505 **/ 8506 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi, 8507 unsigned long *cookie) 8508 { 8509 struct i40e_cloud_filter *filter = NULL; 8510 struct hlist_node *node2; 8511 8512 hlist_for_each_entry_safe(filter, node2, 8513 &vsi->back->cloud_filter_list, cloud_node) 8514 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie))) 8515 return filter; 8516 return NULL; 8517 } 8518 8519 /** 8520 * i40e_delete_clsflower - Remove tc flower filters 8521 * @vsi: Pointer to VSI 8522 * @cls_flower: Pointer to struct flow_cls_offload 8523 * 8524 **/ 8525 static int i40e_delete_clsflower(struct i40e_vsi *vsi, 8526 struct flow_cls_offload *cls_flower) 8527 { 8528 struct i40e_cloud_filter *filter = NULL; 8529 struct i40e_pf *pf = vsi->back; 8530 int err = 0; 8531 8532 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie); 8533 8534 if (!filter) 8535 return -EINVAL; 8536 8537 hash_del(&filter->cloud_node); 8538 8539 if (filter->dst_port) 8540 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false); 8541 else 8542 err = i40e_add_del_cloud_filter(vsi, filter, false); 8543 8544 kfree(filter); 8545 if (err) { 8546 dev_err(&pf->pdev->dev, 8547 "Failed to delete cloud filter, err %s\n", 8548 i40e_stat_str(&pf->hw, err)); 8549 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status); 8550 } 8551 8552 pf->num_cloud_filters--; 8553 if (!pf->num_cloud_filters) 8554 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) && 8555 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) { 8556 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8557 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER; 8558 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE; 8559 } 8560 return 0; 8561 } 8562 8563 /** 8564 * i40e_setup_tc_cls_flower - flower classifier offloads 8565 * @np: net device to configure 8566 * @cls_flower: offload data 8567 **/ 8568 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np, 8569 struct flow_cls_offload *cls_flower) 8570 { 8571 struct i40e_vsi *vsi = np->vsi; 8572 8573 switch (cls_flower->command) { 8574 case FLOW_CLS_REPLACE: 8575 return i40e_configure_clsflower(vsi, cls_flower); 8576 case FLOW_CLS_DESTROY: 8577 return i40e_delete_clsflower(vsi, cls_flower); 8578 case FLOW_CLS_STATS: 8579 return -EOPNOTSUPP; 8580 default: 8581 return -EOPNOTSUPP; 8582 } 8583 } 8584 8585 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 8586 void *cb_priv) 8587 { 8588 struct i40e_netdev_priv *np = cb_priv; 8589 8590 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data)) 8591 return -EOPNOTSUPP; 8592 8593 switch (type) { 8594 case TC_SETUP_CLSFLOWER: 8595 return i40e_setup_tc_cls_flower(np, type_data); 8596 8597 default: 8598 return -EOPNOTSUPP; 8599 } 8600 } 8601 8602 static LIST_HEAD(i40e_block_cb_list); 8603 8604 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type, 8605 void *type_data) 8606 { 8607 struct i40e_netdev_priv *np = netdev_priv(netdev); 8608 8609 switch (type) { 8610 case TC_SETUP_QDISC_MQPRIO: 8611 return i40e_setup_tc(netdev, type_data); 8612 case TC_SETUP_BLOCK: 8613 return flow_block_cb_setup_simple(type_data, 8614 &i40e_block_cb_list, 8615 i40e_setup_tc_block_cb, 8616 np, np, true); 8617 default: 8618 return -EOPNOTSUPP; 8619 } 8620 } 8621 8622 /** 8623 * i40e_open - Called when a network interface is made active 8624 * @netdev: network interface device structure 8625 * 8626 * The open entry point is called when a network interface is made 8627 * active by the system (IFF_UP). At this point all resources needed 8628 * for transmit and receive operations are allocated, the interrupt 8629 * handler is registered with the OS, the netdev watchdog subtask is 8630 * enabled, and the stack is notified that the interface is ready. 8631 * 8632 * Returns 0 on success, negative value on failure 8633 **/ 8634 int i40e_open(struct net_device *netdev) 8635 { 8636 struct i40e_netdev_priv *np = netdev_priv(netdev); 8637 struct i40e_vsi *vsi = np->vsi; 8638 struct i40e_pf *pf = vsi->back; 8639 int err; 8640 8641 /* disallow open during test or if eeprom is broken */ 8642 if (test_bit(__I40E_TESTING, pf->state) || 8643 test_bit(__I40E_BAD_EEPROM, pf->state)) 8644 return -EBUSY; 8645 8646 netif_carrier_off(netdev); 8647 8648 if (i40e_force_link_state(pf, true)) 8649 return -EAGAIN; 8650 8651 err = i40e_vsi_open(vsi); 8652 if (err) 8653 return err; 8654 8655 /* configure global TSO hardware offload settings */ 8656 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 8657 TCP_FLAG_FIN) >> 16); 8658 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 8659 TCP_FLAG_FIN | 8660 TCP_FLAG_CWR) >> 16); 8661 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 8662 udp_tunnel_get_rx_info(netdev); 8663 8664 return 0; 8665 } 8666 8667 /** 8668 * i40e_vsi_open - 8669 * @vsi: the VSI to open 8670 * 8671 * Finish initialization of the VSI. 8672 * 8673 * Returns 0 on success, negative value on failure 8674 * 8675 * Note: expects to be called while under rtnl_lock() 8676 **/ 8677 int i40e_vsi_open(struct i40e_vsi *vsi) 8678 { 8679 struct i40e_pf *pf = vsi->back; 8680 char int_name[I40E_INT_NAME_STR_LEN]; 8681 int err; 8682 8683 /* allocate descriptors */ 8684 err = i40e_vsi_setup_tx_resources(vsi); 8685 if (err) 8686 goto err_setup_tx; 8687 err = i40e_vsi_setup_rx_resources(vsi); 8688 if (err) 8689 goto err_setup_rx; 8690 8691 err = i40e_vsi_configure(vsi); 8692 if (err) 8693 goto err_setup_rx; 8694 8695 if (vsi->netdev) { 8696 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 8697 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 8698 err = i40e_vsi_request_irq(vsi, int_name); 8699 if (err) 8700 goto err_setup_rx; 8701 8702 /* Notify the stack of the actual queue counts. */ 8703 err = netif_set_real_num_tx_queues(vsi->netdev, 8704 vsi->num_queue_pairs); 8705 if (err) 8706 goto err_set_queues; 8707 8708 err = netif_set_real_num_rx_queues(vsi->netdev, 8709 vsi->num_queue_pairs); 8710 if (err) 8711 goto err_set_queues; 8712 8713 } else if (vsi->type == I40E_VSI_FDIR) { 8714 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 8715 dev_driver_string(&pf->pdev->dev), 8716 dev_name(&pf->pdev->dev)); 8717 err = i40e_vsi_request_irq(vsi, int_name); 8718 if (err) 8719 goto err_setup_rx; 8720 8721 } else { 8722 err = -EINVAL; 8723 goto err_setup_rx; 8724 } 8725 8726 err = i40e_up_complete(vsi); 8727 if (err) 8728 goto err_up_complete; 8729 8730 return 0; 8731 8732 err_up_complete: 8733 i40e_down(vsi); 8734 err_set_queues: 8735 i40e_vsi_free_irq(vsi); 8736 err_setup_rx: 8737 i40e_vsi_free_rx_resources(vsi); 8738 err_setup_tx: 8739 i40e_vsi_free_tx_resources(vsi); 8740 if (vsi == pf->vsi[pf->lan_vsi]) 8741 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 8742 8743 return err; 8744 } 8745 8746 /** 8747 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 8748 * @pf: Pointer to PF 8749 * 8750 * This function destroys the hlist where all the Flow Director 8751 * filters were saved. 8752 **/ 8753 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 8754 { 8755 struct i40e_fdir_filter *filter; 8756 struct i40e_flex_pit *pit_entry, *tmp; 8757 struct hlist_node *node2; 8758 8759 hlist_for_each_entry_safe(filter, node2, 8760 &pf->fdir_filter_list, fdir_node) { 8761 hlist_del(&filter->fdir_node); 8762 kfree(filter); 8763 } 8764 8765 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) { 8766 list_del(&pit_entry->list); 8767 kfree(pit_entry); 8768 } 8769 INIT_LIST_HEAD(&pf->l3_flex_pit_list); 8770 8771 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) { 8772 list_del(&pit_entry->list); 8773 kfree(pit_entry); 8774 } 8775 INIT_LIST_HEAD(&pf->l4_flex_pit_list); 8776 8777 pf->fdir_pf_active_filters = 0; 8778 i40e_reset_fdir_filter_cnt(pf); 8779 8780 /* Reprogram the default input set for TCP/IPv4 */ 8781 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 8782 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 8783 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8784 8785 /* Reprogram the default input set for TCP/IPv6 */ 8786 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP, 8787 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK | 8788 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8789 8790 /* Reprogram the default input set for UDP/IPv4 */ 8791 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP, 8792 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 8793 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8794 8795 /* Reprogram the default input set for UDP/IPv6 */ 8796 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP, 8797 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK | 8798 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8799 8800 /* Reprogram the default input set for SCTP/IPv4 */ 8801 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP, 8802 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 8803 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8804 8805 /* Reprogram the default input set for SCTP/IPv6 */ 8806 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP, 8807 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK | 8808 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 8809 8810 /* Reprogram the default input set for Other/IPv4 */ 8811 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, 8812 I40E_L3_SRC_MASK | I40E_L3_DST_MASK); 8813 8814 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 8815 I40E_L3_SRC_MASK | I40E_L3_DST_MASK); 8816 8817 /* Reprogram the default input set for Other/IPv6 */ 8818 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER, 8819 I40E_L3_SRC_MASK | I40E_L3_DST_MASK); 8820 8821 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6, 8822 I40E_L3_SRC_MASK | I40E_L3_DST_MASK); 8823 } 8824 8825 /** 8826 * i40e_cloud_filter_exit - Cleans up the cloud filters 8827 * @pf: Pointer to PF 8828 * 8829 * This function destroys the hlist where all the cloud filters 8830 * were saved. 8831 **/ 8832 static void i40e_cloud_filter_exit(struct i40e_pf *pf) 8833 { 8834 struct i40e_cloud_filter *cfilter; 8835 struct hlist_node *node; 8836 8837 hlist_for_each_entry_safe(cfilter, node, 8838 &pf->cloud_filter_list, cloud_node) { 8839 hlist_del(&cfilter->cloud_node); 8840 kfree(cfilter); 8841 } 8842 pf->num_cloud_filters = 0; 8843 8844 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) && 8845 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) { 8846 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8847 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER; 8848 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE; 8849 } 8850 } 8851 8852 /** 8853 * i40e_close - Disables a network interface 8854 * @netdev: network interface device structure 8855 * 8856 * The close entry point is called when an interface is de-activated 8857 * by the OS. The hardware is still under the driver's control, but 8858 * this netdev interface is disabled. 8859 * 8860 * Returns 0, this is not allowed to fail 8861 **/ 8862 int i40e_close(struct net_device *netdev) 8863 { 8864 struct i40e_netdev_priv *np = netdev_priv(netdev); 8865 struct i40e_vsi *vsi = np->vsi; 8866 8867 i40e_vsi_close(vsi); 8868 8869 return 0; 8870 } 8871 8872 /** 8873 * i40e_do_reset - Start a PF or Core Reset sequence 8874 * @pf: board private structure 8875 * @reset_flags: which reset is requested 8876 * @lock_acquired: indicates whether or not the lock has been acquired 8877 * before this function was called. 8878 * 8879 * The essential difference in resets is that the PF Reset 8880 * doesn't clear the packet buffers, doesn't reset the PE 8881 * firmware, and doesn't bother the other PFs on the chip. 8882 **/ 8883 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired) 8884 { 8885 u32 val; 8886 8887 /* do the biggest reset indicated */ 8888 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { 8889 8890 /* Request a Global Reset 8891 * 8892 * This will start the chip's countdown to the actual full 8893 * chip reset event, and a warning interrupt to be sent 8894 * to all PFs, including the requestor. Our handler 8895 * for the warning interrupt will deal with the shutdown 8896 * and recovery of the switch setup. 8897 */ 8898 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 8899 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 8900 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 8901 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 8902 8903 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { 8904 8905 /* Request a Core Reset 8906 * 8907 * Same as Global Reset, except does *not* include the MAC/PHY 8908 */ 8909 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 8910 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 8911 val |= I40E_GLGEN_RTRIG_CORER_MASK; 8912 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 8913 i40e_flush(&pf->hw); 8914 8915 } else if (reset_flags & I40E_PF_RESET_FLAG) { 8916 8917 /* Request a PF Reset 8918 * 8919 * Resets only the PF-specific registers 8920 * 8921 * This goes directly to the tear-down and rebuild of 8922 * the switch, since we need to do all the recovery as 8923 * for the Core Reset. 8924 */ 8925 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 8926 i40e_handle_reset_warning(pf, lock_acquired); 8927 8928 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) { 8929 /* Request a PF Reset 8930 * 8931 * Resets PF and reinitializes PFs VSI. 8932 */ 8933 i40e_prep_for_reset(pf); 8934 i40e_reset_and_rebuild(pf, true, lock_acquired); 8935 dev_info(&pf->pdev->dev, 8936 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ? 8937 "FW LLDP is disabled\n" : 8938 "FW LLDP is enabled\n"); 8939 8940 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { 8941 int v; 8942 8943 /* Find the VSI(s) that requested a re-init */ 8944 dev_info(&pf->pdev->dev, 8945 "VSI reinit requested\n"); 8946 for (v = 0; v < pf->num_alloc_vsi; v++) { 8947 struct i40e_vsi *vsi = pf->vsi[v]; 8948 8949 if (vsi != NULL && 8950 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED, 8951 vsi->state)) 8952 i40e_vsi_reinit_locked(pf->vsi[v]); 8953 } 8954 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { 8955 int v; 8956 8957 /* Find the VSI(s) that needs to be brought down */ 8958 dev_info(&pf->pdev->dev, "VSI down requested\n"); 8959 for (v = 0; v < pf->num_alloc_vsi; v++) { 8960 struct i40e_vsi *vsi = pf->vsi[v]; 8961 8962 if (vsi != NULL && 8963 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED, 8964 vsi->state)) { 8965 set_bit(__I40E_VSI_DOWN, vsi->state); 8966 i40e_down(vsi); 8967 } 8968 } 8969 } else { 8970 dev_info(&pf->pdev->dev, 8971 "bad reset request 0x%08x\n", reset_flags); 8972 } 8973 } 8974 8975 #ifdef CONFIG_I40E_DCB 8976 /** 8977 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 8978 * @pf: board private structure 8979 * @old_cfg: current DCB config 8980 * @new_cfg: new DCB config 8981 **/ 8982 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 8983 struct i40e_dcbx_config *old_cfg, 8984 struct i40e_dcbx_config *new_cfg) 8985 { 8986 bool need_reconfig = false; 8987 8988 /* Check if ETS configuration has changed */ 8989 if (memcmp(&new_cfg->etscfg, 8990 &old_cfg->etscfg, 8991 sizeof(new_cfg->etscfg))) { 8992 /* If Priority Table has changed reconfig is needed */ 8993 if (memcmp(&new_cfg->etscfg.prioritytable, 8994 &old_cfg->etscfg.prioritytable, 8995 sizeof(new_cfg->etscfg.prioritytable))) { 8996 need_reconfig = true; 8997 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 8998 } 8999 9000 if (memcmp(&new_cfg->etscfg.tcbwtable, 9001 &old_cfg->etscfg.tcbwtable, 9002 sizeof(new_cfg->etscfg.tcbwtable))) 9003 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 9004 9005 if (memcmp(&new_cfg->etscfg.tsatable, 9006 &old_cfg->etscfg.tsatable, 9007 sizeof(new_cfg->etscfg.tsatable))) 9008 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 9009 } 9010 9011 /* Check if PFC configuration has changed */ 9012 if (memcmp(&new_cfg->pfc, 9013 &old_cfg->pfc, 9014 sizeof(new_cfg->pfc))) { 9015 need_reconfig = true; 9016 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 9017 } 9018 9019 /* Check if APP Table has changed */ 9020 if (memcmp(&new_cfg->app, 9021 &old_cfg->app, 9022 sizeof(new_cfg->app))) { 9023 need_reconfig = true; 9024 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 9025 } 9026 9027 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig); 9028 return need_reconfig; 9029 } 9030 9031 /** 9032 * i40e_handle_lldp_event - Handle LLDP Change MIB event 9033 * @pf: board private structure 9034 * @e: event info posted on ARQ 9035 **/ 9036 static int i40e_handle_lldp_event(struct i40e_pf *pf, 9037 struct i40e_arq_event_info *e) 9038 { 9039 struct i40e_aqc_lldp_get_mib *mib = 9040 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 9041 struct i40e_hw *hw = &pf->hw; 9042 struct i40e_dcbx_config tmp_dcbx_cfg; 9043 bool need_reconfig = false; 9044 int ret = 0; 9045 u8 type; 9046 9047 /* X710-T*L 2.5G and 5G speeds don't support DCB */ 9048 if (I40E_IS_X710TL_DEVICE(hw->device_id) && 9049 (hw->phy.link_info.link_speed & 9050 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) && 9051 !(pf->flags & I40E_FLAG_DCB_CAPABLE)) 9052 /* let firmware decide if the DCB should be disabled */ 9053 pf->flags |= I40E_FLAG_DCB_CAPABLE; 9054 9055 /* Not DCB capable or capability disabled */ 9056 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 9057 return ret; 9058 9059 /* Ignore if event is not for Nearest Bridge */ 9060 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 9061 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 9062 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type); 9063 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 9064 return ret; 9065 9066 /* Check MIB Type and return if event for Remote MIB update */ 9067 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 9068 dev_dbg(&pf->pdev->dev, 9069 "LLDP event mib type %s\n", type ? "remote" : "local"); 9070 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 9071 /* Update the remote cached instance and return */ 9072 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 9073 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 9074 &hw->remote_dcbx_config); 9075 goto exit; 9076 } 9077 9078 /* Store the old configuration */ 9079 tmp_dcbx_cfg = hw->local_dcbx_config; 9080 9081 /* Reset the old DCBx configuration data */ 9082 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 9083 /* Get updated DCBX data from firmware */ 9084 ret = i40e_get_dcb_config(&pf->hw); 9085 if (ret) { 9086 /* X710-T*L 2.5G and 5G speeds don't support DCB */ 9087 if (I40E_IS_X710TL_DEVICE(hw->device_id) && 9088 (hw->phy.link_info.link_speed & 9089 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) { 9090 dev_warn(&pf->pdev->dev, 9091 "DCB is not supported for X710-T*L 2.5/5G speeds\n"); 9092 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9093 } else { 9094 dev_info(&pf->pdev->dev, 9095 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", 9096 i40e_stat_str(&pf->hw, ret), 9097 i40e_aq_str(&pf->hw, 9098 pf->hw.aq.asq_last_status)); 9099 } 9100 goto exit; 9101 } 9102 9103 /* No change detected in DCBX configs */ 9104 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 9105 sizeof(tmp_dcbx_cfg))) { 9106 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 9107 goto exit; 9108 } 9109 9110 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 9111 &hw->local_dcbx_config); 9112 9113 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 9114 9115 if (!need_reconfig) 9116 goto exit; 9117 9118 /* Enable DCB tagging only when more than one TC */ 9119 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 9120 pf->flags |= I40E_FLAG_DCB_ENABLED; 9121 else 9122 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 9123 9124 set_bit(__I40E_PORT_SUSPENDED, pf->state); 9125 /* Reconfiguration needed quiesce all VSIs */ 9126 i40e_pf_quiesce_all_vsi(pf); 9127 9128 /* Changes in configuration update VEB/VSI */ 9129 i40e_dcb_reconfigure(pf); 9130 9131 ret = i40e_resume_port_tx(pf); 9132 9133 clear_bit(__I40E_PORT_SUSPENDED, pf->state); 9134 /* In case of error no point in resuming VSIs */ 9135 if (ret) 9136 goto exit; 9137 9138 /* Wait for the PF's queues to be disabled */ 9139 ret = i40e_pf_wait_queues_disabled(pf); 9140 if (ret) { 9141 /* Schedule PF reset to recover */ 9142 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 9143 i40e_service_event_schedule(pf); 9144 } else { 9145 i40e_pf_unquiesce_all_vsi(pf); 9146 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state); 9147 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state); 9148 } 9149 9150 exit: 9151 return ret; 9152 } 9153 #endif /* CONFIG_I40E_DCB */ 9154 9155 /** 9156 * i40e_do_reset_safe - Protected reset path for userland calls. 9157 * @pf: board private structure 9158 * @reset_flags: which reset is requested 9159 * 9160 **/ 9161 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 9162 { 9163 rtnl_lock(); 9164 i40e_do_reset(pf, reset_flags, true); 9165 rtnl_unlock(); 9166 } 9167 9168 /** 9169 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 9170 * @pf: board private structure 9171 * @e: event info posted on ARQ 9172 * 9173 * Handler for LAN Queue Overflow Event generated by the firmware for PF 9174 * and VF queues 9175 **/ 9176 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 9177 struct i40e_arq_event_info *e) 9178 { 9179 struct i40e_aqc_lan_overflow *data = 9180 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 9181 u32 queue = le32_to_cpu(data->prtdcb_rupto); 9182 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 9183 struct i40e_hw *hw = &pf->hw; 9184 struct i40e_vf *vf; 9185 u16 vf_id; 9186 9187 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 9188 queue, qtx_ctl); 9189 9190 /* Queue belongs to VF, find the VF and issue VF reset */ 9191 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 9192 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 9193 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 9194 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 9195 vf_id -= hw->func_caps.vf_base_id; 9196 vf = &pf->vf[vf_id]; 9197 i40e_vc_notify_vf_reset(vf); 9198 /* Allow VF to process pending reset notification */ 9199 msleep(20); 9200 i40e_reset_vf(vf, false); 9201 } 9202 } 9203 9204 /** 9205 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 9206 * @pf: board private structure 9207 **/ 9208 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 9209 { 9210 u32 val, fcnt_prog; 9211 9212 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 9213 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 9214 return fcnt_prog; 9215 } 9216 9217 /** 9218 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 9219 * @pf: board private structure 9220 **/ 9221 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 9222 { 9223 u32 val, fcnt_prog; 9224 9225 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 9226 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 9227 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 9228 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 9229 return fcnt_prog; 9230 } 9231 9232 /** 9233 * i40e_get_global_fd_count - Get total FD filters programmed on device 9234 * @pf: board private structure 9235 **/ 9236 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 9237 { 9238 u32 val, fcnt_prog; 9239 9240 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 9241 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 9242 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 9243 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 9244 return fcnt_prog; 9245 } 9246 9247 /** 9248 * i40e_reenable_fdir_sb - Restore FDir SB capability 9249 * @pf: board private structure 9250 **/ 9251 static void i40e_reenable_fdir_sb(struct i40e_pf *pf) 9252 { 9253 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 9254 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 9255 (I40E_DEBUG_FD & pf->hw.debug_mask)) 9256 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 9257 } 9258 9259 /** 9260 * i40e_reenable_fdir_atr - Restore FDir ATR capability 9261 * @pf: board private structure 9262 **/ 9263 static void i40e_reenable_fdir_atr(struct i40e_pf *pf) 9264 { 9265 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) { 9266 /* ATR uses the same filtering logic as SB rules. It only 9267 * functions properly if the input set mask is at the default 9268 * settings. It is safe to restore the default input set 9269 * because there are no active TCPv4 filter rules. 9270 */ 9271 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 9272 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 9273 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 9274 9275 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 9276 (I40E_DEBUG_FD & pf->hw.debug_mask)) 9277 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n"); 9278 } 9279 } 9280 9281 /** 9282 * i40e_delete_invalid_filter - Delete an invalid FDIR filter 9283 * @pf: board private structure 9284 * @filter: FDir filter to remove 9285 */ 9286 static void i40e_delete_invalid_filter(struct i40e_pf *pf, 9287 struct i40e_fdir_filter *filter) 9288 { 9289 /* Update counters */ 9290 pf->fdir_pf_active_filters--; 9291 pf->fd_inv = 0; 9292 9293 switch (filter->flow_type) { 9294 case TCP_V4_FLOW: 9295 pf->fd_tcp4_filter_cnt--; 9296 break; 9297 case UDP_V4_FLOW: 9298 pf->fd_udp4_filter_cnt--; 9299 break; 9300 case SCTP_V4_FLOW: 9301 pf->fd_sctp4_filter_cnt--; 9302 break; 9303 case TCP_V6_FLOW: 9304 pf->fd_tcp6_filter_cnt--; 9305 break; 9306 case UDP_V6_FLOW: 9307 pf->fd_udp6_filter_cnt--; 9308 break; 9309 case SCTP_V6_FLOW: 9310 pf->fd_udp6_filter_cnt--; 9311 break; 9312 case IP_USER_FLOW: 9313 switch (filter->ipl4_proto) { 9314 case IPPROTO_TCP: 9315 pf->fd_tcp4_filter_cnt--; 9316 break; 9317 case IPPROTO_UDP: 9318 pf->fd_udp4_filter_cnt--; 9319 break; 9320 case IPPROTO_SCTP: 9321 pf->fd_sctp4_filter_cnt--; 9322 break; 9323 case IPPROTO_IP: 9324 pf->fd_ip4_filter_cnt--; 9325 break; 9326 } 9327 break; 9328 case IPV6_USER_FLOW: 9329 switch (filter->ipl4_proto) { 9330 case IPPROTO_TCP: 9331 pf->fd_tcp6_filter_cnt--; 9332 break; 9333 case IPPROTO_UDP: 9334 pf->fd_udp6_filter_cnt--; 9335 break; 9336 case IPPROTO_SCTP: 9337 pf->fd_sctp6_filter_cnt--; 9338 break; 9339 case IPPROTO_IP: 9340 pf->fd_ip6_filter_cnt--; 9341 break; 9342 } 9343 break; 9344 } 9345 9346 /* Remove the filter from the list and free memory */ 9347 hlist_del(&filter->fdir_node); 9348 kfree(filter); 9349 } 9350 9351 /** 9352 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 9353 * @pf: board private structure 9354 **/ 9355 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 9356 { 9357 struct i40e_fdir_filter *filter; 9358 u32 fcnt_prog, fcnt_avail; 9359 struct hlist_node *node; 9360 9361 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 9362 return; 9363 9364 /* Check if we have enough room to re-enable FDir SB capability. */ 9365 fcnt_prog = i40e_get_global_fd_count(pf); 9366 fcnt_avail = pf->fdir_pf_filter_count; 9367 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 9368 (pf->fd_add_err == 0) || 9369 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) 9370 i40e_reenable_fdir_sb(pf); 9371 9372 /* We should wait for even more space before re-enabling ATR. 9373 * Additionally, we cannot enable ATR as long as we still have TCP SB 9374 * rules active. 9375 */ 9376 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) && 9377 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0) 9378 i40e_reenable_fdir_atr(pf); 9379 9380 /* if hw had a problem adding a filter, delete it */ 9381 if (pf->fd_inv > 0) { 9382 hlist_for_each_entry_safe(filter, node, 9383 &pf->fdir_filter_list, fdir_node) 9384 if (filter->fd_id == pf->fd_inv) 9385 i40e_delete_invalid_filter(pf, filter); 9386 } 9387 } 9388 9389 #define I40E_MIN_FD_FLUSH_INTERVAL 10 9390 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 9391 /** 9392 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 9393 * @pf: board private structure 9394 **/ 9395 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 9396 { 9397 unsigned long min_flush_time; 9398 int flush_wait_retry = 50; 9399 bool disable_atr = false; 9400 int fd_room; 9401 int reg; 9402 9403 if (!time_after(jiffies, pf->fd_flush_timestamp + 9404 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) 9405 return; 9406 9407 /* If the flush is happening too quick and we have mostly SB rules we 9408 * should not re-enable ATR for some time. 9409 */ 9410 min_flush_time = pf->fd_flush_timestamp + 9411 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 9412 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 9413 9414 if (!(time_after(jiffies, min_flush_time)) && 9415 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 9416 if (I40E_DEBUG_FD & pf->hw.debug_mask) 9417 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 9418 disable_atr = true; 9419 } 9420 9421 pf->fd_flush_timestamp = jiffies; 9422 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 9423 /* flush all filters */ 9424 wr32(&pf->hw, I40E_PFQF_CTL_1, 9425 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 9426 i40e_flush(&pf->hw); 9427 pf->fd_flush_cnt++; 9428 pf->fd_add_err = 0; 9429 do { 9430 /* Check FD flush status every 5-6msec */ 9431 usleep_range(5000, 6000); 9432 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 9433 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 9434 break; 9435 } while (flush_wait_retry--); 9436 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 9437 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 9438 } else { 9439 /* replay sideband filters */ 9440 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 9441 if (!disable_atr && !pf->fd_tcp4_filter_cnt) 9442 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 9443 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 9444 if (I40E_DEBUG_FD & pf->hw.debug_mask) 9445 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 9446 } 9447 } 9448 9449 /** 9450 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed 9451 * @pf: board private structure 9452 **/ 9453 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 9454 { 9455 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 9456 } 9457 9458 /** 9459 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 9460 * @pf: board private structure 9461 **/ 9462 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 9463 { 9464 9465 /* if interface is down do nothing */ 9466 if (test_bit(__I40E_DOWN, pf->state)) 9467 return; 9468 9469 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 9470 i40e_fdir_flush_and_replay(pf); 9471 9472 i40e_fdir_check_and_reenable(pf); 9473 9474 } 9475 9476 /** 9477 * i40e_vsi_link_event - notify VSI of a link event 9478 * @vsi: vsi to be notified 9479 * @link_up: link up or down 9480 **/ 9481 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 9482 { 9483 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state)) 9484 return; 9485 9486 switch (vsi->type) { 9487 case I40E_VSI_MAIN: 9488 if (!vsi->netdev || !vsi->netdev_registered) 9489 break; 9490 9491 if (link_up) { 9492 netif_carrier_on(vsi->netdev); 9493 netif_tx_wake_all_queues(vsi->netdev); 9494 } else { 9495 netif_carrier_off(vsi->netdev); 9496 netif_tx_stop_all_queues(vsi->netdev); 9497 } 9498 break; 9499 9500 case I40E_VSI_SRIOV: 9501 case I40E_VSI_VMDQ2: 9502 case I40E_VSI_CTRL: 9503 case I40E_VSI_IWARP: 9504 case I40E_VSI_MIRROR: 9505 default: 9506 /* there is no notification for other VSIs */ 9507 break; 9508 } 9509 } 9510 9511 /** 9512 * i40e_veb_link_event - notify elements on the veb of a link event 9513 * @veb: veb to be notified 9514 * @link_up: link up or down 9515 **/ 9516 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 9517 { 9518 struct i40e_pf *pf; 9519 int i; 9520 9521 if (!veb || !veb->pf) 9522 return; 9523 pf = veb->pf; 9524 9525 /* depth first... */ 9526 for (i = 0; i < I40E_MAX_VEB; i++) 9527 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 9528 i40e_veb_link_event(pf->veb[i], link_up); 9529 9530 /* ... now the local VSIs */ 9531 for (i = 0; i < pf->num_alloc_vsi; i++) 9532 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 9533 i40e_vsi_link_event(pf->vsi[i], link_up); 9534 } 9535 9536 /** 9537 * i40e_link_event - Update netif_carrier status 9538 * @pf: board private structure 9539 **/ 9540 static void i40e_link_event(struct i40e_pf *pf) 9541 { 9542 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 9543 u8 new_link_speed, old_link_speed; 9544 i40e_status status; 9545 bool new_link, old_link; 9546 #ifdef CONFIG_I40E_DCB 9547 int err; 9548 #endif /* CONFIG_I40E_DCB */ 9549 9550 /* set this to force the get_link_status call to refresh state */ 9551 pf->hw.phy.get_link_info = true; 9552 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 9553 status = i40e_get_link_status(&pf->hw, &new_link); 9554 9555 /* On success, disable temp link polling */ 9556 if (status == I40E_SUCCESS) { 9557 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state); 9558 } else { 9559 /* Enable link polling temporarily until i40e_get_link_status 9560 * returns I40E_SUCCESS 9561 */ 9562 set_bit(__I40E_TEMP_LINK_POLLING, pf->state); 9563 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n", 9564 status); 9565 return; 9566 } 9567 9568 old_link_speed = pf->hw.phy.link_info_old.link_speed; 9569 new_link_speed = pf->hw.phy.link_info.link_speed; 9570 9571 if (new_link == old_link && 9572 new_link_speed == old_link_speed && 9573 (test_bit(__I40E_VSI_DOWN, vsi->state) || 9574 new_link == netif_carrier_ok(vsi->netdev))) 9575 return; 9576 9577 i40e_print_link_message(vsi, new_link); 9578 9579 /* Notify the base of the switch tree connected to 9580 * the link. Floating VEBs are not notified. 9581 */ 9582 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb]) 9583 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 9584 else 9585 i40e_vsi_link_event(vsi, new_link); 9586 9587 if (pf->vf) 9588 i40e_vc_notify_link_state(pf); 9589 9590 if (pf->flags & I40E_FLAG_PTP) 9591 i40e_ptp_set_increment(pf); 9592 #ifdef CONFIG_I40E_DCB 9593 if (new_link == old_link) 9594 return; 9595 /* Not SW DCB so firmware will take care of default settings */ 9596 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED) 9597 return; 9598 9599 /* We cover here only link down, as after link up in case of SW DCB 9600 * SW LLDP agent will take care of setting it up 9601 */ 9602 if (!new_link) { 9603 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n"); 9604 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg)); 9605 err = i40e_dcb_sw_default_config(pf); 9606 if (err) { 9607 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | 9608 I40E_FLAG_DCB_ENABLED); 9609 } else { 9610 pf->dcbx_cap = DCB_CAP_DCBX_HOST | 9611 DCB_CAP_DCBX_VER_IEEE; 9612 pf->flags |= I40E_FLAG_DCB_CAPABLE; 9613 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 9614 } 9615 } 9616 #endif /* CONFIG_I40E_DCB */ 9617 } 9618 9619 /** 9620 * i40e_watchdog_subtask - periodic checks not using event driven response 9621 * @pf: board private structure 9622 **/ 9623 static void i40e_watchdog_subtask(struct i40e_pf *pf) 9624 { 9625 int i; 9626 9627 /* if interface is down do nothing */ 9628 if (test_bit(__I40E_DOWN, pf->state) || 9629 test_bit(__I40E_CONFIG_BUSY, pf->state)) 9630 return; 9631 9632 /* make sure we don't do these things too often */ 9633 if (time_before(jiffies, (pf->service_timer_previous + 9634 pf->service_timer_period))) 9635 return; 9636 pf->service_timer_previous = jiffies; 9637 9638 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) || 9639 test_bit(__I40E_TEMP_LINK_POLLING, pf->state)) 9640 i40e_link_event(pf); 9641 9642 /* Update the stats for active netdevs so the network stack 9643 * can look at updated numbers whenever it cares to 9644 */ 9645 for (i = 0; i < pf->num_alloc_vsi; i++) 9646 if (pf->vsi[i] && pf->vsi[i]->netdev) 9647 i40e_update_stats(pf->vsi[i]); 9648 9649 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) { 9650 /* Update the stats for the active switching components */ 9651 for (i = 0; i < I40E_MAX_VEB; i++) 9652 if (pf->veb[i]) 9653 i40e_update_veb_stats(pf->veb[i]); 9654 } 9655 9656 i40e_ptp_rx_hang(pf); 9657 i40e_ptp_tx_hang(pf); 9658 } 9659 9660 /** 9661 * i40e_reset_subtask - Set up for resetting the device and driver 9662 * @pf: board private structure 9663 **/ 9664 static void i40e_reset_subtask(struct i40e_pf *pf) 9665 { 9666 u32 reset_flags = 0; 9667 9668 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) { 9669 reset_flags |= BIT(__I40E_REINIT_REQUESTED); 9670 clear_bit(__I40E_REINIT_REQUESTED, pf->state); 9671 } 9672 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) { 9673 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED); 9674 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state); 9675 } 9676 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) { 9677 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED); 9678 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 9679 } 9680 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) { 9681 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); 9682 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state); 9683 } 9684 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) { 9685 reset_flags |= BIT(__I40E_DOWN_REQUESTED); 9686 clear_bit(__I40E_DOWN_REQUESTED, pf->state); 9687 } 9688 9689 /* If there's a recovery already waiting, it takes 9690 * precedence before starting a new reset sequence. 9691 */ 9692 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) { 9693 i40e_prep_for_reset(pf); 9694 i40e_reset(pf); 9695 i40e_rebuild(pf, false, false); 9696 } 9697 9698 /* If we're already down or resetting, just bail */ 9699 if (reset_flags && 9700 !test_bit(__I40E_DOWN, pf->state) && 9701 !test_bit(__I40E_CONFIG_BUSY, pf->state)) { 9702 i40e_do_reset(pf, reset_flags, false); 9703 } 9704 } 9705 9706 /** 9707 * i40e_handle_link_event - Handle link event 9708 * @pf: board private structure 9709 * @e: event info posted on ARQ 9710 **/ 9711 static void i40e_handle_link_event(struct i40e_pf *pf, 9712 struct i40e_arq_event_info *e) 9713 { 9714 struct i40e_aqc_get_link_status *status = 9715 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 9716 9717 /* Do a new status request to re-enable LSE reporting 9718 * and load new status information into the hw struct 9719 * This completely ignores any state information 9720 * in the ARQ event info, instead choosing to always 9721 * issue the AQ update link status command. 9722 */ 9723 i40e_link_event(pf); 9724 9725 /* Check if module meets thermal requirements */ 9726 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) { 9727 dev_err(&pf->pdev->dev, 9728 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n"); 9729 dev_err(&pf->pdev->dev, 9730 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n"); 9731 } else { 9732 /* check for unqualified module, if link is down, suppress 9733 * the message if link was forced to be down. 9734 */ 9735 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 9736 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 9737 (!(status->link_info & I40E_AQ_LINK_UP)) && 9738 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) { 9739 dev_err(&pf->pdev->dev, 9740 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n"); 9741 dev_err(&pf->pdev->dev, 9742 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n"); 9743 } 9744 } 9745 } 9746 9747 /** 9748 * i40e_clean_adminq_subtask - Clean the AdminQ rings 9749 * @pf: board private structure 9750 **/ 9751 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 9752 { 9753 struct i40e_arq_event_info event; 9754 struct i40e_hw *hw = &pf->hw; 9755 u16 pending, i = 0; 9756 i40e_status ret; 9757 u16 opcode; 9758 u32 oldval; 9759 u32 val; 9760 9761 /* Do not run clean AQ when PF reset fails */ 9762 if (test_bit(__I40E_RESET_FAILED, pf->state)) 9763 return; 9764 9765 /* check for error indications */ 9766 val = rd32(&pf->hw, pf->hw.aq.arq.len); 9767 oldval = val; 9768 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 9769 if (hw->debug_mask & I40E_DEBUG_AQ) 9770 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 9771 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 9772 } 9773 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 9774 if (hw->debug_mask & I40E_DEBUG_AQ) 9775 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 9776 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 9777 pf->arq_overflows++; 9778 } 9779 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 9780 if (hw->debug_mask & I40E_DEBUG_AQ) 9781 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 9782 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 9783 } 9784 if (oldval != val) 9785 wr32(&pf->hw, pf->hw.aq.arq.len, val); 9786 9787 val = rd32(&pf->hw, pf->hw.aq.asq.len); 9788 oldval = val; 9789 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 9790 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 9791 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 9792 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 9793 } 9794 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 9795 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 9796 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 9797 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 9798 } 9799 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 9800 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 9801 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 9802 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 9803 } 9804 if (oldval != val) 9805 wr32(&pf->hw, pf->hw.aq.asq.len, val); 9806 9807 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 9808 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 9809 if (!event.msg_buf) 9810 return; 9811 9812 do { 9813 ret = i40e_clean_arq_element(hw, &event, &pending); 9814 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 9815 break; 9816 else if (ret) { 9817 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 9818 break; 9819 } 9820 9821 opcode = le16_to_cpu(event.desc.opcode); 9822 switch (opcode) { 9823 9824 case i40e_aqc_opc_get_link_status: 9825 rtnl_lock(); 9826 i40e_handle_link_event(pf, &event); 9827 rtnl_unlock(); 9828 break; 9829 case i40e_aqc_opc_send_msg_to_pf: 9830 ret = i40e_vc_process_vf_msg(pf, 9831 le16_to_cpu(event.desc.retval), 9832 le32_to_cpu(event.desc.cookie_high), 9833 le32_to_cpu(event.desc.cookie_low), 9834 event.msg_buf, 9835 event.msg_len); 9836 break; 9837 case i40e_aqc_opc_lldp_update_mib: 9838 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 9839 #ifdef CONFIG_I40E_DCB 9840 rtnl_lock(); 9841 i40e_handle_lldp_event(pf, &event); 9842 rtnl_unlock(); 9843 #endif /* CONFIG_I40E_DCB */ 9844 break; 9845 case i40e_aqc_opc_event_lan_overflow: 9846 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 9847 i40e_handle_lan_overflow_event(pf, &event); 9848 break; 9849 case i40e_aqc_opc_send_msg_to_peer: 9850 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 9851 break; 9852 case i40e_aqc_opc_nvm_erase: 9853 case i40e_aqc_opc_nvm_update: 9854 case i40e_aqc_opc_oem_post_update: 9855 i40e_debug(&pf->hw, I40E_DEBUG_NVM, 9856 "ARQ NVM operation 0x%04x completed\n", 9857 opcode); 9858 break; 9859 default: 9860 dev_info(&pf->pdev->dev, 9861 "ARQ: Unknown event 0x%04x ignored\n", 9862 opcode); 9863 break; 9864 } 9865 } while (i++ < pf->adminq_work_limit); 9866 9867 if (i < pf->adminq_work_limit) 9868 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state); 9869 9870 /* re-enable Admin queue interrupt cause */ 9871 val = rd32(hw, I40E_PFINT_ICR0_ENA); 9872 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 9873 wr32(hw, I40E_PFINT_ICR0_ENA, val); 9874 i40e_flush(hw); 9875 9876 kfree(event.msg_buf); 9877 } 9878 9879 /** 9880 * i40e_verify_eeprom - make sure eeprom is good to use 9881 * @pf: board private structure 9882 **/ 9883 static void i40e_verify_eeprom(struct i40e_pf *pf) 9884 { 9885 int err; 9886 9887 err = i40e_diag_eeprom_test(&pf->hw); 9888 if (err) { 9889 /* retry in case of garbage read */ 9890 err = i40e_diag_eeprom_test(&pf->hw); 9891 if (err) { 9892 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 9893 err); 9894 set_bit(__I40E_BAD_EEPROM, pf->state); 9895 } 9896 } 9897 9898 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) { 9899 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 9900 clear_bit(__I40E_BAD_EEPROM, pf->state); 9901 } 9902 } 9903 9904 /** 9905 * i40e_enable_pf_switch_lb 9906 * @pf: pointer to the PF structure 9907 * 9908 * enable switch loop back or die - no point in a return value 9909 **/ 9910 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 9911 { 9912 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 9913 struct i40e_vsi_context ctxt; 9914 int ret; 9915 9916 ctxt.seid = pf->main_vsi_seid; 9917 ctxt.pf_num = pf->hw.pf_id; 9918 ctxt.vf_num = 0; 9919 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 9920 if (ret) { 9921 dev_info(&pf->pdev->dev, 9922 "couldn't get PF vsi config, err %s aq_err %s\n", 9923 i40e_stat_str(&pf->hw, ret), 9924 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9925 return; 9926 } 9927 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9928 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9929 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9930 9931 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 9932 if (ret) { 9933 dev_info(&pf->pdev->dev, 9934 "update vsi switch failed, err %s aq_err %s\n", 9935 i40e_stat_str(&pf->hw, ret), 9936 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9937 } 9938 } 9939 9940 /** 9941 * i40e_disable_pf_switch_lb 9942 * @pf: pointer to the PF structure 9943 * 9944 * disable switch loop back or die - no point in a return value 9945 **/ 9946 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 9947 { 9948 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 9949 struct i40e_vsi_context ctxt; 9950 int ret; 9951 9952 ctxt.seid = pf->main_vsi_seid; 9953 ctxt.pf_num = pf->hw.pf_id; 9954 ctxt.vf_num = 0; 9955 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 9956 if (ret) { 9957 dev_info(&pf->pdev->dev, 9958 "couldn't get PF vsi config, err %s aq_err %s\n", 9959 i40e_stat_str(&pf->hw, ret), 9960 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9961 return; 9962 } 9963 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9964 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9965 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9966 9967 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 9968 if (ret) { 9969 dev_info(&pf->pdev->dev, 9970 "update vsi switch failed, err %s aq_err %s\n", 9971 i40e_stat_str(&pf->hw, ret), 9972 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9973 } 9974 } 9975 9976 /** 9977 * i40e_config_bridge_mode - Configure the HW bridge mode 9978 * @veb: pointer to the bridge instance 9979 * 9980 * Configure the loop back mode for the LAN VSI that is downlink to the 9981 * specified HW bridge instance. It is expected this function is called 9982 * when a new HW bridge is instantiated. 9983 **/ 9984 static void i40e_config_bridge_mode(struct i40e_veb *veb) 9985 { 9986 struct i40e_pf *pf = veb->pf; 9987 9988 if (pf->hw.debug_mask & I40E_DEBUG_LAN) 9989 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 9990 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 9991 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 9992 i40e_disable_pf_switch_lb(pf); 9993 else 9994 i40e_enable_pf_switch_lb(pf); 9995 } 9996 9997 /** 9998 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 9999 * @veb: pointer to the VEB instance 10000 * 10001 * This is a recursive function that first builds the attached VSIs then 10002 * recurses in to build the next layer of VEB. We track the connections 10003 * through our own index numbers because the seid's from the HW could 10004 * change across the reset. 10005 **/ 10006 static int i40e_reconstitute_veb(struct i40e_veb *veb) 10007 { 10008 struct i40e_vsi *ctl_vsi = NULL; 10009 struct i40e_pf *pf = veb->pf; 10010 int v, veb_idx; 10011 int ret; 10012 10013 /* build VSI that owns this VEB, temporarily attached to base VEB */ 10014 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 10015 if (pf->vsi[v] && 10016 pf->vsi[v]->veb_idx == veb->idx && 10017 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 10018 ctl_vsi = pf->vsi[v]; 10019 break; 10020 } 10021 } 10022 if (!ctl_vsi) { 10023 dev_info(&pf->pdev->dev, 10024 "missing owner VSI for veb_idx %d\n", veb->idx); 10025 ret = -ENOENT; 10026 goto end_reconstitute; 10027 } 10028 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 10029 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 10030 ret = i40e_add_vsi(ctl_vsi); 10031 if (ret) { 10032 dev_info(&pf->pdev->dev, 10033 "rebuild of veb_idx %d owner VSI failed: %d\n", 10034 veb->idx, ret); 10035 goto end_reconstitute; 10036 } 10037 i40e_vsi_reset_stats(ctl_vsi); 10038 10039 /* create the VEB in the switch and move the VSI onto the VEB */ 10040 ret = i40e_add_veb(veb, ctl_vsi); 10041 if (ret) 10042 goto end_reconstitute; 10043 10044 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 10045 veb->bridge_mode = BRIDGE_MODE_VEB; 10046 else 10047 veb->bridge_mode = BRIDGE_MODE_VEPA; 10048 i40e_config_bridge_mode(veb); 10049 10050 /* create the remaining VSIs attached to this VEB */ 10051 for (v = 0; v < pf->num_alloc_vsi; v++) { 10052 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 10053 continue; 10054 10055 if (pf->vsi[v]->veb_idx == veb->idx) { 10056 struct i40e_vsi *vsi = pf->vsi[v]; 10057 10058 vsi->uplink_seid = veb->seid; 10059 ret = i40e_add_vsi(vsi); 10060 if (ret) { 10061 dev_info(&pf->pdev->dev, 10062 "rebuild of vsi_idx %d failed: %d\n", 10063 v, ret); 10064 goto end_reconstitute; 10065 } 10066 i40e_vsi_reset_stats(vsi); 10067 } 10068 } 10069 10070 /* create any VEBs attached to this VEB - RECURSION */ 10071 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 10072 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 10073 pf->veb[veb_idx]->uplink_seid = veb->seid; 10074 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 10075 if (ret) 10076 break; 10077 } 10078 } 10079 10080 end_reconstitute: 10081 return ret; 10082 } 10083 10084 /** 10085 * i40e_get_capabilities - get info about the HW 10086 * @pf: the PF struct 10087 * @list_type: AQ capability to be queried 10088 **/ 10089 static int i40e_get_capabilities(struct i40e_pf *pf, 10090 enum i40e_admin_queue_opc list_type) 10091 { 10092 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 10093 u16 data_size; 10094 int buf_len; 10095 int err; 10096 10097 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 10098 do { 10099 cap_buf = kzalloc(buf_len, GFP_KERNEL); 10100 if (!cap_buf) 10101 return -ENOMEM; 10102 10103 /* this loads the data into the hw struct for us */ 10104 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 10105 &data_size, list_type, 10106 NULL); 10107 /* data loaded, buffer no longer needed */ 10108 kfree(cap_buf); 10109 10110 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 10111 /* retry with a larger buffer */ 10112 buf_len = data_size; 10113 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 10114 dev_info(&pf->pdev->dev, 10115 "capability discovery failed, err %s aq_err %s\n", 10116 i40e_stat_str(&pf->hw, err), 10117 i40e_aq_str(&pf->hw, 10118 pf->hw.aq.asq_last_status)); 10119 return -ENODEV; 10120 } 10121 } while (err); 10122 10123 if (pf->hw.debug_mask & I40E_DEBUG_USER) { 10124 if (list_type == i40e_aqc_opc_list_func_capabilities) { 10125 dev_info(&pf->pdev->dev, 10126 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 10127 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 10128 pf->hw.func_caps.num_msix_vectors, 10129 pf->hw.func_caps.num_msix_vectors_vf, 10130 pf->hw.func_caps.fd_filters_guaranteed, 10131 pf->hw.func_caps.fd_filters_best_effort, 10132 pf->hw.func_caps.num_tx_qp, 10133 pf->hw.func_caps.num_vsis); 10134 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) { 10135 dev_info(&pf->pdev->dev, 10136 "switch_mode=0x%04x, function_valid=0x%08x\n", 10137 pf->hw.dev_caps.switch_mode, 10138 pf->hw.dev_caps.valid_functions); 10139 dev_info(&pf->pdev->dev, 10140 "SR-IOV=%d, num_vfs for all function=%u\n", 10141 pf->hw.dev_caps.sr_iov_1_1, 10142 pf->hw.dev_caps.num_vfs); 10143 dev_info(&pf->pdev->dev, 10144 "num_vsis=%u, num_rx:%u, num_tx=%u\n", 10145 pf->hw.dev_caps.num_vsis, 10146 pf->hw.dev_caps.num_rx_qp, 10147 pf->hw.dev_caps.num_tx_qp); 10148 } 10149 } 10150 if (list_type == i40e_aqc_opc_list_func_capabilities) { 10151 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 10152 + pf->hw.func_caps.num_vfs) 10153 if (pf->hw.revision_id == 0 && 10154 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) { 10155 dev_info(&pf->pdev->dev, 10156 "got num_vsis %d, setting num_vsis to %d\n", 10157 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 10158 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 10159 } 10160 } 10161 return 0; 10162 } 10163 10164 static int i40e_vsi_clear(struct i40e_vsi *vsi); 10165 10166 /** 10167 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 10168 * @pf: board private structure 10169 **/ 10170 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 10171 { 10172 struct i40e_vsi *vsi; 10173 10174 /* quick workaround for an NVM issue that leaves a critical register 10175 * uninitialized 10176 */ 10177 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 10178 static const u32 hkey[] = { 10179 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 10180 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 10181 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 10182 0x95b3a76d}; 10183 int i; 10184 10185 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 10186 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 10187 } 10188 10189 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 10190 return; 10191 10192 /* find existing VSI and see if it needs configuring */ 10193 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 10194 10195 /* create a new VSI if none exists */ 10196 if (!vsi) { 10197 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 10198 pf->vsi[pf->lan_vsi]->seid, 0); 10199 if (!vsi) { 10200 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 10201 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 10202 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 10203 return; 10204 } 10205 } 10206 10207 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 10208 } 10209 10210 /** 10211 * i40e_fdir_teardown - release the Flow Director resources 10212 * @pf: board private structure 10213 **/ 10214 static void i40e_fdir_teardown(struct i40e_pf *pf) 10215 { 10216 struct i40e_vsi *vsi; 10217 10218 i40e_fdir_filter_exit(pf); 10219 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 10220 if (vsi) 10221 i40e_vsi_release(vsi); 10222 } 10223 10224 /** 10225 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs 10226 * @vsi: PF main vsi 10227 * @seid: seid of main or channel VSIs 10228 * 10229 * Rebuilds cloud filters associated with main VSI and channel VSIs if they 10230 * existed before reset 10231 **/ 10232 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid) 10233 { 10234 struct i40e_cloud_filter *cfilter; 10235 struct i40e_pf *pf = vsi->back; 10236 struct hlist_node *node; 10237 i40e_status ret; 10238 10239 /* Add cloud filters back if they exist */ 10240 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list, 10241 cloud_node) { 10242 if (cfilter->seid != seid) 10243 continue; 10244 10245 if (cfilter->dst_port) 10246 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, 10247 true); 10248 else 10249 ret = i40e_add_del_cloud_filter(vsi, cfilter, true); 10250 10251 if (ret) { 10252 dev_dbg(&pf->pdev->dev, 10253 "Failed to rebuild cloud filter, err %s aq_err %s\n", 10254 i40e_stat_str(&pf->hw, ret), 10255 i40e_aq_str(&pf->hw, 10256 pf->hw.aq.asq_last_status)); 10257 return ret; 10258 } 10259 } 10260 return 0; 10261 } 10262 10263 /** 10264 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset 10265 * @vsi: PF main vsi 10266 * 10267 * Rebuilds channel VSIs if they existed before reset 10268 **/ 10269 static int i40e_rebuild_channels(struct i40e_vsi *vsi) 10270 { 10271 struct i40e_channel *ch, *ch_tmp; 10272 i40e_status ret; 10273 10274 if (list_empty(&vsi->ch_list)) 10275 return 0; 10276 10277 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 10278 if (!ch->initialized) 10279 break; 10280 /* Proceed with creation of channel (VMDq2) VSI */ 10281 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch); 10282 if (ret) { 10283 dev_info(&vsi->back->pdev->dev, 10284 "failed to rebuild channels using uplink_seid %u\n", 10285 vsi->uplink_seid); 10286 return ret; 10287 } 10288 /* Reconfigure TX queues using QTX_CTL register */ 10289 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch); 10290 if (ret) { 10291 dev_info(&vsi->back->pdev->dev, 10292 "failed to configure TX rings for channel %u\n", 10293 ch->seid); 10294 return ret; 10295 } 10296 /* update 'next_base_queue' */ 10297 vsi->next_base_queue = vsi->next_base_queue + 10298 ch->num_queue_pairs; 10299 if (ch->max_tx_rate) { 10300 u64 credits = ch->max_tx_rate; 10301 10302 if (i40e_set_bw_limit(vsi, ch->seid, 10303 ch->max_tx_rate)) 10304 return -EINVAL; 10305 10306 do_div(credits, I40E_BW_CREDIT_DIVISOR); 10307 dev_dbg(&vsi->back->pdev->dev, 10308 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 10309 ch->max_tx_rate, 10310 credits, 10311 ch->seid); 10312 } 10313 ret = i40e_rebuild_cloud_filters(vsi, ch->seid); 10314 if (ret) { 10315 dev_dbg(&vsi->back->pdev->dev, 10316 "Failed to rebuild cloud filters for channel VSI %u\n", 10317 ch->seid); 10318 return ret; 10319 } 10320 } 10321 return 0; 10322 } 10323 10324 /** 10325 * i40e_prep_for_reset - prep for the core to reset 10326 * @pf: board private structure 10327 * 10328 * Close up the VFs and other things in prep for PF Reset. 10329 **/ 10330 static void i40e_prep_for_reset(struct i40e_pf *pf) 10331 { 10332 struct i40e_hw *hw = &pf->hw; 10333 i40e_status ret = 0; 10334 u32 v; 10335 10336 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state); 10337 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 10338 return; 10339 if (i40e_check_asq_alive(&pf->hw)) 10340 i40e_vc_notify_reset(pf); 10341 10342 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 10343 10344 /* quiesce the VSIs and their queues that are not already DOWN */ 10345 i40e_pf_quiesce_all_vsi(pf); 10346 10347 for (v = 0; v < pf->num_alloc_vsi; v++) { 10348 if (pf->vsi[v]) 10349 pf->vsi[v]->seid = 0; 10350 } 10351 10352 i40e_shutdown_adminq(&pf->hw); 10353 10354 /* call shutdown HMC */ 10355 if (hw->hmc.hmc_obj) { 10356 ret = i40e_shutdown_lan_hmc(hw); 10357 if (ret) 10358 dev_warn(&pf->pdev->dev, 10359 "shutdown_lan_hmc failed: %d\n", ret); 10360 } 10361 10362 /* Save the current PTP time so that we can restore the time after the 10363 * reset completes. 10364 */ 10365 i40e_ptp_save_hw_time(pf); 10366 } 10367 10368 /** 10369 * i40e_send_version - update firmware with driver version 10370 * @pf: PF struct 10371 */ 10372 static void i40e_send_version(struct i40e_pf *pf) 10373 { 10374 struct i40e_driver_version dv; 10375 10376 dv.major_version = 0xff; 10377 dv.minor_version = 0xff; 10378 dv.build_version = 0xff; 10379 dv.subbuild_version = 0; 10380 strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string)); 10381 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 10382 } 10383 10384 /** 10385 * i40e_get_oem_version - get OEM specific version information 10386 * @hw: pointer to the hardware structure 10387 **/ 10388 static void i40e_get_oem_version(struct i40e_hw *hw) 10389 { 10390 u16 block_offset = 0xffff; 10391 u16 block_length = 0; 10392 u16 capabilities = 0; 10393 u16 gen_snap = 0; 10394 u16 release = 0; 10395 10396 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B 10397 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00 10398 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01 10399 #define I40E_NVM_OEM_GEN_OFFSET 0x02 10400 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03 10401 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F 10402 #define I40E_NVM_OEM_LENGTH 3 10403 10404 /* Check if pointer to OEM version block is valid. */ 10405 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset); 10406 if (block_offset == 0xffff) 10407 return; 10408 10409 /* Check if OEM version block has correct length. */ 10410 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET, 10411 &block_length); 10412 if (block_length < I40E_NVM_OEM_LENGTH) 10413 return; 10414 10415 /* Check if OEM version format is as expected. */ 10416 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET, 10417 &capabilities); 10418 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0) 10419 return; 10420 10421 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET, 10422 &gen_snap); 10423 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET, 10424 &release); 10425 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release; 10426 hw->nvm.eetrack = I40E_OEM_EETRACK_ID; 10427 } 10428 10429 /** 10430 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen 10431 * @pf: board private structure 10432 **/ 10433 static int i40e_reset(struct i40e_pf *pf) 10434 { 10435 struct i40e_hw *hw = &pf->hw; 10436 i40e_status ret; 10437 10438 ret = i40e_pf_reset(hw); 10439 if (ret) { 10440 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 10441 set_bit(__I40E_RESET_FAILED, pf->state); 10442 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state); 10443 } else { 10444 pf->pfr_count++; 10445 } 10446 return ret; 10447 } 10448 10449 /** 10450 * i40e_rebuild - rebuild using a saved config 10451 * @pf: board private structure 10452 * @reinit: if the Main VSI needs to re-initialized. 10453 * @lock_acquired: indicates whether or not the lock has been acquired 10454 * before this function was called. 10455 **/ 10456 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) 10457 { 10458 int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state); 10459 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 10460 struct i40e_hw *hw = &pf->hw; 10461 i40e_status ret; 10462 u32 val; 10463 int v; 10464 10465 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) && 10466 i40e_check_recovery_mode(pf)) { 10467 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev); 10468 } 10469 10470 if (test_bit(__I40E_DOWN, pf->state) && 10471 !test_bit(__I40E_RECOVERY_MODE, pf->state) && 10472 !old_recovery_mode_bit) 10473 goto clear_recovery; 10474 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 10475 10476 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 10477 ret = i40e_init_adminq(&pf->hw); 10478 if (ret) { 10479 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", 10480 i40e_stat_str(&pf->hw, ret), 10481 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10482 goto clear_recovery; 10483 } 10484 i40e_get_oem_version(&pf->hw); 10485 10486 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) && 10487 ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) || 10488 hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) { 10489 /* The following delay is necessary for 4.33 firmware and older 10490 * to recover after EMP reset. 200 ms should suffice but we 10491 * put here 300 ms to be sure that FW is ready to operate 10492 * after reset. 10493 */ 10494 mdelay(300); 10495 } 10496 10497 /* re-verify the eeprom if we just had an EMP reset */ 10498 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) 10499 i40e_verify_eeprom(pf); 10500 10501 /* if we are going out of or into recovery mode we have to act 10502 * accordingly with regard to resources initialization 10503 * and deinitialization 10504 */ 10505 if (test_bit(__I40E_RECOVERY_MODE, pf->state) || 10506 old_recovery_mode_bit) { 10507 if (i40e_get_capabilities(pf, 10508 i40e_aqc_opc_list_func_capabilities)) 10509 goto end_unlock; 10510 10511 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) { 10512 /* we're staying in recovery mode so we'll reinitialize 10513 * misc vector here 10514 */ 10515 if (i40e_setup_misc_vector_for_recovery_mode(pf)) 10516 goto end_unlock; 10517 } else { 10518 if (!lock_acquired) 10519 rtnl_lock(); 10520 /* we're going out of recovery mode so we'll free 10521 * the IRQ allocated specifically for recovery mode 10522 * and restore the interrupt scheme 10523 */ 10524 free_irq(pf->pdev->irq, pf); 10525 i40e_clear_interrupt_scheme(pf); 10526 if (i40e_restore_interrupt_scheme(pf)) 10527 goto end_unlock; 10528 } 10529 10530 /* tell the firmware that we're starting */ 10531 i40e_send_version(pf); 10532 10533 /* bail out in case recovery mode was detected, as there is 10534 * no need for further configuration. 10535 */ 10536 goto end_unlock; 10537 } 10538 10539 i40e_clear_pxe_mode(hw); 10540 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities); 10541 if (ret) 10542 goto end_core_reset; 10543 10544 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 10545 hw->func_caps.num_rx_qp, 0, 0); 10546 if (ret) { 10547 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 10548 goto end_core_reset; 10549 } 10550 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 10551 if (ret) { 10552 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 10553 goto end_core_reset; 10554 } 10555 10556 #ifdef CONFIG_I40E_DCB 10557 /* Enable FW to write a default DCB config on link-up 10558 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB 10559 * is not supported with new link speed 10560 */ 10561 if (pf->flags & I40E_FLAG_TC_MQPRIO) { 10562 i40e_aq_set_dcb_parameters(hw, false, NULL); 10563 } else { 10564 if (I40E_IS_X710TL_DEVICE(hw->device_id) && 10565 (hw->phy.link_info.link_speed & 10566 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) { 10567 i40e_aq_set_dcb_parameters(hw, false, NULL); 10568 dev_warn(&pf->pdev->dev, 10569 "DCB is not supported for X710-T*L 2.5/5G speeds\n"); 10570 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 10571 } else { 10572 i40e_aq_set_dcb_parameters(hw, true, NULL); 10573 ret = i40e_init_pf_dcb(pf); 10574 if (ret) { 10575 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", 10576 ret); 10577 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 10578 /* Continue without DCB enabled */ 10579 } 10580 } 10581 } 10582 10583 #endif /* CONFIG_I40E_DCB */ 10584 if (!lock_acquired) 10585 rtnl_lock(); 10586 ret = i40e_setup_pf_switch(pf, reinit, true); 10587 if (ret) 10588 goto end_unlock; 10589 10590 /* The driver only wants link up/down and module qualification 10591 * reports from firmware. Note the negative logic. 10592 */ 10593 ret = i40e_aq_set_phy_int_mask(&pf->hw, 10594 ~(I40E_AQ_EVENT_LINK_UPDOWN | 10595 I40E_AQ_EVENT_MEDIA_NA | 10596 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 10597 if (ret) 10598 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 10599 i40e_stat_str(&pf->hw, ret), 10600 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10601 10602 /* Rebuild the VSIs and VEBs that existed before reset. 10603 * They are still in our local switch element arrays, so only 10604 * need to rebuild the switch model in the HW. 10605 * 10606 * If there were VEBs but the reconstitution failed, we'll try 10607 * to recover minimal use by getting the basic PF VSI working. 10608 */ 10609 if (vsi->uplink_seid != pf->mac_seid) { 10610 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 10611 /* find the one VEB connected to the MAC, and find orphans */ 10612 for (v = 0; v < I40E_MAX_VEB; v++) { 10613 if (!pf->veb[v]) 10614 continue; 10615 10616 if (pf->veb[v]->uplink_seid == pf->mac_seid || 10617 pf->veb[v]->uplink_seid == 0) { 10618 ret = i40e_reconstitute_veb(pf->veb[v]); 10619 10620 if (!ret) 10621 continue; 10622 10623 /* If Main VEB failed, we're in deep doodoo, 10624 * so give up rebuilding the switch and set up 10625 * for minimal rebuild of PF VSI. 10626 * If orphan failed, we'll report the error 10627 * but try to keep going. 10628 */ 10629 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 10630 dev_info(&pf->pdev->dev, 10631 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 10632 ret); 10633 vsi->uplink_seid = pf->mac_seid; 10634 break; 10635 } else if (pf->veb[v]->uplink_seid == 0) { 10636 dev_info(&pf->pdev->dev, 10637 "rebuild of orphan VEB failed: %d\n", 10638 ret); 10639 } 10640 } 10641 } 10642 } 10643 10644 if (vsi->uplink_seid == pf->mac_seid) { 10645 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 10646 /* no VEB, so rebuild only the Main VSI */ 10647 ret = i40e_add_vsi(vsi); 10648 if (ret) { 10649 dev_info(&pf->pdev->dev, 10650 "rebuild of Main VSI failed: %d\n", ret); 10651 goto end_unlock; 10652 } 10653 } 10654 10655 if (vsi->mqprio_qopt.max_rate[0]) { 10656 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0]; 10657 u64 credits = 0; 10658 10659 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR); 10660 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate); 10661 if (ret) 10662 goto end_unlock; 10663 10664 credits = max_tx_rate; 10665 do_div(credits, I40E_BW_CREDIT_DIVISOR); 10666 dev_dbg(&vsi->back->pdev->dev, 10667 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 10668 max_tx_rate, 10669 credits, 10670 vsi->seid); 10671 } 10672 10673 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid); 10674 if (ret) 10675 goto end_unlock; 10676 10677 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs 10678 * for this main VSI if they exist 10679 */ 10680 ret = i40e_rebuild_channels(vsi); 10681 if (ret) 10682 goto end_unlock; 10683 10684 /* Reconfigure hardware for allowing smaller MSS in the case 10685 * of TSO, so that we avoid the MDD being fired and causing 10686 * a reset in the case of small MSS+TSO. 10687 */ 10688 #define I40E_REG_MSS 0x000E64DC 10689 #define I40E_REG_MSS_MIN_MASK 0x3FF0000 10690 #define I40E_64BYTE_MSS 0x400000 10691 val = rd32(hw, I40E_REG_MSS); 10692 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 10693 val &= ~I40E_REG_MSS_MIN_MASK; 10694 val |= I40E_64BYTE_MSS; 10695 wr32(hw, I40E_REG_MSS, val); 10696 } 10697 10698 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) { 10699 msleep(75); 10700 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 10701 if (ret) 10702 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 10703 i40e_stat_str(&pf->hw, ret), 10704 i40e_aq_str(&pf->hw, 10705 pf->hw.aq.asq_last_status)); 10706 } 10707 /* reinit the misc interrupt */ 10708 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 10709 ret = i40e_setup_misc_vector(pf); 10710 10711 /* Add a filter to drop all Flow control frames from any VSI from being 10712 * transmitted. By doing so we stop a malicious VF from sending out 10713 * PAUSE or PFC frames and potentially controlling traffic for other 10714 * PF/VF VSIs. 10715 * The FW can still send Flow control frames if enabled. 10716 */ 10717 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 10718 pf->main_vsi_seid); 10719 10720 /* restart the VSIs that were rebuilt and running before the reset */ 10721 i40e_pf_unquiesce_all_vsi(pf); 10722 10723 /* Release the RTNL lock before we start resetting VFs */ 10724 if (!lock_acquired) 10725 rtnl_unlock(); 10726 10727 /* Restore promiscuous settings */ 10728 ret = i40e_set_promiscuous(pf, pf->cur_promisc); 10729 if (ret) 10730 dev_warn(&pf->pdev->dev, 10731 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n", 10732 pf->cur_promisc ? "on" : "off", 10733 i40e_stat_str(&pf->hw, ret), 10734 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10735 10736 i40e_reset_all_vfs(pf, true); 10737 10738 /* tell the firmware that we're starting */ 10739 i40e_send_version(pf); 10740 10741 /* We've already released the lock, so don't do it again */ 10742 goto end_core_reset; 10743 10744 end_unlock: 10745 if (!lock_acquired) 10746 rtnl_unlock(); 10747 end_core_reset: 10748 clear_bit(__I40E_RESET_FAILED, pf->state); 10749 clear_recovery: 10750 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state); 10751 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state); 10752 } 10753 10754 /** 10755 * i40e_reset_and_rebuild - reset and rebuild using a saved config 10756 * @pf: board private structure 10757 * @reinit: if the Main VSI needs to re-initialized. 10758 * @lock_acquired: indicates whether or not the lock has been acquired 10759 * before this function was called. 10760 **/ 10761 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit, 10762 bool lock_acquired) 10763 { 10764 int ret; 10765 /* Now we wait for GRST to settle out. 10766 * We don't have to delete the VEBs or VSIs from the hw switch 10767 * because the reset will make them disappear. 10768 */ 10769 ret = i40e_reset(pf); 10770 if (!ret) 10771 i40e_rebuild(pf, reinit, lock_acquired); 10772 } 10773 10774 /** 10775 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 10776 * @pf: board private structure 10777 * 10778 * Close up the VFs and other things in prep for a Core Reset, 10779 * then get ready to rebuild the world. 10780 * @lock_acquired: indicates whether or not the lock has been acquired 10781 * before this function was called. 10782 **/ 10783 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired) 10784 { 10785 i40e_prep_for_reset(pf); 10786 i40e_reset_and_rebuild(pf, false, lock_acquired); 10787 } 10788 10789 /** 10790 * i40e_handle_mdd_event 10791 * @pf: pointer to the PF structure 10792 * 10793 * Called from the MDD irq handler to identify possibly malicious vfs 10794 **/ 10795 static void i40e_handle_mdd_event(struct i40e_pf *pf) 10796 { 10797 struct i40e_hw *hw = &pf->hw; 10798 bool mdd_detected = false; 10799 struct i40e_vf *vf; 10800 u32 reg; 10801 int i; 10802 10803 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state)) 10804 return; 10805 10806 /* find what triggered the MDD event */ 10807 reg = rd32(hw, I40E_GL_MDET_TX); 10808 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 10809 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 10810 I40E_GL_MDET_TX_PF_NUM_SHIFT; 10811 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 10812 I40E_GL_MDET_TX_VF_NUM_SHIFT; 10813 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 10814 I40E_GL_MDET_TX_EVENT_SHIFT; 10815 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 10816 I40E_GL_MDET_TX_QUEUE_SHIFT) - 10817 pf->hw.func_caps.base_queue; 10818 if (netif_msg_tx_err(pf)) 10819 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 10820 event, queue, pf_num, vf_num); 10821 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 10822 mdd_detected = true; 10823 } 10824 reg = rd32(hw, I40E_GL_MDET_RX); 10825 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 10826 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 10827 I40E_GL_MDET_RX_FUNCTION_SHIFT; 10828 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 10829 I40E_GL_MDET_RX_EVENT_SHIFT; 10830 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 10831 I40E_GL_MDET_RX_QUEUE_SHIFT) - 10832 pf->hw.func_caps.base_queue; 10833 if (netif_msg_rx_err(pf)) 10834 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 10835 event, queue, func); 10836 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 10837 mdd_detected = true; 10838 } 10839 10840 if (mdd_detected) { 10841 reg = rd32(hw, I40E_PF_MDET_TX); 10842 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 10843 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 10844 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n"); 10845 } 10846 reg = rd32(hw, I40E_PF_MDET_RX); 10847 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 10848 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 10849 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n"); 10850 } 10851 } 10852 10853 /* see if one of the VFs needs its hand slapped */ 10854 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 10855 vf = &(pf->vf[i]); 10856 reg = rd32(hw, I40E_VP_MDET_TX(i)); 10857 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 10858 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 10859 vf->num_mdd_events++; 10860 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 10861 i); 10862 dev_info(&pf->pdev->dev, 10863 "Use PF Control I/F to re-enable the VF\n"); 10864 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states); 10865 } 10866 10867 reg = rd32(hw, I40E_VP_MDET_RX(i)); 10868 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 10869 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 10870 vf->num_mdd_events++; 10871 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 10872 i); 10873 dev_info(&pf->pdev->dev, 10874 "Use PF Control I/F to re-enable the VF\n"); 10875 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states); 10876 } 10877 } 10878 10879 /* re-enable mdd interrupt cause */ 10880 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state); 10881 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 10882 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 10883 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 10884 i40e_flush(hw); 10885 } 10886 10887 /** 10888 * i40e_service_task - Run the driver's async subtasks 10889 * @work: pointer to work_struct containing our data 10890 **/ 10891 static void i40e_service_task(struct work_struct *work) 10892 { 10893 struct i40e_pf *pf = container_of(work, 10894 struct i40e_pf, 10895 service_task); 10896 unsigned long start_time = jiffies; 10897 10898 /* don't bother with service tasks if a reset is in progress */ 10899 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 10900 test_bit(__I40E_SUSPENDED, pf->state)) 10901 return; 10902 10903 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state)) 10904 return; 10905 10906 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) { 10907 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]); 10908 i40e_sync_filters_subtask(pf); 10909 i40e_reset_subtask(pf); 10910 i40e_handle_mdd_event(pf); 10911 i40e_vc_process_vflr_event(pf); 10912 i40e_watchdog_subtask(pf); 10913 i40e_fdir_reinit_subtask(pf); 10914 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) { 10915 /* Client subtask will reopen next time through. */ 10916 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], 10917 true); 10918 } else { 10919 i40e_client_subtask(pf); 10920 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE, 10921 pf->state)) 10922 i40e_notify_client_of_l2_param_changes( 10923 pf->vsi[pf->lan_vsi]); 10924 } 10925 i40e_sync_filters_subtask(pf); 10926 } else { 10927 i40e_reset_subtask(pf); 10928 } 10929 10930 i40e_clean_adminq_subtask(pf); 10931 10932 /* flush memory to make sure state is correct before next watchdog */ 10933 smp_mb__before_atomic(); 10934 clear_bit(__I40E_SERVICE_SCHED, pf->state); 10935 10936 /* If the tasks have taken longer than one timer cycle or there 10937 * is more work to be done, reschedule the service task now 10938 * rather than wait for the timer to tick again. 10939 */ 10940 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 10941 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) || 10942 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) || 10943 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state)) 10944 i40e_service_event_schedule(pf); 10945 } 10946 10947 /** 10948 * i40e_service_timer - timer callback 10949 * @t: timer list pointer 10950 **/ 10951 static void i40e_service_timer(struct timer_list *t) 10952 { 10953 struct i40e_pf *pf = from_timer(pf, t, service_timer); 10954 10955 mod_timer(&pf->service_timer, 10956 round_jiffies(jiffies + pf->service_timer_period)); 10957 i40e_service_event_schedule(pf); 10958 } 10959 10960 /** 10961 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 10962 * @vsi: the VSI being configured 10963 **/ 10964 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 10965 { 10966 struct i40e_pf *pf = vsi->back; 10967 10968 switch (vsi->type) { 10969 case I40E_VSI_MAIN: 10970 vsi->alloc_queue_pairs = pf->num_lan_qps; 10971 if (!vsi->num_tx_desc) 10972 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 10973 I40E_REQ_DESCRIPTOR_MULTIPLE); 10974 if (!vsi->num_rx_desc) 10975 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 10976 I40E_REQ_DESCRIPTOR_MULTIPLE); 10977 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 10978 vsi->num_q_vectors = pf->num_lan_msix; 10979 else 10980 vsi->num_q_vectors = 1; 10981 10982 break; 10983 10984 case I40E_VSI_FDIR: 10985 vsi->alloc_queue_pairs = 1; 10986 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT, 10987 I40E_REQ_DESCRIPTOR_MULTIPLE); 10988 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT, 10989 I40E_REQ_DESCRIPTOR_MULTIPLE); 10990 vsi->num_q_vectors = pf->num_fdsb_msix; 10991 break; 10992 10993 case I40E_VSI_VMDQ2: 10994 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 10995 if (!vsi->num_tx_desc) 10996 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 10997 I40E_REQ_DESCRIPTOR_MULTIPLE); 10998 if (!vsi->num_rx_desc) 10999 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 11000 I40E_REQ_DESCRIPTOR_MULTIPLE); 11001 vsi->num_q_vectors = pf->num_vmdq_msix; 11002 break; 11003 11004 case I40E_VSI_SRIOV: 11005 vsi->alloc_queue_pairs = pf->num_vf_qps; 11006 if (!vsi->num_tx_desc) 11007 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 11008 I40E_REQ_DESCRIPTOR_MULTIPLE); 11009 if (!vsi->num_rx_desc) 11010 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 11011 I40E_REQ_DESCRIPTOR_MULTIPLE); 11012 break; 11013 11014 default: 11015 WARN_ON(1); 11016 return -ENODATA; 11017 } 11018 11019 if (is_kdump_kernel()) { 11020 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS; 11021 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS; 11022 } 11023 11024 return 0; 11025 } 11026 11027 /** 11028 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 11029 * @vsi: VSI pointer 11030 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 11031 * 11032 * On error: returns error code (negative) 11033 * On success: returns 0 11034 **/ 11035 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 11036 { 11037 struct i40e_ring **next_rings; 11038 int size; 11039 int ret = 0; 11040 11041 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */ 11042 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 11043 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2); 11044 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 11045 if (!vsi->tx_rings) 11046 return -ENOMEM; 11047 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs; 11048 if (i40e_enabled_xdp_vsi(vsi)) { 11049 vsi->xdp_rings = next_rings; 11050 next_rings += vsi->alloc_queue_pairs; 11051 } 11052 vsi->rx_rings = next_rings; 11053 11054 if (alloc_qvectors) { 11055 /* allocate memory for q_vector pointers */ 11056 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 11057 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 11058 if (!vsi->q_vectors) { 11059 ret = -ENOMEM; 11060 goto err_vectors; 11061 } 11062 } 11063 return ret; 11064 11065 err_vectors: 11066 kfree(vsi->tx_rings); 11067 return ret; 11068 } 11069 11070 /** 11071 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 11072 * @pf: board private structure 11073 * @type: type of VSI 11074 * 11075 * On error: returns error code (negative) 11076 * On success: returns vsi index in PF (positive) 11077 **/ 11078 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 11079 { 11080 int ret = -ENODEV; 11081 struct i40e_vsi *vsi; 11082 int vsi_idx; 11083 int i; 11084 11085 /* Need to protect the allocation of the VSIs at the PF level */ 11086 mutex_lock(&pf->switch_mutex); 11087 11088 /* VSI list may be fragmented if VSI creation/destruction has 11089 * been happening. We can afford to do a quick scan to look 11090 * for any free VSIs in the list. 11091 * 11092 * find next empty vsi slot, looping back around if necessary 11093 */ 11094 i = pf->next_vsi; 11095 while (i < pf->num_alloc_vsi && pf->vsi[i]) 11096 i++; 11097 if (i >= pf->num_alloc_vsi) { 11098 i = 0; 11099 while (i < pf->next_vsi && pf->vsi[i]) 11100 i++; 11101 } 11102 11103 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 11104 vsi_idx = i; /* Found one! */ 11105 } else { 11106 ret = -ENODEV; 11107 goto unlock_pf; /* out of VSI slots! */ 11108 } 11109 pf->next_vsi = ++i; 11110 11111 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 11112 if (!vsi) { 11113 ret = -ENOMEM; 11114 goto unlock_pf; 11115 } 11116 vsi->type = type; 11117 vsi->back = pf; 11118 set_bit(__I40E_VSI_DOWN, vsi->state); 11119 vsi->flags = 0; 11120 vsi->idx = vsi_idx; 11121 vsi->int_rate_limit = 0; 11122 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 11123 pf->rss_table_size : 64; 11124 vsi->netdev_registered = false; 11125 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 11126 hash_init(vsi->mac_filter_hash); 11127 vsi->irqs_ready = false; 11128 11129 if (type == I40E_VSI_MAIN) { 11130 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL); 11131 if (!vsi->af_xdp_zc_qps) 11132 goto err_rings; 11133 } 11134 11135 ret = i40e_set_num_rings_in_vsi(vsi); 11136 if (ret) 11137 goto err_rings; 11138 11139 ret = i40e_vsi_alloc_arrays(vsi, true); 11140 if (ret) 11141 goto err_rings; 11142 11143 /* Setup default MSIX irq handler for VSI */ 11144 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 11145 11146 /* Initialize VSI lock */ 11147 spin_lock_init(&vsi->mac_filter_hash_lock); 11148 pf->vsi[vsi_idx] = vsi; 11149 ret = vsi_idx; 11150 goto unlock_pf; 11151 11152 err_rings: 11153 bitmap_free(vsi->af_xdp_zc_qps); 11154 pf->next_vsi = i - 1; 11155 kfree(vsi); 11156 unlock_pf: 11157 mutex_unlock(&pf->switch_mutex); 11158 return ret; 11159 } 11160 11161 /** 11162 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 11163 * @vsi: VSI pointer 11164 * @free_qvectors: a bool to specify if q_vectors need to be freed. 11165 * 11166 * On error: returns error code (negative) 11167 * On success: returns 0 11168 **/ 11169 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 11170 { 11171 /* free the ring and vector containers */ 11172 if (free_qvectors) { 11173 kfree(vsi->q_vectors); 11174 vsi->q_vectors = NULL; 11175 } 11176 kfree(vsi->tx_rings); 11177 vsi->tx_rings = NULL; 11178 vsi->rx_rings = NULL; 11179 vsi->xdp_rings = NULL; 11180 } 11181 11182 /** 11183 * i40e_clear_rss_config_user - clear the user configured RSS hash keys 11184 * and lookup table 11185 * @vsi: Pointer to VSI structure 11186 */ 11187 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi) 11188 { 11189 if (!vsi) 11190 return; 11191 11192 kfree(vsi->rss_hkey_user); 11193 vsi->rss_hkey_user = NULL; 11194 11195 kfree(vsi->rss_lut_user); 11196 vsi->rss_lut_user = NULL; 11197 } 11198 11199 /** 11200 * i40e_vsi_clear - Deallocate the VSI provided 11201 * @vsi: the VSI being un-configured 11202 **/ 11203 static int i40e_vsi_clear(struct i40e_vsi *vsi) 11204 { 11205 struct i40e_pf *pf; 11206 11207 if (!vsi) 11208 return 0; 11209 11210 if (!vsi->back) 11211 goto free_vsi; 11212 pf = vsi->back; 11213 11214 mutex_lock(&pf->switch_mutex); 11215 if (!pf->vsi[vsi->idx]) { 11216 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n", 11217 vsi->idx, vsi->idx, vsi->type); 11218 goto unlock_vsi; 11219 } 11220 11221 if (pf->vsi[vsi->idx] != vsi) { 11222 dev_err(&pf->pdev->dev, 11223 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n", 11224 pf->vsi[vsi->idx]->idx, 11225 pf->vsi[vsi->idx]->type, 11226 vsi->idx, vsi->type); 11227 goto unlock_vsi; 11228 } 11229 11230 /* updates the PF for this cleared vsi */ 11231 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 11232 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 11233 11234 bitmap_free(vsi->af_xdp_zc_qps); 11235 i40e_vsi_free_arrays(vsi, true); 11236 i40e_clear_rss_config_user(vsi); 11237 11238 pf->vsi[vsi->idx] = NULL; 11239 if (vsi->idx < pf->next_vsi) 11240 pf->next_vsi = vsi->idx; 11241 11242 unlock_vsi: 11243 mutex_unlock(&pf->switch_mutex); 11244 free_vsi: 11245 kfree(vsi); 11246 11247 return 0; 11248 } 11249 11250 /** 11251 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 11252 * @vsi: the VSI being cleaned 11253 **/ 11254 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 11255 { 11256 int i; 11257 11258 if (vsi->tx_rings && vsi->tx_rings[0]) { 11259 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 11260 kfree_rcu(vsi->tx_rings[i], rcu); 11261 WRITE_ONCE(vsi->tx_rings[i], NULL); 11262 WRITE_ONCE(vsi->rx_rings[i], NULL); 11263 if (vsi->xdp_rings) 11264 WRITE_ONCE(vsi->xdp_rings[i], NULL); 11265 } 11266 } 11267 } 11268 11269 /** 11270 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 11271 * @vsi: the VSI being configured 11272 **/ 11273 static int i40e_alloc_rings(struct i40e_vsi *vsi) 11274 { 11275 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2; 11276 struct i40e_pf *pf = vsi->back; 11277 struct i40e_ring *ring; 11278 11279 /* Set basic values in the rings to be used later during open() */ 11280 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 11281 /* allocate space for both Tx and Rx in one shot */ 11282 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL); 11283 if (!ring) 11284 goto err_out; 11285 11286 ring->queue_index = i; 11287 ring->reg_idx = vsi->base_queue + i; 11288 ring->ring_active = false; 11289 ring->vsi = vsi; 11290 ring->netdev = vsi->netdev; 11291 ring->dev = &pf->pdev->dev; 11292 ring->count = vsi->num_tx_desc; 11293 ring->size = 0; 11294 ring->dcb_tc = 0; 11295 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) 11296 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 11297 ring->itr_setting = pf->tx_itr_default; 11298 WRITE_ONCE(vsi->tx_rings[i], ring++); 11299 11300 if (!i40e_enabled_xdp_vsi(vsi)) 11301 goto setup_rx; 11302 11303 ring->queue_index = vsi->alloc_queue_pairs + i; 11304 ring->reg_idx = vsi->base_queue + ring->queue_index; 11305 ring->ring_active = false; 11306 ring->vsi = vsi; 11307 ring->netdev = NULL; 11308 ring->dev = &pf->pdev->dev; 11309 ring->count = vsi->num_tx_desc; 11310 ring->size = 0; 11311 ring->dcb_tc = 0; 11312 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) 11313 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 11314 set_ring_xdp(ring); 11315 ring->itr_setting = pf->tx_itr_default; 11316 WRITE_ONCE(vsi->xdp_rings[i], ring++); 11317 11318 setup_rx: 11319 ring->queue_index = i; 11320 ring->reg_idx = vsi->base_queue + i; 11321 ring->ring_active = false; 11322 ring->vsi = vsi; 11323 ring->netdev = vsi->netdev; 11324 ring->dev = &pf->pdev->dev; 11325 ring->count = vsi->num_rx_desc; 11326 ring->size = 0; 11327 ring->dcb_tc = 0; 11328 ring->itr_setting = pf->rx_itr_default; 11329 WRITE_ONCE(vsi->rx_rings[i], ring); 11330 } 11331 11332 return 0; 11333 11334 err_out: 11335 i40e_vsi_clear_rings(vsi); 11336 return -ENOMEM; 11337 } 11338 11339 /** 11340 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 11341 * @pf: board private structure 11342 * @vectors: the number of MSI-X vectors to request 11343 * 11344 * Returns the number of vectors reserved, or error 11345 **/ 11346 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 11347 { 11348 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 11349 I40E_MIN_MSIX, vectors); 11350 if (vectors < 0) { 11351 dev_info(&pf->pdev->dev, 11352 "MSI-X vector reservation failed: %d\n", vectors); 11353 vectors = 0; 11354 } 11355 11356 return vectors; 11357 } 11358 11359 /** 11360 * i40e_init_msix - Setup the MSIX capability 11361 * @pf: board private structure 11362 * 11363 * Work with the OS to set up the MSIX vectors needed. 11364 * 11365 * Returns the number of vectors reserved or negative on failure 11366 **/ 11367 static int i40e_init_msix(struct i40e_pf *pf) 11368 { 11369 struct i40e_hw *hw = &pf->hw; 11370 int cpus, extra_vectors; 11371 int vectors_left; 11372 int v_budget, i; 11373 int v_actual; 11374 int iwarp_requested = 0; 11375 11376 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 11377 return -ENODEV; 11378 11379 /* The number of vectors we'll request will be comprised of: 11380 * - Add 1 for "other" cause for Admin Queue events, etc. 11381 * - The number of LAN queue pairs 11382 * - Queues being used for RSS. 11383 * We don't need as many as max_rss_size vectors. 11384 * use rss_size instead in the calculation since that 11385 * is governed by number of cpus in the system. 11386 * - assumes symmetric Tx/Rx pairing 11387 * - The number of VMDq pairs 11388 * - The CPU count within the NUMA node if iWARP is enabled 11389 * Once we count this up, try the request. 11390 * 11391 * If we can't get what we want, we'll simplify to nearly nothing 11392 * and try again. If that still fails, we punt. 11393 */ 11394 vectors_left = hw->func_caps.num_msix_vectors; 11395 v_budget = 0; 11396 11397 /* reserve one vector for miscellaneous handler */ 11398 if (vectors_left) { 11399 v_budget++; 11400 vectors_left--; 11401 } 11402 11403 /* reserve some vectors for the main PF traffic queues. Initially we 11404 * only reserve at most 50% of the available vectors, in the case that 11405 * the number of online CPUs is large. This ensures that we can enable 11406 * extra features as well. Once we've enabled the other features, we 11407 * will use any remaining vectors to reach as close as we can to the 11408 * number of online CPUs. 11409 */ 11410 cpus = num_online_cpus(); 11411 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2); 11412 vectors_left -= pf->num_lan_msix; 11413 11414 /* reserve one vector for sideband flow director */ 11415 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 11416 if (vectors_left) { 11417 pf->num_fdsb_msix = 1; 11418 v_budget++; 11419 vectors_left--; 11420 } else { 11421 pf->num_fdsb_msix = 0; 11422 } 11423 } 11424 11425 /* can we reserve enough for iWARP? */ 11426 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 11427 iwarp_requested = pf->num_iwarp_msix; 11428 11429 if (!vectors_left) 11430 pf->num_iwarp_msix = 0; 11431 else if (vectors_left < pf->num_iwarp_msix) 11432 pf->num_iwarp_msix = 1; 11433 v_budget += pf->num_iwarp_msix; 11434 vectors_left -= pf->num_iwarp_msix; 11435 } 11436 11437 /* any vectors left over go for VMDq support */ 11438 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 11439 if (!vectors_left) { 11440 pf->num_vmdq_msix = 0; 11441 pf->num_vmdq_qps = 0; 11442 } else { 11443 int vmdq_vecs_wanted = 11444 pf->num_vmdq_vsis * pf->num_vmdq_qps; 11445 int vmdq_vecs = 11446 min_t(int, vectors_left, vmdq_vecs_wanted); 11447 11448 /* if we're short on vectors for what's desired, we limit 11449 * the queues per vmdq. If this is still more than are 11450 * available, the user will need to change the number of 11451 * queues/vectors used by the PF later with the ethtool 11452 * channels command 11453 */ 11454 if (vectors_left < vmdq_vecs_wanted) { 11455 pf->num_vmdq_qps = 1; 11456 vmdq_vecs_wanted = pf->num_vmdq_vsis; 11457 vmdq_vecs = min_t(int, 11458 vectors_left, 11459 vmdq_vecs_wanted); 11460 } 11461 pf->num_vmdq_msix = pf->num_vmdq_qps; 11462 11463 v_budget += vmdq_vecs; 11464 vectors_left -= vmdq_vecs; 11465 } 11466 } 11467 11468 /* On systems with a large number of SMP cores, we previously limited 11469 * the number of vectors for num_lan_msix to be at most 50% of the 11470 * available vectors, to allow for other features. Now, we add back 11471 * the remaining vectors. However, we ensure that the total 11472 * num_lan_msix will not exceed num_online_cpus(). To do this, we 11473 * calculate the number of vectors we can add without going over the 11474 * cap of CPUs. For systems with a small number of CPUs this will be 11475 * zero. 11476 */ 11477 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left); 11478 pf->num_lan_msix += extra_vectors; 11479 vectors_left -= extra_vectors; 11480 11481 WARN(vectors_left < 0, 11482 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n"); 11483 11484 v_budget += pf->num_lan_msix; 11485 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 11486 GFP_KERNEL); 11487 if (!pf->msix_entries) 11488 return -ENOMEM; 11489 11490 for (i = 0; i < v_budget; i++) 11491 pf->msix_entries[i].entry = i; 11492 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 11493 11494 if (v_actual < I40E_MIN_MSIX) { 11495 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 11496 kfree(pf->msix_entries); 11497 pf->msix_entries = NULL; 11498 pci_disable_msix(pf->pdev); 11499 return -ENODEV; 11500 11501 } else if (v_actual == I40E_MIN_MSIX) { 11502 /* Adjust for minimal MSIX use */ 11503 pf->num_vmdq_vsis = 0; 11504 pf->num_vmdq_qps = 0; 11505 pf->num_lan_qps = 1; 11506 pf->num_lan_msix = 1; 11507 11508 } else if (v_actual != v_budget) { 11509 /* If we have limited resources, we will start with no vectors 11510 * for the special features and then allocate vectors to some 11511 * of these features based on the policy and at the end disable 11512 * the features that did not get any vectors. 11513 */ 11514 int vec; 11515 11516 dev_info(&pf->pdev->dev, 11517 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n", 11518 v_actual, v_budget); 11519 /* reserve the misc vector */ 11520 vec = v_actual - 1; 11521 11522 /* Scale vector usage down */ 11523 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 11524 pf->num_vmdq_vsis = 1; 11525 pf->num_vmdq_qps = 1; 11526 11527 /* partition out the remaining vectors */ 11528 switch (vec) { 11529 case 2: 11530 pf->num_lan_msix = 1; 11531 break; 11532 case 3: 11533 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 11534 pf->num_lan_msix = 1; 11535 pf->num_iwarp_msix = 1; 11536 } else { 11537 pf->num_lan_msix = 2; 11538 } 11539 break; 11540 default: 11541 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 11542 pf->num_iwarp_msix = min_t(int, (vec / 3), 11543 iwarp_requested); 11544 pf->num_vmdq_vsis = min_t(int, (vec / 3), 11545 I40E_DEFAULT_NUM_VMDQ_VSI); 11546 } else { 11547 pf->num_vmdq_vsis = min_t(int, (vec / 2), 11548 I40E_DEFAULT_NUM_VMDQ_VSI); 11549 } 11550 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 11551 pf->num_fdsb_msix = 1; 11552 vec--; 11553 } 11554 pf->num_lan_msix = min_t(int, 11555 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)), 11556 pf->num_lan_msix); 11557 pf->num_lan_qps = pf->num_lan_msix; 11558 break; 11559 } 11560 } 11561 11562 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 11563 (pf->num_fdsb_msix == 0)) { 11564 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n"); 11565 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 11566 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 11567 } 11568 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 11569 (pf->num_vmdq_msix == 0)) { 11570 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 11571 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 11572 } 11573 11574 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 11575 (pf->num_iwarp_msix == 0)) { 11576 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n"); 11577 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 11578 } 11579 i40e_debug(&pf->hw, I40E_DEBUG_INIT, 11580 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n", 11581 pf->num_lan_msix, 11582 pf->num_vmdq_msix * pf->num_vmdq_vsis, 11583 pf->num_fdsb_msix, 11584 pf->num_iwarp_msix); 11585 11586 return v_actual; 11587 } 11588 11589 /** 11590 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 11591 * @vsi: the VSI being configured 11592 * @v_idx: index of the vector in the vsi struct 11593 * 11594 * We allocate one q_vector. If allocation fails we return -ENOMEM. 11595 **/ 11596 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) 11597 { 11598 struct i40e_q_vector *q_vector; 11599 11600 /* allocate q_vector */ 11601 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 11602 if (!q_vector) 11603 return -ENOMEM; 11604 11605 q_vector->vsi = vsi; 11606 q_vector->v_idx = v_idx; 11607 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask); 11608 11609 if (vsi->netdev) 11610 netif_napi_add(vsi->netdev, &q_vector->napi, 11611 i40e_napi_poll, NAPI_POLL_WEIGHT); 11612 11613 /* tie q_vector and vsi together */ 11614 vsi->q_vectors[v_idx] = q_vector; 11615 11616 return 0; 11617 } 11618 11619 /** 11620 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 11621 * @vsi: the VSI being configured 11622 * 11623 * We allocate one q_vector per queue interrupt. If allocation fails we 11624 * return -ENOMEM. 11625 **/ 11626 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 11627 { 11628 struct i40e_pf *pf = vsi->back; 11629 int err, v_idx, num_q_vectors; 11630 11631 /* if not MSIX, give the one vector only to the LAN VSI */ 11632 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 11633 num_q_vectors = vsi->num_q_vectors; 11634 else if (vsi == pf->vsi[pf->lan_vsi]) 11635 num_q_vectors = 1; 11636 else 11637 return -EINVAL; 11638 11639 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 11640 err = i40e_vsi_alloc_q_vector(vsi, v_idx); 11641 if (err) 11642 goto err_out; 11643 } 11644 11645 return 0; 11646 11647 err_out: 11648 while (v_idx--) 11649 i40e_free_q_vector(vsi, v_idx); 11650 11651 return err; 11652 } 11653 11654 /** 11655 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 11656 * @pf: board private structure to initialize 11657 **/ 11658 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 11659 { 11660 int vectors = 0; 11661 ssize_t size; 11662 11663 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 11664 vectors = i40e_init_msix(pf); 11665 if (vectors < 0) { 11666 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 11667 I40E_FLAG_IWARP_ENABLED | 11668 I40E_FLAG_RSS_ENABLED | 11669 I40E_FLAG_DCB_CAPABLE | 11670 I40E_FLAG_DCB_ENABLED | 11671 I40E_FLAG_SRIOV_ENABLED | 11672 I40E_FLAG_FD_SB_ENABLED | 11673 I40E_FLAG_FD_ATR_ENABLED | 11674 I40E_FLAG_VMDQ_ENABLED); 11675 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 11676 11677 /* rework the queue expectations without MSIX */ 11678 i40e_determine_queue_usage(pf); 11679 } 11680 } 11681 11682 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 11683 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 11684 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 11685 vectors = pci_enable_msi(pf->pdev); 11686 if (vectors < 0) { 11687 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 11688 vectors); 11689 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 11690 } 11691 vectors = 1; /* one MSI or Legacy vector */ 11692 } 11693 11694 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 11695 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 11696 11697 /* set up vector assignment tracking */ 11698 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 11699 pf->irq_pile = kzalloc(size, GFP_KERNEL); 11700 if (!pf->irq_pile) 11701 return -ENOMEM; 11702 11703 pf->irq_pile->num_entries = vectors; 11704 pf->irq_pile->search_hint = 0; 11705 11706 /* track first vector for misc interrupts, ignore return */ 11707 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 11708 11709 return 0; 11710 } 11711 11712 /** 11713 * i40e_restore_interrupt_scheme - Restore the interrupt scheme 11714 * @pf: private board data structure 11715 * 11716 * Restore the interrupt scheme that was cleared when we suspended the 11717 * device. This should be called during resume to re-allocate the q_vectors 11718 * and reacquire IRQs. 11719 */ 11720 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf) 11721 { 11722 int err, i; 11723 11724 /* We cleared the MSI and MSI-X flags when disabling the old interrupt 11725 * scheme. We need to re-enabled them here in order to attempt to 11726 * re-acquire the MSI or MSI-X vectors 11727 */ 11728 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 11729 11730 err = i40e_init_interrupt_scheme(pf); 11731 if (err) 11732 return err; 11733 11734 /* Now that we've re-acquired IRQs, we need to remap the vectors and 11735 * rings together again. 11736 */ 11737 for (i = 0; i < pf->num_alloc_vsi; i++) { 11738 if (pf->vsi[i]) { 11739 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]); 11740 if (err) 11741 goto err_unwind; 11742 i40e_vsi_map_rings_to_vectors(pf->vsi[i]); 11743 } 11744 } 11745 11746 err = i40e_setup_misc_vector(pf); 11747 if (err) 11748 goto err_unwind; 11749 11750 if (pf->flags & I40E_FLAG_IWARP_ENABLED) 11751 i40e_client_update_msix_info(pf); 11752 11753 return 0; 11754 11755 err_unwind: 11756 while (i--) { 11757 if (pf->vsi[i]) 11758 i40e_vsi_free_q_vectors(pf->vsi[i]); 11759 } 11760 11761 return err; 11762 } 11763 11764 /** 11765 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle 11766 * non queue events in recovery mode 11767 * @pf: board private structure 11768 * 11769 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage 11770 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode. 11771 * This is handled differently than in recovery mode since no Tx/Rx resources 11772 * are being allocated. 11773 **/ 11774 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf) 11775 { 11776 int err; 11777 11778 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 11779 err = i40e_setup_misc_vector(pf); 11780 11781 if (err) { 11782 dev_info(&pf->pdev->dev, 11783 "MSI-X misc vector request failed, error %d\n", 11784 err); 11785 return err; 11786 } 11787 } else { 11788 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED; 11789 11790 err = request_irq(pf->pdev->irq, i40e_intr, flags, 11791 pf->int_name, pf); 11792 11793 if (err) { 11794 dev_info(&pf->pdev->dev, 11795 "MSI/legacy misc vector request failed, error %d\n", 11796 err); 11797 return err; 11798 } 11799 i40e_enable_misc_int_causes(pf); 11800 i40e_irq_dynamic_enable_icr0(pf); 11801 } 11802 11803 return 0; 11804 } 11805 11806 /** 11807 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 11808 * @pf: board private structure 11809 * 11810 * This sets up the handler for MSIX 0, which is used to manage the 11811 * non-queue interrupts, e.g. AdminQ and errors. This is not used 11812 * when in MSI or Legacy interrupt mode. 11813 **/ 11814 static int i40e_setup_misc_vector(struct i40e_pf *pf) 11815 { 11816 struct i40e_hw *hw = &pf->hw; 11817 int err = 0; 11818 11819 /* Only request the IRQ once, the first time through. */ 11820 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) { 11821 err = request_irq(pf->msix_entries[0].vector, 11822 i40e_intr, 0, pf->int_name, pf); 11823 if (err) { 11824 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state); 11825 dev_info(&pf->pdev->dev, 11826 "request_irq for %s failed: %d\n", 11827 pf->int_name, err); 11828 return -EFAULT; 11829 } 11830 } 11831 11832 i40e_enable_misc_int_causes(pf); 11833 11834 /* associate no queues to the misc vector */ 11835 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 11836 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1); 11837 11838 i40e_flush(hw); 11839 11840 i40e_irq_dynamic_enable_icr0(pf); 11841 11842 return err; 11843 } 11844 11845 /** 11846 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands 11847 * @vsi: Pointer to vsi structure 11848 * @seed: Buffter to store the hash keys 11849 * @lut: Buffer to store the lookup table entries 11850 * @lut_size: Size of buffer to store the lookup table entries 11851 * 11852 * Return 0 on success, negative on failure 11853 */ 11854 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 11855 u8 *lut, u16 lut_size) 11856 { 11857 struct i40e_pf *pf = vsi->back; 11858 struct i40e_hw *hw = &pf->hw; 11859 int ret = 0; 11860 11861 if (seed) { 11862 ret = i40e_aq_get_rss_key(hw, vsi->id, 11863 (struct i40e_aqc_get_set_rss_key_data *)seed); 11864 if (ret) { 11865 dev_info(&pf->pdev->dev, 11866 "Cannot get RSS key, err %s aq_err %s\n", 11867 i40e_stat_str(&pf->hw, ret), 11868 i40e_aq_str(&pf->hw, 11869 pf->hw.aq.asq_last_status)); 11870 return ret; 11871 } 11872 } 11873 11874 if (lut) { 11875 bool pf_lut = vsi->type == I40E_VSI_MAIN; 11876 11877 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 11878 if (ret) { 11879 dev_info(&pf->pdev->dev, 11880 "Cannot get RSS lut, err %s aq_err %s\n", 11881 i40e_stat_str(&pf->hw, ret), 11882 i40e_aq_str(&pf->hw, 11883 pf->hw.aq.asq_last_status)); 11884 return ret; 11885 } 11886 } 11887 11888 return ret; 11889 } 11890 11891 /** 11892 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers 11893 * @vsi: Pointer to vsi structure 11894 * @seed: RSS hash seed 11895 * @lut: Lookup table 11896 * @lut_size: Lookup table size 11897 * 11898 * Returns 0 on success, negative on failure 11899 **/ 11900 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed, 11901 const u8 *lut, u16 lut_size) 11902 { 11903 struct i40e_pf *pf = vsi->back; 11904 struct i40e_hw *hw = &pf->hw; 11905 u16 vf_id = vsi->vf_id; 11906 u8 i; 11907 11908 /* Fill out hash function seed */ 11909 if (seed) { 11910 u32 *seed_dw = (u32 *)seed; 11911 11912 if (vsi->type == I40E_VSI_MAIN) { 11913 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 11914 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]); 11915 } else if (vsi->type == I40E_VSI_SRIOV) { 11916 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++) 11917 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]); 11918 } else { 11919 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n"); 11920 } 11921 } 11922 11923 if (lut) { 11924 u32 *lut_dw = (u32 *)lut; 11925 11926 if (vsi->type == I40E_VSI_MAIN) { 11927 if (lut_size != I40E_HLUT_ARRAY_SIZE) 11928 return -EINVAL; 11929 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 11930 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]); 11931 } else if (vsi->type == I40E_VSI_SRIOV) { 11932 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE) 11933 return -EINVAL; 11934 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 11935 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]); 11936 } else { 11937 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 11938 } 11939 } 11940 i40e_flush(hw); 11941 11942 return 0; 11943 } 11944 11945 /** 11946 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers 11947 * @vsi: Pointer to VSI structure 11948 * @seed: Buffer to store the keys 11949 * @lut: Buffer to store the lookup table entries 11950 * @lut_size: Size of buffer to store the lookup table entries 11951 * 11952 * Returns 0 on success, negative on failure 11953 */ 11954 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed, 11955 u8 *lut, u16 lut_size) 11956 { 11957 struct i40e_pf *pf = vsi->back; 11958 struct i40e_hw *hw = &pf->hw; 11959 u16 i; 11960 11961 if (seed) { 11962 u32 *seed_dw = (u32 *)seed; 11963 11964 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 11965 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i)); 11966 } 11967 if (lut) { 11968 u32 *lut_dw = (u32 *)lut; 11969 11970 if (lut_size != I40E_HLUT_ARRAY_SIZE) 11971 return -EINVAL; 11972 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 11973 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i)); 11974 } 11975 11976 return 0; 11977 } 11978 11979 /** 11980 * i40e_config_rss - Configure RSS keys and lut 11981 * @vsi: Pointer to VSI structure 11982 * @seed: RSS hash seed 11983 * @lut: Lookup table 11984 * @lut_size: Lookup table size 11985 * 11986 * Returns 0 on success, negative on failure 11987 */ 11988 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 11989 { 11990 struct i40e_pf *pf = vsi->back; 11991 11992 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) 11993 return i40e_config_rss_aq(vsi, seed, lut, lut_size); 11994 else 11995 return i40e_config_rss_reg(vsi, seed, lut, lut_size); 11996 } 11997 11998 /** 11999 * i40e_get_rss - Get RSS keys and lut 12000 * @vsi: Pointer to VSI structure 12001 * @seed: Buffer to store the keys 12002 * @lut: Buffer to store the lookup table entries 12003 * @lut_size: Size of buffer to store the lookup table entries 12004 * 12005 * Returns 0 on success, negative on failure 12006 */ 12007 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 12008 { 12009 struct i40e_pf *pf = vsi->back; 12010 12011 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) 12012 return i40e_get_rss_aq(vsi, seed, lut, lut_size); 12013 else 12014 return i40e_get_rss_reg(vsi, seed, lut, lut_size); 12015 } 12016 12017 /** 12018 * i40e_fill_rss_lut - Fill the RSS lookup table with default values 12019 * @pf: Pointer to board private structure 12020 * @lut: Lookup table 12021 * @rss_table_size: Lookup table size 12022 * @rss_size: Range of queue number for hashing 12023 */ 12024 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 12025 u16 rss_table_size, u16 rss_size) 12026 { 12027 u16 i; 12028 12029 for (i = 0; i < rss_table_size; i++) 12030 lut[i] = i % rss_size; 12031 } 12032 12033 /** 12034 * i40e_pf_config_rss - Prepare for RSS if used 12035 * @pf: board private structure 12036 **/ 12037 static int i40e_pf_config_rss(struct i40e_pf *pf) 12038 { 12039 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 12040 u8 seed[I40E_HKEY_ARRAY_SIZE]; 12041 u8 *lut; 12042 struct i40e_hw *hw = &pf->hw; 12043 u32 reg_val; 12044 u64 hena; 12045 int ret; 12046 12047 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 12048 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 12049 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 12050 hena |= i40e_pf_get_default_rss_hena(pf); 12051 12052 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 12053 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 12054 12055 /* Determine the RSS table size based on the hardware capabilities */ 12056 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0); 12057 reg_val = (pf->rss_table_size == 512) ? 12058 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) : 12059 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512); 12060 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val); 12061 12062 /* Determine the RSS size of the VSI */ 12063 if (!vsi->rss_size) { 12064 u16 qcount; 12065 /* If the firmware does something weird during VSI init, we 12066 * could end up with zero TCs. Check for that to avoid 12067 * divide-by-zero. It probably won't pass traffic, but it also 12068 * won't panic. 12069 */ 12070 qcount = vsi->num_queue_pairs / 12071 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1); 12072 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); 12073 } 12074 if (!vsi->rss_size) 12075 return -EINVAL; 12076 12077 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 12078 if (!lut) 12079 return -ENOMEM; 12080 12081 /* Use user configured lut if there is one, otherwise use default */ 12082 if (vsi->rss_lut_user) 12083 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 12084 else 12085 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 12086 12087 /* Use user configured hash key if there is one, otherwise 12088 * use default. 12089 */ 12090 if (vsi->rss_hkey_user) 12091 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 12092 else 12093 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 12094 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 12095 kfree(lut); 12096 12097 return ret; 12098 } 12099 12100 /** 12101 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 12102 * @pf: board private structure 12103 * @queue_count: the requested queue count for rss. 12104 * 12105 * returns 0 if rss is not enabled, if enabled returns the final rss queue 12106 * count which may be different from the requested queue count. 12107 * Note: expects to be called while under rtnl_lock() 12108 **/ 12109 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 12110 { 12111 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 12112 int new_rss_size; 12113 12114 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 12115 return 0; 12116 12117 queue_count = min_t(int, queue_count, num_online_cpus()); 12118 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 12119 12120 if (queue_count != vsi->num_queue_pairs) { 12121 u16 qcount; 12122 12123 vsi->req_queue_pairs = queue_count; 12124 i40e_prep_for_reset(pf); 12125 12126 pf->alloc_rss_size = new_rss_size; 12127 12128 i40e_reset_and_rebuild(pf, true, true); 12129 12130 /* Discard the user configured hash keys and lut, if less 12131 * queues are enabled. 12132 */ 12133 if (queue_count < vsi->rss_size) { 12134 i40e_clear_rss_config_user(vsi); 12135 dev_dbg(&pf->pdev->dev, 12136 "discard user configured hash keys and lut\n"); 12137 } 12138 12139 /* Reset vsi->rss_size, as number of enabled queues changed */ 12140 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc; 12141 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); 12142 12143 i40e_pf_config_rss(pf); 12144 } 12145 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n", 12146 vsi->req_queue_pairs, pf->rss_size_max); 12147 return pf->alloc_rss_size; 12148 } 12149 12150 /** 12151 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition 12152 * @pf: board private structure 12153 **/ 12154 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf) 12155 { 12156 i40e_status status; 12157 bool min_valid, max_valid; 12158 u32 max_bw, min_bw; 12159 12160 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 12161 &min_valid, &max_valid); 12162 12163 if (!status) { 12164 if (min_valid) 12165 pf->min_bw = min_bw; 12166 if (max_valid) 12167 pf->max_bw = max_bw; 12168 } 12169 12170 return status; 12171 } 12172 12173 /** 12174 * i40e_set_partition_bw_setting - Set BW settings for this PF partition 12175 * @pf: board private structure 12176 **/ 12177 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf) 12178 { 12179 struct i40e_aqc_configure_partition_bw_data bw_data; 12180 i40e_status status; 12181 12182 memset(&bw_data, 0, sizeof(bw_data)); 12183 12184 /* Set the valid bit for this PF */ 12185 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); 12186 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK; 12187 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK; 12188 12189 /* Set the new bandwidths */ 12190 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 12191 12192 return status; 12193 } 12194 12195 /** 12196 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition 12197 * @pf: board private structure 12198 **/ 12199 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf) 12200 { 12201 /* Commit temporary BW setting to permanent NVM image */ 12202 enum i40e_admin_queue_err last_aq_status; 12203 i40e_status ret; 12204 u16 nvm_word; 12205 12206 if (pf->hw.partition_id != 1) { 12207 dev_info(&pf->pdev->dev, 12208 "Commit BW only works on partition 1! This is partition %d", 12209 pf->hw.partition_id); 12210 ret = I40E_NOT_SUPPORTED; 12211 goto bw_commit_out; 12212 } 12213 12214 /* Acquire NVM for read access */ 12215 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 12216 last_aq_status = pf->hw.aq.asq_last_status; 12217 if (ret) { 12218 dev_info(&pf->pdev->dev, 12219 "Cannot acquire NVM for read access, err %s aq_err %s\n", 12220 i40e_stat_str(&pf->hw, ret), 12221 i40e_aq_str(&pf->hw, last_aq_status)); 12222 goto bw_commit_out; 12223 } 12224 12225 /* Read word 0x10 of NVM - SW compatibility word 1 */ 12226 ret = i40e_aq_read_nvm(&pf->hw, 12227 I40E_SR_NVM_CONTROL_WORD, 12228 0x10, sizeof(nvm_word), &nvm_word, 12229 false, NULL); 12230 /* Save off last admin queue command status before releasing 12231 * the NVM 12232 */ 12233 last_aq_status = pf->hw.aq.asq_last_status; 12234 i40e_release_nvm(&pf->hw); 12235 if (ret) { 12236 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", 12237 i40e_stat_str(&pf->hw, ret), 12238 i40e_aq_str(&pf->hw, last_aq_status)); 12239 goto bw_commit_out; 12240 } 12241 12242 /* Wait a bit for NVM release to complete */ 12243 msleep(50); 12244 12245 /* Acquire NVM for write access */ 12246 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 12247 last_aq_status = pf->hw.aq.asq_last_status; 12248 if (ret) { 12249 dev_info(&pf->pdev->dev, 12250 "Cannot acquire NVM for write access, err %s aq_err %s\n", 12251 i40e_stat_str(&pf->hw, ret), 12252 i40e_aq_str(&pf->hw, last_aq_status)); 12253 goto bw_commit_out; 12254 } 12255 /* Write it back out unchanged to initiate update NVM, 12256 * which will force a write of the shadow (alt) RAM to 12257 * the NVM - thus storing the bandwidth values permanently. 12258 */ 12259 ret = i40e_aq_update_nvm(&pf->hw, 12260 I40E_SR_NVM_CONTROL_WORD, 12261 0x10, sizeof(nvm_word), 12262 &nvm_word, true, 0, NULL); 12263 /* Save off last admin queue command status before releasing 12264 * the NVM 12265 */ 12266 last_aq_status = pf->hw.aq.asq_last_status; 12267 i40e_release_nvm(&pf->hw); 12268 if (ret) 12269 dev_info(&pf->pdev->dev, 12270 "BW settings NOT SAVED, err %s aq_err %s\n", 12271 i40e_stat_str(&pf->hw, ret), 12272 i40e_aq_str(&pf->hw, last_aq_status)); 12273 bw_commit_out: 12274 12275 return ret; 12276 } 12277 12278 /** 12279 * i40e_is_total_port_shutdown_enabled - read NVM and return value 12280 * if total port shutdown feature is enabled for this PF 12281 * @pf: board private structure 12282 **/ 12283 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf) 12284 { 12285 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4) 12286 #define I40E_FEATURES_ENABLE_PTR 0x2A 12287 #define I40E_CURRENT_SETTING_PTR 0x2B 12288 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D 12289 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1 12290 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0) 12291 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4 12292 i40e_status read_status = I40E_SUCCESS; 12293 u16 sr_emp_sr_settings_ptr = 0; 12294 u16 features_enable = 0; 12295 u16 link_behavior = 0; 12296 bool ret = false; 12297 12298 read_status = i40e_read_nvm_word(&pf->hw, 12299 I40E_SR_EMP_SR_SETTINGS_PTR, 12300 &sr_emp_sr_settings_ptr); 12301 if (read_status) 12302 goto err_nvm; 12303 read_status = i40e_read_nvm_word(&pf->hw, 12304 sr_emp_sr_settings_ptr + 12305 I40E_FEATURES_ENABLE_PTR, 12306 &features_enable); 12307 if (read_status) 12308 goto err_nvm; 12309 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) { 12310 read_status = i40e_read_nvm_module_data(&pf->hw, 12311 I40E_SR_EMP_SR_SETTINGS_PTR, 12312 I40E_CURRENT_SETTING_PTR, 12313 I40E_LINK_BEHAVIOR_WORD_OFFSET, 12314 I40E_LINK_BEHAVIOR_WORD_LENGTH, 12315 &link_behavior); 12316 if (read_status) 12317 goto err_nvm; 12318 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH); 12319 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior; 12320 } 12321 return ret; 12322 12323 err_nvm: 12324 dev_warn(&pf->pdev->dev, 12325 "total-port-shutdown feature is off due to read nvm error: %s\n", 12326 i40e_stat_str(&pf->hw, read_status)); 12327 return ret; 12328 } 12329 12330 /** 12331 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 12332 * @pf: board private structure to initialize 12333 * 12334 * i40e_sw_init initializes the Adapter private data structure. 12335 * Fields are initialized based on PCI device information and 12336 * OS network device settings (MTU size). 12337 **/ 12338 static int i40e_sw_init(struct i40e_pf *pf) 12339 { 12340 int err = 0; 12341 int size; 12342 u16 pow; 12343 12344 /* Set default capability flags */ 12345 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 12346 I40E_FLAG_MSI_ENABLED | 12347 I40E_FLAG_MSIX_ENABLED; 12348 12349 /* Set default ITR */ 12350 pf->rx_itr_default = I40E_ITR_RX_DEF; 12351 pf->tx_itr_default = I40E_ITR_TX_DEF; 12352 12353 /* Depending on PF configurations, it is possible that the RSS 12354 * maximum might end up larger than the available queues 12355 */ 12356 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); 12357 pf->alloc_rss_size = 1; 12358 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 12359 pf->rss_size_max = min_t(int, pf->rss_size_max, 12360 pf->hw.func_caps.num_tx_qp); 12361 12362 /* find the next higher power-of-2 of num cpus */ 12363 pow = roundup_pow_of_two(num_online_cpus()); 12364 pf->rss_size_max = min_t(int, pf->rss_size_max, pow); 12365 12366 if (pf->hw.func_caps.rss) { 12367 pf->flags |= I40E_FLAG_RSS_ENABLED; 12368 pf->alloc_rss_size = min_t(int, pf->rss_size_max, 12369 num_online_cpus()); 12370 } 12371 12372 /* MFP mode enabled */ 12373 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { 12374 pf->flags |= I40E_FLAG_MFP_ENABLED; 12375 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 12376 if (i40e_get_partition_bw_setting(pf)) { 12377 dev_warn(&pf->pdev->dev, 12378 "Could not get partition bw settings\n"); 12379 } else { 12380 dev_info(&pf->pdev->dev, 12381 "Partition BW Min = %8.8x, Max = %8.8x\n", 12382 pf->min_bw, pf->max_bw); 12383 12384 /* nudge the Tx scheduler */ 12385 i40e_set_partition_bw_setting(pf); 12386 } 12387 } 12388 12389 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 12390 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 12391 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 12392 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 12393 if (pf->flags & I40E_FLAG_MFP_ENABLED && 12394 pf->hw.num_partitions > 1) 12395 dev_info(&pf->pdev->dev, 12396 "Flow Director Sideband mode Disabled in MFP mode\n"); 12397 else 12398 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 12399 pf->fdir_pf_filter_count = 12400 pf->hw.func_caps.fd_filters_guaranteed; 12401 pf->hw.fdir_shared_filter_count = 12402 pf->hw.func_caps.fd_filters_best_effort; 12403 } 12404 12405 if (pf->hw.mac.type == I40E_MAC_X722) { 12406 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE | 12407 I40E_HW_128_QP_RSS_CAPABLE | 12408 I40E_HW_ATR_EVICT_CAPABLE | 12409 I40E_HW_WB_ON_ITR_CAPABLE | 12410 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE | 12411 I40E_HW_NO_PCI_LINK_CHECK | 12412 I40E_HW_USE_SET_LLDP_MIB | 12413 I40E_HW_GENEVE_OFFLOAD_CAPABLE | 12414 I40E_HW_PTP_L4_CAPABLE | 12415 I40E_HW_WOL_MC_MAGIC_PKT_WAKE | 12416 I40E_HW_OUTER_UDP_CSUM_CAPABLE); 12417 12418 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03 12419 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) != 12420 I40E_FDEVICT_PCTYPE_DEFAULT) { 12421 dev_warn(&pf->pdev->dev, 12422 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n"); 12423 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE; 12424 } 12425 } else if ((pf->hw.aq.api_maj_ver > 1) || 12426 ((pf->hw.aq.api_maj_ver == 1) && 12427 (pf->hw.aq.api_min_ver > 4))) { 12428 /* Supported in FW API version higher than 1.4 */ 12429 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE; 12430 } 12431 12432 /* Enable HW ATR eviction if possible */ 12433 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE) 12434 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED; 12435 12436 if ((pf->hw.mac.type == I40E_MAC_XL710) && 12437 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 12438 (pf->hw.aq.fw_maj_ver < 4))) { 12439 pf->hw_features |= I40E_HW_RESTART_AUTONEG; 12440 /* No DCB support for FW < v4.33 */ 12441 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT; 12442 } 12443 12444 /* Disable FW LLDP if FW < v4.3 */ 12445 if ((pf->hw.mac.type == I40E_MAC_XL710) && 12446 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 12447 (pf->hw.aq.fw_maj_ver < 4))) 12448 pf->hw_features |= I40E_HW_STOP_FW_LLDP; 12449 12450 /* Use the FW Set LLDP MIB API if FW > v4.40 */ 12451 if ((pf->hw.mac.type == I40E_MAC_XL710) && 12452 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) || 12453 (pf->hw.aq.fw_maj_ver >= 5))) 12454 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB; 12455 12456 /* Enable PTP L4 if FW > v6.0 */ 12457 if (pf->hw.mac.type == I40E_MAC_XL710 && 12458 pf->hw.aq.fw_maj_ver >= 6) 12459 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE; 12460 12461 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) { 12462 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 12463 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 12464 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf); 12465 } 12466 12467 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) { 12468 pf->flags |= I40E_FLAG_IWARP_ENABLED; 12469 /* IWARP needs one extra vector for CQP just like MISC.*/ 12470 pf->num_iwarp_msix = (int)num_online_cpus() + 1; 12471 } 12472 /* Stopping FW LLDP engine is supported on XL710 and X722 12473 * starting from FW versions determined in i40e_init_adminq. 12474 * Stopping the FW LLDP engine is not supported on XL710 12475 * if NPAR is functioning so unset this hw flag in this case. 12476 */ 12477 if (pf->hw.mac.type == I40E_MAC_XL710 && 12478 pf->hw.func_caps.npar_enable && 12479 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) 12480 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE; 12481 12482 #ifdef CONFIG_PCI_IOV 12483 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 12484 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 12485 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 12486 pf->num_req_vfs = min_t(int, 12487 pf->hw.func_caps.num_vfs, 12488 I40E_MAX_VF_COUNT); 12489 } 12490 #endif /* CONFIG_PCI_IOV */ 12491 pf->eeprom_version = 0xDEAD; 12492 pf->lan_veb = I40E_NO_VEB; 12493 pf->lan_vsi = I40E_NO_VSI; 12494 12495 /* By default FW has this off for performance reasons */ 12496 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; 12497 12498 /* set up queue assignment tracking */ 12499 size = sizeof(struct i40e_lump_tracking) 12500 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 12501 pf->qp_pile = kzalloc(size, GFP_KERNEL); 12502 if (!pf->qp_pile) { 12503 err = -ENOMEM; 12504 goto sw_init_done; 12505 } 12506 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 12507 pf->qp_pile->search_hint = 0; 12508 12509 pf->tx_timeout_recovery_level = 1; 12510 12511 if (pf->hw.mac.type != I40E_MAC_X722 && 12512 i40e_is_total_port_shutdown_enabled(pf)) { 12513 /* Link down on close must be on when total port shutdown 12514 * is enabled for a given port 12515 */ 12516 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED | 12517 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED); 12518 dev_info(&pf->pdev->dev, 12519 "total-port-shutdown was enabled, link-down-on-close is forced on\n"); 12520 } 12521 mutex_init(&pf->switch_mutex); 12522 12523 sw_init_done: 12524 return err; 12525 } 12526 12527 /** 12528 * i40e_set_ntuple - set the ntuple feature flag and take action 12529 * @pf: board private structure to initialize 12530 * @features: the feature set that the stack is suggesting 12531 * 12532 * returns a bool to indicate if reset needs to happen 12533 **/ 12534 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 12535 { 12536 bool need_reset = false; 12537 12538 /* Check if Flow Director n-tuple support was enabled or disabled. If 12539 * the state changed, we need to reset. 12540 */ 12541 if (features & NETIF_F_NTUPLE) { 12542 /* Enable filters and mark for reset */ 12543 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 12544 need_reset = true; 12545 /* enable FD_SB only if there is MSI-X vector and no cloud 12546 * filters exist 12547 */ 12548 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) { 12549 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 12550 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE; 12551 } 12552 } else { 12553 /* turn off filters, mark for reset and clear SW filter list */ 12554 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 12555 need_reset = true; 12556 i40e_fdir_filter_exit(pf); 12557 } 12558 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 12559 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state); 12560 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 12561 12562 /* reset fd counters */ 12563 pf->fd_add_err = 0; 12564 pf->fd_atr_cnt = 0; 12565 /* if ATR was auto disabled it can be re-enabled. */ 12566 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) 12567 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 12568 (I40E_DEBUG_FD & pf->hw.debug_mask)) 12569 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 12570 } 12571 return need_reset; 12572 } 12573 12574 /** 12575 * i40e_clear_rss_lut - clear the rx hash lookup table 12576 * @vsi: the VSI being configured 12577 **/ 12578 static void i40e_clear_rss_lut(struct i40e_vsi *vsi) 12579 { 12580 struct i40e_pf *pf = vsi->back; 12581 struct i40e_hw *hw = &pf->hw; 12582 u16 vf_id = vsi->vf_id; 12583 u8 i; 12584 12585 if (vsi->type == I40E_VSI_MAIN) { 12586 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 12587 wr32(hw, I40E_PFQF_HLUT(i), 0); 12588 } else if (vsi->type == I40E_VSI_SRIOV) { 12589 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 12590 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0); 12591 } else { 12592 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 12593 } 12594 } 12595 12596 /** 12597 * i40e_set_features - set the netdev feature flags 12598 * @netdev: ptr to the netdev being adjusted 12599 * @features: the feature set that the stack is suggesting 12600 * Note: expects to be called while under rtnl_lock() 12601 **/ 12602 static int i40e_set_features(struct net_device *netdev, 12603 netdev_features_t features) 12604 { 12605 struct i40e_netdev_priv *np = netdev_priv(netdev); 12606 struct i40e_vsi *vsi = np->vsi; 12607 struct i40e_pf *pf = vsi->back; 12608 bool need_reset; 12609 12610 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH)) 12611 i40e_pf_config_rss(pf); 12612 else if (!(features & NETIF_F_RXHASH) && 12613 netdev->features & NETIF_F_RXHASH) 12614 i40e_clear_rss_lut(vsi); 12615 12616 if (features & NETIF_F_HW_VLAN_CTAG_RX) 12617 i40e_vlan_stripping_enable(vsi); 12618 else 12619 i40e_vlan_stripping_disable(vsi); 12620 12621 if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) { 12622 dev_err(&pf->pdev->dev, 12623 "Offloaded tc filters active, can't turn hw_tc_offload off"); 12624 return -EINVAL; 12625 } 12626 12627 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt) 12628 i40e_del_all_macvlans(vsi); 12629 12630 need_reset = i40e_set_ntuple(pf, features); 12631 12632 if (need_reset) 12633 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 12634 12635 return 0; 12636 } 12637 12638 static int i40e_udp_tunnel_set_port(struct net_device *netdev, 12639 unsigned int table, unsigned int idx, 12640 struct udp_tunnel_info *ti) 12641 { 12642 struct i40e_netdev_priv *np = netdev_priv(netdev); 12643 struct i40e_hw *hw = &np->vsi->back->hw; 12644 u8 type, filter_index; 12645 i40e_status ret; 12646 12647 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN : 12648 I40E_AQC_TUNNEL_TYPE_NGE; 12649 12650 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index, 12651 NULL); 12652 if (ret) { 12653 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n", 12654 i40e_stat_str(hw, ret), 12655 i40e_aq_str(hw, hw->aq.asq_last_status)); 12656 return -EIO; 12657 } 12658 12659 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index); 12660 return 0; 12661 } 12662 12663 static int i40e_udp_tunnel_unset_port(struct net_device *netdev, 12664 unsigned int table, unsigned int idx, 12665 struct udp_tunnel_info *ti) 12666 { 12667 struct i40e_netdev_priv *np = netdev_priv(netdev); 12668 struct i40e_hw *hw = &np->vsi->back->hw; 12669 i40e_status ret; 12670 12671 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL); 12672 if (ret) { 12673 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n", 12674 i40e_stat_str(hw, ret), 12675 i40e_aq_str(hw, hw->aq.asq_last_status)); 12676 return -EIO; 12677 } 12678 12679 return 0; 12680 } 12681 12682 static int i40e_get_phys_port_id(struct net_device *netdev, 12683 struct netdev_phys_item_id *ppid) 12684 { 12685 struct i40e_netdev_priv *np = netdev_priv(netdev); 12686 struct i40e_pf *pf = np->vsi->back; 12687 struct i40e_hw *hw = &pf->hw; 12688 12689 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID)) 12690 return -EOPNOTSUPP; 12691 12692 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 12693 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 12694 12695 return 0; 12696 } 12697 12698 /** 12699 * i40e_ndo_fdb_add - add an entry to the hardware database 12700 * @ndm: the input from the stack 12701 * @tb: pointer to array of nladdr (unused) 12702 * @dev: the net device pointer 12703 * @addr: the MAC address entry being added 12704 * @vid: VLAN ID 12705 * @flags: instructions from stack about fdb operation 12706 * @extack: netlink extended ack, unused currently 12707 */ 12708 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 12709 struct net_device *dev, 12710 const unsigned char *addr, u16 vid, 12711 u16 flags, 12712 struct netlink_ext_ack *extack) 12713 { 12714 struct i40e_netdev_priv *np = netdev_priv(dev); 12715 struct i40e_pf *pf = np->vsi->back; 12716 int err = 0; 12717 12718 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 12719 return -EOPNOTSUPP; 12720 12721 if (vid) { 12722 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 12723 return -EINVAL; 12724 } 12725 12726 /* Hardware does not support aging addresses so if a 12727 * ndm_state is given only allow permanent addresses 12728 */ 12729 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 12730 netdev_info(dev, "FDB only supports static addresses\n"); 12731 return -EINVAL; 12732 } 12733 12734 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 12735 err = dev_uc_add_excl(dev, addr); 12736 else if (is_multicast_ether_addr(addr)) 12737 err = dev_mc_add_excl(dev, addr); 12738 else 12739 err = -EINVAL; 12740 12741 /* Only return duplicate errors if NLM_F_EXCL is set */ 12742 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 12743 err = 0; 12744 12745 return err; 12746 } 12747 12748 /** 12749 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 12750 * @dev: the netdev being configured 12751 * @nlh: RTNL message 12752 * @flags: bridge flags 12753 * @extack: netlink extended ack 12754 * 12755 * Inserts a new hardware bridge if not already created and 12756 * enables the bridging mode requested (VEB or VEPA). If the 12757 * hardware bridge has already been inserted and the request 12758 * is to change the mode then that requires a PF reset to 12759 * allow rebuild of the components with required hardware 12760 * bridge mode enabled. 12761 * 12762 * Note: expects to be called while under rtnl_lock() 12763 **/ 12764 static int i40e_ndo_bridge_setlink(struct net_device *dev, 12765 struct nlmsghdr *nlh, 12766 u16 flags, 12767 struct netlink_ext_ack *extack) 12768 { 12769 struct i40e_netdev_priv *np = netdev_priv(dev); 12770 struct i40e_vsi *vsi = np->vsi; 12771 struct i40e_pf *pf = vsi->back; 12772 struct i40e_veb *veb = NULL; 12773 struct nlattr *attr, *br_spec; 12774 int i, rem; 12775 12776 /* Only for PF VSI for now */ 12777 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 12778 return -EOPNOTSUPP; 12779 12780 /* Find the HW bridge for PF VSI */ 12781 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 12782 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 12783 veb = pf->veb[i]; 12784 } 12785 12786 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 12787 12788 nla_for_each_nested(attr, br_spec, rem) { 12789 __u16 mode; 12790 12791 if (nla_type(attr) != IFLA_BRIDGE_MODE) 12792 continue; 12793 12794 mode = nla_get_u16(attr); 12795 if ((mode != BRIDGE_MODE_VEPA) && 12796 (mode != BRIDGE_MODE_VEB)) 12797 return -EINVAL; 12798 12799 /* Insert a new HW bridge */ 12800 if (!veb) { 12801 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 12802 vsi->tc_config.enabled_tc); 12803 if (veb) { 12804 veb->bridge_mode = mode; 12805 i40e_config_bridge_mode(veb); 12806 } else { 12807 /* No Bridge HW offload available */ 12808 return -ENOENT; 12809 } 12810 break; 12811 } else if (mode != veb->bridge_mode) { 12812 /* Existing HW bridge but different mode needs reset */ 12813 veb->bridge_mode = mode; 12814 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 12815 if (mode == BRIDGE_MODE_VEB) 12816 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 12817 else 12818 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 12819 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 12820 break; 12821 } 12822 } 12823 12824 return 0; 12825 } 12826 12827 /** 12828 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 12829 * @skb: skb buff 12830 * @pid: process id 12831 * @seq: RTNL message seq # 12832 * @dev: the netdev being configured 12833 * @filter_mask: unused 12834 * @nlflags: netlink flags passed in 12835 * 12836 * Return the mode in which the hardware bridge is operating in 12837 * i.e VEB or VEPA. 12838 **/ 12839 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 12840 struct net_device *dev, 12841 u32 __always_unused filter_mask, 12842 int nlflags) 12843 { 12844 struct i40e_netdev_priv *np = netdev_priv(dev); 12845 struct i40e_vsi *vsi = np->vsi; 12846 struct i40e_pf *pf = vsi->back; 12847 struct i40e_veb *veb = NULL; 12848 int i; 12849 12850 /* Only for PF VSI for now */ 12851 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 12852 return -EOPNOTSUPP; 12853 12854 /* Find the HW bridge for the PF VSI */ 12855 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 12856 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 12857 veb = pf->veb[i]; 12858 } 12859 12860 if (!veb) 12861 return 0; 12862 12863 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 12864 0, 0, nlflags, filter_mask, NULL); 12865 } 12866 12867 /** 12868 * i40e_features_check - Validate encapsulated packet conforms to limits 12869 * @skb: skb buff 12870 * @dev: This physical port's netdev 12871 * @features: Offload features that the stack believes apply 12872 **/ 12873 static netdev_features_t i40e_features_check(struct sk_buff *skb, 12874 struct net_device *dev, 12875 netdev_features_t features) 12876 { 12877 size_t len; 12878 12879 /* No point in doing any of this if neither checksum nor GSO are 12880 * being requested for this frame. We can rule out both by just 12881 * checking for CHECKSUM_PARTIAL 12882 */ 12883 if (skb->ip_summed != CHECKSUM_PARTIAL) 12884 return features; 12885 12886 /* We cannot support GSO if the MSS is going to be less than 12887 * 64 bytes. If it is then we need to drop support for GSO. 12888 */ 12889 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64)) 12890 features &= ~NETIF_F_GSO_MASK; 12891 12892 /* MACLEN can support at most 63 words */ 12893 len = skb_network_header(skb) - skb->data; 12894 if (len & ~(63 * 2)) 12895 goto out_err; 12896 12897 /* IPLEN and EIPLEN can support at most 127 dwords */ 12898 len = skb_transport_header(skb) - skb_network_header(skb); 12899 if (len & ~(127 * 4)) 12900 goto out_err; 12901 12902 if (skb->encapsulation) { 12903 /* L4TUNLEN can support 127 words */ 12904 len = skb_inner_network_header(skb) - skb_transport_header(skb); 12905 if (len & ~(127 * 2)) 12906 goto out_err; 12907 12908 /* IPLEN can support at most 127 dwords */ 12909 len = skb_inner_transport_header(skb) - 12910 skb_inner_network_header(skb); 12911 if (len & ~(127 * 4)) 12912 goto out_err; 12913 } 12914 12915 /* No need to validate L4LEN as TCP is the only protocol with a 12916 * a flexible value and we support all possible values supported 12917 * by TCP, which is at most 15 dwords 12918 */ 12919 12920 return features; 12921 out_err: 12922 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 12923 } 12924 12925 /** 12926 * i40e_xdp_setup - add/remove an XDP program 12927 * @vsi: VSI to changed 12928 * @prog: XDP program 12929 * @extack: netlink extended ack 12930 **/ 12931 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog, 12932 struct netlink_ext_ack *extack) 12933 { 12934 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 12935 struct i40e_pf *pf = vsi->back; 12936 struct bpf_prog *old_prog; 12937 bool need_reset; 12938 int i; 12939 12940 /* Don't allow frames that span over multiple buffers */ 12941 if (frame_size > vsi->rx_buf_len) { 12942 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP"); 12943 return -EINVAL; 12944 } 12945 12946 /* When turning XDP on->off/off->on we reset and rebuild the rings. */ 12947 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog); 12948 12949 if (need_reset) 12950 i40e_prep_for_reset(pf); 12951 12952 old_prog = xchg(&vsi->xdp_prog, prog); 12953 12954 if (need_reset) { 12955 if (!prog) 12956 /* Wait until ndo_xsk_wakeup completes. */ 12957 synchronize_rcu(); 12958 i40e_reset_and_rebuild(pf, true, true); 12959 } 12960 12961 for (i = 0; i < vsi->num_queue_pairs; i++) 12962 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog); 12963 12964 if (old_prog) 12965 bpf_prog_put(old_prog); 12966 12967 /* Kick start the NAPI context if there is an AF_XDP socket open 12968 * on that queue id. This so that receiving will start. 12969 */ 12970 if (need_reset && prog) 12971 for (i = 0; i < vsi->num_queue_pairs; i++) 12972 if (vsi->xdp_rings[i]->xsk_pool) 12973 (void)i40e_xsk_wakeup(vsi->netdev, i, 12974 XDP_WAKEUP_RX); 12975 12976 return 0; 12977 } 12978 12979 /** 12980 * i40e_enter_busy_conf - Enters busy config state 12981 * @vsi: vsi 12982 * 12983 * Returns 0 on success, <0 for failure. 12984 **/ 12985 static int i40e_enter_busy_conf(struct i40e_vsi *vsi) 12986 { 12987 struct i40e_pf *pf = vsi->back; 12988 int timeout = 50; 12989 12990 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 12991 timeout--; 12992 if (!timeout) 12993 return -EBUSY; 12994 usleep_range(1000, 2000); 12995 } 12996 12997 return 0; 12998 } 12999 13000 /** 13001 * i40e_exit_busy_conf - Exits busy config state 13002 * @vsi: vsi 13003 **/ 13004 static void i40e_exit_busy_conf(struct i40e_vsi *vsi) 13005 { 13006 struct i40e_pf *pf = vsi->back; 13007 13008 clear_bit(__I40E_CONFIG_BUSY, pf->state); 13009 } 13010 13011 /** 13012 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair 13013 * @vsi: vsi 13014 * @queue_pair: queue pair 13015 **/ 13016 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair) 13017 { 13018 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0, 13019 sizeof(vsi->rx_rings[queue_pair]->rx_stats)); 13020 memset(&vsi->tx_rings[queue_pair]->stats, 0, 13021 sizeof(vsi->tx_rings[queue_pair]->stats)); 13022 if (i40e_enabled_xdp_vsi(vsi)) { 13023 memset(&vsi->xdp_rings[queue_pair]->stats, 0, 13024 sizeof(vsi->xdp_rings[queue_pair]->stats)); 13025 } 13026 } 13027 13028 /** 13029 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair 13030 * @vsi: vsi 13031 * @queue_pair: queue pair 13032 **/ 13033 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair) 13034 { 13035 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]); 13036 if (i40e_enabled_xdp_vsi(vsi)) { 13037 /* Make sure that in-progress ndo_xdp_xmit calls are 13038 * completed. 13039 */ 13040 synchronize_rcu(); 13041 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]); 13042 } 13043 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]); 13044 } 13045 13046 /** 13047 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair 13048 * @vsi: vsi 13049 * @queue_pair: queue pair 13050 * @enable: true for enable, false for disable 13051 **/ 13052 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair, 13053 bool enable) 13054 { 13055 struct i40e_ring *rxr = vsi->rx_rings[queue_pair]; 13056 struct i40e_q_vector *q_vector = rxr->q_vector; 13057 13058 if (!vsi->netdev) 13059 return; 13060 13061 /* All rings in a qp belong to the same qvector. */ 13062 if (q_vector->rx.ring || q_vector->tx.ring) { 13063 if (enable) 13064 napi_enable(&q_vector->napi); 13065 else 13066 napi_disable(&q_vector->napi); 13067 } 13068 } 13069 13070 /** 13071 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair 13072 * @vsi: vsi 13073 * @queue_pair: queue pair 13074 * @enable: true for enable, false for disable 13075 * 13076 * Returns 0 on success, <0 on failure. 13077 **/ 13078 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair, 13079 bool enable) 13080 { 13081 struct i40e_pf *pf = vsi->back; 13082 int pf_q, ret = 0; 13083 13084 pf_q = vsi->base_queue + queue_pair; 13085 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q, 13086 false /*is xdp*/, enable); 13087 if (ret) { 13088 dev_info(&pf->pdev->dev, 13089 "VSI seid %d Tx ring %d %sable timeout\n", 13090 vsi->seid, pf_q, (enable ? "en" : "dis")); 13091 return ret; 13092 } 13093 13094 i40e_control_rx_q(pf, pf_q, enable); 13095 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 13096 if (ret) { 13097 dev_info(&pf->pdev->dev, 13098 "VSI seid %d Rx ring %d %sable timeout\n", 13099 vsi->seid, pf_q, (enable ? "en" : "dis")); 13100 return ret; 13101 } 13102 13103 /* Due to HW errata, on Rx disable only, the register can 13104 * indicate done before it really is. Needs 50ms to be sure 13105 */ 13106 if (!enable) 13107 mdelay(50); 13108 13109 if (!i40e_enabled_xdp_vsi(vsi)) 13110 return ret; 13111 13112 ret = i40e_control_wait_tx_q(vsi->seid, pf, 13113 pf_q + vsi->alloc_queue_pairs, 13114 true /*is xdp*/, enable); 13115 if (ret) { 13116 dev_info(&pf->pdev->dev, 13117 "VSI seid %d XDP Tx ring %d %sable timeout\n", 13118 vsi->seid, pf_q, (enable ? "en" : "dis")); 13119 } 13120 13121 return ret; 13122 } 13123 13124 /** 13125 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair 13126 * @vsi: vsi 13127 * @queue_pair: queue_pair 13128 **/ 13129 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair) 13130 { 13131 struct i40e_ring *rxr = vsi->rx_rings[queue_pair]; 13132 struct i40e_pf *pf = vsi->back; 13133 struct i40e_hw *hw = &pf->hw; 13134 13135 /* All rings in a qp belong to the same qvector. */ 13136 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 13137 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx); 13138 else 13139 i40e_irq_dynamic_enable_icr0(pf); 13140 13141 i40e_flush(hw); 13142 } 13143 13144 /** 13145 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair 13146 * @vsi: vsi 13147 * @queue_pair: queue_pair 13148 **/ 13149 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair) 13150 { 13151 struct i40e_ring *rxr = vsi->rx_rings[queue_pair]; 13152 struct i40e_pf *pf = vsi->back; 13153 struct i40e_hw *hw = &pf->hw; 13154 13155 /* For simplicity, instead of removing the qp interrupt causes 13156 * from the interrupt linked list, we simply disable the interrupt, and 13157 * leave the list intact. 13158 * 13159 * All rings in a qp belong to the same qvector. 13160 */ 13161 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 13162 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx; 13163 13164 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0); 13165 i40e_flush(hw); 13166 synchronize_irq(pf->msix_entries[intpf].vector); 13167 } else { 13168 /* Legacy and MSI mode - this stops all interrupt handling */ 13169 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 13170 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 13171 i40e_flush(hw); 13172 synchronize_irq(pf->pdev->irq); 13173 } 13174 } 13175 13176 /** 13177 * i40e_queue_pair_disable - Disables a queue pair 13178 * @vsi: vsi 13179 * @queue_pair: queue pair 13180 * 13181 * Returns 0 on success, <0 on failure. 13182 **/ 13183 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair) 13184 { 13185 int err; 13186 13187 err = i40e_enter_busy_conf(vsi); 13188 if (err) 13189 return err; 13190 13191 i40e_queue_pair_disable_irq(vsi, queue_pair); 13192 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */); 13193 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */); 13194 i40e_queue_pair_clean_rings(vsi, queue_pair); 13195 i40e_queue_pair_reset_stats(vsi, queue_pair); 13196 13197 return err; 13198 } 13199 13200 /** 13201 * i40e_queue_pair_enable - Enables a queue pair 13202 * @vsi: vsi 13203 * @queue_pair: queue pair 13204 * 13205 * Returns 0 on success, <0 on failure. 13206 **/ 13207 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair) 13208 { 13209 int err; 13210 13211 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]); 13212 if (err) 13213 return err; 13214 13215 if (i40e_enabled_xdp_vsi(vsi)) { 13216 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]); 13217 if (err) 13218 return err; 13219 } 13220 13221 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]); 13222 if (err) 13223 return err; 13224 13225 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */); 13226 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */); 13227 i40e_queue_pair_enable_irq(vsi, queue_pair); 13228 13229 i40e_exit_busy_conf(vsi); 13230 13231 return err; 13232 } 13233 13234 /** 13235 * i40e_xdp - implements ndo_bpf for i40e 13236 * @dev: netdevice 13237 * @xdp: XDP command 13238 **/ 13239 static int i40e_xdp(struct net_device *dev, 13240 struct netdev_bpf *xdp) 13241 { 13242 struct i40e_netdev_priv *np = netdev_priv(dev); 13243 struct i40e_vsi *vsi = np->vsi; 13244 13245 if (vsi->type != I40E_VSI_MAIN) 13246 return -EINVAL; 13247 13248 switch (xdp->command) { 13249 case XDP_SETUP_PROG: 13250 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack); 13251 case XDP_SETUP_XSK_POOL: 13252 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool, 13253 xdp->xsk.queue_id); 13254 default: 13255 return -EINVAL; 13256 } 13257 } 13258 13259 static const struct net_device_ops i40e_netdev_ops = { 13260 .ndo_open = i40e_open, 13261 .ndo_stop = i40e_close, 13262 .ndo_start_xmit = i40e_lan_xmit_frame, 13263 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 13264 .ndo_set_rx_mode = i40e_set_rx_mode, 13265 .ndo_validate_addr = eth_validate_addr, 13266 .ndo_set_mac_address = i40e_set_mac, 13267 .ndo_change_mtu = i40e_change_mtu, 13268 .ndo_do_ioctl = i40e_ioctl, 13269 .ndo_tx_timeout = i40e_tx_timeout, 13270 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 13271 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 13272 #ifdef CONFIG_NET_POLL_CONTROLLER 13273 .ndo_poll_controller = i40e_netpoll, 13274 #endif 13275 .ndo_setup_tc = __i40e_setup_tc, 13276 .ndo_select_queue = i40e_lan_select_queue, 13277 .ndo_set_features = i40e_set_features, 13278 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 13279 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 13280 .ndo_get_vf_stats = i40e_get_vf_stats, 13281 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 13282 .ndo_get_vf_config = i40e_ndo_get_vf_config, 13283 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 13284 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 13285 .ndo_set_vf_trust = i40e_ndo_set_vf_trust, 13286 .ndo_get_phys_port_id = i40e_get_phys_port_id, 13287 .ndo_fdb_add = i40e_ndo_fdb_add, 13288 .ndo_features_check = i40e_features_check, 13289 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 13290 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 13291 .ndo_bpf = i40e_xdp, 13292 .ndo_xdp_xmit = i40e_xdp_xmit, 13293 .ndo_xsk_wakeup = i40e_xsk_wakeup, 13294 .ndo_dfwd_add_station = i40e_fwd_add, 13295 .ndo_dfwd_del_station = i40e_fwd_del, 13296 }; 13297 13298 /** 13299 * i40e_config_netdev - Setup the netdev flags 13300 * @vsi: the VSI being configured 13301 * 13302 * Returns 0 on success, negative value on failure 13303 **/ 13304 static int i40e_config_netdev(struct i40e_vsi *vsi) 13305 { 13306 struct i40e_pf *pf = vsi->back; 13307 struct i40e_hw *hw = &pf->hw; 13308 struct i40e_netdev_priv *np; 13309 struct net_device *netdev; 13310 u8 broadcast[ETH_ALEN]; 13311 u8 mac_addr[ETH_ALEN]; 13312 int etherdev_size; 13313 netdev_features_t hw_enc_features; 13314 netdev_features_t hw_features; 13315 13316 etherdev_size = sizeof(struct i40e_netdev_priv); 13317 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 13318 if (!netdev) 13319 return -ENOMEM; 13320 13321 vsi->netdev = netdev; 13322 np = netdev_priv(netdev); 13323 np->vsi = vsi; 13324 13325 hw_enc_features = NETIF_F_SG | 13326 NETIF_F_IP_CSUM | 13327 NETIF_F_IPV6_CSUM | 13328 NETIF_F_HIGHDMA | 13329 NETIF_F_SOFT_FEATURES | 13330 NETIF_F_TSO | 13331 NETIF_F_TSO_ECN | 13332 NETIF_F_TSO6 | 13333 NETIF_F_GSO_GRE | 13334 NETIF_F_GSO_GRE_CSUM | 13335 NETIF_F_GSO_PARTIAL | 13336 NETIF_F_GSO_IPXIP4 | 13337 NETIF_F_GSO_IPXIP6 | 13338 NETIF_F_GSO_UDP_TUNNEL | 13339 NETIF_F_GSO_UDP_TUNNEL_CSUM | 13340 NETIF_F_GSO_UDP_L4 | 13341 NETIF_F_SCTP_CRC | 13342 NETIF_F_RXHASH | 13343 NETIF_F_RXCSUM | 13344 0; 13345 13346 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE)) 13347 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; 13348 13349 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic; 13350 13351 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; 13352 13353 netdev->hw_enc_features |= hw_enc_features; 13354 13355 /* record features VLANs can make use of */ 13356 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID; 13357 13358 /* enable macvlan offloads */ 13359 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD; 13360 13361 hw_features = hw_enc_features | 13362 NETIF_F_HW_VLAN_CTAG_TX | 13363 NETIF_F_HW_VLAN_CTAG_RX; 13364 13365 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 13366 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC; 13367 13368 netdev->hw_features |= hw_features; 13369 13370 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER; 13371 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; 13372 13373 if (vsi->type == I40E_VSI_MAIN) { 13374 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 13375 ether_addr_copy(mac_addr, hw->mac.perm_addr); 13376 /* The following steps are necessary for two reasons. First, 13377 * some older NVM configurations load a default MAC-VLAN 13378 * filter that will accept any tagged packet, and we want to 13379 * replace this with a normal filter. Additionally, it is 13380 * possible our MAC address was provided by the platform using 13381 * Open Firmware or similar. 13382 * 13383 * Thus, we need to remove the default filter and install one 13384 * specific to the MAC address. 13385 */ 13386 i40e_rm_default_mac_filter(vsi, mac_addr); 13387 spin_lock_bh(&vsi->mac_filter_hash_lock); 13388 i40e_add_mac_filter(vsi, mac_addr); 13389 spin_unlock_bh(&vsi->mac_filter_hash_lock); 13390 } else { 13391 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we 13392 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to 13393 * the end, which is 4 bytes long, so force truncation of the 13394 * original name by IFNAMSIZ - 4 13395 */ 13396 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d", 13397 IFNAMSIZ - 4, 13398 pf->vsi[pf->lan_vsi]->netdev->name); 13399 eth_random_addr(mac_addr); 13400 13401 spin_lock_bh(&vsi->mac_filter_hash_lock); 13402 i40e_add_mac_filter(vsi, mac_addr); 13403 spin_unlock_bh(&vsi->mac_filter_hash_lock); 13404 } 13405 13406 /* Add the broadcast filter so that we initially will receive 13407 * broadcast packets. Note that when a new VLAN is first added the 13408 * driver will convert all filters marked I40E_VLAN_ANY into VLAN 13409 * specific filters as part of transitioning into "vlan" operation. 13410 * When more VLANs are added, the driver will copy each existing MAC 13411 * filter and add it for the new VLAN. 13412 * 13413 * Broadcast filters are handled specially by 13414 * i40e_sync_filters_subtask, as the driver must to set the broadcast 13415 * promiscuous bit instead of adding this directly as a MAC/VLAN 13416 * filter. The subtask will update the correct broadcast promiscuous 13417 * bits as VLANs become active or inactive. 13418 */ 13419 eth_broadcast_addr(broadcast); 13420 spin_lock_bh(&vsi->mac_filter_hash_lock); 13421 i40e_add_mac_filter(vsi, broadcast); 13422 spin_unlock_bh(&vsi->mac_filter_hash_lock); 13423 13424 ether_addr_copy(netdev->dev_addr, mac_addr); 13425 ether_addr_copy(netdev->perm_addr, mac_addr); 13426 13427 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */ 13428 netdev->neigh_priv_len = sizeof(u32) * 4; 13429 13430 netdev->priv_flags |= IFF_UNICAST_FLT; 13431 netdev->priv_flags |= IFF_SUPP_NOFCS; 13432 /* Setup netdev TC information */ 13433 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 13434 13435 netdev->netdev_ops = &i40e_netdev_ops; 13436 netdev->watchdog_timeo = 5 * HZ; 13437 i40e_set_ethtool_ops(netdev); 13438 13439 /* MTU range: 68 - 9706 */ 13440 netdev->min_mtu = ETH_MIN_MTU; 13441 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD; 13442 13443 return 0; 13444 } 13445 13446 /** 13447 * i40e_vsi_delete - Delete a VSI from the switch 13448 * @vsi: the VSI being removed 13449 * 13450 * Returns 0 on success, negative value on failure 13451 **/ 13452 static void i40e_vsi_delete(struct i40e_vsi *vsi) 13453 { 13454 /* remove default VSI is not allowed */ 13455 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 13456 return; 13457 13458 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 13459 } 13460 13461 /** 13462 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 13463 * @vsi: the VSI being queried 13464 * 13465 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 13466 **/ 13467 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 13468 { 13469 struct i40e_veb *veb; 13470 struct i40e_pf *pf = vsi->back; 13471 13472 /* Uplink is not a bridge so default to VEB */ 13473 if (vsi->veb_idx >= I40E_MAX_VEB) 13474 return 1; 13475 13476 veb = pf->veb[vsi->veb_idx]; 13477 if (!veb) { 13478 dev_info(&pf->pdev->dev, 13479 "There is no veb associated with the bridge\n"); 13480 return -ENOENT; 13481 } 13482 13483 /* Uplink is a bridge in VEPA mode */ 13484 if (veb->bridge_mode & BRIDGE_MODE_VEPA) { 13485 return 0; 13486 } else { 13487 /* Uplink is a bridge in VEB mode */ 13488 return 1; 13489 } 13490 13491 /* VEPA is now default bridge, so return 0 */ 13492 return 0; 13493 } 13494 13495 /** 13496 * i40e_add_vsi - Add a VSI to the switch 13497 * @vsi: the VSI being configured 13498 * 13499 * This initializes a VSI context depending on the VSI type to be added and 13500 * passes it down to the add_vsi aq command. 13501 **/ 13502 static int i40e_add_vsi(struct i40e_vsi *vsi) 13503 { 13504 int ret = -ENODEV; 13505 struct i40e_pf *pf = vsi->back; 13506 struct i40e_hw *hw = &pf->hw; 13507 struct i40e_vsi_context ctxt; 13508 struct i40e_mac_filter *f; 13509 struct hlist_node *h; 13510 int bkt; 13511 13512 u8 enabled_tc = 0x1; /* TC0 enabled */ 13513 int f_count = 0; 13514 13515 memset(&ctxt, 0, sizeof(ctxt)); 13516 switch (vsi->type) { 13517 case I40E_VSI_MAIN: 13518 /* The PF's main VSI is already setup as part of the 13519 * device initialization, so we'll not bother with 13520 * the add_vsi call, but we will retrieve the current 13521 * VSI context. 13522 */ 13523 ctxt.seid = pf->main_vsi_seid; 13524 ctxt.pf_num = pf->hw.pf_id; 13525 ctxt.vf_num = 0; 13526 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 13527 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 13528 if (ret) { 13529 dev_info(&pf->pdev->dev, 13530 "couldn't get PF vsi config, err %s aq_err %s\n", 13531 i40e_stat_str(&pf->hw, ret), 13532 i40e_aq_str(&pf->hw, 13533 pf->hw.aq.asq_last_status)); 13534 return -ENOENT; 13535 } 13536 vsi->info = ctxt.info; 13537 vsi->info.valid_sections = 0; 13538 13539 vsi->seid = ctxt.seid; 13540 vsi->id = ctxt.vsi_number; 13541 13542 enabled_tc = i40e_pf_get_tc_map(pf); 13543 13544 /* Source pruning is enabled by default, so the flag is 13545 * negative logic - if it's set, we need to fiddle with 13546 * the VSI to disable source pruning. 13547 */ 13548 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) { 13549 memset(&ctxt, 0, sizeof(ctxt)); 13550 ctxt.seid = pf->main_vsi_seid; 13551 ctxt.pf_num = pf->hw.pf_id; 13552 ctxt.vf_num = 0; 13553 ctxt.info.valid_sections |= 13554 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 13555 ctxt.info.switch_id = 13556 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB); 13557 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 13558 if (ret) { 13559 dev_info(&pf->pdev->dev, 13560 "update vsi failed, err %s aq_err %s\n", 13561 i40e_stat_str(&pf->hw, ret), 13562 i40e_aq_str(&pf->hw, 13563 pf->hw.aq.asq_last_status)); 13564 ret = -ENOENT; 13565 goto err; 13566 } 13567 } 13568 13569 /* MFP mode setup queue map and update VSI */ 13570 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 13571 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 13572 memset(&ctxt, 0, sizeof(ctxt)); 13573 ctxt.seid = pf->main_vsi_seid; 13574 ctxt.pf_num = pf->hw.pf_id; 13575 ctxt.vf_num = 0; 13576 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 13577 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 13578 if (ret) { 13579 dev_info(&pf->pdev->dev, 13580 "update vsi failed, err %s aq_err %s\n", 13581 i40e_stat_str(&pf->hw, ret), 13582 i40e_aq_str(&pf->hw, 13583 pf->hw.aq.asq_last_status)); 13584 ret = -ENOENT; 13585 goto err; 13586 } 13587 /* update the local VSI info queue map */ 13588 i40e_vsi_update_queue_map(vsi, &ctxt); 13589 vsi->info.valid_sections = 0; 13590 } else { 13591 /* Default/Main VSI is only enabled for TC0 13592 * reconfigure it to enable all TCs that are 13593 * available on the port in SFP mode. 13594 * For MFP case the iSCSI PF would use this 13595 * flow to enable LAN+iSCSI TC. 13596 */ 13597 ret = i40e_vsi_config_tc(vsi, enabled_tc); 13598 if (ret) { 13599 /* Single TC condition is not fatal, 13600 * message and continue 13601 */ 13602 dev_info(&pf->pdev->dev, 13603 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", 13604 enabled_tc, 13605 i40e_stat_str(&pf->hw, ret), 13606 i40e_aq_str(&pf->hw, 13607 pf->hw.aq.asq_last_status)); 13608 } 13609 } 13610 break; 13611 13612 case I40E_VSI_FDIR: 13613 ctxt.pf_num = hw->pf_id; 13614 ctxt.vf_num = 0; 13615 ctxt.uplink_seid = vsi->uplink_seid; 13616 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 13617 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 13618 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 13619 (i40e_is_vsi_uplink_mode_veb(vsi))) { 13620 ctxt.info.valid_sections |= 13621 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 13622 ctxt.info.switch_id = 13623 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 13624 } 13625 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 13626 break; 13627 13628 case I40E_VSI_VMDQ2: 13629 ctxt.pf_num = hw->pf_id; 13630 ctxt.vf_num = 0; 13631 ctxt.uplink_seid = vsi->uplink_seid; 13632 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 13633 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 13634 13635 /* This VSI is connected to VEB so the switch_id 13636 * should be set to zero by default. 13637 */ 13638 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 13639 ctxt.info.valid_sections |= 13640 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 13641 ctxt.info.switch_id = 13642 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 13643 } 13644 13645 /* Setup the VSI tx/rx queue map for TC0 only for now */ 13646 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 13647 break; 13648 13649 case I40E_VSI_SRIOV: 13650 ctxt.pf_num = hw->pf_id; 13651 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 13652 ctxt.uplink_seid = vsi->uplink_seid; 13653 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 13654 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 13655 13656 /* This VSI is connected to VEB so the switch_id 13657 * should be set to zero by default. 13658 */ 13659 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 13660 ctxt.info.valid_sections |= 13661 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 13662 ctxt.info.switch_id = 13663 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 13664 } 13665 13666 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 13667 ctxt.info.valid_sections |= 13668 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 13669 ctxt.info.queueing_opt_flags |= 13670 (I40E_AQ_VSI_QUE_OPT_TCP_ENA | 13671 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI); 13672 } 13673 13674 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 13675 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 13676 if (pf->vf[vsi->vf_id].spoofchk) { 13677 ctxt.info.valid_sections |= 13678 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 13679 ctxt.info.sec_flags |= 13680 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 13681 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 13682 } 13683 /* Setup the VSI tx/rx queue map for TC0 only for now */ 13684 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 13685 break; 13686 13687 case I40E_VSI_IWARP: 13688 /* send down message to iWARP */ 13689 break; 13690 13691 default: 13692 return -ENODEV; 13693 } 13694 13695 if (vsi->type != I40E_VSI_MAIN) { 13696 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 13697 if (ret) { 13698 dev_info(&vsi->back->pdev->dev, 13699 "add vsi failed, err %s aq_err %s\n", 13700 i40e_stat_str(&pf->hw, ret), 13701 i40e_aq_str(&pf->hw, 13702 pf->hw.aq.asq_last_status)); 13703 ret = -ENOENT; 13704 goto err; 13705 } 13706 vsi->info = ctxt.info; 13707 vsi->info.valid_sections = 0; 13708 vsi->seid = ctxt.seid; 13709 vsi->id = ctxt.vsi_number; 13710 } 13711 13712 vsi->active_filters = 0; 13713 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 13714 spin_lock_bh(&vsi->mac_filter_hash_lock); 13715 /* If macvlan filters already exist, force them to get loaded */ 13716 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 13717 f->state = I40E_FILTER_NEW; 13718 f_count++; 13719 } 13720 spin_unlock_bh(&vsi->mac_filter_hash_lock); 13721 13722 if (f_count) { 13723 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 13724 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state); 13725 } 13726 13727 /* Update VSI BW information */ 13728 ret = i40e_vsi_get_bw_info(vsi); 13729 if (ret) { 13730 dev_info(&pf->pdev->dev, 13731 "couldn't get vsi bw info, err %s aq_err %s\n", 13732 i40e_stat_str(&pf->hw, ret), 13733 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 13734 /* VSI is already added so not tearing that up */ 13735 ret = 0; 13736 } 13737 13738 err: 13739 return ret; 13740 } 13741 13742 /** 13743 * i40e_vsi_release - Delete a VSI and free its resources 13744 * @vsi: the VSI being removed 13745 * 13746 * Returns 0 on success or < 0 on error 13747 **/ 13748 int i40e_vsi_release(struct i40e_vsi *vsi) 13749 { 13750 struct i40e_mac_filter *f; 13751 struct hlist_node *h; 13752 struct i40e_veb *veb = NULL; 13753 struct i40e_pf *pf; 13754 u16 uplink_seid; 13755 int i, n, bkt; 13756 13757 pf = vsi->back; 13758 13759 /* release of a VEB-owner or last VSI is not allowed */ 13760 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 13761 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 13762 vsi->seid, vsi->uplink_seid); 13763 return -ENODEV; 13764 } 13765 if (vsi == pf->vsi[pf->lan_vsi] && 13766 !test_bit(__I40E_DOWN, pf->state)) { 13767 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 13768 return -ENODEV; 13769 } 13770 13771 uplink_seid = vsi->uplink_seid; 13772 if (vsi->type != I40E_VSI_SRIOV) { 13773 if (vsi->netdev_registered) { 13774 vsi->netdev_registered = false; 13775 if (vsi->netdev) { 13776 /* results in a call to i40e_close() */ 13777 unregister_netdev(vsi->netdev); 13778 } 13779 } else { 13780 i40e_vsi_close(vsi); 13781 } 13782 i40e_vsi_disable_irq(vsi); 13783 } 13784 13785 spin_lock_bh(&vsi->mac_filter_hash_lock); 13786 13787 /* clear the sync flag on all filters */ 13788 if (vsi->netdev) { 13789 __dev_uc_unsync(vsi->netdev, NULL); 13790 __dev_mc_unsync(vsi->netdev, NULL); 13791 } 13792 13793 /* make sure any remaining filters are marked for deletion */ 13794 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) 13795 __i40e_del_filter(vsi, f); 13796 13797 spin_unlock_bh(&vsi->mac_filter_hash_lock); 13798 13799 i40e_sync_vsi_filters(vsi); 13800 13801 i40e_vsi_delete(vsi); 13802 i40e_vsi_free_q_vectors(vsi); 13803 if (vsi->netdev) { 13804 free_netdev(vsi->netdev); 13805 vsi->netdev = NULL; 13806 } 13807 i40e_vsi_clear_rings(vsi); 13808 i40e_vsi_clear(vsi); 13809 13810 /* If this was the last thing on the VEB, except for the 13811 * controlling VSI, remove the VEB, which puts the controlling 13812 * VSI onto the next level down in the switch. 13813 * 13814 * Well, okay, there's one more exception here: don't remove 13815 * the orphan VEBs yet. We'll wait for an explicit remove request 13816 * from up the network stack. 13817 */ 13818 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 13819 if (pf->vsi[i] && 13820 pf->vsi[i]->uplink_seid == uplink_seid && 13821 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 13822 n++; /* count the VSIs */ 13823 } 13824 } 13825 for (i = 0; i < I40E_MAX_VEB; i++) { 13826 if (!pf->veb[i]) 13827 continue; 13828 if (pf->veb[i]->uplink_seid == uplink_seid) 13829 n++; /* count the VEBs */ 13830 if (pf->veb[i]->seid == uplink_seid) 13831 veb = pf->veb[i]; 13832 } 13833 if (n == 0 && veb && veb->uplink_seid != 0) 13834 i40e_veb_release(veb); 13835 13836 return 0; 13837 } 13838 13839 /** 13840 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 13841 * @vsi: ptr to the VSI 13842 * 13843 * This should only be called after i40e_vsi_mem_alloc() which allocates the 13844 * corresponding SW VSI structure and initializes num_queue_pairs for the 13845 * newly allocated VSI. 13846 * 13847 * Returns 0 on success or negative on failure 13848 **/ 13849 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 13850 { 13851 int ret = -ENOENT; 13852 struct i40e_pf *pf = vsi->back; 13853 13854 if (vsi->q_vectors[0]) { 13855 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 13856 vsi->seid); 13857 return -EEXIST; 13858 } 13859 13860 if (vsi->base_vector) { 13861 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 13862 vsi->seid, vsi->base_vector); 13863 return -EEXIST; 13864 } 13865 13866 ret = i40e_vsi_alloc_q_vectors(vsi); 13867 if (ret) { 13868 dev_info(&pf->pdev->dev, 13869 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 13870 vsi->num_q_vectors, vsi->seid, ret); 13871 vsi->num_q_vectors = 0; 13872 goto vector_setup_out; 13873 } 13874 13875 /* In Legacy mode, we do not have to get any other vector since we 13876 * piggyback on the misc/ICR0 for queue interrupts. 13877 */ 13878 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 13879 return ret; 13880 if (vsi->num_q_vectors) 13881 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 13882 vsi->num_q_vectors, vsi->idx); 13883 if (vsi->base_vector < 0) { 13884 dev_info(&pf->pdev->dev, 13885 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 13886 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 13887 i40e_vsi_free_q_vectors(vsi); 13888 ret = -ENOENT; 13889 goto vector_setup_out; 13890 } 13891 13892 vector_setup_out: 13893 return ret; 13894 } 13895 13896 /** 13897 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 13898 * @vsi: pointer to the vsi. 13899 * 13900 * This re-allocates a vsi's queue resources. 13901 * 13902 * Returns pointer to the successfully allocated and configured VSI sw struct 13903 * on success, otherwise returns NULL on failure. 13904 **/ 13905 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 13906 { 13907 u16 alloc_queue_pairs; 13908 struct i40e_pf *pf; 13909 u8 enabled_tc; 13910 int ret; 13911 13912 if (!vsi) 13913 return NULL; 13914 13915 pf = vsi->back; 13916 13917 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 13918 i40e_vsi_clear_rings(vsi); 13919 13920 i40e_vsi_free_arrays(vsi, false); 13921 i40e_set_num_rings_in_vsi(vsi); 13922 ret = i40e_vsi_alloc_arrays(vsi, false); 13923 if (ret) 13924 goto err_vsi; 13925 13926 alloc_queue_pairs = vsi->alloc_queue_pairs * 13927 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 13928 13929 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx); 13930 if (ret < 0) { 13931 dev_info(&pf->pdev->dev, 13932 "failed to get tracking for %d queues for VSI %d err %d\n", 13933 alloc_queue_pairs, vsi->seid, ret); 13934 goto err_vsi; 13935 } 13936 vsi->base_queue = ret; 13937 13938 /* Update the FW view of the VSI. Force a reset of TC and queue 13939 * layout configurations. 13940 */ 13941 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 13942 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 13943 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 13944 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 13945 if (vsi->type == I40E_VSI_MAIN) 13946 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr); 13947 13948 /* assign it some queues */ 13949 ret = i40e_alloc_rings(vsi); 13950 if (ret) 13951 goto err_rings; 13952 13953 /* map all of the rings to the q_vectors */ 13954 i40e_vsi_map_rings_to_vectors(vsi); 13955 return vsi; 13956 13957 err_rings: 13958 i40e_vsi_free_q_vectors(vsi); 13959 if (vsi->netdev_registered) { 13960 vsi->netdev_registered = false; 13961 unregister_netdev(vsi->netdev); 13962 free_netdev(vsi->netdev); 13963 vsi->netdev = NULL; 13964 } 13965 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 13966 err_vsi: 13967 i40e_vsi_clear(vsi); 13968 return NULL; 13969 } 13970 13971 /** 13972 * i40e_vsi_setup - Set up a VSI by a given type 13973 * @pf: board private structure 13974 * @type: VSI type 13975 * @uplink_seid: the switch element to link to 13976 * @param1: usage depends upon VSI type. For VF types, indicates VF id 13977 * 13978 * This allocates the sw VSI structure and its queue resources, then add a VSI 13979 * to the identified VEB. 13980 * 13981 * Returns pointer to the successfully allocated and configure VSI sw struct on 13982 * success, otherwise returns NULL on failure. 13983 **/ 13984 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 13985 u16 uplink_seid, u32 param1) 13986 { 13987 struct i40e_vsi *vsi = NULL; 13988 struct i40e_veb *veb = NULL; 13989 u16 alloc_queue_pairs; 13990 int ret, i; 13991 int v_idx; 13992 13993 /* The requested uplink_seid must be either 13994 * - the PF's port seid 13995 * no VEB is needed because this is the PF 13996 * or this is a Flow Director special case VSI 13997 * - seid of an existing VEB 13998 * - seid of a VSI that owns an existing VEB 13999 * - seid of a VSI that doesn't own a VEB 14000 * a new VEB is created and the VSI becomes the owner 14001 * - seid of the PF VSI, which is what creates the first VEB 14002 * this is a special case of the previous 14003 * 14004 * Find which uplink_seid we were given and create a new VEB if needed 14005 */ 14006 for (i = 0; i < I40E_MAX_VEB; i++) { 14007 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 14008 veb = pf->veb[i]; 14009 break; 14010 } 14011 } 14012 14013 if (!veb && uplink_seid != pf->mac_seid) { 14014 14015 for (i = 0; i < pf->num_alloc_vsi; i++) { 14016 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 14017 vsi = pf->vsi[i]; 14018 break; 14019 } 14020 } 14021 if (!vsi) { 14022 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 14023 uplink_seid); 14024 return NULL; 14025 } 14026 14027 if (vsi->uplink_seid == pf->mac_seid) 14028 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 14029 vsi->tc_config.enabled_tc); 14030 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 14031 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 14032 vsi->tc_config.enabled_tc); 14033 if (veb) { 14034 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 14035 dev_info(&vsi->back->pdev->dev, 14036 "New VSI creation error, uplink seid of LAN VSI expected.\n"); 14037 return NULL; 14038 } 14039 /* We come up by default in VEPA mode if SRIOV is not 14040 * already enabled, in which case we can't force VEPA 14041 * mode. 14042 */ 14043 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 14044 veb->bridge_mode = BRIDGE_MODE_VEPA; 14045 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 14046 } 14047 i40e_config_bridge_mode(veb); 14048 } 14049 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 14050 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 14051 veb = pf->veb[i]; 14052 } 14053 if (!veb) { 14054 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 14055 return NULL; 14056 } 14057 14058 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 14059 uplink_seid = veb->seid; 14060 } 14061 14062 /* get vsi sw struct */ 14063 v_idx = i40e_vsi_mem_alloc(pf, type); 14064 if (v_idx < 0) 14065 goto err_alloc; 14066 vsi = pf->vsi[v_idx]; 14067 if (!vsi) 14068 goto err_alloc; 14069 vsi->type = type; 14070 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 14071 14072 if (type == I40E_VSI_MAIN) 14073 pf->lan_vsi = v_idx; 14074 else if (type == I40E_VSI_SRIOV) 14075 vsi->vf_id = param1; 14076 /* assign it some queues */ 14077 alloc_queue_pairs = vsi->alloc_queue_pairs * 14078 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 14079 14080 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx); 14081 if (ret < 0) { 14082 dev_info(&pf->pdev->dev, 14083 "failed to get tracking for %d queues for VSI %d err=%d\n", 14084 alloc_queue_pairs, vsi->seid, ret); 14085 goto err_vsi; 14086 } 14087 vsi->base_queue = ret; 14088 14089 /* get a VSI from the hardware */ 14090 vsi->uplink_seid = uplink_seid; 14091 ret = i40e_add_vsi(vsi); 14092 if (ret) 14093 goto err_vsi; 14094 14095 switch (vsi->type) { 14096 /* setup the netdev if needed */ 14097 case I40E_VSI_MAIN: 14098 case I40E_VSI_VMDQ2: 14099 ret = i40e_config_netdev(vsi); 14100 if (ret) 14101 goto err_netdev; 14102 ret = register_netdev(vsi->netdev); 14103 if (ret) 14104 goto err_netdev; 14105 vsi->netdev_registered = true; 14106 netif_carrier_off(vsi->netdev); 14107 #ifdef CONFIG_I40E_DCB 14108 /* Setup DCB netlink interface */ 14109 i40e_dcbnl_setup(vsi); 14110 #endif /* CONFIG_I40E_DCB */ 14111 fallthrough; 14112 case I40E_VSI_FDIR: 14113 /* set up vectors and rings if needed */ 14114 ret = i40e_vsi_setup_vectors(vsi); 14115 if (ret) 14116 goto err_msix; 14117 14118 ret = i40e_alloc_rings(vsi); 14119 if (ret) 14120 goto err_rings; 14121 14122 /* map all of the rings to the q_vectors */ 14123 i40e_vsi_map_rings_to_vectors(vsi); 14124 14125 i40e_vsi_reset_stats(vsi); 14126 break; 14127 default: 14128 /* no netdev or rings for the other VSI types */ 14129 break; 14130 } 14131 14132 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) && 14133 (vsi->type == I40E_VSI_VMDQ2)) { 14134 ret = i40e_vsi_config_rss(vsi); 14135 } 14136 return vsi; 14137 14138 err_rings: 14139 i40e_vsi_free_q_vectors(vsi); 14140 err_msix: 14141 if (vsi->netdev_registered) { 14142 vsi->netdev_registered = false; 14143 unregister_netdev(vsi->netdev); 14144 free_netdev(vsi->netdev); 14145 vsi->netdev = NULL; 14146 } 14147 err_netdev: 14148 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 14149 err_vsi: 14150 i40e_vsi_clear(vsi); 14151 err_alloc: 14152 return NULL; 14153 } 14154 14155 /** 14156 * i40e_veb_get_bw_info - Query VEB BW information 14157 * @veb: the veb to query 14158 * 14159 * Query the Tx scheduler BW configuration data for given VEB 14160 **/ 14161 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 14162 { 14163 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 14164 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 14165 struct i40e_pf *pf = veb->pf; 14166 struct i40e_hw *hw = &pf->hw; 14167 u32 tc_bw_max; 14168 int ret = 0; 14169 int i; 14170 14171 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 14172 &bw_data, NULL); 14173 if (ret) { 14174 dev_info(&pf->pdev->dev, 14175 "query veb bw config failed, err %s aq_err %s\n", 14176 i40e_stat_str(&pf->hw, ret), 14177 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 14178 goto out; 14179 } 14180 14181 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 14182 &ets_data, NULL); 14183 if (ret) { 14184 dev_info(&pf->pdev->dev, 14185 "query veb bw ets config failed, err %s aq_err %s\n", 14186 i40e_stat_str(&pf->hw, ret), 14187 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 14188 goto out; 14189 } 14190 14191 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 14192 veb->bw_max_quanta = ets_data.tc_bw_max; 14193 veb->is_abs_credits = bw_data.absolute_credits_enable; 14194 veb->enabled_tc = ets_data.tc_valid_bits; 14195 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 14196 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 14197 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 14198 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 14199 veb->bw_tc_limit_credits[i] = 14200 le16_to_cpu(bw_data.tc_bw_limits[i]); 14201 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 14202 } 14203 14204 out: 14205 return ret; 14206 } 14207 14208 /** 14209 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 14210 * @pf: board private structure 14211 * 14212 * On error: returns error code (negative) 14213 * On success: returns vsi index in PF (positive) 14214 **/ 14215 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 14216 { 14217 int ret = -ENOENT; 14218 struct i40e_veb *veb; 14219 int i; 14220 14221 /* Need to protect the allocation of switch elements at the PF level */ 14222 mutex_lock(&pf->switch_mutex); 14223 14224 /* VEB list may be fragmented if VEB creation/destruction has 14225 * been happening. We can afford to do a quick scan to look 14226 * for any free slots in the list. 14227 * 14228 * find next empty veb slot, looping back around if necessary 14229 */ 14230 i = 0; 14231 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 14232 i++; 14233 if (i >= I40E_MAX_VEB) { 14234 ret = -ENOMEM; 14235 goto err_alloc_veb; /* out of VEB slots! */ 14236 } 14237 14238 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 14239 if (!veb) { 14240 ret = -ENOMEM; 14241 goto err_alloc_veb; 14242 } 14243 veb->pf = pf; 14244 veb->idx = i; 14245 veb->enabled_tc = 1; 14246 14247 pf->veb[i] = veb; 14248 ret = i; 14249 err_alloc_veb: 14250 mutex_unlock(&pf->switch_mutex); 14251 return ret; 14252 } 14253 14254 /** 14255 * i40e_switch_branch_release - Delete a branch of the switch tree 14256 * @branch: where to start deleting 14257 * 14258 * This uses recursion to find the tips of the branch to be 14259 * removed, deleting until we get back to and can delete this VEB. 14260 **/ 14261 static void i40e_switch_branch_release(struct i40e_veb *branch) 14262 { 14263 struct i40e_pf *pf = branch->pf; 14264 u16 branch_seid = branch->seid; 14265 u16 veb_idx = branch->idx; 14266 int i; 14267 14268 /* release any VEBs on this VEB - RECURSION */ 14269 for (i = 0; i < I40E_MAX_VEB; i++) { 14270 if (!pf->veb[i]) 14271 continue; 14272 if (pf->veb[i]->uplink_seid == branch->seid) 14273 i40e_switch_branch_release(pf->veb[i]); 14274 } 14275 14276 /* Release the VSIs on this VEB, but not the owner VSI. 14277 * 14278 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 14279 * the VEB itself, so don't use (*branch) after this loop. 14280 */ 14281 for (i = 0; i < pf->num_alloc_vsi; i++) { 14282 if (!pf->vsi[i]) 14283 continue; 14284 if (pf->vsi[i]->uplink_seid == branch_seid && 14285 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 14286 i40e_vsi_release(pf->vsi[i]); 14287 } 14288 } 14289 14290 /* There's one corner case where the VEB might not have been 14291 * removed, so double check it here and remove it if needed. 14292 * This case happens if the veb was created from the debugfs 14293 * commands and no VSIs were added to it. 14294 */ 14295 if (pf->veb[veb_idx]) 14296 i40e_veb_release(pf->veb[veb_idx]); 14297 } 14298 14299 /** 14300 * i40e_veb_clear - remove veb struct 14301 * @veb: the veb to remove 14302 **/ 14303 static void i40e_veb_clear(struct i40e_veb *veb) 14304 { 14305 if (!veb) 14306 return; 14307 14308 if (veb->pf) { 14309 struct i40e_pf *pf = veb->pf; 14310 14311 mutex_lock(&pf->switch_mutex); 14312 if (pf->veb[veb->idx] == veb) 14313 pf->veb[veb->idx] = NULL; 14314 mutex_unlock(&pf->switch_mutex); 14315 } 14316 14317 kfree(veb); 14318 } 14319 14320 /** 14321 * i40e_veb_release - Delete a VEB and free its resources 14322 * @veb: the VEB being removed 14323 **/ 14324 void i40e_veb_release(struct i40e_veb *veb) 14325 { 14326 struct i40e_vsi *vsi = NULL; 14327 struct i40e_pf *pf; 14328 int i, n = 0; 14329 14330 pf = veb->pf; 14331 14332 /* find the remaining VSI and check for extras */ 14333 for (i = 0; i < pf->num_alloc_vsi; i++) { 14334 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 14335 n++; 14336 vsi = pf->vsi[i]; 14337 } 14338 } 14339 if (n != 1) { 14340 dev_info(&pf->pdev->dev, 14341 "can't remove VEB %d with %d VSIs left\n", 14342 veb->seid, n); 14343 return; 14344 } 14345 14346 /* move the remaining VSI to uplink veb */ 14347 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 14348 if (veb->uplink_seid) { 14349 vsi->uplink_seid = veb->uplink_seid; 14350 if (veb->uplink_seid == pf->mac_seid) 14351 vsi->veb_idx = I40E_NO_VEB; 14352 else 14353 vsi->veb_idx = veb->veb_idx; 14354 } else { 14355 /* floating VEB */ 14356 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 14357 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 14358 } 14359 14360 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 14361 i40e_veb_clear(veb); 14362 } 14363 14364 /** 14365 * i40e_add_veb - create the VEB in the switch 14366 * @veb: the VEB to be instantiated 14367 * @vsi: the controlling VSI 14368 **/ 14369 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 14370 { 14371 struct i40e_pf *pf = veb->pf; 14372 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED); 14373 int ret; 14374 14375 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, 14376 veb->enabled_tc, false, 14377 &veb->seid, enable_stats, NULL); 14378 14379 /* get a VEB from the hardware */ 14380 if (ret) { 14381 dev_info(&pf->pdev->dev, 14382 "couldn't add VEB, err %s aq_err %s\n", 14383 i40e_stat_str(&pf->hw, ret), 14384 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 14385 return -EPERM; 14386 } 14387 14388 /* get statistics counter */ 14389 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, 14390 &veb->stats_idx, NULL, NULL, NULL); 14391 if (ret) { 14392 dev_info(&pf->pdev->dev, 14393 "couldn't get VEB statistics idx, err %s aq_err %s\n", 14394 i40e_stat_str(&pf->hw, ret), 14395 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 14396 return -EPERM; 14397 } 14398 ret = i40e_veb_get_bw_info(veb); 14399 if (ret) { 14400 dev_info(&pf->pdev->dev, 14401 "couldn't get VEB bw info, err %s aq_err %s\n", 14402 i40e_stat_str(&pf->hw, ret), 14403 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 14404 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 14405 return -ENOENT; 14406 } 14407 14408 vsi->uplink_seid = veb->seid; 14409 vsi->veb_idx = veb->idx; 14410 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 14411 14412 return 0; 14413 } 14414 14415 /** 14416 * i40e_veb_setup - Set up a VEB 14417 * @pf: board private structure 14418 * @flags: VEB setup flags 14419 * @uplink_seid: the switch element to link to 14420 * @vsi_seid: the initial VSI seid 14421 * @enabled_tc: Enabled TC bit-map 14422 * 14423 * This allocates the sw VEB structure and links it into the switch 14424 * It is possible and legal for this to be a duplicate of an already 14425 * existing VEB. It is also possible for both uplink and vsi seids 14426 * to be zero, in order to create a floating VEB. 14427 * 14428 * Returns pointer to the successfully allocated VEB sw struct on 14429 * success, otherwise returns NULL on failure. 14430 **/ 14431 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 14432 u16 uplink_seid, u16 vsi_seid, 14433 u8 enabled_tc) 14434 { 14435 struct i40e_veb *veb, *uplink_veb = NULL; 14436 int vsi_idx, veb_idx; 14437 int ret; 14438 14439 /* if one seid is 0, the other must be 0 to create a floating relay */ 14440 if ((uplink_seid == 0 || vsi_seid == 0) && 14441 (uplink_seid + vsi_seid != 0)) { 14442 dev_info(&pf->pdev->dev, 14443 "one, not both seid's are 0: uplink=%d vsi=%d\n", 14444 uplink_seid, vsi_seid); 14445 return NULL; 14446 } 14447 14448 /* make sure there is such a vsi and uplink */ 14449 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 14450 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 14451 break; 14452 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) { 14453 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 14454 vsi_seid); 14455 return NULL; 14456 } 14457 14458 if (uplink_seid && uplink_seid != pf->mac_seid) { 14459 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 14460 if (pf->veb[veb_idx] && 14461 pf->veb[veb_idx]->seid == uplink_seid) { 14462 uplink_veb = pf->veb[veb_idx]; 14463 break; 14464 } 14465 } 14466 if (!uplink_veb) { 14467 dev_info(&pf->pdev->dev, 14468 "uplink seid %d not found\n", uplink_seid); 14469 return NULL; 14470 } 14471 } 14472 14473 /* get veb sw struct */ 14474 veb_idx = i40e_veb_mem_alloc(pf); 14475 if (veb_idx < 0) 14476 goto err_alloc; 14477 veb = pf->veb[veb_idx]; 14478 veb->flags = flags; 14479 veb->uplink_seid = uplink_seid; 14480 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 14481 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 14482 14483 /* create the VEB in the switch */ 14484 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 14485 if (ret) 14486 goto err_veb; 14487 if (vsi_idx == pf->lan_vsi) 14488 pf->lan_veb = veb->idx; 14489 14490 return veb; 14491 14492 err_veb: 14493 i40e_veb_clear(veb); 14494 err_alloc: 14495 return NULL; 14496 } 14497 14498 /** 14499 * i40e_setup_pf_switch_element - set PF vars based on switch type 14500 * @pf: board private structure 14501 * @ele: element we are building info from 14502 * @num_reported: total number of elements 14503 * @printconfig: should we print the contents 14504 * 14505 * helper function to assist in extracting a few useful SEID values. 14506 **/ 14507 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 14508 struct i40e_aqc_switch_config_element_resp *ele, 14509 u16 num_reported, bool printconfig) 14510 { 14511 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 14512 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 14513 u8 element_type = ele->element_type; 14514 u16 seid = le16_to_cpu(ele->seid); 14515 14516 if (printconfig) 14517 dev_info(&pf->pdev->dev, 14518 "type=%d seid=%d uplink=%d downlink=%d\n", 14519 element_type, seid, uplink_seid, downlink_seid); 14520 14521 switch (element_type) { 14522 case I40E_SWITCH_ELEMENT_TYPE_MAC: 14523 pf->mac_seid = seid; 14524 break; 14525 case I40E_SWITCH_ELEMENT_TYPE_VEB: 14526 /* Main VEB? */ 14527 if (uplink_seid != pf->mac_seid) 14528 break; 14529 if (pf->lan_veb >= I40E_MAX_VEB) { 14530 int v; 14531 14532 /* find existing or else empty VEB */ 14533 for (v = 0; v < I40E_MAX_VEB; v++) { 14534 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 14535 pf->lan_veb = v; 14536 break; 14537 } 14538 } 14539 if (pf->lan_veb >= I40E_MAX_VEB) { 14540 v = i40e_veb_mem_alloc(pf); 14541 if (v < 0) 14542 break; 14543 pf->lan_veb = v; 14544 } 14545 } 14546 if (pf->lan_veb >= I40E_MAX_VEB) 14547 break; 14548 14549 pf->veb[pf->lan_veb]->seid = seid; 14550 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 14551 pf->veb[pf->lan_veb]->pf = pf; 14552 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 14553 break; 14554 case I40E_SWITCH_ELEMENT_TYPE_VSI: 14555 if (num_reported != 1) 14556 break; 14557 /* This is immediately after a reset so we can assume this is 14558 * the PF's VSI 14559 */ 14560 pf->mac_seid = uplink_seid; 14561 pf->pf_seid = downlink_seid; 14562 pf->main_vsi_seid = seid; 14563 if (printconfig) 14564 dev_info(&pf->pdev->dev, 14565 "pf_seid=%d main_vsi_seid=%d\n", 14566 pf->pf_seid, pf->main_vsi_seid); 14567 break; 14568 case I40E_SWITCH_ELEMENT_TYPE_PF: 14569 case I40E_SWITCH_ELEMENT_TYPE_VF: 14570 case I40E_SWITCH_ELEMENT_TYPE_EMP: 14571 case I40E_SWITCH_ELEMENT_TYPE_BMC: 14572 case I40E_SWITCH_ELEMENT_TYPE_PE: 14573 case I40E_SWITCH_ELEMENT_TYPE_PA: 14574 /* ignore these for now */ 14575 break; 14576 default: 14577 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 14578 element_type, seid); 14579 break; 14580 } 14581 } 14582 14583 /** 14584 * i40e_fetch_switch_configuration - Get switch config from firmware 14585 * @pf: board private structure 14586 * @printconfig: should we print the contents 14587 * 14588 * Get the current switch configuration from the device and 14589 * extract a few useful SEID values. 14590 **/ 14591 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 14592 { 14593 struct i40e_aqc_get_switch_config_resp *sw_config; 14594 u16 next_seid = 0; 14595 int ret = 0; 14596 u8 *aq_buf; 14597 int i; 14598 14599 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 14600 if (!aq_buf) 14601 return -ENOMEM; 14602 14603 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 14604 do { 14605 u16 num_reported, num_total; 14606 14607 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 14608 I40E_AQ_LARGE_BUF, 14609 &next_seid, NULL); 14610 if (ret) { 14611 dev_info(&pf->pdev->dev, 14612 "get switch config failed err %s aq_err %s\n", 14613 i40e_stat_str(&pf->hw, ret), 14614 i40e_aq_str(&pf->hw, 14615 pf->hw.aq.asq_last_status)); 14616 kfree(aq_buf); 14617 return -ENOENT; 14618 } 14619 14620 num_reported = le16_to_cpu(sw_config->header.num_reported); 14621 num_total = le16_to_cpu(sw_config->header.num_total); 14622 14623 if (printconfig) 14624 dev_info(&pf->pdev->dev, 14625 "header: %d reported %d total\n", 14626 num_reported, num_total); 14627 14628 for (i = 0; i < num_reported; i++) { 14629 struct i40e_aqc_switch_config_element_resp *ele = 14630 &sw_config->element[i]; 14631 14632 i40e_setup_pf_switch_element(pf, ele, num_reported, 14633 printconfig); 14634 } 14635 } while (next_seid != 0); 14636 14637 kfree(aq_buf); 14638 return ret; 14639 } 14640 14641 /** 14642 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 14643 * @pf: board private structure 14644 * @reinit: if the Main VSI needs to re-initialized. 14645 * @lock_acquired: indicates whether or not the lock has been acquired 14646 * 14647 * Returns 0 on success, negative value on failure 14648 **/ 14649 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired) 14650 { 14651 u16 flags = 0; 14652 int ret; 14653 14654 /* find out what's out there already */ 14655 ret = i40e_fetch_switch_configuration(pf, false); 14656 if (ret) { 14657 dev_info(&pf->pdev->dev, 14658 "couldn't fetch switch config, err %s aq_err %s\n", 14659 i40e_stat_str(&pf->hw, ret), 14660 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 14661 return ret; 14662 } 14663 i40e_pf_reset_stats(pf); 14664 14665 /* set the switch config bit for the whole device to 14666 * support limited promisc or true promisc 14667 * when user requests promisc. The default is limited 14668 * promisc. 14669 */ 14670 14671 if ((pf->hw.pf_id == 0) && 14672 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) { 14673 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 14674 pf->last_sw_conf_flags = flags; 14675 } 14676 14677 if (pf->hw.pf_id == 0) { 14678 u16 valid_flags; 14679 14680 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 14681 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0, 14682 NULL); 14683 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 14684 dev_info(&pf->pdev->dev, 14685 "couldn't set switch config bits, err %s aq_err %s\n", 14686 i40e_stat_str(&pf->hw, ret), 14687 i40e_aq_str(&pf->hw, 14688 pf->hw.aq.asq_last_status)); 14689 /* not a fatal problem, just keep going */ 14690 } 14691 pf->last_sw_conf_valid_flags = valid_flags; 14692 } 14693 14694 /* first time setup */ 14695 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 14696 struct i40e_vsi *vsi = NULL; 14697 u16 uplink_seid; 14698 14699 /* Set up the PF VSI associated with the PF's main VSI 14700 * that is already in the HW switch 14701 */ 14702 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb]) 14703 uplink_seid = pf->veb[pf->lan_veb]->seid; 14704 else 14705 uplink_seid = pf->mac_seid; 14706 if (pf->lan_vsi == I40E_NO_VSI) 14707 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 14708 else if (reinit) 14709 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 14710 if (!vsi) { 14711 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 14712 i40e_cloud_filter_exit(pf); 14713 i40e_fdir_teardown(pf); 14714 return -EAGAIN; 14715 } 14716 } else { 14717 /* force a reset of TC and queue layout configurations */ 14718 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 14719 14720 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 14721 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 14722 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 14723 } 14724 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 14725 14726 i40e_fdir_sb_setup(pf); 14727 14728 /* Setup static PF queue filter control settings */ 14729 ret = i40e_setup_pf_filter_control(pf); 14730 if (ret) { 14731 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 14732 ret); 14733 /* Failure here should not stop continuing other steps */ 14734 } 14735 14736 /* enable RSS in the HW, even for only one queue, as the stack can use 14737 * the hash 14738 */ 14739 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 14740 i40e_pf_config_rss(pf); 14741 14742 /* fill in link information and enable LSE reporting */ 14743 i40e_link_event(pf); 14744 14745 /* Initialize user-specific link properties */ 14746 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 14747 I40E_AQ_AN_COMPLETED) ? true : false); 14748 14749 i40e_ptp_init(pf); 14750 14751 if (!lock_acquired) 14752 rtnl_lock(); 14753 14754 /* repopulate tunnel port filters */ 14755 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev); 14756 14757 if (!lock_acquired) 14758 rtnl_unlock(); 14759 14760 return ret; 14761 } 14762 14763 /** 14764 * i40e_determine_queue_usage - Work out queue distribution 14765 * @pf: board private structure 14766 **/ 14767 static void i40e_determine_queue_usage(struct i40e_pf *pf) 14768 { 14769 int queues_left; 14770 int q_max; 14771 14772 pf->num_lan_qps = 0; 14773 14774 /* Find the max queues to be put into basic use. We'll always be 14775 * using TC0, whether or not DCB is running, and TC0 will get the 14776 * big RSS set. 14777 */ 14778 queues_left = pf->hw.func_caps.num_tx_qp; 14779 14780 if ((queues_left == 1) || 14781 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 14782 /* one qp for PF, no queues for anything else */ 14783 queues_left = 0; 14784 pf->alloc_rss_size = pf->num_lan_qps = 1; 14785 14786 /* make sure all the fancies are disabled */ 14787 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 14788 I40E_FLAG_IWARP_ENABLED | 14789 I40E_FLAG_FD_SB_ENABLED | 14790 I40E_FLAG_FD_ATR_ENABLED | 14791 I40E_FLAG_DCB_CAPABLE | 14792 I40E_FLAG_DCB_ENABLED | 14793 I40E_FLAG_SRIOV_ENABLED | 14794 I40E_FLAG_VMDQ_ENABLED); 14795 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 14796 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 14797 I40E_FLAG_FD_SB_ENABLED | 14798 I40E_FLAG_FD_ATR_ENABLED | 14799 I40E_FLAG_DCB_CAPABLE))) { 14800 /* one qp for PF */ 14801 pf->alloc_rss_size = pf->num_lan_qps = 1; 14802 queues_left -= pf->num_lan_qps; 14803 14804 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 14805 I40E_FLAG_IWARP_ENABLED | 14806 I40E_FLAG_FD_SB_ENABLED | 14807 I40E_FLAG_FD_ATR_ENABLED | 14808 I40E_FLAG_DCB_ENABLED | 14809 I40E_FLAG_VMDQ_ENABLED); 14810 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 14811 } else { 14812 /* Not enough queues for all TCs */ 14813 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 14814 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 14815 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | 14816 I40E_FLAG_DCB_ENABLED); 14817 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 14818 } 14819 14820 /* limit lan qps to the smaller of qps, cpus or msix */ 14821 q_max = max_t(int, pf->rss_size_max, num_online_cpus()); 14822 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp); 14823 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors); 14824 pf->num_lan_qps = q_max; 14825 14826 queues_left -= pf->num_lan_qps; 14827 } 14828 14829 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 14830 if (queues_left > 1) { 14831 queues_left -= 1; /* save 1 queue for FD */ 14832 } else { 14833 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 14834 pf->flags |= I40E_FLAG_FD_SB_INACTIVE; 14835 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 14836 } 14837 } 14838 14839 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 14840 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 14841 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 14842 (queues_left / pf->num_vf_qps)); 14843 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 14844 } 14845 14846 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 14847 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 14848 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 14849 (queues_left / pf->num_vmdq_qps)); 14850 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 14851 } 14852 14853 pf->queues_left = queues_left; 14854 dev_dbg(&pf->pdev->dev, 14855 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n", 14856 pf->hw.func_caps.num_tx_qp, 14857 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED), 14858 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs, 14859 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps, 14860 queues_left); 14861 } 14862 14863 /** 14864 * i40e_setup_pf_filter_control - Setup PF static filter control 14865 * @pf: PF to be setup 14866 * 14867 * i40e_setup_pf_filter_control sets up a PF's initial filter control 14868 * settings. If PE/FCoE are enabled then it will also set the per PF 14869 * based filter sizes required for them. It also enables Flow director, 14870 * ethertype and macvlan type filter settings for the pf. 14871 * 14872 * Returns 0 on success, negative on failure 14873 **/ 14874 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 14875 { 14876 struct i40e_filter_control_settings *settings = &pf->filter_settings; 14877 14878 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 14879 14880 /* Flow Director is enabled */ 14881 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 14882 settings->enable_fdir = true; 14883 14884 /* Ethtype and MACVLAN filters enabled for PF */ 14885 settings->enable_ethtype = true; 14886 settings->enable_macvlan = true; 14887 14888 if (i40e_set_filter_control(&pf->hw, settings)) 14889 return -ENOENT; 14890 14891 return 0; 14892 } 14893 14894 #define INFO_STRING_LEN 255 14895 #define REMAIN(__x) (INFO_STRING_LEN - (__x)) 14896 static void i40e_print_features(struct i40e_pf *pf) 14897 { 14898 struct i40e_hw *hw = &pf->hw; 14899 char *buf; 14900 int i; 14901 14902 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL); 14903 if (!buf) 14904 return; 14905 14906 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id); 14907 #ifdef CONFIG_PCI_IOV 14908 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs); 14909 #endif 14910 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d", 14911 pf->hw.func_caps.num_vsis, 14912 pf->vsi[pf->lan_vsi]->num_queue_pairs); 14913 if (pf->flags & I40E_FLAG_RSS_ENABLED) 14914 i += scnprintf(&buf[i], REMAIN(i), " RSS"); 14915 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 14916 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR"); 14917 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 14918 i += scnprintf(&buf[i], REMAIN(i), " FD_SB"); 14919 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE"); 14920 } 14921 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 14922 i += scnprintf(&buf[i], REMAIN(i), " DCB"); 14923 i += scnprintf(&buf[i], REMAIN(i), " VxLAN"); 14924 i += scnprintf(&buf[i], REMAIN(i), " Geneve"); 14925 if (pf->flags & I40E_FLAG_PTP) 14926 i += scnprintf(&buf[i], REMAIN(i), " PTP"); 14927 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 14928 i += scnprintf(&buf[i], REMAIN(i), " VEB"); 14929 else 14930 i += scnprintf(&buf[i], REMAIN(i), " VEPA"); 14931 14932 dev_info(&pf->pdev->dev, "%s\n", buf); 14933 kfree(buf); 14934 WARN_ON(i > INFO_STRING_LEN); 14935 } 14936 14937 /** 14938 * i40e_get_platform_mac_addr - get platform-specific MAC address 14939 * @pdev: PCI device information struct 14940 * @pf: board private structure 14941 * 14942 * Look up the MAC address for the device. First we'll try 14943 * eth_platform_get_mac_address, which will check Open Firmware, or arch 14944 * specific fallback. Otherwise, we'll default to the stored value in 14945 * firmware. 14946 **/ 14947 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf) 14948 { 14949 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr)) 14950 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr); 14951 } 14952 14953 /** 14954 * i40e_set_fec_in_flags - helper function for setting FEC options in flags 14955 * @fec_cfg: FEC option to set in flags 14956 * @flags: ptr to flags in which we set FEC option 14957 **/ 14958 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags) 14959 { 14960 if (fec_cfg & I40E_AQ_SET_FEC_AUTO) 14961 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC; 14962 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) || 14963 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) { 14964 *flags |= I40E_FLAG_RS_FEC; 14965 *flags &= ~I40E_FLAG_BASE_R_FEC; 14966 } 14967 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) || 14968 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) { 14969 *flags |= I40E_FLAG_BASE_R_FEC; 14970 *flags &= ~I40E_FLAG_RS_FEC; 14971 } 14972 if (fec_cfg == 0) 14973 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC); 14974 } 14975 14976 /** 14977 * i40e_check_recovery_mode - check if we are running transition firmware 14978 * @pf: board private structure 14979 * 14980 * Check registers indicating the firmware runs in recovery mode. Sets the 14981 * appropriate driver state. 14982 * 14983 * Returns true if the recovery mode was detected, false otherwise 14984 **/ 14985 static bool i40e_check_recovery_mode(struct i40e_pf *pf) 14986 { 14987 u32 val = rd32(&pf->hw, I40E_GL_FWSTS); 14988 14989 if (val & I40E_GL_FWSTS_FWS1B_MASK) { 14990 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n"); 14991 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n"); 14992 set_bit(__I40E_RECOVERY_MODE, pf->state); 14993 14994 return true; 14995 } 14996 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) 14997 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n"); 14998 14999 return false; 15000 } 15001 15002 /** 15003 * i40e_pf_loop_reset - perform reset in a loop. 15004 * @pf: board private structure 15005 * 15006 * This function is useful when a NIC is about to enter recovery mode. 15007 * When a NIC's internal data structures are corrupted the NIC's 15008 * firmware is going to enter recovery mode. 15009 * Right after a POR it takes about 7 minutes for firmware to enter 15010 * recovery mode. Until that time a NIC is in some kind of intermediate 15011 * state. After that time period the NIC almost surely enters 15012 * recovery mode. The only way for a driver to detect intermediate 15013 * state is to issue a series of pf-resets and check a return value. 15014 * If a PF reset returns success then the firmware could be in recovery 15015 * mode so the caller of this code needs to check for recovery mode 15016 * if this function returns success. There is a little chance that 15017 * firmware will hang in intermediate state forever. 15018 * Since waiting 7 minutes is quite a lot of time this function waits 15019 * 10 seconds and then gives up by returning an error. 15020 * 15021 * Return 0 on success, negative on failure. 15022 **/ 15023 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf) 15024 { 15025 /* wait max 10 seconds for PF reset to succeed */ 15026 const unsigned long time_end = jiffies + 10 * HZ; 15027 15028 struct i40e_hw *hw = &pf->hw; 15029 i40e_status ret; 15030 15031 ret = i40e_pf_reset(hw); 15032 while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) { 15033 usleep_range(10000, 20000); 15034 ret = i40e_pf_reset(hw); 15035 } 15036 15037 if (ret == I40E_SUCCESS) 15038 pf->pfr_count++; 15039 else 15040 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret); 15041 15042 return ret; 15043 } 15044 15045 /** 15046 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset 15047 * @pf: board private structure 15048 * 15049 * Check FW registers to determine if FW issued unexpected EMP Reset. 15050 * Every time when unexpected EMP Reset occurs the FW increments 15051 * a counter of unexpected EMP Resets. When the counter reaches 10 15052 * the FW should enter the Recovery mode 15053 * 15054 * Returns true if FW issued unexpected EMP Reset 15055 **/ 15056 static bool i40e_check_fw_empr(struct i40e_pf *pf) 15057 { 15058 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) & 15059 I40E_GL_FWSTS_FWS1B_MASK; 15060 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) && 15061 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10); 15062 } 15063 15064 /** 15065 * i40e_handle_resets - handle EMP resets and PF resets 15066 * @pf: board private structure 15067 * 15068 * Handle both EMP resets and PF resets and conclude whether there are 15069 * any issues regarding these resets. If there are any issues then 15070 * generate log entry. 15071 * 15072 * Return 0 if NIC is healthy or negative value when there are issues 15073 * with resets 15074 **/ 15075 static i40e_status i40e_handle_resets(struct i40e_pf *pf) 15076 { 15077 const i40e_status pfr = i40e_pf_loop_reset(pf); 15078 const bool is_empr = i40e_check_fw_empr(pf); 15079 15080 if (is_empr || pfr != I40E_SUCCESS) 15081 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n"); 15082 15083 return is_empr ? I40E_ERR_RESET_FAILED : pfr; 15084 } 15085 15086 /** 15087 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode 15088 * @pf: board private structure 15089 * @hw: ptr to the hardware info 15090 * 15091 * This function does a minimal setup of all subsystems needed for running 15092 * recovery mode. 15093 * 15094 * Returns 0 on success, negative on failure 15095 **/ 15096 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw) 15097 { 15098 struct i40e_vsi *vsi; 15099 int err; 15100 int v_idx; 15101 15102 pci_save_state(pf->pdev); 15103 15104 /* set up periodic task facility */ 15105 timer_setup(&pf->service_timer, i40e_service_timer, 0); 15106 pf->service_timer_period = HZ; 15107 15108 INIT_WORK(&pf->service_task, i40e_service_task); 15109 clear_bit(__I40E_SERVICE_SCHED, pf->state); 15110 15111 err = i40e_init_interrupt_scheme(pf); 15112 if (err) 15113 goto err_switch_setup; 15114 15115 /* The number of VSIs reported by the FW is the minimum guaranteed 15116 * to us; HW supports far more and we share the remaining pool with 15117 * the other PFs. We allocate space for more than the guarantee with 15118 * the understanding that we might not get them all later. 15119 */ 15120 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 15121 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 15122 else 15123 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 15124 15125 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */ 15126 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), 15127 GFP_KERNEL); 15128 if (!pf->vsi) { 15129 err = -ENOMEM; 15130 goto err_switch_setup; 15131 } 15132 15133 /* We allocate one VSI which is needed as absolute minimum 15134 * in order to register the netdev 15135 */ 15136 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN); 15137 if (v_idx < 0) { 15138 err = v_idx; 15139 goto err_switch_setup; 15140 } 15141 pf->lan_vsi = v_idx; 15142 vsi = pf->vsi[v_idx]; 15143 if (!vsi) { 15144 err = -EFAULT; 15145 goto err_switch_setup; 15146 } 15147 vsi->alloc_queue_pairs = 1; 15148 err = i40e_config_netdev(vsi); 15149 if (err) 15150 goto err_switch_setup; 15151 err = register_netdev(vsi->netdev); 15152 if (err) 15153 goto err_switch_setup; 15154 vsi->netdev_registered = true; 15155 i40e_dbg_pf_init(pf); 15156 15157 err = i40e_setup_misc_vector_for_recovery_mode(pf); 15158 if (err) 15159 goto err_switch_setup; 15160 15161 /* tell the firmware that we're starting */ 15162 i40e_send_version(pf); 15163 15164 /* since everything's happy, start the service_task timer */ 15165 mod_timer(&pf->service_timer, 15166 round_jiffies(jiffies + pf->service_timer_period)); 15167 15168 return 0; 15169 15170 err_switch_setup: 15171 i40e_reset_interrupt_capability(pf); 15172 del_timer_sync(&pf->service_timer); 15173 i40e_shutdown_adminq(hw); 15174 iounmap(hw->hw_addr); 15175 pci_disable_pcie_error_reporting(pf->pdev); 15176 pci_release_mem_regions(pf->pdev); 15177 pci_disable_device(pf->pdev); 15178 kfree(pf); 15179 15180 return err; 15181 } 15182 15183 /** 15184 * i40e_probe - Device initialization routine 15185 * @pdev: PCI device information struct 15186 * @ent: entry in i40e_pci_tbl 15187 * 15188 * i40e_probe initializes a PF identified by a pci_dev structure. 15189 * The OS initialization, configuring of the PF private structure, 15190 * and a hardware reset occur. 15191 * 15192 * Returns 0 on success, negative on failure 15193 **/ 15194 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 15195 { 15196 struct i40e_aq_get_phy_abilities_resp abilities; 15197 #ifdef CONFIG_I40E_DCB 15198 enum i40e_get_fw_lldp_status_resp lldp_status; 15199 i40e_status status; 15200 #endif /* CONFIG_I40E_DCB */ 15201 struct i40e_pf *pf; 15202 struct i40e_hw *hw; 15203 static u16 pfs_found; 15204 u16 wol_nvm_bits; 15205 u16 link_status; 15206 int err; 15207 u32 val; 15208 u32 i; 15209 15210 err = pci_enable_device_mem(pdev); 15211 if (err) 15212 return err; 15213 15214 /* set up for high or low dma */ 15215 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 15216 if (err) { 15217 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 15218 if (err) { 15219 dev_err(&pdev->dev, 15220 "DMA configuration failed: 0x%x\n", err); 15221 goto err_dma; 15222 } 15223 } 15224 15225 /* set up pci connections */ 15226 err = pci_request_mem_regions(pdev, i40e_driver_name); 15227 if (err) { 15228 dev_info(&pdev->dev, 15229 "pci_request_selected_regions failed %d\n", err); 15230 goto err_pci_reg; 15231 } 15232 15233 pci_enable_pcie_error_reporting(pdev); 15234 pci_set_master(pdev); 15235 15236 /* Now that we have a PCI connection, we need to do the 15237 * low level device setup. This is primarily setting up 15238 * the Admin Queue structures and then querying for the 15239 * device's current profile information. 15240 */ 15241 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 15242 if (!pf) { 15243 err = -ENOMEM; 15244 goto err_pf_alloc; 15245 } 15246 pf->next_vsi = 0; 15247 pf->pdev = pdev; 15248 set_bit(__I40E_DOWN, pf->state); 15249 15250 hw = &pf->hw; 15251 hw->back = pf; 15252 15253 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), 15254 I40E_MAX_CSR_SPACE); 15255 /* We believe that the highest register to read is 15256 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size 15257 * is not less than that before mapping to prevent a 15258 * kernel panic. 15259 */ 15260 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) { 15261 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n", 15262 pf->ioremap_len); 15263 err = -ENOMEM; 15264 goto err_ioremap; 15265 } 15266 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len); 15267 if (!hw->hw_addr) { 15268 err = -EIO; 15269 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 15270 (unsigned int)pci_resource_start(pdev, 0), 15271 pf->ioremap_len, err); 15272 goto err_ioremap; 15273 } 15274 hw->vendor_id = pdev->vendor; 15275 hw->device_id = pdev->device; 15276 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 15277 hw->subsystem_vendor_id = pdev->subsystem_vendor; 15278 hw->subsystem_device_id = pdev->subsystem_device; 15279 hw->bus.device = PCI_SLOT(pdev->devfn); 15280 hw->bus.func = PCI_FUNC(pdev->devfn); 15281 hw->bus.bus_id = pdev->bus->number; 15282 pf->instance = pfs_found; 15283 15284 /* Select something other than the 802.1ad ethertype for the 15285 * switch to use internally and drop on ingress. 15286 */ 15287 hw->switch_tag = 0xffff; 15288 hw->first_tag = ETH_P_8021AD; 15289 hw->second_tag = ETH_P_8021Q; 15290 15291 INIT_LIST_HEAD(&pf->l3_flex_pit_list); 15292 INIT_LIST_HEAD(&pf->l4_flex_pit_list); 15293 INIT_LIST_HEAD(&pf->ddp_old_prof); 15294 15295 /* set up the locks for the AQ, do this only once in probe 15296 * and destroy them only once in remove 15297 */ 15298 mutex_init(&hw->aq.asq_mutex); 15299 mutex_init(&hw->aq.arq_mutex); 15300 15301 pf->msg_enable = netif_msg_init(debug, 15302 NETIF_MSG_DRV | 15303 NETIF_MSG_PROBE | 15304 NETIF_MSG_LINK); 15305 if (debug < -1) 15306 pf->hw.debug_mask = debug; 15307 15308 /* do a special CORER for clearing PXE mode once at init */ 15309 if (hw->revision_id == 0 && 15310 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 15311 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 15312 i40e_flush(hw); 15313 msleep(200); 15314 pf->corer_count++; 15315 15316 i40e_clear_pxe_mode(hw); 15317 } 15318 15319 /* Reset here to make sure all is clean and to define PF 'n' */ 15320 i40e_clear_hw(hw); 15321 15322 err = i40e_set_mac_type(hw); 15323 if (err) { 15324 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 15325 err); 15326 goto err_pf_reset; 15327 } 15328 15329 err = i40e_handle_resets(pf); 15330 if (err) 15331 goto err_pf_reset; 15332 15333 i40e_check_recovery_mode(pf); 15334 15335 if (is_kdump_kernel()) { 15336 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN; 15337 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN; 15338 } else { 15339 hw->aq.num_arq_entries = I40E_AQ_LEN; 15340 hw->aq.num_asq_entries = I40E_AQ_LEN; 15341 } 15342 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 15343 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 15344 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 15345 15346 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 15347 "%s-%s:misc", 15348 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 15349 15350 err = i40e_init_shared_code(hw); 15351 if (err) { 15352 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 15353 err); 15354 goto err_pf_reset; 15355 } 15356 15357 /* set up a default setting for link flow control */ 15358 pf->hw.fc.requested_mode = I40E_FC_NONE; 15359 15360 err = i40e_init_adminq(hw); 15361 if (err) { 15362 if (err == I40E_ERR_FIRMWARE_API_VERSION) 15363 dev_info(&pdev->dev, 15364 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n", 15365 hw->aq.api_maj_ver, 15366 hw->aq.api_min_ver, 15367 I40E_FW_API_VERSION_MAJOR, 15368 I40E_FW_MINOR_VERSION(hw)); 15369 else 15370 dev_info(&pdev->dev, 15371 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n"); 15372 15373 goto err_pf_reset; 15374 } 15375 i40e_get_oem_version(hw); 15376 15377 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */ 15378 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n", 15379 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, 15380 hw->aq.api_maj_ver, hw->aq.api_min_ver, 15381 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id, 15382 hw->subsystem_vendor_id, hw->subsystem_device_id); 15383 15384 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 15385 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw)) 15386 dev_info(&pdev->dev, 15387 "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n", 15388 hw->aq.api_maj_ver, 15389 hw->aq.api_min_ver, 15390 I40E_FW_API_VERSION_MAJOR, 15391 I40E_FW_MINOR_VERSION(hw)); 15392 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4) 15393 dev_info(&pdev->dev, 15394 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n", 15395 hw->aq.api_maj_ver, 15396 hw->aq.api_min_ver, 15397 I40E_FW_API_VERSION_MAJOR, 15398 I40E_FW_MINOR_VERSION(hw)); 15399 15400 i40e_verify_eeprom(pf); 15401 15402 /* Rev 0 hardware was never productized */ 15403 if (hw->revision_id < 1) 15404 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 15405 15406 i40e_clear_pxe_mode(hw); 15407 15408 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities); 15409 if (err) 15410 goto err_adminq_setup; 15411 15412 err = i40e_sw_init(pf); 15413 if (err) { 15414 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 15415 goto err_sw_init; 15416 } 15417 15418 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) 15419 return i40e_init_recovery_mode(pf, hw); 15420 15421 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 15422 hw->func_caps.num_rx_qp, 0, 0); 15423 if (err) { 15424 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 15425 goto err_init_lan_hmc; 15426 } 15427 15428 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 15429 if (err) { 15430 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 15431 err = -ENOENT; 15432 goto err_configure_lan_hmc; 15433 } 15434 15435 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 15436 * Ignore error return codes because if it was already disabled via 15437 * hardware settings this will fail 15438 */ 15439 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) { 15440 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 15441 i40e_aq_stop_lldp(hw, true, false, NULL); 15442 } 15443 15444 /* allow a platform config to override the HW addr */ 15445 i40e_get_platform_mac_addr(pdev, pf); 15446 15447 if (!is_valid_ether_addr(hw->mac.addr)) { 15448 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 15449 err = -EIO; 15450 goto err_mac_addr; 15451 } 15452 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 15453 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 15454 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 15455 if (is_valid_ether_addr(hw->mac.port_addr)) 15456 pf->hw_features |= I40E_HW_PORT_ID_VALID; 15457 15458 pci_set_drvdata(pdev, pf); 15459 pci_save_state(pdev); 15460 15461 #ifdef CONFIG_I40E_DCB 15462 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status); 15463 (!status && 15464 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ? 15465 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) : 15466 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP); 15467 dev_info(&pdev->dev, 15468 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ? 15469 "FW LLDP is disabled\n" : 15470 "FW LLDP is enabled\n"); 15471 15472 /* Enable FW to write default DCB config on link-up */ 15473 i40e_aq_set_dcb_parameters(hw, true, NULL); 15474 15475 err = i40e_init_pf_dcb(pf); 15476 if (err) { 15477 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 15478 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED); 15479 /* Continue without DCB enabled */ 15480 } 15481 #endif /* CONFIG_I40E_DCB */ 15482 15483 /* set up periodic task facility */ 15484 timer_setup(&pf->service_timer, i40e_service_timer, 0); 15485 pf->service_timer_period = HZ; 15486 15487 INIT_WORK(&pf->service_task, i40e_service_task); 15488 clear_bit(__I40E_SERVICE_SCHED, pf->state); 15489 15490 /* NVM bit on means WoL disabled for the port */ 15491 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 15492 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1) 15493 pf->wol_en = false; 15494 else 15495 pf->wol_en = true; 15496 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 15497 15498 /* set up the main switch operations */ 15499 i40e_determine_queue_usage(pf); 15500 err = i40e_init_interrupt_scheme(pf); 15501 if (err) 15502 goto err_switch_setup; 15503 15504 /* Reduce Tx and Rx pairs for kdump 15505 * When MSI-X is enabled, it's not allowed to use more TC queue 15506 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus 15507 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1. 15508 */ 15509 if (is_kdump_kernel()) 15510 pf->num_lan_msix = 1; 15511 15512 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port; 15513 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port; 15514 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP; 15515 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared; 15516 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS; 15517 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN | 15518 UDP_TUNNEL_TYPE_GENEVE; 15519 15520 /* The number of VSIs reported by the FW is the minimum guaranteed 15521 * to us; HW supports far more and we share the remaining pool with 15522 * the other PFs. We allocate space for more than the guarantee with 15523 * the understanding that we might not get them all later. 15524 */ 15525 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 15526 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 15527 else 15528 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 15529 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) { 15530 dev_warn(&pf->pdev->dev, 15531 "limiting the VSI count due to UDP tunnel limitation %d > %d\n", 15532 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES); 15533 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES; 15534 } 15535 15536 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 15537 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), 15538 GFP_KERNEL); 15539 if (!pf->vsi) { 15540 err = -ENOMEM; 15541 goto err_switch_setup; 15542 } 15543 15544 #ifdef CONFIG_PCI_IOV 15545 /* prep for VF support */ 15546 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 15547 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 15548 !test_bit(__I40E_BAD_EEPROM, pf->state)) { 15549 if (pci_num_vf(pdev)) 15550 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 15551 } 15552 #endif 15553 err = i40e_setup_pf_switch(pf, false, false); 15554 if (err) { 15555 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 15556 goto err_vsis; 15557 } 15558 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list); 15559 15560 /* if FDIR VSI was set up, start it now */ 15561 for (i = 0; i < pf->num_alloc_vsi; i++) { 15562 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 15563 i40e_vsi_open(pf->vsi[i]); 15564 break; 15565 } 15566 } 15567 15568 /* The driver only wants link up/down and module qualification 15569 * reports from firmware. Note the negative logic. 15570 */ 15571 err = i40e_aq_set_phy_int_mask(&pf->hw, 15572 ~(I40E_AQ_EVENT_LINK_UPDOWN | 15573 I40E_AQ_EVENT_MEDIA_NA | 15574 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 15575 if (err) 15576 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 15577 i40e_stat_str(&pf->hw, err), 15578 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 15579 15580 /* Reconfigure hardware for allowing smaller MSS in the case 15581 * of TSO, so that we avoid the MDD being fired and causing 15582 * a reset in the case of small MSS+TSO. 15583 */ 15584 val = rd32(hw, I40E_REG_MSS); 15585 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 15586 val &= ~I40E_REG_MSS_MIN_MASK; 15587 val |= I40E_64BYTE_MSS; 15588 wr32(hw, I40E_REG_MSS, val); 15589 } 15590 15591 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) { 15592 msleep(75); 15593 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 15594 if (err) 15595 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 15596 i40e_stat_str(&pf->hw, err), 15597 i40e_aq_str(&pf->hw, 15598 pf->hw.aq.asq_last_status)); 15599 } 15600 /* The main driver is (mostly) up and happy. We need to set this state 15601 * before setting up the misc vector or we get a race and the vector 15602 * ends up disabled forever. 15603 */ 15604 clear_bit(__I40E_DOWN, pf->state); 15605 15606 /* In case of MSIX we are going to setup the misc vector right here 15607 * to handle admin queue events etc. In case of legacy and MSI 15608 * the misc functionality and queue processing is combined in 15609 * the same vector and that gets setup at open. 15610 */ 15611 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 15612 err = i40e_setup_misc_vector(pf); 15613 if (err) { 15614 dev_info(&pdev->dev, 15615 "setup of misc vector failed: %d\n", err); 15616 i40e_cloud_filter_exit(pf); 15617 i40e_fdir_teardown(pf); 15618 goto err_vsis; 15619 } 15620 } 15621 15622 #ifdef CONFIG_PCI_IOV 15623 /* prep for VF support */ 15624 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 15625 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 15626 !test_bit(__I40E_BAD_EEPROM, pf->state)) { 15627 /* disable link interrupts for VFs */ 15628 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 15629 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 15630 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 15631 i40e_flush(hw); 15632 15633 if (pci_num_vf(pdev)) { 15634 dev_info(&pdev->dev, 15635 "Active VFs found, allocating resources.\n"); 15636 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 15637 if (err) 15638 dev_info(&pdev->dev, 15639 "Error %d allocating resources for existing VFs\n", 15640 err); 15641 } 15642 } 15643 #endif /* CONFIG_PCI_IOV */ 15644 15645 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 15646 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile, 15647 pf->num_iwarp_msix, 15648 I40E_IWARP_IRQ_PILE_ID); 15649 if (pf->iwarp_base_vector < 0) { 15650 dev_info(&pdev->dev, 15651 "failed to get tracking for %d vectors for IWARP err=%d\n", 15652 pf->num_iwarp_msix, pf->iwarp_base_vector); 15653 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 15654 } 15655 } 15656 15657 i40e_dbg_pf_init(pf); 15658 15659 /* tell the firmware that we're starting */ 15660 i40e_send_version(pf); 15661 15662 /* since everything's happy, start the service_task timer */ 15663 mod_timer(&pf->service_timer, 15664 round_jiffies(jiffies + pf->service_timer_period)); 15665 15666 /* add this PF to client device list and launch a client service task */ 15667 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 15668 err = i40e_lan_add_device(pf); 15669 if (err) 15670 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n", 15671 err); 15672 } 15673 15674 #define PCI_SPEED_SIZE 8 15675 #define PCI_WIDTH_SIZE 8 15676 /* Devices on the IOSF bus do not have this information 15677 * and will report PCI Gen 1 x 1 by default so don't bother 15678 * checking them. 15679 */ 15680 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) { 15681 char speed[PCI_SPEED_SIZE] = "Unknown"; 15682 char width[PCI_WIDTH_SIZE] = "Unknown"; 15683 15684 /* Get the negotiated link width and speed from PCI config 15685 * space 15686 */ 15687 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, 15688 &link_status); 15689 15690 i40e_set_pci_config_data(hw, link_status); 15691 15692 switch (hw->bus.speed) { 15693 case i40e_bus_speed_8000: 15694 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break; 15695 case i40e_bus_speed_5000: 15696 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break; 15697 case i40e_bus_speed_2500: 15698 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break; 15699 default: 15700 break; 15701 } 15702 switch (hw->bus.width) { 15703 case i40e_bus_width_pcie_x8: 15704 strlcpy(width, "8", PCI_WIDTH_SIZE); break; 15705 case i40e_bus_width_pcie_x4: 15706 strlcpy(width, "4", PCI_WIDTH_SIZE); break; 15707 case i40e_bus_width_pcie_x2: 15708 strlcpy(width, "2", PCI_WIDTH_SIZE); break; 15709 case i40e_bus_width_pcie_x1: 15710 strlcpy(width, "1", PCI_WIDTH_SIZE); break; 15711 default: 15712 break; 15713 } 15714 15715 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n", 15716 speed, width); 15717 15718 if (hw->bus.width < i40e_bus_width_pcie_x8 || 15719 hw->bus.speed < i40e_bus_speed_8000) { 15720 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 15721 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 15722 } 15723 } 15724 15725 /* get the requested speeds from the fw */ 15726 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 15727 if (err) 15728 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n", 15729 i40e_stat_str(&pf->hw, err), 15730 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 15731 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 15732 15733 /* set the FEC config due to the board capabilities */ 15734 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags); 15735 15736 /* get the supported phy types from the fw */ 15737 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL); 15738 if (err) 15739 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n", 15740 i40e_stat_str(&pf->hw, err), 15741 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 15742 15743 /* make sure the MFS hasn't been set lower than the default */ 15744 #define MAX_FRAME_SIZE_DEFAULT 0x2600 15745 val = (rd32(&pf->hw, I40E_PRTGL_SAH) & 15746 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT; 15747 if (val < MAX_FRAME_SIZE_DEFAULT) 15748 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n", 15749 i, val); 15750 15751 /* Add a filter to drop all Flow control frames from any VSI from being 15752 * transmitted. By doing so we stop a malicious VF from sending out 15753 * PAUSE or PFC frames and potentially controlling traffic for other 15754 * PF/VF VSIs. 15755 * The FW can still send Flow control frames if enabled. 15756 */ 15757 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 15758 pf->main_vsi_seid); 15759 15760 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) || 15761 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4)) 15762 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS; 15763 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722) 15764 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER; 15765 /* print a string summarizing features */ 15766 i40e_print_features(pf); 15767 15768 return 0; 15769 15770 /* Unwind what we've done if something failed in the setup */ 15771 err_vsis: 15772 set_bit(__I40E_DOWN, pf->state); 15773 i40e_clear_interrupt_scheme(pf); 15774 kfree(pf->vsi); 15775 err_switch_setup: 15776 i40e_reset_interrupt_capability(pf); 15777 del_timer_sync(&pf->service_timer); 15778 err_mac_addr: 15779 err_configure_lan_hmc: 15780 (void)i40e_shutdown_lan_hmc(hw); 15781 err_init_lan_hmc: 15782 kfree(pf->qp_pile); 15783 err_sw_init: 15784 err_adminq_setup: 15785 err_pf_reset: 15786 iounmap(hw->hw_addr); 15787 err_ioremap: 15788 kfree(pf); 15789 err_pf_alloc: 15790 pci_disable_pcie_error_reporting(pdev); 15791 pci_release_mem_regions(pdev); 15792 err_pci_reg: 15793 err_dma: 15794 pci_disable_device(pdev); 15795 return err; 15796 } 15797 15798 /** 15799 * i40e_remove - Device removal routine 15800 * @pdev: PCI device information struct 15801 * 15802 * i40e_remove is called by the PCI subsystem to alert the driver 15803 * that is should release a PCI device. This could be caused by a 15804 * Hot-Plug event, or because the driver is going to be removed from 15805 * memory. 15806 **/ 15807 static void i40e_remove(struct pci_dev *pdev) 15808 { 15809 struct i40e_pf *pf = pci_get_drvdata(pdev); 15810 struct i40e_hw *hw = &pf->hw; 15811 i40e_status ret_code; 15812 int i; 15813 15814 i40e_dbg_pf_exit(pf); 15815 15816 i40e_ptp_stop(pf); 15817 15818 /* Disable RSS in hw */ 15819 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); 15820 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); 15821 15822 while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 15823 usleep_range(1000, 2000); 15824 15825 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 15826 set_bit(__I40E_VF_RESETS_DISABLED, pf->state); 15827 i40e_free_vfs(pf); 15828 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 15829 } 15830 /* no more scheduling of any task */ 15831 set_bit(__I40E_SUSPENDED, pf->state); 15832 set_bit(__I40E_DOWN, pf->state); 15833 if (pf->service_timer.function) 15834 del_timer_sync(&pf->service_timer); 15835 if (pf->service_task.func) 15836 cancel_work_sync(&pf->service_task); 15837 15838 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) { 15839 struct i40e_vsi *vsi = pf->vsi[0]; 15840 15841 /* We know that we have allocated only one vsi for this PF, 15842 * it was just for registering netdevice, so the interface 15843 * could be visible in the 'ifconfig' output 15844 */ 15845 unregister_netdev(vsi->netdev); 15846 free_netdev(vsi->netdev); 15847 15848 goto unmap; 15849 } 15850 15851 /* Client close must be called explicitly here because the timer 15852 * has been stopped. 15853 */ 15854 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); 15855 15856 i40e_fdir_teardown(pf); 15857 15858 /* If there is a switch structure or any orphans, remove them. 15859 * This will leave only the PF's VSI remaining. 15860 */ 15861 for (i = 0; i < I40E_MAX_VEB; i++) { 15862 if (!pf->veb[i]) 15863 continue; 15864 15865 if (pf->veb[i]->uplink_seid == pf->mac_seid || 15866 pf->veb[i]->uplink_seid == 0) 15867 i40e_switch_branch_release(pf->veb[i]); 15868 } 15869 15870 /* Now we can shutdown the PF's VSI, just before we kill 15871 * adminq and hmc. 15872 */ 15873 if (pf->vsi[pf->lan_vsi]) 15874 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 15875 15876 i40e_cloud_filter_exit(pf); 15877 15878 /* remove attached clients */ 15879 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 15880 ret_code = i40e_lan_del_device(pf); 15881 if (ret_code) 15882 dev_warn(&pdev->dev, "Failed to delete client device: %d\n", 15883 ret_code); 15884 } 15885 15886 /* shutdown and destroy the HMC */ 15887 if (hw->hmc.hmc_obj) { 15888 ret_code = i40e_shutdown_lan_hmc(hw); 15889 if (ret_code) 15890 dev_warn(&pdev->dev, 15891 "Failed to destroy the HMC resources: %d\n", 15892 ret_code); 15893 } 15894 15895 unmap: 15896 /* Free MSI/legacy interrupt 0 when in recovery mode. */ 15897 if (test_bit(__I40E_RECOVERY_MODE, pf->state) && 15898 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) 15899 free_irq(pf->pdev->irq, pf); 15900 15901 /* shutdown the adminq */ 15902 i40e_shutdown_adminq(hw); 15903 15904 /* destroy the locks only once, here */ 15905 mutex_destroy(&hw->aq.arq_mutex); 15906 mutex_destroy(&hw->aq.asq_mutex); 15907 15908 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 15909 rtnl_lock(); 15910 i40e_clear_interrupt_scheme(pf); 15911 for (i = 0; i < pf->num_alloc_vsi; i++) { 15912 if (pf->vsi[i]) { 15913 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) 15914 i40e_vsi_clear_rings(pf->vsi[i]); 15915 i40e_vsi_clear(pf->vsi[i]); 15916 pf->vsi[i] = NULL; 15917 } 15918 } 15919 rtnl_unlock(); 15920 15921 for (i = 0; i < I40E_MAX_VEB; i++) { 15922 kfree(pf->veb[i]); 15923 pf->veb[i] = NULL; 15924 } 15925 15926 kfree(pf->qp_pile); 15927 kfree(pf->vsi); 15928 15929 iounmap(hw->hw_addr); 15930 kfree(pf); 15931 pci_release_mem_regions(pdev); 15932 15933 pci_disable_pcie_error_reporting(pdev); 15934 pci_disable_device(pdev); 15935 } 15936 15937 /** 15938 * i40e_pci_error_detected - warning that something funky happened in PCI land 15939 * @pdev: PCI device information struct 15940 * @error: the type of PCI error 15941 * 15942 * Called to warn that something happened and the error handling steps 15943 * are in progress. Allows the driver to quiesce things, be ready for 15944 * remediation. 15945 **/ 15946 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 15947 pci_channel_state_t error) 15948 { 15949 struct i40e_pf *pf = pci_get_drvdata(pdev); 15950 15951 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 15952 15953 if (!pf) { 15954 dev_info(&pdev->dev, 15955 "Cannot recover - error happened during device probe\n"); 15956 return PCI_ERS_RESULT_DISCONNECT; 15957 } 15958 15959 /* shutdown all operations */ 15960 if (!test_bit(__I40E_SUSPENDED, pf->state)) 15961 i40e_prep_for_reset(pf); 15962 15963 /* Request a slot reset */ 15964 return PCI_ERS_RESULT_NEED_RESET; 15965 } 15966 15967 /** 15968 * i40e_pci_error_slot_reset - a PCI slot reset just happened 15969 * @pdev: PCI device information struct 15970 * 15971 * Called to find if the driver can work with the device now that 15972 * the pci slot has been reset. If a basic connection seems good 15973 * (registers are readable and have sane content) then return a 15974 * happy little PCI_ERS_RESULT_xxx. 15975 **/ 15976 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 15977 { 15978 struct i40e_pf *pf = pci_get_drvdata(pdev); 15979 pci_ers_result_t result; 15980 u32 reg; 15981 15982 dev_dbg(&pdev->dev, "%s\n", __func__); 15983 if (pci_enable_device_mem(pdev)) { 15984 dev_info(&pdev->dev, 15985 "Cannot re-enable PCI device after reset.\n"); 15986 result = PCI_ERS_RESULT_DISCONNECT; 15987 } else { 15988 pci_set_master(pdev); 15989 pci_restore_state(pdev); 15990 pci_save_state(pdev); 15991 pci_wake_from_d3(pdev, false); 15992 15993 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 15994 if (reg == 0) 15995 result = PCI_ERS_RESULT_RECOVERED; 15996 else 15997 result = PCI_ERS_RESULT_DISCONNECT; 15998 } 15999 16000 return result; 16001 } 16002 16003 /** 16004 * i40e_pci_error_reset_prepare - prepare device driver for pci reset 16005 * @pdev: PCI device information struct 16006 */ 16007 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev) 16008 { 16009 struct i40e_pf *pf = pci_get_drvdata(pdev); 16010 16011 i40e_prep_for_reset(pf); 16012 } 16013 16014 /** 16015 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin 16016 * @pdev: PCI device information struct 16017 */ 16018 static void i40e_pci_error_reset_done(struct pci_dev *pdev) 16019 { 16020 struct i40e_pf *pf = pci_get_drvdata(pdev); 16021 16022 i40e_reset_and_rebuild(pf, false, false); 16023 } 16024 16025 /** 16026 * i40e_pci_error_resume - restart operations after PCI error recovery 16027 * @pdev: PCI device information struct 16028 * 16029 * Called to allow the driver to bring things back up after PCI error 16030 * and/or reset recovery has finished. 16031 **/ 16032 static void i40e_pci_error_resume(struct pci_dev *pdev) 16033 { 16034 struct i40e_pf *pf = pci_get_drvdata(pdev); 16035 16036 dev_dbg(&pdev->dev, "%s\n", __func__); 16037 if (test_bit(__I40E_SUSPENDED, pf->state)) 16038 return; 16039 16040 i40e_handle_reset_warning(pf, false); 16041 } 16042 16043 /** 16044 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up 16045 * using the mac_address_write admin q function 16046 * @pf: pointer to i40e_pf struct 16047 **/ 16048 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf) 16049 { 16050 struct i40e_hw *hw = &pf->hw; 16051 i40e_status ret; 16052 u8 mac_addr[6]; 16053 u16 flags = 0; 16054 16055 /* Get current MAC address in case it's an LAA */ 16056 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) { 16057 ether_addr_copy(mac_addr, 16058 pf->vsi[pf->lan_vsi]->netdev->dev_addr); 16059 } else { 16060 dev_err(&pf->pdev->dev, 16061 "Failed to retrieve MAC address; using default\n"); 16062 ether_addr_copy(mac_addr, hw->mac.addr); 16063 } 16064 16065 /* The FW expects the mac address write cmd to first be called with 16066 * one of these flags before calling it again with the multicast 16067 * enable flags. 16068 */ 16069 flags = I40E_AQC_WRITE_TYPE_LAA_WOL; 16070 16071 if (hw->func_caps.flex10_enable && hw->partition_id != 1) 16072 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY; 16073 16074 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 16075 if (ret) { 16076 dev_err(&pf->pdev->dev, 16077 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up"); 16078 return; 16079 } 16080 16081 flags = I40E_AQC_MC_MAG_EN 16082 | I40E_AQC_WOL_PRESERVE_ON_PFR 16083 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG; 16084 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 16085 if (ret) 16086 dev_err(&pf->pdev->dev, 16087 "Failed to enable Multicast Magic Packet wake up\n"); 16088 } 16089 16090 /** 16091 * i40e_shutdown - PCI callback for shutting down 16092 * @pdev: PCI device information struct 16093 **/ 16094 static void i40e_shutdown(struct pci_dev *pdev) 16095 { 16096 struct i40e_pf *pf = pci_get_drvdata(pdev); 16097 struct i40e_hw *hw = &pf->hw; 16098 16099 set_bit(__I40E_SUSPENDED, pf->state); 16100 set_bit(__I40E_DOWN, pf->state); 16101 16102 del_timer_sync(&pf->service_timer); 16103 cancel_work_sync(&pf->service_task); 16104 i40e_cloud_filter_exit(pf); 16105 i40e_fdir_teardown(pf); 16106 16107 /* Client close must be called explicitly here because the timer 16108 * has been stopped. 16109 */ 16110 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); 16111 16112 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE)) 16113 i40e_enable_mc_magic_wake(pf); 16114 16115 i40e_prep_for_reset(pf); 16116 16117 wr32(hw, I40E_PFPM_APM, 16118 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 16119 wr32(hw, I40E_PFPM_WUFC, 16120 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 16121 16122 /* Free MSI/legacy interrupt 0 when in recovery mode. */ 16123 if (test_bit(__I40E_RECOVERY_MODE, pf->state) && 16124 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) 16125 free_irq(pf->pdev->irq, pf); 16126 16127 /* Since we're going to destroy queues during the 16128 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this 16129 * whole section 16130 */ 16131 rtnl_lock(); 16132 i40e_clear_interrupt_scheme(pf); 16133 rtnl_unlock(); 16134 16135 if (system_state == SYSTEM_POWER_OFF) { 16136 pci_wake_from_d3(pdev, pf->wol_en); 16137 pci_set_power_state(pdev, PCI_D3hot); 16138 } 16139 } 16140 16141 /** 16142 * i40e_suspend - PM callback for moving to D3 16143 * @dev: generic device information structure 16144 **/ 16145 static int __maybe_unused i40e_suspend(struct device *dev) 16146 { 16147 struct i40e_pf *pf = dev_get_drvdata(dev); 16148 struct i40e_hw *hw = &pf->hw; 16149 16150 /* If we're already suspended, then there is nothing to do */ 16151 if (test_and_set_bit(__I40E_SUSPENDED, pf->state)) 16152 return 0; 16153 16154 set_bit(__I40E_DOWN, pf->state); 16155 16156 /* Ensure service task will not be running */ 16157 del_timer_sync(&pf->service_timer); 16158 cancel_work_sync(&pf->service_task); 16159 16160 /* Client close must be called explicitly here because the timer 16161 * has been stopped. 16162 */ 16163 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); 16164 16165 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE)) 16166 i40e_enable_mc_magic_wake(pf); 16167 16168 /* Since we're going to destroy queues during the 16169 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this 16170 * whole section 16171 */ 16172 rtnl_lock(); 16173 16174 i40e_prep_for_reset(pf); 16175 16176 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 16177 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 16178 16179 /* Clear the interrupt scheme and release our IRQs so that the system 16180 * can safely hibernate even when there are a large number of CPUs. 16181 * Otherwise hibernation might fail when mapping all the vectors back 16182 * to CPU0. 16183 */ 16184 i40e_clear_interrupt_scheme(pf); 16185 16186 rtnl_unlock(); 16187 16188 return 0; 16189 } 16190 16191 /** 16192 * i40e_resume - PM callback for waking up from D3 16193 * @dev: generic device information structure 16194 **/ 16195 static int __maybe_unused i40e_resume(struct device *dev) 16196 { 16197 struct i40e_pf *pf = dev_get_drvdata(dev); 16198 int err; 16199 16200 /* If we're not suspended, then there is nothing to do */ 16201 if (!test_bit(__I40E_SUSPENDED, pf->state)) 16202 return 0; 16203 16204 /* We need to hold the RTNL lock prior to restoring interrupt schemes, 16205 * since we're going to be restoring queues 16206 */ 16207 rtnl_lock(); 16208 16209 /* We cleared the interrupt scheme when we suspended, so we need to 16210 * restore it now to resume device functionality. 16211 */ 16212 err = i40e_restore_interrupt_scheme(pf); 16213 if (err) { 16214 dev_err(dev, "Cannot restore interrupt scheme: %d\n", 16215 err); 16216 } 16217 16218 clear_bit(__I40E_DOWN, pf->state); 16219 i40e_reset_and_rebuild(pf, false, true); 16220 16221 rtnl_unlock(); 16222 16223 /* Clear suspended state last after everything is recovered */ 16224 clear_bit(__I40E_SUSPENDED, pf->state); 16225 16226 /* Restart the service task */ 16227 mod_timer(&pf->service_timer, 16228 round_jiffies(jiffies + pf->service_timer_period)); 16229 16230 return 0; 16231 } 16232 16233 static const struct pci_error_handlers i40e_err_handler = { 16234 .error_detected = i40e_pci_error_detected, 16235 .slot_reset = i40e_pci_error_slot_reset, 16236 .reset_prepare = i40e_pci_error_reset_prepare, 16237 .reset_done = i40e_pci_error_reset_done, 16238 .resume = i40e_pci_error_resume, 16239 }; 16240 16241 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume); 16242 16243 static struct pci_driver i40e_driver = { 16244 .name = i40e_driver_name, 16245 .id_table = i40e_pci_tbl, 16246 .probe = i40e_probe, 16247 .remove = i40e_remove, 16248 .driver = { 16249 .pm = &i40e_pm_ops, 16250 }, 16251 .shutdown = i40e_shutdown, 16252 .err_handler = &i40e_err_handler, 16253 .sriov_configure = i40e_pci_sriov_configure, 16254 }; 16255 16256 /** 16257 * i40e_init_module - Driver registration routine 16258 * 16259 * i40e_init_module is the first routine called when the driver is 16260 * loaded. All it does is register with the PCI subsystem. 16261 **/ 16262 static int __init i40e_init_module(void) 16263 { 16264 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string); 16265 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 16266 16267 /* There is no need to throttle the number of active tasks because 16268 * each device limits its own task using a state bit for scheduling 16269 * the service task, and the device tasks do not interfere with each 16270 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM 16271 * since we need to be able to guarantee forward progress even under 16272 * memory pressure. 16273 */ 16274 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name); 16275 if (!i40e_wq) { 16276 pr_err("%s: Failed to create workqueue\n", i40e_driver_name); 16277 return -ENOMEM; 16278 } 16279 16280 i40e_dbg_init(); 16281 return pci_register_driver(&i40e_driver); 16282 } 16283 module_init(i40e_init_module); 16284 16285 /** 16286 * i40e_exit_module - Driver exit cleanup routine 16287 * 16288 * i40e_exit_module is called just before the driver is removed 16289 * from memory. 16290 **/ 16291 static void __exit i40e_exit_module(void) 16292 { 16293 pci_unregister_driver(&i40e_driver); 16294 destroy_workqueue(i40e_wq); 16295 ida_destroy(&i40e_client_ida); 16296 i40e_dbg_exit(); 16297 } 16298 module_exit(i40e_exit_module); 16299