1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2015 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* Local includes */ 28 #include "i40e.h" 29 #include "i40e_diag.h" 30 #ifdef CONFIG_I40E_VXLAN 31 #include <net/vxlan.h> 32 #endif 33 34 const char i40e_driver_name[] = "i40e"; 35 static const char i40e_driver_string[] = 36 "Intel(R) Ethernet Connection XL710 Network Driver"; 37 38 #define DRV_KERN "-k" 39 40 #define DRV_VERSION_MAJOR 1 41 #define DRV_VERSION_MINOR 3 42 #define DRV_VERSION_BUILD 6 43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 44 __stringify(DRV_VERSION_MINOR) "." \ 45 __stringify(DRV_VERSION_BUILD) DRV_KERN 46 const char i40e_driver_version_str[] = DRV_VERSION; 47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 48 49 /* a bit of forward declarations */ 50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 51 static void i40e_handle_reset_warning(struct i40e_pf *pf); 52 static int i40e_add_vsi(struct i40e_vsi *vsi); 53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 55 static int i40e_setup_misc_vector(struct i40e_pf *pf); 56 static void i40e_determine_queue_usage(struct i40e_pf *pf); 57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 58 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 59 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 60 61 /* i40e_pci_tbl - PCI Device ID Table 62 * 63 * Last entry must be all 0s 64 * 65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 66 * Class, Class Mask, private data (not used) } 67 */ 68 static const struct pci_device_id i40e_pci_tbl[] = { 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 79 /* required last entry */ 80 {0, } 81 }; 82 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 83 84 #define I40E_MAX_VF_COUNT 128 85 static int debug = -1; 86 module_param(debug, int, 0); 87 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 88 89 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 90 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 91 MODULE_LICENSE("GPL"); 92 MODULE_VERSION(DRV_VERSION); 93 94 /** 95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 96 * @hw: pointer to the HW structure 97 * @mem: ptr to mem struct to fill out 98 * @size: size of memory requested 99 * @alignment: what to align the allocation to 100 **/ 101 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 102 u64 size, u32 alignment) 103 { 104 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 105 106 mem->size = ALIGN(size, alignment); 107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 108 &mem->pa, GFP_KERNEL); 109 if (!mem->va) 110 return -ENOMEM; 111 112 return 0; 113 } 114 115 /** 116 * i40e_free_dma_mem_d - OS specific memory free for shared code 117 * @hw: pointer to the HW structure 118 * @mem: ptr to mem struct to free 119 **/ 120 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 121 { 122 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 123 124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 125 mem->va = NULL; 126 mem->pa = 0; 127 mem->size = 0; 128 129 return 0; 130 } 131 132 /** 133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 134 * @hw: pointer to the HW structure 135 * @mem: ptr to mem struct to fill out 136 * @size: size of memory requested 137 **/ 138 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 139 u32 size) 140 { 141 mem->size = size; 142 mem->va = kzalloc(size, GFP_KERNEL); 143 144 if (!mem->va) 145 return -ENOMEM; 146 147 return 0; 148 } 149 150 /** 151 * i40e_free_virt_mem_d - OS specific memory free for shared code 152 * @hw: pointer to the HW structure 153 * @mem: ptr to mem struct to free 154 **/ 155 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 156 { 157 /* it's ok to kfree a NULL pointer */ 158 kfree(mem->va); 159 mem->va = NULL; 160 mem->size = 0; 161 162 return 0; 163 } 164 165 /** 166 * i40e_get_lump - find a lump of free generic resource 167 * @pf: board private structure 168 * @pile: the pile of resource to search 169 * @needed: the number of items needed 170 * @id: an owner id to stick on the items assigned 171 * 172 * Returns the base item index of the lump, or negative for error 173 * 174 * The search_hint trick and lack of advanced fit-finding only work 175 * because we're highly likely to have all the same size lump requests. 176 * Linear search time and any fragmentation should be minimal. 177 **/ 178 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 179 u16 needed, u16 id) 180 { 181 int ret = -ENOMEM; 182 int i, j; 183 184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 185 dev_info(&pf->pdev->dev, 186 "param err: pile=%p needed=%d id=0x%04x\n", 187 pile, needed, id); 188 return -EINVAL; 189 } 190 191 /* start the linear search with an imperfect hint */ 192 i = pile->search_hint; 193 while (i < pile->num_entries) { 194 /* skip already allocated entries */ 195 if (pile->list[i] & I40E_PILE_VALID_BIT) { 196 i++; 197 continue; 198 } 199 200 /* do we have enough in this lump? */ 201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 202 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 203 break; 204 } 205 206 if (j == needed) { 207 /* there was enough, so assign it to the requestor */ 208 for (j = 0; j < needed; j++) 209 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 210 ret = i; 211 pile->search_hint = i + j; 212 break; 213 } else { 214 /* not enough, so skip over it and continue looking */ 215 i += j; 216 } 217 } 218 219 return ret; 220 } 221 222 /** 223 * i40e_put_lump - return a lump of generic resource 224 * @pile: the pile of resource to search 225 * @index: the base item index 226 * @id: the owner id of the items assigned 227 * 228 * Returns the count of items in the lump 229 **/ 230 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 231 { 232 int valid_id = (id | I40E_PILE_VALID_BIT); 233 int count = 0; 234 int i; 235 236 if (!pile || index >= pile->num_entries) 237 return -EINVAL; 238 239 for (i = index; 240 i < pile->num_entries && pile->list[i] == valid_id; 241 i++) { 242 pile->list[i] = 0; 243 count++; 244 } 245 246 if (count && index < pile->search_hint) 247 pile->search_hint = index; 248 249 return count; 250 } 251 252 /** 253 * i40e_find_vsi_from_id - searches for the vsi with the given id 254 * @pf - the pf structure to search for the vsi 255 * @id - id of the vsi it is searching for 256 **/ 257 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 258 { 259 int i; 260 261 for (i = 0; i < pf->num_alloc_vsi; i++) 262 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 263 return pf->vsi[i]; 264 265 return NULL; 266 } 267 268 /** 269 * i40e_service_event_schedule - Schedule the service task to wake up 270 * @pf: board private structure 271 * 272 * If not already scheduled, this puts the task into the work queue 273 **/ 274 static void i40e_service_event_schedule(struct i40e_pf *pf) 275 { 276 if (!test_bit(__I40E_DOWN, &pf->state) && 277 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 278 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 279 schedule_work(&pf->service_task); 280 } 281 282 /** 283 * i40e_tx_timeout - Respond to a Tx Hang 284 * @netdev: network interface device structure 285 * 286 * If any port has noticed a Tx timeout, it is likely that the whole 287 * device is munged, not just the one netdev port, so go for the full 288 * reset. 289 **/ 290 #ifdef I40E_FCOE 291 void i40e_tx_timeout(struct net_device *netdev) 292 #else 293 static void i40e_tx_timeout(struct net_device *netdev) 294 #endif 295 { 296 struct i40e_netdev_priv *np = netdev_priv(netdev); 297 struct i40e_vsi *vsi = np->vsi; 298 struct i40e_pf *pf = vsi->back; 299 300 pf->tx_timeout_count++; 301 302 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 303 pf->tx_timeout_recovery_level = 1; 304 pf->tx_timeout_last_recovery = jiffies; 305 netdev_info(netdev, "tx_timeout recovery level %d\n", 306 pf->tx_timeout_recovery_level); 307 308 switch (pf->tx_timeout_recovery_level) { 309 case 0: 310 /* disable and re-enable queues for the VSI */ 311 if (in_interrupt()) { 312 set_bit(__I40E_REINIT_REQUESTED, &pf->state); 313 set_bit(__I40E_REINIT_REQUESTED, &vsi->state); 314 } else { 315 i40e_vsi_reinit_locked(vsi); 316 } 317 break; 318 case 1: 319 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 320 break; 321 case 2: 322 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 323 break; 324 case 3: 325 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 326 break; 327 default: 328 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 329 set_bit(__I40E_DOWN_REQUESTED, &pf->state); 330 set_bit(__I40E_DOWN_REQUESTED, &vsi->state); 331 break; 332 } 333 i40e_service_event_schedule(pf); 334 pf->tx_timeout_recovery_level++; 335 } 336 337 /** 338 * i40e_release_rx_desc - Store the new tail and head values 339 * @rx_ring: ring to bump 340 * @val: new head index 341 **/ 342 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) 343 { 344 rx_ring->next_to_use = val; 345 346 /* Force memory writes to complete before letting h/w 347 * know there are new descriptors to fetch. (Only 348 * applicable for weak-ordered memory model archs, 349 * such as IA-64). 350 */ 351 wmb(); 352 writel(val, rx_ring->tail); 353 } 354 355 /** 356 * i40e_get_vsi_stats_struct - Get System Network Statistics 357 * @vsi: the VSI we care about 358 * 359 * Returns the address of the device statistics structure. 360 * The statistics are actually updated from the service task. 361 **/ 362 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 363 { 364 return &vsi->net_stats; 365 } 366 367 /** 368 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 369 * @netdev: network interface device structure 370 * 371 * Returns the address of the device statistics structure. 372 * The statistics are actually updated from the service task. 373 **/ 374 #ifdef I40E_FCOE 375 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 376 struct net_device *netdev, 377 struct rtnl_link_stats64 *stats) 378 #else 379 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 380 struct net_device *netdev, 381 struct rtnl_link_stats64 *stats) 382 #endif 383 { 384 struct i40e_netdev_priv *np = netdev_priv(netdev); 385 struct i40e_ring *tx_ring, *rx_ring; 386 struct i40e_vsi *vsi = np->vsi; 387 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 388 int i; 389 390 if (test_bit(__I40E_DOWN, &vsi->state)) 391 return stats; 392 393 if (!vsi->tx_rings) 394 return stats; 395 396 rcu_read_lock(); 397 for (i = 0; i < vsi->num_queue_pairs; i++) { 398 u64 bytes, packets; 399 unsigned int start; 400 401 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 402 if (!tx_ring) 403 continue; 404 405 do { 406 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 407 packets = tx_ring->stats.packets; 408 bytes = tx_ring->stats.bytes; 409 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 410 411 stats->tx_packets += packets; 412 stats->tx_bytes += bytes; 413 rx_ring = &tx_ring[1]; 414 415 do { 416 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 417 packets = rx_ring->stats.packets; 418 bytes = rx_ring->stats.bytes; 419 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 420 421 stats->rx_packets += packets; 422 stats->rx_bytes += bytes; 423 } 424 rcu_read_unlock(); 425 426 /* following stats updated by i40e_watchdog_subtask() */ 427 stats->multicast = vsi_stats->multicast; 428 stats->tx_errors = vsi_stats->tx_errors; 429 stats->tx_dropped = vsi_stats->tx_dropped; 430 stats->rx_errors = vsi_stats->rx_errors; 431 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 432 stats->rx_length_errors = vsi_stats->rx_length_errors; 433 434 return stats; 435 } 436 437 /** 438 * i40e_vsi_reset_stats - Resets all stats of the given vsi 439 * @vsi: the VSI to have its stats reset 440 **/ 441 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 442 { 443 struct rtnl_link_stats64 *ns; 444 int i; 445 446 if (!vsi) 447 return; 448 449 ns = i40e_get_vsi_stats_struct(vsi); 450 memset(ns, 0, sizeof(*ns)); 451 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 452 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 453 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 454 if (vsi->rx_rings && vsi->rx_rings[0]) { 455 for (i = 0; i < vsi->num_queue_pairs; i++) { 456 memset(&vsi->rx_rings[i]->stats, 0 , 457 sizeof(vsi->rx_rings[i]->stats)); 458 memset(&vsi->rx_rings[i]->rx_stats, 0 , 459 sizeof(vsi->rx_rings[i]->rx_stats)); 460 memset(&vsi->tx_rings[i]->stats, 0 , 461 sizeof(vsi->tx_rings[i]->stats)); 462 memset(&vsi->tx_rings[i]->tx_stats, 0, 463 sizeof(vsi->tx_rings[i]->tx_stats)); 464 } 465 } 466 vsi->stat_offsets_loaded = false; 467 } 468 469 /** 470 * i40e_pf_reset_stats - Reset all of the stats for the given PF 471 * @pf: the PF to be reset 472 **/ 473 void i40e_pf_reset_stats(struct i40e_pf *pf) 474 { 475 int i; 476 477 memset(&pf->stats, 0, sizeof(pf->stats)); 478 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 479 pf->stat_offsets_loaded = false; 480 481 for (i = 0; i < I40E_MAX_VEB; i++) { 482 if (pf->veb[i]) { 483 memset(&pf->veb[i]->stats, 0, 484 sizeof(pf->veb[i]->stats)); 485 memset(&pf->veb[i]->stats_offsets, 0, 486 sizeof(pf->veb[i]->stats_offsets)); 487 pf->veb[i]->stat_offsets_loaded = false; 488 } 489 } 490 } 491 492 /** 493 * i40e_stat_update48 - read and update a 48 bit stat from the chip 494 * @hw: ptr to the hardware info 495 * @hireg: the high 32 bit reg to read 496 * @loreg: the low 32 bit reg to read 497 * @offset_loaded: has the initial offset been loaded yet 498 * @offset: ptr to current offset value 499 * @stat: ptr to the stat 500 * 501 * Since the device stats are not reset at PFReset, they likely will not 502 * be zeroed when the driver starts. We'll save the first values read 503 * and use them as offsets to be subtracted from the raw values in order 504 * to report stats that count from zero. In the process, we also manage 505 * the potential roll-over. 506 **/ 507 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 508 bool offset_loaded, u64 *offset, u64 *stat) 509 { 510 u64 new_data; 511 512 if (hw->device_id == I40E_DEV_ID_QEMU) { 513 new_data = rd32(hw, loreg); 514 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 515 } else { 516 new_data = rd64(hw, loreg); 517 } 518 if (!offset_loaded) 519 *offset = new_data; 520 if (likely(new_data >= *offset)) 521 *stat = new_data - *offset; 522 else 523 *stat = (new_data + BIT_ULL(48)) - *offset; 524 *stat &= 0xFFFFFFFFFFFFULL; 525 } 526 527 /** 528 * i40e_stat_update32 - read and update a 32 bit stat from the chip 529 * @hw: ptr to the hardware info 530 * @reg: the hw reg to read 531 * @offset_loaded: has the initial offset been loaded yet 532 * @offset: ptr to current offset value 533 * @stat: ptr to the stat 534 **/ 535 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 536 bool offset_loaded, u64 *offset, u64 *stat) 537 { 538 u32 new_data; 539 540 new_data = rd32(hw, reg); 541 if (!offset_loaded) 542 *offset = new_data; 543 if (likely(new_data >= *offset)) 544 *stat = (u32)(new_data - *offset); 545 else 546 *stat = (u32)((new_data + BIT_ULL(32)) - *offset); 547 } 548 549 /** 550 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 551 * @vsi: the VSI to be updated 552 **/ 553 void i40e_update_eth_stats(struct i40e_vsi *vsi) 554 { 555 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 556 struct i40e_pf *pf = vsi->back; 557 struct i40e_hw *hw = &pf->hw; 558 struct i40e_eth_stats *oes; 559 struct i40e_eth_stats *es; /* device's eth stats */ 560 561 es = &vsi->eth_stats; 562 oes = &vsi->eth_stats_offsets; 563 564 /* Gather up the stats that the hw collects */ 565 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 566 vsi->stat_offsets_loaded, 567 &oes->tx_errors, &es->tx_errors); 568 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 569 vsi->stat_offsets_loaded, 570 &oes->rx_discards, &es->rx_discards); 571 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 572 vsi->stat_offsets_loaded, 573 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 574 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 575 vsi->stat_offsets_loaded, 576 &oes->tx_errors, &es->tx_errors); 577 578 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 579 I40E_GLV_GORCL(stat_idx), 580 vsi->stat_offsets_loaded, 581 &oes->rx_bytes, &es->rx_bytes); 582 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 583 I40E_GLV_UPRCL(stat_idx), 584 vsi->stat_offsets_loaded, 585 &oes->rx_unicast, &es->rx_unicast); 586 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 587 I40E_GLV_MPRCL(stat_idx), 588 vsi->stat_offsets_loaded, 589 &oes->rx_multicast, &es->rx_multicast); 590 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 591 I40E_GLV_BPRCL(stat_idx), 592 vsi->stat_offsets_loaded, 593 &oes->rx_broadcast, &es->rx_broadcast); 594 595 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 596 I40E_GLV_GOTCL(stat_idx), 597 vsi->stat_offsets_loaded, 598 &oes->tx_bytes, &es->tx_bytes); 599 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 600 I40E_GLV_UPTCL(stat_idx), 601 vsi->stat_offsets_loaded, 602 &oes->tx_unicast, &es->tx_unicast); 603 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 604 I40E_GLV_MPTCL(stat_idx), 605 vsi->stat_offsets_loaded, 606 &oes->tx_multicast, &es->tx_multicast); 607 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 608 I40E_GLV_BPTCL(stat_idx), 609 vsi->stat_offsets_loaded, 610 &oes->tx_broadcast, &es->tx_broadcast); 611 vsi->stat_offsets_loaded = true; 612 } 613 614 /** 615 * i40e_update_veb_stats - Update Switch component statistics 616 * @veb: the VEB being updated 617 **/ 618 static void i40e_update_veb_stats(struct i40e_veb *veb) 619 { 620 struct i40e_pf *pf = veb->pf; 621 struct i40e_hw *hw = &pf->hw; 622 struct i40e_eth_stats *oes; 623 struct i40e_eth_stats *es; /* device's eth stats */ 624 int idx = 0; 625 626 idx = veb->stats_idx; 627 es = &veb->stats; 628 oes = &veb->stats_offsets; 629 630 /* Gather up the stats that the hw collects */ 631 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 632 veb->stat_offsets_loaded, 633 &oes->tx_discards, &es->tx_discards); 634 if (hw->revision_id > 0) 635 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 636 veb->stat_offsets_loaded, 637 &oes->rx_unknown_protocol, 638 &es->rx_unknown_protocol); 639 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 640 veb->stat_offsets_loaded, 641 &oes->rx_bytes, &es->rx_bytes); 642 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 643 veb->stat_offsets_loaded, 644 &oes->rx_unicast, &es->rx_unicast); 645 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 646 veb->stat_offsets_loaded, 647 &oes->rx_multicast, &es->rx_multicast); 648 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 649 veb->stat_offsets_loaded, 650 &oes->rx_broadcast, &es->rx_broadcast); 651 652 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 653 veb->stat_offsets_loaded, 654 &oes->tx_bytes, &es->tx_bytes); 655 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 656 veb->stat_offsets_loaded, 657 &oes->tx_unicast, &es->tx_unicast); 658 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 659 veb->stat_offsets_loaded, 660 &oes->tx_multicast, &es->tx_multicast); 661 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 662 veb->stat_offsets_loaded, 663 &oes->tx_broadcast, &es->tx_broadcast); 664 veb->stat_offsets_loaded = true; 665 } 666 667 #ifdef I40E_FCOE 668 /** 669 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 670 * @vsi: the VSI that is capable of doing FCoE 671 **/ 672 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 673 { 674 struct i40e_pf *pf = vsi->back; 675 struct i40e_hw *hw = &pf->hw; 676 struct i40e_fcoe_stats *ofs; 677 struct i40e_fcoe_stats *fs; /* device's eth stats */ 678 int idx; 679 680 if (vsi->type != I40E_VSI_FCOE) 681 return; 682 683 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET; 684 fs = &vsi->fcoe_stats; 685 ofs = &vsi->fcoe_stats_offsets; 686 687 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 688 vsi->fcoe_stat_offsets_loaded, 689 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 690 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 691 vsi->fcoe_stat_offsets_loaded, 692 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 693 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 694 vsi->fcoe_stat_offsets_loaded, 695 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 696 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 697 vsi->fcoe_stat_offsets_loaded, 698 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 699 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 700 vsi->fcoe_stat_offsets_loaded, 701 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 702 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 703 vsi->fcoe_stat_offsets_loaded, 704 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 705 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 706 vsi->fcoe_stat_offsets_loaded, 707 &ofs->fcoe_last_error, &fs->fcoe_last_error); 708 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 709 vsi->fcoe_stat_offsets_loaded, 710 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 711 712 vsi->fcoe_stat_offsets_loaded = true; 713 } 714 715 #endif 716 /** 717 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode 718 * @pf: the corresponding PF 719 * 720 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode 721 **/ 722 static void i40e_update_link_xoff_rx(struct i40e_pf *pf) 723 { 724 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 725 struct i40e_hw_port_stats *nsd = &pf->stats; 726 struct i40e_hw *hw = &pf->hw; 727 u64 xoff = 0; 728 u16 i, v; 729 730 if ((hw->fc.current_mode != I40E_FC_FULL) && 731 (hw->fc.current_mode != I40E_FC_RX_PAUSE)) 732 return; 733 734 xoff = nsd->link_xoff_rx; 735 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 736 pf->stat_offsets_loaded, 737 &osd->link_xoff_rx, &nsd->link_xoff_rx); 738 739 /* No new LFC xoff rx */ 740 if (!(nsd->link_xoff_rx - xoff)) 741 return; 742 743 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ 744 for (v = 0; v < pf->num_alloc_vsi; v++) { 745 struct i40e_vsi *vsi = pf->vsi[v]; 746 747 if (!vsi || !vsi->tx_rings[0]) 748 continue; 749 750 for (i = 0; i < vsi->num_queue_pairs; i++) { 751 struct i40e_ring *ring = vsi->tx_rings[i]; 752 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 753 } 754 } 755 } 756 757 /** 758 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode 759 * @pf: the corresponding PF 760 * 761 * Update the Rx XOFF counter (PAUSE frames) in PFC mode 762 **/ 763 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) 764 { 765 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 766 struct i40e_hw_port_stats *nsd = &pf->stats; 767 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; 768 struct i40e_dcbx_config *dcb_cfg; 769 struct i40e_hw *hw = &pf->hw; 770 u16 i, v; 771 u8 tc; 772 773 dcb_cfg = &hw->local_dcbx_config; 774 775 /* Collect Link XOFF stats when PFC is disabled */ 776 if (!dcb_cfg->pfc.pfcenable) { 777 i40e_update_link_xoff_rx(pf); 778 return; 779 } 780 781 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 782 u64 prio_xoff = nsd->priority_xoff_rx[i]; 783 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 784 pf->stat_offsets_loaded, 785 &osd->priority_xoff_rx[i], 786 &nsd->priority_xoff_rx[i]); 787 788 /* No new PFC xoff rx */ 789 if (!(nsd->priority_xoff_rx[i] - prio_xoff)) 790 continue; 791 /* Get the TC for given priority */ 792 tc = dcb_cfg->etscfg.prioritytable[i]; 793 xoff[tc] = true; 794 } 795 796 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ 797 for (v = 0; v < pf->num_alloc_vsi; v++) { 798 struct i40e_vsi *vsi = pf->vsi[v]; 799 800 if (!vsi || !vsi->tx_rings[0]) 801 continue; 802 803 for (i = 0; i < vsi->num_queue_pairs; i++) { 804 struct i40e_ring *ring = vsi->tx_rings[i]; 805 806 tc = ring->dcb_tc; 807 if (xoff[tc]) 808 clear_bit(__I40E_HANG_CHECK_ARMED, 809 &ring->state); 810 } 811 } 812 } 813 814 /** 815 * i40e_update_vsi_stats - Update the vsi statistics counters. 816 * @vsi: the VSI to be updated 817 * 818 * There are a few instances where we store the same stat in a 819 * couple of different structs. This is partly because we have 820 * the netdev stats that need to be filled out, which is slightly 821 * different from the "eth_stats" defined by the chip and used in 822 * VF communications. We sort it out here. 823 **/ 824 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 825 { 826 struct i40e_pf *pf = vsi->back; 827 struct rtnl_link_stats64 *ons; 828 struct rtnl_link_stats64 *ns; /* netdev stats */ 829 struct i40e_eth_stats *oes; 830 struct i40e_eth_stats *es; /* device's eth stats */ 831 u32 tx_restart, tx_busy; 832 struct i40e_ring *p; 833 u32 rx_page, rx_buf; 834 u64 bytes, packets; 835 unsigned int start; 836 u64 rx_p, rx_b; 837 u64 tx_p, tx_b; 838 u16 q; 839 840 if (test_bit(__I40E_DOWN, &vsi->state) || 841 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 842 return; 843 844 ns = i40e_get_vsi_stats_struct(vsi); 845 ons = &vsi->net_stats_offsets; 846 es = &vsi->eth_stats; 847 oes = &vsi->eth_stats_offsets; 848 849 /* Gather up the netdev and vsi stats that the driver collects 850 * on the fly during packet processing 851 */ 852 rx_b = rx_p = 0; 853 tx_b = tx_p = 0; 854 tx_restart = tx_busy = 0; 855 rx_page = 0; 856 rx_buf = 0; 857 rcu_read_lock(); 858 for (q = 0; q < vsi->num_queue_pairs; q++) { 859 /* locate Tx ring */ 860 p = ACCESS_ONCE(vsi->tx_rings[q]); 861 862 do { 863 start = u64_stats_fetch_begin_irq(&p->syncp); 864 packets = p->stats.packets; 865 bytes = p->stats.bytes; 866 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 867 tx_b += bytes; 868 tx_p += packets; 869 tx_restart += p->tx_stats.restart_queue; 870 tx_busy += p->tx_stats.tx_busy; 871 872 /* Rx queue is part of the same block as Tx queue */ 873 p = &p[1]; 874 do { 875 start = u64_stats_fetch_begin_irq(&p->syncp); 876 packets = p->stats.packets; 877 bytes = p->stats.bytes; 878 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 879 rx_b += bytes; 880 rx_p += packets; 881 rx_buf += p->rx_stats.alloc_buff_failed; 882 rx_page += p->rx_stats.alloc_page_failed; 883 } 884 rcu_read_unlock(); 885 vsi->tx_restart = tx_restart; 886 vsi->tx_busy = tx_busy; 887 vsi->rx_page_failed = rx_page; 888 vsi->rx_buf_failed = rx_buf; 889 890 ns->rx_packets = rx_p; 891 ns->rx_bytes = rx_b; 892 ns->tx_packets = tx_p; 893 ns->tx_bytes = tx_b; 894 895 /* update netdev stats from eth stats */ 896 i40e_update_eth_stats(vsi); 897 ons->tx_errors = oes->tx_errors; 898 ns->tx_errors = es->tx_errors; 899 ons->multicast = oes->rx_multicast; 900 ns->multicast = es->rx_multicast; 901 ons->rx_dropped = oes->rx_discards; 902 ns->rx_dropped = es->rx_discards; 903 ons->tx_dropped = oes->tx_discards; 904 ns->tx_dropped = es->tx_discards; 905 906 /* pull in a couple PF stats if this is the main vsi */ 907 if (vsi == pf->vsi[pf->lan_vsi]) { 908 ns->rx_crc_errors = pf->stats.crc_errors; 909 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 910 ns->rx_length_errors = pf->stats.rx_length_errors; 911 } 912 } 913 914 /** 915 * i40e_update_pf_stats - Update the PF statistics counters. 916 * @pf: the PF to be updated 917 **/ 918 static void i40e_update_pf_stats(struct i40e_pf *pf) 919 { 920 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 921 struct i40e_hw_port_stats *nsd = &pf->stats; 922 struct i40e_hw *hw = &pf->hw; 923 u32 val; 924 int i; 925 926 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 927 I40E_GLPRT_GORCL(hw->port), 928 pf->stat_offsets_loaded, 929 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 930 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 931 I40E_GLPRT_GOTCL(hw->port), 932 pf->stat_offsets_loaded, 933 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 934 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 935 pf->stat_offsets_loaded, 936 &osd->eth.rx_discards, 937 &nsd->eth.rx_discards); 938 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 939 I40E_GLPRT_UPRCL(hw->port), 940 pf->stat_offsets_loaded, 941 &osd->eth.rx_unicast, 942 &nsd->eth.rx_unicast); 943 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 944 I40E_GLPRT_MPRCL(hw->port), 945 pf->stat_offsets_loaded, 946 &osd->eth.rx_multicast, 947 &nsd->eth.rx_multicast); 948 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 949 I40E_GLPRT_BPRCL(hw->port), 950 pf->stat_offsets_loaded, 951 &osd->eth.rx_broadcast, 952 &nsd->eth.rx_broadcast); 953 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 954 I40E_GLPRT_UPTCL(hw->port), 955 pf->stat_offsets_loaded, 956 &osd->eth.tx_unicast, 957 &nsd->eth.tx_unicast); 958 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 959 I40E_GLPRT_MPTCL(hw->port), 960 pf->stat_offsets_loaded, 961 &osd->eth.tx_multicast, 962 &nsd->eth.tx_multicast); 963 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 964 I40E_GLPRT_BPTCL(hw->port), 965 pf->stat_offsets_loaded, 966 &osd->eth.tx_broadcast, 967 &nsd->eth.tx_broadcast); 968 969 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 970 pf->stat_offsets_loaded, 971 &osd->tx_dropped_link_down, 972 &nsd->tx_dropped_link_down); 973 974 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 975 pf->stat_offsets_loaded, 976 &osd->crc_errors, &nsd->crc_errors); 977 978 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 979 pf->stat_offsets_loaded, 980 &osd->illegal_bytes, &nsd->illegal_bytes); 981 982 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 983 pf->stat_offsets_loaded, 984 &osd->mac_local_faults, 985 &nsd->mac_local_faults); 986 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 987 pf->stat_offsets_loaded, 988 &osd->mac_remote_faults, 989 &nsd->mac_remote_faults); 990 991 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 992 pf->stat_offsets_loaded, 993 &osd->rx_length_errors, 994 &nsd->rx_length_errors); 995 996 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 997 pf->stat_offsets_loaded, 998 &osd->link_xon_rx, &nsd->link_xon_rx); 999 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 1000 pf->stat_offsets_loaded, 1001 &osd->link_xon_tx, &nsd->link_xon_tx); 1002 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ 1003 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 1004 pf->stat_offsets_loaded, 1005 &osd->link_xoff_tx, &nsd->link_xoff_tx); 1006 1007 for (i = 0; i < 8; i++) { 1008 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 1009 pf->stat_offsets_loaded, 1010 &osd->priority_xon_rx[i], 1011 &nsd->priority_xon_rx[i]); 1012 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 1013 pf->stat_offsets_loaded, 1014 &osd->priority_xon_tx[i], 1015 &nsd->priority_xon_tx[i]); 1016 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 1017 pf->stat_offsets_loaded, 1018 &osd->priority_xoff_tx[i], 1019 &nsd->priority_xoff_tx[i]); 1020 i40e_stat_update32(hw, 1021 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 1022 pf->stat_offsets_loaded, 1023 &osd->priority_xon_2_xoff[i], 1024 &nsd->priority_xon_2_xoff[i]); 1025 } 1026 1027 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1028 I40E_GLPRT_PRC64L(hw->port), 1029 pf->stat_offsets_loaded, 1030 &osd->rx_size_64, &nsd->rx_size_64); 1031 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1032 I40E_GLPRT_PRC127L(hw->port), 1033 pf->stat_offsets_loaded, 1034 &osd->rx_size_127, &nsd->rx_size_127); 1035 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1036 I40E_GLPRT_PRC255L(hw->port), 1037 pf->stat_offsets_loaded, 1038 &osd->rx_size_255, &nsd->rx_size_255); 1039 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1040 I40E_GLPRT_PRC511L(hw->port), 1041 pf->stat_offsets_loaded, 1042 &osd->rx_size_511, &nsd->rx_size_511); 1043 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1044 I40E_GLPRT_PRC1023L(hw->port), 1045 pf->stat_offsets_loaded, 1046 &osd->rx_size_1023, &nsd->rx_size_1023); 1047 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1048 I40E_GLPRT_PRC1522L(hw->port), 1049 pf->stat_offsets_loaded, 1050 &osd->rx_size_1522, &nsd->rx_size_1522); 1051 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1052 I40E_GLPRT_PRC9522L(hw->port), 1053 pf->stat_offsets_loaded, 1054 &osd->rx_size_big, &nsd->rx_size_big); 1055 1056 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1057 I40E_GLPRT_PTC64L(hw->port), 1058 pf->stat_offsets_loaded, 1059 &osd->tx_size_64, &nsd->tx_size_64); 1060 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1061 I40E_GLPRT_PTC127L(hw->port), 1062 pf->stat_offsets_loaded, 1063 &osd->tx_size_127, &nsd->tx_size_127); 1064 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1065 I40E_GLPRT_PTC255L(hw->port), 1066 pf->stat_offsets_loaded, 1067 &osd->tx_size_255, &nsd->tx_size_255); 1068 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1069 I40E_GLPRT_PTC511L(hw->port), 1070 pf->stat_offsets_loaded, 1071 &osd->tx_size_511, &nsd->tx_size_511); 1072 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1073 I40E_GLPRT_PTC1023L(hw->port), 1074 pf->stat_offsets_loaded, 1075 &osd->tx_size_1023, &nsd->tx_size_1023); 1076 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1077 I40E_GLPRT_PTC1522L(hw->port), 1078 pf->stat_offsets_loaded, 1079 &osd->tx_size_1522, &nsd->tx_size_1522); 1080 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1081 I40E_GLPRT_PTC9522L(hw->port), 1082 pf->stat_offsets_loaded, 1083 &osd->tx_size_big, &nsd->tx_size_big); 1084 1085 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1086 pf->stat_offsets_loaded, 1087 &osd->rx_undersize, &nsd->rx_undersize); 1088 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1089 pf->stat_offsets_loaded, 1090 &osd->rx_fragments, &nsd->rx_fragments); 1091 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1092 pf->stat_offsets_loaded, 1093 &osd->rx_oversize, &nsd->rx_oversize); 1094 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1095 pf->stat_offsets_loaded, 1096 &osd->rx_jabber, &nsd->rx_jabber); 1097 1098 /* FDIR stats */ 1099 i40e_stat_update32(hw, 1100 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)), 1101 pf->stat_offsets_loaded, 1102 &osd->fd_atr_match, &nsd->fd_atr_match); 1103 i40e_stat_update32(hw, 1104 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)), 1105 pf->stat_offsets_loaded, 1106 &osd->fd_sb_match, &nsd->fd_sb_match); 1107 i40e_stat_update32(hw, 1108 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)), 1109 pf->stat_offsets_loaded, 1110 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match); 1111 1112 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1113 nsd->tx_lpi_status = 1114 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1115 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1116 nsd->rx_lpi_status = 1117 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1118 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1119 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1120 pf->stat_offsets_loaded, 1121 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1122 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1123 pf->stat_offsets_loaded, 1124 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1125 1126 if (pf->flags & I40E_FLAG_FD_SB_ENABLED && 1127 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) 1128 nsd->fd_sb_status = true; 1129 else 1130 nsd->fd_sb_status = false; 1131 1132 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && 1133 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 1134 nsd->fd_atr_status = true; 1135 else 1136 nsd->fd_atr_status = false; 1137 1138 pf->stat_offsets_loaded = true; 1139 } 1140 1141 /** 1142 * i40e_update_stats - Update the various statistics counters. 1143 * @vsi: the VSI to be updated 1144 * 1145 * Update the various stats for this VSI and its related entities. 1146 **/ 1147 void i40e_update_stats(struct i40e_vsi *vsi) 1148 { 1149 struct i40e_pf *pf = vsi->back; 1150 1151 if (vsi == pf->vsi[pf->lan_vsi]) 1152 i40e_update_pf_stats(pf); 1153 1154 i40e_update_vsi_stats(vsi); 1155 #ifdef I40E_FCOE 1156 i40e_update_fcoe_stats(vsi); 1157 #endif 1158 } 1159 1160 /** 1161 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1162 * @vsi: the VSI to be searched 1163 * @macaddr: the MAC address 1164 * @vlan: the vlan 1165 * @is_vf: make sure its a VF filter, else doesn't matter 1166 * @is_netdev: make sure its a netdev filter, else doesn't matter 1167 * 1168 * Returns ptr to the filter object or NULL 1169 **/ 1170 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1171 u8 *macaddr, s16 vlan, 1172 bool is_vf, bool is_netdev) 1173 { 1174 struct i40e_mac_filter *f; 1175 1176 if (!vsi || !macaddr) 1177 return NULL; 1178 1179 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1180 if ((ether_addr_equal(macaddr, f->macaddr)) && 1181 (vlan == f->vlan) && 1182 (!is_vf || f->is_vf) && 1183 (!is_netdev || f->is_netdev)) 1184 return f; 1185 } 1186 return NULL; 1187 } 1188 1189 /** 1190 * i40e_find_mac - Find a mac addr in the macvlan filters list 1191 * @vsi: the VSI to be searched 1192 * @macaddr: the MAC address we are searching for 1193 * @is_vf: make sure its a VF filter, else doesn't matter 1194 * @is_netdev: make sure its a netdev filter, else doesn't matter 1195 * 1196 * Returns the first filter with the provided MAC address or NULL if 1197 * MAC address was not found 1198 **/ 1199 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, 1200 bool is_vf, bool is_netdev) 1201 { 1202 struct i40e_mac_filter *f; 1203 1204 if (!vsi || !macaddr) 1205 return NULL; 1206 1207 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1208 if ((ether_addr_equal(macaddr, f->macaddr)) && 1209 (!is_vf || f->is_vf) && 1210 (!is_netdev || f->is_netdev)) 1211 return f; 1212 } 1213 return NULL; 1214 } 1215 1216 /** 1217 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1218 * @vsi: the VSI to be searched 1219 * 1220 * Returns true if VSI is in vlan mode or false otherwise 1221 **/ 1222 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1223 { 1224 struct i40e_mac_filter *f; 1225 1226 /* Only -1 for all the filters denotes not in vlan mode 1227 * so we have to go through all the list in order to make sure 1228 */ 1229 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1230 if (f->vlan >= 0) 1231 return true; 1232 } 1233 1234 return false; 1235 } 1236 1237 /** 1238 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans 1239 * @vsi: the VSI to be searched 1240 * @macaddr: the mac address to be filtered 1241 * @is_vf: true if it is a VF 1242 * @is_netdev: true if it is a netdev 1243 * 1244 * Goes through all the macvlan filters and adds a 1245 * macvlan filter for each unique vlan that already exists 1246 * 1247 * Returns first filter found on success, else NULL 1248 **/ 1249 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1250 bool is_vf, bool is_netdev) 1251 { 1252 struct i40e_mac_filter *f; 1253 1254 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1255 if (!i40e_find_filter(vsi, macaddr, f->vlan, 1256 is_vf, is_netdev)) { 1257 if (!i40e_add_filter(vsi, macaddr, f->vlan, 1258 is_vf, is_netdev)) 1259 return NULL; 1260 } 1261 } 1262 1263 return list_first_entry_or_null(&vsi->mac_filter_list, 1264 struct i40e_mac_filter, list); 1265 } 1266 1267 /** 1268 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1269 * @vsi: the PF Main VSI - inappropriate for any other VSI 1270 * @macaddr: the MAC address 1271 * 1272 * Some older firmware configurations set up a default promiscuous VLAN 1273 * filter that needs to be removed. 1274 **/ 1275 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1276 { 1277 struct i40e_aqc_remove_macvlan_element_data element; 1278 struct i40e_pf *pf = vsi->back; 1279 i40e_status ret; 1280 1281 /* Only appropriate for the PF main VSI */ 1282 if (vsi->type != I40E_VSI_MAIN) 1283 return -EINVAL; 1284 1285 memset(&element, 0, sizeof(element)); 1286 ether_addr_copy(element.mac_addr, macaddr); 1287 element.vlan_tag = 0; 1288 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1289 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1290 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1291 if (ret) 1292 return -ENOENT; 1293 1294 return 0; 1295 } 1296 1297 /** 1298 * i40e_add_filter - Add a mac/vlan filter to the VSI 1299 * @vsi: the VSI to be searched 1300 * @macaddr: the MAC address 1301 * @vlan: the vlan 1302 * @is_vf: make sure its a VF filter, else doesn't matter 1303 * @is_netdev: make sure its a netdev filter, else doesn't matter 1304 * 1305 * Returns ptr to the filter object or NULL when no memory available. 1306 **/ 1307 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1308 u8 *macaddr, s16 vlan, 1309 bool is_vf, bool is_netdev) 1310 { 1311 struct i40e_mac_filter *f; 1312 1313 if (!vsi || !macaddr) 1314 return NULL; 1315 1316 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1317 if (!f) { 1318 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1319 if (!f) 1320 goto add_filter_out; 1321 1322 ether_addr_copy(f->macaddr, macaddr); 1323 f->vlan = vlan; 1324 f->changed = true; 1325 1326 INIT_LIST_HEAD(&f->list); 1327 list_add(&f->list, &vsi->mac_filter_list); 1328 } 1329 1330 /* increment counter and add a new flag if needed */ 1331 if (is_vf) { 1332 if (!f->is_vf) { 1333 f->is_vf = true; 1334 f->counter++; 1335 } 1336 } else if (is_netdev) { 1337 if (!f->is_netdev) { 1338 f->is_netdev = true; 1339 f->counter++; 1340 } 1341 } else { 1342 f->counter++; 1343 } 1344 1345 /* changed tells sync_filters_subtask to 1346 * push the filter down to the firmware 1347 */ 1348 if (f->changed) { 1349 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1350 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1351 } 1352 1353 add_filter_out: 1354 return f; 1355 } 1356 1357 /** 1358 * i40e_del_filter - Remove a mac/vlan filter from the VSI 1359 * @vsi: the VSI to be searched 1360 * @macaddr: the MAC address 1361 * @vlan: the vlan 1362 * @is_vf: make sure it's a VF filter, else doesn't matter 1363 * @is_netdev: make sure it's a netdev filter, else doesn't matter 1364 **/ 1365 void i40e_del_filter(struct i40e_vsi *vsi, 1366 u8 *macaddr, s16 vlan, 1367 bool is_vf, bool is_netdev) 1368 { 1369 struct i40e_mac_filter *f; 1370 1371 if (!vsi || !macaddr) 1372 return; 1373 1374 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1375 if (!f || f->counter == 0) 1376 return; 1377 1378 if (is_vf) { 1379 if (f->is_vf) { 1380 f->is_vf = false; 1381 f->counter--; 1382 } 1383 } else if (is_netdev) { 1384 if (f->is_netdev) { 1385 f->is_netdev = false; 1386 f->counter--; 1387 } 1388 } else { 1389 /* make sure we don't remove a filter in use by VF or netdev */ 1390 int min_f = 0; 1391 min_f += (f->is_vf ? 1 : 0); 1392 min_f += (f->is_netdev ? 1 : 0); 1393 1394 if (f->counter > min_f) 1395 f->counter--; 1396 } 1397 1398 /* counter == 0 tells sync_filters_subtask to 1399 * remove the filter from the firmware's list 1400 */ 1401 if (f->counter == 0) { 1402 f->changed = true; 1403 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1404 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1405 } 1406 } 1407 1408 /** 1409 * i40e_set_mac - NDO callback to set mac address 1410 * @netdev: network interface device structure 1411 * @p: pointer to an address structure 1412 * 1413 * Returns 0 on success, negative on failure 1414 **/ 1415 #ifdef I40E_FCOE 1416 int i40e_set_mac(struct net_device *netdev, void *p) 1417 #else 1418 static int i40e_set_mac(struct net_device *netdev, void *p) 1419 #endif 1420 { 1421 struct i40e_netdev_priv *np = netdev_priv(netdev); 1422 struct i40e_vsi *vsi = np->vsi; 1423 struct i40e_pf *pf = vsi->back; 1424 struct i40e_hw *hw = &pf->hw; 1425 struct sockaddr *addr = p; 1426 struct i40e_mac_filter *f; 1427 1428 if (!is_valid_ether_addr(addr->sa_data)) 1429 return -EADDRNOTAVAIL; 1430 1431 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1432 netdev_info(netdev, "already using mac address %pM\n", 1433 addr->sa_data); 1434 return 0; 1435 } 1436 1437 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1438 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1439 return -EADDRNOTAVAIL; 1440 1441 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1442 netdev_info(netdev, "returning to hw mac address %pM\n", 1443 hw->mac.addr); 1444 else 1445 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1446 1447 if (vsi->type == I40E_VSI_MAIN) { 1448 i40e_status ret; 1449 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1450 I40E_AQC_WRITE_TYPE_LAA_WOL, 1451 addr->sa_data, NULL); 1452 if (ret) { 1453 netdev_info(netdev, 1454 "Addr change for Main VSI failed: %d\n", 1455 ret); 1456 return -EADDRNOTAVAIL; 1457 } 1458 } 1459 1460 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) { 1461 struct i40e_aqc_remove_macvlan_element_data element; 1462 1463 memset(&element, 0, sizeof(element)); 1464 ether_addr_copy(element.mac_addr, netdev->dev_addr); 1465 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1466 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1467 } else { 1468 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 1469 false, false); 1470 } 1471 1472 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) { 1473 struct i40e_aqc_add_macvlan_element_data element; 1474 1475 memset(&element, 0, sizeof(element)); 1476 ether_addr_copy(element.mac_addr, hw->mac.addr); 1477 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 1478 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1479 } else { 1480 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, 1481 false, false); 1482 if (f) 1483 f->is_laa = true; 1484 } 1485 1486 i40e_sync_vsi_filters(vsi); 1487 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1488 1489 return 0; 1490 } 1491 1492 /** 1493 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1494 * @vsi: the VSI being setup 1495 * @ctxt: VSI context structure 1496 * @enabled_tc: Enabled TCs bitmap 1497 * @is_add: True if called before Add VSI 1498 * 1499 * Setup VSI queue mapping for enabled traffic classes. 1500 **/ 1501 #ifdef I40E_FCOE 1502 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1503 struct i40e_vsi_context *ctxt, 1504 u8 enabled_tc, 1505 bool is_add) 1506 #else 1507 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1508 struct i40e_vsi_context *ctxt, 1509 u8 enabled_tc, 1510 bool is_add) 1511 #endif 1512 { 1513 struct i40e_pf *pf = vsi->back; 1514 u16 sections = 0; 1515 u8 netdev_tc = 0; 1516 u16 numtc = 0; 1517 u16 qcount; 1518 u8 offset; 1519 u16 qmap; 1520 int i; 1521 u16 num_tc_qps = 0; 1522 1523 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1524 offset = 0; 1525 1526 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1527 /* Find numtc from enabled TC bitmap */ 1528 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1529 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */ 1530 numtc++; 1531 } 1532 if (!numtc) { 1533 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1534 numtc = 1; 1535 } 1536 } else { 1537 /* At least TC0 is enabled in case of non-DCB case */ 1538 numtc = 1; 1539 } 1540 1541 vsi->tc_config.numtc = numtc; 1542 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1543 /* Number of queues per enabled TC */ 1544 /* In MFP case we can have a much lower count of MSIx 1545 * vectors available and so we need to lower the used 1546 * q count. 1547 */ 1548 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix); 1549 num_tc_qps = qcount / numtc; 1550 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1551 1552 /* Setup queue offset/count for all TCs for given VSI */ 1553 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1554 /* See if the given TC is enabled for the given VSI */ 1555 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) { 1556 /* TC is enabled */ 1557 int pow, num_qps; 1558 1559 switch (vsi->type) { 1560 case I40E_VSI_MAIN: 1561 qcount = min_t(int, pf->rss_size, num_tc_qps); 1562 break; 1563 #ifdef I40E_FCOE 1564 case I40E_VSI_FCOE: 1565 qcount = num_tc_qps; 1566 break; 1567 #endif 1568 case I40E_VSI_FDIR: 1569 case I40E_VSI_SRIOV: 1570 case I40E_VSI_VMDQ2: 1571 default: 1572 qcount = num_tc_qps; 1573 WARN_ON(i != 0); 1574 break; 1575 } 1576 vsi->tc_config.tc_info[i].qoffset = offset; 1577 vsi->tc_config.tc_info[i].qcount = qcount; 1578 1579 /* find the next higher power-of-2 of num queue pairs */ 1580 num_qps = qcount; 1581 pow = 0; 1582 while (num_qps && (BIT_ULL(pow) < qcount)) { 1583 pow++; 1584 num_qps >>= 1; 1585 } 1586 1587 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1588 qmap = 1589 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1590 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1591 1592 offset += qcount; 1593 } else { 1594 /* TC is not enabled so set the offset to 1595 * default queue and allocate one queue 1596 * for the given TC. 1597 */ 1598 vsi->tc_config.tc_info[i].qoffset = 0; 1599 vsi->tc_config.tc_info[i].qcount = 1; 1600 vsi->tc_config.tc_info[i].netdev_tc = 0; 1601 1602 qmap = 0; 1603 } 1604 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1605 } 1606 1607 /* Set actual Tx/Rx queue pairs */ 1608 vsi->num_queue_pairs = offset; 1609 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1610 if (vsi->req_queue_pairs > 0) 1611 vsi->num_queue_pairs = vsi->req_queue_pairs; 1612 else 1613 vsi->num_queue_pairs = pf->num_lan_msix; 1614 } 1615 1616 /* Scheduler section valid can only be set for ADD VSI */ 1617 if (is_add) { 1618 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1619 1620 ctxt->info.up_enable_bits = enabled_tc; 1621 } 1622 if (vsi->type == I40E_VSI_SRIOV) { 1623 ctxt->info.mapping_flags |= 1624 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1625 for (i = 0; i < vsi->num_queue_pairs; i++) 1626 ctxt->info.queue_mapping[i] = 1627 cpu_to_le16(vsi->base_queue + i); 1628 } else { 1629 ctxt->info.mapping_flags |= 1630 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1631 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1632 } 1633 ctxt->info.valid_sections |= cpu_to_le16(sections); 1634 } 1635 1636 /** 1637 * i40e_set_rx_mode - NDO callback to set the netdev filters 1638 * @netdev: network interface device structure 1639 **/ 1640 #ifdef I40E_FCOE 1641 void i40e_set_rx_mode(struct net_device *netdev) 1642 #else 1643 static void i40e_set_rx_mode(struct net_device *netdev) 1644 #endif 1645 { 1646 struct i40e_netdev_priv *np = netdev_priv(netdev); 1647 struct i40e_mac_filter *f, *ftmp; 1648 struct i40e_vsi *vsi = np->vsi; 1649 struct netdev_hw_addr *uca; 1650 struct netdev_hw_addr *mca; 1651 struct netdev_hw_addr *ha; 1652 1653 /* add addr if not already in the filter list */ 1654 netdev_for_each_uc_addr(uca, netdev) { 1655 if (!i40e_find_mac(vsi, uca->addr, false, true)) { 1656 if (i40e_is_vsi_in_vlan(vsi)) 1657 i40e_put_mac_in_vlan(vsi, uca->addr, 1658 false, true); 1659 else 1660 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, 1661 false, true); 1662 } 1663 } 1664 1665 netdev_for_each_mc_addr(mca, netdev) { 1666 if (!i40e_find_mac(vsi, mca->addr, false, true)) { 1667 if (i40e_is_vsi_in_vlan(vsi)) 1668 i40e_put_mac_in_vlan(vsi, mca->addr, 1669 false, true); 1670 else 1671 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, 1672 false, true); 1673 } 1674 } 1675 1676 /* remove filter if not in netdev list */ 1677 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1678 bool found = false; 1679 1680 if (!f->is_netdev) 1681 continue; 1682 1683 if (is_multicast_ether_addr(f->macaddr)) { 1684 netdev_for_each_mc_addr(mca, netdev) { 1685 if (ether_addr_equal(mca->addr, f->macaddr)) { 1686 found = true; 1687 break; 1688 } 1689 } 1690 } else { 1691 netdev_for_each_uc_addr(uca, netdev) { 1692 if (ether_addr_equal(uca->addr, f->macaddr)) { 1693 found = true; 1694 break; 1695 } 1696 } 1697 1698 for_each_dev_addr(netdev, ha) { 1699 if (ether_addr_equal(ha->addr, f->macaddr)) { 1700 found = true; 1701 break; 1702 } 1703 } 1704 } 1705 if (!found) 1706 i40e_del_filter( 1707 vsi, f->macaddr, I40E_VLAN_ANY, false, true); 1708 } 1709 1710 /* check for other flag changes */ 1711 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1712 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1713 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1714 } 1715 } 1716 1717 /** 1718 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 1719 * @vsi: ptr to the VSI 1720 * 1721 * Push any outstanding VSI filter changes through the AdminQ. 1722 * 1723 * Returns 0 or error value 1724 **/ 1725 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 1726 { 1727 struct i40e_mac_filter *f, *ftmp; 1728 bool promisc_forced_on = false; 1729 bool add_happened = false; 1730 int filter_list_len = 0; 1731 u32 changed_flags = 0; 1732 i40e_status ret = 0; 1733 struct i40e_pf *pf; 1734 int num_add = 0; 1735 int num_del = 0; 1736 int aq_err = 0; 1737 u16 cmd_flags; 1738 1739 /* empty array typed pointers, kcalloc later */ 1740 struct i40e_aqc_add_macvlan_element_data *add_list; 1741 struct i40e_aqc_remove_macvlan_element_data *del_list; 1742 1743 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 1744 usleep_range(1000, 2000); 1745 pf = vsi->back; 1746 1747 if (vsi->netdev) { 1748 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 1749 vsi->current_netdev_flags = vsi->netdev->flags; 1750 } 1751 1752 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 1753 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 1754 1755 filter_list_len = pf->hw.aq.asq_buf_size / 1756 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1757 del_list = kcalloc(filter_list_len, 1758 sizeof(struct i40e_aqc_remove_macvlan_element_data), 1759 GFP_KERNEL); 1760 if (!del_list) 1761 return -ENOMEM; 1762 1763 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1764 if (!f->changed) 1765 continue; 1766 1767 if (f->counter != 0) 1768 continue; 1769 f->changed = false; 1770 cmd_flags = 0; 1771 1772 /* add to delete list */ 1773 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 1774 del_list[num_del].vlan_tag = 1775 cpu_to_le16((u16)(f->vlan == 1776 I40E_VLAN_ANY ? 0 : f->vlan)); 1777 1778 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1779 del_list[num_del].flags = cmd_flags; 1780 num_del++; 1781 1782 /* unlink from filter list */ 1783 list_del(&f->list); 1784 kfree(f); 1785 1786 /* flush a full buffer */ 1787 if (num_del == filter_list_len) { 1788 ret = i40e_aq_remove_macvlan(&pf->hw, 1789 vsi->seid, del_list, num_del, 1790 NULL); 1791 aq_err = pf->hw.aq.asq_last_status; 1792 num_del = 0; 1793 memset(del_list, 0, sizeof(*del_list)); 1794 1795 if (ret && aq_err != I40E_AQ_RC_ENOENT) 1796 dev_info(&pf->pdev->dev, 1797 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n", 1798 i40e_stat_str(&pf->hw, ret), 1799 i40e_aq_str(&pf->hw, aq_err)); 1800 } 1801 } 1802 if (num_del) { 1803 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, 1804 del_list, num_del, NULL); 1805 aq_err = pf->hw.aq.asq_last_status; 1806 num_del = 0; 1807 1808 if (ret && aq_err != I40E_AQ_RC_ENOENT) 1809 dev_info(&pf->pdev->dev, 1810 "ignoring delete macvlan error, err %s aq_err %s\n", 1811 i40e_stat_str(&pf->hw, ret), 1812 i40e_aq_str(&pf->hw, aq_err)); 1813 } 1814 1815 kfree(del_list); 1816 del_list = NULL; 1817 1818 /* do all the adds now */ 1819 filter_list_len = pf->hw.aq.asq_buf_size / 1820 sizeof(struct i40e_aqc_add_macvlan_element_data), 1821 add_list = kcalloc(filter_list_len, 1822 sizeof(struct i40e_aqc_add_macvlan_element_data), 1823 GFP_KERNEL); 1824 if (!add_list) 1825 return -ENOMEM; 1826 1827 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1828 if (!f->changed) 1829 continue; 1830 1831 if (f->counter == 0) 1832 continue; 1833 f->changed = false; 1834 add_happened = true; 1835 cmd_flags = 0; 1836 1837 /* add to add array */ 1838 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); 1839 add_list[num_add].vlan_tag = 1840 cpu_to_le16( 1841 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 1842 add_list[num_add].queue_number = 0; 1843 1844 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 1845 add_list[num_add].flags = cpu_to_le16(cmd_flags); 1846 num_add++; 1847 1848 /* flush a full buffer */ 1849 if (num_add == filter_list_len) { 1850 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1851 add_list, num_add, 1852 NULL); 1853 aq_err = pf->hw.aq.asq_last_status; 1854 num_add = 0; 1855 1856 if (ret) 1857 break; 1858 memset(add_list, 0, sizeof(*add_list)); 1859 } 1860 } 1861 if (num_add) { 1862 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1863 add_list, num_add, NULL); 1864 aq_err = pf->hw.aq.asq_last_status; 1865 num_add = 0; 1866 } 1867 kfree(add_list); 1868 add_list = NULL; 1869 1870 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) { 1871 dev_info(&pf->pdev->dev, 1872 "add filter failed, err %s aq_err %s\n", 1873 i40e_stat_str(&pf->hw, ret), 1874 i40e_aq_str(&pf->hw, aq_err)); 1875 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && 1876 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1877 &vsi->state)) { 1878 promisc_forced_on = true; 1879 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1880 &vsi->state); 1881 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); 1882 } 1883 } 1884 } 1885 1886 /* check for changes in promiscuous modes */ 1887 if (changed_flags & IFF_ALLMULTI) { 1888 bool cur_multipromisc; 1889 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 1890 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 1891 vsi->seid, 1892 cur_multipromisc, 1893 NULL); 1894 if (ret) 1895 dev_info(&pf->pdev->dev, 1896 "set multi promisc failed, err %s aq_err %s\n", 1897 i40e_stat_str(&pf->hw, ret), 1898 i40e_aq_str(&pf->hw, 1899 pf->hw.aq.asq_last_status)); 1900 } 1901 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { 1902 bool cur_promisc; 1903 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 1904 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1905 &vsi->state)); 1906 ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, 1907 vsi->seid, 1908 cur_promisc, NULL); 1909 if (ret) 1910 dev_info(&pf->pdev->dev, 1911 "set uni promisc failed, err %s, aq_err %s\n", 1912 i40e_stat_str(&pf->hw, ret), 1913 i40e_aq_str(&pf->hw, 1914 pf->hw.aq.asq_last_status)); 1915 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 1916 vsi->seid, 1917 cur_promisc, NULL); 1918 if (ret) 1919 dev_info(&pf->pdev->dev, 1920 "set brdcast promisc failed, err %s, aq_err %s\n", 1921 i40e_stat_str(&pf->hw, ret), 1922 i40e_aq_str(&pf->hw, 1923 pf->hw.aq.asq_last_status)); 1924 } 1925 1926 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 1927 return 0; 1928 } 1929 1930 /** 1931 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 1932 * @pf: board private structure 1933 **/ 1934 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 1935 { 1936 int v; 1937 1938 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 1939 return; 1940 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 1941 1942 for (v = 0; v < pf->num_alloc_vsi; v++) { 1943 if (pf->vsi[v] && 1944 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) 1945 i40e_sync_vsi_filters(pf->vsi[v]); 1946 } 1947 } 1948 1949 /** 1950 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 1951 * @netdev: network interface device structure 1952 * @new_mtu: new value for maximum frame size 1953 * 1954 * Returns 0 on success, negative on failure 1955 **/ 1956 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 1957 { 1958 struct i40e_netdev_priv *np = netdev_priv(netdev); 1959 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 1960 struct i40e_vsi *vsi = np->vsi; 1961 1962 /* MTU < 68 is an error and causes problems on some kernels */ 1963 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) 1964 return -EINVAL; 1965 1966 netdev_info(netdev, "changing MTU from %d to %d\n", 1967 netdev->mtu, new_mtu); 1968 netdev->mtu = new_mtu; 1969 if (netif_running(netdev)) 1970 i40e_vsi_reinit_locked(vsi); 1971 1972 return 0; 1973 } 1974 1975 /** 1976 * i40e_ioctl - Access the hwtstamp interface 1977 * @netdev: network interface device structure 1978 * @ifr: interface request data 1979 * @cmd: ioctl command 1980 **/ 1981 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 1982 { 1983 struct i40e_netdev_priv *np = netdev_priv(netdev); 1984 struct i40e_pf *pf = np->vsi->back; 1985 1986 switch (cmd) { 1987 case SIOCGHWTSTAMP: 1988 return i40e_ptp_get_ts_config(pf, ifr); 1989 case SIOCSHWTSTAMP: 1990 return i40e_ptp_set_ts_config(pf, ifr); 1991 default: 1992 return -EOPNOTSUPP; 1993 } 1994 } 1995 1996 /** 1997 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 1998 * @vsi: the vsi being adjusted 1999 **/ 2000 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 2001 { 2002 struct i40e_vsi_context ctxt; 2003 i40e_status ret; 2004 2005 if ((vsi->info.valid_sections & 2006 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2007 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 2008 return; /* already enabled */ 2009 2010 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2011 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2012 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 2013 2014 ctxt.seid = vsi->seid; 2015 ctxt.info = vsi->info; 2016 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2017 if (ret) { 2018 dev_info(&vsi->back->pdev->dev, 2019 "update vlan stripping failed, err %s aq_err %s\n", 2020 i40e_stat_str(&vsi->back->hw, ret), 2021 i40e_aq_str(&vsi->back->hw, 2022 vsi->back->hw.aq.asq_last_status)); 2023 } 2024 } 2025 2026 /** 2027 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2028 * @vsi: the vsi being adjusted 2029 **/ 2030 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2031 { 2032 struct i40e_vsi_context ctxt; 2033 i40e_status ret; 2034 2035 if ((vsi->info.valid_sections & 2036 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2037 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2038 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2039 return; /* already disabled */ 2040 2041 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2042 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2043 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2044 2045 ctxt.seid = vsi->seid; 2046 ctxt.info = vsi->info; 2047 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2048 if (ret) { 2049 dev_info(&vsi->back->pdev->dev, 2050 "update vlan stripping failed, err %s aq_err %s\n", 2051 i40e_stat_str(&vsi->back->hw, ret), 2052 i40e_aq_str(&vsi->back->hw, 2053 vsi->back->hw.aq.asq_last_status)); 2054 } 2055 } 2056 2057 /** 2058 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2059 * @netdev: network interface to be adjusted 2060 * @features: netdev features to test if VLAN offload is enabled or not 2061 **/ 2062 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2063 { 2064 struct i40e_netdev_priv *np = netdev_priv(netdev); 2065 struct i40e_vsi *vsi = np->vsi; 2066 2067 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2068 i40e_vlan_stripping_enable(vsi); 2069 else 2070 i40e_vlan_stripping_disable(vsi); 2071 } 2072 2073 /** 2074 * i40e_vsi_add_vlan - Add vsi membership for given vlan 2075 * @vsi: the vsi being configured 2076 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2077 **/ 2078 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) 2079 { 2080 struct i40e_mac_filter *f, *add_f; 2081 bool is_netdev, is_vf; 2082 2083 is_vf = (vsi->type == I40E_VSI_SRIOV); 2084 is_netdev = !!(vsi->netdev); 2085 2086 if (is_netdev) { 2087 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, 2088 is_vf, is_netdev); 2089 if (!add_f) { 2090 dev_info(&vsi->back->pdev->dev, 2091 "Could not add vlan filter %d for %pM\n", 2092 vid, vsi->netdev->dev_addr); 2093 return -ENOMEM; 2094 } 2095 } 2096 2097 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2098 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2099 if (!add_f) { 2100 dev_info(&vsi->back->pdev->dev, 2101 "Could not add vlan filter %d for %pM\n", 2102 vid, f->macaddr); 2103 return -ENOMEM; 2104 } 2105 } 2106 2107 /* Now if we add a vlan tag, make sure to check if it is the first 2108 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" 2109 * with 0, so we now accept untagged and specified tagged traffic 2110 * (and not any taged and untagged) 2111 */ 2112 if (vid > 0) { 2113 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, 2114 I40E_VLAN_ANY, 2115 is_vf, is_netdev)) { 2116 i40e_del_filter(vsi, vsi->netdev->dev_addr, 2117 I40E_VLAN_ANY, is_vf, is_netdev); 2118 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, 2119 is_vf, is_netdev); 2120 if (!add_f) { 2121 dev_info(&vsi->back->pdev->dev, 2122 "Could not add filter 0 for %pM\n", 2123 vsi->netdev->dev_addr); 2124 return -ENOMEM; 2125 } 2126 } 2127 } 2128 2129 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ 2130 if (vid > 0 && !vsi->info.pvid) { 2131 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2132 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2133 is_vf, is_netdev)) { 2134 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2135 is_vf, is_netdev); 2136 add_f = i40e_add_filter(vsi, f->macaddr, 2137 0, is_vf, is_netdev); 2138 if (!add_f) { 2139 dev_info(&vsi->back->pdev->dev, 2140 "Could not add filter 0 for %pM\n", 2141 f->macaddr); 2142 return -ENOMEM; 2143 } 2144 } 2145 } 2146 } 2147 2148 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2149 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2150 return 0; 2151 2152 return i40e_sync_vsi_filters(vsi); 2153 } 2154 2155 /** 2156 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan 2157 * @vsi: the vsi being configured 2158 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2159 * 2160 * Return: 0 on success or negative otherwise 2161 **/ 2162 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) 2163 { 2164 struct net_device *netdev = vsi->netdev; 2165 struct i40e_mac_filter *f, *add_f; 2166 bool is_vf, is_netdev; 2167 int filter_count = 0; 2168 2169 is_vf = (vsi->type == I40E_VSI_SRIOV); 2170 is_netdev = !!(netdev); 2171 2172 if (is_netdev) 2173 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); 2174 2175 list_for_each_entry(f, &vsi->mac_filter_list, list) 2176 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2177 2178 /* go through all the filters for this VSI and if there is only 2179 * vid == 0 it means there are no other filters, so vid 0 must 2180 * be replaced with -1. This signifies that we should from now 2181 * on accept any traffic (with any tag present, or untagged) 2182 */ 2183 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2184 if (is_netdev) { 2185 if (f->vlan && 2186 ether_addr_equal(netdev->dev_addr, f->macaddr)) 2187 filter_count++; 2188 } 2189 2190 if (f->vlan) 2191 filter_count++; 2192 } 2193 2194 if (!filter_count && is_netdev) { 2195 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); 2196 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 2197 is_vf, is_netdev); 2198 if (!f) { 2199 dev_info(&vsi->back->pdev->dev, 2200 "Could not add filter %d for %pM\n", 2201 I40E_VLAN_ANY, netdev->dev_addr); 2202 return -ENOMEM; 2203 } 2204 } 2205 2206 if (!filter_count) { 2207 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2208 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); 2209 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2210 is_vf, is_netdev); 2211 if (!add_f) { 2212 dev_info(&vsi->back->pdev->dev, 2213 "Could not add filter %d for %pM\n", 2214 I40E_VLAN_ANY, f->macaddr); 2215 return -ENOMEM; 2216 } 2217 } 2218 } 2219 2220 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2222 return 0; 2223 2224 return i40e_sync_vsi_filters(vsi); 2225 } 2226 2227 /** 2228 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2229 * @netdev: network interface to be adjusted 2230 * @vid: vlan id to be added 2231 * 2232 * net_device_ops implementation for adding vlan ids 2233 **/ 2234 #ifdef I40E_FCOE 2235 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2236 __always_unused __be16 proto, u16 vid) 2237 #else 2238 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2239 __always_unused __be16 proto, u16 vid) 2240 #endif 2241 { 2242 struct i40e_netdev_priv *np = netdev_priv(netdev); 2243 struct i40e_vsi *vsi = np->vsi; 2244 int ret = 0; 2245 2246 if (vid > 4095) 2247 return -EINVAL; 2248 2249 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); 2250 2251 /* If the network stack called us with vid = 0 then 2252 * it is asking to receive priority tagged packets with 2253 * vlan id 0. Our HW receives them by default when configured 2254 * to receive untagged packets so there is no need to add an 2255 * extra filter for vlan 0 tagged packets. 2256 */ 2257 if (vid) 2258 ret = i40e_vsi_add_vlan(vsi, vid); 2259 2260 if (!ret && (vid < VLAN_N_VID)) 2261 set_bit(vid, vsi->active_vlans); 2262 2263 return ret; 2264 } 2265 2266 /** 2267 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2268 * @netdev: network interface to be adjusted 2269 * @vid: vlan id to be removed 2270 * 2271 * net_device_ops implementation for removing vlan ids 2272 **/ 2273 #ifdef I40E_FCOE 2274 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2275 __always_unused __be16 proto, u16 vid) 2276 #else 2277 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2278 __always_unused __be16 proto, u16 vid) 2279 #endif 2280 { 2281 struct i40e_netdev_priv *np = netdev_priv(netdev); 2282 struct i40e_vsi *vsi = np->vsi; 2283 2284 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); 2285 2286 /* return code is ignored as there is nothing a user 2287 * can do about failure to remove and a log message was 2288 * already printed from the other function 2289 */ 2290 i40e_vsi_kill_vlan(vsi, vid); 2291 2292 clear_bit(vid, vsi->active_vlans); 2293 2294 return 0; 2295 } 2296 2297 /** 2298 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2299 * @vsi: the vsi being brought back up 2300 **/ 2301 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2302 { 2303 u16 vid; 2304 2305 if (!vsi->netdev) 2306 return; 2307 2308 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2309 2310 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2311 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2312 vid); 2313 } 2314 2315 /** 2316 * i40e_vsi_add_pvid - Add pvid for the VSI 2317 * @vsi: the vsi being adjusted 2318 * @vid: the vlan id to set as a PVID 2319 **/ 2320 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2321 { 2322 struct i40e_vsi_context ctxt; 2323 i40e_status ret; 2324 2325 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2326 vsi->info.pvid = cpu_to_le16(vid); 2327 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2328 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2329 I40E_AQ_VSI_PVLAN_EMOD_STR; 2330 2331 ctxt.seid = vsi->seid; 2332 ctxt.info = vsi->info; 2333 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2334 if (ret) { 2335 dev_info(&vsi->back->pdev->dev, 2336 "add pvid failed, err %s aq_err %s\n", 2337 i40e_stat_str(&vsi->back->hw, ret), 2338 i40e_aq_str(&vsi->back->hw, 2339 vsi->back->hw.aq.asq_last_status)); 2340 return -ENOENT; 2341 } 2342 2343 return 0; 2344 } 2345 2346 /** 2347 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2348 * @vsi: the vsi being adjusted 2349 * 2350 * Just use the vlan_rx_register() service to put it back to normal 2351 **/ 2352 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2353 { 2354 i40e_vlan_stripping_disable(vsi); 2355 2356 vsi->info.pvid = 0; 2357 } 2358 2359 /** 2360 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2361 * @vsi: ptr to the VSI 2362 * 2363 * If this function returns with an error, then it's possible one or 2364 * more of the rings is populated (while the rest are not). It is the 2365 * callers duty to clean those orphaned rings. 2366 * 2367 * Return 0 on success, negative on failure 2368 **/ 2369 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2370 { 2371 int i, err = 0; 2372 2373 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2374 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2375 2376 return err; 2377 } 2378 2379 /** 2380 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2381 * @vsi: ptr to the VSI 2382 * 2383 * Free VSI's transmit software resources 2384 **/ 2385 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2386 { 2387 int i; 2388 2389 if (!vsi->tx_rings) 2390 return; 2391 2392 for (i = 0; i < vsi->num_queue_pairs; i++) 2393 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2394 i40e_free_tx_resources(vsi->tx_rings[i]); 2395 } 2396 2397 /** 2398 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2399 * @vsi: ptr to the VSI 2400 * 2401 * If this function returns with an error, then it's possible one or 2402 * more of the rings is populated (while the rest are not). It is the 2403 * callers duty to clean those orphaned rings. 2404 * 2405 * Return 0 on success, negative on failure 2406 **/ 2407 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2408 { 2409 int i, err = 0; 2410 2411 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2412 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2413 #ifdef I40E_FCOE 2414 i40e_fcoe_setup_ddp_resources(vsi); 2415 #endif 2416 return err; 2417 } 2418 2419 /** 2420 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2421 * @vsi: ptr to the VSI 2422 * 2423 * Free all receive software resources 2424 **/ 2425 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2426 { 2427 int i; 2428 2429 if (!vsi->rx_rings) 2430 return; 2431 2432 for (i = 0; i < vsi->num_queue_pairs; i++) 2433 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2434 i40e_free_rx_resources(vsi->rx_rings[i]); 2435 #ifdef I40E_FCOE 2436 i40e_fcoe_free_ddp_resources(vsi); 2437 #endif 2438 } 2439 2440 /** 2441 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2442 * @ring: The Tx ring to configure 2443 * 2444 * This enables/disables XPS for a given Tx descriptor ring 2445 * based on the TCs enabled for the VSI that ring belongs to. 2446 **/ 2447 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2448 { 2449 struct i40e_vsi *vsi = ring->vsi; 2450 cpumask_var_t mask; 2451 2452 if (!ring->q_vector || !ring->netdev) 2453 return; 2454 2455 /* Single TC mode enable XPS */ 2456 if (vsi->tc_config.numtc <= 1) { 2457 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) 2458 netif_set_xps_queue(ring->netdev, 2459 &ring->q_vector->affinity_mask, 2460 ring->queue_index); 2461 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2462 /* Disable XPS to allow selection based on TC */ 2463 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2464 netif_set_xps_queue(ring->netdev, mask, ring->queue_index); 2465 free_cpumask_var(mask); 2466 } 2467 } 2468 2469 /** 2470 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2471 * @ring: The Tx ring to configure 2472 * 2473 * Configure the Tx descriptor ring in the HMC context. 2474 **/ 2475 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2476 { 2477 struct i40e_vsi *vsi = ring->vsi; 2478 u16 pf_q = vsi->base_queue + ring->queue_index; 2479 struct i40e_hw *hw = &vsi->back->hw; 2480 struct i40e_hmc_obj_txq tx_ctx; 2481 i40e_status err = 0; 2482 u32 qtx_ctl = 0; 2483 2484 /* some ATR related tx ring init */ 2485 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 2486 ring->atr_sample_rate = vsi->back->atr_sample_rate; 2487 ring->atr_count = 0; 2488 } else { 2489 ring->atr_sample_rate = 0; 2490 } 2491 2492 /* configure XPS */ 2493 i40e_config_xps_tx_ring(ring); 2494 2495 /* clear the context structure first */ 2496 memset(&tx_ctx, 0, sizeof(tx_ctx)); 2497 2498 tx_ctx.new_context = 1; 2499 tx_ctx.base = (ring->dma / 128); 2500 tx_ctx.qlen = ring->count; 2501 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 2502 I40E_FLAG_FD_ATR_ENABLED)); 2503 #ifdef I40E_FCOE 2504 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2505 #endif 2506 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 2507 /* FDIR VSI tx ring can still use RS bit and writebacks */ 2508 if (vsi->type != I40E_VSI_FDIR) 2509 tx_ctx.head_wb_ena = 1; 2510 tx_ctx.head_wb_addr = ring->dma + 2511 (ring->count * sizeof(struct i40e_tx_desc)); 2512 2513 /* As part of VSI creation/update, FW allocates certain 2514 * Tx arbitration queue sets for each TC enabled for 2515 * the VSI. The FW returns the handles to these queue 2516 * sets as part of the response buffer to Add VSI, 2517 * Update VSI, etc. AQ commands. It is expected that 2518 * these queue set handles be associated with the Tx 2519 * queues by the driver as part of the TX queue context 2520 * initialization. This has to be done regardless of 2521 * DCB as by default everything is mapped to TC0. 2522 */ 2523 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 2524 tx_ctx.rdylist_act = 0; 2525 2526 /* clear the context in the HMC */ 2527 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 2528 if (err) { 2529 dev_info(&vsi->back->pdev->dev, 2530 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 2531 ring->queue_index, pf_q, err); 2532 return -ENOMEM; 2533 } 2534 2535 /* set the context in the HMC */ 2536 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 2537 if (err) { 2538 dev_info(&vsi->back->pdev->dev, 2539 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 2540 ring->queue_index, pf_q, err); 2541 return -ENOMEM; 2542 } 2543 2544 /* Now associate this queue with this PCI function */ 2545 if (vsi->type == I40E_VSI_VMDQ2) { 2546 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 2547 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 2548 I40E_QTX_CTL_VFVM_INDX_MASK; 2549 } else { 2550 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 2551 } 2552 2553 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 2554 I40E_QTX_CTL_PF_INDX_MASK); 2555 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 2556 i40e_flush(hw); 2557 2558 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 2559 2560 /* cache tail off for easier writes later */ 2561 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 2562 2563 return 0; 2564 } 2565 2566 /** 2567 * i40e_configure_rx_ring - Configure a receive ring context 2568 * @ring: The Rx ring to configure 2569 * 2570 * Configure the Rx descriptor ring in the HMC context. 2571 **/ 2572 static int i40e_configure_rx_ring(struct i40e_ring *ring) 2573 { 2574 struct i40e_vsi *vsi = ring->vsi; 2575 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 2576 u16 pf_q = vsi->base_queue + ring->queue_index; 2577 struct i40e_hw *hw = &vsi->back->hw; 2578 struct i40e_hmc_obj_rxq rx_ctx; 2579 i40e_status err = 0; 2580 2581 ring->state = 0; 2582 2583 /* clear the context structure first */ 2584 memset(&rx_ctx, 0, sizeof(rx_ctx)); 2585 2586 ring->rx_buf_len = vsi->rx_buf_len; 2587 ring->rx_hdr_len = vsi->rx_hdr_len; 2588 2589 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 2590 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; 2591 2592 rx_ctx.base = (ring->dma / 128); 2593 rx_ctx.qlen = ring->count; 2594 2595 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { 2596 set_ring_16byte_desc_enabled(ring); 2597 rx_ctx.dsize = 0; 2598 } else { 2599 rx_ctx.dsize = 1; 2600 } 2601 2602 rx_ctx.dtype = vsi->dtype; 2603 if (vsi->dtype) { 2604 set_ring_ps_enabled(ring); 2605 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | 2606 I40E_RX_SPLIT_IP | 2607 I40E_RX_SPLIT_TCP_UDP | 2608 I40E_RX_SPLIT_SCTP; 2609 } else { 2610 rx_ctx.hsplit_0 = 0; 2611 } 2612 2613 rx_ctx.rxmax = min_t(u16, vsi->max_frame, 2614 (chain_len * ring->rx_buf_len)); 2615 if (hw->revision_id == 0) 2616 rx_ctx.lrxqthresh = 0; 2617 else 2618 rx_ctx.lrxqthresh = 2; 2619 rx_ctx.crcstrip = 1; 2620 rx_ctx.l2tsel = 1; 2621 rx_ctx.showiv = 1; 2622 #ifdef I40E_FCOE 2623 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2624 #endif 2625 /* set the prefena field to 1 because the manual says to */ 2626 rx_ctx.prefena = 1; 2627 2628 /* clear the context in the HMC */ 2629 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2630 if (err) { 2631 dev_info(&vsi->back->pdev->dev, 2632 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2633 ring->queue_index, pf_q, err); 2634 return -ENOMEM; 2635 } 2636 2637 /* set the context in the HMC */ 2638 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 2639 if (err) { 2640 dev_info(&vsi->back->pdev->dev, 2641 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2642 ring->queue_index, pf_q, err); 2643 return -ENOMEM; 2644 } 2645 2646 /* cache tail for quicker writes, and clear the reg before use */ 2647 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 2648 writel(0, ring->tail); 2649 2650 if (ring_is_ps_enabled(ring)) { 2651 i40e_alloc_rx_headers(ring); 2652 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring)); 2653 } else { 2654 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring)); 2655 } 2656 2657 return 0; 2658 } 2659 2660 /** 2661 * i40e_vsi_configure_tx - Configure the VSI for Tx 2662 * @vsi: VSI structure describing this set of rings and resources 2663 * 2664 * Configure the Tx VSI for operation. 2665 **/ 2666 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 2667 { 2668 int err = 0; 2669 u16 i; 2670 2671 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 2672 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 2673 2674 return err; 2675 } 2676 2677 /** 2678 * i40e_vsi_configure_rx - Configure the VSI for Rx 2679 * @vsi: the VSI being configured 2680 * 2681 * Configure the Rx VSI for operation. 2682 **/ 2683 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 2684 { 2685 int err = 0; 2686 u16 i; 2687 2688 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 2689 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 2690 + ETH_FCS_LEN + VLAN_HLEN; 2691 else 2692 vsi->max_frame = I40E_RXBUFFER_2048; 2693 2694 /* figure out correct receive buffer length */ 2695 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | 2696 I40E_FLAG_RX_PS_ENABLED)) { 2697 case I40E_FLAG_RX_1BUF_ENABLED: 2698 vsi->rx_hdr_len = 0; 2699 vsi->rx_buf_len = vsi->max_frame; 2700 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2701 break; 2702 case I40E_FLAG_RX_PS_ENABLED: 2703 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2704 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2705 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; 2706 break; 2707 default: 2708 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2709 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2710 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; 2711 break; 2712 } 2713 2714 #ifdef I40E_FCOE 2715 /* setup rx buffer for FCoE */ 2716 if ((vsi->type == I40E_VSI_FCOE) && 2717 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 2718 vsi->rx_hdr_len = 0; 2719 vsi->rx_buf_len = I40E_RXBUFFER_3072; 2720 vsi->max_frame = I40E_RXBUFFER_3072; 2721 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2722 } 2723 2724 #endif /* I40E_FCOE */ 2725 /* round up for the chip's needs */ 2726 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, 2727 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT)); 2728 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 2729 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); 2730 2731 /* set up individual rings */ 2732 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2733 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 2734 2735 return err; 2736 } 2737 2738 /** 2739 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 2740 * @vsi: ptr to the VSI 2741 **/ 2742 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2743 { 2744 struct i40e_ring *tx_ring, *rx_ring; 2745 u16 qoffset, qcount; 2746 int i, n; 2747 2748 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 2749 /* Reset the TC information */ 2750 for (i = 0; i < vsi->num_queue_pairs; i++) { 2751 rx_ring = vsi->rx_rings[i]; 2752 tx_ring = vsi->tx_rings[i]; 2753 rx_ring->dcb_tc = 0; 2754 tx_ring->dcb_tc = 0; 2755 } 2756 } 2757 2758 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2759 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) 2760 continue; 2761 2762 qoffset = vsi->tc_config.tc_info[n].qoffset; 2763 qcount = vsi->tc_config.tc_info[n].qcount; 2764 for (i = qoffset; i < (qoffset + qcount); i++) { 2765 rx_ring = vsi->rx_rings[i]; 2766 tx_ring = vsi->tx_rings[i]; 2767 rx_ring->dcb_tc = n; 2768 tx_ring->dcb_tc = n; 2769 } 2770 } 2771 } 2772 2773 /** 2774 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 2775 * @vsi: ptr to the VSI 2776 **/ 2777 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 2778 { 2779 if (vsi->netdev) 2780 i40e_set_rx_mode(vsi->netdev); 2781 } 2782 2783 /** 2784 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 2785 * @vsi: Pointer to the targeted VSI 2786 * 2787 * This function replays the hlist on the hw where all the SB Flow Director 2788 * filters were saved. 2789 **/ 2790 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 2791 { 2792 struct i40e_fdir_filter *filter; 2793 struct i40e_pf *pf = vsi->back; 2794 struct hlist_node *node; 2795 2796 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 2797 return; 2798 2799 hlist_for_each_entry_safe(filter, node, 2800 &pf->fdir_filter_list, fdir_node) { 2801 i40e_add_del_fdir(vsi, filter, true); 2802 } 2803 } 2804 2805 /** 2806 * i40e_vsi_configure - Set up the VSI for action 2807 * @vsi: the VSI being configured 2808 **/ 2809 static int i40e_vsi_configure(struct i40e_vsi *vsi) 2810 { 2811 int err; 2812 2813 i40e_set_vsi_rx_mode(vsi); 2814 i40e_restore_vlan(vsi); 2815 i40e_vsi_config_dcb_rings(vsi); 2816 err = i40e_vsi_configure_tx(vsi); 2817 if (!err) 2818 err = i40e_vsi_configure_rx(vsi); 2819 2820 return err; 2821 } 2822 2823 /** 2824 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 2825 * @vsi: the VSI being configured 2826 **/ 2827 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 2828 { 2829 struct i40e_pf *pf = vsi->back; 2830 struct i40e_q_vector *q_vector; 2831 struct i40e_hw *hw = &pf->hw; 2832 u16 vector; 2833 int i, q; 2834 u32 val; 2835 u32 qp; 2836 2837 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 2838 * and PFINT_LNKLSTn registers, e.g.: 2839 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 2840 */ 2841 qp = vsi->base_queue; 2842 vector = vsi->base_vector; 2843 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 2844 q_vector = vsi->q_vectors[i]; 2845 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2846 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2847 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 2848 q_vector->rx.itr); 2849 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2850 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2851 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 2852 q_vector->tx.itr); 2853 2854 /* Linked list for the queuepairs assigned to this vector */ 2855 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 2856 for (q = 0; q < q_vector->num_ringpairs; q++) { 2857 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2858 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2859 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 2860 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 2861 (I40E_QUEUE_TYPE_TX 2862 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 2863 2864 wr32(hw, I40E_QINT_RQCTL(qp), val); 2865 2866 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2867 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2868 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 2869 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 2870 (I40E_QUEUE_TYPE_RX 2871 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2872 2873 /* Terminate the linked list */ 2874 if (q == (q_vector->num_ringpairs - 1)) 2875 val |= (I40E_QUEUE_END_OF_LIST 2876 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2877 2878 wr32(hw, I40E_QINT_TQCTL(qp), val); 2879 qp++; 2880 } 2881 } 2882 2883 i40e_flush(hw); 2884 } 2885 2886 /** 2887 * i40e_enable_misc_int_causes - enable the non-queue interrupts 2888 * @hw: ptr to the hardware info 2889 **/ 2890 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 2891 { 2892 struct i40e_hw *hw = &pf->hw; 2893 u32 val; 2894 2895 /* clear things first */ 2896 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 2897 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 2898 2899 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 2900 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 2901 I40E_PFINT_ICR0_ENA_GRST_MASK | 2902 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 2903 I40E_PFINT_ICR0_ENA_GPIO_MASK | 2904 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 2905 I40E_PFINT_ICR0_ENA_VFLR_MASK | 2906 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 2907 2908 if (pf->flags & I40E_FLAG_PTP) 2909 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 2910 2911 wr32(hw, I40E_PFINT_ICR0_ENA, val); 2912 2913 /* SW_ITR_IDX = 0, but don't change INTENA */ 2914 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 2915 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 2916 2917 /* OTHER_ITR_IDX = 0 */ 2918 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 2919 } 2920 2921 /** 2922 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 2923 * @vsi: the VSI being configured 2924 **/ 2925 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 2926 { 2927 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 2928 struct i40e_pf *pf = vsi->back; 2929 struct i40e_hw *hw = &pf->hw; 2930 u32 val; 2931 2932 /* set the ITR configuration */ 2933 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2934 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2935 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 2936 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2937 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2938 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 2939 2940 i40e_enable_misc_int_causes(pf); 2941 2942 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 2943 wr32(hw, I40E_PFINT_LNKLST0, 0); 2944 2945 /* Associate the queue pair to the vector and enable the queue int */ 2946 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2947 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2948 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2949 2950 wr32(hw, I40E_QINT_RQCTL(0), val); 2951 2952 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2953 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2954 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2955 2956 wr32(hw, I40E_QINT_TQCTL(0), val); 2957 i40e_flush(hw); 2958 } 2959 2960 /** 2961 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 2962 * @pf: board private structure 2963 **/ 2964 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 2965 { 2966 struct i40e_hw *hw = &pf->hw; 2967 2968 wr32(hw, I40E_PFINT_DYN_CTL0, 2969 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2970 i40e_flush(hw); 2971 } 2972 2973 /** 2974 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 2975 * @pf: board private structure 2976 **/ 2977 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 2978 { 2979 struct i40e_hw *hw = &pf->hw; 2980 u32 val; 2981 2982 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 2983 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 2984 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 2985 2986 wr32(hw, I40E_PFINT_DYN_CTL0, val); 2987 i40e_flush(hw); 2988 } 2989 2990 /** 2991 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 2992 * @vsi: pointer to a vsi 2993 * @vector: enable a particular Hw Interrupt vector 2994 **/ 2995 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 2996 { 2997 struct i40e_pf *pf = vsi->back; 2998 struct i40e_hw *hw = &pf->hw; 2999 u32 val; 3000 3001 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 3002 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 3003 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 3004 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 3005 /* skip the flush */ 3006 } 3007 3008 /** 3009 * i40e_irq_dynamic_disable - Disable default interrupt generation settings 3010 * @vsi: pointer to a vsi 3011 * @vector: disable a particular Hw Interrupt vector 3012 **/ 3013 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector) 3014 { 3015 struct i40e_pf *pf = vsi->back; 3016 struct i40e_hw *hw = &pf->hw; 3017 u32 val; 3018 3019 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT; 3020 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 3021 i40e_flush(hw); 3022 } 3023 3024 /** 3025 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 3026 * @irq: interrupt number 3027 * @data: pointer to a q_vector 3028 **/ 3029 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3030 { 3031 struct i40e_q_vector *q_vector = data; 3032 3033 if (!q_vector->tx.ring && !q_vector->rx.ring) 3034 return IRQ_HANDLED; 3035 3036 napi_schedule(&q_vector->napi); 3037 3038 return IRQ_HANDLED; 3039 } 3040 3041 /** 3042 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3043 * @vsi: the VSI being configured 3044 * @basename: name for the vector 3045 * 3046 * Allocates MSI-X vectors and requests interrupts from the kernel. 3047 **/ 3048 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3049 { 3050 int q_vectors = vsi->num_q_vectors; 3051 struct i40e_pf *pf = vsi->back; 3052 int base = vsi->base_vector; 3053 int rx_int_idx = 0; 3054 int tx_int_idx = 0; 3055 int vector, err; 3056 3057 for (vector = 0; vector < q_vectors; vector++) { 3058 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3059 3060 if (q_vector->tx.ring && q_vector->rx.ring) { 3061 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3062 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3063 tx_int_idx++; 3064 } else if (q_vector->rx.ring) { 3065 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3066 "%s-%s-%d", basename, "rx", rx_int_idx++); 3067 } else if (q_vector->tx.ring) { 3068 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3069 "%s-%s-%d", basename, "tx", tx_int_idx++); 3070 } else { 3071 /* skip this unused q_vector */ 3072 continue; 3073 } 3074 err = request_irq(pf->msix_entries[base + vector].vector, 3075 vsi->irq_handler, 3076 0, 3077 q_vector->name, 3078 q_vector); 3079 if (err) { 3080 dev_info(&pf->pdev->dev, 3081 "%s: request_irq failed, error: %d\n", 3082 __func__, err); 3083 goto free_queue_irqs; 3084 } 3085 /* assign the mask for this irq */ 3086 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3087 &q_vector->affinity_mask); 3088 } 3089 3090 vsi->irqs_ready = true; 3091 return 0; 3092 3093 free_queue_irqs: 3094 while (vector) { 3095 vector--; 3096 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3097 NULL); 3098 free_irq(pf->msix_entries[base + vector].vector, 3099 &(vsi->q_vectors[vector])); 3100 } 3101 return err; 3102 } 3103 3104 /** 3105 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3106 * @vsi: the VSI being un-configured 3107 **/ 3108 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3109 { 3110 struct i40e_pf *pf = vsi->back; 3111 struct i40e_hw *hw = &pf->hw; 3112 int base = vsi->base_vector; 3113 int i; 3114 3115 for (i = 0; i < vsi->num_queue_pairs; i++) { 3116 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3117 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3118 } 3119 3120 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3121 for (i = vsi->base_vector; 3122 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3123 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3124 3125 i40e_flush(hw); 3126 for (i = 0; i < vsi->num_q_vectors; i++) 3127 synchronize_irq(pf->msix_entries[i + base].vector); 3128 } else { 3129 /* Legacy and MSI mode - this stops all interrupt handling */ 3130 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3131 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3132 i40e_flush(hw); 3133 synchronize_irq(pf->pdev->irq); 3134 } 3135 } 3136 3137 /** 3138 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3139 * @vsi: the VSI being configured 3140 **/ 3141 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3142 { 3143 struct i40e_pf *pf = vsi->back; 3144 int i; 3145 3146 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3147 for (i = vsi->base_vector; 3148 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3149 i40e_irq_dynamic_enable(vsi, i); 3150 } else { 3151 i40e_irq_dynamic_enable_icr0(pf); 3152 } 3153 3154 i40e_flush(&pf->hw); 3155 return 0; 3156 } 3157 3158 /** 3159 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3160 * @pf: board private structure 3161 **/ 3162 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3163 { 3164 /* Disable ICR 0 */ 3165 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3166 i40e_flush(&pf->hw); 3167 } 3168 3169 /** 3170 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3171 * @irq: interrupt number 3172 * @data: pointer to a q_vector 3173 * 3174 * This is the handler used for all MSI/Legacy interrupts, and deals 3175 * with both queue and non-queue interrupts. This is also used in 3176 * MSIX mode to handle the non-queue interrupts. 3177 **/ 3178 static irqreturn_t i40e_intr(int irq, void *data) 3179 { 3180 struct i40e_pf *pf = (struct i40e_pf *)data; 3181 struct i40e_hw *hw = &pf->hw; 3182 irqreturn_t ret = IRQ_NONE; 3183 u32 icr0, icr0_remaining; 3184 u32 val, ena_mask; 3185 3186 icr0 = rd32(hw, I40E_PFINT_ICR0); 3187 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3188 3189 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3190 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3191 goto enable_intr; 3192 3193 /* if interrupt but no bits showing, must be SWINT */ 3194 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3195 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3196 pf->sw_int_count++; 3197 3198 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3199 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3200 3201 /* temporarily disable queue cause for NAPI processing */ 3202 u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); 3203 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3204 wr32(hw, I40E_QINT_RQCTL(0), qval); 3205 3206 qval = rd32(hw, I40E_QINT_TQCTL(0)); 3207 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3208 wr32(hw, I40E_QINT_TQCTL(0), qval); 3209 3210 if (!test_bit(__I40E_DOWN, &pf->state)) 3211 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); 3212 } 3213 3214 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3215 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3216 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3217 } 3218 3219 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3220 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3221 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3222 } 3223 3224 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3225 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3226 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3227 } 3228 3229 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3230 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3231 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3232 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3233 val = rd32(hw, I40E_GLGEN_RSTAT); 3234 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3235 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3236 if (val == I40E_RESET_CORER) { 3237 pf->corer_count++; 3238 } else if (val == I40E_RESET_GLOBR) { 3239 pf->globr_count++; 3240 } else if (val == I40E_RESET_EMPR) { 3241 pf->empr_count++; 3242 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); 3243 } 3244 } 3245 3246 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3247 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3248 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3249 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3250 rd32(hw, I40E_PFHMC_ERRORINFO), 3251 rd32(hw, I40E_PFHMC_ERRORDATA)); 3252 } 3253 3254 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3255 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3256 3257 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3258 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3259 i40e_ptp_tx_hwtstamp(pf); 3260 } 3261 } 3262 3263 /* If a critical error is pending we have no choice but to reset the 3264 * device. 3265 * Report and mask out any remaining unexpected interrupts. 3266 */ 3267 icr0_remaining = icr0 & ena_mask; 3268 if (icr0_remaining) { 3269 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3270 icr0_remaining); 3271 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3272 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3273 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3274 dev_info(&pf->pdev->dev, "device will be reset\n"); 3275 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3276 i40e_service_event_schedule(pf); 3277 } 3278 ena_mask &= ~icr0_remaining; 3279 } 3280 ret = IRQ_HANDLED; 3281 3282 enable_intr: 3283 /* re-enable interrupt causes */ 3284 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3285 if (!test_bit(__I40E_DOWN, &pf->state)) { 3286 i40e_service_event_schedule(pf); 3287 i40e_irq_dynamic_enable_icr0(pf); 3288 } 3289 3290 return ret; 3291 } 3292 3293 /** 3294 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3295 * @tx_ring: tx ring to clean 3296 * @budget: how many cleans we're allowed 3297 * 3298 * Returns true if there's any budget left (e.g. the clean is finished) 3299 **/ 3300 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3301 { 3302 struct i40e_vsi *vsi = tx_ring->vsi; 3303 u16 i = tx_ring->next_to_clean; 3304 struct i40e_tx_buffer *tx_buf; 3305 struct i40e_tx_desc *tx_desc; 3306 3307 tx_buf = &tx_ring->tx_bi[i]; 3308 tx_desc = I40E_TX_DESC(tx_ring, i); 3309 i -= tx_ring->count; 3310 3311 do { 3312 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3313 3314 /* if next_to_watch is not set then there is no work pending */ 3315 if (!eop_desc) 3316 break; 3317 3318 /* prevent any other reads prior to eop_desc */ 3319 read_barrier_depends(); 3320 3321 /* if the descriptor isn't done, no work yet to do */ 3322 if (!(eop_desc->cmd_type_offset_bsz & 3323 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3324 break; 3325 3326 /* clear next_to_watch to prevent false hangs */ 3327 tx_buf->next_to_watch = NULL; 3328 3329 tx_desc->buffer_addr = 0; 3330 tx_desc->cmd_type_offset_bsz = 0; 3331 /* move past filter desc */ 3332 tx_buf++; 3333 tx_desc++; 3334 i++; 3335 if (unlikely(!i)) { 3336 i -= tx_ring->count; 3337 tx_buf = tx_ring->tx_bi; 3338 tx_desc = I40E_TX_DESC(tx_ring, 0); 3339 } 3340 /* unmap skb header data */ 3341 dma_unmap_single(tx_ring->dev, 3342 dma_unmap_addr(tx_buf, dma), 3343 dma_unmap_len(tx_buf, len), 3344 DMA_TO_DEVICE); 3345 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3346 kfree(tx_buf->raw_buf); 3347 3348 tx_buf->raw_buf = NULL; 3349 tx_buf->tx_flags = 0; 3350 tx_buf->next_to_watch = NULL; 3351 dma_unmap_len_set(tx_buf, len, 0); 3352 tx_desc->buffer_addr = 0; 3353 tx_desc->cmd_type_offset_bsz = 0; 3354 3355 /* move us past the eop_desc for start of next FD desc */ 3356 tx_buf++; 3357 tx_desc++; 3358 i++; 3359 if (unlikely(!i)) { 3360 i -= tx_ring->count; 3361 tx_buf = tx_ring->tx_bi; 3362 tx_desc = I40E_TX_DESC(tx_ring, 0); 3363 } 3364 3365 /* update budget accounting */ 3366 budget--; 3367 } while (likely(budget)); 3368 3369 i += tx_ring->count; 3370 tx_ring->next_to_clean = i; 3371 3372 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { 3373 i40e_irq_dynamic_enable(vsi, 3374 tx_ring->q_vector->v_idx + vsi->base_vector); 3375 } 3376 return budget > 0; 3377 } 3378 3379 /** 3380 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3381 * @irq: interrupt number 3382 * @data: pointer to a q_vector 3383 **/ 3384 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3385 { 3386 struct i40e_q_vector *q_vector = data; 3387 struct i40e_vsi *vsi; 3388 3389 if (!q_vector->tx.ring) 3390 return IRQ_HANDLED; 3391 3392 vsi = q_vector->tx.ring->vsi; 3393 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3394 3395 return IRQ_HANDLED; 3396 } 3397 3398 /** 3399 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3400 * @vsi: the VSI being configured 3401 * @v_idx: vector index 3402 * @qp_idx: queue pair index 3403 **/ 3404 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3405 { 3406 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3407 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3408 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3409 3410 tx_ring->q_vector = q_vector; 3411 tx_ring->next = q_vector->tx.ring; 3412 q_vector->tx.ring = tx_ring; 3413 q_vector->tx.count++; 3414 3415 rx_ring->q_vector = q_vector; 3416 rx_ring->next = q_vector->rx.ring; 3417 q_vector->rx.ring = rx_ring; 3418 q_vector->rx.count++; 3419 } 3420 3421 /** 3422 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3423 * @vsi: the VSI being configured 3424 * 3425 * This function maps descriptor rings to the queue-specific vectors 3426 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3427 * one vector per queue pair, but on a constrained vector budget, we 3428 * group the queue pairs as "efficiently" as possible. 3429 **/ 3430 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3431 { 3432 int qp_remaining = vsi->num_queue_pairs; 3433 int q_vectors = vsi->num_q_vectors; 3434 int num_ringpairs; 3435 int v_start = 0; 3436 int qp_idx = 0; 3437 3438 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3439 * group them so there are multiple queues per vector. 3440 * It is also important to go through all the vectors available to be 3441 * sure that if we don't use all the vectors, that the remaining vectors 3442 * are cleared. This is especially important when decreasing the 3443 * number of queues in use. 3444 */ 3445 for (; v_start < q_vectors; v_start++) { 3446 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3447 3448 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3449 3450 q_vector->num_ringpairs = num_ringpairs; 3451 3452 q_vector->rx.count = 0; 3453 q_vector->tx.count = 0; 3454 q_vector->rx.ring = NULL; 3455 q_vector->tx.ring = NULL; 3456 3457 while (num_ringpairs--) { 3458 map_vector_to_qp(vsi, v_start, qp_idx); 3459 qp_idx++; 3460 qp_remaining--; 3461 } 3462 } 3463 } 3464 3465 /** 3466 * i40e_vsi_request_irq - Request IRQ from the OS 3467 * @vsi: the VSI being configured 3468 * @basename: name for the vector 3469 **/ 3470 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3471 { 3472 struct i40e_pf *pf = vsi->back; 3473 int err; 3474 3475 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3476 err = i40e_vsi_request_irq_msix(vsi, basename); 3477 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3478 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3479 pf->int_name, pf); 3480 else 3481 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3482 pf->int_name, pf); 3483 3484 if (err) 3485 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3486 3487 return err; 3488 } 3489 3490 #ifdef CONFIG_NET_POLL_CONTROLLER 3491 /** 3492 * i40e_netpoll - A Polling 'interrupt'handler 3493 * @netdev: network interface device structure 3494 * 3495 * This is used by netconsole to send skbs without having to re-enable 3496 * interrupts. It's not called while the normal interrupt routine is executing. 3497 **/ 3498 #ifdef I40E_FCOE 3499 void i40e_netpoll(struct net_device *netdev) 3500 #else 3501 static void i40e_netpoll(struct net_device *netdev) 3502 #endif 3503 { 3504 struct i40e_netdev_priv *np = netdev_priv(netdev); 3505 struct i40e_vsi *vsi = np->vsi; 3506 struct i40e_pf *pf = vsi->back; 3507 int i; 3508 3509 /* if interface is down do nothing */ 3510 if (test_bit(__I40E_DOWN, &vsi->state)) 3511 return; 3512 3513 pf->flags |= I40E_FLAG_IN_NETPOLL; 3514 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3515 for (i = 0; i < vsi->num_q_vectors; i++) 3516 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 3517 } else { 3518 i40e_intr(pf->pdev->irq, netdev); 3519 } 3520 pf->flags &= ~I40E_FLAG_IN_NETPOLL; 3521 } 3522 #endif 3523 3524 /** 3525 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 3526 * @pf: the PF being configured 3527 * @pf_q: the PF queue 3528 * @enable: enable or disable state of the queue 3529 * 3530 * This routine will wait for the given Tx queue of the PF to reach the 3531 * enabled or disabled state. 3532 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3533 * multiple retries; else will return 0 in case of success. 3534 **/ 3535 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3536 { 3537 int i; 3538 u32 tx_reg; 3539 3540 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3541 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 3542 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3543 break; 3544 3545 usleep_range(10, 20); 3546 } 3547 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3548 return -ETIMEDOUT; 3549 3550 return 0; 3551 } 3552 3553 /** 3554 * i40e_vsi_control_tx - Start or stop a VSI's rings 3555 * @vsi: the VSI being configured 3556 * @enable: start or stop the rings 3557 **/ 3558 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 3559 { 3560 struct i40e_pf *pf = vsi->back; 3561 struct i40e_hw *hw = &pf->hw; 3562 int i, j, pf_q, ret = 0; 3563 u32 tx_reg; 3564 3565 pf_q = vsi->base_queue; 3566 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3567 3568 /* warn the TX unit of coming changes */ 3569 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 3570 if (!enable) 3571 usleep_range(10, 20); 3572 3573 for (j = 0; j < 50; j++) { 3574 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3575 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3576 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 3577 break; 3578 usleep_range(1000, 2000); 3579 } 3580 /* Skip if the queue is already in the requested state */ 3581 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3582 continue; 3583 3584 /* turn on/off the queue */ 3585 if (enable) { 3586 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 3587 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3588 } else { 3589 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 3590 } 3591 3592 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 3593 /* No waiting for the Tx queue to disable */ 3594 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3595 continue; 3596 3597 /* wait for the change to finish */ 3598 ret = i40e_pf_txq_wait(pf, pf_q, enable); 3599 if (ret) { 3600 dev_info(&pf->pdev->dev, 3601 "%s: VSI seid %d Tx ring %d %sable timeout\n", 3602 __func__, vsi->seid, pf_q, 3603 (enable ? "en" : "dis")); 3604 break; 3605 } 3606 } 3607 3608 if (hw->revision_id == 0) 3609 mdelay(50); 3610 return ret; 3611 } 3612 3613 /** 3614 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 3615 * @pf: the PF being configured 3616 * @pf_q: the PF queue 3617 * @enable: enable or disable state of the queue 3618 * 3619 * This routine will wait for the given Rx queue of the PF to reach the 3620 * enabled or disabled state. 3621 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3622 * multiple retries; else will return 0 in case of success. 3623 **/ 3624 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3625 { 3626 int i; 3627 u32 rx_reg; 3628 3629 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3630 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 3631 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3632 break; 3633 3634 usleep_range(10, 20); 3635 } 3636 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3637 return -ETIMEDOUT; 3638 3639 return 0; 3640 } 3641 3642 /** 3643 * i40e_vsi_control_rx - Start or stop a VSI's rings 3644 * @vsi: the VSI being configured 3645 * @enable: start or stop the rings 3646 **/ 3647 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 3648 { 3649 struct i40e_pf *pf = vsi->back; 3650 struct i40e_hw *hw = &pf->hw; 3651 int i, j, pf_q, ret = 0; 3652 u32 rx_reg; 3653 3654 pf_q = vsi->base_queue; 3655 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3656 for (j = 0; j < 50; j++) { 3657 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3658 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 3659 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 3660 break; 3661 usleep_range(1000, 2000); 3662 } 3663 3664 /* Skip if the queue is already in the requested state */ 3665 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3666 continue; 3667 3668 /* turn on/off the queue */ 3669 if (enable) 3670 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 3671 else 3672 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 3673 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 3674 3675 /* wait for the change to finish */ 3676 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 3677 if (ret) { 3678 dev_info(&pf->pdev->dev, 3679 "%s: VSI seid %d Rx ring %d %sable timeout\n", 3680 __func__, vsi->seid, pf_q, 3681 (enable ? "en" : "dis")); 3682 break; 3683 } 3684 } 3685 3686 return ret; 3687 } 3688 3689 /** 3690 * i40e_vsi_control_rings - Start or stop a VSI's rings 3691 * @vsi: the VSI being configured 3692 * @enable: start or stop the rings 3693 **/ 3694 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) 3695 { 3696 int ret = 0; 3697 3698 /* do rx first for enable and last for disable */ 3699 if (request) { 3700 ret = i40e_vsi_control_rx(vsi, request); 3701 if (ret) 3702 return ret; 3703 ret = i40e_vsi_control_tx(vsi, request); 3704 } else { 3705 /* Ignore return value, we need to shutdown whatever we can */ 3706 i40e_vsi_control_tx(vsi, request); 3707 i40e_vsi_control_rx(vsi, request); 3708 } 3709 3710 return ret; 3711 } 3712 3713 /** 3714 * i40e_vsi_free_irq - Free the irq association with the OS 3715 * @vsi: the VSI being configured 3716 **/ 3717 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 3718 { 3719 struct i40e_pf *pf = vsi->back; 3720 struct i40e_hw *hw = &pf->hw; 3721 int base = vsi->base_vector; 3722 u32 val, qp; 3723 int i; 3724 3725 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3726 if (!vsi->q_vectors) 3727 return; 3728 3729 if (!vsi->irqs_ready) 3730 return; 3731 3732 vsi->irqs_ready = false; 3733 for (i = 0; i < vsi->num_q_vectors; i++) { 3734 u16 vector = i + base; 3735 3736 /* free only the irqs that were actually requested */ 3737 if (!vsi->q_vectors[i] || 3738 !vsi->q_vectors[i]->num_ringpairs) 3739 continue; 3740 3741 /* clear the affinity_mask in the IRQ descriptor */ 3742 irq_set_affinity_hint(pf->msix_entries[vector].vector, 3743 NULL); 3744 free_irq(pf->msix_entries[vector].vector, 3745 vsi->q_vectors[i]); 3746 3747 /* Tear down the interrupt queue link list 3748 * 3749 * We know that they come in pairs and always 3750 * the Rx first, then the Tx. To clear the 3751 * link list, stick the EOL value into the 3752 * next_q field of the registers. 3753 */ 3754 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 3755 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3756 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3757 val |= I40E_QUEUE_END_OF_LIST 3758 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3759 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 3760 3761 while (qp != I40E_QUEUE_END_OF_LIST) { 3762 u32 next; 3763 3764 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3765 3766 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3767 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3768 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3769 I40E_QINT_RQCTL_INTEVENT_MASK); 3770 3771 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3772 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3773 3774 wr32(hw, I40E_QINT_RQCTL(qp), val); 3775 3776 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3777 3778 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 3779 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 3780 3781 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3782 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3783 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3784 I40E_QINT_TQCTL_INTEVENT_MASK); 3785 3786 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3787 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3788 3789 wr32(hw, I40E_QINT_TQCTL(qp), val); 3790 qp = next; 3791 } 3792 } 3793 } else { 3794 free_irq(pf->pdev->irq, pf); 3795 3796 val = rd32(hw, I40E_PFINT_LNKLST0); 3797 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3798 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3799 val |= I40E_QUEUE_END_OF_LIST 3800 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 3801 wr32(hw, I40E_PFINT_LNKLST0, val); 3802 3803 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3804 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3805 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3806 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3807 I40E_QINT_RQCTL_INTEVENT_MASK); 3808 3809 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3810 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3811 3812 wr32(hw, I40E_QINT_RQCTL(qp), val); 3813 3814 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3815 3816 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3817 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3818 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3819 I40E_QINT_TQCTL_INTEVENT_MASK); 3820 3821 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3822 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3823 3824 wr32(hw, I40E_QINT_TQCTL(qp), val); 3825 } 3826 } 3827 3828 /** 3829 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 3830 * @vsi: the VSI being configured 3831 * @v_idx: Index of vector to be freed 3832 * 3833 * This function frees the memory allocated to the q_vector. In addition if 3834 * NAPI is enabled it will delete any references to the NAPI struct prior 3835 * to freeing the q_vector. 3836 **/ 3837 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 3838 { 3839 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3840 struct i40e_ring *ring; 3841 3842 if (!q_vector) 3843 return; 3844 3845 /* disassociate q_vector from rings */ 3846 i40e_for_each_ring(ring, q_vector->tx) 3847 ring->q_vector = NULL; 3848 3849 i40e_for_each_ring(ring, q_vector->rx) 3850 ring->q_vector = NULL; 3851 3852 /* only VSI w/ an associated netdev is set up w/ NAPI */ 3853 if (vsi->netdev) 3854 netif_napi_del(&q_vector->napi); 3855 3856 vsi->q_vectors[v_idx] = NULL; 3857 3858 kfree_rcu(q_vector, rcu); 3859 } 3860 3861 /** 3862 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 3863 * @vsi: the VSI being un-configured 3864 * 3865 * This frees the memory allocated to the q_vectors and 3866 * deletes references to the NAPI struct. 3867 **/ 3868 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 3869 { 3870 int v_idx; 3871 3872 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 3873 i40e_free_q_vector(vsi, v_idx); 3874 } 3875 3876 /** 3877 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 3878 * @pf: board private structure 3879 **/ 3880 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 3881 { 3882 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 3883 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3884 pci_disable_msix(pf->pdev); 3885 kfree(pf->msix_entries); 3886 pf->msix_entries = NULL; 3887 kfree(pf->irq_pile); 3888 pf->irq_pile = NULL; 3889 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 3890 pci_disable_msi(pf->pdev); 3891 } 3892 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 3893 } 3894 3895 /** 3896 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 3897 * @pf: board private structure 3898 * 3899 * We go through and clear interrupt specific resources and reset the structure 3900 * to pre-load conditions 3901 **/ 3902 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 3903 { 3904 int i; 3905 3906 i40e_stop_misc_vector(pf); 3907 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3908 synchronize_irq(pf->msix_entries[0].vector); 3909 free_irq(pf->msix_entries[0].vector, pf); 3910 } 3911 3912 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3913 for (i = 0; i < pf->num_alloc_vsi; i++) 3914 if (pf->vsi[i]) 3915 i40e_vsi_free_q_vectors(pf->vsi[i]); 3916 i40e_reset_interrupt_capability(pf); 3917 } 3918 3919 /** 3920 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 3921 * @vsi: the VSI being configured 3922 **/ 3923 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 3924 { 3925 int q_idx; 3926 3927 if (!vsi->netdev) 3928 return; 3929 3930 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3931 napi_enable(&vsi->q_vectors[q_idx]->napi); 3932 } 3933 3934 /** 3935 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 3936 * @vsi: the VSI being configured 3937 **/ 3938 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 3939 { 3940 int q_idx; 3941 3942 if (!vsi->netdev) 3943 return; 3944 3945 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3946 napi_disable(&vsi->q_vectors[q_idx]->napi); 3947 } 3948 3949 /** 3950 * i40e_vsi_close - Shut down a VSI 3951 * @vsi: the vsi to be quelled 3952 **/ 3953 static void i40e_vsi_close(struct i40e_vsi *vsi) 3954 { 3955 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 3956 i40e_down(vsi); 3957 i40e_vsi_free_irq(vsi); 3958 i40e_vsi_free_tx_resources(vsi); 3959 i40e_vsi_free_rx_resources(vsi); 3960 } 3961 3962 /** 3963 * i40e_quiesce_vsi - Pause a given VSI 3964 * @vsi: the VSI being paused 3965 **/ 3966 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 3967 { 3968 if (test_bit(__I40E_DOWN, &vsi->state)) 3969 return; 3970 3971 /* No need to disable FCoE VSI when Tx suspended */ 3972 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 3973 vsi->type == I40E_VSI_FCOE) { 3974 dev_dbg(&vsi->back->pdev->dev, 3975 "%s: VSI seid %d skipping FCoE VSI disable\n", 3976 __func__, vsi->seid); 3977 return; 3978 } 3979 3980 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 3981 if (vsi->netdev && netif_running(vsi->netdev)) { 3982 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 3983 } else { 3984 i40e_vsi_close(vsi); 3985 } 3986 } 3987 3988 /** 3989 * i40e_unquiesce_vsi - Resume a given VSI 3990 * @vsi: the VSI being resumed 3991 **/ 3992 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 3993 { 3994 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 3995 return; 3996 3997 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 3998 if (vsi->netdev && netif_running(vsi->netdev)) 3999 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 4000 else 4001 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 4002 } 4003 4004 /** 4005 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 4006 * @pf: the PF 4007 **/ 4008 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 4009 { 4010 int v; 4011 4012 for (v = 0; v < pf->num_alloc_vsi; v++) { 4013 if (pf->vsi[v]) 4014 i40e_quiesce_vsi(pf->vsi[v]); 4015 } 4016 } 4017 4018 /** 4019 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 4020 * @pf: the PF 4021 **/ 4022 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 4023 { 4024 int v; 4025 4026 for (v = 0; v < pf->num_alloc_vsi; v++) { 4027 if (pf->vsi[v]) 4028 i40e_unquiesce_vsi(pf->vsi[v]); 4029 } 4030 } 4031 4032 #ifdef CONFIG_I40E_DCB 4033 /** 4034 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled 4035 * @vsi: the VSI being configured 4036 * 4037 * This function waits for the given VSI's Tx queues to be disabled. 4038 **/ 4039 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi) 4040 { 4041 struct i40e_pf *pf = vsi->back; 4042 int i, pf_q, ret; 4043 4044 pf_q = vsi->base_queue; 4045 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4046 /* Check and wait for the disable status of the queue */ 4047 ret = i40e_pf_txq_wait(pf, pf_q, false); 4048 if (ret) { 4049 dev_info(&pf->pdev->dev, 4050 "%s: VSI seid %d Tx ring %d disable timeout\n", 4051 __func__, vsi->seid, pf_q); 4052 return ret; 4053 } 4054 } 4055 4056 return 0; 4057 } 4058 4059 /** 4060 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled 4061 * @pf: the PF 4062 * 4063 * This function waits for the Tx queues to be in disabled state for all the 4064 * VSIs that are managed by this PF. 4065 **/ 4066 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf) 4067 { 4068 int v, ret = 0; 4069 4070 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4071 /* No need to wait for FCoE VSI queues */ 4072 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 4073 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]); 4074 if (ret) 4075 break; 4076 } 4077 } 4078 4079 return ret; 4080 } 4081 4082 #endif 4083 /** 4084 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4085 * @pf: pointer to PF 4086 * 4087 * Get TC map for ISCSI PF type that will include iSCSI TC 4088 * and LAN TC. 4089 **/ 4090 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4091 { 4092 struct i40e_dcb_app_priority_table app; 4093 struct i40e_hw *hw = &pf->hw; 4094 u8 enabled_tc = 1; /* TC0 is always enabled */ 4095 u8 tc, i; 4096 /* Get the iSCSI APP TLV */ 4097 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4098 4099 for (i = 0; i < dcbcfg->numapps; i++) { 4100 app = dcbcfg->app[i]; 4101 if (app.selector == I40E_APP_SEL_TCPIP && 4102 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4103 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4104 enabled_tc |= BIT_ULL(tc); 4105 break; 4106 } 4107 } 4108 4109 return enabled_tc; 4110 } 4111 4112 /** 4113 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4114 * @dcbcfg: the corresponding DCBx configuration structure 4115 * 4116 * Return the number of TCs from given DCBx configuration 4117 **/ 4118 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4119 { 4120 u8 num_tc = 0; 4121 int i; 4122 4123 /* Scan the ETS Config Priority Table to find 4124 * traffic class enabled for a given priority 4125 * and use the traffic class index to get the 4126 * number of traffic classes enabled 4127 */ 4128 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4129 if (dcbcfg->etscfg.prioritytable[i] > num_tc) 4130 num_tc = dcbcfg->etscfg.prioritytable[i]; 4131 } 4132 4133 /* Traffic class index starts from zero so 4134 * increment to return the actual count 4135 */ 4136 return num_tc + 1; 4137 } 4138 4139 /** 4140 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4141 * @dcbcfg: the corresponding DCBx configuration structure 4142 * 4143 * Query the current DCB configuration and return the number of 4144 * traffic classes enabled from the given DCBX config 4145 **/ 4146 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4147 { 4148 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4149 u8 enabled_tc = 1; 4150 u8 i; 4151 4152 for (i = 0; i < num_tc; i++) 4153 enabled_tc |= BIT(i); 4154 4155 return enabled_tc; 4156 } 4157 4158 /** 4159 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4160 * @pf: PF being queried 4161 * 4162 * Return number of traffic classes enabled for the given PF 4163 **/ 4164 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4165 { 4166 struct i40e_hw *hw = &pf->hw; 4167 u8 i, enabled_tc; 4168 u8 num_tc = 0; 4169 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4170 4171 /* If DCB is not enabled then always in single TC */ 4172 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4173 return 1; 4174 4175 /* SFP mode will be enabled for all TCs on port */ 4176 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4177 return i40e_dcb_get_num_tc(dcbcfg); 4178 4179 /* MFP mode return count of enabled TCs for this PF */ 4180 if (pf->hw.func_caps.iscsi) 4181 enabled_tc = i40e_get_iscsi_tc_map(pf); 4182 else 4183 return 1; /* Only TC0 */ 4184 4185 /* At least have TC0 */ 4186 enabled_tc = (enabled_tc ? enabled_tc : 0x1); 4187 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4188 if (enabled_tc & BIT_ULL(i)) 4189 num_tc++; 4190 } 4191 return num_tc; 4192 } 4193 4194 /** 4195 * i40e_pf_get_default_tc - Get bitmap for first enabled TC 4196 * @pf: PF being queried 4197 * 4198 * Return a bitmap for first enabled traffic class for this PF. 4199 **/ 4200 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) 4201 { 4202 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4203 u8 i = 0; 4204 4205 if (!enabled_tc) 4206 return 0x1; /* TC0 */ 4207 4208 /* Find the first enabled TC */ 4209 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4210 if (enabled_tc & BIT_ULL(i)) 4211 break; 4212 } 4213 4214 return BIT(i); 4215 } 4216 4217 /** 4218 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4219 * @pf: PF being queried 4220 * 4221 * Return a bitmap for enabled traffic classes for this PF. 4222 **/ 4223 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4224 { 4225 /* If DCB is not enabled for this PF then just return default TC */ 4226 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4227 return i40e_pf_get_default_tc(pf); 4228 4229 /* SFP mode we want PF to be enabled for all TCs */ 4230 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4231 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4232 4233 /* MFP enabled and iSCSI PF type */ 4234 if (pf->hw.func_caps.iscsi) 4235 return i40e_get_iscsi_tc_map(pf); 4236 else 4237 return i40e_pf_get_default_tc(pf); 4238 } 4239 4240 /** 4241 * i40e_vsi_get_bw_info - Query VSI BW Information 4242 * @vsi: the VSI being queried 4243 * 4244 * Returns 0 on success, negative value on failure 4245 **/ 4246 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4247 { 4248 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4249 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4250 struct i40e_pf *pf = vsi->back; 4251 struct i40e_hw *hw = &pf->hw; 4252 i40e_status ret; 4253 u32 tc_bw_max; 4254 int i; 4255 4256 /* Get the VSI level BW configuration */ 4257 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4258 if (ret) { 4259 dev_info(&pf->pdev->dev, 4260 "couldn't get PF vsi bw config, err %s aq_err %s\n", 4261 i40e_stat_str(&pf->hw, ret), 4262 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4263 return -EINVAL; 4264 } 4265 4266 /* Get the VSI level BW configuration per TC */ 4267 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4268 NULL); 4269 if (ret) { 4270 dev_info(&pf->pdev->dev, 4271 "couldn't get PF vsi ets bw config, err %s aq_err %s\n", 4272 i40e_stat_str(&pf->hw, ret), 4273 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4274 return -EINVAL; 4275 } 4276 4277 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4278 dev_info(&pf->pdev->dev, 4279 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4280 bw_config.tc_valid_bits, 4281 bw_ets_config.tc_valid_bits); 4282 /* Still continuing */ 4283 } 4284 4285 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4286 vsi->bw_max_quanta = bw_config.max_bw; 4287 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4288 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4289 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4290 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4291 vsi->bw_ets_limit_credits[i] = 4292 le16_to_cpu(bw_ets_config.credits[i]); 4293 /* 3 bits out of 4 for each TC */ 4294 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4295 } 4296 4297 return 0; 4298 } 4299 4300 /** 4301 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4302 * @vsi: the VSI being configured 4303 * @enabled_tc: TC bitmap 4304 * @bw_credits: BW shared credits per TC 4305 * 4306 * Returns 0 on success, negative value on failure 4307 **/ 4308 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4309 u8 *bw_share) 4310 { 4311 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4312 i40e_status ret; 4313 int i; 4314 4315 bw_data.tc_valid_bits = enabled_tc; 4316 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4317 bw_data.tc_bw_credits[i] = bw_share[i]; 4318 4319 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4320 NULL); 4321 if (ret) { 4322 dev_info(&vsi->back->pdev->dev, 4323 "AQ command Config VSI BW allocation per TC failed = %d\n", 4324 vsi->back->hw.aq.asq_last_status); 4325 return -EINVAL; 4326 } 4327 4328 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4329 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4330 4331 return 0; 4332 } 4333 4334 /** 4335 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4336 * @vsi: the VSI being configured 4337 * @enabled_tc: TC map to be enabled 4338 * 4339 **/ 4340 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4341 { 4342 struct net_device *netdev = vsi->netdev; 4343 struct i40e_pf *pf = vsi->back; 4344 struct i40e_hw *hw = &pf->hw; 4345 u8 netdev_tc = 0; 4346 int i; 4347 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4348 4349 if (!netdev) 4350 return; 4351 4352 if (!enabled_tc) { 4353 netdev_reset_tc(netdev); 4354 return; 4355 } 4356 4357 /* Set up actual enabled TCs on the VSI */ 4358 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 4359 return; 4360 4361 /* set per TC queues for the VSI */ 4362 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4363 /* Only set TC queues for enabled tcs 4364 * 4365 * e.g. For a VSI that has TC0 and TC3 enabled the 4366 * enabled_tc bitmap would be 0x00001001; the driver 4367 * will set the numtc for netdev as 2 that will be 4368 * referenced by the netdev layer as TC 0 and 1. 4369 */ 4370 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) 4371 netdev_set_tc_queue(netdev, 4372 vsi->tc_config.tc_info[i].netdev_tc, 4373 vsi->tc_config.tc_info[i].qcount, 4374 vsi->tc_config.tc_info[i].qoffset); 4375 } 4376 4377 /* Assign UP2TC map for the VSI */ 4378 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4379 /* Get the actual TC# for the UP */ 4380 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 4381 /* Get the mapped netdev TC# for the UP */ 4382 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 4383 netdev_set_prio_tc_map(netdev, i, netdev_tc); 4384 } 4385 } 4386 4387 /** 4388 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 4389 * @vsi: the VSI being configured 4390 * @ctxt: the ctxt buffer returned from AQ VSI update param command 4391 **/ 4392 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 4393 struct i40e_vsi_context *ctxt) 4394 { 4395 /* copy just the sections touched not the entire info 4396 * since not all sections are valid as returned by 4397 * update vsi params 4398 */ 4399 vsi->info.mapping_flags = ctxt->info.mapping_flags; 4400 memcpy(&vsi->info.queue_mapping, 4401 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 4402 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 4403 sizeof(vsi->info.tc_mapping)); 4404 } 4405 4406 /** 4407 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 4408 * @vsi: VSI to be configured 4409 * @enabled_tc: TC bitmap 4410 * 4411 * This configures a particular VSI for TCs that are mapped to the 4412 * given TC bitmap. It uses default bandwidth share for TCs across 4413 * VSIs to configure TC for a particular VSI. 4414 * 4415 * NOTE: 4416 * It is expected that the VSI queues have been quisced before calling 4417 * this function. 4418 **/ 4419 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4420 { 4421 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 4422 struct i40e_vsi_context ctxt; 4423 int ret = 0; 4424 int i; 4425 4426 /* Check if enabled_tc is same as existing or new TCs */ 4427 if (vsi->tc_config.enabled_tc == enabled_tc) 4428 return ret; 4429 4430 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 4431 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4432 if (enabled_tc & BIT_ULL(i)) 4433 bw_share[i] = 1; 4434 } 4435 4436 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 4437 if (ret) { 4438 dev_info(&vsi->back->pdev->dev, 4439 "Failed configuring TC map %d for VSI %d\n", 4440 enabled_tc, vsi->seid); 4441 goto out; 4442 } 4443 4444 /* Update Queue Pairs Mapping for currently enabled UPs */ 4445 ctxt.seid = vsi->seid; 4446 ctxt.pf_num = vsi->back->hw.pf_id; 4447 ctxt.vf_num = 0; 4448 ctxt.uplink_seid = vsi->uplink_seid; 4449 ctxt.info = vsi->info; 4450 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 4451 4452 /* Update the VSI after updating the VSI queue-mapping information */ 4453 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 4454 if (ret) { 4455 dev_info(&vsi->back->pdev->dev, 4456 "Update vsi tc config failed, err %s aq_err %s\n", 4457 i40e_stat_str(&vsi->back->hw, ret), 4458 i40e_aq_str(&vsi->back->hw, 4459 vsi->back->hw.aq.asq_last_status)); 4460 goto out; 4461 } 4462 /* update the local VSI info with updated queue map */ 4463 i40e_vsi_update_queue_map(vsi, &ctxt); 4464 vsi->info.valid_sections = 0; 4465 4466 /* Update current VSI BW information */ 4467 ret = i40e_vsi_get_bw_info(vsi); 4468 if (ret) { 4469 dev_info(&vsi->back->pdev->dev, 4470 "Failed updating vsi bw info, err %s aq_err %s\n", 4471 i40e_stat_str(&vsi->back->hw, ret), 4472 i40e_aq_str(&vsi->back->hw, 4473 vsi->back->hw.aq.asq_last_status)); 4474 goto out; 4475 } 4476 4477 /* Update the netdev TC setup */ 4478 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 4479 out: 4480 return ret; 4481 } 4482 4483 /** 4484 * i40e_veb_config_tc - Configure TCs for given VEB 4485 * @veb: given VEB 4486 * @enabled_tc: TC bitmap 4487 * 4488 * Configures given TC bitmap for VEB (switching) element 4489 **/ 4490 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 4491 { 4492 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 4493 struct i40e_pf *pf = veb->pf; 4494 int ret = 0; 4495 int i; 4496 4497 /* No TCs or already enabled TCs just return */ 4498 if (!enabled_tc || veb->enabled_tc == enabled_tc) 4499 return ret; 4500 4501 bw_data.tc_valid_bits = enabled_tc; 4502 /* bw_data.absolute_credits is not set (relative) */ 4503 4504 /* Enable ETS TCs with equal BW Share for now */ 4505 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4506 if (enabled_tc & BIT_ULL(i)) 4507 bw_data.tc_bw_share_credits[i] = 1; 4508 } 4509 4510 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 4511 &bw_data, NULL); 4512 if (ret) { 4513 dev_info(&pf->pdev->dev, 4514 "VEB bw config failed, err %s aq_err %s\n", 4515 i40e_stat_str(&pf->hw, ret), 4516 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4517 goto out; 4518 } 4519 4520 /* Update the BW information */ 4521 ret = i40e_veb_get_bw_info(veb); 4522 if (ret) { 4523 dev_info(&pf->pdev->dev, 4524 "Failed getting veb bw config, err %s aq_err %s\n", 4525 i40e_stat_str(&pf->hw, ret), 4526 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4527 } 4528 4529 out: 4530 return ret; 4531 } 4532 4533 #ifdef CONFIG_I40E_DCB 4534 /** 4535 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 4536 * @pf: PF struct 4537 * 4538 * Reconfigure VEB/VSIs on a given PF; it is assumed that 4539 * the caller would've quiesce all the VSIs before calling 4540 * this function 4541 **/ 4542 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 4543 { 4544 u8 tc_map = 0; 4545 int ret; 4546 u8 v; 4547 4548 /* Enable the TCs available on PF to all VEBs */ 4549 tc_map = i40e_pf_get_tc_map(pf); 4550 for (v = 0; v < I40E_MAX_VEB; v++) { 4551 if (!pf->veb[v]) 4552 continue; 4553 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 4554 if (ret) { 4555 dev_info(&pf->pdev->dev, 4556 "Failed configuring TC for VEB seid=%d\n", 4557 pf->veb[v]->seid); 4558 /* Will try to configure as many components */ 4559 } 4560 } 4561 4562 /* Update each VSI */ 4563 for (v = 0; v < pf->num_alloc_vsi; v++) { 4564 if (!pf->vsi[v]) 4565 continue; 4566 4567 /* - Enable all TCs for the LAN VSI 4568 #ifdef I40E_FCOE 4569 * - For FCoE VSI only enable the TC configured 4570 * as per the APP TLV 4571 #endif 4572 * - For all others keep them at TC0 for now 4573 */ 4574 if (v == pf->lan_vsi) 4575 tc_map = i40e_pf_get_tc_map(pf); 4576 else 4577 tc_map = i40e_pf_get_default_tc(pf); 4578 #ifdef I40E_FCOE 4579 if (pf->vsi[v]->type == I40E_VSI_FCOE) 4580 tc_map = i40e_get_fcoe_tc_map(pf); 4581 #endif /* #ifdef I40E_FCOE */ 4582 4583 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 4584 if (ret) { 4585 dev_info(&pf->pdev->dev, 4586 "Failed configuring TC for VSI seid=%d\n", 4587 pf->vsi[v]->seid); 4588 /* Will try to configure as many components */ 4589 } else { 4590 /* Re-configure VSI vectors based on updated TC map */ 4591 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 4592 if (pf->vsi[v]->netdev) 4593 i40e_dcbnl_set_all(pf->vsi[v]); 4594 } 4595 } 4596 } 4597 4598 /** 4599 * i40e_resume_port_tx - Resume port Tx 4600 * @pf: PF struct 4601 * 4602 * Resume a port's Tx and issue a PF reset in case of failure to 4603 * resume. 4604 **/ 4605 static int i40e_resume_port_tx(struct i40e_pf *pf) 4606 { 4607 struct i40e_hw *hw = &pf->hw; 4608 int ret; 4609 4610 ret = i40e_aq_resume_port_tx(hw, NULL); 4611 if (ret) { 4612 dev_info(&pf->pdev->dev, 4613 "Resume Port Tx failed, err %s aq_err %s\n", 4614 i40e_stat_str(&pf->hw, ret), 4615 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4616 /* Schedule PF reset to recover */ 4617 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 4618 i40e_service_event_schedule(pf); 4619 } 4620 4621 return ret; 4622 } 4623 4624 /** 4625 * i40e_init_pf_dcb - Initialize DCB configuration 4626 * @pf: PF being configured 4627 * 4628 * Query the current DCB configuration and cache it 4629 * in the hardware structure 4630 **/ 4631 static int i40e_init_pf_dcb(struct i40e_pf *pf) 4632 { 4633 struct i40e_hw *hw = &pf->hw; 4634 int err = 0; 4635 4636 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 4637 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 4638 (pf->hw.aq.fw_maj_ver < 4)) 4639 goto out; 4640 4641 /* Get the initial DCB configuration */ 4642 err = i40e_init_dcb(hw); 4643 if (!err) { 4644 /* Device/Function is not DCBX capable */ 4645 if ((!hw->func_caps.dcb) || 4646 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 4647 dev_info(&pf->pdev->dev, 4648 "DCBX offload is not supported or is disabled for this PF.\n"); 4649 4650 if (pf->flags & I40E_FLAG_MFP_ENABLED) 4651 goto out; 4652 4653 } else { 4654 /* When status is not DISABLED then DCBX in FW */ 4655 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 4656 DCB_CAP_DCBX_VER_IEEE; 4657 4658 pf->flags |= I40E_FLAG_DCB_CAPABLE; 4659 /* Enable DCB tagging only when more than one TC */ 4660 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 4661 pf->flags |= I40E_FLAG_DCB_ENABLED; 4662 dev_dbg(&pf->pdev->dev, 4663 "DCBX offload is supported for this PF.\n"); 4664 } 4665 } else { 4666 dev_info(&pf->pdev->dev, 4667 "Query for DCB configuration failed, err %s aq_err %s\n", 4668 i40e_stat_str(&pf->hw, err), 4669 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4670 } 4671 4672 out: 4673 return err; 4674 } 4675 #endif /* CONFIG_I40E_DCB */ 4676 #define SPEED_SIZE 14 4677 #define FC_SIZE 8 4678 /** 4679 * i40e_print_link_message - print link up or down 4680 * @vsi: the VSI for which link needs a message 4681 */ 4682 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 4683 { 4684 char speed[SPEED_SIZE] = "Unknown"; 4685 char fc[FC_SIZE] = "RX/TX"; 4686 4687 if (!isup) { 4688 netdev_info(vsi->netdev, "NIC Link is Down\n"); 4689 return; 4690 } 4691 4692 /* Warn user if link speed on NPAR enabled partition is not at 4693 * least 10GB 4694 */ 4695 if (vsi->back->hw.func_caps.npar_enable && 4696 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 4697 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 4698 netdev_warn(vsi->netdev, 4699 "The partition detected link speed that is less than 10Gbps\n"); 4700 4701 switch (vsi->back->hw.phy.link_info.link_speed) { 4702 case I40E_LINK_SPEED_40GB: 4703 strlcpy(speed, "40 Gbps", SPEED_SIZE); 4704 break; 4705 case I40E_LINK_SPEED_20GB: 4706 strncpy(speed, "20 Gbps", SPEED_SIZE); 4707 break; 4708 case I40E_LINK_SPEED_10GB: 4709 strlcpy(speed, "10 Gbps", SPEED_SIZE); 4710 break; 4711 case I40E_LINK_SPEED_1GB: 4712 strlcpy(speed, "1000 Mbps", SPEED_SIZE); 4713 break; 4714 case I40E_LINK_SPEED_100MB: 4715 strncpy(speed, "100 Mbps", SPEED_SIZE); 4716 break; 4717 default: 4718 break; 4719 } 4720 4721 switch (vsi->back->hw.fc.current_mode) { 4722 case I40E_FC_FULL: 4723 strlcpy(fc, "RX/TX", FC_SIZE); 4724 break; 4725 case I40E_FC_TX_PAUSE: 4726 strlcpy(fc, "TX", FC_SIZE); 4727 break; 4728 case I40E_FC_RX_PAUSE: 4729 strlcpy(fc, "RX", FC_SIZE); 4730 break; 4731 default: 4732 strlcpy(fc, "None", FC_SIZE); 4733 break; 4734 } 4735 4736 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n", 4737 speed, fc); 4738 } 4739 4740 /** 4741 * i40e_up_complete - Finish the last steps of bringing up a connection 4742 * @vsi: the VSI being configured 4743 **/ 4744 static int i40e_up_complete(struct i40e_vsi *vsi) 4745 { 4746 struct i40e_pf *pf = vsi->back; 4747 int err; 4748 4749 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4750 i40e_vsi_configure_msix(vsi); 4751 else 4752 i40e_configure_msi_and_legacy(vsi); 4753 4754 /* start rings */ 4755 err = i40e_vsi_control_rings(vsi, true); 4756 if (err) 4757 return err; 4758 4759 clear_bit(__I40E_DOWN, &vsi->state); 4760 i40e_napi_enable_all(vsi); 4761 i40e_vsi_enable_irq(vsi); 4762 4763 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 4764 (vsi->netdev)) { 4765 i40e_print_link_message(vsi, true); 4766 netif_tx_start_all_queues(vsi->netdev); 4767 netif_carrier_on(vsi->netdev); 4768 } else if (vsi->netdev) { 4769 i40e_print_link_message(vsi, false); 4770 /* need to check for qualified module here*/ 4771 if ((pf->hw.phy.link_info.link_info & 4772 I40E_AQ_MEDIA_AVAILABLE) && 4773 (!(pf->hw.phy.link_info.an_info & 4774 I40E_AQ_QUALIFIED_MODULE))) 4775 netdev_err(vsi->netdev, 4776 "the driver failed to link because an unqualified module was detected."); 4777 } 4778 4779 /* replay FDIR SB filters */ 4780 if (vsi->type == I40E_VSI_FDIR) { 4781 /* reset fd counters */ 4782 pf->fd_add_err = pf->fd_atr_cnt = 0; 4783 if (pf->fd_tcp_rule > 0) { 4784 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 4785 if (I40E_DEBUG_FD & pf->hw.debug_mask) 4786 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 4787 pf->fd_tcp_rule = 0; 4788 } 4789 i40e_fdir_filter_restore(vsi); 4790 } 4791 i40e_service_event_schedule(pf); 4792 4793 return 0; 4794 } 4795 4796 /** 4797 * i40e_vsi_reinit_locked - Reset the VSI 4798 * @vsi: the VSI being configured 4799 * 4800 * Rebuild the ring structs after some configuration 4801 * has changed, e.g. MTU size. 4802 **/ 4803 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 4804 { 4805 struct i40e_pf *pf = vsi->back; 4806 4807 WARN_ON(in_interrupt()); 4808 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 4809 usleep_range(1000, 2000); 4810 i40e_down(vsi); 4811 4812 /* Give a VF some time to respond to the reset. The 4813 * two second wait is based upon the watchdog cycle in 4814 * the VF driver. 4815 */ 4816 if (vsi->type == I40E_VSI_SRIOV) 4817 msleep(2000); 4818 i40e_up(vsi); 4819 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 4820 } 4821 4822 /** 4823 * i40e_up - Bring the connection back up after being down 4824 * @vsi: the VSI being configured 4825 **/ 4826 int i40e_up(struct i40e_vsi *vsi) 4827 { 4828 int err; 4829 4830 err = i40e_vsi_configure(vsi); 4831 if (!err) 4832 err = i40e_up_complete(vsi); 4833 4834 return err; 4835 } 4836 4837 /** 4838 * i40e_down - Shutdown the connection processing 4839 * @vsi: the VSI being stopped 4840 **/ 4841 void i40e_down(struct i40e_vsi *vsi) 4842 { 4843 int i; 4844 4845 /* It is assumed that the caller of this function 4846 * sets the vsi->state __I40E_DOWN bit. 4847 */ 4848 if (vsi->netdev) { 4849 netif_carrier_off(vsi->netdev); 4850 netif_tx_disable(vsi->netdev); 4851 } 4852 i40e_vsi_disable_irq(vsi); 4853 i40e_vsi_control_rings(vsi, false); 4854 i40e_napi_disable_all(vsi); 4855 4856 for (i = 0; i < vsi->num_queue_pairs; i++) { 4857 i40e_clean_tx_ring(vsi->tx_rings[i]); 4858 i40e_clean_rx_ring(vsi->rx_rings[i]); 4859 } 4860 } 4861 4862 /** 4863 * i40e_setup_tc - configure multiple traffic classes 4864 * @netdev: net device to configure 4865 * @tc: number of traffic classes to enable 4866 **/ 4867 #ifdef I40E_FCOE 4868 int i40e_setup_tc(struct net_device *netdev, u8 tc) 4869 #else 4870 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 4871 #endif 4872 { 4873 struct i40e_netdev_priv *np = netdev_priv(netdev); 4874 struct i40e_vsi *vsi = np->vsi; 4875 struct i40e_pf *pf = vsi->back; 4876 u8 enabled_tc = 0; 4877 int ret = -EINVAL; 4878 int i; 4879 4880 /* Check if DCB enabled to continue */ 4881 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 4882 netdev_info(netdev, "DCB is not enabled for adapter\n"); 4883 goto exit; 4884 } 4885 4886 /* Check if MFP enabled */ 4887 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4888 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 4889 goto exit; 4890 } 4891 4892 /* Check whether tc count is within enabled limit */ 4893 if (tc > i40e_pf_get_num_tc(pf)) { 4894 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 4895 goto exit; 4896 } 4897 4898 /* Generate TC map for number of tc requested */ 4899 for (i = 0; i < tc; i++) 4900 enabled_tc |= BIT_ULL(i); 4901 4902 /* Requesting same TC configuration as already enabled */ 4903 if (enabled_tc == vsi->tc_config.enabled_tc) 4904 return 0; 4905 4906 /* Quiesce VSI queues */ 4907 i40e_quiesce_vsi(vsi); 4908 4909 /* Configure VSI for enabled TCs */ 4910 ret = i40e_vsi_config_tc(vsi, enabled_tc); 4911 if (ret) { 4912 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 4913 vsi->seid); 4914 goto exit; 4915 } 4916 4917 /* Unquiesce VSI */ 4918 i40e_unquiesce_vsi(vsi); 4919 4920 exit: 4921 return ret; 4922 } 4923 4924 /** 4925 * i40e_open - Called when a network interface is made active 4926 * @netdev: network interface device structure 4927 * 4928 * The open entry point is called when a network interface is made 4929 * active by the system (IFF_UP). At this point all resources needed 4930 * for transmit and receive operations are allocated, the interrupt 4931 * handler is registered with the OS, the netdev watchdog subtask is 4932 * enabled, and the stack is notified that the interface is ready. 4933 * 4934 * Returns 0 on success, negative value on failure 4935 **/ 4936 int i40e_open(struct net_device *netdev) 4937 { 4938 struct i40e_netdev_priv *np = netdev_priv(netdev); 4939 struct i40e_vsi *vsi = np->vsi; 4940 struct i40e_pf *pf = vsi->back; 4941 int err; 4942 4943 /* disallow open during test or if eeprom is broken */ 4944 if (test_bit(__I40E_TESTING, &pf->state) || 4945 test_bit(__I40E_BAD_EEPROM, &pf->state)) 4946 return -EBUSY; 4947 4948 netif_carrier_off(netdev); 4949 4950 err = i40e_vsi_open(vsi); 4951 if (err) 4952 return err; 4953 4954 /* configure global TSO hardware offload settings */ 4955 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 4956 TCP_FLAG_FIN) >> 16); 4957 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 4958 TCP_FLAG_FIN | 4959 TCP_FLAG_CWR) >> 16); 4960 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 4961 4962 #ifdef CONFIG_I40E_VXLAN 4963 vxlan_get_rx_port(netdev); 4964 #endif 4965 4966 return 0; 4967 } 4968 4969 /** 4970 * i40e_vsi_open - 4971 * @vsi: the VSI to open 4972 * 4973 * Finish initialization of the VSI. 4974 * 4975 * Returns 0 on success, negative value on failure 4976 **/ 4977 int i40e_vsi_open(struct i40e_vsi *vsi) 4978 { 4979 struct i40e_pf *pf = vsi->back; 4980 char int_name[I40E_INT_NAME_STR_LEN]; 4981 int err; 4982 4983 /* allocate descriptors */ 4984 err = i40e_vsi_setup_tx_resources(vsi); 4985 if (err) 4986 goto err_setup_tx; 4987 err = i40e_vsi_setup_rx_resources(vsi); 4988 if (err) 4989 goto err_setup_rx; 4990 4991 err = i40e_vsi_configure(vsi); 4992 if (err) 4993 goto err_setup_rx; 4994 4995 if (vsi->netdev) { 4996 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 4997 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 4998 err = i40e_vsi_request_irq(vsi, int_name); 4999 if (err) 5000 goto err_setup_rx; 5001 5002 /* Notify the stack of the actual queue counts. */ 5003 err = netif_set_real_num_tx_queues(vsi->netdev, 5004 vsi->num_queue_pairs); 5005 if (err) 5006 goto err_set_queues; 5007 5008 err = netif_set_real_num_rx_queues(vsi->netdev, 5009 vsi->num_queue_pairs); 5010 if (err) 5011 goto err_set_queues; 5012 5013 } else if (vsi->type == I40E_VSI_FDIR) { 5014 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 5015 dev_driver_string(&pf->pdev->dev), 5016 dev_name(&pf->pdev->dev)); 5017 err = i40e_vsi_request_irq(vsi, int_name); 5018 5019 } else { 5020 err = -EINVAL; 5021 goto err_setup_rx; 5022 } 5023 5024 err = i40e_up_complete(vsi); 5025 if (err) 5026 goto err_up_complete; 5027 5028 return 0; 5029 5030 err_up_complete: 5031 i40e_down(vsi); 5032 err_set_queues: 5033 i40e_vsi_free_irq(vsi); 5034 err_setup_rx: 5035 i40e_vsi_free_rx_resources(vsi); 5036 err_setup_tx: 5037 i40e_vsi_free_tx_resources(vsi); 5038 if (vsi == pf->vsi[pf->lan_vsi]) 5039 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 5040 5041 return err; 5042 } 5043 5044 /** 5045 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 5046 * @pf: Pointer to PF 5047 * 5048 * This function destroys the hlist where all the Flow Director 5049 * filters were saved. 5050 **/ 5051 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 5052 { 5053 struct i40e_fdir_filter *filter; 5054 struct hlist_node *node2; 5055 5056 hlist_for_each_entry_safe(filter, node2, 5057 &pf->fdir_filter_list, fdir_node) { 5058 hlist_del(&filter->fdir_node); 5059 kfree(filter); 5060 } 5061 pf->fdir_pf_active_filters = 0; 5062 } 5063 5064 /** 5065 * i40e_close - Disables a network interface 5066 * @netdev: network interface device structure 5067 * 5068 * The close entry point is called when an interface is de-activated 5069 * by the OS. The hardware is still under the driver's control, but 5070 * this netdev interface is disabled. 5071 * 5072 * Returns 0, this is not allowed to fail 5073 **/ 5074 #ifdef I40E_FCOE 5075 int i40e_close(struct net_device *netdev) 5076 #else 5077 static int i40e_close(struct net_device *netdev) 5078 #endif 5079 { 5080 struct i40e_netdev_priv *np = netdev_priv(netdev); 5081 struct i40e_vsi *vsi = np->vsi; 5082 5083 i40e_vsi_close(vsi); 5084 5085 return 0; 5086 } 5087 5088 /** 5089 * i40e_do_reset - Start a PF or Core Reset sequence 5090 * @pf: board private structure 5091 * @reset_flags: which reset is requested 5092 * 5093 * The essential difference in resets is that the PF Reset 5094 * doesn't clear the packet buffers, doesn't reset the PE 5095 * firmware, and doesn't bother the other PFs on the chip. 5096 **/ 5097 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 5098 { 5099 u32 val; 5100 5101 WARN_ON(in_interrupt()); 5102 5103 if (i40e_check_asq_alive(&pf->hw)) 5104 i40e_vc_notify_reset(pf); 5105 5106 /* do the biggest reset indicated */ 5107 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { 5108 5109 /* Request a Global Reset 5110 * 5111 * This will start the chip's countdown to the actual full 5112 * chip reset event, and a warning interrupt to be sent 5113 * to all PFs, including the requestor. Our handler 5114 * for the warning interrupt will deal with the shutdown 5115 * and recovery of the switch setup. 5116 */ 5117 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 5118 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5119 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 5120 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5121 5122 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { 5123 5124 /* Request a Core Reset 5125 * 5126 * Same as Global Reset, except does *not* include the MAC/PHY 5127 */ 5128 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 5129 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5130 val |= I40E_GLGEN_RTRIG_CORER_MASK; 5131 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5132 i40e_flush(&pf->hw); 5133 5134 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) { 5135 5136 /* Request a PF Reset 5137 * 5138 * Resets only the PF-specific registers 5139 * 5140 * This goes directly to the tear-down and rebuild of 5141 * the switch, since we need to do all the recovery as 5142 * for the Core Reset. 5143 */ 5144 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5145 i40e_handle_reset_warning(pf); 5146 5147 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { 5148 int v; 5149 5150 /* Find the VSI(s) that requested a re-init */ 5151 dev_info(&pf->pdev->dev, 5152 "VSI reinit requested\n"); 5153 for (v = 0; v < pf->num_alloc_vsi; v++) { 5154 struct i40e_vsi *vsi = pf->vsi[v]; 5155 if (vsi != NULL && 5156 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5157 i40e_vsi_reinit_locked(pf->vsi[v]); 5158 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5159 } 5160 } 5161 5162 /* no further action needed, so return now */ 5163 return; 5164 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { 5165 int v; 5166 5167 /* Find the VSI(s) that needs to be brought down */ 5168 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5169 for (v = 0; v < pf->num_alloc_vsi; v++) { 5170 struct i40e_vsi *vsi = pf->vsi[v]; 5171 if (vsi != NULL && 5172 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5173 set_bit(__I40E_DOWN, &vsi->state); 5174 i40e_down(vsi); 5175 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5176 } 5177 } 5178 5179 /* no further action needed, so return now */ 5180 return; 5181 } else { 5182 dev_info(&pf->pdev->dev, 5183 "bad reset request 0x%08x\n", reset_flags); 5184 return; 5185 } 5186 } 5187 5188 #ifdef CONFIG_I40E_DCB 5189 /** 5190 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5191 * @pf: board private structure 5192 * @old_cfg: current DCB config 5193 * @new_cfg: new DCB config 5194 **/ 5195 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5196 struct i40e_dcbx_config *old_cfg, 5197 struct i40e_dcbx_config *new_cfg) 5198 { 5199 bool need_reconfig = false; 5200 5201 /* Check if ETS configuration has changed */ 5202 if (memcmp(&new_cfg->etscfg, 5203 &old_cfg->etscfg, 5204 sizeof(new_cfg->etscfg))) { 5205 /* If Priority Table has changed reconfig is needed */ 5206 if (memcmp(&new_cfg->etscfg.prioritytable, 5207 &old_cfg->etscfg.prioritytable, 5208 sizeof(new_cfg->etscfg.prioritytable))) { 5209 need_reconfig = true; 5210 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5211 } 5212 5213 if (memcmp(&new_cfg->etscfg.tcbwtable, 5214 &old_cfg->etscfg.tcbwtable, 5215 sizeof(new_cfg->etscfg.tcbwtable))) 5216 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5217 5218 if (memcmp(&new_cfg->etscfg.tsatable, 5219 &old_cfg->etscfg.tsatable, 5220 sizeof(new_cfg->etscfg.tsatable))) 5221 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5222 } 5223 5224 /* Check if PFC configuration has changed */ 5225 if (memcmp(&new_cfg->pfc, 5226 &old_cfg->pfc, 5227 sizeof(new_cfg->pfc))) { 5228 need_reconfig = true; 5229 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5230 } 5231 5232 /* Check if APP Table has changed */ 5233 if (memcmp(&new_cfg->app, 5234 &old_cfg->app, 5235 sizeof(new_cfg->app))) { 5236 need_reconfig = true; 5237 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5238 } 5239 5240 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__, 5241 need_reconfig); 5242 return need_reconfig; 5243 } 5244 5245 /** 5246 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5247 * @pf: board private structure 5248 * @e: event info posted on ARQ 5249 **/ 5250 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5251 struct i40e_arq_event_info *e) 5252 { 5253 struct i40e_aqc_lldp_get_mib *mib = 5254 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5255 struct i40e_hw *hw = &pf->hw; 5256 struct i40e_dcbx_config tmp_dcbx_cfg; 5257 bool need_reconfig = false; 5258 int ret = 0; 5259 u8 type; 5260 5261 /* Not DCB capable or capability disabled */ 5262 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5263 return ret; 5264 5265 /* Ignore if event is not for Nearest Bridge */ 5266 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5267 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5268 dev_dbg(&pf->pdev->dev, 5269 "%s: LLDP event mib bridge type 0x%x\n", __func__, type); 5270 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5271 return ret; 5272 5273 /* Check MIB Type and return if event for Remote MIB update */ 5274 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5275 dev_dbg(&pf->pdev->dev, 5276 "%s: LLDP event mib type %s\n", __func__, 5277 type ? "remote" : "local"); 5278 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5279 /* Update the remote cached instance and return */ 5280 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5281 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5282 &hw->remote_dcbx_config); 5283 goto exit; 5284 } 5285 5286 /* Store the old configuration */ 5287 tmp_dcbx_cfg = hw->local_dcbx_config; 5288 5289 /* Reset the old DCBx configuration data */ 5290 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 5291 /* Get updated DCBX data from firmware */ 5292 ret = i40e_get_dcb_config(&pf->hw); 5293 if (ret) { 5294 dev_info(&pf->pdev->dev, 5295 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", 5296 i40e_stat_str(&pf->hw, ret), 5297 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5298 goto exit; 5299 } 5300 5301 /* No change detected in DCBX configs */ 5302 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 5303 sizeof(tmp_dcbx_cfg))) { 5304 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5305 goto exit; 5306 } 5307 5308 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 5309 &hw->local_dcbx_config); 5310 5311 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 5312 5313 if (!need_reconfig) 5314 goto exit; 5315 5316 /* Enable DCB tagging only when more than one TC */ 5317 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5318 pf->flags |= I40E_FLAG_DCB_ENABLED; 5319 else 5320 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5321 5322 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5323 /* Reconfiguration needed quiesce all VSIs */ 5324 i40e_pf_quiesce_all_vsi(pf); 5325 5326 /* Changes in configuration update VEB/VSI */ 5327 i40e_dcb_reconfigure(pf); 5328 5329 ret = i40e_resume_port_tx(pf); 5330 5331 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5332 /* In case of error no point in resuming VSIs */ 5333 if (ret) 5334 goto exit; 5335 5336 /* Wait for the PF's Tx queues to be disabled */ 5337 ret = i40e_pf_wait_txq_disabled(pf); 5338 if (ret) { 5339 /* Schedule PF reset to recover */ 5340 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5341 i40e_service_event_schedule(pf); 5342 } else { 5343 i40e_pf_unquiesce_all_vsi(pf); 5344 } 5345 5346 exit: 5347 return ret; 5348 } 5349 #endif /* CONFIG_I40E_DCB */ 5350 5351 /** 5352 * i40e_do_reset_safe - Protected reset path for userland calls. 5353 * @pf: board private structure 5354 * @reset_flags: which reset is requested 5355 * 5356 **/ 5357 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 5358 { 5359 rtnl_lock(); 5360 i40e_do_reset(pf, reset_flags); 5361 rtnl_unlock(); 5362 } 5363 5364 /** 5365 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 5366 * @pf: board private structure 5367 * @e: event info posted on ARQ 5368 * 5369 * Handler for LAN Queue Overflow Event generated by the firmware for PF 5370 * and VF queues 5371 **/ 5372 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 5373 struct i40e_arq_event_info *e) 5374 { 5375 struct i40e_aqc_lan_overflow *data = 5376 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 5377 u32 queue = le32_to_cpu(data->prtdcb_rupto); 5378 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 5379 struct i40e_hw *hw = &pf->hw; 5380 struct i40e_vf *vf; 5381 u16 vf_id; 5382 5383 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 5384 queue, qtx_ctl); 5385 5386 /* Queue belongs to VF, find the VF and issue VF reset */ 5387 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 5388 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 5389 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 5390 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 5391 vf_id -= hw->func_caps.vf_base_id; 5392 vf = &pf->vf[vf_id]; 5393 i40e_vc_notify_vf_reset(vf); 5394 /* Allow VF to process pending reset notification */ 5395 msleep(20); 5396 i40e_reset_vf(vf, false); 5397 } 5398 } 5399 5400 /** 5401 * i40e_service_event_complete - Finish up the service event 5402 * @pf: board private structure 5403 **/ 5404 static void i40e_service_event_complete(struct i40e_pf *pf) 5405 { 5406 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); 5407 5408 /* flush memory to make sure state is correct before next watchog */ 5409 smp_mb__before_atomic(); 5410 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 5411 } 5412 5413 /** 5414 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 5415 * @pf: board private structure 5416 **/ 5417 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 5418 { 5419 u32 val, fcnt_prog; 5420 5421 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5422 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 5423 return fcnt_prog; 5424 } 5425 5426 /** 5427 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 5428 * @pf: board private structure 5429 **/ 5430 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 5431 { 5432 u32 val, fcnt_prog; 5433 5434 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5435 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 5436 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 5437 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 5438 return fcnt_prog; 5439 } 5440 5441 /** 5442 * i40e_get_global_fd_count - Get total FD filters programmed on device 5443 * @pf: board private structure 5444 **/ 5445 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 5446 { 5447 u32 val, fcnt_prog; 5448 5449 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 5450 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 5451 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 5452 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 5453 return fcnt_prog; 5454 } 5455 5456 /** 5457 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 5458 * @pf: board private structure 5459 **/ 5460 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 5461 { 5462 u32 fcnt_prog, fcnt_avail; 5463 5464 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5465 return; 5466 5467 /* Check if, FD SB or ATR was auto disabled and if there is enough room 5468 * to re-enable 5469 */ 5470 fcnt_prog = i40e_get_global_fd_count(pf); 5471 fcnt_avail = pf->fdir_pf_filter_count; 5472 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 5473 (pf->fd_add_err == 0) || 5474 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 5475 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 5476 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 5477 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5478 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5479 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 5480 } 5481 } 5482 /* Wait for some more space to be available to turn on ATR */ 5483 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 5484 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 5485 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5486 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5487 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5488 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); 5489 } 5490 } 5491 } 5492 5493 #define I40E_MIN_FD_FLUSH_INTERVAL 10 5494 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 5495 /** 5496 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 5497 * @pf: board private structure 5498 **/ 5499 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 5500 { 5501 unsigned long min_flush_time; 5502 int flush_wait_retry = 50; 5503 bool disable_atr = false; 5504 int fd_room; 5505 int reg; 5506 5507 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5508 return; 5509 5510 if (time_after(jiffies, pf->fd_flush_timestamp + 5511 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) { 5512 /* If the flush is happening too quick and we have mostly 5513 * SB rules we should not re-enable ATR for some time. 5514 */ 5515 min_flush_time = pf->fd_flush_timestamp 5516 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 5517 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 5518 5519 if (!(time_after(jiffies, min_flush_time)) && 5520 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 5521 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5522 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 5523 disable_atr = true; 5524 } 5525 5526 pf->fd_flush_timestamp = jiffies; 5527 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5528 /* flush all filters */ 5529 wr32(&pf->hw, I40E_PFQF_CTL_1, 5530 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 5531 i40e_flush(&pf->hw); 5532 pf->fd_flush_cnt++; 5533 pf->fd_add_err = 0; 5534 do { 5535 /* Check FD flush status every 5-6msec */ 5536 usleep_range(5000, 6000); 5537 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 5538 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 5539 break; 5540 } while (flush_wait_retry--); 5541 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 5542 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 5543 } else { 5544 /* replay sideband filters */ 5545 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 5546 if (!disable_atr) 5547 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 5548 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5549 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5550 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 5551 } 5552 } 5553 } 5554 5555 /** 5556 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 5557 * @pf: board private structure 5558 **/ 5559 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 5560 { 5561 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 5562 } 5563 5564 /* We can see up to 256 filter programming desc in transit if the filters are 5565 * being applied really fast; before we see the first 5566 * filter miss error on Rx queue 0. Accumulating enough error messages before 5567 * reacting will make sure we don't cause flush too often. 5568 */ 5569 #define I40E_MAX_FD_PROGRAM_ERROR 256 5570 5571 /** 5572 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 5573 * @pf: board private structure 5574 **/ 5575 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 5576 { 5577 5578 /* if interface is down do nothing */ 5579 if (test_bit(__I40E_DOWN, &pf->state)) 5580 return; 5581 5582 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5583 return; 5584 5585 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5586 i40e_fdir_flush_and_replay(pf); 5587 5588 i40e_fdir_check_and_reenable(pf); 5589 5590 } 5591 5592 /** 5593 * i40e_vsi_link_event - notify VSI of a link event 5594 * @vsi: vsi to be notified 5595 * @link_up: link up or down 5596 **/ 5597 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 5598 { 5599 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 5600 return; 5601 5602 switch (vsi->type) { 5603 case I40E_VSI_MAIN: 5604 #ifdef I40E_FCOE 5605 case I40E_VSI_FCOE: 5606 #endif 5607 if (!vsi->netdev || !vsi->netdev_registered) 5608 break; 5609 5610 if (link_up) { 5611 netif_carrier_on(vsi->netdev); 5612 netif_tx_wake_all_queues(vsi->netdev); 5613 } else { 5614 netif_carrier_off(vsi->netdev); 5615 netif_tx_stop_all_queues(vsi->netdev); 5616 } 5617 break; 5618 5619 case I40E_VSI_SRIOV: 5620 case I40E_VSI_VMDQ2: 5621 case I40E_VSI_CTRL: 5622 case I40E_VSI_MIRROR: 5623 default: 5624 /* there is no notification for other VSIs */ 5625 break; 5626 } 5627 } 5628 5629 /** 5630 * i40e_veb_link_event - notify elements on the veb of a link event 5631 * @veb: veb to be notified 5632 * @link_up: link up or down 5633 **/ 5634 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 5635 { 5636 struct i40e_pf *pf; 5637 int i; 5638 5639 if (!veb || !veb->pf) 5640 return; 5641 pf = veb->pf; 5642 5643 /* depth first... */ 5644 for (i = 0; i < I40E_MAX_VEB; i++) 5645 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 5646 i40e_veb_link_event(pf->veb[i], link_up); 5647 5648 /* ... now the local VSIs */ 5649 for (i = 0; i < pf->num_alloc_vsi; i++) 5650 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 5651 i40e_vsi_link_event(pf->vsi[i], link_up); 5652 } 5653 5654 /** 5655 * i40e_link_event - Update netif_carrier status 5656 * @pf: board private structure 5657 **/ 5658 static void i40e_link_event(struct i40e_pf *pf) 5659 { 5660 bool new_link, old_link; 5661 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5662 u8 new_link_speed, old_link_speed; 5663 5664 /* set this to force the get_link_status call to refresh state */ 5665 pf->hw.phy.get_link_info = true; 5666 5667 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 5668 new_link = i40e_get_link_status(&pf->hw); 5669 old_link_speed = pf->hw.phy.link_info_old.link_speed; 5670 new_link_speed = pf->hw.phy.link_info.link_speed; 5671 5672 if (new_link == old_link && 5673 new_link_speed == old_link_speed && 5674 (test_bit(__I40E_DOWN, &vsi->state) || 5675 new_link == netif_carrier_ok(vsi->netdev))) 5676 return; 5677 5678 if (!test_bit(__I40E_DOWN, &vsi->state)) 5679 i40e_print_link_message(vsi, new_link); 5680 5681 /* Notify the base of the switch tree connected to 5682 * the link. Floating VEBs are not notified. 5683 */ 5684 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 5685 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 5686 else 5687 i40e_vsi_link_event(vsi, new_link); 5688 5689 if (pf->vf) 5690 i40e_vc_notify_link_state(pf); 5691 5692 if (pf->flags & I40E_FLAG_PTP) 5693 i40e_ptp_set_increment(pf); 5694 } 5695 5696 /** 5697 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts 5698 * @pf: board private structure 5699 * 5700 * Set the per-queue flags to request a check for stuck queues in the irq 5701 * clean functions, then force interrupts to be sure the irq clean is called. 5702 **/ 5703 static void i40e_check_hang_subtask(struct i40e_pf *pf) 5704 { 5705 int i, v; 5706 5707 /* If we're down or resetting, just bail */ 5708 if (test_bit(__I40E_DOWN, &pf->state) || 5709 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5710 return; 5711 5712 /* for each VSI/netdev 5713 * for each Tx queue 5714 * set the check flag 5715 * for each q_vector 5716 * force an interrupt 5717 */ 5718 for (v = 0; v < pf->num_alloc_vsi; v++) { 5719 struct i40e_vsi *vsi = pf->vsi[v]; 5720 int armed = 0; 5721 5722 if (!pf->vsi[v] || 5723 test_bit(__I40E_DOWN, &vsi->state) || 5724 (vsi->netdev && !netif_carrier_ok(vsi->netdev))) 5725 continue; 5726 5727 for (i = 0; i < vsi->num_queue_pairs; i++) { 5728 set_check_for_tx_hang(vsi->tx_rings[i]); 5729 if (test_bit(__I40E_HANG_CHECK_ARMED, 5730 &vsi->tx_rings[i]->state)) 5731 armed++; 5732 } 5733 5734 if (armed) { 5735 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 5736 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, 5737 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 5738 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 5739 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 5740 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 5741 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 5742 } else { 5743 u16 vec = vsi->base_vector - 1; 5744 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | 5745 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK | 5746 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | 5747 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK | 5748 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK); 5749 for (i = 0; i < vsi->num_q_vectors; i++, vec++) 5750 wr32(&vsi->back->hw, 5751 I40E_PFINT_DYN_CTLN(vec), val); 5752 } 5753 i40e_flush(&vsi->back->hw); 5754 } 5755 } 5756 } 5757 5758 /** 5759 * i40e_watchdog_subtask - periodic checks not using event driven response 5760 * @pf: board private structure 5761 **/ 5762 static void i40e_watchdog_subtask(struct i40e_pf *pf) 5763 { 5764 int i; 5765 5766 /* if interface is down do nothing */ 5767 if (test_bit(__I40E_DOWN, &pf->state) || 5768 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5769 return; 5770 5771 /* make sure we don't do these things too often */ 5772 if (time_before(jiffies, (pf->service_timer_previous + 5773 pf->service_timer_period))) 5774 return; 5775 pf->service_timer_previous = jiffies; 5776 5777 i40e_check_hang_subtask(pf); 5778 i40e_link_event(pf); 5779 5780 /* Update the stats for active netdevs so the network stack 5781 * can look at updated numbers whenever it cares to 5782 */ 5783 for (i = 0; i < pf->num_alloc_vsi; i++) 5784 if (pf->vsi[i] && pf->vsi[i]->netdev) 5785 i40e_update_stats(pf->vsi[i]); 5786 5787 /* Update the stats for the active switching components */ 5788 for (i = 0; i < I40E_MAX_VEB; i++) 5789 if (pf->veb[i]) 5790 i40e_update_veb_stats(pf->veb[i]); 5791 5792 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 5793 } 5794 5795 /** 5796 * i40e_reset_subtask - Set up for resetting the device and driver 5797 * @pf: board private structure 5798 **/ 5799 static void i40e_reset_subtask(struct i40e_pf *pf) 5800 { 5801 u32 reset_flags = 0; 5802 5803 rtnl_lock(); 5804 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 5805 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED); 5806 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 5807 } 5808 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 5809 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED); 5810 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5811 } 5812 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 5813 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED); 5814 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 5815 } 5816 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 5817 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED); 5818 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 5819 } 5820 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 5821 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED); 5822 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 5823 } 5824 5825 /* If there's a recovery already waiting, it takes 5826 * precedence before starting a new reset sequence. 5827 */ 5828 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 5829 i40e_handle_reset_warning(pf); 5830 goto unlock; 5831 } 5832 5833 /* If we're already down or resetting, just bail */ 5834 if (reset_flags && 5835 !test_bit(__I40E_DOWN, &pf->state) && 5836 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5837 i40e_do_reset(pf, reset_flags); 5838 5839 unlock: 5840 rtnl_unlock(); 5841 } 5842 5843 /** 5844 * i40e_handle_link_event - Handle link event 5845 * @pf: board private structure 5846 * @e: event info posted on ARQ 5847 **/ 5848 static void i40e_handle_link_event(struct i40e_pf *pf, 5849 struct i40e_arq_event_info *e) 5850 { 5851 struct i40e_hw *hw = &pf->hw; 5852 struct i40e_aqc_get_link_status *status = 5853 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 5854 5855 /* save off old link status information */ 5856 hw->phy.link_info_old = hw->phy.link_info; 5857 5858 /* Do a new status request to re-enable LSE reporting 5859 * and load new status information into the hw struct 5860 * This completely ignores any state information 5861 * in the ARQ event info, instead choosing to always 5862 * issue the AQ update link status command. 5863 */ 5864 i40e_link_event(pf); 5865 5866 /* check for unqualified module, if link is down */ 5867 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 5868 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 5869 (!(status->link_info & I40E_AQ_LINK_UP))) 5870 dev_err(&pf->pdev->dev, 5871 "The driver failed to link because an unqualified module was detected.\n"); 5872 } 5873 5874 /** 5875 * i40e_clean_adminq_subtask - Clean the AdminQ rings 5876 * @pf: board private structure 5877 **/ 5878 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 5879 { 5880 struct i40e_arq_event_info event; 5881 struct i40e_hw *hw = &pf->hw; 5882 u16 pending, i = 0; 5883 i40e_status ret; 5884 u16 opcode; 5885 u32 oldval; 5886 u32 val; 5887 5888 /* Do not run clean AQ when PF reset fails */ 5889 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 5890 return; 5891 5892 /* check for error indications */ 5893 val = rd32(&pf->hw, pf->hw.aq.arq.len); 5894 oldval = val; 5895 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 5896 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 5897 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 5898 } 5899 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 5900 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 5901 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 5902 } 5903 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 5904 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 5905 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 5906 } 5907 if (oldval != val) 5908 wr32(&pf->hw, pf->hw.aq.arq.len, val); 5909 5910 val = rd32(&pf->hw, pf->hw.aq.asq.len); 5911 oldval = val; 5912 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 5913 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 5914 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 5915 } 5916 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 5917 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 5918 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 5919 } 5920 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 5921 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 5922 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 5923 } 5924 if (oldval != val) 5925 wr32(&pf->hw, pf->hw.aq.asq.len, val); 5926 5927 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 5928 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 5929 if (!event.msg_buf) 5930 return; 5931 5932 do { 5933 ret = i40e_clean_arq_element(hw, &event, &pending); 5934 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 5935 break; 5936 else if (ret) { 5937 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 5938 break; 5939 } 5940 5941 opcode = le16_to_cpu(event.desc.opcode); 5942 switch (opcode) { 5943 5944 case i40e_aqc_opc_get_link_status: 5945 i40e_handle_link_event(pf, &event); 5946 break; 5947 case i40e_aqc_opc_send_msg_to_pf: 5948 ret = i40e_vc_process_vf_msg(pf, 5949 le16_to_cpu(event.desc.retval), 5950 le32_to_cpu(event.desc.cookie_high), 5951 le32_to_cpu(event.desc.cookie_low), 5952 event.msg_buf, 5953 event.msg_len); 5954 break; 5955 case i40e_aqc_opc_lldp_update_mib: 5956 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 5957 #ifdef CONFIG_I40E_DCB 5958 rtnl_lock(); 5959 ret = i40e_handle_lldp_event(pf, &event); 5960 rtnl_unlock(); 5961 #endif /* CONFIG_I40E_DCB */ 5962 break; 5963 case i40e_aqc_opc_event_lan_overflow: 5964 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 5965 i40e_handle_lan_overflow_event(pf, &event); 5966 break; 5967 case i40e_aqc_opc_send_msg_to_peer: 5968 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 5969 break; 5970 case i40e_aqc_opc_nvm_erase: 5971 case i40e_aqc_opc_nvm_update: 5972 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n"); 5973 break; 5974 default: 5975 dev_info(&pf->pdev->dev, 5976 "ARQ Error: Unknown event 0x%04x received\n", 5977 opcode); 5978 break; 5979 } 5980 } while (pending && (i++ < pf->adminq_work_limit)); 5981 5982 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 5983 /* re-enable Admin queue interrupt cause */ 5984 val = rd32(hw, I40E_PFINT_ICR0_ENA); 5985 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 5986 wr32(hw, I40E_PFINT_ICR0_ENA, val); 5987 i40e_flush(hw); 5988 5989 kfree(event.msg_buf); 5990 } 5991 5992 /** 5993 * i40e_verify_eeprom - make sure eeprom is good to use 5994 * @pf: board private structure 5995 **/ 5996 static void i40e_verify_eeprom(struct i40e_pf *pf) 5997 { 5998 int err; 5999 6000 err = i40e_diag_eeprom_test(&pf->hw); 6001 if (err) { 6002 /* retry in case of garbage read */ 6003 err = i40e_diag_eeprom_test(&pf->hw); 6004 if (err) { 6005 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 6006 err); 6007 set_bit(__I40E_BAD_EEPROM, &pf->state); 6008 } 6009 } 6010 6011 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 6012 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 6013 clear_bit(__I40E_BAD_EEPROM, &pf->state); 6014 } 6015 } 6016 6017 /** 6018 * i40e_enable_pf_switch_lb 6019 * @pf: pointer to the PF structure 6020 * 6021 * enable switch loop back or die - no point in a return value 6022 **/ 6023 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 6024 { 6025 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6026 struct i40e_vsi_context ctxt; 6027 int ret; 6028 6029 ctxt.seid = pf->main_vsi_seid; 6030 ctxt.pf_num = pf->hw.pf_id; 6031 ctxt.vf_num = 0; 6032 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6033 if (ret) { 6034 dev_info(&pf->pdev->dev, 6035 "couldn't get PF vsi config, err %s aq_err %s\n", 6036 i40e_stat_str(&pf->hw, ret), 6037 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6038 return; 6039 } 6040 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6041 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6042 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6043 6044 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6045 if (ret) { 6046 dev_info(&pf->pdev->dev, 6047 "update vsi switch failed, err %s aq_err %s\n", 6048 i40e_stat_str(&pf->hw, ret), 6049 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6050 } 6051 } 6052 6053 /** 6054 * i40e_disable_pf_switch_lb 6055 * @pf: pointer to the PF structure 6056 * 6057 * disable switch loop back or die - no point in a return value 6058 **/ 6059 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 6060 { 6061 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6062 struct i40e_vsi_context ctxt; 6063 int ret; 6064 6065 ctxt.seid = pf->main_vsi_seid; 6066 ctxt.pf_num = pf->hw.pf_id; 6067 ctxt.vf_num = 0; 6068 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6069 if (ret) { 6070 dev_info(&pf->pdev->dev, 6071 "couldn't get PF vsi config, err %s aq_err %s\n", 6072 i40e_stat_str(&pf->hw, ret), 6073 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6074 return; 6075 } 6076 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6077 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6078 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6079 6080 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6081 if (ret) { 6082 dev_info(&pf->pdev->dev, 6083 "update vsi switch failed, err %s aq_err %s\n", 6084 i40e_stat_str(&pf->hw, ret), 6085 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6086 } 6087 } 6088 6089 /** 6090 * i40e_config_bridge_mode - Configure the HW bridge mode 6091 * @veb: pointer to the bridge instance 6092 * 6093 * Configure the loop back mode for the LAN VSI that is downlink to the 6094 * specified HW bridge instance. It is expected this function is called 6095 * when a new HW bridge is instantiated. 6096 **/ 6097 static void i40e_config_bridge_mode(struct i40e_veb *veb) 6098 { 6099 struct i40e_pf *pf = veb->pf; 6100 6101 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 6102 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 6103 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 6104 i40e_disable_pf_switch_lb(pf); 6105 else 6106 i40e_enable_pf_switch_lb(pf); 6107 } 6108 6109 /** 6110 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 6111 * @veb: pointer to the VEB instance 6112 * 6113 * This is a recursive function that first builds the attached VSIs then 6114 * recurses in to build the next layer of VEB. We track the connections 6115 * through our own index numbers because the seid's from the HW could 6116 * change across the reset. 6117 **/ 6118 static int i40e_reconstitute_veb(struct i40e_veb *veb) 6119 { 6120 struct i40e_vsi *ctl_vsi = NULL; 6121 struct i40e_pf *pf = veb->pf; 6122 int v, veb_idx; 6123 int ret; 6124 6125 /* build VSI that owns this VEB, temporarily attached to base VEB */ 6126 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 6127 if (pf->vsi[v] && 6128 pf->vsi[v]->veb_idx == veb->idx && 6129 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 6130 ctl_vsi = pf->vsi[v]; 6131 break; 6132 } 6133 } 6134 if (!ctl_vsi) { 6135 dev_info(&pf->pdev->dev, 6136 "missing owner VSI for veb_idx %d\n", veb->idx); 6137 ret = -ENOENT; 6138 goto end_reconstitute; 6139 } 6140 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 6141 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6142 ret = i40e_add_vsi(ctl_vsi); 6143 if (ret) { 6144 dev_info(&pf->pdev->dev, 6145 "rebuild of veb_idx %d owner VSI failed: %d\n", 6146 veb->idx, ret); 6147 goto end_reconstitute; 6148 } 6149 i40e_vsi_reset_stats(ctl_vsi); 6150 6151 /* create the VEB in the switch and move the VSI onto the VEB */ 6152 ret = i40e_add_veb(veb, ctl_vsi); 6153 if (ret) 6154 goto end_reconstitute; 6155 6156 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 6157 veb->bridge_mode = BRIDGE_MODE_VEB; 6158 else 6159 veb->bridge_mode = BRIDGE_MODE_VEPA; 6160 i40e_config_bridge_mode(veb); 6161 6162 /* create the remaining VSIs attached to this VEB */ 6163 for (v = 0; v < pf->num_alloc_vsi; v++) { 6164 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 6165 continue; 6166 6167 if (pf->vsi[v]->veb_idx == veb->idx) { 6168 struct i40e_vsi *vsi = pf->vsi[v]; 6169 vsi->uplink_seid = veb->seid; 6170 ret = i40e_add_vsi(vsi); 6171 if (ret) { 6172 dev_info(&pf->pdev->dev, 6173 "rebuild of vsi_idx %d failed: %d\n", 6174 v, ret); 6175 goto end_reconstitute; 6176 } 6177 i40e_vsi_reset_stats(vsi); 6178 } 6179 } 6180 6181 /* create any VEBs attached to this VEB - RECURSION */ 6182 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 6183 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 6184 pf->veb[veb_idx]->uplink_seid = veb->seid; 6185 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 6186 if (ret) 6187 break; 6188 } 6189 } 6190 6191 end_reconstitute: 6192 return ret; 6193 } 6194 6195 /** 6196 * i40e_get_capabilities - get info about the HW 6197 * @pf: the PF struct 6198 **/ 6199 static int i40e_get_capabilities(struct i40e_pf *pf) 6200 { 6201 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 6202 u16 data_size; 6203 int buf_len; 6204 int err; 6205 6206 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 6207 do { 6208 cap_buf = kzalloc(buf_len, GFP_KERNEL); 6209 if (!cap_buf) 6210 return -ENOMEM; 6211 6212 /* this loads the data into the hw struct for us */ 6213 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 6214 &data_size, 6215 i40e_aqc_opc_list_func_capabilities, 6216 NULL); 6217 /* data loaded, buffer no longer needed */ 6218 kfree(cap_buf); 6219 6220 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 6221 /* retry with a larger buffer */ 6222 buf_len = data_size; 6223 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 6224 dev_info(&pf->pdev->dev, 6225 "capability discovery failed, err %s aq_err %s\n", 6226 i40e_stat_str(&pf->hw, err), 6227 i40e_aq_str(&pf->hw, 6228 pf->hw.aq.asq_last_status)); 6229 return -ENODEV; 6230 } 6231 } while (err); 6232 6233 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || 6234 (pf->hw.aq.fw_maj_ver < 2)) { 6235 pf->hw.func_caps.num_msix_vectors++; 6236 pf->hw.func_caps.num_msix_vectors_vf++; 6237 } 6238 6239 if (pf->hw.debug_mask & I40E_DEBUG_USER) 6240 dev_info(&pf->pdev->dev, 6241 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 6242 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 6243 pf->hw.func_caps.num_msix_vectors, 6244 pf->hw.func_caps.num_msix_vectors_vf, 6245 pf->hw.func_caps.fd_filters_guaranteed, 6246 pf->hw.func_caps.fd_filters_best_effort, 6247 pf->hw.func_caps.num_tx_qp, 6248 pf->hw.func_caps.num_vsis); 6249 6250 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 6251 + pf->hw.func_caps.num_vfs) 6252 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 6253 dev_info(&pf->pdev->dev, 6254 "got num_vsis %d, setting num_vsis to %d\n", 6255 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 6256 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 6257 } 6258 6259 return 0; 6260 } 6261 6262 static int i40e_vsi_clear(struct i40e_vsi *vsi); 6263 6264 /** 6265 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 6266 * @pf: board private structure 6267 **/ 6268 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 6269 { 6270 struct i40e_vsi *vsi; 6271 int i; 6272 6273 /* quick workaround for an NVM issue that leaves a critical register 6274 * uninitialized 6275 */ 6276 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6277 static const u32 hkey[] = { 6278 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6279 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6280 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6281 0x95b3a76d}; 6282 6283 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6284 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6285 } 6286 6287 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6288 return; 6289 6290 /* find existing VSI and see if it needs configuring */ 6291 vsi = NULL; 6292 for (i = 0; i < pf->num_alloc_vsi; i++) { 6293 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6294 vsi = pf->vsi[i]; 6295 break; 6296 } 6297 } 6298 6299 /* create a new VSI if none exists */ 6300 if (!vsi) { 6301 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6302 pf->vsi[pf->lan_vsi]->seid, 0); 6303 if (!vsi) { 6304 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6305 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6306 return; 6307 } 6308 } 6309 6310 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6311 } 6312 6313 /** 6314 * i40e_fdir_teardown - release the Flow Director resources 6315 * @pf: board private structure 6316 **/ 6317 static void i40e_fdir_teardown(struct i40e_pf *pf) 6318 { 6319 int i; 6320 6321 i40e_fdir_filter_exit(pf); 6322 for (i = 0; i < pf->num_alloc_vsi; i++) { 6323 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6324 i40e_vsi_release(pf->vsi[i]); 6325 break; 6326 } 6327 } 6328 } 6329 6330 /** 6331 * i40e_prep_for_reset - prep for the core to reset 6332 * @pf: board private structure 6333 * 6334 * Close up the VFs and other things in prep for PF Reset. 6335 **/ 6336 static void i40e_prep_for_reset(struct i40e_pf *pf) 6337 { 6338 struct i40e_hw *hw = &pf->hw; 6339 i40e_status ret = 0; 6340 u32 v; 6341 6342 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6343 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6344 return; 6345 6346 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6347 6348 /* quiesce the VSIs and their queues that are not already DOWN */ 6349 i40e_pf_quiesce_all_vsi(pf); 6350 6351 for (v = 0; v < pf->num_alloc_vsi; v++) { 6352 if (pf->vsi[v]) 6353 pf->vsi[v]->seid = 0; 6354 } 6355 6356 i40e_shutdown_adminq(&pf->hw); 6357 6358 /* call shutdown HMC */ 6359 if (hw->hmc.hmc_obj) { 6360 ret = i40e_shutdown_lan_hmc(hw); 6361 if (ret) 6362 dev_warn(&pf->pdev->dev, 6363 "shutdown_lan_hmc failed: %d\n", ret); 6364 } 6365 } 6366 6367 /** 6368 * i40e_send_version - update firmware with driver version 6369 * @pf: PF struct 6370 */ 6371 static void i40e_send_version(struct i40e_pf *pf) 6372 { 6373 struct i40e_driver_version dv; 6374 6375 dv.major_version = DRV_VERSION_MAJOR; 6376 dv.minor_version = DRV_VERSION_MINOR; 6377 dv.build_version = DRV_VERSION_BUILD; 6378 dv.subbuild_version = 0; 6379 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 6380 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 6381 } 6382 6383 /** 6384 * i40e_reset_and_rebuild - reset and rebuild using a saved config 6385 * @pf: board private structure 6386 * @reinit: if the Main VSI needs to re-initialized. 6387 **/ 6388 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 6389 { 6390 struct i40e_hw *hw = &pf->hw; 6391 u8 set_fc_aq_fail = 0; 6392 i40e_status ret; 6393 u32 v; 6394 6395 /* Now we wait for GRST to settle out. 6396 * We don't have to delete the VEBs or VSIs from the hw switch 6397 * because the reset will make them disappear. 6398 */ 6399 ret = i40e_pf_reset(hw); 6400 if (ret) { 6401 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 6402 set_bit(__I40E_RESET_FAILED, &pf->state); 6403 goto clear_recovery; 6404 } 6405 pf->pfr_count++; 6406 6407 if (test_bit(__I40E_DOWN, &pf->state)) 6408 goto clear_recovery; 6409 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 6410 6411 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 6412 ret = i40e_init_adminq(&pf->hw); 6413 if (ret) { 6414 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", 6415 i40e_stat_str(&pf->hw, ret), 6416 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6417 goto clear_recovery; 6418 } 6419 6420 /* re-verify the eeprom if we just had an EMP reset */ 6421 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) 6422 i40e_verify_eeprom(pf); 6423 6424 i40e_clear_pxe_mode(hw); 6425 ret = i40e_get_capabilities(pf); 6426 if (ret) 6427 goto end_core_reset; 6428 6429 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 6430 hw->func_caps.num_rx_qp, 6431 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 6432 if (ret) { 6433 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 6434 goto end_core_reset; 6435 } 6436 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 6437 if (ret) { 6438 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 6439 goto end_core_reset; 6440 } 6441 6442 #ifdef CONFIG_I40E_DCB 6443 ret = i40e_init_pf_dcb(pf); 6444 if (ret) { 6445 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 6446 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 6447 /* Continue without DCB enabled */ 6448 } 6449 #endif /* CONFIG_I40E_DCB */ 6450 #ifdef I40E_FCOE 6451 ret = i40e_init_pf_fcoe(pf); 6452 if (ret) 6453 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret); 6454 6455 #endif 6456 /* do basic switch setup */ 6457 ret = i40e_setup_pf_switch(pf, reinit); 6458 if (ret) 6459 goto end_core_reset; 6460 6461 /* driver is only interested in link up/down and module qualification 6462 * reports from firmware 6463 */ 6464 ret = i40e_aq_set_phy_int_mask(&pf->hw, 6465 I40E_AQ_EVENT_LINK_UPDOWN | 6466 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 6467 if (ret) 6468 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 6469 i40e_stat_str(&pf->hw, ret), 6470 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6471 6472 /* make sure our flow control settings are restored */ 6473 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 6474 if (ret) 6475 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n", 6476 i40e_stat_str(&pf->hw, ret), 6477 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6478 6479 /* Rebuild the VSIs and VEBs that existed before reset. 6480 * They are still in our local switch element arrays, so only 6481 * need to rebuild the switch model in the HW. 6482 * 6483 * If there were VEBs but the reconstitution failed, we'll try 6484 * try to recover minimal use by getting the basic PF VSI working. 6485 */ 6486 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 6487 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 6488 /* find the one VEB connected to the MAC, and find orphans */ 6489 for (v = 0; v < I40E_MAX_VEB; v++) { 6490 if (!pf->veb[v]) 6491 continue; 6492 6493 if (pf->veb[v]->uplink_seid == pf->mac_seid || 6494 pf->veb[v]->uplink_seid == 0) { 6495 ret = i40e_reconstitute_veb(pf->veb[v]); 6496 6497 if (!ret) 6498 continue; 6499 6500 /* If Main VEB failed, we're in deep doodoo, 6501 * so give up rebuilding the switch and set up 6502 * for minimal rebuild of PF VSI. 6503 * If orphan failed, we'll report the error 6504 * but try to keep going. 6505 */ 6506 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 6507 dev_info(&pf->pdev->dev, 6508 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 6509 ret); 6510 pf->vsi[pf->lan_vsi]->uplink_seid 6511 = pf->mac_seid; 6512 break; 6513 } else if (pf->veb[v]->uplink_seid == 0) { 6514 dev_info(&pf->pdev->dev, 6515 "rebuild of orphan VEB failed: %d\n", 6516 ret); 6517 } 6518 } 6519 } 6520 } 6521 6522 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 6523 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 6524 /* no VEB, so rebuild only the Main VSI */ 6525 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 6526 if (ret) { 6527 dev_info(&pf->pdev->dev, 6528 "rebuild of Main VSI failed: %d\n", ret); 6529 goto end_core_reset; 6530 } 6531 } 6532 6533 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 6534 (pf->hw.aq.fw_maj_ver < 4)) { 6535 msleep(75); 6536 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6537 if (ret) 6538 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 6539 i40e_stat_str(&pf->hw, ret), 6540 i40e_aq_str(&pf->hw, 6541 pf->hw.aq.asq_last_status)); 6542 } 6543 /* reinit the misc interrupt */ 6544 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6545 ret = i40e_setup_misc_vector(pf); 6546 6547 /* restart the VSIs that were rebuilt and running before the reset */ 6548 i40e_pf_unquiesce_all_vsi(pf); 6549 6550 if (pf->num_alloc_vfs) { 6551 for (v = 0; v < pf->num_alloc_vfs; v++) 6552 i40e_reset_vf(&pf->vf[v], true); 6553 } 6554 6555 /* tell the firmware that we're starting */ 6556 i40e_send_version(pf); 6557 6558 end_core_reset: 6559 clear_bit(__I40E_RESET_FAILED, &pf->state); 6560 clear_recovery: 6561 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 6562 } 6563 6564 /** 6565 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 6566 * @pf: board private structure 6567 * 6568 * Close up the VFs and other things in prep for a Core Reset, 6569 * then get ready to rebuild the world. 6570 **/ 6571 static void i40e_handle_reset_warning(struct i40e_pf *pf) 6572 { 6573 i40e_prep_for_reset(pf); 6574 i40e_reset_and_rebuild(pf, false); 6575 } 6576 6577 /** 6578 * i40e_handle_mdd_event 6579 * @pf: pointer to the PF structure 6580 * 6581 * Called from the MDD irq handler to identify possibly malicious vfs 6582 **/ 6583 static void i40e_handle_mdd_event(struct i40e_pf *pf) 6584 { 6585 struct i40e_hw *hw = &pf->hw; 6586 bool mdd_detected = false; 6587 bool pf_mdd_detected = false; 6588 struct i40e_vf *vf; 6589 u32 reg; 6590 int i; 6591 6592 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 6593 return; 6594 6595 /* find what triggered the MDD event */ 6596 reg = rd32(hw, I40E_GL_MDET_TX); 6597 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 6598 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 6599 I40E_GL_MDET_TX_PF_NUM_SHIFT; 6600 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 6601 I40E_GL_MDET_TX_VF_NUM_SHIFT; 6602 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 6603 I40E_GL_MDET_TX_EVENT_SHIFT; 6604 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 6605 I40E_GL_MDET_TX_QUEUE_SHIFT) - 6606 pf->hw.func_caps.base_queue; 6607 if (netif_msg_tx_err(pf)) 6608 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 6609 event, queue, pf_num, vf_num); 6610 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 6611 mdd_detected = true; 6612 } 6613 reg = rd32(hw, I40E_GL_MDET_RX); 6614 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 6615 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 6616 I40E_GL_MDET_RX_FUNCTION_SHIFT; 6617 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 6618 I40E_GL_MDET_RX_EVENT_SHIFT; 6619 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 6620 I40E_GL_MDET_RX_QUEUE_SHIFT) - 6621 pf->hw.func_caps.base_queue; 6622 if (netif_msg_rx_err(pf)) 6623 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 6624 event, queue, func); 6625 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 6626 mdd_detected = true; 6627 } 6628 6629 if (mdd_detected) { 6630 reg = rd32(hw, I40E_PF_MDET_TX); 6631 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 6632 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 6633 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 6634 pf_mdd_detected = true; 6635 } 6636 reg = rd32(hw, I40E_PF_MDET_RX); 6637 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 6638 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 6639 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 6640 pf_mdd_detected = true; 6641 } 6642 /* Queue belongs to the PF, initiate a reset */ 6643 if (pf_mdd_detected) { 6644 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6645 i40e_service_event_schedule(pf); 6646 } 6647 } 6648 6649 /* see if one of the VFs needs its hand slapped */ 6650 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 6651 vf = &(pf->vf[i]); 6652 reg = rd32(hw, I40E_VP_MDET_TX(i)); 6653 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 6654 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 6655 vf->num_mdd_events++; 6656 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 6657 i); 6658 } 6659 6660 reg = rd32(hw, I40E_VP_MDET_RX(i)); 6661 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 6662 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 6663 vf->num_mdd_events++; 6664 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 6665 i); 6666 } 6667 6668 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 6669 dev_info(&pf->pdev->dev, 6670 "Too many MDD events on VF %d, disabled\n", i); 6671 dev_info(&pf->pdev->dev, 6672 "Use PF Control I/F to re-enable the VF\n"); 6673 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 6674 } 6675 } 6676 6677 /* re-enable mdd interrupt cause */ 6678 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 6679 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 6680 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 6681 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 6682 i40e_flush(hw); 6683 } 6684 6685 #ifdef CONFIG_I40E_VXLAN 6686 /** 6687 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW 6688 * @pf: board private structure 6689 **/ 6690 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) 6691 { 6692 struct i40e_hw *hw = &pf->hw; 6693 i40e_status ret; 6694 __be16 port; 6695 int i; 6696 6697 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC)) 6698 return; 6699 6700 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC; 6701 6702 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 6703 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) { 6704 pf->pending_vxlan_bitmap &= ~BIT_ULL(i); 6705 port = pf->vxlan_ports[i]; 6706 if (port) 6707 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port), 6708 I40E_AQC_TUNNEL_TYPE_VXLAN, 6709 NULL, NULL); 6710 else 6711 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 6712 6713 if (ret) { 6714 dev_info(&pf->pdev->dev, 6715 "%s vxlan port %d, index %d failed, err %s aq_err %s\n", 6716 port ? "add" : "delete", 6717 ntohs(port), i, 6718 i40e_stat_str(&pf->hw, ret), 6719 i40e_aq_str(&pf->hw, 6720 pf->hw.aq.asq_last_status)); 6721 pf->vxlan_ports[i] = 0; 6722 } 6723 } 6724 } 6725 } 6726 6727 #endif 6728 /** 6729 * i40e_service_task - Run the driver's async subtasks 6730 * @work: pointer to work_struct containing our data 6731 **/ 6732 static void i40e_service_task(struct work_struct *work) 6733 { 6734 struct i40e_pf *pf = container_of(work, 6735 struct i40e_pf, 6736 service_task); 6737 unsigned long start_time = jiffies; 6738 6739 /* don't bother with service tasks if a reset is in progress */ 6740 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 6741 i40e_service_event_complete(pf); 6742 return; 6743 } 6744 6745 i40e_reset_subtask(pf); 6746 i40e_handle_mdd_event(pf); 6747 i40e_vc_process_vflr_event(pf); 6748 i40e_watchdog_subtask(pf); 6749 i40e_fdir_reinit_subtask(pf); 6750 i40e_sync_filters_subtask(pf); 6751 #ifdef CONFIG_I40E_VXLAN 6752 i40e_sync_vxlan_filters_subtask(pf); 6753 #endif 6754 i40e_clean_adminq_subtask(pf); 6755 6756 i40e_service_event_complete(pf); 6757 6758 /* If the tasks have taken longer than one timer cycle or there 6759 * is more work to be done, reschedule the service task now 6760 * rather than wait for the timer to tick again. 6761 */ 6762 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 6763 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 6764 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 6765 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 6766 i40e_service_event_schedule(pf); 6767 } 6768 6769 /** 6770 * i40e_service_timer - timer callback 6771 * @data: pointer to PF struct 6772 **/ 6773 static void i40e_service_timer(unsigned long data) 6774 { 6775 struct i40e_pf *pf = (struct i40e_pf *)data; 6776 6777 mod_timer(&pf->service_timer, 6778 round_jiffies(jiffies + pf->service_timer_period)); 6779 i40e_service_event_schedule(pf); 6780 } 6781 6782 /** 6783 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 6784 * @vsi: the VSI being configured 6785 **/ 6786 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 6787 { 6788 struct i40e_pf *pf = vsi->back; 6789 6790 switch (vsi->type) { 6791 case I40E_VSI_MAIN: 6792 vsi->alloc_queue_pairs = pf->num_lan_qps; 6793 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6794 I40E_REQ_DESCRIPTOR_MULTIPLE); 6795 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6796 vsi->num_q_vectors = pf->num_lan_msix; 6797 else 6798 vsi->num_q_vectors = 1; 6799 6800 break; 6801 6802 case I40E_VSI_FDIR: 6803 vsi->alloc_queue_pairs = 1; 6804 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 6805 I40E_REQ_DESCRIPTOR_MULTIPLE); 6806 vsi->num_q_vectors = 1; 6807 break; 6808 6809 case I40E_VSI_VMDQ2: 6810 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 6811 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6812 I40E_REQ_DESCRIPTOR_MULTIPLE); 6813 vsi->num_q_vectors = pf->num_vmdq_msix; 6814 break; 6815 6816 case I40E_VSI_SRIOV: 6817 vsi->alloc_queue_pairs = pf->num_vf_qps; 6818 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6819 I40E_REQ_DESCRIPTOR_MULTIPLE); 6820 break; 6821 6822 #ifdef I40E_FCOE 6823 case I40E_VSI_FCOE: 6824 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 6825 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6826 I40E_REQ_DESCRIPTOR_MULTIPLE); 6827 vsi->num_q_vectors = pf->num_fcoe_msix; 6828 break; 6829 6830 #endif /* I40E_FCOE */ 6831 default: 6832 WARN_ON(1); 6833 return -ENODATA; 6834 } 6835 6836 return 0; 6837 } 6838 6839 /** 6840 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 6841 * @type: VSI pointer 6842 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 6843 * 6844 * On error: returns error code (negative) 6845 * On success: returns 0 6846 **/ 6847 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 6848 { 6849 int size; 6850 int ret = 0; 6851 6852 /* allocate memory for both Tx and Rx ring pointers */ 6853 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 6854 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 6855 if (!vsi->tx_rings) 6856 return -ENOMEM; 6857 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 6858 6859 if (alloc_qvectors) { 6860 /* allocate memory for q_vector pointers */ 6861 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 6862 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 6863 if (!vsi->q_vectors) { 6864 ret = -ENOMEM; 6865 goto err_vectors; 6866 } 6867 } 6868 return ret; 6869 6870 err_vectors: 6871 kfree(vsi->tx_rings); 6872 return ret; 6873 } 6874 6875 /** 6876 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 6877 * @pf: board private structure 6878 * @type: type of VSI 6879 * 6880 * On error: returns error code (negative) 6881 * On success: returns vsi index in PF (positive) 6882 **/ 6883 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 6884 { 6885 int ret = -ENODEV; 6886 struct i40e_vsi *vsi; 6887 int vsi_idx; 6888 int i; 6889 6890 /* Need to protect the allocation of the VSIs at the PF level */ 6891 mutex_lock(&pf->switch_mutex); 6892 6893 /* VSI list may be fragmented if VSI creation/destruction has 6894 * been happening. We can afford to do a quick scan to look 6895 * for any free VSIs in the list. 6896 * 6897 * find next empty vsi slot, looping back around if necessary 6898 */ 6899 i = pf->next_vsi; 6900 while (i < pf->num_alloc_vsi && pf->vsi[i]) 6901 i++; 6902 if (i >= pf->num_alloc_vsi) { 6903 i = 0; 6904 while (i < pf->next_vsi && pf->vsi[i]) 6905 i++; 6906 } 6907 6908 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 6909 vsi_idx = i; /* Found one! */ 6910 } else { 6911 ret = -ENODEV; 6912 goto unlock_pf; /* out of VSI slots! */ 6913 } 6914 pf->next_vsi = ++i; 6915 6916 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 6917 if (!vsi) { 6918 ret = -ENOMEM; 6919 goto unlock_pf; 6920 } 6921 vsi->type = type; 6922 vsi->back = pf; 6923 set_bit(__I40E_DOWN, &vsi->state); 6924 vsi->flags = 0; 6925 vsi->idx = vsi_idx; 6926 vsi->rx_itr_setting = pf->rx_itr_default; 6927 vsi->tx_itr_setting = pf->tx_itr_default; 6928 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 6929 pf->rss_table_size : 64; 6930 vsi->netdev_registered = false; 6931 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 6932 INIT_LIST_HEAD(&vsi->mac_filter_list); 6933 vsi->irqs_ready = false; 6934 6935 ret = i40e_set_num_rings_in_vsi(vsi); 6936 if (ret) 6937 goto err_rings; 6938 6939 ret = i40e_vsi_alloc_arrays(vsi, true); 6940 if (ret) 6941 goto err_rings; 6942 6943 /* Setup default MSIX irq handler for VSI */ 6944 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 6945 6946 pf->vsi[vsi_idx] = vsi; 6947 ret = vsi_idx; 6948 goto unlock_pf; 6949 6950 err_rings: 6951 pf->next_vsi = i - 1; 6952 kfree(vsi); 6953 unlock_pf: 6954 mutex_unlock(&pf->switch_mutex); 6955 return ret; 6956 } 6957 6958 /** 6959 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 6960 * @type: VSI pointer 6961 * @free_qvectors: a bool to specify if q_vectors need to be freed. 6962 * 6963 * On error: returns error code (negative) 6964 * On success: returns 0 6965 **/ 6966 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 6967 { 6968 /* free the ring and vector containers */ 6969 if (free_qvectors) { 6970 kfree(vsi->q_vectors); 6971 vsi->q_vectors = NULL; 6972 } 6973 kfree(vsi->tx_rings); 6974 vsi->tx_rings = NULL; 6975 vsi->rx_rings = NULL; 6976 } 6977 6978 /** 6979 * i40e_vsi_clear - Deallocate the VSI provided 6980 * @vsi: the VSI being un-configured 6981 **/ 6982 static int i40e_vsi_clear(struct i40e_vsi *vsi) 6983 { 6984 struct i40e_pf *pf; 6985 6986 if (!vsi) 6987 return 0; 6988 6989 if (!vsi->back) 6990 goto free_vsi; 6991 pf = vsi->back; 6992 6993 mutex_lock(&pf->switch_mutex); 6994 if (!pf->vsi[vsi->idx]) { 6995 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 6996 vsi->idx, vsi->idx, vsi, vsi->type); 6997 goto unlock_vsi; 6998 } 6999 7000 if (pf->vsi[vsi->idx] != vsi) { 7001 dev_err(&pf->pdev->dev, 7002 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 7003 pf->vsi[vsi->idx]->idx, 7004 pf->vsi[vsi->idx], 7005 pf->vsi[vsi->idx]->type, 7006 vsi->idx, vsi, vsi->type); 7007 goto unlock_vsi; 7008 } 7009 7010 /* updates the PF for this cleared vsi */ 7011 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 7012 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 7013 7014 i40e_vsi_free_arrays(vsi, true); 7015 7016 pf->vsi[vsi->idx] = NULL; 7017 if (vsi->idx < pf->next_vsi) 7018 pf->next_vsi = vsi->idx; 7019 7020 unlock_vsi: 7021 mutex_unlock(&pf->switch_mutex); 7022 free_vsi: 7023 kfree(vsi); 7024 7025 return 0; 7026 } 7027 7028 /** 7029 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 7030 * @vsi: the VSI being cleaned 7031 **/ 7032 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 7033 { 7034 int i; 7035 7036 if (vsi->tx_rings && vsi->tx_rings[0]) { 7037 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7038 kfree_rcu(vsi->tx_rings[i], rcu); 7039 vsi->tx_rings[i] = NULL; 7040 vsi->rx_rings[i] = NULL; 7041 } 7042 } 7043 } 7044 7045 /** 7046 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 7047 * @vsi: the VSI being configured 7048 **/ 7049 static int i40e_alloc_rings(struct i40e_vsi *vsi) 7050 { 7051 struct i40e_ring *tx_ring, *rx_ring; 7052 struct i40e_pf *pf = vsi->back; 7053 int i; 7054 7055 /* Set basic values in the rings to be used later during open() */ 7056 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7057 /* allocate space for both Tx and Rx in one shot */ 7058 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 7059 if (!tx_ring) 7060 goto err_out; 7061 7062 tx_ring->queue_index = i; 7063 tx_ring->reg_idx = vsi->base_queue + i; 7064 tx_ring->ring_active = false; 7065 tx_ring->vsi = vsi; 7066 tx_ring->netdev = vsi->netdev; 7067 tx_ring->dev = &pf->pdev->dev; 7068 tx_ring->count = vsi->num_desc; 7069 tx_ring->size = 0; 7070 tx_ring->dcb_tc = 0; 7071 vsi->tx_rings[i] = tx_ring; 7072 7073 rx_ring = &tx_ring[1]; 7074 rx_ring->queue_index = i; 7075 rx_ring->reg_idx = vsi->base_queue + i; 7076 rx_ring->ring_active = false; 7077 rx_ring->vsi = vsi; 7078 rx_ring->netdev = vsi->netdev; 7079 rx_ring->dev = &pf->pdev->dev; 7080 rx_ring->count = vsi->num_desc; 7081 rx_ring->size = 0; 7082 rx_ring->dcb_tc = 0; 7083 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) 7084 set_ring_16byte_desc_enabled(rx_ring); 7085 else 7086 clear_ring_16byte_desc_enabled(rx_ring); 7087 vsi->rx_rings[i] = rx_ring; 7088 } 7089 7090 return 0; 7091 7092 err_out: 7093 i40e_vsi_clear_rings(vsi); 7094 return -ENOMEM; 7095 } 7096 7097 /** 7098 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 7099 * @pf: board private structure 7100 * @vectors: the number of MSI-X vectors to request 7101 * 7102 * Returns the number of vectors reserved, or error 7103 **/ 7104 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 7105 { 7106 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 7107 I40E_MIN_MSIX, vectors); 7108 if (vectors < 0) { 7109 dev_info(&pf->pdev->dev, 7110 "MSI-X vector reservation failed: %d\n", vectors); 7111 vectors = 0; 7112 } 7113 7114 return vectors; 7115 } 7116 7117 /** 7118 * i40e_init_msix - Setup the MSIX capability 7119 * @pf: board private structure 7120 * 7121 * Work with the OS to set up the MSIX vectors needed. 7122 * 7123 * Returns the number of vectors reserved or negative on failure 7124 **/ 7125 static int i40e_init_msix(struct i40e_pf *pf) 7126 { 7127 struct i40e_hw *hw = &pf->hw; 7128 int vectors_left; 7129 int v_budget, i; 7130 int v_actual; 7131 7132 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7133 return -ENODEV; 7134 7135 /* The number of vectors we'll request will be comprised of: 7136 * - Add 1 for "other" cause for Admin Queue events, etc. 7137 * - The number of LAN queue pairs 7138 * - Queues being used for RSS. 7139 * We don't need as many as max_rss_size vectors. 7140 * use rss_size instead in the calculation since that 7141 * is governed by number of cpus in the system. 7142 * - assumes symmetric Tx/Rx pairing 7143 * - The number of VMDq pairs 7144 #ifdef I40E_FCOE 7145 * - The number of FCOE qps. 7146 #endif 7147 * Once we count this up, try the request. 7148 * 7149 * If we can't get what we want, we'll simplify to nearly nothing 7150 * and try again. If that still fails, we punt. 7151 */ 7152 vectors_left = hw->func_caps.num_msix_vectors; 7153 v_budget = 0; 7154 7155 /* reserve one vector for miscellaneous handler */ 7156 if (vectors_left) { 7157 v_budget++; 7158 vectors_left--; 7159 } 7160 7161 /* reserve vectors for the main PF traffic queues */ 7162 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left); 7163 vectors_left -= pf->num_lan_msix; 7164 v_budget += pf->num_lan_msix; 7165 7166 /* reserve one vector for sideband flow director */ 7167 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7168 if (vectors_left) { 7169 v_budget++; 7170 vectors_left--; 7171 } else { 7172 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7173 } 7174 } 7175 7176 #ifdef I40E_FCOE 7177 /* can we reserve enough for FCoE? */ 7178 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7179 if (!vectors_left) 7180 pf->num_fcoe_msix = 0; 7181 else if (vectors_left >= pf->num_fcoe_qps) 7182 pf->num_fcoe_msix = pf->num_fcoe_qps; 7183 else 7184 pf->num_fcoe_msix = 1; 7185 v_budget += pf->num_fcoe_msix; 7186 vectors_left -= pf->num_fcoe_msix; 7187 } 7188 7189 #endif 7190 /* any vectors left over go for VMDq support */ 7191 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 7192 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 7193 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 7194 7195 /* if we're short on vectors for what's desired, we limit 7196 * the queues per vmdq. If this is still more than are 7197 * available, the user will need to change the number of 7198 * queues/vectors used by the PF later with the ethtool 7199 * channels command 7200 */ 7201 if (vmdq_vecs < vmdq_vecs_wanted) 7202 pf->num_vmdq_qps = 1; 7203 pf->num_vmdq_msix = pf->num_vmdq_qps; 7204 7205 v_budget += vmdq_vecs; 7206 vectors_left -= vmdq_vecs; 7207 } 7208 7209 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 7210 GFP_KERNEL); 7211 if (!pf->msix_entries) 7212 return -ENOMEM; 7213 7214 for (i = 0; i < v_budget; i++) 7215 pf->msix_entries[i].entry = i; 7216 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 7217 7218 if (v_actual != v_budget) { 7219 /* If we have limited resources, we will start with no vectors 7220 * for the special features and then allocate vectors to some 7221 * of these features based on the policy and at the end disable 7222 * the features that did not get any vectors. 7223 */ 7224 #ifdef I40E_FCOE 7225 pf->num_fcoe_qps = 0; 7226 pf->num_fcoe_msix = 0; 7227 #endif 7228 pf->num_vmdq_msix = 0; 7229 } 7230 7231 if (v_actual < I40E_MIN_MSIX) { 7232 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 7233 kfree(pf->msix_entries); 7234 pf->msix_entries = NULL; 7235 return -ENODEV; 7236 7237 } else if (v_actual == I40E_MIN_MSIX) { 7238 /* Adjust for minimal MSIX use */ 7239 pf->num_vmdq_vsis = 0; 7240 pf->num_vmdq_qps = 0; 7241 pf->num_lan_qps = 1; 7242 pf->num_lan_msix = 1; 7243 7244 } else if (v_actual != v_budget) { 7245 int vec; 7246 7247 /* reserve the misc vector */ 7248 vec = v_actual - 1; 7249 7250 /* Scale vector usage down */ 7251 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 7252 pf->num_vmdq_vsis = 1; 7253 pf->num_vmdq_qps = 1; 7254 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7255 7256 /* partition out the remaining vectors */ 7257 switch (vec) { 7258 case 2: 7259 pf->num_lan_msix = 1; 7260 break; 7261 case 3: 7262 #ifdef I40E_FCOE 7263 /* give one vector to FCoE */ 7264 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7265 pf->num_lan_msix = 1; 7266 pf->num_fcoe_msix = 1; 7267 } 7268 #else 7269 pf->num_lan_msix = 2; 7270 #endif 7271 break; 7272 default: 7273 #ifdef I40E_FCOE 7274 /* give one vector to FCoE */ 7275 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7276 pf->num_fcoe_msix = 1; 7277 vec--; 7278 } 7279 #endif 7280 /* give the rest to the PF */ 7281 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps); 7282 break; 7283 } 7284 } 7285 7286 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 7287 (pf->num_vmdq_msix == 0)) { 7288 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 7289 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 7290 } 7291 #ifdef I40E_FCOE 7292 7293 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 7294 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 7295 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 7296 } 7297 #endif 7298 return v_actual; 7299 } 7300 7301 /** 7302 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 7303 * @vsi: the VSI being configured 7304 * @v_idx: index of the vector in the vsi struct 7305 * 7306 * We allocate one q_vector. If allocation fails we return -ENOMEM. 7307 **/ 7308 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) 7309 { 7310 struct i40e_q_vector *q_vector; 7311 7312 /* allocate q_vector */ 7313 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 7314 if (!q_vector) 7315 return -ENOMEM; 7316 7317 q_vector->vsi = vsi; 7318 q_vector->v_idx = v_idx; 7319 cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 7320 if (vsi->netdev) 7321 netif_napi_add(vsi->netdev, &q_vector->napi, 7322 i40e_napi_poll, NAPI_POLL_WEIGHT); 7323 7324 q_vector->rx.latency_range = I40E_LOW_LATENCY; 7325 q_vector->tx.latency_range = I40E_LOW_LATENCY; 7326 7327 /* tie q_vector and vsi together */ 7328 vsi->q_vectors[v_idx] = q_vector; 7329 7330 return 0; 7331 } 7332 7333 /** 7334 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 7335 * @vsi: the VSI being configured 7336 * 7337 * We allocate one q_vector per queue interrupt. If allocation fails we 7338 * return -ENOMEM. 7339 **/ 7340 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 7341 { 7342 struct i40e_pf *pf = vsi->back; 7343 int v_idx, num_q_vectors; 7344 int err; 7345 7346 /* if not MSIX, give the one vector only to the LAN VSI */ 7347 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7348 num_q_vectors = vsi->num_q_vectors; 7349 else if (vsi == pf->vsi[pf->lan_vsi]) 7350 num_q_vectors = 1; 7351 else 7352 return -EINVAL; 7353 7354 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 7355 err = i40e_vsi_alloc_q_vector(vsi, v_idx); 7356 if (err) 7357 goto err_out; 7358 } 7359 7360 return 0; 7361 7362 err_out: 7363 while (v_idx--) 7364 i40e_free_q_vector(vsi, v_idx); 7365 7366 return err; 7367 } 7368 7369 /** 7370 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 7371 * @pf: board private structure to initialize 7372 **/ 7373 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 7374 { 7375 int vectors = 0; 7376 ssize_t size; 7377 7378 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 7379 vectors = i40e_init_msix(pf); 7380 if (vectors < 0) { 7381 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 7382 #ifdef I40E_FCOE 7383 I40E_FLAG_FCOE_ENABLED | 7384 #endif 7385 I40E_FLAG_RSS_ENABLED | 7386 I40E_FLAG_DCB_CAPABLE | 7387 I40E_FLAG_SRIOV_ENABLED | 7388 I40E_FLAG_FD_SB_ENABLED | 7389 I40E_FLAG_FD_ATR_ENABLED | 7390 I40E_FLAG_VMDQ_ENABLED); 7391 7392 /* rework the queue expectations without MSIX */ 7393 i40e_determine_queue_usage(pf); 7394 } 7395 } 7396 7397 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 7398 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 7399 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 7400 vectors = pci_enable_msi(pf->pdev); 7401 if (vectors < 0) { 7402 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 7403 vectors); 7404 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 7405 } 7406 vectors = 1; /* one MSI or Legacy vector */ 7407 } 7408 7409 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 7410 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 7411 7412 /* set up vector assignment tracking */ 7413 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 7414 pf->irq_pile = kzalloc(size, GFP_KERNEL); 7415 if (!pf->irq_pile) { 7416 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 7417 return -ENOMEM; 7418 } 7419 pf->irq_pile->num_entries = vectors; 7420 pf->irq_pile->search_hint = 0; 7421 7422 /* track first vector for misc interrupts, ignore return */ 7423 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 7424 7425 return 0; 7426 } 7427 7428 /** 7429 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 7430 * @pf: board private structure 7431 * 7432 * This sets up the handler for MSIX 0, which is used to manage the 7433 * non-queue interrupts, e.g. AdminQ and errors. This is not used 7434 * when in MSI or Legacy interrupt mode. 7435 **/ 7436 static int i40e_setup_misc_vector(struct i40e_pf *pf) 7437 { 7438 struct i40e_hw *hw = &pf->hw; 7439 int err = 0; 7440 7441 /* Only request the irq if this is the first time through, and 7442 * not when we're rebuilding after a Reset 7443 */ 7444 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7445 err = request_irq(pf->msix_entries[0].vector, 7446 i40e_intr, 0, pf->int_name, pf); 7447 if (err) { 7448 dev_info(&pf->pdev->dev, 7449 "request_irq for %s failed: %d\n", 7450 pf->int_name, err); 7451 return -EFAULT; 7452 } 7453 } 7454 7455 i40e_enable_misc_int_causes(pf); 7456 7457 /* associate no queues to the misc vector */ 7458 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 7459 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 7460 7461 i40e_flush(hw); 7462 7463 i40e_irq_dynamic_enable_icr0(pf); 7464 7465 return err; 7466 } 7467 7468 /** 7469 * i40e_config_rss - Prepare for RSS if used 7470 * @pf: board private structure 7471 **/ 7472 static int i40e_config_rss(struct i40e_pf *pf) 7473 { 7474 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1]; 7475 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7476 struct i40e_hw *hw = &pf->hw; 7477 u32 lut = 0; 7478 int i, j; 7479 u64 hena; 7480 u32 reg_val; 7481 7482 netdev_rss_key_fill(rss_key, sizeof(rss_key)); 7483 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 7484 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]); 7485 7486 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 7487 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | 7488 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); 7489 hena |= I40E_DEFAULT_RSS_HENA; 7490 wr32(hw, I40E_PFQF_HENA(0), (u32)hena); 7491 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 7492 7493 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs); 7494 7495 /* Check capability and Set table size and register per hw expectation*/ 7496 reg_val = rd32(hw, I40E_PFQF_CTL_0); 7497 if (pf->rss_table_size == 512) 7498 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7499 else 7500 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7501 wr32(hw, I40E_PFQF_CTL_0, reg_val); 7502 7503 /* Populate the LUT with max no. of queues in round robin fashion */ 7504 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) { 7505 7506 /* The assumption is that lan qp count will be the highest 7507 * qp count for any PF VSI that needs RSS. 7508 * If multiple VSIs need RSS support, all the qp counts 7509 * for those VSIs should be a power of 2 for RSS to work. 7510 * If LAN VSI is the only consumer for RSS then this requirement 7511 * is not necessary. 7512 */ 7513 if (j == vsi->rss_size) 7514 j = 0; 7515 /* lut = 4-byte sliding window of 4 lut entries */ 7516 lut = (lut << 8) | (j & 7517 (BIT(pf->hw.func_caps.rss_table_entry_width) - 1)); 7518 /* On i = 3, we have 4 entries in lut; write to the register */ 7519 if ((i & 3) == 3) 7520 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); 7521 } 7522 i40e_flush(hw); 7523 7524 return 0; 7525 } 7526 7527 /** 7528 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 7529 * @pf: board private structure 7530 * @queue_count: the requested queue count for rss. 7531 * 7532 * returns 0 if rss is not enabled, if enabled returns the final rss queue 7533 * count which may be different from the requested queue count. 7534 **/ 7535 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 7536 { 7537 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7538 int new_rss_size; 7539 7540 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 7541 return 0; 7542 7543 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 7544 7545 if (queue_count != vsi->num_queue_pairs) { 7546 vsi->req_queue_pairs = queue_count; 7547 i40e_prep_for_reset(pf); 7548 7549 pf->rss_size = new_rss_size; 7550 7551 i40e_reset_and_rebuild(pf, true); 7552 i40e_config_rss(pf); 7553 } 7554 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); 7555 return pf->rss_size; 7556 } 7557 7558 /** 7559 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition 7560 * @pf: board private structure 7561 **/ 7562 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) 7563 { 7564 i40e_status status; 7565 bool min_valid, max_valid; 7566 u32 max_bw, min_bw; 7567 7568 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 7569 &min_valid, &max_valid); 7570 7571 if (!status) { 7572 if (min_valid) 7573 pf->npar_min_bw = min_bw; 7574 if (max_valid) 7575 pf->npar_max_bw = max_bw; 7576 } 7577 7578 return status; 7579 } 7580 7581 /** 7582 * i40e_set_npar_bw_setting - Set BW settings for this PF partition 7583 * @pf: board private structure 7584 **/ 7585 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) 7586 { 7587 struct i40e_aqc_configure_partition_bw_data bw_data; 7588 i40e_status status; 7589 7590 /* Set the valid bit for this PF */ 7591 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); 7592 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; 7593 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; 7594 7595 /* Set the new bandwidths */ 7596 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 7597 7598 return status; 7599 } 7600 7601 /** 7602 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition 7603 * @pf: board private structure 7604 **/ 7605 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) 7606 { 7607 /* Commit temporary BW setting to permanent NVM image */ 7608 enum i40e_admin_queue_err last_aq_status; 7609 i40e_status ret; 7610 u16 nvm_word; 7611 7612 if (pf->hw.partition_id != 1) { 7613 dev_info(&pf->pdev->dev, 7614 "Commit BW only works on partition 1! This is partition %d", 7615 pf->hw.partition_id); 7616 ret = I40E_NOT_SUPPORTED; 7617 goto bw_commit_out; 7618 } 7619 7620 /* Acquire NVM for read access */ 7621 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 7622 last_aq_status = pf->hw.aq.asq_last_status; 7623 if (ret) { 7624 dev_info(&pf->pdev->dev, 7625 "Cannot acquire NVM for read access, err %s aq_err %s\n", 7626 i40e_stat_str(&pf->hw, ret), 7627 i40e_aq_str(&pf->hw, last_aq_status)); 7628 goto bw_commit_out; 7629 } 7630 7631 /* Read word 0x10 of NVM - SW compatibility word 1 */ 7632 ret = i40e_aq_read_nvm(&pf->hw, 7633 I40E_SR_NVM_CONTROL_WORD, 7634 0x10, sizeof(nvm_word), &nvm_word, 7635 false, NULL); 7636 /* Save off last admin queue command status before releasing 7637 * the NVM 7638 */ 7639 last_aq_status = pf->hw.aq.asq_last_status; 7640 i40e_release_nvm(&pf->hw); 7641 if (ret) { 7642 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", 7643 i40e_stat_str(&pf->hw, ret), 7644 i40e_aq_str(&pf->hw, last_aq_status)); 7645 goto bw_commit_out; 7646 } 7647 7648 /* Wait a bit for NVM release to complete */ 7649 msleep(50); 7650 7651 /* Acquire NVM for write access */ 7652 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 7653 last_aq_status = pf->hw.aq.asq_last_status; 7654 if (ret) { 7655 dev_info(&pf->pdev->dev, 7656 "Cannot acquire NVM for write access, err %s aq_err %s\n", 7657 i40e_stat_str(&pf->hw, ret), 7658 i40e_aq_str(&pf->hw, last_aq_status)); 7659 goto bw_commit_out; 7660 } 7661 /* Write it back out unchanged to initiate update NVM, 7662 * which will force a write of the shadow (alt) RAM to 7663 * the NVM - thus storing the bandwidth values permanently. 7664 */ 7665 ret = i40e_aq_update_nvm(&pf->hw, 7666 I40E_SR_NVM_CONTROL_WORD, 7667 0x10, sizeof(nvm_word), 7668 &nvm_word, true, NULL); 7669 /* Save off last admin queue command status before releasing 7670 * the NVM 7671 */ 7672 last_aq_status = pf->hw.aq.asq_last_status; 7673 i40e_release_nvm(&pf->hw); 7674 if (ret) 7675 dev_info(&pf->pdev->dev, 7676 "BW settings NOT SAVED, err %s aq_err %s\n", 7677 i40e_stat_str(&pf->hw, ret), 7678 i40e_aq_str(&pf->hw, last_aq_status)); 7679 bw_commit_out: 7680 7681 return ret; 7682 } 7683 7684 /** 7685 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 7686 * @pf: board private structure to initialize 7687 * 7688 * i40e_sw_init initializes the Adapter private data structure. 7689 * Fields are initialized based on PCI device information and 7690 * OS network device settings (MTU size). 7691 **/ 7692 static int i40e_sw_init(struct i40e_pf *pf) 7693 { 7694 int err = 0; 7695 int size; 7696 7697 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, 7698 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); 7699 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; 7700 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { 7701 if (I40E_DEBUG_USER & debug) 7702 pf->hw.debug_mask = debug; 7703 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), 7704 I40E_DEFAULT_MSG_ENABLE); 7705 } 7706 7707 /* Set default capability flags */ 7708 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 7709 I40E_FLAG_MSI_ENABLED | 7710 I40E_FLAG_MSIX_ENABLED; 7711 7712 if (iommu_present(&pci_bus_type)) 7713 pf->flags |= I40E_FLAG_RX_PS_ENABLED; 7714 else 7715 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED; 7716 7717 /* Set default ITR */ 7718 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 7719 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 7720 7721 /* Depending on PF configurations, it is possible that the RSS 7722 * maximum might end up larger than the available queues 7723 */ 7724 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); 7725 pf->rss_size = 1; 7726 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 7727 pf->rss_size_max = min_t(int, pf->rss_size_max, 7728 pf->hw.func_caps.num_tx_qp); 7729 if (pf->hw.func_caps.rss) { 7730 pf->flags |= I40E_FLAG_RSS_ENABLED; 7731 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); 7732 } 7733 7734 /* MFP mode enabled */ 7735 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { 7736 pf->flags |= I40E_FLAG_MFP_ENABLED; 7737 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 7738 if (i40e_get_npar_bw_setting(pf)) 7739 dev_warn(&pf->pdev->dev, 7740 "Could not get NPAR bw settings\n"); 7741 else 7742 dev_info(&pf->pdev->dev, 7743 "Min BW = %8.8x, Max BW = %8.8x\n", 7744 pf->npar_min_bw, pf->npar_max_bw); 7745 } 7746 7747 /* FW/NVM is not yet fixed in this regard */ 7748 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 7749 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 7750 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7751 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 7752 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { 7753 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7754 } else { 7755 dev_info(&pf->pdev->dev, 7756 "Flow Director Sideband mode Disabled in MFP mode\n"); 7757 } 7758 pf->fdir_pf_filter_count = 7759 pf->hw.func_caps.fd_filters_guaranteed; 7760 pf->hw.fdir_shared_filter_count = 7761 pf->hw.func_caps.fd_filters_best_effort; 7762 } 7763 7764 if (pf->hw.func_caps.vmdq) { 7765 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 7766 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 7767 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; 7768 } 7769 7770 #ifdef I40E_FCOE 7771 err = i40e_init_pf_fcoe(pf); 7772 if (err) 7773 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err); 7774 7775 #endif /* I40E_FCOE */ 7776 #ifdef CONFIG_PCI_IOV 7777 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 7778 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 7779 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 7780 pf->num_req_vfs = min_t(int, 7781 pf->hw.func_caps.num_vfs, 7782 I40E_MAX_VF_COUNT); 7783 } 7784 #endif /* CONFIG_PCI_IOV */ 7785 pf->eeprom_version = 0xDEAD; 7786 pf->lan_veb = I40E_NO_VEB; 7787 pf->lan_vsi = I40E_NO_VSI; 7788 7789 /* set up queue assignment tracking */ 7790 size = sizeof(struct i40e_lump_tracking) 7791 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 7792 pf->qp_pile = kzalloc(size, GFP_KERNEL); 7793 if (!pf->qp_pile) { 7794 err = -ENOMEM; 7795 goto sw_init_done; 7796 } 7797 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 7798 pf->qp_pile->search_hint = 0; 7799 7800 pf->tx_timeout_recovery_level = 1; 7801 7802 mutex_init(&pf->switch_mutex); 7803 7804 /* If NPAR is enabled nudge the Tx scheduler */ 7805 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) 7806 i40e_set_npar_bw_setting(pf); 7807 7808 sw_init_done: 7809 return err; 7810 } 7811 7812 /** 7813 * i40e_set_ntuple - set the ntuple feature flag and take action 7814 * @pf: board private structure to initialize 7815 * @features: the feature set that the stack is suggesting 7816 * 7817 * returns a bool to indicate if reset needs to happen 7818 **/ 7819 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 7820 { 7821 bool need_reset = false; 7822 7823 /* Check if Flow Director n-tuple support was enabled or disabled. If 7824 * the state changed, we need to reset. 7825 */ 7826 if (features & NETIF_F_NTUPLE) { 7827 /* Enable filters and mark for reset */ 7828 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 7829 need_reset = true; 7830 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7831 } else { 7832 /* turn off filters, mark for reset and clear SW filter list */ 7833 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7834 need_reset = true; 7835 i40e_fdir_filter_exit(pf); 7836 } 7837 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7838 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 7839 /* reset fd counters */ 7840 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 7841 pf->fdir_pf_active_filters = 0; 7842 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7843 if (I40E_DEBUG_FD & pf->hw.debug_mask) 7844 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 7845 /* if ATR was auto disabled it can be re-enabled. */ 7846 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 7847 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 7848 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 7849 } 7850 return need_reset; 7851 } 7852 7853 /** 7854 * i40e_set_features - set the netdev feature flags 7855 * @netdev: ptr to the netdev being adjusted 7856 * @features: the feature set that the stack is suggesting 7857 **/ 7858 static int i40e_set_features(struct net_device *netdev, 7859 netdev_features_t features) 7860 { 7861 struct i40e_netdev_priv *np = netdev_priv(netdev); 7862 struct i40e_vsi *vsi = np->vsi; 7863 struct i40e_pf *pf = vsi->back; 7864 bool need_reset; 7865 7866 if (features & NETIF_F_HW_VLAN_CTAG_RX) 7867 i40e_vlan_stripping_enable(vsi); 7868 else 7869 i40e_vlan_stripping_disable(vsi); 7870 7871 need_reset = i40e_set_ntuple(pf, features); 7872 7873 if (need_reset) 7874 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 7875 7876 return 0; 7877 } 7878 7879 #ifdef CONFIG_I40E_VXLAN 7880 /** 7881 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port 7882 * @pf: board private structure 7883 * @port: The UDP port to look up 7884 * 7885 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 7886 **/ 7887 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port) 7888 { 7889 u8 i; 7890 7891 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7892 if (pf->vxlan_ports[i] == port) 7893 return i; 7894 } 7895 7896 return i; 7897 } 7898 7899 /** 7900 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up 7901 * @netdev: This physical port's netdev 7902 * @sa_family: Socket Family that VXLAN is notifying us about 7903 * @port: New UDP port number that VXLAN started listening to 7904 **/ 7905 static void i40e_add_vxlan_port(struct net_device *netdev, 7906 sa_family_t sa_family, __be16 port) 7907 { 7908 struct i40e_netdev_priv *np = netdev_priv(netdev); 7909 struct i40e_vsi *vsi = np->vsi; 7910 struct i40e_pf *pf = vsi->back; 7911 u8 next_idx; 7912 u8 idx; 7913 7914 if (sa_family == AF_INET6) 7915 return; 7916 7917 idx = i40e_get_vxlan_port_idx(pf, port); 7918 7919 /* Check if port already exists */ 7920 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7921 netdev_info(netdev, "vxlan port %d already offloaded\n", 7922 ntohs(port)); 7923 return; 7924 } 7925 7926 /* Now check if there is space to add the new port */ 7927 next_idx = i40e_get_vxlan_port_idx(pf, 0); 7928 7929 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7930 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n", 7931 ntohs(port)); 7932 return; 7933 } 7934 7935 /* New port: add it and mark its index in the bitmap */ 7936 pf->vxlan_ports[next_idx] = port; 7937 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx); 7938 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7939 7940 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port)); 7941 } 7942 7943 /** 7944 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away 7945 * @netdev: This physical port's netdev 7946 * @sa_family: Socket Family that VXLAN is notifying us about 7947 * @port: UDP port number that VXLAN stopped listening to 7948 **/ 7949 static void i40e_del_vxlan_port(struct net_device *netdev, 7950 sa_family_t sa_family, __be16 port) 7951 { 7952 struct i40e_netdev_priv *np = netdev_priv(netdev); 7953 struct i40e_vsi *vsi = np->vsi; 7954 struct i40e_pf *pf = vsi->back; 7955 u8 idx; 7956 7957 if (sa_family == AF_INET6) 7958 return; 7959 7960 idx = i40e_get_vxlan_port_idx(pf, port); 7961 7962 /* Check if port already exists */ 7963 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7964 /* if port exists, set it to 0 (mark for deletion) 7965 * and make it pending 7966 */ 7967 pf->vxlan_ports[idx] = 0; 7968 pf->pending_vxlan_bitmap |= BIT_ULL(idx); 7969 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7970 7971 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n", 7972 ntohs(port)); 7973 } else { 7974 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n", 7975 ntohs(port)); 7976 } 7977 } 7978 7979 #endif 7980 static int i40e_get_phys_port_id(struct net_device *netdev, 7981 struct netdev_phys_item_id *ppid) 7982 { 7983 struct i40e_netdev_priv *np = netdev_priv(netdev); 7984 struct i40e_pf *pf = np->vsi->back; 7985 struct i40e_hw *hw = &pf->hw; 7986 7987 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 7988 return -EOPNOTSUPP; 7989 7990 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 7991 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 7992 7993 return 0; 7994 } 7995 7996 /** 7997 * i40e_ndo_fdb_add - add an entry to the hardware database 7998 * @ndm: the input from the stack 7999 * @tb: pointer to array of nladdr (unused) 8000 * @dev: the net device pointer 8001 * @addr: the MAC address entry being added 8002 * @flags: instructions from stack about fdb operation 8003 */ 8004 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 8005 struct net_device *dev, 8006 const unsigned char *addr, u16 vid, 8007 u16 flags) 8008 { 8009 struct i40e_netdev_priv *np = netdev_priv(dev); 8010 struct i40e_pf *pf = np->vsi->back; 8011 int err = 0; 8012 8013 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 8014 return -EOPNOTSUPP; 8015 8016 if (vid) { 8017 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 8018 return -EINVAL; 8019 } 8020 8021 /* Hardware does not support aging addresses so if a 8022 * ndm_state is given only allow permanent addresses 8023 */ 8024 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 8025 netdev_info(dev, "FDB only supports static addresses\n"); 8026 return -EINVAL; 8027 } 8028 8029 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 8030 err = dev_uc_add_excl(dev, addr); 8031 else if (is_multicast_ether_addr(addr)) 8032 err = dev_mc_add_excl(dev, addr); 8033 else 8034 err = -EINVAL; 8035 8036 /* Only return duplicate errors if NLM_F_EXCL is set */ 8037 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 8038 err = 0; 8039 8040 return err; 8041 } 8042 8043 /** 8044 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 8045 * @dev: the netdev being configured 8046 * @nlh: RTNL message 8047 * 8048 * Inserts a new hardware bridge if not already created and 8049 * enables the bridging mode requested (VEB or VEPA). If the 8050 * hardware bridge has already been inserted and the request 8051 * is to change the mode then that requires a PF reset to 8052 * allow rebuild of the components with required hardware 8053 * bridge mode enabled. 8054 **/ 8055 static int i40e_ndo_bridge_setlink(struct net_device *dev, 8056 struct nlmsghdr *nlh, 8057 u16 flags) 8058 { 8059 struct i40e_netdev_priv *np = netdev_priv(dev); 8060 struct i40e_vsi *vsi = np->vsi; 8061 struct i40e_pf *pf = vsi->back; 8062 struct i40e_veb *veb = NULL; 8063 struct nlattr *attr, *br_spec; 8064 int i, rem; 8065 8066 /* Only for PF VSI for now */ 8067 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8068 return -EOPNOTSUPP; 8069 8070 /* Find the HW bridge for PF VSI */ 8071 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8072 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8073 veb = pf->veb[i]; 8074 } 8075 8076 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 8077 8078 nla_for_each_nested(attr, br_spec, rem) { 8079 __u16 mode; 8080 8081 if (nla_type(attr) != IFLA_BRIDGE_MODE) 8082 continue; 8083 8084 mode = nla_get_u16(attr); 8085 if ((mode != BRIDGE_MODE_VEPA) && 8086 (mode != BRIDGE_MODE_VEB)) 8087 return -EINVAL; 8088 8089 /* Insert a new HW bridge */ 8090 if (!veb) { 8091 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8092 vsi->tc_config.enabled_tc); 8093 if (veb) { 8094 veb->bridge_mode = mode; 8095 i40e_config_bridge_mode(veb); 8096 } else { 8097 /* No Bridge HW offload available */ 8098 return -ENOENT; 8099 } 8100 break; 8101 } else if (mode != veb->bridge_mode) { 8102 /* Existing HW bridge but different mode needs reset */ 8103 veb->bridge_mode = mode; 8104 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 8105 if (mode == BRIDGE_MODE_VEB) 8106 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 8107 else 8108 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 8109 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 8110 break; 8111 } 8112 } 8113 8114 return 0; 8115 } 8116 8117 /** 8118 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 8119 * @skb: skb buff 8120 * @pid: process id 8121 * @seq: RTNL message seq # 8122 * @dev: the netdev being configured 8123 * @filter_mask: unused 8124 * 8125 * Return the mode in which the hardware bridge is operating in 8126 * i.e VEB or VEPA. 8127 **/ 8128 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8129 struct net_device *dev, 8130 u32 filter_mask, int nlflags) 8131 { 8132 struct i40e_netdev_priv *np = netdev_priv(dev); 8133 struct i40e_vsi *vsi = np->vsi; 8134 struct i40e_pf *pf = vsi->back; 8135 struct i40e_veb *veb = NULL; 8136 int i; 8137 8138 /* Only for PF VSI for now */ 8139 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8140 return -EOPNOTSUPP; 8141 8142 /* Find the HW bridge for the PF VSI */ 8143 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8144 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8145 veb = pf->veb[i]; 8146 } 8147 8148 if (!veb) 8149 return 0; 8150 8151 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 8152 nlflags, 0, 0, filter_mask, NULL); 8153 } 8154 8155 #define I40E_MAX_TUNNEL_HDR_LEN 80 8156 /** 8157 * i40e_features_check - Validate encapsulated packet conforms to limits 8158 * @skb: skb buff 8159 * @netdev: This physical port's netdev 8160 * @features: Offload features that the stack believes apply 8161 **/ 8162 static netdev_features_t i40e_features_check(struct sk_buff *skb, 8163 struct net_device *dev, 8164 netdev_features_t features) 8165 { 8166 if (skb->encapsulation && 8167 (skb_inner_mac_header(skb) - skb_transport_header(skb) > 8168 I40E_MAX_TUNNEL_HDR_LEN)) 8169 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK); 8170 8171 return features; 8172 } 8173 8174 static const struct net_device_ops i40e_netdev_ops = { 8175 .ndo_open = i40e_open, 8176 .ndo_stop = i40e_close, 8177 .ndo_start_xmit = i40e_lan_xmit_frame, 8178 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 8179 .ndo_set_rx_mode = i40e_set_rx_mode, 8180 .ndo_validate_addr = eth_validate_addr, 8181 .ndo_set_mac_address = i40e_set_mac, 8182 .ndo_change_mtu = i40e_change_mtu, 8183 .ndo_do_ioctl = i40e_ioctl, 8184 .ndo_tx_timeout = i40e_tx_timeout, 8185 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 8186 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 8187 #ifdef CONFIG_NET_POLL_CONTROLLER 8188 .ndo_poll_controller = i40e_netpoll, 8189 #endif 8190 .ndo_setup_tc = i40e_setup_tc, 8191 #ifdef I40E_FCOE 8192 .ndo_fcoe_enable = i40e_fcoe_enable, 8193 .ndo_fcoe_disable = i40e_fcoe_disable, 8194 #endif 8195 .ndo_set_features = i40e_set_features, 8196 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 8197 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 8198 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 8199 .ndo_get_vf_config = i40e_ndo_get_vf_config, 8200 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 8201 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 8202 #ifdef CONFIG_I40E_VXLAN 8203 .ndo_add_vxlan_port = i40e_add_vxlan_port, 8204 .ndo_del_vxlan_port = i40e_del_vxlan_port, 8205 #endif 8206 .ndo_get_phys_port_id = i40e_get_phys_port_id, 8207 .ndo_fdb_add = i40e_ndo_fdb_add, 8208 .ndo_features_check = i40e_features_check, 8209 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 8210 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 8211 }; 8212 8213 /** 8214 * i40e_config_netdev - Setup the netdev flags 8215 * @vsi: the VSI being configured 8216 * 8217 * Returns 0 on success, negative value on failure 8218 **/ 8219 static int i40e_config_netdev(struct i40e_vsi *vsi) 8220 { 8221 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 8222 struct i40e_pf *pf = vsi->back; 8223 struct i40e_hw *hw = &pf->hw; 8224 struct i40e_netdev_priv *np; 8225 struct net_device *netdev; 8226 u8 mac_addr[ETH_ALEN]; 8227 int etherdev_size; 8228 8229 etherdev_size = sizeof(struct i40e_netdev_priv); 8230 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 8231 if (!netdev) 8232 return -ENOMEM; 8233 8234 vsi->netdev = netdev; 8235 np = netdev_priv(netdev); 8236 np->vsi = vsi; 8237 8238 netdev->hw_enc_features |= NETIF_F_IP_CSUM | 8239 NETIF_F_GSO_UDP_TUNNEL | 8240 NETIF_F_TSO; 8241 8242 netdev->features = NETIF_F_SG | 8243 NETIF_F_IP_CSUM | 8244 NETIF_F_SCTP_CSUM | 8245 NETIF_F_HIGHDMA | 8246 NETIF_F_GSO_UDP_TUNNEL | 8247 NETIF_F_HW_VLAN_CTAG_TX | 8248 NETIF_F_HW_VLAN_CTAG_RX | 8249 NETIF_F_HW_VLAN_CTAG_FILTER | 8250 NETIF_F_IPV6_CSUM | 8251 NETIF_F_TSO | 8252 NETIF_F_TSO_ECN | 8253 NETIF_F_TSO6 | 8254 NETIF_F_RXCSUM | 8255 NETIF_F_RXHASH | 8256 0; 8257 8258 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 8259 netdev->features |= NETIF_F_NTUPLE; 8260 8261 /* copy netdev features into list of user selectable features */ 8262 netdev->hw_features |= netdev->features; 8263 8264 if (vsi->type == I40E_VSI_MAIN) { 8265 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 8266 ether_addr_copy(mac_addr, hw->mac.perm_addr); 8267 /* The following steps are necessary to prevent reception 8268 * of tagged packets - some older NVM configurations load a 8269 * default a MAC-VLAN filter that accepts any tagged packet 8270 * which must be replaced by a normal filter. 8271 */ 8272 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) 8273 i40e_add_filter(vsi, mac_addr, 8274 I40E_VLAN_ANY, false, true); 8275 } else { 8276 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 8277 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 8278 pf->vsi[pf->lan_vsi]->netdev->name); 8279 random_ether_addr(mac_addr); 8280 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); 8281 } 8282 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 8283 8284 ether_addr_copy(netdev->dev_addr, mac_addr); 8285 ether_addr_copy(netdev->perm_addr, mac_addr); 8286 /* vlan gets same features (except vlan offload) 8287 * after any tweaks for specific VSI types 8288 */ 8289 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | 8290 NETIF_F_HW_VLAN_CTAG_RX | 8291 NETIF_F_HW_VLAN_CTAG_FILTER); 8292 netdev->priv_flags |= IFF_UNICAST_FLT; 8293 netdev->priv_flags |= IFF_SUPP_NOFCS; 8294 /* Setup netdev TC information */ 8295 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 8296 8297 netdev->netdev_ops = &i40e_netdev_ops; 8298 netdev->watchdog_timeo = 5 * HZ; 8299 i40e_set_ethtool_ops(netdev); 8300 #ifdef I40E_FCOE 8301 i40e_fcoe_config_netdev(netdev, vsi); 8302 #endif 8303 8304 return 0; 8305 } 8306 8307 /** 8308 * i40e_vsi_delete - Delete a VSI from the switch 8309 * @vsi: the VSI being removed 8310 * 8311 * Returns 0 on success, negative value on failure 8312 **/ 8313 static void i40e_vsi_delete(struct i40e_vsi *vsi) 8314 { 8315 /* remove default VSI is not allowed */ 8316 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 8317 return; 8318 8319 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 8320 } 8321 8322 /** 8323 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 8324 * @vsi: the VSI being queried 8325 * 8326 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 8327 **/ 8328 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 8329 { 8330 struct i40e_veb *veb; 8331 struct i40e_pf *pf = vsi->back; 8332 8333 /* Uplink is not a bridge so default to VEB */ 8334 if (vsi->veb_idx == I40E_NO_VEB) 8335 return 1; 8336 8337 veb = pf->veb[vsi->veb_idx]; 8338 /* Uplink is a bridge in VEPA mode */ 8339 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA)) 8340 return 0; 8341 8342 /* Uplink is a bridge in VEB mode */ 8343 return 1; 8344 } 8345 8346 /** 8347 * i40e_add_vsi - Add a VSI to the switch 8348 * @vsi: the VSI being configured 8349 * 8350 * This initializes a VSI context depending on the VSI type to be added and 8351 * passes it down to the add_vsi aq command. 8352 **/ 8353 static int i40e_add_vsi(struct i40e_vsi *vsi) 8354 { 8355 int ret = -ENODEV; 8356 struct i40e_mac_filter *f, *ftmp; 8357 struct i40e_pf *pf = vsi->back; 8358 struct i40e_hw *hw = &pf->hw; 8359 struct i40e_vsi_context ctxt; 8360 u8 enabled_tc = 0x1; /* TC0 enabled */ 8361 int f_count = 0; 8362 8363 memset(&ctxt, 0, sizeof(ctxt)); 8364 switch (vsi->type) { 8365 case I40E_VSI_MAIN: 8366 /* The PF's main VSI is already setup as part of the 8367 * device initialization, so we'll not bother with 8368 * the add_vsi call, but we will retrieve the current 8369 * VSI context. 8370 */ 8371 ctxt.seid = pf->main_vsi_seid; 8372 ctxt.pf_num = pf->hw.pf_id; 8373 ctxt.vf_num = 0; 8374 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 8375 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8376 if (ret) { 8377 dev_info(&pf->pdev->dev, 8378 "couldn't get PF vsi config, err %s aq_err %s\n", 8379 i40e_stat_str(&pf->hw, ret), 8380 i40e_aq_str(&pf->hw, 8381 pf->hw.aq.asq_last_status)); 8382 return -ENOENT; 8383 } 8384 vsi->info = ctxt.info; 8385 vsi->info.valid_sections = 0; 8386 8387 vsi->seid = ctxt.seid; 8388 vsi->id = ctxt.vsi_number; 8389 8390 enabled_tc = i40e_pf_get_tc_map(pf); 8391 8392 /* MFP mode setup queue map and update VSI */ 8393 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 8394 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 8395 memset(&ctxt, 0, sizeof(ctxt)); 8396 ctxt.seid = pf->main_vsi_seid; 8397 ctxt.pf_num = pf->hw.pf_id; 8398 ctxt.vf_num = 0; 8399 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 8400 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 8401 if (ret) { 8402 dev_info(&pf->pdev->dev, 8403 "update vsi failed, err %s aq_err %s\n", 8404 i40e_stat_str(&pf->hw, ret), 8405 i40e_aq_str(&pf->hw, 8406 pf->hw.aq.asq_last_status)); 8407 ret = -ENOENT; 8408 goto err; 8409 } 8410 /* update the local VSI info queue map */ 8411 i40e_vsi_update_queue_map(vsi, &ctxt); 8412 vsi->info.valid_sections = 0; 8413 } else { 8414 /* Default/Main VSI is only enabled for TC0 8415 * reconfigure it to enable all TCs that are 8416 * available on the port in SFP mode. 8417 * For MFP case the iSCSI PF would use this 8418 * flow to enable LAN+iSCSI TC. 8419 */ 8420 ret = i40e_vsi_config_tc(vsi, enabled_tc); 8421 if (ret) { 8422 dev_info(&pf->pdev->dev, 8423 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", 8424 enabled_tc, 8425 i40e_stat_str(&pf->hw, ret), 8426 i40e_aq_str(&pf->hw, 8427 pf->hw.aq.asq_last_status)); 8428 ret = -ENOENT; 8429 } 8430 } 8431 break; 8432 8433 case I40E_VSI_FDIR: 8434 ctxt.pf_num = hw->pf_id; 8435 ctxt.vf_num = 0; 8436 ctxt.uplink_seid = vsi->uplink_seid; 8437 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8438 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8439 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 8440 (i40e_is_vsi_uplink_mode_veb(vsi))) { 8441 ctxt.info.valid_sections |= 8442 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8443 ctxt.info.switch_id = 8444 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8445 } 8446 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8447 break; 8448 8449 case I40E_VSI_VMDQ2: 8450 ctxt.pf_num = hw->pf_id; 8451 ctxt.vf_num = 0; 8452 ctxt.uplink_seid = vsi->uplink_seid; 8453 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8454 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 8455 8456 /* This VSI is connected to VEB so the switch_id 8457 * should be set to zero by default. 8458 */ 8459 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8460 ctxt.info.valid_sections |= 8461 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8462 ctxt.info.switch_id = 8463 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8464 } 8465 8466 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8467 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8468 break; 8469 8470 case I40E_VSI_SRIOV: 8471 ctxt.pf_num = hw->pf_id; 8472 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 8473 ctxt.uplink_seid = vsi->uplink_seid; 8474 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8475 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 8476 8477 /* This VSI is connected to VEB so the switch_id 8478 * should be set to zero by default. 8479 */ 8480 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8481 ctxt.info.valid_sections |= 8482 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8483 ctxt.info.switch_id = 8484 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8485 } 8486 8487 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 8488 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 8489 if (pf->vf[vsi->vf_id].spoofchk) { 8490 ctxt.info.valid_sections |= 8491 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 8492 ctxt.info.sec_flags |= 8493 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 8494 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 8495 } 8496 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8497 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8498 break; 8499 8500 #ifdef I40E_FCOE 8501 case I40E_VSI_FCOE: 8502 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 8503 if (ret) { 8504 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 8505 return ret; 8506 } 8507 break; 8508 8509 #endif /* I40E_FCOE */ 8510 default: 8511 return -ENODEV; 8512 } 8513 8514 if (vsi->type != I40E_VSI_MAIN) { 8515 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 8516 if (ret) { 8517 dev_info(&vsi->back->pdev->dev, 8518 "add vsi failed, err %s aq_err %s\n", 8519 i40e_stat_str(&pf->hw, ret), 8520 i40e_aq_str(&pf->hw, 8521 pf->hw.aq.asq_last_status)); 8522 ret = -ENOENT; 8523 goto err; 8524 } 8525 vsi->info = ctxt.info; 8526 vsi->info.valid_sections = 0; 8527 vsi->seid = ctxt.seid; 8528 vsi->id = ctxt.vsi_number; 8529 } 8530 8531 /* If macvlan filters already exist, force them to get loaded */ 8532 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 8533 f->changed = true; 8534 f_count++; 8535 8536 if (f->is_laa && vsi->type == I40E_VSI_MAIN) { 8537 struct i40e_aqc_remove_macvlan_element_data element; 8538 8539 memset(&element, 0, sizeof(element)); 8540 ether_addr_copy(element.mac_addr, f->macaddr); 8541 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 8542 ret = i40e_aq_remove_macvlan(hw, vsi->seid, 8543 &element, 1, NULL); 8544 if (ret) { 8545 /* some older FW has a different default */ 8546 element.flags |= 8547 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 8548 i40e_aq_remove_macvlan(hw, vsi->seid, 8549 &element, 1, NULL); 8550 } 8551 8552 i40e_aq_mac_address_write(hw, 8553 I40E_AQC_WRITE_TYPE_LAA_WOL, 8554 f->macaddr, NULL); 8555 } 8556 } 8557 if (f_count) { 8558 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 8559 pf->flags |= I40E_FLAG_FILTER_SYNC; 8560 } 8561 8562 /* Update VSI BW information */ 8563 ret = i40e_vsi_get_bw_info(vsi); 8564 if (ret) { 8565 dev_info(&pf->pdev->dev, 8566 "couldn't get vsi bw info, err %s aq_err %s\n", 8567 i40e_stat_str(&pf->hw, ret), 8568 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 8569 /* VSI is already added so not tearing that up */ 8570 ret = 0; 8571 } 8572 8573 err: 8574 return ret; 8575 } 8576 8577 /** 8578 * i40e_vsi_release - Delete a VSI and free its resources 8579 * @vsi: the VSI being removed 8580 * 8581 * Returns 0 on success or < 0 on error 8582 **/ 8583 int i40e_vsi_release(struct i40e_vsi *vsi) 8584 { 8585 struct i40e_mac_filter *f, *ftmp; 8586 struct i40e_veb *veb = NULL; 8587 struct i40e_pf *pf; 8588 u16 uplink_seid; 8589 int i, n; 8590 8591 pf = vsi->back; 8592 8593 /* release of a VEB-owner or last VSI is not allowed */ 8594 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 8595 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 8596 vsi->seid, vsi->uplink_seid); 8597 return -ENODEV; 8598 } 8599 if (vsi == pf->vsi[pf->lan_vsi] && 8600 !test_bit(__I40E_DOWN, &pf->state)) { 8601 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 8602 return -ENODEV; 8603 } 8604 8605 uplink_seid = vsi->uplink_seid; 8606 if (vsi->type != I40E_VSI_SRIOV) { 8607 if (vsi->netdev_registered) { 8608 vsi->netdev_registered = false; 8609 if (vsi->netdev) { 8610 /* results in a call to i40e_close() */ 8611 unregister_netdev(vsi->netdev); 8612 } 8613 } else { 8614 i40e_vsi_close(vsi); 8615 } 8616 i40e_vsi_disable_irq(vsi); 8617 } 8618 8619 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) 8620 i40e_del_filter(vsi, f->macaddr, f->vlan, 8621 f->is_vf, f->is_netdev); 8622 i40e_sync_vsi_filters(vsi); 8623 8624 i40e_vsi_delete(vsi); 8625 i40e_vsi_free_q_vectors(vsi); 8626 if (vsi->netdev) { 8627 free_netdev(vsi->netdev); 8628 vsi->netdev = NULL; 8629 } 8630 i40e_vsi_clear_rings(vsi); 8631 i40e_vsi_clear(vsi); 8632 8633 /* If this was the last thing on the VEB, except for the 8634 * controlling VSI, remove the VEB, which puts the controlling 8635 * VSI onto the next level down in the switch. 8636 * 8637 * Well, okay, there's one more exception here: don't remove 8638 * the orphan VEBs yet. We'll wait for an explicit remove request 8639 * from up the network stack. 8640 */ 8641 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 8642 if (pf->vsi[i] && 8643 pf->vsi[i]->uplink_seid == uplink_seid && 8644 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8645 n++; /* count the VSIs */ 8646 } 8647 } 8648 for (i = 0; i < I40E_MAX_VEB; i++) { 8649 if (!pf->veb[i]) 8650 continue; 8651 if (pf->veb[i]->uplink_seid == uplink_seid) 8652 n++; /* count the VEBs */ 8653 if (pf->veb[i]->seid == uplink_seid) 8654 veb = pf->veb[i]; 8655 } 8656 if (n == 0 && veb && veb->uplink_seid != 0) 8657 i40e_veb_release(veb); 8658 8659 return 0; 8660 } 8661 8662 /** 8663 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 8664 * @vsi: ptr to the VSI 8665 * 8666 * This should only be called after i40e_vsi_mem_alloc() which allocates the 8667 * corresponding SW VSI structure and initializes num_queue_pairs for the 8668 * newly allocated VSI. 8669 * 8670 * Returns 0 on success or negative on failure 8671 **/ 8672 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 8673 { 8674 int ret = -ENOENT; 8675 struct i40e_pf *pf = vsi->back; 8676 8677 if (vsi->q_vectors[0]) { 8678 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 8679 vsi->seid); 8680 return -EEXIST; 8681 } 8682 8683 if (vsi->base_vector) { 8684 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 8685 vsi->seid, vsi->base_vector); 8686 return -EEXIST; 8687 } 8688 8689 ret = i40e_vsi_alloc_q_vectors(vsi); 8690 if (ret) { 8691 dev_info(&pf->pdev->dev, 8692 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 8693 vsi->num_q_vectors, vsi->seid, ret); 8694 vsi->num_q_vectors = 0; 8695 goto vector_setup_out; 8696 } 8697 8698 if (vsi->num_q_vectors) 8699 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 8700 vsi->num_q_vectors, vsi->idx); 8701 if (vsi->base_vector < 0) { 8702 dev_info(&pf->pdev->dev, 8703 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 8704 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 8705 i40e_vsi_free_q_vectors(vsi); 8706 ret = -ENOENT; 8707 goto vector_setup_out; 8708 } 8709 8710 vector_setup_out: 8711 return ret; 8712 } 8713 8714 /** 8715 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 8716 * @vsi: pointer to the vsi. 8717 * 8718 * This re-allocates a vsi's queue resources. 8719 * 8720 * Returns pointer to the successfully allocated and configured VSI sw struct 8721 * on success, otherwise returns NULL on failure. 8722 **/ 8723 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 8724 { 8725 struct i40e_pf *pf = vsi->back; 8726 u8 enabled_tc; 8727 int ret; 8728 8729 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 8730 i40e_vsi_clear_rings(vsi); 8731 8732 i40e_vsi_free_arrays(vsi, false); 8733 i40e_set_num_rings_in_vsi(vsi); 8734 ret = i40e_vsi_alloc_arrays(vsi, false); 8735 if (ret) 8736 goto err_vsi; 8737 8738 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 8739 if (ret < 0) { 8740 dev_info(&pf->pdev->dev, 8741 "failed to get tracking for %d queues for VSI %d err %d\n", 8742 vsi->alloc_queue_pairs, vsi->seid, ret); 8743 goto err_vsi; 8744 } 8745 vsi->base_queue = ret; 8746 8747 /* Update the FW view of the VSI. Force a reset of TC and queue 8748 * layout configurations. 8749 */ 8750 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 8751 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 8752 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 8753 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 8754 8755 /* assign it some queues */ 8756 ret = i40e_alloc_rings(vsi); 8757 if (ret) 8758 goto err_rings; 8759 8760 /* map all of the rings to the q_vectors */ 8761 i40e_vsi_map_rings_to_vectors(vsi); 8762 return vsi; 8763 8764 err_rings: 8765 i40e_vsi_free_q_vectors(vsi); 8766 if (vsi->netdev_registered) { 8767 vsi->netdev_registered = false; 8768 unregister_netdev(vsi->netdev); 8769 free_netdev(vsi->netdev); 8770 vsi->netdev = NULL; 8771 } 8772 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8773 err_vsi: 8774 i40e_vsi_clear(vsi); 8775 return NULL; 8776 } 8777 8778 /** 8779 * i40e_vsi_setup - Set up a VSI by a given type 8780 * @pf: board private structure 8781 * @type: VSI type 8782 * @uplink_seid: the switch element to link to 8783 * @param1: usage depends upon VSI type. For VF types, indicates VF id 8784 * 8785 * This allocates the sw VSI structure and its queue resources, then add a VSI 8786 * to the identified VEB. 8787 * 8788 * Returns pointer to the successfully allocated and configure VSI sw struct on 8789 * success, otherwise returns NULL on failure. 8790 **/ 8791 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 8792 u16 uplink_seid, u32 param1) 8793 { 8794 struct i40e_vsi *vsi = NULL; 8795 struct i40e_veb *veb = NULL; 8796 int ret, i; 8797 int v_idx; 8798 8799 /* The requested uplink_seid must be either 8800 * - the PF's port seid 8801 * no VEB is needed because this is the PF 8802 * or this is a Flow Director special case VSI 8803 * - seid of an existing VEB 8804 * - seid of a VSI that owns an existing VEB 8805 * - seid of a VSI that doesn't own a VEB 8806 * a new VEB is created and the VSI becomes the owner 8807 * - seid of the PF VSI, which is what creates the first VEB 8808 * this is a special case of the previous 8809 * 8810 * Find which uplink_seid we were given and create a new VEB if needed 8811 */ 8812 for (i = 0; i < I40E_MAX_VEB; i++) { 8813 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 8814 veb = pf->veb[i]; 8815 break; 8816 } 8817 } 8818 8819 if (!veb && uplink_seid != pf->mac_seid) { 8820 8821 for (i = 0; i < pf->num_alloc_vsi; i++) { 8822 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 8823 vsi = pf->vsi[i]; 8824 break; 8825 } 8826 } 8827 if (!vsi) { 8828 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 8829 uplink_seid); 8830 return NULL; 8831 } 8832 8833 if (vsi->uplink_seid == pf->mac_seid) 8834 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 8835 vsi->tc_config.enabled_tc); 8836 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 8837 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8838 vsi->tc_config.enabled_tc); 8839 if (veb) { 8840 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 8841 dev_info(&vsi->back->pdev->dev, 8842 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n", 8843 __func__); 8844 return NULL; 8845 } 8846 /* We come up by default in VEPA mode if SRIOV is not 8847 * already enabled, in which case we can't force VEPA 8848 * mode. 8849 */ 8850 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 8851 veb->bridge_mode = BRIDGE_MODE_VEPA; 8852 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 8853 } 8854 i40e_config_bridge_mode(veb); 8855 } 8856 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8857 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8858 veb = pf->veb[i]; 8859 } 8860 if (!veb) { 8861 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 8862 return NULL; 8863 } 8864 8865 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 8866 uplink_seid = veb->seid; 8867 } 8868 8869 /* get vsi sw struct */ 8870 v_idx = i40e_vsi_mem_alloc(pf, type); 8871 if (v_idx < 0) 8872 goto err_alloc; 8873 vsi = pf->vsi[v_idx]; 8874 if (!vsi) 8875 goto err_alloc; 8876 vsi->type = type; 8877 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 8878 8879 if (type == I40E_VSI_MAIN) 8880 pf->lan_vsi = v_idx; 8881 else if (type == I40E_VSI_SRIOV) 8882 vsi->vf_id = param1; 8883 /* assign it some queues */ 8884 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 8885 vsi->idx); 8886 if (ret < 0) { 8887 dev_info(&pf->pdev->dev, 8888 "failed to get tracking for %d queues for VSI %d err=%d\n", 8889 vsi->alloc_queue_pairs, vsi->seid, ret); 8890 goto err_vsi; 8891 } 8892 vsi->base_queue = ret; 8893 8894 /* get a VSI from the hardware */ 8895 vsi->uplink_seid = uplink_seid; 8896 ret = i40e_add_vsi(vsi); 8897 if (ret) 8898 goto err_vsi; 8899 8900 switch (vsi->type) { 8901 /* setup the netdev if needed */ 8902 case I40E_VSI_MAIN: 8903 case I40E_VSI_VMDQ2: 8904 case I40E_VSI_FCOE: 8905 ret = i40e_config_netdev(vsi); 8906 if (ret) 8907 goto err_netdev; 8908 ret = register_netdev(vsi->netdev); 8909 if (ret) 8910 goto err_netdev; 8911 vsi->netdev_registered = true; 8912 netif_carrier_off(vsi->netdev); 8913 #ifdef CONFIG_I40E_DCB 8914 /* Setup DCB netlink interface */ 8915 i40e_dcbnl_setup(vsi); 8916 #endif /* CONFIG_I40E_DCB */ 8917 /* fall through */ 8918 8919 case I40E_VSI_FDIR: 8920 /* set up vectors and rings if needed */ 8921 ret = i40e_vsi_setup_vectors(vsi); 8922 if (ret) 8923 goto err_msix; 8924 8925 ret = i40e_alloc_rings(vsi); 8926 if (ret) 8927 goto err_rings; 8928 8929 /* map all of the rings to the q_vectors */ 8930 i40e_vsi_map_rings_to_vectors(vsi); 8931 8932 i40e_vsi_reset_stats(vsi); 8933 break; 8934 8935 default: 8936 /* no netdev or rings for the other VSI types */ 8937 break; 8938 } 8939 8940 return vsi; 8941 8942 err_rings: 8943 i40e_vsi_free_q_vectors(vsi); 8944 err_msix: 8945 if (vsi->netdev_registered) { 8946 vsi->netdev_registered = false; 8947 unregister_netdev(vsi->netdev); 8948 free_netdev(vsi->netdev); 8949 vsi->netdev = NULL; 8950 } 8951 err_netdev: 8952 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8953 err_vsi: 8954 i40e_vsi_clear(vsi); 8955 err_alloc: 8956 return NULL; 8957 } 8958 8959 /** 8960 * i40e_veb_get_bw_info - Query VEB BW information 8961 * @veb: the veb to query 8962 * 8963 * Query the Tx scheduler BW configuration data for given VEB 8964 **/ 8965 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 8966 { 8967 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 8968 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 8969 struct i40e_pf *pf = veb->pf; 8970 struct i40e_hw *hw = &pf->hw; 8971 u32 tc_bw_max; 8972 int ret = 0; 8973 int i; 8974 8975 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 8976 &bw_data, NULL); 8977 if (ret) { 8978 dev_info(&pf->pdev->dev, 8979 "query veb bw config failed, err %s aq_err %s\n", 8980 i40e_stat_str(&pf->hw, ret), 8981 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 8982 goto out; 8983 } 8984 8985 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 8986 &ets_data, NULL); 8987 if (ret) { 8988 dev_info(&pf->pdev->dev, 8989 "query veb bw ets config failed, err %s aq_err %s\n", 8990 i40e_stat_str(&pf->hw, ret), 8991 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 8992 goto out; 8993 } 8994 8995 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 8996 veb->bw_max_quanta = ets_data.tc_bw_max; 8997 veb->is_abs_credits = bw_data.absolute_credits_enable; 8998 veb->enabled_tc = ets_data.tc_valid_bits; 8999 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 9000 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 9001 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 9002 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 9003 veb->bw_tc_limit_credits[i] = 9004 le16_to_cpu(bw_data.tc_bw_limits[i]); 9005 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 9006 } 9007 9008 out: 9009 return ret; 9010 } 9011 9012 /** 9013 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 9014 * @pf: board private structure 9015 * 9016 * On error: returns error code (negative) 9017 * On success: returns vsi index in PF (positive) 9018 **/ 9019 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 9020 { 9021 int ret = -ENOENT; 9022 struct i40e_veb *veb; 9023 int i; 9024 9025 /* Need to protect the allocation of switch elements at the PF level */ 9026 mutex_lock(&pf->switch_mutex); 9027 9028 /* VEB list may be fragmented if VEB creation/destruction has 9029 * been happening. We can afford to do a quick scan to look 9030 * for any free slots in the list. 9031 * 9032 * find next empty veb slot, looping back around if necessary 9033 */ 9034 i = 0; 9035 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 9036 i++; 9037 if (i >= I40E_MAX_VEB) { 9038 ret = -ENOMEM; 9039 goto err_alloc_veb; /* out of VEB slots! */ 9040 } 9041 9042 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 9043 if (!veb) { 9044 ret = -ENOMEM; 9045 goto err_alloc_veb; 9046 } 9047 veb->pf = pf; 9048 veb->idx = i; 9049 veb->enabled_tc = 1; 9050 9051 pf->veb[i] = veb; 9052 ret = i; 9053 err_alloc_veb: 9054 mutex_unlock(&pf->switch_mutex); 9055 return ret; 9056 } 9057 9058 /** 9059 * i40e_switch_branch_release - Delete a branch of the switch tree 9060 * @branch: where to start deleting 9061 * 9062 * This uses recursion to find the tips of the branch to be 9063 * removed, deleting until we get back to and can delete this VEB. 9064 **/ 9065 static void i40e_switch_branch_release(struct i40e_veb *branch) 9066 { 9067 struct i40e_pf *pf = branch->pf; 9068 u16 branch_seid = branch->seid; 9069 u16 veb_idx = branch->idx; 9070 int i; 9071 9072 /* release any VEBs on this VEB - RECURSION */ 9073 for (i = 0; i < I40E_MAX_VEB; i++) { 9074 if (!pf->veb[i]) 9075 continue; 9076 if (pf->veb[i]->uplink_seid == branch->seid) 9077 i40e_switch_branch_release(pf->veb[i]); 9078 } 9079 9080 /* Release the VSIs on this VEB, but not the owner VSI. 9081 * 9082 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 9083 * the VEB itself, so don't use (*branch) after this loop. 9084 */ 9085 for (i = 0; i < pf->num_alloc_vsi; i++) { 9086 if (!pf->vsi[i]) 9087 continue; 9088 if (pf->vsi[i]->uplink_seid == branch_seid && 9089 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 9090 i40e_vsi_release(pf->vsi[i]); 9091 } 9092 } 9093 9094 /* There's one corner case where the VEB might not have been 9095 * removed, so double check it here and remove it if needed. 9096 * This case happens if the veb was created from the debugfs 9097 * commands and no VSIs were added to it. 9098 */ 9099 if (pf->veb[veb_idx]) 9100 i40e_veb_release(pf->veb[veb_idx]); 9101 } 9102 9103 /** 9104 * i40e_veb_clear - remove veb struct 9105 * @veb: the veb to remove 9106 **/ 9107 static void i40e_veb_clear(struct i40e_veb *veb) 9108 { 9109 if (!veb) 9110 return; 9111 9112 if (veb->pf) { 9113 struct i40e_pf *pf = veb->pf; 9114 9115 mutex_lock(&pf->switch_mutex); 9116 if (pf->veb[veb->idx] == veb) 9117 pf->veb[veb->idx] = NULL; 9118 mutex_unlock(&pf->switch_mutex); 9119 } 9120 9121 kfree(veb); 9122 } 9123 9124 /** 9125 * i40e_veb_release - Delete a VEB and free its resources 9126 * @veb: the VEB being removed 9127 **/ 9128 void i40e_veb_release(struct i40e_veb *veb) 9129 { 9130 struct i40e_vsi *vsi = NULL; 9131 struct i40e_pf *pf; 9132 int i, n = 0; 9133 9134 pf = veb->pf; 9135 9136 /* find the remaining VSI and check for extras */ 9137 for (i = 0; i < pf->num_alloc_vsi; i++) { 9138 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 9139 n++; 9140 vsi = pf->vsi[i]; 9141 } 9142 } 9143 if (n != 1) { 9144 dev_info(&pf->pdev->dev, 9145 "can't remove VEB %d with %d VSIs left\n", 9146 veb->seid, n); 9147 return; 9148 } 9149 9150 /* move the remaining VSI to uplink veb */ 9151 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 9152 if (veb->uplink_seid) { 9153 vsi->uplink_seid = veb->uplink_seid; 9154 if (veb->uplink_seid == pf->mac_seid) 9155 vsi->veb_idx = I40E_NO_VEB; 9156 else 9157 vsi->veb_idx = veb->veb_idx; 9158 } else { 9159 /* floating VEB */ 9160 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 9161 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 9162 } 9163 9164 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 9165 i40e_veb_clear(veb); 9166 } 9167 9168 /** 9169 * i40e_add_veb - create the VEB in the switch 9170 * @veb: the VEB to be instantiated 9171 * @vsi: the controlling VSI 9172 **/ 9173 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 9174 { 9175 struct i40e_pf *pf = veb->pf; 9176 bool is_default = false; 9177 bool is_cloud = false; 9178 int ret; 9179 9180 /* get a VEB from the hardware */ 9181 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, 9182 veb->enabled_tc, is_default, 9183 is_cloud, &veb->seid, NULL); 9184 if (ret) { 9185 dev_info(&pf->pdev->dev, 9186 "couldn't add VEB, err %s aq_err %s\n", 9187 i40e_stat_str(&pf->hw, ret), 9188 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9189 return -EPERM; 9190 } 9191 9192 /* get statistics counter */ 9193 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, 9194 &veb->stats_idx, NULL, NULL, NULL); 9195 if (ret) { 9196 dev_info(&pf->pdev->dev, 9197 "couldn't get VEB statistics idx, err %s aq_err %s\n", 9198 i40e_stat_str(&pf->hw, ret), 9199 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9200 return -EPERM; 9201 } 9202 ret = i40e_veb_get_bw_info(veb); 9203 if (ret) { 9204 dev_info(&pf->pdev->dev, 9205 "couldn't get VEB bw info, err %s aq_err %s\n", 9206 i40e_stat_str(&pf->hw, ret), 9207 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9208 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 9209 return -ENOENT; 9210 } 9211 9212 vsi->uplink_seid = veb->seid; 9213 vsi->veb_idx = veb->idx; 9214 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 9215 9216 return 0; 9217 } 9218 9219 /** 9220 * i40e_veb_setup - Set up a VEB 9221 * @pf: board private structure 9222 * @flags: VEB setup flags 9223 * @uplink_seid: the switch element to link to 9224 * @vsi_seid: the initial VSI seid 9225 * @enabled_tc: Enabled TC bit-map 9226 * 9227 * This allocates the sw VEB structure and links it into the switch 9228 * It is possible and legal for this to be a duplicate of an already 9229 * existing VEB. It is also possible for both uplink and vsi seids 9230 * to be zero, in order to create a floating VEB. 9231 * 9232 * Returns pointer to the successfully allocated VEB sw struct on 9233 * success, otherwise returns NULL on failure. 9234 **/ 9235 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 9236 u16 uplink_seid, u16 vsi_seid, 9237 u8 enabled_tc) 9238 { 9239 struct i40e_veb *veb, *uplink_veb = NULL; 9240 int vsi_idx, veb_idx; 9241 int ret; 9242 9243 /* if one seid is 0, the other must be 0 to create a floating relay */ 9244 if ((uplink_seid == 0 || vsi_seid == 0) && 9245 (uplink_seid + vsi_seid != 0)) { 9246 dev_info(&pf->pdev->dev, 9247 "one, not both seid's are 0: uplink=%d vsi=%d\n", 9248 uplink_seid, vsi_seid); 9249 return NULL; 9250 } 9251 9252 /* make sure there is such a vsi and uplink */ 9253 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 9254 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 9255 break; 9256 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 9257 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 9258 vsi_seid); 9259 return NULL; 9260 } 9261 9262 if (uplink_seid && uplink_seid != pf->mac_seid) { 9263 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 9264 if (pf->veb[veb_idx] && 9265 pf->veb[veb_idx]->seid == uplink_seid) { 9266 uplink_veb = pf->veb[veb_idx]; 9267 break; 9268 } 9269 } 9270 if (!uplink_veb) { 9271 dev_info(&pf->pdev->dev, 9272 "uplink seid %d not found\n", uplink_seid); 9273 return NULL; 9274 } 9275 } 9276 9277 /* get veb sw struct */ 9278 veb_idx = i40e_veb_mem_alloc(pf); 9279 if (veb_idx < 0) 9280 goto err_alloc; 9281 veb = pf->veb[veb_idx]; 9282 veb->flags = flags; 9283 veb->uplink_seid = uplink_seid; 9284 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 9285 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 9286 9287 /* create the VEB in the switch */ 9288 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 9289 if (ret) 9290 goto err_veb; 9291 if (vsi_idx == pf->lan_vsi) 9292 pf->lan_veb = veb->idx; 9293 9294 return veb; 9295 9296 err_veb: 9297 i40e_veb_clear(veb); 9298 err_alloc: 9299 return NULL; 9300 } 9301 9302 /** 9303 * i40e_setup_pf_switch_element - set PF vars based on switch type 9304 * @pf: board private structure 9305 * @ele: element we are building info from 9306 * @num_reported: total number of elements 9307 * @printconfig: should we print the contents 9308 * 9309 * helper function to assist in extracting a few useful SEID values. 9310 **/ 9311 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 9312 struct i40e_aqc_switch_config_element_resp *ele, 9313 u16 num_reported, bool printconfig) 9314 { 9315 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 9316 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 9317 u8 element_type = ele->element_type; 9318 u16 seid = le16_to_cpu(ele->seid); 9319 9320 if (printconfig) 9321 dev_info(&pf->pdev->dev, 9322 "type=%d seid=%d uplink=%d downlink=%d\n", 9323 element_type, seid, uplink_seid, downlink_seid); 9324 9325 switch (element_type) { 9326 case I40E_SWITCH_ELEMENT_TYPE_MAC: 9327 pf->mac_seid = seid; 9328 break; 9329 case I40E_SWITCH_ELEMENT_TYPE_VEB: 9330 /* Main VEB? */ 9331 if (uplink_seid != pf->mac_seid) 9332 break; 9333 if (pf->lan_veb == I40E_NO_VEB) { 9334 int v; 9335 9336 /* find existing or else empty VEB */ 9337 for (v = 0; v < I40E_MAX_VEB; v++) { 9338 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 9339 pf->lan_veb = v; 9340 break; 9341 } 9342 } 9343 if (pf->lan_veb == I40E_NO_VEB) { 9344 v = i40e_veb_mem_alloc(pf); 9345 if (v < 0) 9346 break; 9347 pf->lan_veb = v; 9348 } 9349 } 9350 9351 pf->veb[pf->lan_veb]->seid = seid; 9352 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 9353 pf->veb[pf->lan_veb]->pf = pf; 9354 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 9355 break; 9356 case I40E_SWITCH_ELEMENT_TYPE_VSI: 9357 if (num_reported != 1) 9358 break; 9359 /* This is immediately after a reset so we can assume this is 9360 * the PF's VSI 9361 */ 9362 pf->mac_seid = uplink_seid; 9363 pf->pf_seid = downlink_seid; 9364 pf->main_vsi_seid = seid; 9365 if (printconfig) 9366 dev_info(&pf->pdev->dev, 9367 "pf_seid=%d main_vsi_seid=%d\n", 9368 pf->pf_seid, pf->main_vsi_seid); 9369 break; 9370 case I40E_SWITCH_ELEMENT_TYPE_PF: 9371 case I40E_SWITCH_ELEMENT_TYPE_VF: 9372 case I40E_SWITCH_ELEMENT_TYPE_EMP: 9373 case I40E_SWITCH_ELEMENT_TYPE_BMC: 9374 case I40E_SWITCH_ELEMENT_TYPE_PE: 9375 case I40E_SWITCH_ELEMENT_TYPE_PA: 9376 /* ignore these for now */ 9377 break; 9378 default: 9379 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 9380 element_type, seid); 9381 break; 9382 } 9383 } 9384 9385 /** 9386 * i40e_fetch_switch_configuration - Get switch config from firmware 9387 * @pf: board private structure 9388 * @printconfig: should we print the contents 9389 * 9390 * Get the current switch configuration from the device and 9391 * extract a few useful SEID values. 9392 **/ 9393 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 9394 { 9395 struct i40e_aqc_get_switch_config_resp *sw_config; 9396 u16 next_seid = 0; 9397 int ret = 0; 9398 u8 *aq_buf; 9399 int i; 9400 9401 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 9402 if (!aq_buf) 9403 return -ENOMEM; 9404 9405 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 9406 do { 9407 u16 num_reported, num_total; 9408 9409 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 9410 I40E_AQ_LARGE_BUF, 9411 &next_seid, NULL); 9412 if (ret) { 9413 dev_info(&pf->pdev->dev, 9414 "get switch config failed err %s aq_err %s\n", 9415 i40e_stat_str(&pf->hw, ret), 9416 i40e_aq_str(&pf->hw, 9417 pf->hw.aq.asq_last_status)); 9418 kfree(aq_buf); 9419 return -ENOENT; 9420 } 9421 9422 num_reported = le16_to_cpu(sw_config->header.num_reported); 9423 num_total = le16_to_cpu(sw_config->header.num_total); 9424 9425 if (printconfig) 9426 dev_info(&pf->pdev->dev, 9427 "header: %d reported %d total\n", 9428 num_reported, num_total); 9429 9430 for (i = 0; i < num_reported; i++) { 9431 struct i40e_aqc_switch_config_element_resp *ele = 9432 &sw_config->element[i]; 9433 9434 i40e_setup_pf_switch_element(pf, ele, num_reported, 9435 printconfig); 9436 } 9437 } while (next_seid != 0); 9438 9439 kfree(aq_buf); 9440 return ret; 9441 } 9442 9443 /** 9444 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 9445 * @pf: board private structure 9446 * @reinit: if the Main VSI needs to re-initialized. 9447 * 9448 * Returns 0 on success, negative value on failure 9449 **/ 9450 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 9451 { 9452 int ret; 9453 9454 /* find out what's out there already */ 9455 ret = i40e_fetch_switch_configuration(pf, false); 9456 if (ret) { 9457 dev_info(&pf->pdev->dev, 9458 "couldn't fetch switch config, err %s aq_err %s\n", 9459 i40e_stat_str(&pf->hw, ret), 9460 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9461 return ret; 9462 } 9463 i40e_pf_reset_stats(pf); 9464 9465 /* first time setup */ 9466 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 9467 struct i40e_vsi *vsi = NULL; 9468 u16 uplink_seid; 9469 9470 /* Set up the PF VSI associated with the PF's main VSI 9471 * that is already in the HW switch 9472 */ 9473 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 9474 uplink_seid = pf->veb[pf->lan_veb]->seid; 9475 else 9476 uplink_seid = pf->mac_seid; 9477 if (pf->lan_vsi == I40E_NO_VSI) 9478 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 9479 else if (reinit) 9480 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 9481 if (!vsi) { 9482 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 9483 i40e_fdir_teardown(pf); 9484 return -EAGAIN; 9485 } 9486 } else { 9487 /* force a reset of TC and queue layout configurations */ 9488 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 9489 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 9490 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 9491 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 9492 } 9493 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 9494 9495 i40e_fdir_sb_setup(pf); 9496 9497 /* Setup static PF queue filter control settings */ 9498 ret = i40e_setup_pf_filter_control(pf); 9499 if (ret) { 9500 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 9501 ret); 9502 /* Failure here should not stop continuing other steps */ 9503 } 9504 9505 /* enable RSS in the HW, even for only one queue, as the stack can use 9506 * the hash 9507 */ 9508 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 9509 i40e_config_rss(pf); 9510 9511 /* fill in link information and enable LSE reporting */ 9512 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); 9513 i40e_link_event(pf); 9514 9515 /* Initialize user-specific link properties */ 9516 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 9517 I40E_AQ_AN_COMPLETED) ? true : false); 9518 9519 i40e_ptp_init(pf); 9520 9521 return ret; 9522 } 9523 9524 /** 9525 * i40e_determine_queue_usage - Work out queue distribution 9526 * @pf: board private structure 9527 **/ 9528 static void i40e_determine_queue_usage(struct i40e_pf *pf) 9529 { 9530 int queues_left; 9531 9532 pf->num_lan_qps = 0; 9533 #ifdef I40E_FCOE 9534 pf->num_fcoe_qps = 0; 9535 #endif 9536 9537 /* Find the max queues to be put into basic use. We'll always be 9538 * using TC0, whether or not DCB is running, and TC0 will get the 9539 * big RSS set. 9540 */ 9541 queues_left = pf->hw.func_caps.num_tx_qp; 9542 9543 if ((queues_left == 1) || 9544 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 9545 /* one qp for PF, no queues for anything else */ 9546 queues_left = 0; 9547 pf->rss_size = pf->num_lan_qps = 1; 9548 9549 /* make sure all the fancies are disabled */ 9550 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9551 #ifdef I40E_FCOE 9552 I40E_FLAG_FCOE_ENABLED | 9553 #endif 9554 I40E_FLAG_FD_SB_ENABLED | 9555 I40E_FLAG_FD_ATR_ENABLED | 9556 I40E_FLAG_DCB_CAPABLE | 9557 I40E_FLAG_SRIOV_ENABLED | 9558 I40E_FLAG_VMDQ_ENABLED); 9559 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 9560 I40E_FLAG_FD_SB_ENABLED | 9561 I40E_FLAG_FD_ATR_ENABLED | 9562 I40E_FLAG_DCB_CAPABLE))) { 9563 /* one qp for PF */ 9564 pf->rss_size = pf->num_lan_qps = 1; 9565 queues_left -= pf->num_lan_qps; 9566 9567 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9568 #ifdef I40E_FCOE 9569 I40E_FLAG_FCOE_ENABLED | 9570 #endif 9571 I40E_FLAG_FD_SB_ENABLED | 9572 I40E_FLAG_FD_ATR_ENABLED | 9573 I40E_FLAG_DCB_ENABLED | 9574 I40E_FLAG_VMDQ_ENABLED); 9575 } else { 9576 /* Not enough queues for all TCs */ 9577 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 9578 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 9579 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9580 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 9581 } 9582 pf->num_lan_qps = max_t(int, pf->rss_size_max, 9583 num_online_cpus()); 9584 pf->num_lan_qps = min_t(int, pf->num_lan_qps, 9585 pf->hw.func_caps.num_tx_qp); 9586 9587 queues_left -= pf->num_lan_qps; 9588 } 9589 9590 #ifdef I40E_FCOE 9591 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 9592 if (I40E_DEFAULT_FCOE <= queues_left) { 9593 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 9594 } else if (I40E_MINIMUM_FCOE <= queues_left) { 9595 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 9596 } else { 9597 pf->num_fcoe_qps = 0; 9598 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 9599 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 9600 } 9601 9602 queues_left -= pf->num_fcoe_qps; 9603 } 9604 9605 #endif 9606 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9607 if (queues_left > 1) { 9608 queues_left -= 1; /* save 1 queue for FD */ 9609 } else { 9610 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 9611 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 9612 } 9613 } 9614 9615 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9616 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 9617 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 9618 (queues_left / pf->num_vf_qps)); 9619 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 9620 } 9621 9622 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 9623 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 9624 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 9625 (queues_left / pf->num_vmdq_qps)); 9626 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 9627 } 9628 9629 pf->queues_left = queues_left; 9630 #ifdef I40E_FCOE 9631 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 9632 #endif 9633 } 9634 9635 /** 9636 * i40e_setup_pf_filter_control - Setup PF static filter control 9637 * @pf: PF to be setup 9638 * 9639 * i40e_setup_pf_filter_control sets up a PF's initial filter control 9640 * settings. If PE/FCoE are enabled then it will also set the per PF 9641 * based filter sizes required for them. It also enables Flow director, 9642 * ethertype and macvlan type filter settings for the pf. 9643 * 9644 * Returns 0 on success, negative on failure 9645 **/ 9646 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 9647 { 9648 struct i40e_filter_control_settings *settings = &pf->filter_settings; 9649 9650 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 9651 9652 /* Flow Director is enabled */ 9653 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 9654 settings->enable_fdir = true; 9655 9656 /* Ethtype and MACVLAN filters enabled for PF */ 9657 settings->enable_ethtype = true; 9658 settings->enable_macvlan = true; 9659 9660 if (i40e_set_filter_control(&pf->hw, settings)) 9661 return -ENOENT; 9662 9663 return 0; 9664 } 9665 9666 #define INFO_STRING_LEN 255 9667 static void i40e_print_features(struct i40e_pf *pf) 9668 { 9669 struct i40e_hw *hw = &pf->hw; 9670 char *buf, *string; 9671 9672 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); 9673 if (!string) { 9674 dev_err(&pf->pdev->dev, "Features string allocation failed\n"); 9675 return; 9676 } 9677 9678 buf = string; 9679 9680 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id); 9681 #ifdef CONFIG_PCI_IOV 9682 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs); 9683 #endif 9684 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ", 9685 pf->hw.func_caps.num_vsis, 9686 pf->vsi[pf->lan_vsi]->num_queue_pairs, 9687 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF"); 9688 9689 if (pf->flags & I40E_FLAG_RSS_ENABLED) 9690 buf += sprintf(buf, "RSS "); 9691 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 9692 buf += sprintf(buf, "FD_ATR "); 9693 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9694 buf += sprintf(buf, "FD_SB "); 9695 buf += sprintf(buf, "NTUPLE "); 9696 } 9697 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 9698 buf += sprintf(buf, "DCB "); 9699 if (pf->flags & I40E_FLAG_PTP) 9700 buf += sprintf(buf, "PTP "); 9701 #ifdef I40E_FCOE 9702 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 9703 buf += sprintf(buf, "FCOE "); 9704 #endif 9705 9706 BUG_ON(buf > (string + INFO_STRING_LEN)); 9707 dev_info(&pf->pdev->dev, "%s\n", string); 9708 kfree(string); 9709 } 9710 9711 /** 9712 * i40e_probe - Device initialization routine 9713 * @pdev: PCI device information struct 9714 * @ent: entry in i40e_pci_tbl 9715 * 9716 * i40e_probe initializes a PF identified by a pci_dev structure. 9717 * The OS initialization, configuring of the PF private structure, 9718 * and a hardware reset occur. 9719 * 9720 * Returns 0 on success, negative on failure 9721 **/ 9722 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 9723 { 9724 struct i40e_aq_get_phy_abilities_resp abilities; 9725 unsigned long ioremap_len; 9726 struct i40e_pf *pf; 9727 struct i40e_hw *hw; 9728 static u16 pfs_found; 9729 u16 link_status; 9730 int err = 0; 9731 u32 len; 9732 u32 i; 9733 9734 err = pci_enable_device_mem(pdev); 9735 if (err) 9736 return err; 9737 9738 /* set up for high or low dma */ 9739 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9740 if (err) { 9741 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9742 if (err) { 9743 dev_err(&pdev->dev, 9744 "DMA configuration failed: 0x%x\n", err); 9745 goto err_dma; 9746 } 9747 } 9748 9749 /* set up pci connections */ 9750 err = pci_request_selected_regions(pdev, pci_select_bars(pdev, 9751 IORESOURCE_MEM), i40e_driver_name); 9752 if (err) { 9753 dev_info(&pdev->dev, 9754 "pci_request_selected_regions failed %d\n", err); 9755 goto err_pci_reg; 9756 } 9757 9758 pci_enable_pcie_error_reporting(pdev); 9759 pci_set_master(pdev); 9760 9761 /* Now that we have a PCI connection, we need to do the 9762 * low level device setup. This is primarily setting up 9763 * the Admin Queue structures and then querying for the 9764 * device's current profile information. 9765 */ 9766 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 9767 if (!pf) { 9768 err = -ENOMEM; 9769 goto err_pf_alloc; 9770 } 9771 pf->next_vsi = 0; 9772 pf->pdev = pdev; 9773 set_bit(__I40E_DOWN, &pf->state); 9774 9775 hw = &pf->hw; 9776 hw->back = pf; 9777 9778 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0), 9779 I40E_MAX_CSR_SPACE); 9780 9781 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len); 9782 if (!hw->hw_addr) { 9783 err = -EIO; 9784 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 9785 (unsigned int)pci_resource_start(pdev, 0), 9786 (unsigned int)pci_resource_len(pdev, 0), err); 9787 goto err_ioremap; 9788 } 9789 hw->vendor_id = pdev->vendor; 9790 hw->device_id = pdev->device; 9791 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 9792 hw->subsystem_vendor_id = pdev->subsystem_vendor; 9793 hw->subsystem_device_id = pdev->subsystem_device; 9794 hw->bus.device = PCI_SLOT(pdev->devfn); 9795 hw->bus.func = PCI_FUNC(pdev->devfn); 9796 pf->instance = pfs_found; 9797 9798 if (debug != -1) { 9799 pf->msg_enable = pf->hw.debug_mask; 9800 pf->msg_enable = debug; 9801 } 9802 9803 /* do a special CORER for clearing PXE mode once at init */ 9804 if (hw->revision_id == 0 && 9805 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 9806 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 9807 i40e_flush(hw); 9808 msleep(200); 9809 pf->corer_count++; 9810 9811 i40e_clear_pxe_mode(hw); 9812 } 9813 9814 /* Reset here to make sure all is clean and to define PF 'n' */ 9815 i40e_clear_hw(hw); 9816 err = i40e_pf_reset(hw); 9817 if (err) { 9818 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 9819 goto err_pf_reset; 9820 } 9821 pf->pfr_count++; 9822 9823 hw->aq.num_arq_entries = I40E_AQ_LEN; 9824 hw->aq.num_asq_entries = I40E_AQ_LEN; 9825 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9826 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9827 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 9828 9829 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 9830 "%s-%s:misc", 9831 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 9832 9833 err = i40e_init_shared_code(hw); 9834 if (err) { 9835 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 9836 err); 9837 goto err_pf_reset; 9838 } 9839 9840 /* set up a default setting for link flow control */ 9841 pf->hw.fc.requested_mode = I40E_FC_NONE; 9842 9843 err = i40e_init_adminq(hw); 9844 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); 9845 if (err) { 9846 dev_info(&pdev->dev, 9847 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 9848 goto err_pf_reset; 9849 } 9850 9851 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 9852 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 9853 dev_info(&pdev->dev, 9854 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 9855 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 9856 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 9857 dev_info(&pdev->dev, 9858 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 9859 9860 i40e_verify_eeprom(pf); 9861 9862 /* Rev 0 hardware was never productized */ 9863 if (hw->revision_id < 1) 9864 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 9865 9866 i40e_clear_pxe_mode(hw); 9867 err = i40e_get_capabilities(pf); 9868 if (err) 9869 goto err_adminq_setup; 9870 9871 err = i40e_sw_init(pf); 9872 if (err) { 9873 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 9874 goto err_sw_init; 9875 } 9876 9877 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 9878 hw->func_caps.num_rx_qp, 9879 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 9880 if (err) { 9881 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 9882 goto err_init_lan_hmc; 9883 } 9884 9885 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 9886 if (err) { 9887 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 9888 err = -ENOENT; 9889 goto err_configure_lan_hmc; 9890 } 9891 9892 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 9893 * Ignore error return codes because if it was already disabled via 9894 * hardware settings this will fail 9895 */ 9896 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 9897 (pf->hw.aq.fw_maj_ver < 4)) { 9898 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 9899 i40e_aq_stop_lldp(hw, true, NULL); 9900 } 9901 9902 i40e_get_mac_addr(hw, hw->mac.addr); 9903 if (!is_valid_ether_addr(hw->mac.addr)) { 9904 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 9905 err = -EIO; 9906 goto err_mac_addr; 9907 } 9908 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 9909 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 9910 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 9911 if (is_valid_ether_addr(hw->mac.port_addr)) 9912 pf->flags |= I40E_FLAG_PORT_ID_VALID; 9913 #ifdef I40E_FCOE 9914 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 9915 if (err) 9916 dev_info(&pdev->dev, 9917 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 9918 if (!is_valid_ether_addr(hw->mac.san_addr)) { 9919 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 9920 hw->mac.san_addr); 9921 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 9922 } 9923 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 9924 #endif /* I40E_FCOE */ 9925 9926 pci_set_drvdata(pdev, pf); 9927 pci_save_state(pdev); 9928 #ifdef CONFIG_I40E_DCB 9929 err = i40e_init_pf_dcb(pf); 9930 if (err) { 9931 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 9932 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9933 /* Continue without DCB enabled */ 9934 } 9935 #endif /* CONFIG_I40E_DCB */ 9936 9937 /* set up periodic task facility */ 9938 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 9939 pf->service_timer_period = HZ; 9940 9941 INIT_WORK(&pf->service_task, i40e_service_task); 9942 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 9943 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 9944 pf->link_check_timeout = jiffies; 9945 9946 /* WoL defaults to disabled */ 9947 pf->wol_en = false; 9948 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 9949 9950 /* set up the main switch operations */ 9951 i40e_determine_queue_usage(pf); 9952 err = i40e_init_interrupt_scheme(pf); 9953 if (err) 9954 goto err_switch_setup; 9955 9956 /* The number of VSIs reported by the FW is the minimum guaranteed 9957 * to us; HW supports far more and we share the remaining pool with 9958 * the other PFs. We allocate space for more than the guarantee with 9959 * the understanding that we might not get them all later. 9960 */ 9961 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 9962 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 9963 else 9964 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 9965 9966 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 9967 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi; 9968 pf->vsi = kzalloc(len, GFP_KERNEL); 9969 if (!pf->vsi) { 9970 err = -ENOMEM; 9971 goto err_switch_setup; 9972 } 9973 9974 #ifdef CONFIG_PCI_IOV 9975 /* prep for VF support */ 9976 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9977 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 9978 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 9979 if (pci_num_vf(pdev)) 9980 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 9981 } 9982 #endif 9983 err = i40e_setup_pf_switch(pf, false); 9984 if (err) { 9985 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 9986 goto err_vsis; 9987 } 9988 /* if FDIR VSI was set up, start it now */ 9989 for (i = 0; i < pf->num_alloc_vsi; i++) { 9990 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 9991 i40e_vsi_open(pf->vsi[i]); 9992 break; 9993 } 9994 } 9995 9996 /* driver is only interested in link up/down and module qualification 9997 * reports from firmware 9998 */ 9999 err = i40e_aq_set_phy_int_mask(&pf->hw, 10000 I40E_AQ_EVENT_LINK_UPDOWN | 10001 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 10002 if (err) 10003 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 10004 i40e_stat_str(&pf->hw, err), 10005 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10006 10007 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 10008 (pf->hw.aq.fw_maj_ver < 4)) { 10009 msleep(75); 10010 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 10011 if (err) 10012 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 10013 i40e_stat_str(&pf->hw, err), 10014 i40e_aq_str(&pf->hw, 10015 pf->hw.aq.asq_last_status)); 10016 } 10017 /* The main driver is (mostly) up and happy. We need to set this state 10018 * before setting up the misc vector or we get a race and the vector 10019 * ends up disabled forever. 10020 */ 10021 clear_bit(__I40E_DOWN, &pf->state); 10022 10023 /* In case of MSIX we are going to setup the misc vector right here 10024 * to handle admin queue events etc. In case of legacy and MSI 10025 * the misc functionality and queue processing is combined in 10026 * the same vector and that gets setup at open. 10027 */ 10028 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 10029 err = i40e_setup_misc_vector(pf); 10030 if (err) { 10031 dev_info(&pdev->dev, 10032 "setup of misc vector failed: %d\n", err); 10033 goto err_vsis; 10034 } 10035 } 10036 10037 #ifdef CONFIG_PCI_IOV 10038 /* prep for VF support */ 10039 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 10040 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 10041 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 10042 u32 val; 10043 10044 /* disable link interrupts for VFs */ 10045 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 10046 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 10047 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 10048 i40e_flush(hw); 10049 10050 if (pci_num_vf(pdev)) { 10051 dev_info(&pdev->dev, 10052 "Active VFs found, allocating resources.\n"); 10053 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 10054 if (err) 10055 dev_info(&pdev->dev, 10056 "Error %d allocating resources for existing VFs\n", 10057 err); 10058 } 10059 } 10060 #endif /* CONFIG_PCI_IOV */ 10061 10062 pfs_found++; 10063 10064 i40e_dbg_pf_init(pf); 10065 10066 /* tell the firmware that we're starting */ 10067 i40e_send_version(pf); 10068 10069 /* since everything's happy, start the service_task timer */ 10070 mod_timer(&pf->service_timer, 10071 round_jiffies(jiffies + pf->service_timer_period)); 10072 10073 #ifdef I40E_FCOE 10074 /* create FCoE interface */ 10075 i40e_fcoe_vsi_setup(pf); 10076 10077 #endif 10078 /* Get the negotiated link width and speed from PCI config space */ 10079 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); 10080 10081 i40e_set_pci_config_data(hw, link_status); 10082 10083 dev_info(&pdev->dev, "PCI-Express: %s %s\n", 10084 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : 10085 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : 10086 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : 10087 "Unknown"), 10088 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : 10089 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : 10090 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : 10091 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : 10092 "Unknown")); 10093 10094 if (hw->bus.width < i40e_bus_width_pcie_x8 || 10095 hw->bus.speed < i40e_bus_speed_8000) { 10096 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 10097 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 10098 } 10099 10100 /* get the requested speeds from the fw */ 10101 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 10102 if (err) 10103 dev_info(&pf->pdev->dev, 10104 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n", 10105 i40e_stat_str(&pf->hw, err), 10106 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10107 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 10108 10109 /* print a string summarizing features */ 10110 i40e_print_features(pf); 10111 10112 return 0; 10113 10114 /* Unwind what we've done if something failed in the setup */ 10115 err_vsis: 10116 set_bit(__I40E_DOWN, &pf->state); 10117 i40e_clear_interrupt_scheme(pf); 10118 kfree(pf->vsi); 10119 err_switch_setup: 10120 i40e_reset_interrupt_capability(pf); 10121 del_timer_sync(&pf->service_timer); 10122 err_mac_addr: 10123 err_configure_lan_hmc: 10124 (void)i40e_shutdown_lan_hmc(hw); 10125 err_init_lan_hmc: 10126 kfree(pf->qp_pile); 10127 err_sw_init: 10128 err_adminq_setup: 10129 (void)i40e_shutdown_adminq(hw); 10130 err_pf_reset: 10131 iounmap(hw->hw_addr); 10132 err_ioremap: 10133 kfree(pf); 10134 err_pf_alloc: 10135 pci_disable_pcie_error_reporting(pdev); 10136 pci_release_selected_regions(pdev, 10137 pci_select_bars(pdev, IORESOURCE_MEM)); 10138 err_pci_reg: 10139 err_dma: 10140 pci_disable_device(pdev); 10141 return err; 10142 } 10143 10144 /** 10145 * i40e_remove - Device removal routine 10146 * @pdev: PCI device information struct 10147 * 10148 * i40e_remove is called by the PCI subsystem to alert the driver 10149 * that is should release a PCI device. This could be caused by a 10150 * Hot-Plug event, or because the driver is going to be removed from 10151 * memory. 10152 **/ 10153 static void i40e_remove(struct pci_dev *pdev) 10154 { 10155 struct i40e_pf *pf = pci_get_drvdata(pdev); 10156 i40e_status ret_code; 10157 int i; 10158 10159 i40e_dbg_pf_exit(pf); 10160 10161 i40e_ptp_stop(pf); 10162 10163 /* no more scheduling of any task */ 10164 set_bit(__I40E_DOWN, &pf->state); 10165 del_timer_sync(&pf->service_timer); 10166 cancel_work_sync(&pf->service_task); 10167 i40e_fdir_teardown(pf); 10168 10169 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 10170 i40e_free_vfs(pf); 10171 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 10172 } 10173 10174 i40e_fdir_teardown(pf); 10175 10176 /* If there is a switch structure or any orphans, remove them. 10177 * This will leave only the PF's VSI remaining. 10178 */ 10179 for (i = 0; i < I40E_MAX_VEB; i++) { 10180 if (!pf->veb[i]) 10181 continue; 10182 10183 if (pf->veb[i]->uplink_seid == pf->mac_seid || 10184 pf->veb[i]->uplink_seid == 0) 10185 i40e_switch_branch_release(pf->veb[i]); 10186 } 10187 10188 /* Now we can shutdown the PF's VSI, just before we kill 10189 * adminq and hmc. 10190 */ 10191 if (pf->vsi[pf->lan_vsi]) 10192 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 10193 10194 /* shutdown and destroy the HMC */ 10195 if (pf->hw.hmc.hmc_obj) { 10196 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 10197 if (ret_code) 10198 dev_warn(&pdev->dev, 10199 "Failed to destroy the HMC resources: %d\n", 10200 ret_code); 10201 } 10202 10203 /* shutdown the adminq */ 10204 ret_code = i40e_shutdown_adminq(&pf->hw); 10205 if (ret_code) 10206 dev_warn(&pdev->dev, 10207 "Failed to destroy the Admin Queue resources: %d\n", 10208 ret_code); 10209 10210 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 10211 i40e_clear_interrupt_scheme(pf); 10212 for (i = 0; i < pf->num_alloc_vsi; i++) { 10213 if (pf->vsi[i]) { 10214 i40e_vsi_clear_rings(pf->vsi[i]); 10215 i40e_vsi_clear(pf->vsi[i]); 10216 pf->vsi[i] = NULL; 10217 } 10218 } 10219 10220 for (i = 0; i < I40E_MAX_VEB; i++) { 10221 kfree(pf->veb[i]); 10222 pf->veb[i] = NULL; 10223 } 10224 10225 kfree(pf->qp_pile); 10226 kfree(pf->vsi); 10227 10228 iounmap(pf->hw.hw_addr); 10229 kfree(pf); 10230 pci_release_selected_regions(pdev, 10231 pci_select_bars(pdev, IORESOURCE_MEM)); 10232 10233 pci_disable_pcie_error_reporting(pdev); 10234 pci_disable_device(pdev); 10235 } 10236 10237 /** 10238 * i40e_pci_error_detected - warning that something funky happened in PCI land 10239 * @pdev: PCI device information struct 10240 * 10241 * Called to warn that something happened and the error handling steps 10242 * are in progress. Allows the driver to quiesce things, be ready for 10243 * remediation. 10244 **/ 10245 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 10246 enum pci_channel_state error) 10247 { 10248 struct i40e_pf *pf = pci_get_drvdata(pdev); 10249 10250 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 10251 10252 /* shutdown all operations */ 10253 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 10254 rtnl_lock(); 10255 i40e_prep_for_reset(pf); 10256 rtnl_unlock(); 10257 } 10258 10259 /* Request a slot reset */ 10260 return PCI_ERS_RESULT_NEED_RESET; 10261 } 10262 10263 /** 10264 * i40e_pci_error_slot_reset - a PCI slot reset just happened 10265 * @pdev: PCI device information struct 10266 * 10267 * Called to find if the driver can work with the device now that 10268 * the pci slot has been reset. If a basic connection seems good 10269 * (registers are readable and have sane content) then return a 10270 * happy little PCI_ERS_RESULT_xxx. 10271 **/ 10272 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 10273 { 10274 struct i40e_pf *pf = pci_get_drvdata(pdev); 10275 pci_ers_result_t result; 10276 int err; 10277 u32 reg; 10278 10279 dev_info(&pdev->dev, "%s\n", __func__); 10280 if (pci_enable_device_mem(pdev)) { 10281 dev_info(&pdev->dev, 10282 "Cannot re-enable PCI device after reset.\n"); 10283 result = PCI_ERS_RESULT_DISCONNECT; 10284 } else { 10285 pci_set_master(pdev); 10286 pci_restore_state(pdev); 10287 pci_save_state(pdev); 10288 pci_wake_from_d3(pdev, false); 10289 10290 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 10291 if (reg == 0) 10292 result = PCI_ERS_RESULT_RECOVERED; 10293 else 10294 result = PCI_ERS_RESULT_DISCONNECT; 10295 } 10296 10297 err = pci_cleanup_aer_uncorrect_error_status(pdev); 10298 if (err) { 10299 dev_info(&pdev->dev, 10300 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 10301 err); 10302 /* non-fatal, continue */ 10303 } 10304 10305 return result; 10306 } 10307 10308 /** 10309 * i40e_pci_error_resume - restart operations after PCI error recovery 10310 * @pdev: PCI device information struct 10311 * 10312 * Called to allow the driver to bring things back up after PCI error 10313 * and/or reset recovery has finished. 10314 **/ 10315 static void i40e_pci_error_resume(struct pci_dev *pdev) 10316 { 10317 struct i40e_pf *pf = pci_get_drvdata(pdev); 10318 10319 dev_info(&pdev->dev, "%s\n", __func__); 10320 if (test_bit(__I40E_SUSPENDED, &pf->state)) 10321 return; 10322 10323 rtnl_lock(); 10324 i40e_handle_reset_warning(pf); 10325 rtnl_lock(); 10326 } 10327 10328 /** 10329 * i40e_shutdown - PCI callback for shutting down 10330 * @pdev: PCI device information struct 10331 **/ 10332 static void i40e_shutdown(struct pci_dev *pdev) 10333 { 10334 struct i40e_pf *pf = pci_get_drvdata(pdev); 10335 struct i40e_hw *hw = &pf->hw; 10336 10337 set_bit(__I40E_SUSPENDED, &pf->state); 10338 set_bit(__I40E_DOWN, &pf->state); 10339 rtnl_lock(); 10340 i40e_prep_for_reset(pf); 10341 rtnl_unlock(); 10342 10343 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10344 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10345 10346 i40e_clear_interrupt_scheme(pf); 10347 10348 if (system_state == SYSTEM_POWER_OFF) { 10349 pci_wake_from_d3(pdev, pf->wol_en); 10350 pci_set_power_state(pdev, PCI_D3hot); 10351 } 10352 } 10353 10354 #ifdef CONFIG_PM 10355 /** 10356 * i40e_suspend - PCI callback for moving to D3 10357 * @pdev: PCI device information struct 10358 **/ 10359 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 10360 { 10361 struct i40e_pf *pf = pci_get_drvdata(pdev); 10362 struct i40e_hw *hw = &pf->hw; 10363 10364 set_bit(__I40E_SUSPENDED, &pf->state); 10365 set_bit(__I40E_DOWN, &pf->state); 10366 del_timer_sync(&pf->service_timer); 10367 cancel_work_sync(&pf->service_task); 10368 i40e_fdir_teardown(pf); 10369 10370 rtnl_lock(); 10371 i40e_prep_for_reset(pf); 10372 rtnl_unlock(); 10373 10374 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10375 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10376 10377 pci_wake_from_d3(pdev, pf->wol_en); 10378 pci_set_power_state(pdev, PCI_D3hot); 10379 10380 return 0; 10381 } 10382 10383 /** 10384 * i40e_resume - PCI callback for waking up from D3 10385 * @pdev: PCI device information struct 10386 **/ 10387 static int i40e_resume(struct pci_dev *pdev) 10388 { 10389 struct i40e_pf *pf = pci_get_drvdata(pdev); 10390 u32 err; 10391 10392 pci_set_power_state(pdev, PCI_D0); 10393 pci_restore_state(pdev); 10394 /* pci_restore_state() clears dev->state_saves, so 10395 * call pci_save_state() again to restore it. 10396 */ 10397 pci_save_state(pdev); 10398 10399 err = pci_enable_device_mem(pdev); 10400 if (err) { 10401 dev_err(&pdev->dev, 10402 "%s: Cannot enable PCI device from suspend\n", 10403 __func__); 10404 return err; 10405 } 10406 pci_set_master(pdev); 10407 10408 /* no wakeup events while running */ 10409 pci_wake_from_d3(pdev, false); 10410 10411 /* handling the reset will rebuild the device state */ 10412 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 10413 clear_bit(__I40E_DOWN, &pf->state); 10414 rtnl_lock(); 10415 i40e_reset_and_rebuild(pf, false); 10416 rtnl_unlock(); 10417 } 10418 10419 return 0; 10420 } 10421 10422 #endif 10423 static const struct pci_error_handlers i40e_err_handler = { 10424 .error_detected = i40e_pci_error_detected, 10425 .slot_reset = i40e_pci_error_slot_reset, 10426 .resume = i40e_pci_error_resume, 10427 }; 10428 10429 static struct pci_driver i40e_driver = { 10430 .name = i40e_driver_name, 10431 .id_table = i40e_pci_tbl, 10432 .probe = i40e_probe, 10433 .remove = i40e_remove, 10434 #ifdef CONFIG_PM 10435 .suspend = i40e_suspend, 10436 .resume = i40e_resume, 10437 #endif 10438 .shutdown = i40e_shutdown, 10439 .err_handler = &i40e_err_handler, 10440 .sriov_configure = i40e_pci_sriov_configure, 10441 }; 10442 10443 /** 10444 * i40e_init_module - Driver registration routine 10445 * 10446 * i40e_init_module is the first routine called when the driver is 10447 * loaded. All it does is register with the PCI subsystem. 10448 **/ 10449 static int __init i40e_init_module(void) 10450 { 10451 pr_info("%s: %s - version %s\n", i40e_driver_name, 10452 i40e_driver_string, i40e_driver_version_str); 10453 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 10454 10455 i40e_dbg_init(); 10456 return pci_register_driver(&i40e_driver); 10457 } 10458 module_init(i40e_init_module); 10459 10460 /** 10461 * i40e_exit_module - Driver exit cleanup routine 10462 * 10463 * i40e_exit_module is called just before the driver is removed 10464 * from memory. 10465 **/ 10466 static void __exit i40e_exit_module(void) 10467 { 10468 pci_unregister_driver(&i40e_driver); 10469 i40e_dbg_exit(); 10470 } 10471 module_exit(i40e_exit_module); 10472