1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2015 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* Local includes */ 28 #include "i40e.h" 29 #include "i40e_diag.h" 30 #ifdef CONFIG_I40E_VXLAN 31 #include <net/vxlan.h> 32 #endif 33 34 const char i40e_driver_name[] = "i40e"; 35 static const char i40e_driver_string[] = 36 "Intel(R) Ethernet Connection XL710 Network Driver"; 37 38 #define DRV_KERN "-k" 39 40 #define DRV_VERSION_MAJOR 1 41 #define DRV_VERSION_MINOR 3 42 #define DRV_VERSION_BUILD 4 43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 44 __stringify(DRV_VERSION_MINOR) "." \ 45 __stringify(DRV_VERSION_BUILD) DRV_KERN 46 const char i40e_driver_version_str[] = DRV_VERSION; 47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 48 49 /* a bit of forward declarations */ 50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 51 static void i40e_handle_reset_warning(struct i40e_pf *pf); 52 static int i40e_add_vsi(struct i40e_vsi *vsi); 53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 55 static int i40e_setup_misc_vector(struct i40e_pf *pf); 56 static void i40e_determine_queue_usage(struct i40e_pf *pf); 57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 58 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 59 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 60 61 /* i40e_pci_tbl - PCI Device ID Table 62 * 63 * Last entry must be all 0s 64 * 65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 66 * Class, Class Mask, private data (not used) } 67 */ 68 static const struct pci_device_id i40e_pci_tbl[] = { 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 79 /* required last entry */ 80 {0, } 81 }; 82 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 83 84 #define I40E_MAX_VF_COUNT 128 85 static int debug = -1; 86 module_param(debug, int, 0); 87 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 88 89 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 90 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 91 MODULE_LICENSE("GPL"); 92 MODULE_VERSION(DRV_VERSION); 93 94 /** 95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 96 * @hw: pointer to the HW structure 97 * @mem: ptr to mem struct to fill out 98 * @size: size of memory requested 99 * @alignment: what to align the allocation to 100 **/ 101 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 102 u64 size, u32 alignment) 103 { 104 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 105 106 mem->size = ALIGN(size, alignment); 107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 108 &mem->pa, GFP_KERNEL); 109 if (!mem->va) 110 return -ENOMEM; 111 112 return 0; 113 } 114 115 /** 116 * i40e_free_dma_mem_d - OS specific memory free for shared code 117 * @hw: pointer to the HW structure 118 * @mem: ptr to mem struct to free 119 **/ 120 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 121 { 122 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 123 124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 125 mem->va = NULL; 126 mem->pa = 0; 127 mem->size = 0; 128 129 return 0; 130 } 131 132 /** 133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 134 * @hw: pointer to the HW structure 135 * @mem: ptr to mem struct to fill out 136 * @size: size of memory requested 137 **/ 138 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 139 u32 size) 140 { 141 mem->size = size; 142 mem->va = kzalloc(size, GFP_KERNEL); 143 144 if (!mem->va) 145 return -ENOMEM; 146 147 return 0; 148 } 149 150 /** 151 * i40e_free_virt_mem_d - OS specific memory free for shared code 152 * @hw: pointer to the HW structure 153 * @mem: ptr to mem struct to free 154 **/ 155 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 156 { 157 /* it's ok to kfree a NULL pointer */ 158 kfree(mem->va); 159 mem->va = NULL; 160 mem->size = 0; 161 162 return 0; 163 } 164 165 /** 166 * i40e_get_lump - find a lump of free generic resource 167 * @pf: board private structure 168 * @pile: the pile of resource to search 169 * @needed: the number of items needed 170 * @id: an owner id to stick on the items assigned 171 * 172 * Returns the base item index of the lump, or negative for error 173 * 174 * The search_hint trick and lack of advanced fit-finding only work 175 * because we're highly likely to have all the same size lump requests. 176 * Linear search time and any fragmentation should be minimal. 177 **/ 178 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 179 u16 needed, u16 id) 180 { 181 int ret = -ENOMEM; 182 int i, j; 183 184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 185 dev_info(&pf->pdev->dev, 186 "param err: pile=%p needed=%d id=0x%04x\n", 187 pile, needed, id); 188 return -EINVAL; 189 } 190 191 /* start the linear search with an imperfect hint */ 192 i = pile->search_hint; 193 while (i < pile->num_entries) { 194 /* skip already allocated entries */ 195 if (pile->list[i] & I40E_PILE_VALID_BIT) { 196 i++; 197 continue; 198 } 199 200 /* do we have enough in this lump? */ 201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 202 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 203 break; 204 } 205 206 if (j == needed) { 207 /* there was enough, so assign it to the requestor */ 208 for (j = 0; j < needed; j++) 209 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 210 ret = i; 211 pile->search_hint = i + j; 212 break; 213 } else { 214 /* not enough, so skip over it and continue looking */ 215 i += j; 216 } 217 } 218 219 return ret; 220 } 221 222 /** 223 * i40e_put_lump - return a lump of generic resource 224 * @pile: the pile of resource to search 225 * @index: the base item index 226 * @id: the owner id of the items assigned 227 * 228 * Returns the count of items in the lump 229 **/ 230 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 231 { 232 int valid_id = (id | I40E_PILE_VALID_BIT); 233 int count = 0; 234 int i; 235 236 if (!pile || index >= pile->num_entries) 237 return -EINVAL; 238 239 for (i = index; 240 i < pile->num_entries && pile->list[i] == valid_id; 241 i++) { 242 pile->list[i] = 0; 243 count++; 244 } 245 246 if (count && index < pile->search_hint) 247 pile->search_hint = index; 248 249 return count; 250 } 251 252 /** 253 * i40e_find_vsi_from_id - searches for the vsi with the given id 254 * @pf - the pf structure to search for the vsi 255 * @id - id of the vsi it is searching for 256 **/ 257 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 258 { 259 int i; 260 261 for (i = 0; i < pf->num_alloc_vsi; i++) 262 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 263 return pf->vsi[i]; 264 265 return NULL; 266 } 267 268 /** 269 * i40e_service_event_schedule - Schedule the service task to wake up 270 * @pf: board private structure 271 * 272 * If not already scheduled, this puts the task into the work queue 273 **/ 274 static void i40e_service_event_schedule(struct i40e_pf *pf) 275 { 276 if (!test_bit(__I40E_DOWN, &pf->state) && 277 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 278 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 279 schedule_work(&pf->service_task); 280 } 281 282 /** 283 * i40e_tx_timeout - Respond to a Tx Hang 284 * @netdev: network interface device structure 285 * 286 * If any port has noticed a Tx timeout, it is likely that the whole 287 * device is munged, not just the one netdev port, so go for the full 288 * reset. 289 **/ 290 #ifdef I40E_FCOE 291 void i40e_tx_timeout(struct net_device *netdev) 292 #else 293 static void i40e_tx_timeout(struct net_device *netdev) 294 #endif 295 { 296 struct i40e_netdev_priv *np = netdev_priv(netdev); 297 struct i40e_vsi *vsi = np->vsi; 298 struct i40e_pf *pf = vsi->back; 299 300 pf->tx_timeout_count++; 301 302 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 303 pf->tx_timeout_recovery_level = 1; 304 pf->tx_timeout_last_recovery = jiffies; 305 netdev_info(netdev, "tx_timeout recovery level %d\n", 306 pf->tx_timeout_recovery_level); 307 308 switch (pf->tx_timeout_recovery_level) { 309 case 0: 310 /* disable and re-enable queues for the VSI */ 311 if (in_interrupt()) { 312 set_bit(__I40E_REINIT_REQUESTED, &pf->state); 313 set_bit(__I40E_REINIT_REQUESTED, &vsi->state); 314 } else { 315 i40e_vsi_reinit_locked(vsi); 316 } 317 break; 318 case 1: 319 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 320 break; 321 case 2: 322 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 323 break; 324 case 3: 325 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 326 break; 327 default: 328 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 329 set_bit(__I40E_DOWN_REQUESTED, &pf->state); 330 set_bit(__I40E_DOWN_REQUESTED, &vsi->state); 331 break; 332 } 333 i40e_service_event_schedule(pf); 334 pf->tx_timeout_recovery_level++; 335 } 336 337 /** 338 * i40e_release_rx_desc - Store the new tail and head values 339 * @rx_ring: ring to bump 340 * @val: new head index 341 **/ 342 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) 343 { 344 rx_ring->next_to_use = val; 345 346 /* Force memory writes to complete before letting h/w 347 * know there are new descriptors to fetch. (Only 348 * applicable for weak-ordered memory model archs, 349 * such as IA-64). 350 */ 351 wmb(); 352 writel(val, rx_ring->tail); 353 } 354 355 /** 356 * i40e_get_vsi_stats_struct - Get System Network Statistics 357 * @vsi: the VSI we care about 358 * 359 * Returns the address of the device statistics structure. 360 * The statistics are actually updated from the service task. 361 **/ 362 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 363 { 364 return &vsi->net_stats; 365 } 366 367 /** 368 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 369 * @netdev: network interface device structure 370 * 371 * Returns the address of the device statistics structure. 372 * The statistics are actually updated from the service task. 373 **/ 374 #ifdef I40E_FCOE 375 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 376 struct net_device *netdev, 377 struct rtnl_link_stats64 *stats) 378 #else 379 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 380 struct net_device *netdev, 381 struct rtnl_link_stats64 *stats) 382 #endif 383 { 384 struct i40e_netdev_priv *np = netdev_priv(netdev); 385 struct i40e_ring *tx_ring, *rx_ring; 386 struct i40e_vsi *vsi = np->vsi; 387 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 388 int i; 389 390 if (test_bit(__I40E_DOWN, &vsi->state)) 391 return stats; 392 393 if (!vsi->tx_rings) 394 return stats; 395 396 rcu_read_lock(); 397 for (i = 0; i < vsi->num_queue_pairs; i++) { 398 u64 bytes, packets; 399 unsigned int start; 400 401 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 402 if (!tx_ring) 403 continue; 404 405 do { 406 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 407 packets = tx_ring->stats.packets; 408 bytes = tx_ring->stats.bytes; 409 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 410 411 stats->tx_packets += packets; 412 stats->tx_bytes += bytes; 413 rx_ring = &tx_ring[1]; 414 415 do { 416 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 417 packets = rx_ring->stats.packets; 418 bytes = rx_ring->stats.bytes; 419 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 420 421 stats->rx_packets += packets; 422 stats->rx_bytes += bytes; 423 } 424 rcu_read_unlock(); 425 426 /* following stats updated by i40e_watchdog_subtask() */ 427 stats->multicast = vsi_stats->multicast; 428 stats->tx_errors = vsi_stats->tx_errors; 429 stats->tx_dropped = vsi_stats->tx_dropped; 430 stats->rx_errors = vsi_stats->rx_errors; 431 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 432 stats->rx_length_errors = vsi_stats->rx_length_errors; 433 434 return stats; 435 } 436 437 /** 438 * i40e_vsi_reset_stats - Resets all stats of the given vsi 439 * @vsi: the VSI to have its stats reset 440 **/ 441 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 442 { 443 struct rtnl_link_stats64 *ns; 444 int i; 445 446 if (!vsi) 447 return; 448 449 ns = i40e_get_vsi_stats_struct(vsi); 450 memset(ns, 0, sizeof(*ns)); 451 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 452 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 453 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 454 if (vsi->rx_rings && vsi->rx_rings[0]) { 455 for (i = 0; i < vsi->num_queue_pairs; i++) { 456 memset(&vsi->rx_rings[i]->stats, 0 , 457 sizeof(vsi->rx_rings[i]->stats)); 458 memset(&vsi->rx_rings[i]->rx_stats, 0 , 459 sizeof(vsi->rx_rings[i]->rx_stats)); 460 memset(&vsi->tx_rings[i]->stats, 0 , 461 sizeof(vsi->tx_rings[i]->stats)); 462 memset(&vsi->tx_rings[i]->tx_stats, 0, 463 sizeof(vsi->tx_rings[i]->tx_stats)); 464 } 465 } 466 vsi->stat_offsets_loaded = false; 467 } 468 469 /** 470 * i40e_pf_reset_stats - Reset all of the stats for the given PF 471 * @pf: the PF to be reset 472 **/ 473 void i40e_pf_reset_stats(struct i40e_pf *pf) 474 { 475 int i; 476 477 memset(&pf->stats, 0, sizeof(pf->stats)); 478 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 479 pf->stat_offsets_loaded = false; 480 481 for (i = 0; i < I40E_MAX_VEB; i++) { 482 if (pf->veb[i]) { 483 memset(&pf->veb[i]->stats, 0, 484 sizeof(pf->veb[i]->stats)); 485 memset(&pf->veb[i]->stats_offsets, 0, 486 sizeof(pf->veb[i]->stats_offsets)); 487 pf->veb[i]->stat_offsets_loaded = false; 488 } 489 } 490 } 491 492 /** 493 * i40e_stat_update48 - read and update a 48 bit stat from the chip 494 * @hw: ptr to the hardware info 495 * @hireg: the high 32 bit reg to read 496 * @loreg: the low 32 bit reg to read 497 * @offset_loaded: has the initial offset been loaded yet 498 * @offset: ptr to current offset value 499 * @stat: ptr to the stat 500 * 501 * Since the device stats are not reset at PFReset, they likely will not 502 * be zeroed when the driver starts. We'll save the first values read 503 * and use them as offsets to be subtracted from the raw values in order 504 * to report stats that count from zero. In the process, we also manage 505 * the potential roll-over. 506 **/ 507 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 508 bool offset_loaded, u64 *offset, u64 *stat) 509 { 510 u64 new_data; 511 512 if (hw->device_id == I40E_DEV_ID_QEMU) { 513 new_data = rd32(hw, loreg); 514 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 515 } else { 516 new_data = rd64(hw, loreg); 517 } 518 if (!offset_loaded) 519 *offset = new_data; 520 if (likely(new_data >= *offset)) 521 *stat = new_data - *offset; 522 else 523 *stat = (new_data + ((u64)1 << 48)) - *offset; 524 *stat &= 0xFFFFFFFFFFFFULL; 525 } 526 527 /** 528 * i40e_stat_update32 - read and update a 32 bit stat from the chip 529 * @hw: ptr to the hardware info 530 * @reg: the hw reg to read 531 * @offset_loaded: has the initial offset been loaded yet 532 * @offset: ptr to current offset value 533 * @stat: ptr to the stat 534 **/ 535 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 536 bool offset_loaded, u64 *offset, u64 *stat) 537 { 538 u32 new_data; 539 540 new_data = rd32(hw, reg); 541 if (!offset_loaded) 542 *offset = new_data; 543 if (likely(new_data >= *offset)) 544 *stat = (u32)(new_data - *offset); 545 else 546 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); 547 } 548 549 /** 550 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 551 * @vsi: the VSI to be updated 552 **/ 553 void i40e_update_eth_stats(struct i40e_vsi *vsi) 554 { 555 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 556 struct i40e_pf *pf = vsi->back; 557 struct i40e_hw *hw = &pf->hw; 558 struct i40e_eth_stats *oes; 559 struct i40e_eth_stats *es; /* device's eth stats */ 560 561 es = &vsi->eth_stats; 562 oes = &vsi->eth_stats_offsets; 563 564 /* Gather up the stats that the hw collects */ 565 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 566 vsi->stat_offsets_loaded, 567 &oes->tx_errors, &es->tx_errors); 568 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 569 vsi->stat_offsets_loaded, 570 &oes->rx_discards, &es->rx_discards); 571 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 572 vsi->stat_offsets_loaded, 573 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 574 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 575 vsi->stat_offsets_loaded, 576 &oes->tx_errors, &es->tx_errors); 577 578 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 579 I40E_GLV_GORCL(stat_idx), 580 vsi->stat_offsets_loaded, 581 &oes->rx_bytes, &es->rx_bytes); 582 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 583 I40E_GLV_UPRCL(stat_idx), 584 vsi->stat_offsets_loaded, 585 &oes->rx_unicast, &es->rx_unicast); 586 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 587 I40E_GLV_MPRCL(stat_idx), 588 vsi->stat_offsets_loaded, 589 &oes->rx_multicast, &es->rx_multicast); 590 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 591 I40E_GLV_BPRCL(stat_idx), 592 vsi->stat_offsets_loaded, 593 &oes->rx_broadcast, &es->rx_broadcast); 594 595 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 596 I40E_GLV_GOTCL(stat_idx), 597 vsi->stat_offsets_loaded, 598 &oes->tx_bytes, &es->tx_bytes); 599 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 600 I40E_GLV_UPTCL(stat_idx), 601 vsi->stat_offsets_loaded, 602 &oes->tx_unicast, &es->tx_unicast); 603 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 604 I40E_GLV_MPTCL(stat_idx), 605 vsi->stat_offsets_loaded, 606 &oes->tx_multicast, &es->tx_multicast); 607 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 608 I40E_GLV_BPTCL(stat_idx), 609 vsi->stat_offsets_loaded, 610 &oes->tx_broadcast, &es->tx_broadcast); 611 vsi->stat_offsets_loaded = true; 612 } 613 614 /** 615 * i40e_update_veb_stats - Update Switch component statistics 616 * @veb: the VEB being updated 617 **/ 618 static void i40e_update_veb_stats(struct i40e_veb *veb) 619 { 620 struct i40e_pf *pf = veb->pf; 621 struct i40e_hw *hw = &pf->hw; 622 struct i40e_eth_stats *oes; 623 struct i40e_eth_stats *es; /* device's eth stats */ 624 int idx = 0; 625 626 idx = veb->stats_idx; 627 es = &veb->stats; 628 oes = &veb->stats_offsets; 629 630 /* Gather up the stats that the hw collects */ 631 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 632 veb->stat_offsets_loaded, 633 &oes->tx_discards, &es->tx_discards); 634 if (hw->revision_id > 0) 635 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 636 veb->stat_offsets_loaded, 637 &oes->rx_unknown_protocol, 638 &es->rx_unknown_protocol); 639 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 640 veb->stat_offsets_loaded, 641 &oes->rx_bytes, &es->rx_bytes); 642 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 643 veb->stat_offsets_loaded, 644 &oes->rx_unicast, &es->rx_unicast); 645 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 646 veb->stat_offsets_loaded, 647 &oes->rx_multicast, &es->rx_multicast); 648 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 649 veb->stat_offsets_loaded, 650 &oes->rx_broadcast, &es->rx_broadcast); 651 652 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 653 veb->stat_offsets_loaded, 654 &oes->tx_bytes, &es->tx_bytes); 655 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 656 veb->stat_offsets_loaded, 657 &oes->tx_unicast, &es->tx_unicast); 658 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 659 veb->stat_offsets_loaded, 660 &oes->tx_multicast, &es->tx_multicast); 661 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 662 veb->stat_offsets_loaded, 663 &oes->tx_broadcast, &es->tx_broadcast); 664 veb->stat_offsets_loaded = true; 665 } 666 667 #ifdef I40E_FCOE 668 /** 669 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 670 * @vsi: the VSI that is capable of doing FCoE 671 **/ 672 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 673 { 674 struct i40e_pf *pf = vsi->back; 675 struct i40e_hw *hw = &pf->hw; 676 struct i40e_fcoe_stats *ofs; 677 struct i40e_fcoe_stats *fs; /* device's eth stats */ 678 int idx; 679 680 if (vsi->type != I40E_VSI_FCOE) 681 return; 682 683 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET; 684 fs = &vsi->fcoe_stats; 685 ofs = &vsi->fcoe_stats_offsets; 686 687 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 688 vsi->fcoe_stat_offsets_loaded, 689 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 690 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 691 vsi->fcoe_stat_offsets_loaded, 692 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 693 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 694 vsi->fcoe_stat_offsets_loaded, 695 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 696 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 697 vsi->fcoe_stat_offsets_loaded, 698 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 699 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 700 vsi->fcoe_stat_offsets_loaded, 701 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 702 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 703 vsi->fcoe_stat_offsets_loaded, 704 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 705 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 706 vsi->fcoe_stat_offsets_loaded, 707 &ofs->fcoe_last_error, &fs->fcoe_last_error); 708 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 709 vsi->fcoe_stat_offsets_loaded, 710 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 711 712 vsi->fcoe_stat_offsets_loaded = true; 713 } 714 715 #endif 716 /** 717 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode 718 * @pf: the corresponding PF 719 * 720 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode 721 **/ 722 static void i40e_update_link_xoff_rx(struct i40e_pf *pf) 723 { 724 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 725 struct i40e_hw_port_stats *nsd = &pf->stats; 726 struct i40e_hw *hw = &pf->hw; 727 u64 xoff = 0; 728 u16 i, v; 729 730 if ((hw->fc.current_mode != I40E_FC_FULL) && 731 (hw->fc.current_mode != I40E_FC_RX_PAUSE)) 732 return; 733 734 xoff = nsd->link_xoff_rx; 735 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 736 pf->stat_offsets_loaded, 737 &osd->link_xoff_rx, &nsd->link_xoff_rx); 738 739 /* No new LFC xoff rx */ 740 if (!(nsd->link_xoff_rx - xoff)) 741 return; 742 743 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ 744 for (v = 0; v < pf->num_alloc_vsi; v++) { 745 struct i40e_vsi *vsi = pf->vsi[v]; 746 747 if (!vsi || !vsi->tx_rings[0]) 748 continue; 749 750 for (i = 0; i < vsi->num_queue_pairs; i++) { 751 struct i40e_ring *ring = vsi->tx_rings[i]; 752 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 753 } 754 } 755 } 756 757 /** 758 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode 759 * @pf: the corresponding PF 760 * 761 * Update the Rx XOFF counter (PAUSE frames) in PFC mode 762 **/ 763 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) 764 { 765 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 766 struct i40e_hw_port_stats *nsd = &pf->stats; 767 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; 768 struct i40e_dcbx_config *dcb_cfg; 769 struct i40e_hw *hw = &pf->hw; 770 u16 i, v; 771 u8 tc; 772 773 dcb_cfg = &hw->local_dcbx_config; 774 775 /* Collect Link XOFF stats when PFC is disabled */ 776 if (!dcb_cfg->pfc.pfcenable) { 777 i40e_update_link_xoff_rx(pf); 778 return; 779 } 780 781 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 782 u64 prio_xoff = nsd->priority_xoff_rx[i]; 783 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 784 pf->stat_offsets_loaded, 785 &osd->priority_xoff_rx[i], 786 &nsd->priority_xoff_rx[i]); 787 788 /* No new PFC xoff rx */ 789 if (!(nsd->priority_xoff_rx[i] - prio_xoff)) 790 continue; 791 /* Get the TC for given priority */ 792 tc = dcb_cfg->etscfg.prioritytable[i]; 793 xoff[tc] = true; 794 } 795 796 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ 797 for (v = 0; v < pf->num_alloc_vsi; v++) { 798 struct i40e_vsi *vsi = pf->vsi[v]; 799 800 if (!vsi || !vsi->tx_rings[0]) 801 continue; 802 803 for (i = 0; i < vsi->num_queue_pairs; i++) { 804 struct i40e_ring *ring = vsi->tx_rings[i]; 805 806 tc = ring->dcb_tc; 807 if (xoff[tc]) 808 clear_bit(__I40E_HANG_CHECK_ARMED, 809 &ring->state); 810 } 811 } 812 } 813 814 /** 815 * i40e_update_vsi_stats - Update the vsi statistics counters. 816 * @vsi: the VSI to be updated 817 * 818 * There are a few instances where we store the same stat in a 819 * couple of different structs. This is partly because we have 820 * the netdev stats that need to be filled out, which is slightly 821 * different from the "eth_stats" defined by the chip and used in 822 * VF communications. We sort it out here. 823 **/ 824 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 825 { 826 struct i40e_pf *pf = vsi->back; 827 struct rtnl_link_stats64 *ons; 828 struct rtnl_link_stats64 *ns; /* netdev stats */ 829 struct i40e_eth_stats *oes; 830 struct i40e_eth_stats *es; /* device's eth stats */ 831 u32 tx_restart, tx_busy; 832 struct i40e_ring *p; 833 u32 rx_page, rx_buf; 834 u64 bytes, packets; 835 unsigned int start; 836 u64 rx_p, rx_b; 837 u64 tx_p, tx_b; 838 u16 q; 839 840 if (test_bit(__I40E_DOWN, &vsi->state) || 841 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 842 return; 843 844 ns = i40e_get_vsi_stats_struct(vsi); 845 ons = &vsi->net_stats_offsets; 846 es = &vsi->eth_stats; 847 oes = &vsi->eth_stats_offsets; 848 849 /* Gather up the netdev and vsi stats that the driver collects 850 * on the fly during packet processing 851 */ 852 rx_b = rx_p = 0; 853 tx_b = tx_p = 0; 854 tx_restart = tx_busy = 0; 855 rx_page = 0; 856 rx_buf = 0; 857 rcu_read_lock(); 858 for (q = 0; q < vsi->num_queue_pairs; q++) { 859 /* locate Tx ring */ 860 p = ACCESS_ONCE(vsi->tx_rings[q]); 861 862 do { 863 start = u64_stats_fetch_begin_irq(&p->syncp); 864 packets = p->stats.packets; 865 bytes = p->stats.bytes; 866 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 867 tx_b += bytes; 868 tx_p += packets; 869 tx_restart += p->tx_stats.restart_queue; 870 tx_busy += p->tx_stats.tx_busy; 871 872 /* Rx queue is part of the same block as Tx queue */ 873 p = &p[1]; 874 do { 875 start = u64_stats_fetch_begin_irq(&p->syncp); 876 packets = p->stats.packets; 877 bytes = p->stats.bytes; 878 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 879 rx_b += bytes; 880 rx_p += packets; 881 rx_buf += p->rx_stats.alloc_buff_failed; 882 rx_page += p->rx_stats.alloc_page_failed; 883 } 884 rcu_read_unlock(); 885 vsi->tx_restart = tx_restart; 886 vsi->tx_busy = tx_busy; 887 vsi->rx_page_failed = rx_page; 888 vsi->rx_buf_failed = rx_buf; 889 890 ns->rx_packets = rx_p; 891 ns->rx_bytes = rx_b; 892 ns->tx_packets = tx_p; 893 ns->tx_bytes = tx_b; 894 895 /* update netdev stats from eth stats */ 896 i40e_update_eth_stats(vsi); 897 ons->tx_errors = oes->tx_errors; 898 ns->tx_errors = es->tx_errors; 899 ons->multicast = oes->rx_multicast; 900 ns->multicast = es->rx_multicast; 901 ons->rx_dropped = oes->rx_discards; 902 ns->rx_dropped = es->rx_discards; 903 ons->tx_dropped = oes->tx_discards; 904 ns->tx_dropped = es->tx_discards; 905 906 /* pull in a couple PF stats if this is the main vsi */ 907 if (vsi == pf->vsi[pf->lan_vsi]) { 908 ns->rx_crc_errors = pf->stats.crc_errors; 909 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 910 ns->rx_length_errors = pf->stats.rx_length_errors; 911 } 912 } 913 914 /** 915 * i40e_update_pf_stats - Update the PF statistics counters. 916 * @pf: the PF to be updated 917 **/ 918 static void i40e_update_pf_stats(struct i40e_pf *pf) 919 { 920 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 921 struct i40e_hw_port_stats *nsd = &pf->stats; 922 struct i40e_hw *hw = &pf->hw; 923 u32 val; 924 int i; 925 926 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 927 I40E_GLPRT_GORCL(hw->port), 928 pf->stat_offsets_loaded, 929 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 930 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 931 I40E_GLPRT_GOTCL(hw->port), 932 pf->stat_offsets_loaded, 933 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 934 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 935 pf->stat_offsets_loaded, 936 &osd->eth.rx_discards, 937 &nsd->eth.rx_discards); 938 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 939 I40E_GLPRT_UPRCL(hw->port), 940 pf->stat_offsets_loaded, 941 &osd->eth.rx_unicast, 942 &nsd->eth.rx_unicast); 943 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 944 I40E_GLPRT_MPRCL(hw->port), 945 pf->stat_offsets_loaded, 946 &osd->eth.rx_multicast, 947 &nsd->eth.rx_multicast); 948 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 949 I40E_GLPRT_BPRCL(hw->port), 950 pf->stat_offsets_loaded, 951 &osd->eth.rx_broadcast, 952 &nsd->eth.rx_broadcast); 953 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 954 I40E_GLPRT_UPTCL(hw->port), 955 pf->stat_offsets_loaded, 956 &osd->eth.tx_unicast, 957 &nsd->eth.tx_unicast); 958 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 959 I40E_GLPRT_MPTCL(hw->port), 960 pf->stat_offsets_loaded, 961 &osd->eth.tx_multicast, 962 &nsd->eth.tx_multicast); 963 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 964 I40E_GLPRT_BPTCL(hw->port), 965 pf->stat_offsets_loaded, 966 &osd->eth.tx_broadcast, 967 &nsd->eth.tx_broadcast); 968 969 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 970 pf->stat_offsets_loaded, 971 &osd->tx_dropped_link_down, 972 &nsd->tx_dropped_link_down); 973 974 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 975 pf->stat_offsets_loaded, 976 &osd->crc_errors, &nsd->crc_errors); 977 978 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 979 pf->stat_offsets_loaded, 980 &osd->illegal_bytes, &nsd->illegal_bytes); 981 982 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 983 pf->stat_offsets_loaded, 984 &osd->mac_local_faults, 985 &nsd->mac_local_faults); 986 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 987 pf->stat_offsets_loaded, 988 &osd->mac_remote_faults, 989 &nsd->mac_remote_faults); 990 991 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 992 pf->stat_offsets_loaded, 993 &osd->rx_length_errors, 994 &nsd->rx_length_errors); 995 996 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 997 pf->stat_offsets_loaded, 998 &osd->link_xon_rx, &nsd->link_xon_rx); 999 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 1000 pf->stat_offsets_loaded, 1001 &osd->link_xon_tx, &nsd->link_xon_tx); 1002 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ 1003 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 1004 pf->stat_offsets_loaded, 1005 &osd->link_xoff_tx, &nsd->link_xoff_tx); 1006 1007 for (i = 0; i < 8; i++) { 1008 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 1009 pf->stat_offsets_loaded, 1010 &osd->priority_xon_rx[i], 1011 &nsd->priority_xon_rx[i]); 1012 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 1013 pf->stat_offsets_loaded, 1014 &osd->priority_xon_tx[i], 1015 &nsd->priority_xon_tx[i]); 1016 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 1017 pf->stat_offsets_loaded, 1018 &osd->priority_xoff_tx[i], 1019 &nsd->priority_xoff_tx[i]); 1020 i40e_stat_update32(hw, 1021 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 1022 pf->stat_offsets_loaded, 1023 &osd->priority_xon_2_xoff[i], 1024 &nsd->priority_xon_2_xoff[i]); 1025 } 1026 1027 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1028 I40E_GLPRT_PRC64L(hw->port), 1029 pf->stat_offsets_loaded, 1030 &osd->rx_size_64, &nsd->rx_size_64); 1031 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1032 I40E_GLPRT_PRC127L(hw->port), 1033 pf->stat_offsets_loaded, 1034 &osd->rx_size_127, &nsd->rx_size_127); 1035 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1036 I40E_GLPRT_PRC255L(hw->port), 1037 pf->stat_offsets_loaded, 1038 &osd->rx_size_255, &nsd->rx_size_255); 1039 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1040 I40E_GLPRT_PRC511L(hw->port), 1041 pf->stat_offsets_loaded, 1042 &osd->rx_size_511, &nsd->rx_size_511); 1043 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1044 I40E_GLPRT_PRC1023L(hw->port), 1045 pf->stat_offsets_loaded, 1046 &osd->rx_size_1023, &nsd->rx_size_1023); 1047 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1048 I40E_GLPRT_PRC1522L(hw->port), 1049 pf->stat_offsets_loaded, 1050 &osd->rx_size_1522, &nsd->rx_size_1522); 1051 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1052 I40E_GLPRT_PRC9522L(hw->port), 1053 pf->stat_offsets_loaded, 1054 &osd->rx_size_big, &nsd->rx_size_big); 1055 1056 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1057 I40E_GLPRT_PTC64L(hw->port), 1058 pf->stat_offsets_loaded, 1059 &osd->tx_size_64, &nsd->tx_size_64); 1060 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1061 I40E_GLPRT_PTC127L(hw->port), 1062 pf->stat_offsets_loaded, 1063 &osd->tx_size_127, &nsd->tx_size_127); 1064 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1065 I40E_GLPRT_PTC255L(hw->port), 1066 pf->stat_offsets_loaded, 1067 &osd->tx_size_255, &nsd->tx_size_255); 1068 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1069 I40E_GLPRT_PTC511L(hw->port), 1070 pf->stat_offsets_loaded, 1071 &osd->tx_size_511, &nsd->tx_size_511); 1072 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1073 I40E_GLPRT_PTC1023L(hw->port), 1074 pf->stat_offsets_loaded, 1075 &osd->tx_size_1023, &nsd->tx_size_1023); 1076 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1077 I40E_GLPRT_PTC1522L(hw->port), 1078 pf->stat_offsets_loaded, 1079 &osd->tx_size_1522, &nsd->tx_size_1522); 1080 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1081 I40E_GLPRT_PTC9522L(hw->port), 1082 pf->stat_offsets_loaded, 1083 &osd->tx_size_big, &nsd->tx_size_big); 1084 1085 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1086 pf->stat_offsets_loaded, 1087 &osd->rx_undersize, &nsd->rx_undersize); 1088 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1089 pf->stat_offsets_loaded, 1090 &osd->rx_fragments, &nsd->rx_fragments); 1091 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1092 pf->stat_offsets_loaded, 1093 &osd->rx_oversize, &nsd->rx_oversize); 1094 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1095 pf->stat_offsets_loaded, 1096 &osd->rx_jabber, &nsd->rx_jabber); 1097 1098 /* FDIR stats */ 1099 i40e_stat_update32(hw, 1100 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)), 1101 pf->stat_offsets_loaded, 1102 &osd->fd_atr_match, &nsd->fd_atr_match); 1103 i40e_stat_update32(hw, 1104 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)), 1105 pf->stat_offsets_loaded, 1106 &osd->fd_sb_match, &nsd->fd_sb_match); 1107 i40e_stat_update32(hw, 1108 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)), 1109 pf->stat_offsets_loaded, 1110 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match); 1111 1112 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1113 nsd->tx_lpi_status = 1114 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1115 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1116 nsd->rx_lpi_status = 1117 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1118 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1119 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1120 pf->stat_offsets_loaded, 1121 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1122 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1123 pf->stat_offsets_loaded, 1124 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1125 1126 pf->stat_offsets_loaded = true; 1127 } 1128 1129 /** 1130 * i40e_update_stats - Update the various statistics counters. 1131 * @vsi: the VSI to be updated 1132 * 1133 * Update the various stats for this VSI and its related entities. 1134 **/ 1135 void i40e_update_stats(struct i40e_vsi *vsi) 1136 { 1137 struct i40e_pf *pf = vsi->back; 1138 1139 if (vsi == pf->vsi[pf->lan_vsi]) 1140 i40e_update_pf_stats(pf); 1141 1142 i40e_update_vsi_stats(vsi); 1143 #ifdef I40E_FCOE 1144 i40e_update_fcoe_stats(vsi); 1145 #endif 1146 } 1147 1148 /** 1149 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1150 * @vsi: the VSI to be searched 1151 * @macaddr: the MAC address 1152 * @vlan: the vlan 1153 * @is_vf: make sure its a VF filter, else doesn't matter 1154 * @is_netdev: make sure its a netdev filter, else doesn't matter 1155 * 1156 * Returns ptr to the filter object or NULL 1157 **/ 1158 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1159 u8 *macaddr, s16 vlan, 1160 bool is_vf, bool is_netdev) 1161 { 1162 struct i40e_mac_filter *f; 1163 1164 if (!vsi || !macaddr) 1165 return NULL; 1166 1167 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1168 if ((ether_addr_equal(macaddr, f->macaddr)) && 1169 (vlan == f->vlan) && 1170 (!is_vf || f->is_vf) && 1171 (!is_netdev || f->is_netdev)) 1172 return f; 1173 } 1174 return NULL; 1175 } 1176 1177 /** 1178 * i40e_find_mac - Find a mac addr in the macvlan filters list 1179 * @vsi: the VSI to be searched 1180 * @macaddr: the MAC address we are searching for 1181 * @is_vf: make sure its a VF filter, else doesn't matter 1182 * @is_netdev: make sure its a netdev filter, else doesn't matter 1183 * 1184 * Returns the first filter with the provided MAC address or NULL if 1185 * MAC address was not found 1186 **/ 1187 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, 1188 bool is_vf, bool is_netdev) 1189 { 1190 struct i40e_mac_filter *f; 1191 1192 if (!vsi || !macaddr) 1193 return NULL; 1194 1195 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1196 if ((ether_addr_equal(macaddr, f->macaddr)) && 1197 (!is_vf || f->is_vf) && 1198 (!is_netdev || f->is_netdev)) 1199 return f; 1200 } 1201 return NULL; 1202 } 1203 1204 /** 1205 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1206 * @vsi: the VSI to be searched 1207 * 1208 * Returns true if VSI is in vlan mode or false otherwise 1209 **/ 1210 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1211 { 1212 struct i40e_mac_filter *f; 1213 1214 /* Only -1 for all the filters denotes not in vlan mode 1215 * so we have to go through all the list in order to make sure 1216 */ 1217 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1218 if (f->vlan >= 0) 1219 return true; 1220 } 1221 1222 return false; 1223 } 1224 1225 /** 1226 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans 1227 * @vsi: the VSI to be searched 1228 * @macaddr: the mac address to be filtered 1229 * @is_vf: true if it is a VF 1230 * @is_netdev: true if it is a netdev 1231 * 1232 * Goes through all the macvlan filters and adds a 1233 * macvlan filter for each unique vlan that already exists 1234 * 1235 * Returns first filter found on success, else NULL 1236 **/ 1237 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1238 bool is_vf, bool is_netdev) 1239 { 1240 struct i40e_mac_filter *f; 1241 1242 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1243 if (!i40e_find_filter(vsi, macaddr, f->vlan, 1244 is_vf, is_netdev)) { 1245 if (!i40e_add_filter(vsi, macaddr, f->vlan, 1246 is_vf, is_netdev)) 1247 return NULL; 1248 } 1249 } 1250 1251 return list_first_entry_or_null(&vsi->mac_filter_list, 1252 struct i40e_mac_filter, list); 1253 } 1254 1255 /** 1256 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1257 * @vsi: the PF Main VSI - inappropriate for any other VSI 1258 * @macaddr: the MAC address 1259 * 1260 * Some older firmware configurations set up a default promiscuous VLAN 1261 * filter that needs to be removed. 1262 **/ 1263 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1264 { 1265 struct i40e_aqc_remove_macvlan_element_data element; 1266 struct i40e_pf *pf = vsi->back; 1267 i40e_status aq_ret; 1268 1269 /* Only appropriate for the PF main VSI */ 1270 if (vsi->type != I40E_VSI_MAIN) 1271 return -EINVAL; 1272 1273 memset(&element, 0, sizeof(element)); 1274 ether_addr_copy(element.mac_addr, macaddr); 1275 element.vlan_tag = 0; 1276 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1277 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1278 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1279 if (aq_ret) 1280 return -ENOENT; 1281 1282 return 0; 1283 } 1284 1285 /** 1286 * i40e_add_filter - Add a mac/vlan filter to the VSI 1287 * @vsi: the VSI to be searched 1288 * @macaddr: the MAC address 1289 * @vlan: the vlan 1290 * @is_vf: make sure its a VF filter, else doesn't matter 1291 * @is_netdev: make sure its a netdev filter, else doesn't matter 1292 * 1293 * Returns ptr to the filter object or NULL when no memory available. 1294 **/ 1295 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1296 u8 *macaddr, s16 vlan, 1297 bool is_vf, bool is_netdev) 1298 { 1299 struct i40e_mac_filter *f; 1300 1301 if (!vsi || !macaddr) 1302 return NULL; 1303 1304 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1305 if (!f) { 1306 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1307 if (!f) 1308 goto add_filter_out; 1309 1310 ether_addr_copy(f->macaddr, macaddr); 1311 f->vlan = vlan; 1312 f->changed = true; 1313 1314 INIT_LIST_HEAD(&f->list); 1315 list_add(&f->list, &vsi->mac_filter_list); 1316 } 1317 1318 /* increment counter and add a new flag if needed */ 1319 if (is_vf) { 1320 if (!f->is_vf) { 1321 f->is_vf = true; 1322 f->counter++; 1323 } 1324 } else if (is_netdev) { 1325 if (!f->is_netdev) { 1326 f->is_netdev = true; 1327 f->counter++; 1328 } 1329 } else { 1330 f->counter++; 1331 } 1332 1333 /* changed tells sync_filters_subtask to 1334 * push the filter down to the firmware 1335 */ 1336 if (f->changed) { 1337 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1338 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1339 } 1340 1341 add_filter_out: 1342 return f; 1343 } 1344 1345 /** 1346 * i40e_del_filter - Remove a mac/vlan filter from the VSI 1347 * @vsi: the VSI to be searched 1348 * @macaddr: the MAC address 1349 * @vlan: the vlan 1350 * @is_vf: make sure it's a VF filter, else doesn't matter 1351 * @is_netdev: make sure it's a netdev filter, else doesn't matter 1352 **/ 1353 void i40e_del_filter(struct i40e_vsi *vsi, 1354 u8 *macaddr, s16 vlan, 1355 bool is_vf, bool is_netdev) 1356 { 1357 struct i40e_mac_filter *f; 1358 1359 if (!vsi || !macaddr) 1360 return; 1361 1362 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1363 if (!f || f->counter == 0) 1364 return; 1365 1366 if (is_vf) { 1367 if (f->is_vf) { 1368 f->is_vf = false; 1369 f->counter--; 1370 } 1371 } else if (is_netdev) { 1372 if (f->is_netdev) { 1373 f->is_netdev = false; 1374 f->counter--; 1375 } 1376 } else { 1377 /* make sure we don't remove a filter in use by VF or netdev */ 1378 int min_f = 0; 1379 min_f += (f->is_vf ? 1 : 0); 1380 min_f += (f->is_netdev ? 1 : 0); 1381 1382 if (f->counter > min_f) 1383 f->counter--; 1384 } 1385 1386 /* counter == 0 tells sync_filters_subtask to 1387 * remove the filter from the firmware's list 1388 */ 1389 if (f->counter == 0) { 1390 f->changed = true; 1391 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1392 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1393 } 1394 } 1395 1396 /** 1397 * i40e_set_mac - NDO callback to set mac address 1398 * @netdev: network interface device structure 1399 * @p: pointer to an address structure 1400 * 1401 * Returns 0 on success, negative on failure 1402 **/ 1403 #ifdef I40E_FCOE 1404 int i40e_set_mac(struct net_device *netdev, void *p) 1405 #else 1406 static int i40e_set_mac(struct net_device *netdev, void *p) 1407 #endif 1408 { 1409 struct i40e_netdev_priv *np = netdev_priv(netdev); 1410 struct i40e_vsi *vsi = np->vsi; 1411 struct i40e_pf *pf = vsi->back; 1412 struct i40e_hw *hw = &pf->hw; 1413 struct sockaddr *addr = p; 1414 struct i40e_mac_filter *f; 1415 1416 if (!is_valid_ether_addr(addr->sa_data)) 1417 return -EADDRNOTAVAIL; 1418 1419 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1420 netdev_info(netdev, "already using mac address %pM\n", 1421 addr->sa_data); 1422 return 0; 1423 } 1424 1425 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1426 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1427 return -EADDRNOTAVAIL; 1428 1429 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1430 netdev_info(netdev, "returning to hw mac address %pM\n", 1431 hw->mac.addr); 1432 else 1433 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1434 1435 if (vsi->type == I40E_VSI_MAIN) { 1436 i40e_status ret; 1437 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1438 I40E_AQC_WRITE_TYPE_LAA_WOL, 1439 addr->sa_data, NULL); 1440 if (ret) { 1441 netdev_info(netdev, 1442 "Addr change for Main VSI failed: %d\n", 1443 ret); 1444 return -EADDRNOTAVAIL; 1445 } 1446 } 1447 1448 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) { 1449 struct i40e_aqc_remove_macvlan_element_data element; 1450 1451 memset(&element, 0, sizeof(element)); 1452 ether_addr_copy(element.mac_addr, netdev->dev_addr); 1453 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1454 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1455 } else { 1456 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 1457 false, false); 1458 } 1459 1460 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) { 1461 struct i40e_aqc_add_macvlan_element_data element; 1462 1463 memset(&element, 0, sizeof(element)); 1464 ether_addr_copy(element.mac_addr, hw->mac.addr); 1465 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 1466 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1467 } else { 1468 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, 1469 false, false); 1470 if (f) 1471 f->is_laa = true; 1472 } 1473 1474 i40e_sync_vsi_filters(vsi); 1475 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1476 1477 return 0; 1478 } 1479 1480 /** 1481 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1482 * @vsi: the VSI being setup 1483 * @ctxt: VSI context structure 1484 * @enabled_tc: Enabled TCs bitmap 1485 * @is_add: True if called before Add VSI 1486 * 1487 * Setup VSI queue mapping for enabled traffic classes. 1488 **/ 1489 #ifdef I40E_FCOE 1490 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1491 struct i40e_vsi_context *ctxt, 1492 u8 enabled_tc, 1493 bool is_add) 1494 #else 1495 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1496 struct i40e_vsi_context *ctxt, 1497 u8 enabled_tc, 1498 bool is_add) 1499 #endif 1500 { 1501 struct i40e_pf *pf = vsi->back; 1502 u16 sections = 0; 1503 u8 netdev_tc = 0; 1504 u16 numtc = 0; 1505 u16 qcount; 1506 u8 offset; 1507 u16 qmap; 1508 int i; 1509 u16 num_tc_qps = 0; 1510 1511 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1512 offset = 0; 1513 1514 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1515 /* Find numtc from enabled TC bitmap */ 1516 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1517 if (enabled_tc & (1 << i)) /* TC is enabled */ 1518 numtc++; 1519 } 1520 if (!numtc) { 1521 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1522 numtc = 1; 1523 } 1524 } else { 1525 /* At least TC0 is enabled in case of non-DCB case */ 1526 numtc = 1; 1527 } 1528 1529 vsi->tc_config.numtc = numtc; 1530 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1531 /* Number of queues per enabled TC */ 1532 /* In MFP case we can have a much lower count of MSIx 1533 * vectors available and so we need to lower the used 1534 * q count. 1535 */ 1536 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix); 1537 num_tc_qps = qcount / numtc; 1538 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1539 1540 /* Setup queue offset/count for all TCs for given VSI */ 1541 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1542 /* See if the given TC is enabled for the given VSI */ 1543 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ 1544 int pow, num_qps; 1545 1546 switch (vsi->type) { 1547 case I40E_VSI_MAIN: 1548 qcount = min_t(int, pf->rss_size, num_tc_qps); 1549 break; 1550 #ifdef I40E_FCOE 1551 case I40E_VSI_FCOE: 1552 qcount = num_tc_qps; 1553 break; 1554 #endif 1555 case I40E_VSI_FDIR: 1556 case I40E_VSI_SRIOV: 1557 case I40E_VSI_VMDQ2: 1558 default: 1559 qcount = num_tc_qps; 1560 WARN_ON(i != 0); 1561 break; 1562 } 1563 vsi->tc_config.tc_info[i].qoffset = offset; 1564 vsi->tc_config.tc_info[i].qcount = qcount; 1565 1566 /* find the next higher power-of-2 of num queue pairs */ 1567 num_qps = qcount; 1568 pow = 0; 1569 while (num_qps && ((1 << pow) < qcount)) { 1570 pow++; 1571 num_qps >>= 1; 1572 } 1573 1574 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1575 qmap = 1576 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1577 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1578 1579 offset += qcount; 1580 } else { 1581 /* TC is not enabled so set the offset to 1582 * default queue and allocate one queue 1583 * for the given TC. 1584 */ 1585 vsi->tc_config.tc_info[i].qoffset = 0; 1586 vsi->tc_config.tc_info[i].qcount = 1; 1587 vsi->tc_config.tc_info[i].netdev_tc = 0; 1588 1589 qmap = 0; 1590 } 1591 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1592 } 1593 1594 /* Set actual Tx/Rx queue pairs */ 1595 vsi->num_queue_pairs = offset; 1596 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1597 if (vsi->req_queue_pairs > 0) 1598 vsi->num_queue_pairs = vsi->req_queue_pairs; 1599 else 1600 vsi->num_queue_pairs = pf->num_lan_msix; 1601 } 1602 1603 /* Scheduler section valid can only be set for ADD VSI */ 1604 if (is_add) { 1605 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1606 1607 ctxt->info.up_enable_bits = enabled_tc; 1608 } 1609 if (vsi->type == I40E_VSI_SRIOV) { 1610 ctxt->info.mapping_flags |= 1611 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1612 for (i = 0; i < vsi->num_queue_pairs; i++) 1613 ctxt->info.queue_mapping[i] = 1614 cpu_to_le16(vsi->base_queue + i); 1615 } else { 1616 ctxt->info.mapping_flags |= 1617 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1618 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1619 } 1620 ctxt->info.valid_sections |= cpu_to_le16(sections); 1621 } 1622 1623 /** 1624 * i40e_set_rx_mode - NDO callback to set the netdev filters 1625 * @netdev: network interface device structure 1626 **/ 1627 #ifdef I40E_FCOE 1628 void i40e_set_rx_mode(struct net_device *netdev) 1629 #else 1630 static void i40e_set_rx_mode(struct net_device *netdev) 1631 #endif 1632 { 1633 struct i40e_netdev_priv *np = netdev_priv(netdev); 1634 struct i40e_mac_filter *f, *ftmp; 1635 struct i40e_vsi *vsi = np->vsi; 1636 struct netdev_hw_addr *uca; 1637 struct netdev_hw_addr *mca; 1638 struct netdev_hw_addr *ha; 1639 1640 /* add addr if not already in the filter list */ 1641 netdev_for_each_uc_addr(uca, netdev) { 1642 if (!i40e_find_mac(vsi, uca->addr, false, true)) { 1643 if (i40e_is_vsi_in_vlan(vsi)) 1644 i40e_put_mac_in_vlan(vsi, uca->addr, 1645 false, true); 1646 else 1647 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, 1648 false, true); 1649 } 1650 } 1651 1652 netdev_for_each_mc_addr(mca, netdev) { 1653 if (!i40e_find_mac(vsi, mca->addr, false, true)) { 1654 if (i40e_is_vsi_in_vlan(vsi)) 1655 i40e_put_mac_in_vlan(vsi, mca->addr, 1656 false, true); 1657 else 1658 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, 1659 false, true); 1660 } 1661 } 1662 1663 /* remove filter if not in netdev list */ 1664 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1665 bool found = false; 1666 1667 if (!f->is_netdev) 1668 continue; 1669 1670 if (is_multicast_ether_addr(f->macaddr)) { 1671 netdev_for_each_mc_addr(mca, netdev) { 1672 if (ether_addr_equal(mca->addr, f->macaddr)) { 1673 found = true; 1674 break; 1675 } 1676 } 1677 } else { 1678 netdev_for_each_uc_addr(uca, netdev) { 1679 if (ether_addr_equal(uca->addr, f->macaddr)) { 1680 found = true; 1681 break; 1682 } 1683 } 1684 1685 for_each_dev_addr(netdev, ha) { 1686 if (ether_addr_equal(ha->addr, f->macaddr)) { 1687 found = true; 1688 break; 1689 } 1690 } 1691 } 1692 if (!found) 1693 i40e_del_filter( 1694 vsi, f->macaddr, I40E_VLAN_ANY, false, true); 1695 } 1696 1697 /* check for other flag changes */ 1698 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1699 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1700 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1701 } 1702 } 1703 1704 /** 1705 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 1706 * @vsi: ptr to the VSI 1707 * 1708 * Push any outstanding VSI filter changes through the AdminQ. 1709 * 1710 * Returns 0 or error value 1711 **/ 1712 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 1713 { 1714 struct i40e_mac_filter *f, *ftmp; 1715 bool promisc_forced_on = false; 1716 bool add_happened = false; 1717 int filter_list_len = 0; 1718 u32 changed_flags = 0; 1719 i40e_status aq_ret = 0; 1720 struct i40e_pf *pf; 1721 int num_add = 0; 1722 int num_del = 0; 1723 u16 cmd_flags; 1724 1725 /* empty array typed pointers, kcalloc later */ 1726 struct i40e_aqc_add_macvlan_element_data *add_list; 1727 struct i40e_aqc_remove_macvlan_element_data *del_list; 1728 1729 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 1730 usleep_range(1000, 2000); 1731 pf = vsi->back; 1732 1733 if (vsi->netdev) { 1734 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 1735 vsi->current_netdev_flags = vsi->netdev->flags; 1736 } 1737 1738 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 1739 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 1740 1741 filter_list_len = pf->hw.aq.asq_buf_size / 1742 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1743 del_list = kcalloc(filter_list_len, 1744 sizeof(struct i40e_aqc_remove_macvlan_element_data), 1745 GFP_KERNEL); 1746 if (!del_list) 1747 return -ENOMEM; 1748 1749 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1750 if (!f->changed) 1751 continue; 1752 1753 if (f->counter != 0) 1754 continue; 1755 f->changed = false; 1756 cmd_flags = 0; 1757 1758 /* add to delete list */ 1759 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 1760 del_list[num_del].vlan_tag = 1761 cpu_to_le16((u16)(f->vlan == 1762 I40E_VLAN_ANY ? 0 : f->vlan)); 1763 1764 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1765 del_list[num_del].flags = cmd_flags; 1766 num_del++; 1767 1768 /* unlink from filter list */ 1769 list_del(&f->list); 1770 kfree(f); 1771 1772 /* flush a full buffer */ 1773 if (num_del == filter_list_len) { 1774 aq_ret = i40e_aq_remove_macvlan(&pf->hw, 1775 vsi->seid, del_list, num_del, 1776 NULL); 1777 num_del = 0; 1778 memset(del_list, 0, sizeof(*del_list)); 1779 1780 if (aq_ret && 1781 pf->hw.aq.asq_last_status != 1782 I40E_AQ_RC_ENOENT) 1783 dev_info(&pf->pdev->dev, 1784 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", 1785 aq_ret, 1786 pf->hw.aq.asq_last_status); 1787 } 1788 } 1789 if (num_del) { 1790 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, 1791 del_list, num_del, NULL); 1792 num_del = 0; 1793 1794 if (aq_ret && 1795 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT) 1796 dev_info(&pf->pdev->dev, 1797 "ignoring delete macvlan error, err %d, aq_err %d\n", 1798 aq_ret, pf->hw.aq.asq_last_status); 1799 } 1800 1801 kfree(del_list); 1802 del_list = NULL; 1803 1804 /* do all the adds now */ 1805 filter_list_len = pf->hw.aq.asq_buf_size / 1806 sizeof(struct i40e_aqc_add_macvlan_element_data), 1807 add_list = kcalloc(filter_list_len, 1808 sizeof(struct i40e_aqc_add_macvlan_element_data), 1809 GFP_KERNEL); 1810 if (!add_list) 1811 return -ENOMEM; 1812 1813 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1814 if (!f->changed) 1815 continue; 1816 1817 if (f->counter == 0) 1818 continue; 1819 f->changed = false; 1820 add_happened = true; 1821 cmd_flags = 0; 1822 1823 /* add to add array */ 1824 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); 1825 add_list[num_add].vlan_tag = 1826 cpu_to_le16( 1827 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 1828 add_list[num_add].queue_number = 0; 1829 1830 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 1831 add_list[num_add].flags = cpu_to_le16(cmd_flags); 1832 num_add++; 1833 1834 /* flush a full buffer */ 1835 if (num_add == filter_list_len) { 1836 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1837 add_list, num_add, 1838 NULL); 1839 num_add = 0; 1840 1841 if (aq_ret) 1842 break; 1843 memset(add_list, 0, sizeof(*add_list)); 1844 } 1845 } 1846 if (num_add) { 1847 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1848 add_list, num_add, NULL); 1849 num_add = 0; 1850 } 1851 kfree(add_list); 1852 add_list = NULL; 1853 1854 if (add_happened && aq_ret && 1855 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) { 1856 dev_info(&pf->pdev->dev, 1857 "add filter failed, err %d, aq_err %d\n", 1858 aq_ret, pf->hw.aq.asq_last_status); 1859 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && 1860 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1861 &vsi->state)) { 1862 promisc_forced_on = true; 1863 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1864 &vsi->state); 1865 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); 1866 } 1867 } 1868 } 1869 1870 /* check for changes in promiscuous modes */ 1871 if (changed_flags & IFF_ALLMULTI) { 1872 bool cur_multipromisc; 1873 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 1874 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 1875 vsi->seid, 1876 cur_multipromisc, 1877 NULL); 1878 if (aq_ret) 1879 dev_info(&pf->pdev->dev, 1880 "set multi promisc failed, err %d, aq_err %d\n", 1881 aq_ret, pf->hw.aq.asq_last_status); 1882 } 1883 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { 1884 bool cur_promisc; 1885 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 1886 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1887 &vsi->state)); 1888 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, 1889 vsi->seid, 1890 cur_promisc, NULL); 1891 if (aq_ret) 1892 dev_info(&pf->pdev->dev, 1893 "set uni promisc failed, err %d, aq_err %d\n", 1894 aq_ret, pf->hw.aq.asq_last_status); 1895 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 1896 vsi->seid, 1897 cur_promisc, NULL); 1898 if (aq_ret) 1899 dev_info(&pf->pdev->dev, 1900 "set brdcast promisc failed, err %d, aq_err %d\n", 1901 aq_ret, pf->hw.aq.asq_last_status); 1902 } 1903 1904 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 1905 return 0; 1906 } 1907 1908 /** 1909 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 1910 * @pf: board private structure 1911 **/ 1912 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 1913 { 1914 int v; 1915 1916 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 1917 return; 1918 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 1919 1920 for (v = 0; v < pf->num_alloc_vsi; v++) { 1921 if (pf->vsi[v] && 1922 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) 1923 i40e_sync_vsi_filters(pf->vsi[v]); 1924 } 1925 } 1926 1927 /** 1928 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 1929 * @netdev: network interface device structure 1930 * @new_mtu: new value for maximum frame size 1931 * 1932 * Returns 0 on success, negative on failure 1933 **/ 1934 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 1935 { 1936 struct i40e_netdev_priv *np = netdev_priv(netdev); 1937 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 1938 struct i40e_vsi *vsi = np->vsi; 1939 1940 /* MTU < 68 is an error and causes problems on some kernels */ 1941 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) 1942 return -EINVAL; 1943 1944 netdev_info(netdev, "changing MTU from %d to %d\n", 1945 netdev->mtu, new_mtu); 1946 netdev->mtu = new_mtu; 1947 if (netif_running(netdev)) 1948 i40e_vsi_reinit_locked(vsi); 1949 1950 return 0; 1951 } 1952 1953 /** 1954 * i40e_ioctl - Access the hwtstamp interface 1955 * @netdev: network interface device structure 1956 * @ifr: interface request data 1957 * @cmd: ioctl command 1958 **/ 1959 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 1960 { 1961 struct i40e_netdev_priv *np = netdev_priv(netdev); 1962 struct i40e_pf *pf = np->vsi->back; 1963 1964 switch (cmd) { 1965 case SIOCGHWTSTAMP: 1966 return i40e_ptp_get_ts_config(pf, ifr); 1967 case SIOCSHWTSTAMP: 1968 return i40e_ptp_set_ts_config(pf, ifr); 1969 default: 1970 return -EOPNOTSUPP; 1971 } 1972 } 1973 1974 /** 1975 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 1976 * @vsi: the vsi being adjusted 1977 **/ 1978 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 1979 { 1980 struct i40e_vsi_context ctxt; 1981 i40e_status ret; 1982 1983 if ((vsi->info.valid_sections & 1984 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 1985 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 1986 return; /* already enabled */ 1987 1988 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 1989 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 1990 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 1991 1992 ctxt.seid = vsi->seid; 1993 ctxt.info = vsi->info; 1994 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 1995 if (ret) { 1996 dev_info(&vsi->back->pdev->dev, 1997 "%s: update vsi failed, aq_err=%d\n", 1998 __func__, vsi->back->hw.aq.asq_last_status); 1999 } 2000 } 2001 2002 /** 2003 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2004 * @vsi: the vsi being adjusted 2005 **/ 2006 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2007 { 2008 struct i40e_vsi_context ctxt; 2009 i40e_status ret; 2010 2011 if ((vsi->info.valid_sections & 2012 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2013 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2014 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2015 return; /* already disabled */ 2016 2017 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2018 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2019 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2020 2021 ctxt.seid = vsi->seid; 2022 ctxt.info = vsi->info; 2023 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2024 if (ret) { 2025 dev_info(&vsi->back->pdev->dev, 2026 "%s: update vsi failed, aq_err=%d\n", 2027 __func__, vsi->back->hw.aq.asq_last_status); 2028 } 2029 } 2030 2031 /** 2032 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2033 * @netdev: network interface to be adjusted 2034 * @features: netdev features to test if VLAN offload is enabled or not 2035 **/ 2036 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2037 { 2038 struct i40e_netdev_priv *np = netdev_priv(netdev); 2039 struct i40e_vsi *vsi = np->vsi; 2040 2041 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2042 i40e_vlan_stripping_enable(vsi); 2043 else 2044 i40e_vlan_stripping_disable(vsi); 2045 } 2046 2047 /** 2048 * i40e_vsi_add_vlan - Add vsi membership for given vlan 2049 * @vsi: the vsi being configured 2050 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2051 **/ 2052 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) 2053 { 2054 struct i40e_mac_filter *f, *add_f; 2055 bool is_netdev, is_vf; 2056 2057 is_vf = (vsi->type == I40E_VSI_SRIOV); 2058 is_netdev = !!(vsi->netdev); 2059 2060 if (is_netdev) { 2061 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, 2062 is_vf, is_netdev); 2063 if (!add_f) { 2064 dev_info(&vsi->back->pdev->dev, 2065 "Could not add vlan filter %d for %pM\n", 2066 vid, vsi->netdev->dev_addr); 2067 return -ENOMEM; 2068 } 2069 } 2070 2071 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2072 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2073 if (!add_f) { 2074 dev_info(&vsi->back->pdev->dev, 2075 "Could not add vlan filter %d for %pM\n", 2076 vid, f->macaddr); 2077 return -ENOMEM; 2078 } 2079 } 2080 2081 /* Now if we add a vlan tag, make sure to check if it is the first 2082 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" 2083 * with 0, so we now accept untagged and specified tagged traffic 2084 * (and not any taged and untagged) 2085 */ 2086 if (vid > 0) { 2087 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, 2088 I40E_VLAN_ANY, 2089 is_vf, is_netdev)) { 2090 i40e_del_filter(vsi, vsi->netdev->dev_addr, 2091 I40E_VLAN_ANY, is_vf, is_netdev); 2092 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, 2093 is_vf, is_netdev); 2094 if (!add_f) { 2095 dev_info(&vsi->back->pdev->dev, 2096 "Could not add filter 0 for %pM\n", 2097 vsi->netdev->dev_addr); 2098 return -ENOMEM; 2099 } 2100 } 2101 } 2102 2103 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ 2104 if (vid > 0 && !vsi->info.pvid) { 2105 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2106 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2107 is_vf, is_netdev)) { 2108 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2109 is_vf, is_netdev); 2110 add_f = i40e_add_filter(vsi, f->macaddr, 2111 0, is_vf, is_netdev); 2112 if (!add_f) { 2113 dev_info(&vsi->back->pdev->dev, 2114 "Could not add filter 0 for %pM\n", 2115 f->macaddr); 2116 return -ENOMEM; 2117 } 2118 } 2119 } 2120 } 2121 2122 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2123 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2124 return 0; 2125 2126 return i40e_sync_vsi_filters(vsi); 2127 } 2128 2129 /** 2130 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan 2131 * @vsi: the vsi being configured 2132 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2133 * 2134 * Return: 0 on success or negative otherwise 2135 **/ 2136 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) 2137 { 2138 struct net_device *netdev = vsi->netdev; 2139 struct i40e_mac_filter *f, *add_f; 2140 bool is_vf, is_netdev; 2141 int filter_count = 0; 2142 2143 is_vf = (vsi->type == I40E_VSI_SRIOV); 2144 is_netdev = !!(netdev); 2145 2146 if (is_netdev) 2147 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); 2148 2149 list_for_each_entry(f, &vsi->mac_filter_list, list) 2150 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2151 2152 /* go through all the filters for this VSI and if there is only 2153 * vid == 0 it means there are no other filters, so vid 0 must 2154 * be replaced with -1. This signifies that we should from now 2155 * on accept any traffic (with any tag present, or untagged) 2156 */ 2157 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2158 if (is_netdev) { 2159 if (f->vlan && 2160 ether_addr_equal(netdev->dev_addr, f->macaddr)) 2161 filter_count++; 2162 } 2163 2164 if (f->vlan) 2165 filter_count++; 2166 } 2167 2168 if (!filter_count && is_netdev) { 2169 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); 2170 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 2171 is_vf, is_netdev); 2172 if (!f) { 2173 dev_info(&vsi->back->pdev->dev, 2174 "Could not add filter %d for %pM\n", 2175 I40E_VLAN_ANY, netdev->dev_addr); 2176 return -ENOMEM; 2177 } 2178 } 2179 2180 if (!filter_count) { 2181 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2182 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); 2183 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2184 is_vf, is_netdev); 2185 if (!add_f) { 2186 dev_info(&vsi->back->pdev->dev, 2187 "Could not add filter %d for %pM\n", 2188 I40E_VLAN_ANY, f->macaddr); 2189 return -ENOMEM; 2190 } 2191 } 2192 } 2193 2194 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2195 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2196 return 0; 2197 2198 return i40e_sync_vsi_filters(vsi); 2199 } 2200 2201 /** 2202 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2203 * @netdev: network interface to be adjusted 2204 * @vid: vlan id to be added 2205 * 2206 * net_device_ops implementation for adding vlan ids 2207 **/ 2208 #ifdef I40E_FCOE 2209 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2210 __always_unused __be16 proto, u16 vid) 2211 #else 2212 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2213 __always_unused __be16 proto, u16 vid) 2214 #endif 2215 { 2216 struct i40e_netdev_priv *np = netdev_priv(netdev); 2217 struct i40e_vsi *vsi = np->vsi; 2218 int ret = 0; 2219 2220 if (vid > 4095) 2221 return -EINVAL; 2222 2223 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); 2224 2225 /* If the network stack called us with vid = 0 then 2226 * it is asking to receive priority tagged packets with 2227 * vlan id 0. Our HW receives them by default when configured 2228 * to receive untagged packets so there is no need to add an 2229 * extra filter for vlan 0 tagged packets. 2230 */ 2231 if (vid) 2232 ret = i40e_vsi_add_vlan(vsi, vid); 2233 2234 if (!ret && (vid < VLAN_N_VID)) 2235 set_bit(vid, vsi->active_vlans); 2236 2237 return ret; 2238 } 2239 2240 /** 2241 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2242 * @netdev: network interface to be adjusted 2243 * @vid: vlan id to be removed 2244 * 2245 * net_device_ops implementation for removing vlan ids 2246 **/ 2247 #ifdef I40E_FCOE 2248 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2249 __always_unused __be16 proto, u16 vid) 2250 #else 2251 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2252 __always_unused __be16 proto, u16 vid) 2253 #endif 2254 { 2255 struct i40e_netdev_priv *np = netdev_priv(netdev); 2256 struct i40e_vsi *vsi = np->vsi; 2257 2258 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); 2259 2260 /* return code is ignored as there is nothing a user 2261 * can do about failure to remove and a log message was 2262 * already printed from the other function 2263 */ 2264 i40e_vsi_kill_vlan(vsi, vid); 2265 2266 clear_bit(vid, vsi->active_vlans); 2267 2268 return 0; 2269 } 2270 2271 /** 2272 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2273 * @vsi: the vsi being brought back up 2274 **/ 2275 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2276 { 2277 u16 vid; 2278 2279 if (!vsi->netdev) 2280 return; 2281 2282 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2283 2284 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2285 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2286 vid); 2287 } 2288 2289 /** 2290 * i40e_vsi_add_pvid - Add pvid for the VSI 2291 * @vsi: the vsi being adjusted 2292 * @vid: the vlan id to set as a PVID 2293 **/ 2294 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2295 { 2296 struct i40e_vsi_context ctxt; 2297 i40e_status aq_ret; 2298 2299 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2300 vsi->info.pvid = cpu_to_le16(vid); 2301 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2302 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2303 I40E_AQ_VSI_PVLAN_EMOD_STR; 2304 2305 ctxt.seid = vsi->seid; 2306 ctxt.info = vsi->info; 2307 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2308 if (aq_ret) { 2309 dev_info(&vsi->back->pdev->dev, 2310 "%s: update vsi failed, aq_err=%d\n", 2311 __func__, vsi->back->hw.aq.asq_last_status); 2312 return -ENOENT; 2313 } 2314 2315 return 0; 2316 } 2317 2318 /** 2319 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2320 * @vsi: the vsi being adjusted 2321 * 2322 * Just use the vlan_rx_register() service to put it back to normal 2323 **/ 2324 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2325 { 2326 i40e_vlan_stripping_disable(vsi); 2327 2328 vsi->info.pvid = 0; 2329 } 2330 2331 /** 2332 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2333 * @vsi: ptr to the VSI 2334 * 2335 * If this function returns with an error, then it's possible one or 2336 * more of the rings is populated (while the rest are not). It is the 2337 * callers duty to clean those orphaned rings. 2338 * 2339 * Return 0 on success, negative on failure 2340 **/ 2341 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2342 { 2343 int i, err = 0; 2344 2345 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2346 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2347 2348 return err; 2349 } 2350 2351 /** 2352 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2353 * @vsi: ptr to the VSI 2354 * 2355 * Free VSI's transmit software resources 2356 **/ 2357 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2358 { 2359 int i; 2360 2361 if (!vsi->tx_rings) 2362 return; 2363 2364 for (i = 0; i < vsi->num_queue_pairs; i++) 2365 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2366 i40e_free_tx_resources(vsi->tx_rings[i]); 2367 } 2368 2369 /** 2370 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2371 * @vsi: ptr to the VSI 2372 * 2373 * If this function returns with an error, then it's possible one or 2374 * more of the rings is populated (while the rest are not). It is the 2375 * callers duty to clean those orphaned rings. 2376 * 2377 * Return 0 on success, negative on failure 2378 **/ 2379 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2380 { 2381 int i, err = 0; 2382 2383 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2384 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2385 #ifdef I40E_FCOE 2386 i40e_fcoe_setup_ddp_resources(vsi); 2387 #endif 2388 return err; 2389 } 2390 2391 /** 2392 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2393 * @vsi: ptr to the VSI 2394 * 2395 * Free all receive software resources 2396 **/ 2397 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2398 { 2399 int i; 2400 2401 if (!vsi->rx_rings) 2402 return; 2403 2404 for (i = 0; i < vsi->num_queue_pairs; i++) 2405 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2406 i40e_free_rx_resources(vsi->rx_rings[i]); 2407 #ifdef I40E_FCOE 2408 i40e_fcoe_free_ddp_resources(vsi); 2409 #endif 2410 } 2411 2412 /** 2413 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2414 * @ring: The Tx ring to configure 2415 * 2416 * This enables/disables XPS for a given Tx descriptor ring 2417 * based on the TCs enabled for the VSI that ring belongs to. 2418 **/ 2419 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2420 { 2421 struct i40e_vsi *vsi = ring->vsi; 2422 cpumask_var_t mask; 2423 2424 if (!ring->q_vector || !ring->netdev) 2425 return; 2426 2427 /* Single TC mode enable XPS */ 2428 if (vsi->tc_config.numtc <= 1) { 2429 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) 2430 netif_set_xps_queue(ring->netdev, 2431 &ring->q_vector->affinity_mask, 2432 ring->queue_index); 2433 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2434 /* Disable XPS to allow selection based on TC */ 2435 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2436 netif_set_xps_queue(ring->netdev, mask, ring->queue_index); 2437 free_cpumask_var(mask); 2438 } 2439 } 2440 2441 /** 2442 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2443 * @ring: The Tx ring to configure 2444 * 2445 * Configure the Tx descriptor ring in the HMC context. 2446 **/ 2447 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2448 { 2449 struct i40e_vsi *vsi = ring->vsi; 2450 u16 pf_q = vsi->base_queue + ring->queue_index; 2451 struct i40e_hw *hw = &vsi->back->hw; 2452 struct i40e_hmc_obj_txq tx_ctx; 2453 i40e_status err = 0; 2454 u32 qtx_ctl = 0; 2455 2456 /* some ATR related tx ring init */ 2457 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 2458 ring->atr_sample_rate = vsi->back->atr_sample_rate; 2459 ring->atr_count = 0; 2460 } else { 2461 ring->atr_sample_rate = 0; 2462 } 2463 2464 /* configure XPS */ 2465 i40e_config_xps_tx_ring(ring); 2466 2467 /* clear the context structure first */ 2468 memset(&tx_ctx, 0, sizeof(tx_ctx)); 2469 2470 tx_ctx.new_context = 1; 2471 tx_ctx.base = (ring->dma / 128); 2472 tx_ctx.qlen = ring->count; 2473 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 2474 I40E_FLAG_FD_ATR_ENABLED)); 2475 #ifdef I40E_FCOE 2476 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2477 #endif 2478 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 2479 /* FDIR VSI tx ring can still use RS bit and writebacks */ 2480 if (vsi->type != I40E_VSI_FDIR) 2481 tx_ctx.head_wb_ena = 1; 2482 tx_ctx.head_wb_addr = ring->dma + 2483 (ring->count * sizeof(struct i40e_tx_desc)); 2484 2485 /* As part of VSI creation/update, FW allocates certain 2486 * Tx arbitration queue sets for each TC enabled for 2487 * the VSI. The FW returns the handles to these queue 2488 * sets as part of the response buffer to Add VSI, 2489 * Update VSI, etc. AQ commands. It is expected that 2490 * these queue set handles be associated with the Tx 2491 * queues by the driver as part of the TX queue context 2492 * initialization. This has to be done regardless of 2493 * DCB as by default everything is mapped to TC0. 2494 */ 2495 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 2496 tx_ctx.rdylist_act = 0; 2497 2498 /* clear the context in the HMC */ 2499 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 2500 if (err) { 2501 dev_info(&vsi->back->pdev->dev, 2502 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 2503 ring->queue_index, pf_q, err); 2504 return -ENOMEM; 2505 } 2506 2507 /* set the context in the HMC */ 2508 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 2509 if (err) { 2510 dev_info(&vsi->back->pdev->dev, 2511 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 2512 ring->queue_index, pf_q, err); 2513 return -ENOMEM; 2514 } 2515 2516 /* Now associate this queue with this PCI function */ 2517 if (vsi->type == I40E_VSI_VMDQ2) { 2518 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 2519 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 2520 I40E_QTX_CTL_VFVM_INDX_MASK; 2521 } else { 2522 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 2523 } 2524 2525 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 2526 I40E_QTX_CTL_PF_INDX_MASK); 2527 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 2528 i40e_flush(hw); 2529 2530 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 2531 2532 /* cache tail off for easier writes later */ 2533 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 2534 2535 return 0; 2536 } 2537 2538 /** 2539 * i40e_configure_rx_ring - Configure a receive ring context 2540 * @ring: The Rx ring to configure 2541 * 2542 * Configure the Rx descriptor ring in the HMC context. 2543 **/ 2544 static int i40e_configure_rx_ring(struct i40e_ring *ring) 2545 { 2546 struct i40e_vsi *vsi = ring->vsi; 2547 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 2548 u16 pf_q = vsi->base_queue + ring->queue_index; 2549 struct i40e_hw *hw = &vsi->back->hw; 2550 struct i40e_hmc_obj_rxq rx_ctx; 2551 i40e_status err = 0; 2552 2553 ring->state = 0; 2554 2555 /* clear the context structure first */ 2556 memset(&rx_ctx, 0, sizeof(rx_ctx)); 2557 2558 ring->rx_buf_len = vsi->rx_buf_len; 2559 ring->rx_hdr_len = vsi->rx_hdr_len; 2560 2561 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 2562 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; 2563 2564 rx_ctx.base = (ring->dma / 128); 2565 rx_ctx.qlen = ring->count; 2566 2567 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { 2568 set_ring_16byte_desc_enabled(ring); 2569 rx_ctx.dsize = 0; 2570 } else { 2571 rx_ctx.dsize = 1; 2572 } 2573 2574 rx_ctx.dtype = vsi->dtype; 2575 if (vsi->dtype) { 2576 set_ring_ps_enabled(ring); 2577 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | 2578 I40E_RX_SPLIT_IP | 2579 I40E_RX_SPLIT_TCP_UDP | 2580 I40E_RX_SPLIT_SCTP; 2581 } else { 2582 rx_ctx.hsplit_0 = 0; 2583 } 2584 2585 rx_ctx.rxmax = min_t(u16, vsi->max_frame, 2586 (chain_len * ring->rx_buf_len)); 2587 if (hw->revision_id == 0) 2588 rx_ctx.lrxqthresh = 0; 2589 else 2590 rx_ctx.lrxqthresh = 2; 2591 rx_ctx.crcstrip = 1; 2592 rx_ctx.l2tsel = 1; 2593 rx_ctx.showiv = 1; 2594 #ifdef I40E_FCOE 2595 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2596 #endif 2597 /* set the prefena field to 1 because the manual says to */ 2598 rx_ctx.prefena = 1; 2599 2600 /* clear the context in the HMC */ 2601 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2602 if (err) { 2603 dev_info(&vsi->back->pdev->dev, 2604 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2605 ring->queue_index, pf_q, err); 2606 return -ENOMEM; 2607 } 2608 2609 /* set the context in the HMC */ 2610 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 2611 if (err) { 2612 dev_info(&vsi->back->pdev->dev, 2613 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2614 ring->queue_index, pf_q, err); 2615 return -ENOMEM; 2616 } 2617 2618 /* cache tail for quicker writes, and clear the reg before use */ 2619 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 2620 writel(0, ring->tail); 2621 2622 if (ring_is_ps_enabled(ring)) { 2623 i40e_alloc_rx_headers(ring); 2624 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring)); 2625 } else { 2626 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring)); 2627 } 2628 2629 return 0; 2630 } 2631 2632 /** 2633 * i40e_vsi_configure_tx - Configure the VSI for Tx 2634 * @vsi: VSI structure describing this set of rings and resources 2635 * 2636 * Configure the Tx VSI for operation. 2637 **/ 2638 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 2639 { 2640 int err = 0; 2641 u16 i; 2642 2643 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 2644 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 2645 2646 return err; 2647 } 2648 2649 /** 2650 * i40e_vsi_configure_rx - Configure the VSI for Rx 2651 * @vsi: the VSI being configured 2652 * 2653 * Configure the Rx VSI for operation. 2654 **/ 2655 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 2656 { 2657 int err = 0; 2658 u16 i; 2659 2660 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 2661 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 2662 + ETH_FCS_LEN + VLAN_HLEN; 2663 else 2664 vsi->max_frame = I40E_RXBUFFER_2048; 2665 2666 /* figure out correct receive buffer length */ 2667 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | 2668 I40E_FLAG_RX_PS_ENABLED)) { 2669 case I40E_FLAG_RX_1BUF_ENABLED: 2670 vsi->rx_hdr_len = 0; 2671 vsi->rx_buf_len = vsi->max_frame; 2672 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2673 break; 2674 case I40E_FLAG_RX_PS_ENABLED: 2675 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2676 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2677 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; 2678 break; 2679 default: 2680 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2681 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2682 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; 2683 break; 2684 } 2685 2686 #ifdef I40E_FCOE 2687 /* setup rx buffer for FCoE */ 2688 if ((vsi->type == I40E_VSI_FCOE) && 2689 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 2690 vsi->rx_hdr_len = 0; 2691 vsi->rx_buf_len = I40E_RXBUFFER_3072; 2692 vsi->max_frame = I40E_RXBUFFER_3072; 2693 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2694 } 2695 2696 #endif /* I40E_FCOE */ 2697 /* round up for the chip's needs */ 2698 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, 2699 (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); 2700 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 2701 (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); 2702 2703 /* set up individual rings */ 2704 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2705 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 2706 2707 return err; 2708 } 2709 2710 /** 2711 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 2712 * @vsi: ptr to the VSI 2713 **/ 2714 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2715 { 2716 struct i40e_ring *tx_ring, *rx_ring; 2717 u16 qoffset, qcount; 2718 int i, n; 2719 2720 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 2721 /* Reset the TC information */ 2722 for (i = 0; i < vsi->num_queue_pairs; i++) { 2723 rx_ring = vsi->rx_rings[i]; 2724 tx_ring = vsi->tx_rings[i]; 2725 rx_ring->dcb_tc = 0; 2726 tx_ring->dcb_tc = 0; 2727 } 2728 } 2729 2730 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2731 if (!(vsi->tc_config.enabled_tc & (1 << n))) 2732 continue; 2733 2734 qoffset = vsi->tc_config.tc_info[n].qoffset; 2735 qcount = vsi->tc_config.tc_info[n].qcount; 2736 for (i = qoffset; i < (qoffset + qcount); i++) { 2737 rx_ring = vsi->rx_rings[i]; 2738 tx_ring = vsi->tx_rings[i]; 2739 rx_ring->dcb_tc = n; 2740 tx_ring->dcb_tc = n; 2741 } 2742 } 2743 } 2744 2745 /** 2746 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 2747 * @vsi: ptr to the VSI 2748 **/ 2749 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 2750 { 2751 if (vsi->netdev) 2752 i40e_set_rx_mode(vsi->netdev); 2753 } 2754 2755 /** 2756 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 2757 * @vsi: Pointer to the targeted VSI 2758 * 2759 * This function replays the hlist on the hw where all the SB Flow Director 2760 * filters were saved. 2761 **/ 2762 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 2763 { 2764 struct i40e_fdir_filter *filter; 2765 struct i40e_pf *pf = vsi->back; 2766 struct hlist_node *node; 2767 2768 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 2769 return; 2770 2771 hlist_for_each_entry_safe(filter, node, 2772 &pf->fdir_filter_list, fdir_node) { 2773 i40e_add_del_fdir(vsi, filter, true); 2774 } 2775 } 2776 2777 /** 2778 * i40e_vsi_configure - Set up the VSI for action 2779 * @vsi: the VSI being configured 2780 **/ 2781 static int i40e_vsi_configure(struct i40e_vsi *vsi) 2782 { 2783 int err; 2784 2785 i40e_set_vsi_rx_mode(vsi); 2786 i40e_restore_vlan(vsi); 2787 i40e_vsi_config_dcb_rings(vsi); 2788 err = i40e_vsi_configure_tx(vsi); 2789 if (!err) 2790 err = i40e_vsi_configure_rx(vsi); 2791 2792 return err; 2793 } 2794 2795 /** 2796 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 2797 * @vsi: the VSI being configured 2798 **/ 2799 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 2800 { 2801 struct i40e_pf *pf = vsi->back; 2802 struct i40e_q_vector *q_vector; 2803 struct i40e_hw *hw = &pf->hw; 2804 u16 vector; 2805 int i, q; 2806 u32 val; 2807 u32 qp; 2808 2809 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 2810 * and PFINT_LNKLSTn registers, e.g.: 2811 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 2812 */ 2813 qp = vsi->base_queue; 2814 vector = vsi->base_vector; 2815 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 2816 q_vector = vsi->q_vectors[i]; 2817 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2818 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2819 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 2820 q_vector->rx.itr); 2821 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2822 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2823 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 2824 q_vector->tx.itr); 2825 2826 /* Linked list for the queuepairs assigned to this vector */ 2827 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 2828 for (q = 0; q < q_vector->num_ringpairs; q++) { 2829 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2830 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2831 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 2832 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 2833 (I40E_QUEUE_TYPE_TX 2834 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 2835 2836 wr32(hw, I40E_QINT_RQCTL(qp), val); 2837 2838 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2839 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2840 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 2841 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 2842 (I40E_QUEUE_TYPE_RX 2843 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2844 2845 /* Terminate the linked list */ 2846 if (q == (q_vector->num_ringpairs - 1)) 2847 val |= (I40E_QUEUE_END_OF_LIST 2848 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2849 2850 wr32(hw, I40E_QINT_TQCTL(qp), val); 2851 qp++; 2852 } 2853 } 2854 2855 i40e_flush(hw); 2856 } 2857 2858 /** 2859 * i40e_enable_misc_int_causes - enable the non-queue interrupts 2860 * @hw: ptr to the hardware info 2861 **/ 2862 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 2863 { 2864 struct i40e_hw *hw = &pf->hw; 2865 u32 val; 2866 2867 /* clear things first */ 2868 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 2869 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 2870 2871 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 2872 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 2873 I40E_PFINT_ICR0_ENA_GRST_MASK | 2874 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 2875 I40E_PFINT_ICR0_ENA_GPIO_MASK | 2876 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 2877 I40E_PFINT_ICR0_ENA_VFLR_MASK | 2878 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 2879 2880 if (pf->flags & I40E_FLAG_PTP) 2881 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 2882 2883 wr32(hw, I40E_PFINT_ICR0_ENA, val); 2884 2885 /* SW_ITR_IDX = 0, but don't change INTENA */ 2886 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 2887 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 2888 2889 /* OTHER_ITR_IDX = 0 */ 2890 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 2891 } 2892 2893 /** 2894 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 2895 * @vsi: the VSI being configured 2896 **/ 2897 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 2898 { 2899 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 2900 struct i40e_pf *pf = vsi->back; 2901 struct i40e_hw *hw = &pf->hw; 2902 u32 val; 2903 2904 /* set the ITR configuration */ 2905 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2906 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2907 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 2908 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2909 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2910 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 2911 2912 i40e_enable_misc_int_causes(pf); 2913 2914 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 2915 wr32(hw, I40E_PFINT_LNKLST0, 0); 2916 2917 /* Associate the queue pair to the vector and enable the queue int */ 2918 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2919 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2920 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2921 2922 wr32(hw, I40E_QINT_RQCTL(0), val); 2923 2924 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2925 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2926 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2927 2928 wr32(hw, I40E_QINT_TQCTL(0), val); 2929 i40e_flush(hw); 2930 } 2931 2932 /** 2933 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 2934 * @pf: board private structure 2935 **/ 2936 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 2937 { 2938 struct i40e_hw *hw = &pf->hw; 2939 2940 wr32(hw, I40E_PFINT_DYN_CTL0, 2941 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2942 i40e_flush(hw); 2943 } 2944 2945 /** 2946 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 2947 * @pf: board private structure 2948 **/ 2949 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 2950 { 2951 struct i40e_hw *hw = &pf->hw; 2952 u32 val; 2953 2954 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 2955 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 2956 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 2957 2958 wr32(hw, I40E_PFINT_DYN_CTL0, val); 2959 i40e_flush(hw); 2960 } 2961 2962 /** 2963 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 2964 * @vsi: pointer to a vsi 2965 * @vector: enable a particular Hw Interrupt vector 2966 **/ 2967 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 2968 { 2969 struct i40e_pf *pf = vsi->back; 2970 struct i40e_hw *hw = &pf->hw; 2971 u32 val; 2972 2973 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 2974 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 2975 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2976 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2977 /* skip the flush */ 2978 } 2979 2980 /** 2981 * i40e_irq_dynamic_disable - Disable default interrupt generation settings 2982 * @vsi: pointer to a vsi 2983 * @vector: disable a particular Hw Interrupt vector 2984 **/ 2985 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector) 2986 { 2987 struct i40e_pf *pf = vsi->back; 2988 struct i40e_hw *hw = &pf->hw; 2989 u32 val; 2990 2991 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT; 2992 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2993 i40e_flush(hw); 2994 } 2995 2996 /** 2997 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 2998 * @irq: interrupt number 2999 * @data: pointer to a q_vector 3000 **/ 3001 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3002 { 3003 struct i40e_q_vector *q_vector = data; 3004 3005 if (!q_vector->tx.ring && !q_vector->rx.ring) 3006 return IRQ_HANDLED; 3007 3008 napi_schedule(&q_vector->napi); 3009 3010 return IRQ_HANDLED; 3011 } 3012 3013 /** 3014 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3015 * @vsi: the VSI being configured 3016 * @basename: name for the vector 3017 * 3018 * Allocates MSI-X vectors and requests interrupts from the kernel. 3019 **/ 3020 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3021 { 3022 int q_vectors = vsi->num_q_vectors; 3023 struct i40e_pf *pf = vsi->back; 3024 int base = vsi->base_vector; 3025 int rx_int_idx = 0; 3026 int tx_int_idx = 0; 3027 int vector, err; 3028 3029 for (vector = 0; vector < q_vectors; vector++) { 3030 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3031 3032 if (q_vector->tx.ring && q_vector->rx.ring) { 3033 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3034 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3035 tx_int_idx++; 3036 } else if (q_vector->rx.ring) { 3037 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3038 "%s-%s-%d", basename, "rx", rx_int_idx++); 3039 } else if (q_vector->tx.ring) { 3040 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3041 "%s-%s-%d", basename, "tx", tx_int_idx++); 3042 } else { 3043 /* skip this unused q_vector */ 3044 continue; 3045 } 3046 err = request_irq(pf->msix_entries[base + vector].vector, 3047 vsi->irq_handler, 3048 0, 3049 q_vector->name, 3050 q_vector); 3051 if (err) { 3052 dev_info(&pf->pdev->dev, 3053 "%s: request_irq failed, error: %d\n", 3054 __func__, err); 3055 goto free_queue_irqs; 3056 } 3057 /* assign the mask for this irq */ 3058 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3059 &q_vector->affinity_mask); 3060 } 3061 3062 vsi->irqs_ready = true; 3063 return 0; 3064 3065 free_queue_irqs: 3066 while (vector) { 3067 vector--; 3068 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3069 NULL); 3070 free_irq(pf->msix_entries[base + vector].vector, 3071 &(vsi->q_vectors[vector])); 3072 } 3073 return err; 3074 } 3075 3076 /** 3077 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3078 * @vsi: the VSI being un-configured 3079 **/ 3080 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3081 { 3082 struct i40e_pf *pf = vsi->back; 3083 struct i40e_hw *hw = &pf->hw; 3084 int base = vsi->base_vector; 3085 int i; 3086 3087 for (i = 0; i < vsi->num_queue_pairs; i++) { 3088 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3089 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3090 } 3091 3092 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3093 for (i = vsi->base_vector; 3094 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3095 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3096 3097 i40e_flush(hw); 3098 for (i = 0; i < vsi->num_q_vectors; i++) 3099 synchronize_irq(pf->msix_entries[i + base].vector); 3100 } else { 3101 /* Legacy and MSI mode - this stops all interrupt handling */ 3102 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3103 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3104 i40e_flush(hw); 3105 synchronize_irq(pf->pdev->irq); 3106 } 3107 } 3108 3109 /** 3110 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3111 * @vsi: the VSI being configured 3112 **/ 3113 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3114 { 3115 struct i40e_pf *pf = vsi->back; 3116 int i; 3117 3118 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3119 for (i = vsi->base_vector; 3120 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3121 i40e_irq_dynamic_enable(vsi, i); 3122 } else { 3123 i40e_irq_dynamic_enable_icr0(pf); 3124 } 3125 3126 i40e_flush(&pf->hw); 3127 return 0; 3128 } 3129 3130 /** 3131 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3132 * @pf: board private structure 3133 **/ 3134 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3135 { 3136 /* Disable ICR 0 */ 3137 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3138 i40e_flush(&pf->hw); 3139 } 3140 3141 /** 3142 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3143 * @irq: interrupt number 3144 * @data: pointer to a q_vector 3145 * 3146 * This is the handler used for all MSI/Legacy interrupts, and deals 3147 * with both queue and non-queue interrupts. This is also used in 3148 * MSIX mode to handle the non-queue interrupts. 3149 **/ 3150 static irqreturn_t i40e_intr(int irq, void *data) 3151 { 3152 struct i40e_pf *pf = (struct i40e_pf *)data; 3153 struct i40e_hw *hw = &pf->hw; 3154 irqreturn_t ret = IRQ_NONE; 3155 u32 icr0, icr0_remaining; 3156 u32 val, ena_mask; 3157 3158 icr0 = rd32(hw, I40E_PFINT_ICR0); 3159 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3160 3161 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3162 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3163 goto enable_intr; 3164 3165 /* if interrupt but no bits showing, must be SWINT */ 3166 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3167 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3168 pf->sw_int_count++; 3169 3170 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3171 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3172 3173 /* temporarily disable queue cause for NAPI processing */ 3174 u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); 3175 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3176 wr32(hw, I40E_QINT_RQCTL(0), qval); 3177 3178 qval = rd32(hw, I40E_QINT_TQCTL(0)); 3179 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3180 wr32(hw, I40E_QINT_TQCTL(0), qval); 3181 3182 if (!test_bit(__I40E_DOWN, &pf->state)) 3183 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); 3184 } 3185 3186 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3187 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3188 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3189 } 3190 3191 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3192 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3193 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3194 } 3195 3196 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3197 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3198 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3199 } 3200 3201 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3202 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3203 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3204 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3205 val = rd32(hw, I40E_GLGEN_RSTAT); 3206 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3207 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3208 if (val == I40E_RESET_CORER) { 3209 pf->corer_count++; 3210 } else if (val == I40E_RESET_GLOBR) { 3211 pf->globr_count++; 3212 } else if (val == I40E_RESET_EMPR) { 3213 pf->empr_count++; 3214 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); 3215 } 3216 } 3217 3218 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3219 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3220 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3221 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3222 rd32(hw, I40E_PFHMC_ERRORINFO), 3223 rd32(hw, I40E_PFHMC_ERRORDATA)); 3224 } 3225 3226 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3227 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3228 3229 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3230 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3231 i40e_ptp_tx_hwtstamp(pf); 3232 } 3233 } 3234 3235 /* If a critical error is pending we have no choice but to reset the 3236 * device. 3237 * Report and mask out any remaining unexpected interrupts. 3238 */ 3239 icr0_remaining = icr0 & ena_mask; 3240 if (icr0_remaining) { 3241 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3242 icr0_remaining); 3243 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3244 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3245 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3246 dev_info(&pf->pdev->dev, "device will be reset\n"); 3247 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3248 i40e_service_event_schedule(pf); 3249 } 3250 ena_mask &= ~icr0_remaining; 3251 } 3252 ret = IRQ_HANDLED; 3253 3254 enable_intr: 3255 /* re-enable interrupt causes */ 3256 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3257 if (!test_bit(__I40E_DOWN, &pf->state)) { 3258 i40e_service_event_schedule(pf); 3259 i40e_irq_dynamic_enable_icr0(pf); 3260 } 3261 3262 return ret; 3263 } 3264 3265 /** 3266 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3267 * @tx_ring: tx ring to clean 3268 * @budget: how many cleans we're allowed 3269 * 3270 * Returns true if there's any budget left (e.g. the clean is finished) 3271 **/ 3272 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3273 { 3274 struct i40e_vsi *vsi = tx_ring->vsi; 3275 u16 i = tx_ring->next_to_clean; 3276 struct i40e_tx_buffer *tx_buf; 3277 struct i40e_tx_desc *tx_desc; 3278 3279 tx_buf = &tx_ring->tx_bi[i]; 3280 tx_desc = I40E_TX_DESC(tx_ring, i); 3281 i -= tx_ring->count; 3282 3283 do { 3284 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3285 3286 /* if next_to_watch is not set then there is no work pending */ 3287 if (!eop_desc) 3288 break; 3289 3290 /* prevent any other reads prior to eop_desc */ 3291 read_barrier_depends(); 3292 3293 /* if the descriptor isn't done, no work yet to do */ 3294 if (!(eop_desc->cmd_type_offset_bsz & 3295 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3296 break; 3297 3298 /* clear next_to_watch to prevent false hangs */ 3299 tx_buf->next_to_watch = NULL; 3300 3301 tx_desc->buffer_addr = 0; 3302 tx_desc->cmd_type_offset_bsz = 0; 3303 /* move past filter desc */ 3304 tx_buf++; 3305 tx_desc++; 3306 i++; 3307 if (unlikely(!i)) { 3308 i -= tx_ring->count; 3309 tx_buf = tx_ring->tx_bi; 3310 tx_desc = I40E_TX_DESC(tx_ring, 0); 3311 } 3312 /* unmap skb header data */ 3313 dma_unmap_single(tx_ring->dev, 3314 dma_unmap_addr(tx_buf, dma), 3315 dma_unmap_len(tx_buf, len), 3316 DMA_TO_DEVICE); 3317 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3318 kfree(tx_buf->raw_buf); 3319 3320 tx_buf->raw_buf = NULL; 3321 tx_buf->tx_flags = 0; 3322 tx_buf->next_to_watch = NULL; 3323 dma_unmap_len_set(tx_buf, len, 0); 3324 tx_desc->buffer_addr = 0; 3325 tx_desc->cmd_type_offset_bsz = 0; 3326 3327 /* move us past the eop_desc for start of next FD desc */ 3328 tx_buf++; 3329 tx_desc++; 3330 i++; 3331 if (unlikely(!i)) { 3332 i -= tx_ring->count; 3333 tx_buf = tx_ring->tx_bi; 3334 tx_desc = I40E_TX_DESC(tx_ring, 0); 3335 } 3336 3337 /* update budget accounting */ 3338 budget--; 3339 } while (likely(budget)); 3340 3341 i += tx_ring->count; 3342 tx_ring->next_to_clean = i; 3343 3344 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { 3345 i40e_irq_dynamic_enable(vsi, 3346 tx_ring->q_vector->v_idx + vsi->base_vector); 3347 } 3348 return budget > 0; 3349 } 3350 3351 /** 3352 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3353 * @irq: interrupt number 3354 * @data: pointer to a q_vector 3355 **/ 3356 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3357 { 3358 struct i40e_q_vector *q_vector = data; 3359 struct i40e_vsi *vsi; 3360 3361 if (!q_vector->tx.ring) 3362 return IRQ_HANDLED; 3363 3364 vsi = q_vector->tx.ring->vsi; 3365 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3366 3367 return IRQ_HANDLED; 3368 } 3369 3370 /** 3371 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3372 * @vsi: the VSI being configured 3373 * @v_idx: vector index 3374 * @qp_idx: queue pair index 3375 **/ 3376 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3377 { 3378 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3379 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3380 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3381 3382 tx_ring->q_vector = q_vector; 3383 tx_ring->next = q_vector->tx.ring; 3384 q_vector->tx.ring = tx_ring; 3385 q_vector->tx.count++; 3386 3387 rx_ring->q_vector = q_vector; 3388 rx_ring->next = q_vector->rx.ring; 3389 q_vector->rx.ring = rx_ring; 3390 q_vector->rx.count++; 3391 } 3392 3393 /** 3394 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3395 * @vsi: the VSI being configured 3396 * 3397 * This function maps descriptor rings to the queue-specific vectors 3398 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3399 * one vector per queue pair, but on a constrained vector budget, we 3400 * group the queue pairs as "efficiently" as possible. 3401 **/ 3402 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3403 { 3404 int qp_remaining = vsi->num_queue_pairs; 3405 int q_vectors = vsi->num_q_vectors; 3406 int num_ringpairs; 3407 int v_start = 0; 3408 int qp_idx = 0; 3409 3410 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3411 * group them so there are multiple queues per vector. 3412 * It is also important to go through all the vectors available to be 3413 * sure that if we don't use all the vectors, that the remaining vectors 3414 * are cleared. This is especially important when decreasing the 3415 * number of queues in use. 3416 */ 3417 for (; v_start < q_vectors; v_start++) { 3418 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3419 3420 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3421 3422 q_vector->num_ringpairs = num_ringpairs; 3423 3424 q_vector->rx.count = 0; 3425 q_vector->tx.count = 0; 3426 q_vector->rx.ring = NULL; 3427 q_vector->tx.ring = NULL; 3428 3429 while (num_ringpairs--) { 3430 map_vector_to_qp(vsi, v_start, qp_idx); 3431 qp_idx++; 3432 qp_remaining--; 3433 } 3434 } 3435 } 3436 3437 /** 3438 * i40e_vsi_request_irq - Request IRQ from the OS 3439 * @vsi: the VSI being configured 3440 * @basename: name for the vector 3441 **/ 3442 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3443 { 3444 struct i40e_pf *pf = vsi->back; 3445 int err; 3446 3447 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3448 err = i40e_vsi_request_irq_msix(vsi, basename); 3449 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3450 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3451 pf->int_name, pf); 3452 else 3453 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3454 pf->int_name, pf); 3455 3456 if (err) 3457 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3458 3459 return err; 3460 } 3461 3462 #ifdef CONFIG_NET_POLL_CONTROLLER 3463 /** 3464 * i40e_netpoll - A Polling 'interrupt'handler 3465 * @netdev: network interface device structure 3466 * 3467 * This is used by netconsole to send skbs without having to re-enable 3468 * interrupts. It's not called while the normal interrupt routine is executing. 3469 **/ 3470 #ifdef I40E_FCOE 3471 void i40e_netpoll(struct net_device *netdev) 3472 #else 3473 static void i40e_netpoll(struct net_device *netdev) 3474 #endif 3475 { 3476 struct i40e_netdev_priv *np = netdev_priv(netdev); 3477 struct i40e_vsi *vsi = np->vsi; 3478 struct i40e_pf *pf = vsi->back; 3479 int i; 3480 3481 /* if interface is down do nothing */ 3482 if (test_bit(__I40E_DOWN, &vsi->state)) 3483 return; 3484 3485 pf->flags |= I40E_FLAG_IN_NETPOLL; 3486 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3487 for (i = 0; i < vsi->num_q_vectors; i++) 3488 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 3489 } else { 3490 i40e_intr(pf->pdev->irq, netdev); 3491 } 3492 pf->flags &= ~I40E_FLAG_IN_NETPOLL; 3493 } 3494 #endif 3495 3496 /** 3497 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 3498 * @pf: the PF being configured 3499 * @pf_q: the PF queue 3500 * @enable: enable or disable state of the queue 3501 * 3502 * This routine will wait for the given Tx queue of the PF to reach the 3503 * enabled or disabled state. 3504 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3505 * multiple retries; else will return 0 in case of success. 3506 **/ 3507 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3508 { 3509 int i; 3510 u32 tx_reg; 3511 3512 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3513 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 3514 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3515 break; 3516 3517 usleep_range(10, 20); 3518 } 3519 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3520 return -ETIMEDOUT; 3521 3522 return 0; 3523 } 3524 3525 /** 3526 * i40e_vsi_control_tx - Start or stop a VSI's rings 3527 * @vsi: the VSI being configured 3528 * @enable: start or stop the rings 3529 **/ 3530 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 3531 { 3532 struct i40e_pf *pf = vsi->back; 3533 struct i40e_hw *hw = &pf->hw; 3534 int i, j, pf_q, ret = 0; 3535 u32 tx_reg; 3536 3537 pf_q = vsi->base_queue; 3538 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3539 3540 /* warn the TX unit of coming changes */ 3541 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 3542 if (!enable) 3543 usleep_range(10, 20); 3544 3545 for (j = 0; j < 50; j++) { 3546 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3547 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3548 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 3549 break; 3550 usleep_range(1000, 2000); 3551 } 3552 /* Skip if the queue is already in the requested state */ 3553 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3554 continue; 3555 3556 /* turn on/off the queue */ 3557 if (enable) { 3558 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 3559 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3560 } else { 3561 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 3562 } 3563 3564 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 3565 /* No waiting for the Tx queue to disable */ 3566 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3567 continue; 3568 3569 /* wait for the change to finish */ 3570 ret = i40e_pf_txq_wait(pf, pf_q, enable); 3571 if (ret) { 3572 dev_info(&pf->pdev->dev, 3573 "%s: VSI seid %d Tx ring %d %sable timeout\n", 3574 __func__, vsi->seid, pf_q, 3575 (enable ? "en" : "dis")); 3576 break; 3577 } 3578 } 3579 3580 if (hw->revision_id == 0) 3581 mdelay(50); 3582 return ret; 3583 } 3584 3585 /** 3586 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 3587 * @pf: the PF being configured 3588 * @pf_q: the PF queue 3589 * @enable: enable or disable state of the queue 3590 * 3591 * This routine will wait for the given Rx queue of the PF to reach the 3592 * enabled or disabled state. 3593 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3594 * multiple retries; else will return 0 in case of success. 3595 **/ 3596 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3597 { 3598 int i; 3599 u32 rx_reg; 3600 3601 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3602 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 3603 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3604 break; 3605 3606 usleep_range(10, 20); 3607 } 3608 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3609 return -ETIMEDOUT; 3610 3611 return 0; 3612 } 3613 3614 /** 3615 * i40e_vsi_control_rx - Start or stop a VSI's rings 3616 * @vsi: the VSI being configured 3617 * @enable: start or stop the rings 3618 **/ 3619 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 3620 { 3621 struct i40e_pf *pf = vsi->back; 3622 struct i40e_hw *hw = &pf->hw; 3623 int i, j, pf_q, ret = 0; 3624 u32 rx_reg; 3625 3626 pf_q = vsi->base_queue; 3627 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3628 for (j = 0; j < 50; j++) { 3629 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3630 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 3631 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 3632 break; 3633 usleep_range(1000, 2000); 3634 } 3635 3636 /* Skip if the queue is already in the requested state */ 3637 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3638 continue; 3639 3640 /* turn on/off the queue */ 3641 if (enable) 3642 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 3643 else 3644 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 3645 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 3646 3647 /* wait for the change to finish */ 3648 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 3649 if (ret) { 3650 dev_info(&pf->pdev->dev, 3651 "%s: VSI seid %d Rx ring %d %sable timeout\n", 3652 __func__, vsi->seid, pf_q, 3653 (enable ? "en" : "dis")); 3654 break; 3655 } 3656 } 3657 3658 return ret; 3659 } 3660 3661 /** 3662 * i40e_vsi_control_rings - Start or stop a VSI's rings 3663 * @vsi: the VSI being configured 3664 * @enable: start or stop the rings 3665 **/ 3666 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) 3667 { 3668 int ret = 0; 3669 3670 /* do rx first for enable and last for disable */ 3671 if (request) { 3672 ret = i40e_vsi_control_rx(vsi, request); 3673 if (ret) 3674 return ret; 3675 ret = i40e_vsi_control_tx(vsi, request); 3676 } else { 3677 /* Ignore return value, we need to shutdown whatever we can */ 3678 i40e_vsi_control_tx(vsi, request); 3679 i40e_vsi_control_rx(vsi, request); 3680 } 3681 3682 return ret; 3683 } 3684 3685 /** 3686 * i40e_vsi_free_irq - Free the irq association with the OS 3687 * @vsi: the VSI being configured 3688 **/ 3689 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 3690 { 3691 struct i40e_pf *pf = vsi->back; 3692 struct i40e_hw *hw = &pf->hw; 3693 int base = vsi->base_vector; 3694 u32 val, qp; 3695 int i; 3696 3697 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3698 if (!vsi->q_vectors) 3699 return; 3700 3701 if (!vsi->irqs_ready) 3702 return; 3703 3704 vsi->irqs_ready = false; 3705 for (i = 0; i < vsi->num_q_vectors; i++) { 3706 u16 vector = i + base; 3707 3708 /* free only the irqs that were actually requested */ 3709 if (!vsi->q_vectors[i] || 3710 !vsi->q_vectors[i]->num_ringpairs) 3711 continue; 3712 3713 /* clear the affinity_mask in the IRQ descriptor */ 3714 irq_set_affinity_hint(pf->msix_entries[vector].vector, 3715 NULL); 3716 free_irq(pf->msix_entries[vector].vector, 3717 vsi->q_vectors[i]); 3718 3719 /* Tear down the interrupt queue link list 3720 * 3721 * We know that they come in pairs and always 3722 * the Rx first, then the Tx. To clear the 3723 * link list, stick the EOL value into the 3724 * next_q field of the registers. 3725 */ 3726 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 3727 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3728 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3729 val |= I40E_QUEUE_END_OF_LIST 3730 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3731 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 3732 3733 while (qp != I40E_QUEUE_END_OF_LIST) { 3734 u32 next; 3735 3736 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3737 3738 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3739 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3740 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3741 I40E_QINT_RQCTL_INTEVENT_MASK); 3742 3743 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3744 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3745 3746 wr32(hw, I40E_QINT_RQCTL(qp), val); 3747 3748 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3749 3750 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 3751 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 3752 3753 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3754 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3755 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3756 I40E_QINT_TQCTL_INTEVENT_MASK); 3757 3758 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3759 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3760 3761 wr32(hw, I40E_QINT_TQCTL(qp), val); 3762 qp = next; 3763 } 3764 } 3765 } else { 3766 free_irq(pf->pdev->irq, pf); 3767 3768 val = rd32(hw, I40E_PFINT_LNKLST0); 3769 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3770 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3771 val |= I40E_QUEUE_END_OF_LIST 3772 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 3773 wr32(hw, I40E_PFINT_LNKLST0, val); 3774 3775 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3776 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3777 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3778 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3779 I40E_QINT_RQCTL_INTEVENT_MASK); 3780 3781 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3782 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3783 3784 wr32(hw, I40E_QINT_RQCTL(qp), val); 3785 3786 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3787 3788 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3789 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3790 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3791 I40E_QINT_TQCTL_INTEVENT_MASK); 3792 3793 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3794 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3795 3796 wr32(hw, I40E_QINT_TQCTL(qp), val); 3797 } 3798 } 3799 3800 /** 3801 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 3802 * @vsi: the VSI being configured 3803 * @v_idx: Index of vector to be freed 3804 * 3805 * This function frees the memory allocated to the q_vector. In addition if 3806 * NAPI is enabled it will delete any references to the NAPI struct prior 3807 * to freeing the q_vector. 3808 **/ 3809 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 3810 { 3811 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3812 struct i40e_ring *ring; 3813 3814 if (!q_vector) 3815 return; 3816 3817 /* disassociate q_vector from rings */ 3818 i40e_for_each_ring(ring, q_vector->tx) 3819 ring->q_vector = NULL; 3820 3821 i40e_for_each_ring(ring, q_vector->rx) 3822 ring->q_vector = NULL; 3823 3824 /* only VSI w/ an associated netdev is set up w/ NAPI */ 3825 if (vsi->netdev) 3826 netif_napi_del(&q_vector->napi); 3827 3828 vsi->q_vectors[v_idx] = NULL; 3829 3830 kfree_rcu(q_vector, rcu); 3831 } 3832 3833 /** 3834 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 3835 * @vsi: the VSI being un-configured 3836 * 3837 * This frees the memory allocated to the q_vectors and 3838 * deletes references to the NAPI struct. 3839 **/ 3840 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 3841 { 3842 int v_idx; 3843 3844 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 3845 i40e_free_q_vector(vsi, v_idx); 3846 } 3847 3848 /** 3849 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 3850 * @pf: board private structure 3851 **/ 3852 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 3853 { 3854 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 3855 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3856 pci_disable_msix(pf->pdev); 3857 kfree(pf->msix_entries); 3858 pf->msix_entries = NULL; 3859 kfree(pf->irq_pile); 3860 pf->irq_pile = NULL; 3861 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 3862 pci_disable_msi(pf->pdev); 3863 } 3864 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 3865 } 3866 3867 /** 3868 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 3869 * @pf: board private structure 3870 * 3871 * We go through and clear interrupt specific resources and reset the structure 3872 * to pre-load conditions 3873 **/ 3874 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 3875 { 3876 int i; 3877 3878 i40e_stop_misc_vector(pf); 3879 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3880 synchronize_irq(pf->msix_entries[0].vector); 3881 free_irq(pf->msix_entries[0].vector, pf); 3882 } 3883 3884 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3885 for (i = 0; i < pf->num_alloc_vsi; i++) 3886 if (pf->vsi[i]) 3887 i40e_vsi_free_q_vectors(pf->vsi[i]); 3888 i40e_reset_interrupt_capability(pf); 3889 } 3890 3891 /** 3892 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 3893 * @vsi: the VSI being configured 3894 **/ 3895 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 3896 { 3897 int q_idx; 3898 3899 if (!vsi->netdev) 3900 return; 3901 3902 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3903 napi_enable(&vsi->q_vectors[q_idx]->napi); 3904 } 3905 3906 /** 3907 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 3908 * @vsi: the VSI being configured 3909 **/ 3910 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 3911 { 3912 int q_idx; 3913 3914 if (!vsi->netdev) 3915 return; 3916 3917 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3918 napi_disable(&vsi->q_vectors[q_idx]->napi); 3919 } 3920 3921 /** 3922 * i40e_vsi_close - Shut down a VSI 3923 * @vsi: the vsi to be quelled 3924 **/ 3925 static void i40e_vsi_close(struct i40e_vsi *vsi) 3926 { 3927 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 3928 i40e_down(vsi); 3929 i40e_vsi_free_irq(vsi); 3930 i40e_vsi_free_tx_resources(vsi); 3931 i40e_vsi_free_rx_resources(vsi); 3932 } 3933 3934 /** 3935 * i40e_quiesce_vsi - Pause a given VSI 3936 * @vsi: the VSI being paused 3937 **/ 3938 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 3939 { 3940 if (test_bit(__I40E_DOWN, &vsi->state)) 3941 return; 3942 3943 /* No need to disable FCoE VSI when Tx suspended */ 3944 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 3945 vsi->type == I40E_VSI_FCOE) { 3946 dev_dbg(&vsi->back->pdev->dev, 3947 "%s: VSI seid %d skipping FCoE VSI disable\n", 3948 __func__, vsi->seid); 3949 return; 3950 } 3951 3952 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 3953 if (vsi->netdev && netif_running(vsi->netdev)) { 3954 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 3955 } else { 3956 i40e_vsi_close(vsi); 3957 } 3958 } 3959 3960 /** 3961 * i40e_unquiesce_vsi - Resume a given VSI 3962 * @vsi: the VSI being resumed 3963 **/ 3964 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 3965 { 3966 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 3967 return; 3968 3969 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 3970 if (vsi->netdev && netif_running(vsi->netdev)) 3971 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 3972 else 3973 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 3974 } 3975 3976 /** 3977 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 3978 * @pf: the PF 3979 **/ 3980 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 3981 { 3982 int v; 3983 3984 for (v = 0; v < pf->num_alloc_vsi; v++) { 3985 if (pf->vsi[v]) 3986 i40e_quiesce_vsi(pf->vsi[v]); 3987 } 3988 } 3989 3990 /** 3991 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 3992 * @pf: the PF 3993 **/ 3994 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 3995 { 3996 int v; 3997 3998 for (v = 0; v < pf->num_alloc_vsi; v++) { 3999 if (pf->vsi[v]) 4000 i40e_unquiesce_vsi(pf->vsi[v]); 4001 } 4002 } 4003 4004 #ifdef CONFIG_I40E_DCB 4005 /** 4006 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled 4007 * @vsi: the VSI being configured 4008 * 4009 * This function waits for the given VSI's Tx queues to be disabled. 4010 **/ 4011 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi) 4012 { 4013 struct i40e_pf *pf = vsi->back; 4014 int i, pf_q, ret; 4015 4016 pf_q = vsi->base_queue; 4017 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4018 /* Check and wait for the disable status of the queue */ 4019 ret = i40e_pf_txq_wait(pf, pf_q, false); 4020 if (ret) { 4021 dev_info(&pf->pdev->dev, 4022 "%s: VSI seid %d Tx ring %d disable timeout\n", 4023 __func__, vsi->seid, pf_q); 4024 return ret; 4025 } 4026 } 4027 4028 return 0; 4029 } 4030 4031 /** 4032 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled 4033 * @pf: the PF 4034 * 4035 * This function waits for the Tx queues to be in disabled state for all the 4036 * VSIs that are managed by this PF. 4037 **/ 4038 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf) 4039 { 4040 int v, ret = 0; 4041 4042 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4043 /* No need to wait for FCoE VSI queues */ 4044 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 4045 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]); 4046 if (ret) 4047 break; 4048 } 4049 } 4050 4051 return ret; 4052 } 4053 4054 #endif 4055 /** 4056 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4057 * @pf: pointer to PF 4058 * 4059 * Get TC map for ISCSI PF type that will include iSCSI TC 4060 * and LAN TC. 4061 **/ 4062 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4063 { 4064 struct i40e_dcb_app_priority_table app; 4065 struct i40e_hw *hw = &pf->hw; 4066 u8 enabled_tc = 1; /* TC0 is always enabled */ 4067 u8 tc, i; 4068 /* Get the iSCSI APP TLV */ 4069 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4070 4071 for (i = 0; i < dcbcfg->numapps; i++) { 4072 app = dcbcfg->app[i]; 4073 if (app.selector == I40E_APP_SEL_TCPIP && 4074 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4075 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4076 enabled_tc |= (1 << tc); 4077 break; 4078 } 4079 } 4080 4081 return enabled_tc; 4082 } 4083 4084 /** 4085 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4086 * @dcbcfg: the corresponding DCBx configuration structure 4087 * 4088 * Return the number of TCs from given DCBx configuration 4089 **/ 4090 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4091 { 4092 u8 num_tc = 0; 4093 int i; 4094 4095 /* Scan the ETS Config Priority Table to find 4096 * traffic class enabled for a given priority 4097 * and use the traffic class index to get the 4098 * number of traffic classes enabled 4099 */ 4100 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4101 if (dcbcfg->etscfg.prioritytable[i] > num_tc) 4102 num_tc = dcbcfg->etscfg.prioritytable[i]; 4103 } 4104 4105 /* Traffic class index starts from zero so 4106 * increment to return the actual count 4107 */ 4108 return num_tc + 1; 4109 } 4110 4111 /** 4112 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4113 * @dcbcfg: the corresponding DCBx configuration structure 4114 * 4115 * Query the current DCB configuration and return the number of 4116 * traffic classes enabled from the given DCBX config 4117 **/ 4118 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4119 { 4120 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4121 u8 enabled_tc = 1; 4122 u8 i; 4123 4124 for (i = 0; i < num_tc; i++) 4125 enabled_tc |= 1 << i; 4126 4127 return enabled_tc; 4128 } 4129 4130 /** 4131 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4132 * @pf: PF being queried 4133 * 4134 * Return number of traffic classes enabled for the given PF 4135 **/ 4136 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4137 { 4138 struct i40e_hw *hw = &pf->hw; 4139 u8 i, enabled_tc; 4140 u8 num_tc = 0; 4141 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4142 4143 /* If DCB is not enabled then always in single TC */ 4144 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4145 return 1; 4146 4147 /* SFP mode will be enabled for all TCs on port */ 4148 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4149 return i40e_dcb_get_num_tc(dcbcfg); 4150 4151 /* MFP mode return count of enabled TCs for this PF */ 4152 if (pf->hw.func_caps.iscsi) 4153 enabled_tc = i40e_get_iscsi_tc_map(pf); 4154 else 4155 return 1; /* Only TC0 */ 4156 4157 /* At least have TC0 */ 4158 enabled_tc = (enabled_tc ? enabled_tc : 0x1); 4159 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4160 if (enabled_tc & (1 << i)) 4161 num_tc++; 4162 } 4163 return num_tc; 4164 } 4165 4166 /** 4167 * i40e_pf_get_default_tc - Get bitmap for first enabled TC 4168 * @pf: PF being queried 4169 * 4170 * Return a bitmap for first enabled traffic class for this PF. 4171 **/ 4172 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) 4173 { 4174 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4175 u8 i = 0; 4176 4177 if (!enabled_tc) 4178 return 0x1; /* TC0 */ 4179 4180 /* Find the first enabled TC */ 4181 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4182 if (enabled_tc & (1 << i)) 4183 break; 4184 } 4185 4186 return 1 << i; 4187 } 4188 4189 /** 4190 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4191 * @pf: PF being queried 4192 * 4193 * Return a bitmap for enabled traffic classes for this PF. 4194 **/ 4195 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4196 { 4197 /* If DCB is not enabled for this PF then just return default TC */ 4198 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4199 return i40e_pf_get_default_tc(pf); 4200 4201 /* SFP mode we want PF to be enabled for all TCs */ 4202 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4203 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4204 4205 /* MFP enabled and iSCSI PF type */ 4206 if (pf->hw.func_caps.iscsi) 4207 return i40e_get_iscsi_tc_map(pf); 4208 else 4209 return i40e_pf_get_default_tc(pf); 4210 } 4211 4212 /** 4213 * i40e_vsi_get_bw_info - Query VSI BW Information 4214 * @vsi: the VSI being queried 4215 * 4216 * Returns 0 on success, negative value on failure 4217 **/ 4218 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4219 { 4220 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4221 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4222 struct i40e_pf *pf = vsi->back; 4223 struct i40e_hw *hw = &pf->hw; 4224 i40e_status aq_ret; 4225 u32 tc_bw_max; 4226 int i; 4227 4228 /* Get the VSI level BW configuration */ 4229 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4230 if (aq_ret) { 4231 dev_info(&pf->pdev->dev, 4232 "couldn't get PF vsi bw config, err %d, aq_err %d\n", 4233 aq_ret, pf->hw.aq.asq_last_status); 4234 return -EINVAL; 4235 } 4236 4237 /* Get the VSI level BW configuration per TC */ 4238 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4239 NULL); 4240 if (aq_ret) { 4241 dev_info(&pf->pdev->dev, 4242 "couldn't get PF vsi ets bw config, err %d, aq_err %d\n", 4243 aq_ret, pf->hw.aq.asq_last_status); 4244 return -EINVAL; 4245 } 4246 4247 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4248 dev_info(&pf->pdev->dev, 4249 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4250 bw_config.tc_valid_bits, 4251 bw_ets_config.tc_valid_bits); 4252 /* Still continuing */ 4253 } 4254 4255 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4256 vsi->bw_max_quanta = bw_config.max_bw; 4257 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4258 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4259 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4260 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4261 vsi->bw_ets_limit_credits[i] = 4262 le16_to_cpu(bw_ets_config.credits[i]); 4263 /* 3 bits out of 4 for each TC */ 4264 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4265 } 4266 4267 return 0; 4268 } 4269 4270 /** 4271 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4272 * @vsi: the VSI being configured 4273 * @enabled_tc: TC bitmap 4274 * @bw_credits: BW shared credits per TC 4275 * 4276 * Returns 0 on success, negative value on failure 4277 **/ 4278 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4279 u8 *bw_share) 4280 { 4281 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4282 i40e_status aq_ret; 4283 int i; 4284 4285 bw_data.tc_valid_bits = enabled_tc; 4286 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4287 bw_data.tc_bw_credits[i] = bw_share[i]; 4288 4289 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4290 NULL); 4291 if (aq_ret) { 4292 dev_info(&vsi->back->pdev->dev, 4293 "AQ command Config VSI BW allocation per TC failed = %d\n", 4294 vsi->back->hw.aq.asq_last_status); 4295 return -EINVAL; 4296 } 4297 4298 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4299 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4300 4301 return 0; 4302 } 4303 4304 /** 4305 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4306 * @vsi: the VSI being configured 4307 * @enabled_tc: TC map to be enabled 4308 * 4309 **/ 4310 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4311 { 4312 struct net_device *netdev = vsi->netdev; 4313 struct i40e_pf *pf = vsi->back; 4314 struct i40e_hw *hw = &pf->hw; 4315 u8 netdev_tc = 0; 4316 int i; 4317 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4318 4319 if (!netdev) 4320 return; 4321 4322 if (!enabled_tc) { 4323 netdev_reset_tc(netdev); 4324 return; 4325 } 4326 4327 /* Set up actual enabled TCs on the VSI */ 4328 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 4329 return; 4330 4331 /* set per TC queues for the VSI */ 4332 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4333 /* Only set TC queues for enabled tcs 4334 * 4335 * e.g. For a VSI that has TC0 and TC3 enabled the 4336 * enabled_tc bitmap would be 0x00001001; the driver 4337 * will set the numtc for netdev as 2 that will be 4338 * referenced by the netdev layer as TC 0 and 1. 4339 */ 4340 if (vsi->tc_config.enabled_tc & (1 << i)) 4341 netdev_set_tc_queue(netdev, 4342 vsi->tc_config.tc_info[i].netdev_tc, 4343 vsi->tc_config.tc_info[i].qcount, 4344 vsi->tc_config.tc_info[i].qoffset); 4345 } 4346 4347 /* Assign UP2TC map for the VSI */ 4348 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4349 /* Get the actual TC# for the UP */ 4350 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 4351 /* Get the mapped netdev TC# for the UP */ 4352 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 4353 netdev_set_prio_tc_map(netdev, i, netdev_tc); 4354 } 4355 } 4356 4357 /** 4358 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 4359 * @vsi: the VSI being configured 4360 * @ctxt: the ctxt buffer returned from AQ VSI update param command 4361 **/ 4362 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 4363 struct i40e_vsi_context *ctxt) 4364 { 4365 /* copy just the sections touched not the entire info 4366 * since not all sections are valid as returned by 4367 * update vsi params 4368 */ 4369 vsi->info.mapping_flags = ctxt->info.mapping_flags; 4370 memcpy(&vsi->info.queue_mapping, 4371 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 4372 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 4373 sizeof(vsi->info.tc_mapping)); 4374 } 4375 4376 /** 4377 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 4378 * @vsi: VSI to be configured 4379 * @enabled_tc: TC bitmap 4380 * 4381 * This configures a particular VSI for TCs that are mapped to the 4382 * given TC bitmap. It uses default bandwidth share for TCs across 4383 * VSIs to configure TC for a particular VSI. 4384 * 4385 * NOTE: 4386 * It is expected that the VSI queues have been quisced before calling 4387 * this function. 4388 **/ 4389 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4390 { 4391 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 4392 struct i40e_vsi_context ctxt; 4393 int ret = 0; 4394 int i; 4395 4396 /* Check if enabled_tc is same as existing or new TCs */ 4397 if (vsi->tc_config.enabled_tc == enabled_tc) 4398 return ret; 4399 4400 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 4401 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4402 if (enabled_tc & (1 << i)) 4403 bw_share[i] = 1; 4404 } 4405 4406 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 4407 if (ret) { 4408 dev_info(&vsi->back->pdev->dev, 4409 "Failed configuring TC map %d for VSI %d\n", 4410 enabled_tc, vsi->seid); 4411 goto out; 4412 } 4413 4414 /* Update Queue Pairs Mapping for currently enabled UPs */ 4415 ctxt.seid = vsi->seid; 4416 ctxt.pf_num = vsi->back->hw.pf_id; 4417 ctxt.vf_num = 0; 4418 ctxt.uplink_seid = vsi->uplink_seid; 4419 ctxt.info = vsi->info; 4420 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 4421 4422 /* Update the VSI after updating the VSI queue-mapping information */ 4423 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 4424 if (ret) { 4425 dev_info(&vsi->back->pdev->dev, 4426 "update vsi failed, aq_err=%d\n", 4427 vsi->back->hw.aq.asq_last_status); 4428 goto out; 4429 } 4430 /* update the local VSI info with updated queue map */ 4431 i40e_vsi_update_queue_map(vsi, &ctxt); 4432 vsi->info.valid_sections = 0; 4433 4434 /* Update current VSI BW information */ 4435 ret = i40e_vsi_get_bw_info(vsi); 4436 if (ret) { 4437 dev_info(&vsi->back->pdev->dev, 4438 "Failed updating vsi bw info, aq_err=%d\n", 4439 vsi->back->hw.aq.asq_last_status); 4440 goto out; 4441 } 4442 4443 /* Update the netdev TC setup */ 4444 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 4445 out: 4446 return ret; 4447 } 4448 4449 /** 4450 * i40e_veb_config_tc - Configure TCs for given VEB 4451 * @veb: given VEB 4452 * @enabled_tc: TC bitmap 4453 * 4454 * Configures given TC bitmap for VEB (switching) element 4455 **/ 4456 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 4457 { 4458 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 4459 struct i40e_pf *pf = veb->pf; 4460 int ret = 0; 4461 int i; 4462 4463 /* No TCs or already enabled TCs just return */ 4464 if (!enabled_tc || veb->enabled_tc == enabled_tc) 4465 return ret; 4466 4467 bw_data.tc_valid_bits = enabled_tc; 4468 /* bw_data.absolute_credits is not set (relative) */ 4469 4470 /* Enable ETS TCs with equal BW Share for now */ 4471 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4472 if (enabled_tc & (1 << i)) 4473 bw_data.tc_bw_share_credits[i] = 1; 4474 } 4475 4476 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 4477 &bw_data, NULL); 4478 if (ret) { 4479 dev_info(&pf->pdev->dev, 4480 "veb bw config failed, aq_err=%d\n", 4481 pf->hw.aq.asq_last_status); 4482 goto out; 4483 } 4484 4485 /* Update the BW information */ 4486 ret = i40e_veb_get_bw_info(veb); 4487 if (ret) { 4488 dev_info(&pf->pdev->dev, 4489 "Failed getting veb bw config, aq_err=%d\n", 4490 pf->hw.aq.asq_last_status); 4491 } 4492 4493 out: 4494 return ret; 4495 } 4496 4497 #ifdef CONFIG_I40E_DCB 4498 /** 4499 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 4500 * @pf: PF struct 4501 * 4502 * Reconfigure VEB/VSIs on a given PF; it is assumed that 4503 * the caller would've quiesce all the VSIs before calling 4504 * this function 4505 **/ 4506 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 4507 { 4508 u8 tc_map = 0; 4509 int ret; 4510 u8 v; 4511 4512 /* Enable the TCs available on PF to all VEBs */ 4513 tc_map = i40e_pf_get_tc_map(pf); 4514 for (v = 0; v < I40E_MAX_VEB; v++) { 4515 if (!pf->veb[v]) 4516 continue; 4517 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 4518 if (ret) { 4519 dev_info(&pf->pdev->dev, 4520 "Failed configuring TC for VEB seid=%d\n", 4521 pf->veb[v]->seid); 4522 /* Will try to configure as many components */ 4523 } 4524 } 4525 4526 /* Update each VSI */ 4527 for (v = 0; v < pf->num_alloc_vsi; v++) { 4528 if (!pf->vsi[v]) 4529 continue; 4530 4531 /* - Enable all TCs for the LAN VSI 4532 #ifdef I40E_FCOE 4533 * - For FCoE VSI only enable the TC configured 4534 * as per the APP TLV 4535 #endif 4536 * - For all others keep them at TC0 for now 4537 */ 4538 if (v == pf->lan_vsi) 4539 tc_map = i40e_pf_get_tc_map(pf); 4540 else 4541 tc_map = i40e_pf_get_default_tc(pf); 4542 #ifdef I40E_FCOE 4543 if (pf->vsi[v]->type == I40E_VSI_FCOE) 4544 tc_map = i40e_get_fcoe_tc_map(pf); 4545 #endif /* #ifdef I40E_FCOE */ 4546 4547 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 4548 if (ret) { 4549 dev_info(&pf->pdev->dev, 4550 "Failed configuring TC for VSI seid=%d\n", 4551 pf->vsi[v]->seid); 4552 /* Will try to configure as many components */ 4553 } else { 4554 /* Re-configure VSI vectors based on updated TC map */ 4555 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 4556 if (pf->vsi[v]->netdev) 4557 i40e_dcbnl_set_all(pf->vsi[v]); 4558 } 4559 } 4560 } 4561 4562 /** 4563 * i40e_resume_port_tx - Resume port Tx 4564 * @pf: PF struct 4565 * 4566 * Resume a port's Tx and issue a PF reset in case of failure to 4567 * resume. 4568 **/ 4569 static int i40e_resume_port_tx(struct i40e_pf *pf) 4570 { 4571 struct i40e_hw *hw = &pf->hw; 4572 int ret; 4573 4574 ret = i40e_aq_resume_port_tx(hw, NULL); 4575 if (ret) { 4576 dev_info(&pf->pdev->dev, 4577 "AQ command Resume Port Tx failed = %d\n", 4578 pf->hw.aq.asq_last_status); 4579 /* Schedule PF reset to recover */ 4580 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 4581 i40e_service_event_schedule(pf); 4582 } 4583 4584 return ret; 4585 } 4586 4587 /** 4588 * i40e_init_pf_dcb - Initialize DCB configuration 4589 * @pf: PF being configured 4590 * 4591 * Query the current DCB configuration and cache it 4592 * in the hardware structure 4593 **/ 4594 static int i40e_init_pf_dcb(struct i40e_pf *pf) 4595 { 4596 struct i40e_hw *hw = &pf->hw; 4597 int err = 0; 4598 4599 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 4600 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 4601 (pf->hw.aq.fw_maj_ver < 4)) 4602 goto out; 4603 4604 /* Get the initial DCB configuration */ 4605 err = i40e_init_dcb(hw); 4606 if (!err) { 4607 /* Device/Function is not DCBX capable */ 4608 if ((!hw->func_caps.dcb) || 4609 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 4610 dev_info(&pf->pdev->dev, 4611 "DCBX offload is not supported or is disabled for this PF.\n"); 4612 4613 if (pf->flags & I40E_FLAG_MFP_ENABLED) 4614 goto out; 4615 4616 } else { 4617 /* When status is not DISABLED then DCBX in FW */ 4618 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 4619 DCB_CAP_DCBX_VER_IEEE; 4620 4621 pf->flags |= I40E_FLAG_DCB_CAPABLE; 4622 /* Enable DCB tagging only when more than one TC */ 4623 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 4624 pf->flags |= I40E_FLAG_DCB_ENABLED; 4625 dev_dbg(&pf->pdev->dev, 4626 "DCBX offload is supported for this PF.\n"); 4627 } 4628 } else { 4629 dev_info(&pf->pdev->dev, 4630 "AQ Querying DCB configuration failed: aq_err %d\n", 4631 pf->hw.aq.asq_last_status); 4632 } 4633 4634 out: 4635 return err; 4636 } 4637 #endif /* CONFIG_I40E_DCB */ 4638 #define SPEED_SIZE 14 4639 #define FC_SIZE 8 4640 /** 4641 * i40e_print_link_message - print link up or down 4642 * @vsi: the VSI for which link needs a message 4643 */ 4644 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 4645 { 4646 char speed[SPEED_SIZE] = "Unknown"; 4647 char fc[FC_SIZE] = "RX/TX"; 4648 4649 if (!isup) { 4650 netdev_info(vsi->netdev, "NIC Link is Down\n"); 4651 return; 4652 } 4653 4654 /* Warn user if link speed on NPAR enabled partition is not at 4655 * least 10GB 4656 */ 4657 if (vsi->back->hw.func_caps.npar_enable && 4658 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 4659 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 4660 netdev_warn(vsi->netdev, 4661 "The partition detected link speed that is less than 10Gbps\n"); 4662 4663 switch (vsi->back->hw.phy.link_info.link_speed) { 4664 case I40E_LINK_SPEED_40GB: 4665 strlcpy(speed, "40 Gbps", SPEED_SIZE); 4666 break; 4667 case I40E_LINK_SPEED_20GB: 4668 strncpy(speed, "20 Gbps", SPEED_SIZE); 4669 break; 4670 case I40E_LINK_SPEED_10GB: 4671 strlcpy(speed, "10 Gbps", SPEED_SIZE); 4672 break; 4673 case I40E_LINK_SPEED_1GB: 4674 strlcpy(speed, "1000 Mbps", SPEED_SIZE); 4675 break; 4676 case I40E_LINK_SPEED_100MB: 4677 strncpy(speed, "100 Mbps", SPEED_SIZE); 4678 break; 4679 default: 4680 break; 4681 } 4682 4683 switch (vsi->back->hw.fc.current_mode) { 4684 case I40E_FC_FULL: 4685 strlcpy(fc, "RX/TX", FC_SIZE); 4686 break; 4687 case I40E_FC_TX_PAUSE: 4688 strlcpy(fc, "TX", FC_SIZE); 4689 break; 4690 case I40E_FC_RX_PAUSE: 4691 strlcpy(fc, "RX", FC_SIZE); 4692 break; 4693 default: 4694 strlcpy(fc, "None", FC_SIZE); 4695 break; 4696 } 4697 4698 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n", 4699 speed, fc); 4700 } 4701 4702 /** 4703 * i40e_up_complete - Finish the last steps of bringing up a connection 4704 * @vsi: the VSI being configured 4705 **/ 4706 static int i40e_up_complete(struct i40e_vsi *vsi) 4707 { 4708 struct i40e_pf *pf = vsi->back; 4709 int err; 4710 4711 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4712 i40e_vsi_configure_msix(vsi); 4713 else 4714 i40e_configure_msi_and_legacy(vsi); 4715 4716 /* start rings */ 4717 err = i40e_vsi_control_rings(vsi, true); 4718 if (err) 4719 return err; 4720 4721 clear_bit(__I40E_DOWN, &vsi->state); 4722 i40e_napi_enable_all(vsi); 4723 i40e_vsi_enable_irq(vsi); 4724 4725 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 4726 (vsi->netdev)) { 4727 i40e_print_link_message(vsi, true); 4728 netif_tx_start_all_queues(vsi->netdev); 4729 netif_carrier_on(vsi->netdev); 4730 } else if (vsi->netdev) { 4731 i40e_print_link_message(vsi, false); 4732 /* need to check for qualified module here*/ 4733 if ((pf->hw.phy.link_info.link_info & 4734 I40E_AQ_MEDIA_AVAILABLE) && 4735 (!(pf->hw.phy.link_info.an_info & 4736 I40E_AQ_QUALIFIED_MODULE))) 4737 netdev_err(vsi->netdev, 4738 "the driver failed to link because an unqualified module was detected."); 4739 } 4740 4741 /* replay FDIR SB filters */ 4742 if (vsi->type == I40E_VSI_FDIR) { 4743 /* reset fd counters */ 4744 pf->fd_add_err = pf->fd_atr_cnt = 0; 4745 if (pf->fd_tcp_rule > 0) { 4746 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 4747 if (I40E_DEBUG_FD & pf->hw.debug_mask) 4748 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 4749 pf->fd_tcp_rule = 0; 4750 } 4751 i40e_fdir_filter_restore(vsi); 4752 } 4753 i40e_service_event_schedule(pf); 4754 4755 return 0; 4756 } 4757 4758 /** 4759 * i40e_vsi_reinit_locked - Reset the VSI 4760 * @vsi: the VSI being configured 4761 * 4762 * Rebuild the ring structs after some configuration 4763 * has changed, e.g. MTU size. 4764 **/ 4765 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 4766 { 4767 struct i40e_pf *pf = vsi->back; 4768 4769 WARN_ON(in_interrupt()); 4770 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 4771 usleep_range(1000, 2000); 4772 i40e_down(vsi); 4773 4774 /* Give a VF some time to respond to the reset. The 4775 * two second wait is based upon the watchdog cycle in 4776 * the VF driver. 4777 */ 4778 if (vsi->type == I40E_VSI_SRIOV) 4779 msleep(2000); 4780 i40e_up(vsi); 4781 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 4782 } 4783 4784 /** 4785 * i40e_up - Bring the connection back up after being down 4786 * @vsi: the VSI being configured 4787 **/ 4788 int i40e_up(struct i40e_vsi *vsi) 4789 { 4790 int err; 4791 4792 err = i40e_vsi_configure(vsi); 4793 if (!err) 4794 err = i40e_up_complete(vsi); 4795 4796 return err; 4797 } 4798 4799 /** 4800 * i40e_down - Shutdown the connection processing 4801 * @vsi: the VSI being stopped 4802 **/ 4803 void i40e_down(struct i40e_vsi *vsi) 4804 { 4805 int i; 4806 4807 /* It is assumed that the caller of this function 4808 * sets the vsi->state __I40E_DOWN bit. 4809 */ 4810 if (vsi->netdev) { 4811 netif_carrier_off(vsi->netdev); 4812 netif_tx_disable(vsi->netdev); 4813 } 4814 i40e_vsi_disable_irq(vsi); 4815 i40e_vsi_control_rings(vsi, false); 4816 i40e_napi_disable_all(vsi); 4817 4818 for (i = 0; i < vsi->num_queue_pairs; i++) { 4819 i40e_clean_tx_ring(vsi->tx_rings[i]); 4820 i40e_clean_rx_ring(vsi->rx_rings[i]); 4821 } 4822 } 4823 4824 /** 4825 * i40e_setup_tc - configure multiple traffic classes 4826 * @netdev: net device to configure 4827 * @tc: number of traffic classes to enable 4828 **/ 4829 #ifdef I40E_FCOE 4830 int i40e_setup_tc(struct net_device *netdev, u8 tc) 4831 #else 4832 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 4833 #endif 4834 { 4835 struct i40e_netdev_priv *np = netdev_priv(netdev); 4836 struct i40e_vsi *vsi = np->vsi; 4837 struct i40e_pf *pf = vsi->back; 4838 u8 enabled_tc = 0; 4839 int ret = -EINVAL; 4840 int i; 4841 4842 /* Check if DCB enabled to continue */ 4843 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 4844 netdev_info(netdev, "DCB is not enabled for adapter\n"); 4845 goto exit; 4846 } 4847 4848 /* Check if MFP enabled */ 4849 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4850 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 4851 goto exit; 4852 } 4853 4854 /* Check whether tc count is within enabled limit */ 4855 if (tc > i40e_pf_get_num_tc(pf)) { 4856 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 4857 goto exit; 4858 } 4859 4860 /* Generate TC map for number of tc requested */ 4861 for (i = 0; i < tc; i++) 4862 enabled_tc |= (1 << i); 4863 4864 /* Requesting same TC configuration as already enabled */ 4865 if (enabled_tc == vsi->tc_config.enabled_tc) 4866 return 0; 4867 4868 /* Quiesce VSI queues */ 4869 i40e_quiesce_vsi(vsi); 4870 4871 /* Configure VSI for enabled TCs */ 4872 ret = i40e_vsi_config_tc(vsi, enabled_tc); 4873 if (ret) { 4874 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 4875 vsi->seid); 4876 goto exit; 4877 } 4878 4879 /* Unquiesce VSI */ 4880 i40e_unquiesce_vsi(vsi); 4881 4882 exit: 4883 return ret; 4884 } 4885 4886 /** 4887 * i40e_open - Called when a network interface is made active 4888 * @netdev: network interface device structure 4889 * 4890 * The open entry point is called when a network interface is made 4891 * active by the system (IFF_UP). At this point all resources needed 4892 * for transmit and receive operations are allocated, the interrupt 4893 * handler is registered with the OS, the netdev watchdog subtask is 4894 * enabled, and the stack is notified that the interface is ready. 4895 * 4896 * Returns 0 on success, negative value on failure 4897 **/ 4898 int i40e_open(struct net_device *netdev) 4899 { 4900 struct i40e_netdev_priv *np = netdev_priv(netdev); 4901 struct i40e_vsi *vsi = np->vsi; 4902 struct i40e_pf *pf = vsi->back; 4903 int err; 4904 4905 /* disallow open during test or if eeprom is broken */ 4906 if (test_bit(__I40E_TESTING, &pf->state) || 4907 test_bit(__I40E_BAD_EEPROM, &pf->state)) 4908 return -EBUSY; 4909 4910 netif_carrier_off(netdev); 4911 4912 err = i40e_vsi_open(vsi); 4913 if (err) 4914 return err; 4915 4916 /* configure global TSO hardware offload settings */ 4917 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 4918 TCP_FLAG_FIN) >> 16); 4919 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 4920 TCP_FLAG_FIN | 4921 TCP_FLAG_CWR) >> 16); 4922 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 4923 4924 #ifdef CONFIG_I40E_VXLAN 4925 vxlan_get_rx_port(netdev); 4926 #endif 4927 4928 return 0; 4929 } 4930 4931 /** 4932 * i40e_vsi_open - 4933 * @vsi: the VSI to open 4934 * 4935 * Finish initialization of the VSI. 4936 * 4937 * Returns 0 on success, negative value on failure 4938 **/ 4939 int i40e_vsi_open(struct i40e_vsi *vsi) 4940 { 4941 struct i40e_pf *pf = vsi->back; 4942 char int_name[I40E_INT_NAME_STR_LEN]; 4943 int err; 4944 4945 /* allocate descriptors */ 4946 err = i40e_vsi_setup_tx_resources(vsi); 4947 if (err) 4948 goto err_setup_tx; 4949 err = i40e_vsi_setup_rx_resources(vsi); 4950 if (err) 4951 goto err_setup_rx; 4952 4953 err = i40e_vsi_configure(vsi); 4954 if (err) 4955 goto err_setup_rx; 4956 4957 if (vsi->netdev) { 4958 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 4959 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 4960 err = i40e_vsi_request_irq(vsi, int_name); 4961 if (err) 4962 goto err_setup_rx; 4963 4964 /* Notify the stack of the actual queue counts. */ 4965 err = netif_set_real_num_tx_queues(vsi->netdev, 4966 vsi->num_queue_pairs); 4967 if (err) 4968 goto err_set_queues; 4969 4970 err = netif_set_real_num_rx_queues(vsi->netdev, 4971 vsi->num_queue_pairs); 4972 if (err) 4973 goto err_set_queues; 4974 4975 } else if (vsi->type == I40E_VSI_FDIR) { 4976 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 4977 dev_driver_string(&pf->pdev->dev), 4978 dev_name(&pf->pdev->dev)); 4979 err = i40e_vsi_request_irq(vsi, int_name); 4980 4981 } else { 4982 err = -EINVAL; 4983 goto err_setup_rx; 4984 } 4985 4986 err = i40e_up_complete(vsi); 4987 if (err) 4988 goto err_up_complete; 4989 4990 return 0; 4991 4992 err_up_complete: 4993 i40e_down(vsi); 4994 err_set_queues: 4995 i40e_vsi_free_irq(vsi); 4996 err_setup_rx: 4997 i40e_vsi_free_rx_resources(vsi); 4998 err_setup_tx: 4999 i40e_vsi_free_tx_resources(vsi); 5000 if (vsi == pf->vsi[pf->lan_vsi]) 5001 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 5002 5003 return err; 5004 } 5005 5006 /** 5007 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 5008 * @pf: Pointer to PF 5009 * 5010 * This function destroys the hlist where all the Flow Director 5011 * filters were saved. 5012 **/ 5013 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 5014 { 5015 struct i40e_fdir_filter *filter; 5016 struct hlist_node *node2; 5017 5018 hlist_for_each_entry_safe(filter, node2, 5019 &pf->fdir_filter_list, fdir_node) { 5020 hlist_del(&filter->fdir_node); 5021 kfree(filter); 5022 } 5023 pf->fdir_pf_active_filters = 0; 5024 } 5025 5026 /** 5027 * i40e_close - Disables a network interface 5028 * @netdev: network interface device structure 5029 * 5030 * The close entry point is called when an interface is de-activated 5031 * by the OS. The hardware is still under the driver's control, but 5032 * this netdev interface is disabled. 5033 * 5034 * Returns 0, this is not allowed to fail 5035 **/ 5036 #ifdef I40E_FCOE 5037 int i40e_close(struct net_device *netdev) 5038 #else 5039 static int i40e_close(struct net_device *netdev) 5040 #endif 5041 { 5042 struct i40e_netdev_priv *np = netdev_priv(netdev); 5043 struct i40e_vsi *vsi = np->vsi; 5044 5045 i40e_vsi_close(vsi); 5046 5047 return 0; 5048 } 5049 5050 /** 5051 * i40e_do_reset - Start a PF or Core Reset sequence 5052 * @pf: board private structure 5053 * @reset_flags: which reset is requested 5054 * 5055 * The essential difference in resets is that the PF Reset 5056 * doesn't clear the packet buffers, doesn't reset the PE 5057 * firmware, and doesn't bother the other PFs on the chip. 5058 **/ 5059 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 5060 { 5061 u32 val; 5062 5063 WARN_ON(in_interrupt()); 5064 5065 if (i40e_check_asq_alive(&pf->hw)) 5066 i40e_vc_notify_reset(pf); 5067 5068 /* do the biggest reset indicated */ 5069 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { 5070 5071 /* Request a Global Reset 5072 * 5073 * This will start the chip's countdown to the actual full 5074 * chip reset event, and a warning interrupt to be sent 5075 * to all PFs, including the requestor. Our handler 5076 * for the warning interrupt will deal with the shutdown 5077 * and recovery of the switch setup. 5078 */ 5079 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 5080 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5081 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 5082 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5083 5084 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { 5085 5086 /* Request a Core Reset 5087 * 5088 * Same as Global Reset, except does *not* include the MAC/PHY 5089 */ 5090 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 5091 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5092 val |= I40E_GLGEN_RTRIG_CORER_MASK; 5093 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5094 i40e_flush(&pf->hw); 5095 5096 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { 5097 5098 /* Request a PF Reset 5099 * 5100 * Resets only the PF-specific registers 5101 * 5102 * This goes directly to the tear-down and rebuild of 5103 * the switch, since we need to do all the recovery as 5104 * for the Core Reset. 5105 */ 5106 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5107 i40e_handle_reset_warning(pf); 5108 5109 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { 5110 int v; 5111 5112 /* Find the VSI(s) that requested a re-init */ 5113 dev_info(&pf->pdev->dev, 5114 "VSI reinit requested\n"); 5115 for (v = 0; v < pf->num_alloc_vsi; v++) { 5116 struct i40e_vsi *vsi = pf->vsi[v]; 5117 if (vsi != NULL && 5118 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5119 i40e_vsi_reinit_locked(pf->vsi[v]); 5120 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5121 } 5122 } 5123 5124 /* no further action needed, so return now */ 5125 return; 5126 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) { 5127 int v; 5128 5129 /* Find the VSI(s) that needs to be brought down */ 5130 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5131 for (v = 0; v < pf->num_alloc_vsi; v++) { 5132 struct i40e_vsi *vsi = pf->vsi[v]; 5133 if (vsi != NULL && 5134 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5135 set_bit(__I40E_DOWN, &vsi->state); 5136 i40e_down(vsi); 5137 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5138 } 5139 } 5140 5141 /* no further action needed, so return now */ 5142 return; 5143 } else { 5144 dev_info(&pf->pdev->dev, 5145 "bad reset request 0x%08x\n", reset_flags); 5146 return; 5147 } 5148 } 5149 5150 #ifdef CONFIG_I40E_DCB 5151 /** 5152 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5153 * @pf: board private structure 5154 * @old_cfg: current DCB config 5155 * @new_cfg: new DCB config 5156 **/ 5157 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5158 struct i40e_dcbx_config *old_cfg, 5159 struct i40e_dcbx_config *new_cfg) 5160 { 5161 bool need_reconfig = false; 5162 5163 /* Check if ETS configuration has changed */ 5164 if (memcmp(&new_cfg->etscfg, 5165 &old_cfg->etscfg, 5166 sizeof(new_cfg->etscfg))) { 5167 /* If Priority Table has changed reconfig is needed */ 5168 if (memcmp(&new_cfg->etscfg.prioritytable, 5169 &old_cfg->etscfg.prioritytable, 5170 sizeof(new_cfg->etscfg.prioritytable))) { 5171 need_reconfig = true; 5172 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5173 } 5174 5175 if (memcmp(&new_cfg->etscfg.tcbwtable, 5176 &old_cfg->etscfg.tcbwtable, 5177 sizeof(new_cfg->etscfg.tcbwtable))) 5178 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5179 5180 if (memcmp(&new_cfg->etscfg.tsatable, 5181 &old_cfg->etscfg.tsatable, 5182 sizeof(new_cfg->etscfg.tsatable))) 5183 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5184 } 5185 5186 /* Check if PFC configuration has changed */ 5187 if (memcmp(&new_cfg->pfc, 5188 &old_cfg->pfc, 5189 sizeof(new_cfg->pfc))) { 5190 need_reconfig = true; 5191 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5192 } 5193 5194 /* Check if APP Table has changed */ 5195 if (memcmp(&new_cfg->app, 5196 &old_cfg->app, 5197 sizeof(new_cfg->app))) { 5198 need_reconfig = true; 5199 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5200 } 5201 5202 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__, 5203 need_reconfig); 5204 return need_reconfig; 5205 } 5206 5207 /** 5208 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5209 * @pf: board private structure 5210 * @e: event info posted on ARQ 5211 **/ 5212 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5213 struct i40e_arq_event_info *e) 5214 { 5215 struct i40e_aqc_lldp_get_mib *mib = 5216 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5217 struct i40e_hw *hw = &pf->hw; 5218 struct i40e_dcbx_config tmp_dcbx_cfg; 5219 bool need_reconfig = false; 5220 int ret = 0; 5221 u8 type; 5222 5223 /* Not DCB capable or capability disabled */ 5224 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5225 return ret; 5226 5227 /* Ignore if event is not for Nearest Bridge */ 5228 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5229 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5230 dev_dbg(&pf->pdev->dev, 5231 "%s: LLDP event mib bridge type 0x%x\n", __func__, type); 5232 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5233 return ret; 5234 5235 /* Check MIB Type and return if event for Remote MIB update */ 5236 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5237 dev_dbg(&pf->pdev->dev, 5238 "%s: LLDP event mib type %s\n", __func__, 5239 type ? "remote" : "local"); 5240 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5241 /* Update the remote cached instance and return */ 5242 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5243 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5244 &hw->remote_dcbx_config); 5245 goto exit; 5246 } 5247 5248 /* Store the old configuration */ 5249 tmp_dcbx_cfg = hw->local_dcbx_config; 5250 5251 /* Reset the old DCBx configuration data */ 5252 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 5253 /* Get updated DCBX data from firmware */ 5254 ret = i40e_get_dcb_config(&pf->hw); 5255 if (ret) { 5256 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n"); 5257 goto exit; 5258 } 5259 5260 /* No change detected in DCBX configs */ 5261 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 5262 sizeof(tmp_dcbx_cfg))) { 5263 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5264 goto exit; 5265 } 5266 5267 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 5268 &hw->local_dcbx_config); 5269 5270 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 5271 5272 if (!need_reconfig) 5273 goto exit; 5274 5275 /* Enable DCB tagging only when more than one TC */ 5276 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5277 pf->flags |= I40E_FLAG_DCB_ENABLED; 5278 else 5279 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5280 5281 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5282 /* Reconfiguration needed quiesce all VSIs */ 5283 i40e_pf_quiesce_all_vsi(pf); 5284 5285 /* Changes in configuration update VEB/VSI */ 5286 i40e_dcb_reconfigure(pf); 5287 5288 ret = i40e_resume_port_tx(pf); 5289 5290 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5291 /* In case of error no point in resuming VSIs */ 5292 if (ret) 5293 goto exit; 5294 5295 /* Wait for the PF's Tx queues to be disabled */ 5296 ret = i40e_pf_wait_txq_disabled(pf); 5297 if (ret) { 5298 /* Schedule PF reset to recover */ 5299 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5300 i40e_service_event_schedule(pf); 5301 } else { 5302 i40e_pf_unquiesce_all_vsi(pf); 5303 } 5304 5305 exit: 5306 return ret; 5307 } 5308 #endif /* CONFIG_I40E_DCB */ 5309 5310 /** 5311 * i40e_do_reset_safe - Protected reset path for userland calls. 5312 * @pf: board private structure 5313 * @reset_flags: which reset is requested 5314 * 5315 **/ 5316 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 5317 { 5318 rtnl_lock(); 5319 i40e_do_reset(pf, reset_flags); 5320 rtnl_unlock(); 5321 } 5322 5323 /** 5324 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 5325 * @pf: board private structure 5326 * @e: event info posted on ARQ 5327 * 5328 * Handler for LAN Queue Overflow Event generated by the firmware for PF 5329 * and VF queues 5330 **/ 5331 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 5332 struct i40e_arq_event_info *e) 5333 { 5334 struct i40e_aqc_lan_overflow *data = 5335 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 5336 u32 queue = le32_to_cpu(data->prtdcb_rupto); 5337 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 5338 struct i40e_hw *hw = &pf->hw; 5339 struct i40e_vf *vf; 5340 u16 vf_id; 5341 5342 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 5343 queue, qtx_ctl); 5344 5345 /* Queue belongs to VF, find the VF and issue VF reset */ 5346 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 5347 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 5348 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 5349 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 5350 vf_id -= hw->func_caps.vf_base_id; 5351 vf = &pf->vf[vf_id]; 5352 i40e_vc_notify_vf_reset(vf); 5353 /* Allow VF to process pending reset notification */ 5354 msleep(20); 5355 i40e_reset_vf(vf, false); 5356 } 5357 } 5358 5359 /** 5360 * i40e_service_event_complete - Finish up the service event 5361 * @pf: board private structure 5362 **/ 5363 static void i40e_service_event_complete(struct i40e_pf *pf) 5364 { 5365 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); 5366 5367 /* flush memory to make sure state is correct before next watchog */ 5368 smp_mb__before_atomic(); 5369 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 5370 } 5371 5372 /** 5373 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 5374 * @pf: board private structure 5375 **/ 5376 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 5377 { 5378 u32 val, fcnt_prog; 5379 5380 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5381 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 5382 return fcnt_prog; 5383 } 5384 5385 /** 5386 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 5387 * @pf: board private structure 5388 **/ 5389 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 5390 { 5391 u32 val, fcnt_prog; 5392 5393 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5394 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 5395 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 5396 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 5397 return fcnt_prog; 5398 } 5399 5400 /** 5401 * i40e_get_global_fd_count - Get total FD filters programmed on device 5402 * @pf: board private structure 5403 **/ 5404 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 5405 { 5406 u32 val, fcnt_prog; 5407 5408 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 5409 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 5410 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 5411 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 5412 return fcnt_prog; 5413 } 5414 5415 /** 5416 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 5417 * @pf: board private structure 5418 **/ 5419 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 5420 { 5421 u32 fcnt_prog, fcnt_avail; 5422 5423 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5424 return; 5425 5426 /* Check if, FD SB or ATR was auto disabled and if there is enough room 5427 * to re-enable 5428 */ 5429 fcnt_prog = i40e_get_global_fd_count(pf); 5430 fcnt_avail = pf->fdir_pf_filter_count; 5431 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 5432 (pf->fd_add_err == 0) || 5433 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 5434 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 5435 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 5436 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5437 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5438 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 5439 } 5440 } 5441 /* Wait for some more space to be available to turn on ATR */ 5442 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 5443 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 5444 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5445 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5446 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5447 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); 5448 } 5449 } 5450 } 5451 5452 #define I40E_MIN_FD_FLUSH_INTERVAL 10 5453 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 5454 /** 5455 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 5456 * @pf: board private structure 5457 **/ 5458 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 5459 { 5460 unsigned long min_flush_time; 5461 int flush_wait_retry = 50; 5462 bool disable_atr = false; 5463 int fd_room; 5464 int reg; 5465 5466 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5467 return; 5468 5469 if (time_after(jiffies, pf->fd_flush_timestamp + 5470 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) { 5471 /* If the flush is happening too quick and we have mostly 5472 * SB rules we should not re-enable ATR for some time. 5473 */ 5474 min_flush_time = pf->fd_flush_timestamp 5475 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 5476 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 5477 5478 if (!(time_after(jiffies, min_flush_time)) && 5479 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 5480 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5481 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 5482 disable_atr = true; 5483 } 5484 5485 pf->fd_flush_timestamp = jiffies; 5486 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5487 /* flush all filters */ 5488 wr32(&pf->hw, I40E_PFQF_CTL_1, 5489 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 5490 i40e_flush(&pf->hw); 5491 pf->fd_flush_cnt++; 5492 pf->fd_add_err = 0; 5493 do { 5494 /* Check FD flush status every 5-6msec */ 5495 usleep_range(5000, 6000); 5496 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 5497 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 5498 break; 5499 } while (flush_wait_retry--); 5500 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 5501 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 5502 } else { 5503 /* replay sideband filters */ 5504 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 5505 if (!disable_atr) 5506 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 5507 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5508 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5509 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 5510 } 5511 } 5512 } 5513 5514 /** 5515 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 5516 * @pf: board private structure 5517 **/ 5518 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 5519 { 5520 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 5521 } 5522 5523 /* We can see up to 256 filter programming desc in transit if the filters are 5524 * being applied really fast; before we see the first 5525 * filter miss error on Rx queue 0. Accumulating enough error messages before 5526 * reacting will make sure we don't cause flush too often. 5527 */ 5528 #define I40E_MAX_FD_PROGRAM_ERROR 256 5529 5530 /** 5531 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 5532 * @pf: board private structure 5533 **/ 5534 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 5535 { 5536 5537 /* if interface is down do nothing */ 5538 if (test_bit(__I40E_DOWN, &pf->state)) 5539 return; 5540 5541 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5542 return; 5543 5544 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5545 i40e_fdir_flush_and_replay(pf); 5546 5547 i40e_fdir_check_and_reenable(pf); 5548 5549 } 5550 5551 /** 5552 * i40e_vsi_link_event - notify VSI of a link event 5553 * @vsi: vsi to be notified 5554 * @link_up: link up or down 5555 **/ 5556 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 5557 { 5558 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 5559 return; 5560 5561 switch (vsi->type) { 5562 case I40E_VSI_MAIN: 5563 #ifdef I40E_FCOE 5564 case I40E_VSI_FCOE: 5565 #endif 5566 if (!vsi->netdev || !vsi->netdev_registered) 5567 break; 5568 5569 if (link_up) { 5570 netif_carrier_on(vsi->netdev); 5571 netif_tx_wake_all_queues(vsi->netdev); 5572 } else { 5573 netif_carrier_off(vsi->netdev); 5574 netif_tx_stop_all_queues(vsi->netdev); 5575 } 5576 break; 5577 5578 case I40E_VSI_SRIOV: 5579 case I40E_VSI_VMDQ2: 5580 case I40E_VSI_CTRL: 5581 case I40E_VSI_MIRROR: 5582 default: 5583 /* there is no notification for other VSIs */ 5584 break; 5585 } 5586 } 5587 5588 /** 5589 * i40e_veb_link_event - notify elements on the veb of a link event 5590 * @veb: veb to be notified 5591 * @link_up: link up or down 5592 **/ 5593 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 5594 { 5595 struct i40e_pf *pf; 5596 int i; 5597 5598 if (!veb || !veb->pf) 5599 return; 5600 pf = veb->pf; 5601 5602 /* depth first... */ 5603 for (i = 0; i < I40E_MAX_VEB; i++) 5604 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 5605 i40e_veb_link_event(pf->veb[i], link_up); 5606 5607 /* ... now the local VSIs */ 5608 for (i = 0; i < pf->num_alloc_vsi; i++) 5609 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 5610 i40e_vsi_link_event(pf->vsi[i], link_up); 5611 } 5612 5613 /** 5614 * i40e_link_event - Update netif_carrier status 5615 * @pf: board private structure 5616 **/ 5617 static void i40e_link_event(struct i40e_pf *pf) 5618 { 5619 bool new_link, old_link; 5620 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5621 u8 new_link_speed, old_link_speed; 5622 5623 /* set this to force the get_link_status call to refresh state */ 5624 pf->hw.phy.get_link_info = true; 5625 5626 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 5627 new_link = i40e_get_link_status(&pf->hw); 5628 old_link_speed = pf->hw.phy.link_info_old.link_speed; 5629 new_link_speed = pf->hw.phy.link_info.link_speed; 5630 5631 if (new_link == old_link && 5632 new_link_speed == old_link_speed && 5633 (test_bit(__I40E_DOWN, &vsi->state) || 5634 new_link == netif_carrier_ok(vsi->netdev))) 5635 return; 5636 5637 if (!test_bit(__I40E_DOWN, &vsi->state)) 5638 i40e_print_link_message(vsi, new_link); 5639 5640 /* Notify the base of the switch tree connected to 5641 * the link. Floating VEBs are not notified. 5642 */ 5643 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 5644 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 5645 else 5646 i40e_vsi_link_event(vsi, new_link); 5647 5648 if (pf->vf) 5649 i40e_vc_notify_link_state(pf); 5650 5651 if (pf->flags & I40E_FLAG_PTP) 5652 i40e_ptp_set_increment(pf); 5653 } 5654 5655 /** 5656 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts 5657 * @pf: board private structure 5658 * 5659 * Set the per-queue flags to request a check for stuck queues in the irq 5660 * clean functions, then force interrupts to be sure the irq clean is called. 5661 **/ 5662 static void i40e_check_hang_subtask(struct i40e_pf *pf) 5663 { 5664 int i, v; 5665 5666 /* If we're down or resetting, just bail */ 5667 if (test_bit(__I40E_DOWN, &pf->state) || 5668 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5669 return; 5670 5671 /* for each VSI/netdev 5672 * for each Tx queue 5673 * set the check flag 5674 * for each q_vector 5675 * force an interrupt 5676 */ 5677 for (v = 0; v < pf->num_alloc_vsi; v++) { 5678 struct i40e_vsi *vsi = pf->vsi[v]; 5679 int armed = 0; 5680 5681 if (!pf->vsi[v] || 5682 test_bit(__I40E_DOWN, &vsi->state) || 5683 (vsi->netdev && !netif_carrier_ok(vsi->netdev))) 5684 continue; 5685 5686 for (i = 0; i < vsi->num_queue_pairs; i++) { 5687 set_check_for_tx_hang(vsi->tx_rings[i]); 5688 if (test_bit(__I40E_HANG_CHECK_ARMED, 5689 &vsi->tx_rings[i]->state)) 5690 armed++; 5691 } 5692 5693 if (armed) { 5694 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 5695 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, 5696 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 5697 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 5698 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 5699 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 5700 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 5701 } else { 5702 u16 vec = vsi->base_vector - 1; 5703 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | 5704 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK | 5705 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | 5706 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK | 5707 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK); 5708 for (i = 0; i < vsi->num_q_vectors; i++, vec++) 5709 wr32(&vsi->back->hw, 5710 I40E_PFINT_DYN_CTLN(vec), val); 5711 } 5712 i40e_flush(&vsi->back->hw); 5713 } 5714 } 5715 } 5716 5717 /** 5718 * i40e_watchdog_subtask - periodic checks not using event driven response 5719 * @pf: board private structure 5720 **/ 5721 static void i40e_watchdog_subtask(struct i40e_pf *pf) 5722 { 5723 int i; 5724 5725 /* if interface is down do nothing */ 5726 if (test_bit(__I40E_DOWN, &pf->state) || 5727 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5728 return; 5729 5730 /* make sure we don't do these things too often */ 5731 if (time_before(jiffies, (pf->service_timer_previous + 5732 pf->service_timer_period))) 5733 return; 5734 pf->service_timer_previous = jiffies; 5735 5736 i40e_check_hang_subtask(pf); 5737 i40e_link_event(pf); 5738 5739 /* Update the stats for active netdevs so the network stack 5740 * can look at updated numbers whenever it cares to 5741 */ 5742 for (i = 0; i < pf->num_alloc_vsi; i++) 5743 if (pf->vsi[i] && pf->vsi[i]->netdev) 5744 i40e_update_stats(pf->vsi[i]); 5745 5746 /* Update the stats for the active switching components */ 5747 for (i = 0; i < I40E_MAX_VEB; i++) 5748 if (pf->veb[i]) 5749 i40e_update_veb_stats(pf->veb[i]); 5750 5751 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 5752 } 5753 5754 /** 5755 * i40e_reset_subtask - Set up for resetting the device and driver 5756 * @pf: board private structure 5757 **/ 5758 static void i40e_reset_subtask(struct i40e_pf *pf) 5759 { 5760 u32 reset_flags = 0; 5761 5762 rtnl_lock(); 5763 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 5764 reset_flags |= (1 << __I40E_REINIT_REQUESTED); 5765 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 5766 } 5767 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 5768 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); 5769 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5770 } 5771 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 5772 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); 5773 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 5774 } 5775 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 5776 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); 5777 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 5778 } 5779 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 5780 reset_flags |= (1 << __I40E_DOWN_REQUESTED); 5781 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 5782 } 5783 5784 /* If there's a recovery already waiting, it takes 5785 * precedence before starting a new reset sequence. 5786 */ 5787 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 5788 i40e_handle_reset_warning(pf); 5789 goto unlock; 5790 } 5791 5792 /* If we're already down or resetting, just bail */ 5793 if (reset_flags && 5794 !test_bit(__I40E_DOWN, &pf->state) && 5795 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5796 i40e_do_reset(pf, reset_flags); 5797 5798 unlock: 5799 rtnl_unlock(); 5800 } 5801 5802 /** 5803 * i40e_handle_link_event - Handle link event 5804 * @pf: board private structure 5805 * @e: event info posted on ARQ 5806 **/ 5807 static void i40e_handle_link_event(struct i40e_pf *pf, 5808 struct i40e_arq_event_info *e) 5809 { 5810 struct i40e_hw *hw = &pf->hw; 5811 struct i40e_aqc_get_link_status *status = 5812 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 5813 5814 /* save off old link status information */ 5815 hw->phy.link_info_old = hw->phy.link_info; 5816 5817 /* Do a new status request to re-enable LSE reporting 5818 * and load new status information into the hw struct 5819 * This completely ignores any state information 5820 * in the ARQ event info, instead choosing to always 5821 * issue the AQ update link status command. 5822 */ 5823 i40e_link_event(pf); 5824 5825 /* check for unqualified module, if link is down */ 5826 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 5827 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 5828 (!(status->link_info & I40E_AQ_LINK_UP))) 5829 dev_err(&pf->pdev->dev, 5830 "The driver failed to link because an unqualified module was detected.\n"); 5831 } 5832 5833 /** 5834 * i40e_clean_adminq_subtask - Clean the AdminQ rings 5835 * @pf: board private structure 5836 **/ 5837 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 5838 { 5839 struct i40e_arq_event_info event; 5840 struct i40e_hw *hw = &pf->hw; 5841 u16 pending, i = 0; 5842 i40e_status ret; 5843 u16 opcode; 5844 u32 oldval; 5845 u32 val; 5846 5847 /* Do not run clean AQ when PF reset fails */ 5848 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 5849 return; 5850 5851 /* check for error indications */ 5852 val = rd32(&pf->hw, pf->hw.aq.arq.len); 5853 oldval = val; 5854 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 5855 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 5856 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 5857 } 5858 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 5859 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 5860 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 5861 } 5862 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 5863 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 5864 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 5865 } 5866 if (oldval != val) 5867 wr32(&pf->hw, pf->hw.aq.arq.len, val); 5868 5869 val = rd32(&pf->hw, pf->hw.aq.asq.len); 5870 oldval = val; 5871 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 5872 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 5873 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 5874 } 5875 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 5876 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 5877 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 5878 } 5879 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 5880 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 5881 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 5882 } 5883 if (oldval != val) 5884 wr32(&pf->hw, pf->hw.aq.asq.len, val); 5885 5886 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 5887 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 5888 if (!event.msg_buf) 5889 return; 5890 5891 do { 5892 ret = i40e_clean_arq_element(hw, &event, &pending); 5893 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 5894 break; 5895 else if (ret) { 5896 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 5897 break; 5898 } 5899 5900 opcode = le16_to_cpu(event.desc.opcode); 5901 switch (opcode) { 5902 5903 case i40e_aqc_opc_get_link_status: 5904 i40e_handle_link_event(pf, &event); 5905 break; 5906 case i40e_aqc_opc_send_msg_to_pf: 5907 ret = i40e_vc_process_vf_msg(pf, 5908 le16_to_cpu(event.desc.retval), 5909 le32_to_cpu(event.desc.cookie_high), 5910 le32_to_cpu(event.desc.cookie_low), 5911 event.msg_buf, 5912 event.msg_len); 5913 break; 5914 case i40e_aqc_opc_lldp_update_mib: 5915 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 5916 #ifdef CONFIG_I40E_DCB 5917 rtnl_lock(); 5918 ret = i40e_handle_lldp_event(pf, &event); 5919 rtnl_unlock(); 5920 #endif /* CONFIG_I40E_DCB */ 5921 break; 5922 case i40e_aqc_opc_event_lan_overflow: 5923 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 5924 i40e_handle_lan_overflow_event(pf, &event); 5925 break; 5926 case i40e_aqc_opc_send_msg_to_peer: 5927 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 5928 break; 5929 case i40e_aqc_opc_nvm_erase: 5930 case i40e_aqc_opc_nvm_update: 5931 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n"); 5932 break; 5933 default: 5934 dev_info(&pf->pdev->dev, 5935 "ARQ Error: Unknown event 0x%04x received\n", 5936 opcode); 5937 break; 5938 } 5939 } while (pending && (i++ < pf->adminq_work_limit)); 5940 5941 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 5942 /* re-enable Admin queue interrupt cause */ 5943 val = rd32(hw, I40E_PFINT_ICR0_ENA); 5944 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 5945 wr32(hw, I40E_PFINT_ICR0_ENA, val); 5946 i40e_flush(hw); 5947 5948 kfree(event.msg_buf); 5949 } 5950 5951 /** 5952 * i40e_verify_eeprom - make sure eeprom is good to use 5953 * @pf: board private structure 5954 **/ 5955 static void i40e_verify_eeprom(struct i40e_pf *pf) 5956 { 5957 int err; 5958 5959 err = i40e_diag_eeprom_test(&pf->hw); 5960 if (err) { 5961 /* retry in case of garbage read */ 5962 err = i40e_diag_eeprom_test(&pf->hw); 5963 if (err) { 5964 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 5965 err); 5966 set_bit(__I40E_BAD_EEPROM, &pf->state); 5967 } 5968 } 5969 5970 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 5971 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 5972 clear_bit(__I40E_BAD_EEPROM, &pf->state); 5973 } 5974 } 5975 5976 /** 5977 * i40e_enable_pf_switch_lb 5978 * @pf: pointer to the PF structure 5979 * 5980 * enable switch loop back or die - no point in a return value 5981 **/ 5982 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 5983 { 5984 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5985 struct i40e_vsi_context ctxt; 5986 int aq_ret; 5987 5988 ctxt.seid = pf->main_vsi_seid; 5989 ctxt.pf_num = pf->hw.pf_id; 5990 ctxt.vf_num = 0; 5991 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 5992 if (aq_ret) { 5993 dev_info(&pf->pdev->dev, 5994 "%s couldn't get PF vsi config, err %d, aq_err %d\n", 5995 __func__, aq_ret, pf->hw.aq.asq_last_status); 5996 return; 5997 } 5998 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 5999 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6000 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6001 6002 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6003 if (aq_ret) { 6004 dev_info(&pf->pdev->dev, 6005 "%s: update vsi switch failed, aq_err=%d\n", 6006 __func__, vsi->back->hw.aq.asq_last_status); 6007 } 6008 } 6009 6010 /** 6011 * i40e_disable_pf_switch_lb 6012 * @pf: pointer to the PF structure 6013 * 6014 * disable switch loop back or die - no point in a return value 6015 **/ 6016 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 6017 { 6018 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6019 struct i40e_vsi_context ctxt; 6020 int aq_ret; 6021 6022 ctxt.seid = pf->main_vsi_seid; 6023 ctxt.pf_num = pf->hw.pf_id; 6024 ctxt.vf_num = 0; 6025 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6026 if (aq_ret) { 6027 dev_info(&pf->pdev->dev, 6028 "%s couldn't get PF vsi config, err %d, aq_err %d\n", 6029 __func__, aq_ret, pf->hw.aq.asq_last_status); 6030 return; 6031 } 6032 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6033 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6034 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6035 6036 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6037 if (aq_ret) { 6038 dev_info(&pf->pdev->dev, 6039 "%s: update vsi switch failed, aq_err=%d\n", 6040 __func__, vsi->back->hw.aq.asq_last_status); 6041 } 6042 } 6043 6044 /** 6045 * i40e_config_bridge_mode - Configure the HW bridge mode 6046 * @veb: pointer to the bridge instance 6047 * 6048 * Configure the loop back mode for the LAN VSI that is downlink to the 6049 * specified HW bridge instance. It is expected this function is called 6050 * when a new HW bridge is instantiated. 6051 **/ 6052 static void i40e_config_bridge_mode(struct i40e_veb *veb) 6053 { 6054 struct i40e_pf *pf = veb->pf; 6055 6056 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 6057 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 6058 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 6059 i40e_disable_pf_switch_lb(pf); 6060 else 6061 i40e_enable_pf_switch_lb(pf); 6062 } 6063 6064 /** 6065 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 6066 * @veb: pointer to the VEB instance 6067 * 6068 * This is a recursive function that first builds the attached VSIs then 6069 * recurses in to build the next layer of VEB. We track the connections 6070 * through our own index numbers because the seid's from the HW could 6071 * change across the reset. 6072 **/ 6073 static int i40e_reconstitute_veb(struct i40e_veb *veb) 6074 { 6075 struct i40e_vsi *ctl_vsi = NULL; 6076 struct i40e_pf *pf = veb->pf; 6077 int v, veb_idx; 6078 int ret; 6079 6080 /* build VSI that owns this VEB, temporarily attached to base VEB */ 6081 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 6082 if (pf->vsi[v] && 6083 pf->vsi[v]->veb_idx == veb->idx && 6084 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 6085 ctl_vsi = pf->vsi[v]; 6086 break; 6087 } 6088 } 6089 if (!ctl_vsi) { 6090 dev_info(&pf->pdev->dev, 6091 "missing owner VSI for veb_idx %d\n", veb->idx); 6092 ret = -ENOENT; 6093 goto end_reconstitute; 6094 } 6095 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 6096 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6097 ret = i40e_add_vsi(ctl_vsi); 6098 if (ret) { 6099 dev_info(&pf->pdev->dev, 6100 "rebuild of owner VSI failed: %d\n", ret); 6101 goto end_reconstitute; 6102 } 6103 i40e_vsi_reset_stats(ctl_vsi); 6104 6105 /* create the VEB in the switch and move the VSI onto the VEB */ 6106 ret = i40e_add_veb(veb, ctl_vsi); 6107 if (ret) 6108 goto end_reconstitute; 6109 6110 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 6111 veb->bridge_mode = BRIDGE_MODE_VEB; 6112 else 6113 veb->bridge_mode = BRIDGE_MODE_VEPA; 6114 i40e_config_bridge_mode(veb); 6115 6116 /* create the remaining VSIs attached to this VEB */ 6117 for (v = 0; v < pf->num_alloc_vsi; v++) { 6118 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 6119 continue; 6120 6121 if (pf->vsi[v]->veb_idx == veb->idx) { 6122 struct i40e_vsi *vsi = pf->vsi[v]; 6123 vsi->uplink_seid = veb->seid; 6124 ret = i40e_add_vsi(vsi); 6125 if (ret) { 6126 dev_info(&pf->pdev->dev, 6127 "rebuild of vsi_idx %d failed: %d\n", 6128 v, ret); 6129 goto end_reconstitute; 6130 } 6131 i40e_vsi_reset_stats(vsi); 6132 } 6133 } 6134 6135 /* create any VEBs attached to this VEB - RECURSION */ 6136 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 6137 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 6138 pf->veb[veb_idx]->uplink_seid = veb->seid; 6139 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 6140 if (ret) 6141 break; 6142 } 6143 } 6144 6145 end_reconstitute: 6146 return ret; 6147 } 6148 6149 /** 6150 * i40e_get_capabilities - get info about the HW 6151 * @pf: the PF struct 6152 **/ 6153 static int i40e_get_capabilities(struct i40e_pf *pf) 6154 { 6155 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 6156 u16 data_size; 6157 int buf_len; 6158 int err; 6159 6160 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 6161 do { 6162 cap_buf = kzalloc(buf_len, GFP_KERNEL); 6163 if (!cap_buf) 6164 return -ENOMEM; 6165 6166 /* this loads the data into the hw struct for us */ 6167 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 6168 &data_size, 6169 i40e_aqc_opc_list_func_capabilities, 6170 NULL); 6171 /* data loaded, buffer no longer needed */ 6172 kfree(cap_buf); 6173 6174 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 6175 /* retry with a larger buffer */ 6176 buf_len = data_size; 6177 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 6178 dev_info(&pf->pdev->dev, 6179 "capability discovery failed: aq=%d\n", 6180 pf->hw.aq.asq_last_status); 6181 return -ENODEV; 6182 } 6183 } while (err); 6184 6185 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || 6186 (pf->hw.aq.fw_maj_ver < 2)) { 6187 pf->hw.func_caps.num_msix_vectors++; 6188 pf->hw.func_caps.num_msix_vectors_vf++; 6189 } 6190 6191 if (pf->hw.debug_mask & I40E_DEBUG_USER) 6192 dev_info(&pf->pdev->dev, 6193 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 6194 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 6195 pf->hw.func_caps.num_msix_vectors, 6196 pf->hw.func_caps.num_msix_vectors_vf, 6197 pf->hw.func_caps.fd_filters_guaranteed, 6198 pf->hw.func_caps.fd_filters_best_effort, 6199 pf->hw.func_caps.num_tx_qp, 6200 pf->hw.func_caps.num_vsis); 6201 6202 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 6203 + pf->hw.func_caps.num_vfs) 6204 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 6205 dev_info(&pf->pdev->dev, 6206 "got num_vsis %d, setting num_vsis to %d\n", 6207 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 6208 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 6209 } 6210 6211 return 0; 6212 } 6213 6214 static int i40e_vsi_clear(struct i40e_vsi *vsi); 6215 6216 /** 6217 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 6218 * @pf: board private structure 6219 **/ 6220 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 6221 { 6222 struct i40e_vsi *vsi; 6223 int i; 6224 6225 /* quick workaround for an NVM issue that leaves a critical register 6226 * uninitialized 6227 */ 6228 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6229 static const u32 hkey[] = { 6230 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6231 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6232 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6233 0x95b3a76d}; 6234 6235 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6236 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6237 } 6238 6239 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6240 return; 6241 6242 /* find existing VSI and see if it needs configuring */ 6243 vsi = NULL; 6244 for (i = 0; i < pf->num_alloc_vsi; i++) { 6245 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6246 vsi = pf->vsi[i]; 6247 break; 6248 } 6249 } 6250 6251 /* create a new VSI if none exists */ 6252 if (!vsi) { 6253 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6254 pf->vsi[pf->lan_vsi]->seid, 0); 6255 if (!vsi) { 6256 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6257 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6258 return; 6259 } 6260 } 6261 6262 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6263 } 6264 6265 /** 6266 * i40e_fdir_teardown - release the Flow Director resources 6267 * @pf: board private structure 6268 **/ 6269 static void i40e_fdir_teardown(struct i40e_pf *pf) 6270 { 6271 int i; 6272 6273 i40e_fdir_filter_exit(pf); 6274 for (i = 0; i < pf->num_alloc_vsi; i++) { 6275 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6276 i40e_vsi_release(pf->vsi[i]); 6277 break; 6278 } 6279 } 6280 } 6281 6282 /** 6283 * i40e_prep_for_reset - prep for the core to reset 6284 * @pf: board private structure 6285 * 6286 * Close up the VFs and other things in prep for PF Reset. 6287 **/ 6288 static void i40e_prep_for_reset(struct i40e_pf *pf) 6289 { 6290 struct i40e_hw *hw = &pf->hw; 6291 i40e_status ret = 0; 6292 u32 v; 6293 6294 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6295 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6296 return; 6297 6298 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6299 6300 /* quiesce the VSIs and their queues that are not already DOWN */ 6301 i40e_pf_quiesce_all_vsi(pf); 6302 6303 for (v = 0; v < pf->num_alloc_vsi; v++) { 6304 if (pf->vsi[v]) 6305 pf->vsi[v]->seid = 0; 6306 } 6307 6308 i40e_shutdown_adminq(&pf->hw); 6309 6310 /* call shutdown HMC */ 6311 if (hw->hmc.hmc_obj) { 6312 ret = i40e_shutdown_lan_hmc(hw); 6313 if (ret) 6314 dev_warn(&pf->pdev->dev, 6315 "shutdown_lan_hmc failed: %d\n", ret); 6316 } 6317 } 6318 6319 /** 6320 * i40e_send_version - update firmware with driver version 6321 * @pf: PF struct 6322 */ 6323 static void i40e_send_version(struct i40e_pf *pf) 6324 { 6325 struct i40e_driver_version dv; 6326 6327 dv.major_version = DRV_VERSION_MAJOR; 6328 dv.minor_version = DRV_VERSION_MINOR; 6329 dv.build_version = DRV_VERSION_BUILD; 6330 dv.subbuild_version = 0; 6331 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 6332 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 6333 } 6334 6335 /** 6336 * i40e_reset_and_rebuild - reset and rebuild using a saved config 6337 * @pf: board private structure 6338 * @reinit: if the Main VSI needs to re-initialized. 6339 **/ 6340 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 6341 { 6342 struct i40e_hw *hw = &pf->hw; 6343 u8 set_fc_aq_fail = 0; 6344 i40e_status ret; 6345 u32 v; 6346 6347 /* Now we wait for GRST to settle out. 6348 * We don't have to delete the VEBs or VSIs from the hw switch 6349 * because the reset will make them disappear. 6350 */ 6351 ret = i40e_pf_reset(hw); 6352 if (ret) { 6353 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 6354 set_bit(__I40E_RESET_FAILED, &pf->state); 6355 goto clear_recovery; 6356 } 6357 pf->pfr_count++; 6358 6359 if (test_bit(__I40E_DOWN, &pf->state)) 6360 goto clear_recovery; 6361 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 6362 6363 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 6364 ret = i40e_init_adminq(&pf->hw); 6365 if (ret) { 6366 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); 6367 goto clear_recovery; 6368 } 6369 6370 /* re-verify the eeprom if we just had an EMP reset */ 6371 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) 6372 i40e_verify_eeprom(pf); 6373 6374 i40e_clear_pxe_mode(hw); 6375 ret = i40e_get_capabilities(pf); 6376 if (ret) { 6377 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", 6378 ret); 6379 goto end_core_reset; 6380 } 6381 6382 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 6383 hw->func_caps.num_rx_qp, 6384 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 6385 if (ret) { 6386 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 6387 goto end_core_reset; 6388 } 6389 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 6390 if (ret) { 6391 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 6392 goto end_core_reset; 6393 } 6394 6395 #ifdef CONFIG_I40E_DCB 6396 ret = i40e_init_pf_dcb(pf); 6397 if (ret) { 6398 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 6399 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 6400 /* Continue without DCB enabled */ 6401 } 6402 #endif /* CONFIG_I40E_DCB */ 6403 #ifdef I40E_FCOE 6404 ret = i40e_init_pf_fcoe(pf); 6405 if (ret) 6406 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret); 6407 6408 #endif 6409 /* do basic switch setup */ 6410 ret = i40e_setup_pf_switch(pf, reinit); 6411 if (ret) 6412 goto end_core_reset; 6413 6414 /* driver is only interested in link up/down and module qualification 6415 * reports from firmware 6416 */ 6417 ret = i40e_aq_set_phy_int_mask(&pf->hw, 6418 I40E_AQ_EVENT_LINK_UPDOWN | 6419 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 6420 if (ret) 6421 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret); 6422 6423 /* make sure our flow control settings are restored */ 6424 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 6425 if (ret) 6426 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret); 6427 6428 /* Rebuild the VSIs and VEBs that existed before reset. 6429 * They are still in our local switch element arrays, so only 6430 * need to rebuild the switch model in the HW. 6431 * 6432 * If there were VEBs but the reconstitution failed, we'll try 6433 * try to recover minimal use by getting the basic PF VSI working. 6434 */ 6435 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 6436 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 6437 /* find the one VEB connected to the MAC, and find orphans */ 6438 for (v = 0; v < I40E_MAX_VEB; v++) { 6439 if (!pf->veb[v]) 6440 continue; 6441 6442 if (pf->veb[v]->uplink_seid == pf->mac_seid || 6443 pf->veb[v]->uplink_seid == 0) { 6444 ret = i40e_reconstitute_veb(pf->veb[v]); 6445 6446 if (!ret) 6447 continue; 6448 6449 /* If Main VEB failed, we're in deep doodoo, 6450 * so give up rebuilding the switch and set up 6451 * for minimal rebuild of PF VSI. 6452 * If orphan failed, we'll report the error 6453 * but try to keep going. 6454 */ 6455 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 6456 dev_info(&pf->pdev->dev, 6457 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 6458 ret); 6459 pf->vsi[pf->lan_vsi]->uplink_seid 6460 = pf->mac_seid; 6461 break; 6462 } else if (pf->veb[v]->uplink_seid == 0) { 6463 dev_info(&pf->pdev->dev, 6464 "rebuild of orphan VEB failed: %d\n", 6465 ret); 6466 } 6467 } 6468 } 6469 } 6470 6471 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 6472 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 6473 /* no VEB, so rebuild only the Main VSI */ 6474 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 6475 if (ret) { 6476 dev_info(&pf->pdev->dev, 6477 "rebuild of Main VSI failed: %d\n", ret); 6478 goto end_core_reset; 6479 } 6480 } 6481 6482 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 6483 (pf->hw.aq.fw_maj_ver < 4)) { 6484 msleep(75); 6485 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6486 if (ret) 6487 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 6488 pf->hw.aq.asq_last_status); 6489 } 6490 /* reinit the misc interrupt */ 6491 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6492 ret = i40e_setup_misc_vector(pf); 6493 6494 /* restart the VSIs that were rebuilt and running before the reset */ 6495 i40e_pf_unquiesce_all_vsi(pf); 6496 6497 if (pf->num_alloc_vfs) { 6498 for (v = 0; v < pf->num_alloc_vfs; v++) 6499 i40e_reset_vf(&pf->vf[v], true); 6500 } 6501 6502 /* tell the firmware that we're starting */ 6503 i40e_send_version(pf); 6504 6505 end_core_reset: 6506 clear_bit(__I40E_RESET_FAILED, &pf->state); 6507 clear_recovery: 6508 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 6509 } 6510 6511 /** 6512 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 6513 * @pf: board private structure 6514 * 6515 * Close up the VFs and other things in prep for a Core Reset, 6516 * then get ready to rebuild the world. 6517 **/ 6518 static void i40e_handle_reset_warning(struct i40e_pf *pf) 6519 { 6520 i40e_prep_for_reset(pf); 6521 i40e_reset_and_rebuild(pf, false); 6522 } 6523 6524 /** 6525 * i40e_handle_mdd_event 6526 * @pf: pointer to the PF structure 6527 * 6528 * Called from the MDD irq handler to identify possibly malicious vfs 6529 **/ 6530 static void i40e_handle_mdd_event(struct i40e_pf *pf) 6531 { 6532 struct i40e_hw *hw = &pf->hw; 6533 bool mdd_detected = false; 6534 bool pf_mdd_detected = false; 6535 struct i40e_vf *vf; 6536 u32 reg; 6537 int i; 6538 6539 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 6540 return; 6541 6542 /* find what triggered the MDD event */ 6543 reg = rd32(hw, I40E_GL_MDET_TX); 6544 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 6545 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 6546 I40E_GL_MDET_TX_PF_NUM_SHIFT; 6547 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 6548 I40E_GL_MDET_TX_VF_NUM_SHIFT; 6549 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 6550 I40E_GL_MDET_TX_EVENT_SHIFT; 6551 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 6552 I40E_GL_MDET_TX_QUEUE_SHIFT) - 6553 pf->hw.func_caps.base_queue; 6554 if (netif_msg_tx_err(pf)) 6555 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 6556 event, queue, pf_num, vf_num); 6557 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 6558 mdd_detected = true; 6559 } 6560 reg = rd32(hw, I40E_GL_MDET_RX); 6561 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 6562 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 6563 I40E_GL_MDET_RX_FUNCTION_SHIFT; 6564 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 6565 I40E_GL_MDET_RX_EVENT_SHIFT; 6566 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 6567 I40E_GL_MDET_RX_QUEUE_SHIFT) - 6568 pf->hw.func_caps.base_queue; 6569 if (netif_msg_rx_err(pf)) 6570 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 6571 event, queue, func); 6572 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 6573 mdd_detected = true; 6574 } 6575 6576 if (mdd_detected) { 6577 reg = rd32(hw, I40E_PF_MDET_TX); 6578 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 6579 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 6580 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 6581 pf_mdd_detected = true; 6582 } 6583 reg = rd32(hw, I40E_PF_MDET_RX); 6584 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 6585 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 6586 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 6587 pf_mdd_detected = true; 6588 } 6589 /* Queue belongs to the PF, initiate a reset */ 6590 if (pf_mdd_detected) { 6591 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6592 i40e_service_event_schedule(pf); 6593 } 6594 } 6595 6596 /* see if one of the VFs needs its hand slapped */ 6597 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 6598 vf = &(pf->vf[i]); 6599 reg = rd32(hw, I40E_VP_MDET_TX(i)); 6600 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 6601 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 6602 vf->num_mdd_events++; 6603 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 6604 i); 6605 } 6606 6607 reg = rd32(hw, I40E_VP_MDET_RX(i)); 6608 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 6609 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 6610 vf->num_mdd_events++; 6611 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 6612 i); 6613 } 6614 6615 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 6616 dev_info(&pf->pdev->dev, 6617 "Too many MDD events on VF %d, disabled\n", i); 6618 dev_info(&pf->pdev->dev, 6619 "Use PF Control I/F to re-enable the VF\n"); 6620 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 6621 } 6622 } 6623 6624 /* re-enable mdd interrupt cause */ 6625 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 6626 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 6627 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 6628 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 6629 i40e_flush(hw); 6630 } 6631 6632 #ifdef CONFIG_I40E_VXLAN 6633 /** 6634 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW 6635 * @pf: board private structure 6636 **/ 6637 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) 6638 { 6639 struct i40e_hw *hw = &pf->hw; 6640 i40e_status ret; 6641 __be16 port; 6642 int i; 6643 6644 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC)) 6645 return; 6646 6647 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC; 6648 6649 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 6650 if (pf->pending_vxlan_bitmap & (1 << i)) { 6651 pf->pending_vxlan_bitmap &= ~(1 << i); 6652 port = pf->vxlan_ports[i]; 6653 if (port) 6654 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port), 6655 I40E_AQC_TUNNEL_TYPE_VXLAN, 6656 NULL, NULL); 6657 else 6658 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 6659 6660 if (ret) { 6661 dev_info(&pf->pdev->dev, 6662 "%s vxlan port %d, index %d failed, err %d, aq_err %d\n", 6663 port ? "add" : "delete", 6664 ntohs(port), i, ret, 6665 pf->hw.aq.asq_last_status); 6666 pf->vxlan_ports[i] = 0; 6667 } 6668 } 6669 } 6670 } 6671 6672 #endif 6673 /** 6674 * i40e_service_task - Run the driver's async subtasks 6675 * @work: pointer to work_struct containing our data 6676 **/ 6677 static void i40e_service_task(struct work_struct *work) 6678 { 6679 struct i40e_pf *pf = container_of(work, 6680 struct i40e_pf, 6681 service_task); 6682 unsigned long start_time = jiffies; 6683 6684 /* don't bother with service tasks if a reset is in progress */ 6685 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 6686 i40e_service_event_complete(pf); 6687 return; 6688 } 6689 6690 i40e_reset_subtask(pf); 6691 i40e_handle_mdd_event(pf); 6692 i40e_vc_process_vflr_event(pf); 6693 i40e_watchdog_subtask(pf); 6694 i40e_fdir_reinit_subtask(pf); 6695 i40e_sync_filters_subtask(pf); 6696 #ifdef CONFIG_I40E_VXLAN 6697 i40e_sync_vxlan_filters_subtask(pf); 6698 #endif 6699 i40e_clean_adminq_subtask(pf); 6700 6701 i40e_service_event_complete(pf); 6702 6703 /* If the tasks have taken longer than one timer cycle or there 6704 * is more work to be done, reschedule the service task now 6705 * rather than wait for the timer to tick again. 6706 */ 6707 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 6708 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 6709 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 6710 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 6711 i40e_service_event_schedule(pf); 6712 } 6713 6714 /** 6715 * i40e_service_timer - timer callback 6716 * @data: pointer to PF struct 6717 **/ 6718 static void i40e_service_timer(unsigned long data) 6719 { 6720 struct i40e_pf *pf = (struct i40e_pf *)data; 6721 6722 mod_timer(&pf->service_timer, 6723 round_jiffies(jiffies + pf->service_timer_period)); 6724 i40e_service_event_schedule(pf); 6725 } 6726 6727 /** 6728 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 6729 * @vsi: the VSI being configured 6730 **/ 6731 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 6732 { 6733 struct i40e_pf *pf = vsi->back; 6734 6735 switch (vsi->type) { 6736 case I40E_VSI_MAIN: 6737 vsi->alloc_queue_pairs = pf->num_lan_qps; 6738 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6739 I40E_REQ_DESCRIPTOR_MULTIPLE); 6740 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6741 vsi->num_q_vectors = pf->num_lan_msix; 6742 else 6743 vsi->num_q_vectors = 1; 6744 6745 break; 6746 6747 case I40E_VSI_FDIR: 6748 vsi->alloc_queue_pairs = 1; 6749 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 6750 I40E_REQ_DESCRIPTOR_MULTIPLE); 6751 vsi->num_q_vectors = 1; 6752 break; 6753 6754 case I40E_VSI_VMDQ2: 6755 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 6756 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6757 I40E_REQ_DESCRIPTOR_MULTIPLE); 6758 vsi->num_q_vectors = pf->num_vmdq_msix; 6759 break; 6760 6761 case I40E_VSI_SRIOV: 6762 vsi->alloc_queue_pairs = pf->num_vf_qps; 6763 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6764 I40E_REQ_DESCRIPTOR_MULTIPLE); 6765 break; 6766 6767 #ifdef I40E_FCOE 6768 case I40E_VSI_FCOE: 6769 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 6770 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6771 I40E_REQ_DESCRIPTOR_MULTIPLE); 6772 vsi->num_q_vectors = pf->num_fcoe_msix; 6773 break; 6774 6775 #endif /* I40E_FCOE */ 6776 default: 6777 WARN_ON(1); 6778 return -ENODATA; 6779 } 6780 6781 return 0; 6782 } 6783 6784 /** 6785 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 6786 * @type: VSI pointer 6787 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 6788 * 6789 * On error: returns error code (negative) 6790 * On success: returns 0 6791 **/ 6792 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 6793 { 6794 int size; 6795 int ret = 0; 6796 6797 /* allocate memory for both Tx and Rx ring pointers */ 6798 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 6799 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 6800 if (!vsi->tx_rings) 6801 return -ENOMEM; 6802 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 6803 6804 if (alloc_qvectors) { 6805 /* allocate memory for q_vector pointers */ 6806 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 6807 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 6808 if (!vsi->q_vectors) { 6809 ret = -ENOMEM; 6810 goto err_vectors; 6811 } 6812 } 6813 return ret; 6814 6815 err_vectors: 6816 kfree(vsi->tx_rings); 6817 return ret; 6818 } 6819 6820 /** 6821 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 6822 * @pf: board private structure 6823 * @type: type of VSI 6824 * 6825 * On error: returns error code (negative) 6826 * On success: returns vsi index in PF (positive) 6827 **/ 6828 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 6829 { 6830 int ret = -ENODEV; 6831 struct i40e_vsi *vsi; 6832 int vsi_idx; 6833 int i; 6834 6835 /* Need to protect the allocation of the VSIs at the PF level */ 6836 mutex_lock(&pf->switch_mutex); 6837 6838 /* VSI list may be fragmented if VSI creation/destruction has 6839 * been happening. We can afford to do a quick scan to look 6840 * for any free VSIs in the list. 6841 * 6842 * find next empty vsi slot, looping back around if necessary 6843 */ 6844 i = pf->next_vsi; 6845 while (i < pf->num_alloc_vsi && pf->vsi[i]) 6846 i++; 6847 if (i >= pf->num_alloc_vsi) { 6848 i = 0; 6849 while (i < pf->next_vsi && pf->vsi[i]) 6850 i++; 6851 } 6852 6853 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 6854 vsi_idx = i; /* Found one! */ 6855 } else { 6856 ret = -ENODEV; 6857 goto unlock_pf; /* out of VSI slots! */ 6858 } 6859 pf->next_vsi = ++i; 6860 6861 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 6862 if (!vsi) { 6863 ret = -ENOMEM; 6864 goto unlock_pf; 6865 } 6866 vsi->type = type; 6867 vsi->back = pf; 6868 set_bit(__I40E_DOWN, &vsi->state); 6869 vsi->flags = 0; 6870 vsi->idx = vsi_idx; 6871 vsi->rx_itr_setting = pf->rx_itr_default; 6872 vsi->tx_itr_setting = pf->tx_itr_default; 6873 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 6874 pf->rss_table_size : 64; 6875 vsi->netdev_registered = false; 6876 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 6877 INIT_LIST_HEAD(&vsi->mac_filter_list); 6878 vsi->irqs_ready = false; 6879 6880 ret = i40e_set_num_rings_in_vsi(vsi); 6881 if (ret) 6882 goto err_rings; 6883 6884 ret = i40e_vsi_alloc_arrays(vsi, true); 6885 if (ret) 6886 goto err_rings; 6887 6888 /* Setup default MSIX irq handler for VSI */ 6889 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 6890 6891 pf->vsi[vsi_idx] = vsi; 6892 ret = vsi_idx; 6893 goto unlock_pf; 6894 6895 err_rings: 6896 pf->next_vsi = i - 1; 6897 kfree(vsi); 6898 unlock_pf: 6899 mutex_unlock(&pf->switch_mutex); 6900 return ret; 6901 } 6902 6903 /** 6904 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 6905 * @type: VSI pointer 6906 * @free_qvectors: a bool to specify if q_vectors need to be freed. 6907 * 6908 * On error: returns error code (negative) 6909 * On success: returns 0 6910 **/ 6911 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 6912 { 6913 /* free the ring and vector containers */ 6914 if (free_qvectors) { 6915 kfree(vsi->q_vectors); 6916 vsi->q_vectors = NULL; 6917 } 6918 kfree(vsi->tx_rings); 6919 vsi->tx_rings = NULL; 6920 vsi->rx_rings = NULL; 6921 } 6922 6923 /** 6924 * i40e_vsi_clear - Deallocate the VSI provided 6925 * @vsi: the VSI being un-configured 6926 **/ 6927 static int i40e_vsi_clear(struct i40e_vsi *vsi) 6928 { 6929 struct i40e_pf *pf; 6930 6931 if (!vsi) 6932 return 0; 6933 6934 if (!vsi->back) 6935 goto free_vsi; 6936 pf = vsi->back; 6937 6938 mutex_lock(&pf->switch_mutex); 6939 if (!pf->vsi[vsi->idx]) { 6940 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 6941 vsi->idx, vsi->idx, vsi, vsi->type); 6942 goto unlock_vsi; 6943 } 6944 6945 if (pf->vsi[vsi->idx] != vsi) { 6946 dev_err(&pf->pdev->dev, 6947 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 6948 pf->vsi[vsi->idx]->idx, 6949 pf->vsi[vsi->idx], 6950 pf->vsi[vsi->idx]->type, 6951 vsi->idx, vsi, vsi->type); 6952 goto unlock_vsi; 6953 } 6954 6955 /* updates the PF for this cleared vsi */ 6956 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 6957 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 6958 6959 i40e_vsi_free_arrays(vsi, true); 6960 6961 pf->vsi[vsi->idx] = NULL; 6962 if (vsi->idx < pf->next_vsi) 6963 pf->next_vsi = vsi->idx; 6964 6965 unlock_vsi: 6966 mutex_unlock(&pf->switch_mutex); 6967 free_vsi: 6968 kfree(vsi); 6969 6970 return 0; 6971 } 6972 6973 /** 6974 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 6975 * @vsi: the VSI being cleaned 6976 **/ 6977 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 6978 { 6979 int i; 6980 6981 if (vsi->tx_rings && vsi->tx_rings[0]) { 6982 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6983 kfree_rcu(vsi->tx_rings[i], rcu); 6984 vsi->tx_rings[i] = NULL; 6985 vsi->rx_rings[i] = NULL; 6986 } 6987 } 6988 } 6989 6990 /** 6991 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 6992 * @vsi: the VSI being configured 6993 **/ 6994 static int i40e_alloc_rings(struct i40e_vsi *vsi) 6995 { 6996 struct i40e_ring *tx_ring, *rx_ring; 6997 struct i40e_pf *pf = vsi->back; 6998 int i; 6999 7000 /* Set basic values in the rings to be used later during open() */ 7001 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7002 /* allocate space for both Tx and Rx in one shot */ 7003 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 7004 if (!tx_ring) 7005 goto err_out; 7006 7007 tx_ring->queue_index = i; 7008 tx_ring->reg_idx = vsi->base_queue + i; 7009 tx_ring->ring_active = false; 7010 tx_ring->vsi = vsi; 7011 tx_ring->netdev = vsi->netdev; 7012 tx_ring->dev = &pf->pdev->dev; 7013 tx_ring->count = vsi->num_desc; 7014 tx_ring->size = 0; 7015 tx_ring->dcb_tc = 0; 7016 vsi->tx_rings[i] = tx_ring; 7017 7018 rx_ring = &tx_ring[1]; 7019 rx_ring->queue_index = i; 7020 rx_ring->reg_idx = vsi->base_queue + i; 7021 rx_ring->ring_active = false; 7022 rx_ring->vsi = vsi; 7023 rx_ring->netdev = vsi->netdev; 7024 rx_ring->dev = &pf->pdev->dev; 7025 rx_ring->count = vsi->num_desc; 7026 rx_ring->size = 0; 7027 rx_ring->dcb_tc = 0; 7028 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) 7029 set_ring_16byte_desc_enabled(rx_ring); 7030 else 7031 clear_ring_16byte_desc_enabled(rx_ring); 7032 vsi->rx_rings[i] = rx_ring; 7033 } 7034 7035 return 0; 7036 7037 err_out: 7038 i40e_vsi_clear_rings(vsi); 7039 return -ENOMEM; 7040 } 7041 7042 /** 7043 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 7044 * @pf: board private structure 7045 * @vectors: the number of MSI-X vectors to request 7046 * 7047 * Returns the number of vectors reserved, or error 7048 **/ 7049 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 7050 { 7051 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 7052 I40E_MIN_MSIX, vectors); 7053 if (vectors < 0) { 7054 dev_info(&pf->pdev->dev, 7055 "MSI-X vector reservation failed: %d\n", vectors); 7056 vectors = 0; 7057 } 7058 7059 return vectors; 7060 } 7061 7062 /** 7063 * i40e_init_msix - Setup the MSIX capability 7064 * @pf: board private structure 7065 * 7066 * Work with the OS to set up the MSIX vectors needed. 7067 * 7068 * Returns the number of vectors reserved or negative on failure 7069 **/ 7070 static int i40e_init_msix(struct i40e_pf *pf) 7071 { 7072 struct i40e_hw *hw = &pf->hw; 7073 int vectors_left; 7074 int v_budget, i; 7075 int v_actual; 7076 7077 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7078 return -ENODEV; 7079 7080 /* The number of vectors we'll request will be comprised of: 7081 * - Add 1 for "other" cause for Admin Queue events, etc. 7082 * - The number of LAN queue pairs 7083 * - Queues being used for RSS. 7084 * We don't need as many as max_rss_size vectors. 7085 * use rss_size instead in the calculation since that 7086 * is governed by number of cpus in the system. 7087 * - assumes symmetric Tx/Rx pairing 7088 * - The number of VMDq pairs 7089 #ifdef I40E_FCOE 7090 * - The number of FCOE qps. 7091 #endif 7092 * Once we count this up, try the request. 7093 * 7094 * If we can't get what we want, we'll simplify to nearly nothing 7095 * and try again. If that still fails, we punt. 7096 */ 7097 vectors_left = hw->func_caps.num_msix_vectors; 7098 v_budget = 0; 7099 7100 /* reserve one vector for miscellaneous handler */ 7101 if (vectors_left) { 7102 v_budget++; 7103 vectors_left--; 7104 } 7105 7106 /* reserve vectors for the main PF traffic queues */ 7107 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left); 7108 vectors_left -= pf->num_lan_msix; 7109 v_budget += pf->num_lan_msix; 7110 7111 /* reserve one vector for sideband flow director */ 7112 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7113 if (vectors_left) { 7114 v_budget++; 7115 vectors_left--; 7116 } else { 7117 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7118 } 7119 } 7120 7121 #ifdef I40E_FCOE 7122 /* can we reserve enough for FCoE? */ 7123 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7124 if (!vectors_left) 7125 pf->num_fcoe_msix = 0; 7126 else if (vectors_left >= pf->num_fcoe_qps) 7127 pf->num_fcoe_msix = pf->num_fcoe_qps; 7128 else 7129 pf->num_fcoe_msix = 1; 7130 v_budget += pf->num_fcoe_msix; 7131 vectors_left -= pf->num_fcoe_msix; 7132 } 7133 7134 #endif 7135 /* any vectors left over go for VMDq support */ 7136 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 7137 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 7138 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 7139 7140 /* if we're short on vectors for what's desired, we limit 7141 * the queues per vmdq. If this is still more than are 7142 * available, the user will need to change the number of 7143 * queues/vectors used by the PF later with the ethtool 7144 * channels command 7145 */ 7146 if (vmdq_vecs < vmdq_vecs_wanted) 7147 pf->num_vmdq_qps = 1; 7148 pf->num_vmdq_msix = pf->num_vmdq_qps; 7149 7150 v_budget += vmdq_vecs; 7151 vectors_left -= vmdq_vecs; 7152 } 7153 7154 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 7155 GFP_KERNEL); 7156 if (!pf->msix_entries) 7157 return -ENOMEM; 7158 7159 for (i = 0; i < v_budget; i++) 7160 pf->msix_entries[i].entry = i; 7161 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 7162 7163 if (v_actual != v_budget) { 7164 /* If we have limited resources, we will start with no vectors 7165 * for the special features and then allocate vectors to some 7166 * of these features based on the policy and at the end disable 7167 * the features that did not get any vectors. 7168 */ 7169 #ifdef I40E_FCOE 7170 pf->num_fcoe_qps = 0; 7171 pf->num_fcoe_msix = 0; 7172 #endif 7173 pf->num_vmdq_msix = 0; 7174 } 7175 7176 if (v_actual < I40E_MIN_MSIX) { 7177 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 7178 kfree(pf->msix_entries); 7179 pf->msix_entries = NULL; 7180 return -ENODEV; 7181 7182 } else if (v_actual == I40E_MIN_MSIX) { 7183 /* Adjust for minimal MSIX use */ 7184 pf->num_vmdq_vsis = 0; 7185 pf->num_vmdq_qps = 0; 7186 pf->num_lan_qps = 1; 7187 pf->num_lan_msix = 1; 7188 7189 } else if (v_actual != v_budget) { 7190 int vec; 7191 7192 /* reserve the misc vector */ 7193 vec = v_actual - 1; 7194 7195 /* Scale vector usage down */ 7196 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 7197 pf->num_vmdq_vsis = 1; 7198 pf->num_vmdq_qps = 1; 7199 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7200 7201 /* partition out the remaining vectors */ 7202 switch (vec) { 7203 case 2: 7204 pf->num_lan_msix = 1; 7205 break; 7206 case 3: 7207 #ifdef I40E_FCOE 7208 /* give one vector to FCoE */ 7209 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7210 pf->num_lan_msix = 1; 7211 pf->num_fcoe_msix = 1; 7212 } 7213 #else 7214 pf->num_lan_msix = 2; 7215 #endif 7216 break; 7217 default: 7218 #ifdef I40E_FCOE 7219 /* give one vector to FCoE */ 7220 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7221 pf->num_fcoe_msix = 1; 7222 vec--; 7223 } 7224 #endif 7225 /* give the rest to the PF */ 7226 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps); 7227 break; 7228 } 7229 } 7230 7231 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 7232 (pf->num_vmdq_msix == 0)) { 7233 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 7234 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 7235 } 7236 #ifdef I40E_FCOE 7237 7238 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 7239 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 7240 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 7241 } 7242 #endif 7243 return v_actual; 7244 } 7245 7246 /** 7247 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 7248 * @vsi: the VSI being configured 7249 * @v_idx: index of the vector in the vsi struct 7250 * 7251 * We allocate one q_vector. If allocation fails we return -ENOMEM. 7252 **/ 7253 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) 7254 { 7255 struct i40e_q_vector *q_vector; 7256 7257 /* allocate q_vector */ 7258 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 7259 if (!q_vector) 7260 return -ENOMEM; 7261 7262 q_vector->vsi = vsi; 7263 q_vector->v_idx = v_idx; 7264 cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 7265 if (vsi->netdev) 7266 netif_napi_add(vsi->netdev, &q_vector->napi, 7267 i40e_napi_poll, NAPI_POLL_WEIGHT); 7268 7269 q_vector->rx.latency_range = I40E_LOW_LATENCY; 7270 q_vector->tx.latency_range = I40E_LOW_LATENCY; 7271 7272 /* tie q_vector and vsi together */ 7273 vsi->q_vectors[v_idx] = q_vector; 7274 7275 return 0; 7276 } 7277 7278 /** 7279 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 7280 * @vsi: the VSI being configured 7281 * 7282 * We allocate one q_vector per queue interrupt. If allocation fails we 7283 * return -ENOMEM. 7284 **/ 7285 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 7286 { 7287 struct i40e_pf *pf = vsi->back; 7288 int v_idx, num_q_vectors; 7289 int err; 7290 7291 /* if not MSIX, give the one vector only to the LAN VSI */ 7292 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7293 num_q_vectors = vsi->num_q_vectors; 7294 else if (vsi == pf->vsi[pf->lan_vsi]) 7295 num_q_vectors = 1; 7296 else 7297 return -EINVAL; 7298 7299 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 7300 err = i40e_vsi_alloc_q_vector(vsi, v_idx); 7301 if (err) 7302 goto err_out; 7303 } 7304 7305 return 0; 7306 7307 err_out: 7308 while (v_idx--) 7309 i40e_free_q_vector(vsi, v_idx); 7310 7311 return err; 7312 } 7313 7314 /** 7315 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 7316 * @pf: board private structure to initialize 7317 **/ 7318 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 7319 { 7320 int vectors = 0; 7321 ssize_t size; 7322 7323 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 7324 vectors = i40e_init_msix(pf); 7325 if (vectors < 0) { 7326 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 7327 #ifdef I40E_FCOE 7328 I40E_FLAG_FCOE_ENABLED | 7329 #endif 7330 I40E_FLAG_RSS_ENABLED | 7331 I40E_FLAG_DCB_CAPABLE | 7332 I40E_FLAG_SRIOV_ENABLED | 7333 I40E_FLAG_FD_SB_ENABLED | 7334 I40E_FLAG_FD_ATR_ENABLED | 7335 I40E_FLAG_VMDQ_ENABLED); 7336 7337 /* rework the queue expectations without MSIX */ 7338 i40e_determine_queue_usage(pf); 7339 } 7340 } 7341 7342 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 7343 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 7344 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 7345 vectors = pci_enable_msi(pf->pdev); 7346 if (vectors < 0) { 7347 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 7348 vectors); 7349 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 7350 } 7351 vectors = 1; /* one MSI or Legacy vector */ 7352 } 7353 7354 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 7355 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 7356 7357 /* set up vector assignment tracking */ 7358 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 7359 pf->irq_pile = kzalloc(size, GFP_KERNEL); 7360 if (!pf->irq_pile) { 7361 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 7362 return -ENOMEM; 7363 } 7364 pf->irq_pile->num_entries = vectors; 7365 pf->irq_pile->search_hint = 0; 7366 7367 /* track first vector for misc interrupts, ignore return */ 7368 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 7369 7370 return 0; 7371 } 7372 7373 /** 7374 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 7375 * @pf: board private structure 7376 * 7377 * This sets up the handler for MSIX 0, which is used to manage the 7378 * non-queue interrupts, e.g. AdminQ and errors. This is not used 7379 * when in MSI or Legacy interrupt mode. 7380 **/ 7381 static int i40e_setup_misc_vector(struct i40e_pf *pf) 7382 { 7383 struct i40e_hw *hw = &pf->hw; 7384 int err = 0; 7385 7386 /* Only request the irq if this is the first time through, and 7387 * not when we're rebuilding after a Reset 7388 */ 7389 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7390 err = request_irq(pf->msix_entries[0].vector, 7391 i40e_intr, 0, pf->int_name, pf); 7392 if (err) { 7393 dev_info(&pf->pdev->dev, 7394 "request_irq for %s failed: %d\n", 7395 pf->int_name, err); 7396 return -EFAULT; 7397 } 7398 } 7399 7400 i40e_enable_misc_int_causes(pf); 7401 7402 /* associate no queues to the misc vector */ 7403 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 7404 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 7405 7406 i40e_flush(hw); 7407 7408 i40e_irq_dynamic_enable_icr0(pf); 7409 7410 return err; 7411 } 7412 7413 /** 7414 * i40e_config_rss - Prepare for RSS if used 7415 * @pf: board private structure 7416 **/ 7417 static int i40e_config_rss(struct i40e_pf *pf) 7418 { 7419 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1]; 7420 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7421 struct i40e_hw *hw = &pf->hw; 7422 u32 lut = 0; 7423 int i, j; 7424 u64 hena; 7425 u32 reg_val; 7426 7427 netdev_rss_key_fill(rss_key, sizeof(rss_key)); 7428 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 7429 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]); 7430 7431 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 7432 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | 7433 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); 7434 hena |= I40E_DEFAULT_RSS_HENA; 7435 wr32(hw, I40E_PFQF_HENA(0), (u32)hena); 7436 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 7437 7438 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs); 7439 7440 /* Check capability and Set table size and register per hw expectation*/ 7441 reg_val = rd32(hw, I40E_PFQF_CTL_0); 7442 if (pf->rss_table_size == 512) 7443 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7444 else 7445 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7446 wr32(hw, I40E_PFQF_CTL_0, reg_val); 7447 7448 /* Populate the LUT with max no. of queues in round robin fashion */ 7449 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) { 7450 7451 /* The assumption is that lan qp count will be the highest 7452 * qp count for any PF VSI that needs RSS. 7453 * If multiple VSIs need RSS support, all the qp counts 7454 * for those VSIs should be a power of 2 for RSS to work. 7455 * If LAN VSI is the only consumer for RSS then this requirement 7456 * is not necessary. 7457 */ 7458 if (j == vsi->rss_size) 7459 j = 0; 7460 /* lut = 4-byte sliding window of 4 lut entries */ 7461 lut = (lut << 8) | (j & 7462 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); 7463 /* On i = 3, we have 4 entries in lut; write to the register */ 7464 if ((i & 3) == 3) 7465 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); 7466 } 7467 i40e_flush(hw); 7468 7469 return 0; 7470 } 7471 7472 /** 7473 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 7474 * @pf: board private structure 7475 * @queue_count: the requested queue count for rss. 7476 * 7477 * returns 0 if rss is not enabled, if enabled returns the final rss queue 7478 * count which may be different from the requested queue count. 7479 **/ 7480 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 7481 { 7482 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7483 int new_rss_size; 7484 7485 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 7486 return 0; 7487 7488 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 7489 7490 if (queue_count != vsi->num_queue_pairs) { 7491 vsi->req_queue_pairs = queue_count; 7492 i40e_prep_for_reset(pf); 7493 7494 pf->rss_size = new_rss_size; 7495 7496 i40e_reset_and_rebuild(pf, true); 7497 i40e_config_rss(pf); 7498 } 7499 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); 7500 return pf->rss_size; 7501 } 7502 7503 /** 7504 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition 7505 * @pf: board private structure 7506 **/ 7507 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) 7508 { 7509 i40e_status status; 7510 bool min_valid, max_valid; 7511 u32 max_bw, min_bw; 7512 7513 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 7514 &min_valid, &max_valid); 7515 7516 if (!status) { 7517 if (min_valid) 7518 pf->npar_min_bw = min_bw; 7519 if (max_valid) 7520 pf->npar_max_bw = max_bw; 7521 } 7522 7523 return status; 7524 } 7525 7526 /** 7527 * i40e_set_npar_bw_setting - Set BW settings for this PF partition 7528 * @pf: board private structure 7529 **/ 7530 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) 7531 { 7532 struct i40e_aqc_configure_partition_bw_data bw_data; 7533 i40e_status status; 7534 7535 /* Set the valid bit for this PF */ 7536 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id); 7537 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; 7538 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; 7539 7540 /* Set the new bandwidths */ 7541 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 7542 7543 return status; 7544 } 7545 7546 /** 7547 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition 7548 * @pf: board private structure 7549 **/ 7550 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) 7551 { 7552 /* Commit temporary BW setting to permanent NVM image */ 7553 enum i40e_admin_queue_err last_aq_status; 7554 i40e_status ret; 7555 u16 nvm_word; 7556 7557 if (pf->hw.partition_id != 1) { 7558 dev_info(&pf->pdev->dev, 7559 "Commit BW only works on partition 1! This is partition %d", 7560 pf->hw.partition_id); 7561 ret = I40E_NOT_SUPPORTED; 7562 goto bw_commit_out; 7563 } 7564 7565 /* Acquire NVM for read access */ 7566 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 7567 last_aq_status = pf->hw.aq.asq_last_status; 7568 if (ret) { 7569 dev_info(&pf->pdev->dev, 7570 "Cannot acquire NVM for read access, err %d: aq_err %d\n", 7571 ret, last_aq_status); 7572 goto bw_commit_out; 7573 } 7574 7575 /* Read word 0x10 of NVM - SW compatibility word 1 */ 7576 ret = i40e_aq_read_nvm(&pf->hw, 7577 I40E_SR_NVM_CONTROL_WORD, 7578 0x10, sizeof(nvm_word), &nvm_word, 7579 false, NULL); 7580 /* Save off last admin queue command status before releasing 7581 * the NVM 7582 */ 7583 last_aq_status = pf->hw.aq.asq_last_status; 7584 i40e_release_nvm(&pf->hw); 7585 if (ret) { 7586 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n", 7587 ret, last_aq_status); 7588 goto bw_commit_out; 7589 } 7590 7591 /* Wait a bit for NVM release to complete */ 7592 msleep(50); 7593 7594 /* Acquire NVM for write access */ 7595 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 7596 last_aq_status = pf->hw.aq.asq_last_status; 7597 if (ret) { 7598 dev_info(&pf->pdev->dev, 7599 "Cannot acquire NVM for write access, err %d: aq_err %d\n", 7600 ret, last_aq_status); 7601 goto bw_commit_out; 7602 } 7603 /* Write it back out unchanged to initiate update NVM, 7604 * which will force a write of the shadow (alt) RAM to 7605 * the NVM - thus storing the bandwidth values permanently. 7606 */ 7607 ret = i40e_aq_update_nvm(&pf->hw, 7608 I40E_SR_NVM_CONTROL_WORD, 7609 0x10, sizeof(nvm_word), 7610 &nvm_word, true, NULL); 7611 /* Save off last admin queue command status before releasing 7612 * the NVM 7613 */ 7614 last_aq_status = pf->hw.aq.asq_last_status; 7615 i40e_release_nvm(&pf->hw); 7616 if (ret) 7617 dev_info(&pf->pdev->dev, 7618 "BW settings NOT SAVED, err %d aq_err %d\n", 7619 ret, last_aq_status); 7620 bw_commit_out: 7621 7622 return ret; 7623 } 7624 7625 /** 7626 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 7627 * @pf: board private structure to initialize 7628 * 7629 * i40e_sw_init initializes the Adapter private data structure. 7630 * Fields are initialized based on PCI device information and 7631 * OS network device settings (MTU size). 7632 **/ 7633 static int i40e_sw_init(struct i40e_pf *pf) 7634 { 7635 int err = 0; 7636 int size; 7637 7638 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, 7639 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); 7640 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; 7641 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { 7642 if (I40E_DEBUG_USER & debug) 7643 pf->hw.debug_mask = debug; 7644 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), 7645 I40E_DEFAULT_MSG_ENABLE); 7646 } 7647 7648 /* Set default capability flags */ 7649 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 7650 I40E_FLAG_MSI_ENABLED | 7651 I40E_FLAG_MSIX_ENABLED; 7652 7653 if (iommu_present(&pci_bus_type)) 7654 pf->flags |= I40E_FLAG_RX_PS_ENABLED; 7655 else 7656 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED; 7657 7658 /* Set default ITR */ 7659 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 7660 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 7661 7662 /* Depending on PF configurations, it is possible that the RSS 7663 * maximum might end up larger than the available queues 7664 */ 7665 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; 7666 pf->rss_size = 1; 7667 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 7668 pf->rss_size_max = min_t(int, pf->rss_size_max, 7669 pf->hw.func_caps.num_tx_qp); 7670 if (pf->hw.func_caps.rss) { 7671 pf->flags |= I40E_FLAG_RSS_ENABLED; 7672 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); 7673 } 7674 7675 /* MFP mode enabled */ 7676 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { 7677 pf->flags |= I40E_FLAG_MFP_ENABLED; 7678 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 7679 if (i40e_get_npar_bw_setting(pf)) 7680 dev_warn(&pf->pdev->dev, 7681 "Could not get NPAR bw settings\n"); 7682 else 7683 dev_info(&pf->pdev->dev, 7684 "Min BW = %8.8x, Max BW = %8.8x\n", 7685 pf->npar_min_bw, pf->npar_max_bw); 7686 } 7687 7688 /* FW/NVM is not yet fixed in this regard */ 7689 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 7690 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 7691 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7692 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 7693 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { 7694 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7695 } else { 7696 dev_info(&pf->pdev->dev, 7697 "Flow Director Sideband mode Disabled in MFP mode\n"); 7698 } 7699 pf->fdir_pf_filter_count = 7700 pf->hw.func_caps.fd_filters_guaranteed; 7701 pf->hw.fdir_shared_filter_count = 7702 pf->hw.func_caps.fd_filters_best_effort; 7703 } 7704 7705 if (pf->hw.func_caps.vmdq) { 7706 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 7707 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 7708 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; 7709 } 7710 7711 #ifdef I40E_FCOE 7712 err = i40e_init_pf_fcoe(pf); 7713 if (err) 7714 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err); 7715 7716 #endif /* I40E_FCOE */ 7717 #ifdef CONFIG_PCI_IOV 7718 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 7719 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 7720 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 7721 pf->num_req_vfs = min_t(int, 7722 pf->hw.func_caps.num_vfs, 7723 I40E_MAX_VF_COUNT); 7724 } 7725 #endif /* CONFIG_PCI_IOV */ 7726 pf->eeprom_version = 0xDEAD; 7727 pf->lan_veb = I40E_NO_VEB; 7728 pf->lan_vsi = I40E_NO_VSI; 7729 7730 /* set up queue assignment tracking */ 7731 size = sizeof(struct i40e_lump_tracking) 7732 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 7733 pf->qp_pile = kzalloc(size, GFP_KERNEL); 7734 if (!pf->qp_pile) { 7735 err = -ENOMEM; 7736 goto sw_init_done; 7737 } 7738 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 7739 pf->qp_pile->search_hint = 0; 7740 7741 pf->tx_timeout_recovery_level = 1; 7742 7743 mutex_init(&pf->switch_mutex); 7744 7745 /* If NPAR is enabled nudge the Tx scheduler */ 7746 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) 7747 i40e_set_npar_bw_setting(pf); 7748 7749 sw_init_done: 7750 return err; 7751 } 7752 7753 /** 7754 * i40e_set_ntuple - set the ntuple feature flag and take action 7755 * @pf: board private structure to initialize 7756 * @features: the feature set that the stack is suggesting 7757 * 7758 * returns a bool to indicate if reset needs to happen 7759 **/ 7760 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 7761 { 7762 bool need_reset = false; 7763 7764 /* Check if Flow Director n-tuple support was enabled or disabled. If 7765 * the state changed, we need to reset. 7766 */ 7767 if (features & NETIF_F_NTUPLE) { 7768 /* Enable filters and mark for reset */ 7769 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 7770 need_reset = true; 7771 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7772 } else { 7773 /* turn off filters, mark for reset and clear SW filter list */ 7774 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7775 need_reset = true; 7776 i40e_fdir_filter_exit(pf); 7777 } 7778 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7779 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 7780 /* reset fd counters */ 7781 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 7782 pf->fdir_pf_active_filters = 0; 7783 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7784 if (I40E_DEBUG_FD & pf->hw.debug_mask) 7785 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 7786 /* if ATR was auto disabled it can be re-enabled. */ 7787 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 7788 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 7789 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 7790 } 7791 return need_reset; 7792 } 7793 7794 /** 7795 * i40e_set_features - set the netdev feature flags 7796 * @netdev: ptr to the netdev being adjusted 7797 * @features: the feature set that the stack is suggesting 7798 **/ 7799 static int i40e_set_features(struct net_device *netdev, 7800 netdev_features_t features) 7801 { 7802 struct i40e_netdev_priv *np = netdev_priv(netdev); 7803 struct i40e_vsi *vsi = np->vsi; 7804 struct i40e_pf *pf = vsi->back; 7805 bool need_reset; 7806 7807 if (features & NETIF_F_HW_VLAN_CTAG_RX) 7808 i40e_vlan_stripping_enable(vsi); 7809 else 7810 i40e_vlan_stripping_disable(vsi); 7811 7812 need_reset = i40e_set_ntuple(pf, features); 7813 7814 if (need_reset) 7815 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 7816 7817 return 0; 7818 } 7819 7820 #ifdef CONFIG_I40E_VXLAN 7821 /** 7822 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port 7823 * @pf: board private structure 7824 * @port: The UDP port to look up 7825 * 7826 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 7827 **/ 7828 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port) 7829 { 7830 u8 i; 7831 7832 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7833 if (pf->vxlan_ports[i] == port) 7834 return i; 7835 } 7836 7837 return i; 7838 } 7839 7840 /** 7841 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up 7842 * @netdev: This physical port's netdev 7843 * @sa_family: Socket Family that VXLAN is notifying us about 7844 * @port: New UDP port number that VXLAN started listening to 7845 **/ 7846 static void i40e_add_vxlan_port(struct net_device *netdev, 7847 sa_family_t sa_family, __be16 port) 7848 { 7849 struct i40e_netdev_priv *np = netdev_priv(netdev); 7850 struct i40e_vsi *vsi = np->vsi; 7851 struct i40e_pf *pf = vsi->back; 7852 u8 next_idx; 7853 u8 idx; 7854 7855 if (sa_family == AF_INET6) 7856 return; 7857 7858 idx = i40e_get_vxlan_port_idx(pf, port); 7859 7860 /* Check if port already exists */ 7861 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7862 netdev_info(netdev, "vxlan port %d already offloaded\n", 7863 ntohs(port)); 7864 return; 7865 } 7866 7867 /* Now check if there is space to add the new port */ 7868 next_idx = i40e_get_vxlan_port_idx(pf, 0); 7869 7870 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7871 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n", 7872 ntohs(port)); 7873 return; 7874 } 7875 7876 /* New port: add it and mark its index in the bitmap */ 7877 pf->vxlan_ports[next_idx] = port; 7878 pf->pending_vxlan_bitmap |= (1 << next_idx); 7879 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7880 7881 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port)); 7882 } 7883 7884 /** 7885 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away 7886 * @netdev: This physical port's netdev 7887 * @sa_family: Socket Family that VXLAN is notifying us about 7888 * @port: UDP port number that VXLAN stopped listening to 7889 **/ 7890 static void i40e_del_vxlan_port(struct net_device *netdev, 7891 sa_family_t sa_family, __be16 port) 7892 { 7893 struct i40e_netdev_priv *np = netdev_priv(netdev); 7894 struct i40e_vsi *vsi = np->vsi; 7895 struct i40e_pf *pf = vsi->back; 7896 u8 idx; 7897 7898 if (sa_family == AF_INET6) 7899 return; 7900 7901 idx = i40e_get_vxlan_port_idx(pf, port); 7902 7903 /* Check if port already exists */ 7904 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7905 /* if port exists, set it to 0 (mark for deletion) 7906 * and make it pending 7907 */ 7908 pf->vxlan_ports[idx] = 0; 7909 pf->pending_vxlan_bitmap |= (1 << idx); 7910 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7911 7912 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n", 7913 ntohs(port)); 7914 } else { 7915 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n", 7916 ntohs(port)); 7917 } 7918 } 7919 7920 #endif 7921 static int i40e_get_phys_port_id(struct net_device *netdev, 7922 struct netdev_phys_item_id *ppid) 7923 { 7924 struct i40e_netdev_priv *np = netdev_priv(netdev); 7925 struct i40e_pf *pf = np->vsi->back; 7926 struct i40e_hw *hw = &pf->hw; 7927 7928 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 7929 return -EOPNOTSUPP; 7930 7931 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 7932 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 7933 7934 return 0; 7935 } 7936 7937 /** 7938 * i40e_ndo_fdb_add - add an entry to the hardware database 7939 * @ndm: the input from the stack 7940 * @tb: pointer to array of nladdr (unused) 7941 * @dev: the net device pointer 7942 * @addr: the MAC address entry being added 7943 * @flags: instructions from stack about fdb operation 7944 */ 7945 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 7946 struct net_device *dev, 7947 const unsigned char *addr, u16 vid, 7948 u16 flags) 7949 { 7950 struct i40e_netdev_priv *np = netdev_priv(dev); 7951 struct i40e_pf *pf = np->vsi->back; 7952 int err = 0; 7953 7954 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 7955 return -EOPNOTSUPP; 7956 7957 if (vid) { 7958 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 7959 return -EINVAL; 7960 } 7961 7962 /* Hardware does not support aging addresses so if a 7963 * ndm_state is given only allow permanent addresses 7964 */ 7965 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 7966 netdev_info(dev, "FDB only supports static addresses\n"); 7967 return -EINVAL; 7968 } 7969 7970 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 7971 err = dev_uc_add_excl(dev, addr); 7972 else if (is_multicast_ether_addr(addr)) 7973 err = dev_mc_add_excl(dev, addr); 7974 else 7975 err = -EINVAL; 7976 7977 /* Only return duplicate errors if NLM_F_EXCL is set */ 7978 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 7979 err = 0; 7980 7981 return err; 7982 } 7983 7984 #ifdef HAVE_BRIDGE_ATTRIBS 7985 /** 7986 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 7987 * @dev: the netdev being configured 7988 * @nlh: RTNL message 7989 * 7990 * Inserts a new hardware bridge if not already created and 7991 * enables the bridging mode requested (VEB or VEPA). If the 7992 * hardware bridge has already been inserted and the request 7993 * is to change the mode then that requires a PF reset to 7994 * allow rebuild of the components with required hardware 7995 * bridge mode enabled. 7996 **/ 7997 static int i40e_ndo_bridge_setlink(struct net_device *dev, 7998 struct nlmsghdr *nlh) 7999 { 8000 struct i40e_netdev_priv *np = netdev_priv(dev); 8001 struct i40e_vsi *vsi = np->vsi; 8002 struct i40e_pf *pf = vsi->back; 8003 struct i40e_veb *veb = NULL; 8004 struct nlattr *attr, *br_spec; 8005 int i, rem; 8006 8007 /* Only for PF VSI for now */ 8008 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8009 return -EOPNOTSUPP; 8010 8011 /* Find the HW bridge for PF VSI */ 8012 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8013 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8014 veb = pf->veb[i]; 8015 } 8016 8017 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 8018 8019 nla_for_each_nested(attr, br_spec, rem) { 8020 __u16 mode; 8021 8022 if (nla_type(attr) != IFLA_BRIDGE_MODE) 8023 continue; 8024 8025 mode = nla_get_u16(attr); 8026 if ((mode != BRIDGE_MODE_VEPA) && 8027 (mode != BRIDGE_MODE_VEB)) 8028 return -EINVAL; 8029 8030 /* Insert a new HW bridge */ 8031 if (!veb) { 8032 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8033 vsi->tc_config.enabled_tc); 8034 if (veb) { 8035 veb->bridge_mode = mode; 8036 i40e_config_bridge_mode(veb); 8037 } else { 8038 /* No Bridge HW offload available */ 8039 return -ENOENT; 8040 } 8041 break; 8042 } else if (mode != veb->bridge_mode) { 8043 /* Existing HW bridge but different mode needs reset */ 8044 veb->bridge_mode = mode; 8045 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 8046 if (mode == BRIDGE_MODE_VEB) 8047 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 8048 else 8049 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 8050 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 8051 break; 8052 } 8053 } 8054 8055 return 0; 8056 } 8057 8058 /** 8059 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 8060 * @skb: skb buff 8061 * @pid: process id 8062 * @seq: RTNL message seq # 8063 * @dev: the netdev being configured 8064 * @filter_mask: unused 8065 * 8066 * Return the mode in which the hardware bridge is operating in 8067 * i.e VEB or VEPA. 8068 **/ 8069 #ifdef HAVE_BRIDGE_FILTER 8070 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8071 struct net_device *dev, 8072 u32 filter_mask, int nlflags) 8073 #else 8074 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8075 struct net_device *dev, int nlflags) 8076 #endif /* HAVE_BRIDGE_FILTER */ 8077 { 8078 struct i40e_netdev_priv *np = netdev_priv(dev); 8079 struct i40e_vsi *vsi = np->vsi; 8080 struct i40e_pf *pf = vsi->back; 8081 struct i40e_veb *veb = NULL; 8082 int i; 8083 8084 /* Only for PF VSI for now */ 8085 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8086 return -EOPNOTSUPP; 8087 8088 /* Find the HW bridge for the PF VSI */ 8089 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8090 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8091 veb = pf->veb[i]; 8092 } 8093 8094 if (!veb) 8095 return 0; 8096 8097 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 8098 nlflags, 0, 0, filter_mask, NULL); 8099 } 8100 #endif /* HAVE_BRIDGE_ATTRIBS */ 8101 8102 static const struct net_device_ops i40e_netdev_ops = { 8103 .ndo_open = i40e_open, 8104 .ndo_stop = i40e_close, 8105 .ndo_start_xmit = i40e_lan_xmit_frame, 8106 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 8107 .ndo_set_rx_mode = i40e_set_rx_mode, 8108 .ndo_validate_addr = eth_validate_addr, 8109 .ndo_set_mac_address = i40e_set_mac, 8110 .ndo_change_mtu = i40e_change_mtu, 8111 .ndo_do_ioctl = i40e_ioctl, 8112 .ndo_tx_timeout = i40e_tx_timeout, 8113 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 8114 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 8115 #ifdef CONFIG_NET_POLL_CONTROLLER 8116 .ndo_poll_controller = i40e_netpoll, 8117 #endif 8118 .ndo_setup_tc = i40e_setup_tc, 8119 #ifdef I40E_FCOE 8120 .ndo_fcoe_enable = i40e_fcoe_enable, 8121 .ndo_fcoe_disable = i40e_fcoe_disable, 8122 #endif 8123 .ndo_set_features = i40e_set_features, 8124 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 8125 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 8126 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 8127 .ndo_get_vf_config = i40e_ndo_get_vf_config, 8128 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 8129 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 8130 #ifdef CONFIG_I40E_VXLAN 8131 .ndo_add_vxlan_port = i40e_add_vxlan_port, 8132 .ndo_del_vxlan_port = i40e_del_vxlan_port, 8133 #endif 8134 .ndo_get_phys_port_id = i40e_get_phys_port_id, 8135 .ndo_fdb_add = i40e_ndo_fdb_add, 8136 #ifdef HAVE_BRIDGE_ATTRIBS 8137 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 8138 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 8139 #endif /* HAVE_BRIDGE_ATTRIBS */ 8140 }; 8141 8142 /** 8143 * i40e_config_netdev - Setup the netdev flags 8144 * @vsi: the VSI being configured 8145 * 8146 * Returns 0 on success, negative value on failure 8147 **/ 8148 static int i40e_config_netdev(struct i40e_vsi *vsi) 8149 { 8150 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 8151 struct i40e_pf *pf = vsi->back; 8152 struct i40e_hw *hw = &pf->hw; 8153 struct i40e_netdev_priv *np; 8154 struct net_device *netdev; 8155 u8 mac_addr[ETH_ALEN]; 8156 int etherdev_size; 8157 8158 etherdev_size = sizeof(struct i40e_netdev_priv); 8159 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 8160 if (!netdev) 8161 return -ENOMEM; 8162 8163 vsi->netdev = netdev; 8164 np = netdev_priv(netdev); 8165 np->vsi = vsi; 8166 8167 netdev->hw_enc_features |= NETIF_F_IP_CSUM | 8168 NETIF_F_GSO_UDP_TUNNEL | 8169 NETIF_F_TSO; 8170 8171 netdev->features = NETIF_F_SG | 8172 NETIF_F_IP_CSUM | 8173 NETIF_F_SCTP_CSUM | 8174 NETIF_F_HIGHDMA | 8175 NETIF_F_GSO_UDP_TUNNEL | 8176 NETIF_F_HW_VLAN_CTAG_TX | 8177 NETIF_F_HW_VLAN_CTAG_RX | 8178 NETIF_F_HW_VLAN_CTAG_FILTER | 8179 NETIF_F_IPV6_CSUM | 8180 NETIF_F_TSO | 8181 NETIF_F_TSO_ECN | 8182 NETIF_F_TSO6 | 8183 NETIF_F_RXCSUM | 8184 NETIF_F_RXHASH | 8185 0; 8186 8187 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 8188 netdev->features |= NETIF_F_NTUPLE; 8189 8190 /* copy netdev features into list of user selectable features */ 8191 netdev->hw_features |= netdev->features; 8192 8193 if (vsi->type == I40E_VSI_MAIN) { 8194 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 8195 ether_addr_copy(mac_addr, hw->mac.perm_addr); 8196 /* The following steps are necessary to prevent reception 8197 * of tagged packets - some older NVM configurations load a 8198 * default a MAC-VLAN filter that accepts any tagged packet 8199 * which must be replaced by a normal filter. 8200 */ 8201 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) 8202 i40e_add_filter(vsi, mac_addr, 8203 I40E_VLAN_ANY, false, true); 8204 } else { 8205 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 8206 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 8207 pf->vsi[pf->lan_vsi]->netdev->name); 8208 random_ether_addr(mac_addr); 8209 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); 8210 } 8211 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 8212 8213 ether_addr_copy(netdev->dev_addr, mac_addr); 8214 ether_addr_copy(netdev->perm_addr, mac_addr); 8215 /* vlan gets same features (except vlan offload) 8216 * after any tweaks for specific VSI types 8217 */ 8218 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | 8219 NETIF_F_HW_VLAN_CTAG_RX | 8220 NETIF_F_HW_VLAN_CTAG_FILTER); 8221 netdev->priv_flags |= IFF_UNICAST_FLT; 8222 netdev->priv_flags |= IFF_SUPP_NOFCS; 8223 /* Setup netdev TC information */ 8224 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 8225 8226 netdev->netdev_ops = &i40e_netdev_ops; 8227 netdev->watchdog_timeo = 5 * HZ; 8228 i40e_set_ethtool_ops(netdev); 8229 #ifdef I40E_FCOE 8230 i40e_fcoe_config_netdev(netdev, vsi); 8231 #endif 8232 8233 return 0; 8234 } 8235 8236 /** 8237 * i40e_vsi_delete - Delete a VSI from the switch 8238 * @vsi: the VSI being removed 8239 * 8240 * Returns 0 on success, negative value on failure 8241 **/ 8242 static void i40e_vsi_delete(struct i40e_vsi *vsi) 8243 { 8244 /* remove default VSI is not allowed */ 8245 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 8246 return; 8247 8248 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 8249 } 8250 8251 /** 8252 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 8253 * @vsi: the VSI being queried 8254 * 8255 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 8256 **/ 8257 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 8258 { 8259 struct i40e_veb *veb; 8260 struct i40e_pf *pf = vsi->back; 8261 8262 /* Uplink is not a bridge so default to VEB */ 8263 if (vsi->veb_idx == I40E_NO_VEB) 8264 return 1; 8265 8266 veb = pf->veb[vsi->veb_idx]; 8267 /* Uplink is a bridge in VEPA mode */ 8268 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA)) 8269 return 0; 8270 8271 /* Uplink is a bridge in VEB mode */ 8272 return 1; 8273 } 8274 8275 /** 8276 * i40e_add_vsi - Add a VSI to the switch 8277 * @vsi: the VSI being configured 8278 * 8279 * This initializes a VSI context depending on the VSI type to be added and 8280 * passes it down to the add_vsi aq command. 8281 **/ 8282 static int i40e_add_vsi(struct i40e_vsi *vsi) 8283 { 8284 int ret = -ENODEV; 8285 struct i40e_mac_filter *f, *ftmp; 8286 struct i40e_pf *pf = vsi->back; 8287 struct i40e_hw *hw = &pf->hw; 8288 struct i40e_vsi_context ctxt; 8289 u8 enabled_tc = 0x1; /* TC0 enabled */ 8290 int f_count = 0; 8291 8292 memset(&ctxt, 0, sizeof(ctxt)); 8293 switch (vsi->type) { 8294 case I40E_VSI_MAIN: 8295 /* The PF's main VSI is already setup as part of the 8296 * device initialization, so we'll not bother with 8297 * the add_vsi call, but we will retrieve the current 8298 * VSI context. 8299 */ 8300 ctxt.seid = pf->main_vsi_seid; 8301 ctxt.pf_num = pf->hw.pf_id; 8302 ctxt.vf_num = 0; 8303 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 8304 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8305 if (ret) { 8306 dev_info(&pf->pdev->dev, 8307 "couldn't get PF vsi config, err %d, aq_err %d\n", 8308 ret, pf->hw.aq.asq_last_status); 8309 return -ENOENT; 8310 } 8311 vsi->info = ctxt.info; 8312 vsi->info.valid_sections = 0; 8313 8314 vsi->seid = ctxt.seid; 8315 vsi->id = ctxt.vsi_number; 8316 8317 enabled_tc = i40e_pf_get_tc_map(pf); 8318 8319 /* MFP mode setup queue map and update VSI */ 8320 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 8321 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 8322 memset(&ctxt, 0, sizeof(ctxt)); 8323 ctxt.seid = pf->main_vsi_seid; 8324 ctxt.pf_num = pf->hw.pf_id; 8325 ctxt.vf_num = 0; 8326 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 8327 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 8328 if (ret) { 8329 dev_info(&pf->pdev->dev, 8330 "update vsi failed, aq_err=%d\n", 8331 pf->hw.aq.asq_last_status); 8332 ret = -ENOENT; 8333 goto err; 8334 } 8335 /* update the local VSI info queue map */ 8336 i40e_vsi_update_queue_map(vsi, &ctxt); 8337 vsi->info.valid_sections = 0; 8338 } else { 8339 /* Default/Main VSI is only enabled for TC0 8340 * reconfigure it to enable all TCs that are 8341 * available on the port in SFP mode. 8342 * For MFP case the iSCSI PF would use this 8343 * flow to enable LAN+iSCSI TC. 8344 */ 8345 ret = i40e_vsi_config_tc(vsi, enabled_tc); 8346 if (ret) { 8347 dev_info(&pf->pdev->dev, 8348 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", 8349 enabled_tc, ret, 8350 pf->hw.aq.asq_last_status); 8351 ret = -ENOENT; 8352 } 8353 } 8354 break; 8355 8356 case I40E_VSI_FDIR: 8357 ctxt.pf_num = hw->pf_id; 8358 ctxt.vf_num = 0; 8359 ctxt.uplink_seid = vsi->uplink_seid; 8360 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8361 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8362 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 8363 (i40e_is_vsi_uplink_mode_veb(vsi))) { 8364 ctxt.info.valid_sections |= 8365 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8366 ctxt.info.switch_id = 8367 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8368 } 8369 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8370 break; 8371 8372 case I40E_VSI_VMDQ2: 8373 ctxt.pf_num = hw->pf_id; 8374 ctxt.vf_num = 0; 8375 ctxt.uplink_seid = vsi->uplink_seid; 8376 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8377 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 8378 8379 /* This VSI is connected to VEB so the switch_id 8380 * should be set to zero by default. 8381 */ 8382 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8383 ctxt.info.valid_sections |= 8384 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8385 ctxt.info.switch_id = 8386 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8387 } 8388 8389 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8390 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8391 break; 8392 8393 case I40E_VSI_SRIOV: 8394 ctxt.pf_num = hw->pf_id; 8395 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 8396 ctxt.uplink_seid = vsi->uplink_seid; 8397 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8398 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 8399 8400 /* This VSI is connected to VEB so the switch_id 8401 * should be set to zero by default. 8402 */ 8403 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8404 ctxt.info.valid_sections |= 8405 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8406 ctxt.info.switch_id = 8407 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8408 } 8409 8410 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 8411 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 8412 if (pf->vf[vsi->vf_id].spoofchk) { 8413 ctxt.info.valid_sections |= 8414 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 8415 ctxt.info.sec_flags |= 8416 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 8417 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 8418 } 8419 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8420 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8421 break; 8422 8423 #ifdef I40E_FCOE 8424 case I40E_VSI_FCOE: 8425 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 8426 if (ret) { 8427 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 8428 return ret; 8429 } 8430 break; 8431 8432 #endif /* I40E_FCOE */ 8433 default: 8434 return -ENODEV; 8435 } 8436 8437 if (vsi->type != I40E_VSI_MAIN) { 8438 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 8439 if (ret) { 8440 dev_info(&vsi->back->pdev->dev, 8441 "add vsi failed, aq_err=%d\n", 8442 vsi->back->hw.aq.asq_last_status); 8443 ret = -ENOENT; 8444 goto err; 8445 } 8446 vsi->info = ctxt.info; 8447 vsi->info.valid_sections = 0; 8448 vsi->seid = ctxt.seid; 8449 vsi->id = ctxt.vsi_number; 8450 } 8451 8452 /* If macvlan filters already exist, force them to get loaded */ 8453 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 8454 f->changed = true; 8455 f_count++; 8456 8457 if (f->is_laa && vsi->type == I40E_VSI_MAIN) { 8458 struct i40e_aqc_remove_macvlan_element_data element; 8459 8460 memset(&element, 0, sizeof(element)); 8461 ether_addr_copy(element.mac_addr, f->macaddr); 8462 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 8463 ret = i40e_aq_remove_macvlan(hw, vsi->seid, 8464 &element, 1, NULL); 8465 if (ret) { 8466 /* some older FW has a different default */ 8467 element.flags |= 8468 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 8469 i40e_aq_remove_macvlan(hw, vsi->seid, 8470 &element, 1, NULL); 8471 } 8472 8473 i40e_aq_mac_address_write(hw, 8474 I40E_AQC_WRITE_TYPE_LAA_WOL, 8475 f->macaddr, NULL); 8476 } 8477 } 8478 if (f_count) { 8479 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 8480 pf->flags |= I40E_FLAG_FILTER_SYNC; 8481 } 8482 8483 /* Update VSI BW information */ 8484 ret = i40e_vsi_get_bw_info(vsi); 8485 if (ret) { 8486 dev_info(&pf->pdev->dev, 8487 "couldn't get vsi bw info, err %d, aq_err %d\n", 8488 ret, pf->hw.aq.asq_last_status); 8489 /* VSI is already added so not tearing that up */ 8490 ret = 0; 8491 } 8492 8493 err: 8494 return ret; 8495 } 8496 8497 /** 8498 * i40e_vsi_release - Delete a VSI and free its resources 8499 * @vsi: the VSI being removed 8500 * 8501 * Returns 0 on success or < 0 on error 8502 **/ 8503 int i40e_vsi_release(struct i40e_vsi *vsi) 8504 { 8505 struct i40e_mac_filter *f, *ftmp; 8506 struct i40e_veb *veb = NULL; 8507 struct i40e_pf *pf; 8508 u16 uplink_seid; 8509 int i, n; 8510 8511 pf = vsi->back; 8512 8513 /* release of a VEB-owner or last VSI is not allowed */ 8514 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 8515 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 8516 vsi->seid, vsi->uplink_seid); 8517 return -ENODEV; 8518 } 8519 if (vsi == pf->vsi[pf->lan_vsi] && 8520 !test_bit(__I40E_DOWN, &pf->state)) { 8521 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 8522 return -ENODEV; 8523 } 8524 8525 uplink_seid = vsi->uplink_seid; 8526 if (vsi->type != I40E_VSI_SRIOV) { 8527 if (vsi->netdev_registered) { 8528 vsi->netdev_registered = false; 8529 if (vsi->netdev) { 8530 /* results in a call to i40e_close() */ 8531 unregister_netdev(vsi->netdev); 8532 } 8533 } else { 8534 i40e_vsi_close(vsi); 8535 } 8536 i40e_vsi_disable_irq(vsi); 8537 } 8538 8539 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) 8540 i40e_del_filter(vsi, f->macaddr, f->vlan, 8541 f->is_vf, f->is_netdev); 8542 i40e_sync_vsi_filters(vsi); 8543 8544 i40e_vsi_delete(vsi); 8545 i40e_vsi_free_q_vectors(vsi); 8546 if (vsi->netdev) { 8547 free_netdev(vsi->netdev); 8548 vsi->netdev = NULL; 8549 } 8550 i40e_vsi_clear_rings(vsi); 8551 i40e_vsi_clear(vsi); 8552 8553 /* If this was the last thing on the VEB, except for the 8554 * controlling VSI, remove the VEB, which puts the controlling 8555 * VSI onto the next level down in the switch. 8556 * 8557 * Well, okay, there's one more exception here: don't remove 8558 * the orphan VEBs yet. We'll wait for an explicit remove request 8559 * from up the network stack. 8560 */ 8561 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 8562 if (pf->vsi[i] && 8563 pf->vsi[i]->uplink_seid == uplink_seid && 8564 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8565 n++; /* count the VSIs */ 8566 } 8567 } 8568 for (i = 0; i < I40E_MAX_VEB; i++) { 8569 if (!pf->veb[i]) 8570 continue; 8571 if (pf->veb[i]->uplink_seid == uplink_seid) 8572 n++; /* count the VEBs */ 8573 if (pf->veb[i]->seid == uplink_seid) 8574 veb = pf->veb[i]; 8575 } 8576 if (n == 0 && veb && veb->uplink_seid != 0) 8577 i40e_veb_release(veb); 8578 8579 return 0; 8580 } 8581 8582 /** 8583 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 8584 * @vsi: ptr to the VSI 8585 * 8586 * This should only be called after i40e_vsi_mem_alloc() which allocates the 8587 * corresponding SW VSI structure and initializes num_queue_pairs for the 8588 * newly allocated VSI. 8589 * 8590 * Returns 0 on success or negative on failure 8591 **/ 8592 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 8593 { 8594 int ret = -ENOENT; 8595 struct i40e_pf *pf = vsi->back; 8596 8597 if (vsi->q_vectors[0]) { 8598 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 8599 vsi->seid); 8600 return -EEXIST; 8601 } 8602 8603 if (vsi->base_vector) { 8604 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 8605 vsi->seid, vsi->base_vector); 8606 return -EEXIST; 8607 } 8608 8609 ret = i40e_vsi_alloc_q_vectors(vsi); 8610 if (ret) { 8611 dev_info(&pf->pdev->dev, 8612 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 8613 vsi->num_q_vectors, vsi->seid, ret); 8614 vsi->num_q_vectors = 0; 8615 goto vector_setup_out; 8616 } 8617 8618 if (vsi->num_q_vectors) 8619 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 8620 vsi->num_q_vectors, vsi->idx); 8621 if (vsi->base_vector < 0) { 8622 dev_info(&pf->pdev->dev, 8623 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 8624 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 8625 i40e_vsi_free_q_vectors(vsi); 8626 ret = -ENOENT; 8627 goto vector_setup_out; 8628 } 8629 8630 vector_setup_out: 8631 return ret; 8632 } 8633 8634 /** 8635 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 8636 * @vsi: pointer to the vsi. 8637 * 8638 * This re-allocates a vsi's queue resources. 8639 * 8640 * Returns pointer to the successfully allocated and configured VSI sw struct 8641 * on success, otherwise returns NULL on failure. 8642 **/ 8643 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 8644 { 8645 struct i40e_pf *pf = vsi->back; 8646 u8 enabled_tc; 8647 int ret; 8648 8649 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 8650 i40e_vsi_clear_rings(vsi); 8651 8652 i40e_vsi_free_arrays(vsi, false); 8653 i40e_set_num_rings_in_vsi(vsi); 8654 ret = i40e_vsi_alloc_arrays(vsi, false); 8655 if (ret) 8656 goto err_vsi; 8657 8658 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 8659 if (ret < 0) { 8660 dev_info(&pf->pdev->dev, 8661 "failed to get tracking for %d queues for VSI %d err=%d\n", 8662 vsi->alloc_queue_pairs, vsi->seid, ret); 8663 goto err_vsi; 8664 } 8665 vsi->base_queue = ret; 8666 8667 /* Update the FW view of the VSI. Force a reset of TC and queue 8668 * layout configurations. 8669 */ 8670 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 8671 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 8672 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 8673 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 8674 8675 /* assign it some queues */ 8676 ret = i40e_alloc_rings(vsi); 8677 if (ret) 8678 goto err_rings; 8679 8680 /* map all of the rings to the q_vectors */ 8681 i40e_vsi_map_rings_to_vectors(vsi); 8682 return vsi; 8683 8684 err_rings: 8685 i40e_vsi_free_q_vectors(vsi); 8686 if (vsi->netdev_registered) { 8687 vsi->netdev_registered = false; 8688 unregister_netdev(vsi->netdev); 8689 free_netdev(vsi->netdev); 8690 vsi->netdev = NULL; 8691 } 8692 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8693 err_vsi: 8694 i40e_vsi_clear(vsi); 8695 return NULL; 8696 } 8697 8698 /** 8699 * i40e_vsi_setup - Set up a VSI by a given type 8700 * @pf: board private structure 8701 * @type: VSI type 8702 * @uplink_seid: the switch element to link to 8703 * @param1: usage depends upon VSI type. For VF types, indicates VF id 8704 * 8705 * This allocates the sw VSI structure and its queue resources, then add a VSI 8706 * to the identified VEB. 8707 * 8708 * Returns pointer to the successfully allocated and configure VSI sw struct on 8709 * success, otherwise returns NULL on failure. 8710 **/ 8711 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 8712 u16 uplink_seid, u32 param1) 8713 { 8714 struct i40e_vsi *vsi = NULL; 8715 struct i40e_veb *veb = NULL; 8716 int ret, i; 8717 int v_idx; 8718 8719 /* The requested uplink_seid must be either 8720 * - the PF's port seid 8721 * no VEB is needed because this is the PF 8722 * or this is a Flow Director special case VSI 8723 * - seid of an existing VEB 8724 * - seid of a VSI that owns an existing VEB 8725 * - seid of a VSI that doesn't own a VEB 8726 * a new VEB is created and the VSI becomes the owner 8727 * - seid of the PF VSI, which is what creates the first VEB 8728 * this is a special case of the previous 8729 * 8730 * Find which uplink_seid we were given and create a new VEB if needed 8731 */ 8732 for (i = 0; i < I40E_MAX_VEB; i++) { 8733 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 8734 veb = pf->veb[i]; 8735 break; 8736 } 8737 } 8738 8739 if (!veb && uplink_seid != pf->mac_seid) { 8740 8741 for (i = 0; i < pf->num_alloc_vsi; i++) { 8742 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 8743 vsi = pf->vsi[i]; 8744 break; 8745 } 8746 } 8747 if (!vsi) { 8748 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 8749 uplink_seid); 8750 return NULL; 8751 } 8752 8753 if (vsi->uplink_seid == pf->mac_seid) 8754 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 8755 vsi->tc_config.enabled_tc); 8756 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 8757 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8758 vsi->tc_config.enabled_tc); 8759 if (veb) { 8760 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 8761 dev_info(&vsi->back->pdev->dev, 8762 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n", 8763 __func__); 8764 return NULL; 8765 } 8766 /* We come up by default in VEPA mode if SRIOV is not 8767 * already enabled, in which case we can't force VEPA 8768 * mode. 8769 */ 8770 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 8771 veb->bridge_mode = BRIDGE_MODE_VEPA; 8772 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 8773 } 8774 i40e_config_bridge_mode(veb); 8775 } 8776 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8777 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8778 veb = pf->veb[i]; 8779 } 8780 if (!veb) { 8781 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 8782 return NULL; 8783 } 8784 8785 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 8786 uplink_seid = veb->seid; 8787 } 8788 8789 /* get vsi sw struct */ 8790 v_idx = i40e_vsi_mem_alloc(pf, type); 8791 if (v_idx < 0) 8792 goto err_alloc; 8793 vsi = pf->vsi[v_idx]; 8794 if (!vsi) 8795 goto err_alloc; 8796 vsi->type = type; 8797 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 8798 8799 if (type == I40E_VSI_MAIN) 8800 pf->lan_vsi = v_idx; 8801 else if (type == I40E_VSI_SRIOV) 8802 vsi->vf_id = param1; 8803 /* assign it some queues */ 8804 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 8805 vsi->idx); 8806 if (ret < 0) { 8807 dev_info(&pf->pdev->dev, 8808 "failed to get tracking for %d queues for VSI %d err=%d\n", 8809 vsi->alloc_queue_pairs, vsi->seid, ret); 8810 goto err_vsi; 8811 } 8812 vsi->base_queue = ret; 8813 8814 /* get a VSI from the hardware */ 8815 vsi->uplink_seid = uplink_seid; 8816 ret = i40e_add_vsi(vsi); 8817 if (ret) 8818 goto err_vsi; 8819 8820 switch (vsi->type) { 8821 /* setup the netdev if needed */ 8822 case I40E_VSI_MAIN: 8823 case I40E_VSI_VMDQ2: 8824 case I40E_VSI_FCOE: 8825 ret = i40e_config_netdev(vsi); 8826 if (ret) 8827 goto err_netdev; 8828 ret = register_netdev(vsi->netdev); 8829 if (ret) 8830 goto err_netdev; 8831 vsi->netdev_registered = true; 8832 netif_carrier_off(vsi->netdev); 8833 #ifdef CONFIG_I40E_DCB 8834 /* Setup DCB netlink interface */ 8835 i40e_dcbnl_setup(vsi); 8836 #endif /* CONFIG_I40E_DCB */ 8837 /* fall through */ 8838 8839 case I40E_VSI_FDIR: 8840 /* set up vectors and rings if needed */ 8841 ret = i40e_vsi_setup_vectors(vsi); 8842 if (ret) 8843 goto err_msix; 8844 8845 ret = i40e_alloc_rings(vsi); 8846 if (ret) 8847 goto err_rings; 8848 8849 /* map all of the rings to the q_vectors */ 8850 i40e_vsi_map_rings_to_vectors(vsi); 8851 8852 i40e_vsi_reset_stats(vsi); 8853 break; 8854 8855 default: 8856 /* no netdev or rings for the other VSI types */ 8857 break; 8858 } 8859 8860 return vsi; 8861 8862 err_rings: 8863 i40e_vsi_free_q_vectors(vsi); 8864 err_msix: 8865 if (vsi->netdev_registered) { 8866 vsi->netdev_registered = false; 8867 unregister_netdev(vsi->netdev); 8868 free_netdev(vsi->netdev); 8869 vsi->netdev = NULL; 8870 } 8871 err_netdev: 8872 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8873 err_vsi: 8874 i40e_vsi_clear(vsi); 8875 err_alloc: 8876 return NULL; 8877 } 8878 8879 /** 8880 * i40e_veb_get_bw_info - Query VEB BW information 8881 * @veb: the veb to query 8882 * 8883 * Query the Tx scheduler BW configuration data for given VEB 8884 **/ 8885 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 8886 { 8887 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 8888 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 8889 struct i40e_pf *pf = veb->pf; 8890 struct i40e_hw *hw = &pf->hw; 8891 u32 tc_bw_max; 8892 int ret = 0; 8893 int i; 8894 8895 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 8896 &bw_data, NULL); 8897 if (ret) { 8898 dev_info(&pf->pdev->dev, 8899 "query veb bw config failed, aq_err=%d\n", 8900 hw->aq.asq_last_status); 8901 goto out; 8902 } 8903 8904 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 8905 &ets_data, NULL); 8906 if (ret) { 8907 dev_info(&pf->pdev->dev, 8908 "query veb bw ets config failed, aq_err=%d\n", 8909 hw->aq.asq_last_status); 8910 goto out; 8911 } 8912 8913 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 8914 veb->bw_max_quanta = ets_data.tc_bw_max; 8915 veb->is_abs_credits = bw_data.absolute_credits_enable; 8916 veb->enabled_tc = ets_data.tc_valid_bits; 8917 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 8918 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 8919 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 8920 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 8921 veb->bw_tc_limit_credits[i] = 8922 le16_to_cpu(bw_data.tc_bw_limits[i]); 8923 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 8924 } 8925 8926 out: 8927 return ret; 8928 } 8929 8930 /** 8931 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 8932 * @pf: board private structure 8933 * 8934 * On error: returns error code (negative) 8935 * On success: returns vsi index in PF (positive) 8936 **/ 8937 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 8938 { 8939 int ret = -ENOENT; 8940 struct i40e_veb *veb; 8941 int i; 8942 8943 /* Need to protect the allocation of switch elements at the PF level */ 8944 mutex_lock(&pf->switch_mutex); 8945 8946 /* VEB list may be fragmented if VEB creation/destruction has 8947 * been happening. We can afford to do a quick scan to look 8948 * for any free slots in the list. 8949 * 8950 * find next empty veb slot, looping back around if necessary 8951 */ 8952 i = 0; 8953 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 8954 i++; 8955 if (i >= I40E_MAX_VEB) { 8956 ret = -ENOMEM; 8957 goto err_alloc_veb; /* out of VEB slots! */ 8958 } 8959 8960 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 8961 if (!veb) { 8962 ret = -ENOMEM; 8963 goto err_alloc_veb; 8964 } 8965 veb->pf = pf; 8966 veb->idx = i; 8967 veb->enabled_tc = 1; 8968 8969 pf->veb[i] = veb; 8970 ret = i; 8971 err_alloc_veb: 8972 mutex_unlock(&pf->switch_mutex); 8973 return ret; 8974 } 8975 8976 /** 8977 * i40e_switch_branch_release - Delete a branch of the switch tree 8978 * @branch: where to start deleting 8979 * 8980 * This uses recursion to find the tips of the branch to be 8981 * removed, deleting until we get back to and can delete this VEB. 8982 **/ 8983 static void i40e_switch_branch_release(struct i40e_veb *branch) 8984 { 8985 struct i40e_pf *pf = branch->pf; 8986 u16 branch_seid = branch->seid; 8987 u16 veb_idx = branch->idx; 8988 int i; 8989 8990 /* release any VEBs on this VEB - RECURSION */ 8991 for (i = 0; i < I40E_MAX_VEB; i++) { 8992 if (!pf->veb[i]) 8993 continue; 8994 if (pf->veb[i]->uplink_seid == branch->seid) 8995 i40e_switch_branch_release(pf->veb[i]); 8996 } 8997 8998 /* Release the VSIs on this VEB, but not the owner VSI. 8999 * 9000 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 9001 * the VEB itself, so don't use (*branch) after this loop. 9002 */ 9003 for (i = 0; i < pf->num_alloc_vsi; i++) { 9004 if (!pf->vsi[i]) 9005 continue; 9006 if (pf->vsi[i]->uplink_seid == branch_seid && 9007 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 9008 i40e_vsi_release(pf->vsi[i]); 9009 } 9010 } 9011 9012 /* There's one corner case where the VEB might not have been 9013 * removed, so double check it here and remove it if needed. 9014 * This case happens if the veb was created from the debugfs 9015 * commands and no VSIs were added to it. 9016 */ 9017 if (pf->veb[veb_idx]) 9018 i40e_veb_release(pf->veb[veb_idx]); 9019 } 9020 9021 /** 9022 * i40e_veb_clear - remove veb struct 9023 * @veb: the veb to remove 9024 **/ 9025 static void i40e_veb_clear(struct i40e_veb *veb) 9026 { 9027 if (!veb) 9028 return; 9029 9030 if (veb->pf) { 9031 struct i40e_pf *pf = veb->pf; 9032 9033 mutex_lock(&pf->switch_mutex); 9034 if (pf->veb[veb->idx] == veb) 9035 pf->veb[veb->idx] = NULL; 9036 mutex_unlock(&pf->switch_mutex); 9037 } 9038 9039 kfree(veb); 9040 } 9041 9042 /** 9043 * i40e_veb_release - Delete a VEB and free its resources 9044 * @veb: the VEB being removed 9045 **/ 9046 void i40e_veb_release(struct i40e_veb *veb) 9047 { 9048 struct i40e_vsi *vsi = NULL; 9049 struct i40e_pf *pf; 9050 int i, n = 0; 9051 9052 pf = veb->pf; 9053 9054 /* find the remaining VSI and check for extras */ 9055 for (i = 0; i < pf->num_alloc_vsi; i++) { 9056 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 9057 n++; 9058 vsi = pf->vsi[i]; 9059 } 9060 } 9061 if (n != 1) { 9062 dev_info(&pf->pdev->dev, 9063 "can't remove VEB %d with %d VSIs left\n", 9064 veb->seid, n); 9065 return; 9066 } 9067 9068 /* move the remaining VSI to uplink veb */ 9069 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 9070 if (veb->uplink_seid) { 9071 vsi->uplink_seid = veb->uplink_seid; 9072 if (veb->uplink_seid == pf->mac_seid) 9073 vsi->veb_idx = I40E_NO_VEB; 9074 else 9075 vsi->veb_idx = veb->veb_idx; 9076 } else { 9077 /* floating VEB */ 9078 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 9079 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 9080 } 9081 9082 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 9083 i40e_veb_clear(veb); 9084 } 9085 9086 /** 9087 * i40e_add_veb - create the VEB in the switch 9088 * @veb: the VEB to be instantiated 9089 * @vsi: the controlling VSI 9090 **/ 9091 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 9092 { 9093 bool is_default = false; 9094 bool is_cloud = false; 9095 int ret; 9096 9097 /* get a VEB from the hardware */ 9098 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, 9099 veb->enabled_tc, is_default, 9100 is_cloud, &veb->seid, NULL); 9101 if (ret) { 9102 dev_info(&veb->pf->pdev->dev, 9103 "couldn't add VEB, err %d, aq_err %d\n", 9104 ret, veb->pf->hw.aq.asq_last_status); 9105 return -EPERM; 9106 } 9107 9108 /* get statistics counter */ 9109 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, 9110 &veb->stats_idx, NULL, NULL, NULL); 9111 if (ret) { 9112 dev_info(&veb->pf->pdev->dev, 9113 "couldn't get VEB statistics idx, err %d, aq_err %d\n", 9114 ret, veb->pf->hw.aq.asq_last_status); 9115 return -EPERM; 9116 } 9117 ret = i40e_veb_get_bw_info(veb); 9118 if (ret) { 9119 dev_info(&veb->pf->pdev->dev, 9120 "couldn't get VEB bw info, err %d, aq_err %d\n", 9121 ret, veb->pf->hw.aq.asq_last_status); 9122 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); 9123 return -ENOENT; 9124 } 9125 9126 vsi->uplink_seid = veb->seid; 9127 vsi->veb_idx = veb->idx; 9128 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 9129 9130 return 0; 9131 } 9132 9133 /** 9134 * i40e_veb_setup - Set up a VEB 9135 * @pf: board private structure 9136 * @flags: VEB setup flags 9137 * @uplink_seid: the switch element to link to 9138 * @vsi_seid: the initial VSI seid 9139 * @enabled_tc: Enabled TC bit-map 9140 * 9141 * This allocates the sw VEB structure and links it into the switch 9142 * It is possible and legal for this to be a duplicate of an already 9143 * existing VEB. It is also possible for both uplink and vsi seids 9144 * to be zero, in order to create a floating VEB. 9145 * 9146 * Returns pointer to the successfully allocated VEB sw struct on 9147 * success, otherwise returns NULL on failure. 9148 **/ 9149 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 9150 u16 uplink_seid, u16 vsi_seid, 9151 u8 enabled_tc) 9152 { 9153 struct i40e_veb *veb, *uplink_veb = NULL; 9154 int vsi_idx, veb_idx; 9155 int ret; 9156 9157 /* if one seid is 0, the other must be 0 to create a floating relay */ 9158 if ((uplink_seid == 0 || vsi_seid == 0) && 9159 (uplink_seid + vsi_seid != 0)) { 9160 dev_info(&pf->pdev->dev, 9161 "one, not both seid's are 0: uplink=%d vsi=%d\n", 9162 uplink_seid, vsi_seid); 9163 return NULL; 9164 } 9165 9166 /* make sure there is such a vsi and uplink */ 9167 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 9168 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 9169 break; 9170 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 9171 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 9172 vsi_seid); 9173 return NULL; 9174 } 9175 9176 if (uplink_seid && uplink_seid != pf->mac_seid) { 9177 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 9178 if (pf->veb[veb_idx] && 9179 pf->veb[veb_idx]->seid == uplink_seid) { 9180 uplink_veb = pf->veb[veb_idx]; 9181 break; 9182 } 9183 } 9184 if (!uplink_veb) { 9185 dev_info(&pf->pdev->dev, 9186 "uplink seid %d not found\n", uplink_seid); 9187 return NULL; 9188 } 9189 } 9190 9191 /* get veb sw struct */ 9192 veb_idx = i40e_veb_mem_alloc(pf); 9193 if (veb_idx < 0) 9194 goto err_alloc; 9195 veb = pf->veb[veb_idx]; 9196 veb->flags = flags; 9197 veb->uplink_seid = uplink_seid; 9198 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 9199 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 9200 9201 /* create the VEB in the switch */ 9202 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 9203 if (ret) 9204 goto err_veb; 9205 if (vsi_idx == pf->lan_vsi) 9206 pf->lan_veb = veb->idx; 9207 9208 return veb; 9209 9210 err_veb: 9211 i40e_veb_clear(veb); 9212 err_alloc: 9213 return NULL; 9214 } 9215 9216 /** 9217 * i40e_setup_pf_switch_element - set PF vars based on switch type 9218 * @pf: board private structure 9219 * @ele: element we are building info from 9220 * @num_reported: total number of elements 9221 * @printconfig: should we print the contents 9222 * 9223 * helper function to assist in extracting a few useful SEID values. 9224 **/ 9225 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 9226 struct i40e_aqc_switch_config_element_resp *ele, 9227 u16 num_reported, bool printconfig) 9228 { 9229 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 9230 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 9231 u8 element_type = ele->element_type; 9232 u16 seid = le16_to_cpu(ele->seid); 9233 9234 if (printconfig) 9235 dev_info(&pf->pdev->dev, 9236 "type=%d seid=%d uplink=%d downlink=%d\n", 9237 element_type, seid, uplink_seid, downlink_seid); 9238 9239 switch (element_type) { 9240 case I40E_SWITCH_ELEMENT_TYPE_MAC: 9241 pf->mac_seid = seid; 9242 break; 9243 case I40E_SWITCH_ELEMENT_TYPE_VEB: 9244 /* Main VEB? */ 9245 if (uplink_seid != pf->mac_seid) 9246 break; 9247 if (pf->lan_veb == I40E_NO_VEB) { 9248 int v; 9249 9250 /* find existing or else empty VEB */ 9251 for (v = 0; v < I40E_MAX_VEB; v++) { 9252 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 9253 pf->lan_veb = v; 9254 break; 9255 } 9256 } 9257 if (pf->lan_veb == I40E_NO_VEB) { 9258 v = i40e_veb_mem_alloc(pf); 9259 if (v < 0) 9260 break; 9261 pf->lan_veb = v; 9262 } 9263 } 9264 9265 pf->veb[pf->lan_veb]->seid = seid; 9266 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 9267 pf->veb[pf->lan_veb]->pf = pf; 9268 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 9269 break; 9270 case I40E_SWITCH_ELEMENT_TYPE_VSI: 9271 if (num_reported != 1) 9272 break; 9273 /* This is immediately after a reset so we can assume this is 9274 * the PF's VSI 9275 */ 9276 pf->mac_seid = uplink_seid; 9277 pf->pf_seid = downlink_seid; 9278 pf->main_vsi_seid = seid; 9279 if (printconfig) 9280 dev_info(&pf->pdev->dev, 9281 "pf_seid=%d main_vsi_seid=%d\n", 9282 pf->pf_seid, pf->main_vsi_seid); 9283 break; 9284 case I40E_SWITCH_ELEMENT_TYPE_PF: 9285 case I40E_SWITCH_ELEMENT_TYPE_VF: 9286 case I40E_SWITCH_ELEMENT_TYPE_EMP: 9287 case I40E_SWITCH_ELEMENT_TYPE_BMC: 9288 case I40E_SWITCH_ELEMENT_TYPE_PE: 9289 case I40E_SWITCH_ELEMENT_TYPE_PA: 9290 /* ignore these for now */ 9291 break; 9292 default: 9293 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 9294 element_type, seid); 9295 break; 9296 } 9297 } 9298 9299 /** 9300 * i40e_fetch_switch_configuration - Get switch config from firmware 9301 * @pf: board private structure 9302 * @printconfig: should we print the contents 9303 * 9304 * Get the current switch configuration from the device and 9305 * extract a few useful SEID values. 9306 **/ 9307 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 9308 { 9309 struct i40e_aqc_get_switch_config_resp *sw_config; 9310 u16 next_seid = 0; 9311 int ret = 0; 9312 u8 *aq_buf; 9313 int i; 9314 9315 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 9316 if (!aq_buf) 9317 return -ENOMEM; 9318 9319 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 9320 do { 9321 u16 num_reported, num_total; 9322 9323 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 9324 I40E_AQ_LARGE_BUF, 9325 &next_seid, NULL); 9326 if (ret) { 9327 dev_info(&pf->pdev->dev, 9328 "get switch config failed %d aq_err=%x\n", 9329 ret, pf->hw.aq.asq_last_status); 9330 kfree(aq_buf); 9331 return -ENOENT; 9332 } 9333 9334 num_reported = le16_to_cpu(sw_config->header.num_reported); 9335 num_total = le16_to_cpu(sw_config->header.num_total); 9336 9337 if (printconfig) 9338 dev_info(&pf->pdev->dev, 9339 "header: %d reported %d total\n", 9340 num_reported, num_total); 9341 9342 for (i = 0; i < num_reported; i++) { 9343 struct i40e_aqc_switch_config_element_resp *ele = 9344 &sw_config->element[i]; 9345 9346 i40e_setup_pf_switch_element(pf, ele, num_reported, 9347 printconfig); 9348 } 9349 } while (next_seid != 0); 9350 9351 kfree(aq_buf); 9352 return ret; 9353 } 9354 9355 /** 9356 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 9357 * @pf: board private structure 9358 * @reinit: if the Main VSI needs to re-initialized. 9359 * 9360 * Returns 0 on success, negative value on failure 9361 **/ 9362 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 9363 { 9364 int ret; 9365 9366 /* find out what's out there already */ 9367 ret = i40e_fetch_switch_configuration(pf, false); 9368 if (ret) { 9369 dev_info(&pf->pdev->dev, 9370 "couldn't fetch switch config, err %d, aq_err %d\n", 9371 ret, pf->hw.aq.asq_last_status); 9372 return ret; 9373 } 9374 i40e_pf_reset_stats(pf); 9375 9376 /* first time setup */ 9377 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 9378 struct i40e_vsi *vsi = NULL; 9379 u16 uplink_seid; 9380 9381 /* Set up the PF VSI associated with the PF's main VSI 9382 * that is already in the HW switch 9383 */ 9384 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 9385 uplink_seid = pf->veb[pf->lan_veb]->seid; 9386 else 9387 uplink_seid = pf->mac_seid; 9388 if (pf->lan_vsi == I40E_NO_VSI) 9389 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 9390 else if (reinit) 9391 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 9392 if (!vsi) { 9393 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 9394 i40e_fdir_teardown(pf); 9395 return -EAGAIN; 9396 } 9397 } else { 9398 /* force a reset of TC and queue layout configurations */ 9399 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 9400 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 9401 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 9402 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 9403 } 9404 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 9405 9406 i40e_fdir_sb_setup(pf); 9407 9408 /* Setup static PF queue filter control settings */ 9409 ret = i40e_setup_pf_filter_control(pf); 9410 if (ret) { 9411 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 9412 ret); 9413 /* Failure here should not stop continuing other steps */ 9414 } 9415 9416 /* enable RSS in the HW, even for only one queue, as the stack can use 9417 * the hash 9418 */ 9419 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 9420 i40e_config_rss(pf); 9421 9422 /* fill in link information and enable LSE reporting */ 9423 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); 9424 i40e_link_event(pf); 9425 9426 /* Initialize user-specific link properties */ 9427 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 9428 I40E_AQ_AN_COMPLETED) ? true : false); 9429 9430 i40e_ptp_init(pf); 9431 9432 return ret; 9433 } 9434 9435 /** 9436 * i40e_determine_queue_usage - Work out queue distribution 9437 * @pf: board private structure 9438 **/ 9439 static void i40e_determine_queue_usage(struct i40e_pf *pf) 9440 { 9441 int queues_left; 9442 9443 pf->num_lan_qps = 0; 9444 #ifdef I40E_FCOE 9445 pf->num_fcoe_qps = 0; 9446 #endif 9447 9448 /* Find the max queues to be put into basic use. We'll always be 9449 * using TC0, whether or not DCB is running, and TC0 will get the 9450 * big RSS set. 9451 */ 9452 queues_left = pf->hw.func_caps.num_tx_qp; 9453 9454 if ((queues_left == 1) || 9455 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 9456 /* one qp for PF, no queues for anything else */ 9457 queues_left = 0; 9458 pf->rss_size = pf->num_lan_qps = 1; 9459 9460 /* make sure all the fancies are disabled */ 9461 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9462 #ifdef I40E_FCOE 9463 I40E_FLAG_FCOE_ENABLED | 9464 #endif 9465 I40E_FLAG_FD_SB_ENABLED | 9466 I40E_FLAG_FD_ATR_ENABLED | 9467 I40E_FLAG_DCB_CAPABLE | 9468 I40E_FLAG_SRIOV_ENABLED | 9469 I40E_FLAG_VMDQ_ENABLED); 9470 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 9471 I40E_FLAG_FD_SB_ENABLED | 9472 I40E_FLAG_FD_ATR_ENABLED | 9473 I40E_FLAG_DCB_CAPABLE))) { 9474 /* one qp for PF */ 9475 pf->rss_size = pf->num_lan_qps = 1; 9476 queues_left -= pf->num_lan_qps; 9477 9478 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9479 #ifdef I40E_FCOE 9480 I40E_FLAG_FCOE_ENABLED | 9481 #endif 9482 I40E_FLAG_FD_SB_ENABLED | 9483 I40E_FLAG_FD_ATR_ENABLED | 9484 I40E_FLAG_DCB_ENABLED | 9485 I40E_FLAG_VMDQ_ENABLED); 9486 } else { 9487 /* Not enough queues for all TCs */ 9488 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 9489 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 9490 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9491 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 9492 } 9493 pf->num_lan_qps = max_t(int, pf->rss_size_max, 9494 num_online_cpus()); 9495 pf->num_lan_qps = min_t(int, pf->num_lan_qps, 9496 pf->hw.func_caps.num_tx_qp); 9497 9498 queues_left -= pf->num_lan_qps; 9499 } 9500 9501 #ifdef I40E_FCOE 9502 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 9503 if (I40E_DEFAULT_FCOE <= queues_left) { 9504 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 9505 } else if (I40E_MINIMUM_FCOE <= queues_left) { 9506 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 9507 } else { 9508 pf->num_fcoe_qps = 0; 9509 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 9510 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 9511 } 9512 9513 queues_left -= pf->num_fcoe_qps; 9514 } 9515 9516 #endif 9517 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9518 if (queues_left > 1) { 9519 queues_left -= 1; /* save 1 queue for FD */ 9520 } else { 9521 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 9522 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 9523 } 9524 } 9525 9526 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9527 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 9528 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 9529 (queues_left / pf->num_vf_qps)); 9530 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 9531 } 9532 9533 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 9534 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 9535 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 9536 (queues_left / pf->num_vmdq_qps)); 9537 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 9538 } 9539 9540 pf->queues_left = queues_left; 9541 #ifdef I40E_FCOE 9542 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 9543 #endif 9544 } 9545 9546 /** 9547 * i40e_setup_pf_filter_control - Setup PF static filter control 9548 * @pf: PF to be setup 9549 * 9550 * i40e_setup_pf_filter_control sets up a PF's initial filter control 9551 * settings. If PE/FCoE are enabled then it will also set the per PF 9552 * based filter sizes required for them. It also enables Flow director, 9553 * ethertype and macvlan type filter settings for the pf. 9554 * 9555 * Returns 0 on success, negative on failure 9556 **/ 9557 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 9558 { 9559 struct i40e_filter_control_settings *settings = &pf->filter_settings; 9560 9561 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 9562 9563 /* Flow Director is enabled */ 9564 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 9565 settings->enable_fdir = true; 9566 9567 /* Ethtype and MACVLAN filters enabled for PF */ 9568 settings->enable_ethtype = true; 9569 settings->enable_macvlan = true; 9570 9571 if (i40e_set_filter_control(&pf->hw, settings)) 9572 return -ENOENT; 9573 9574 return 0; 9575 } 9576 9577 #define INFO_STRING_LEN 255 9578 static void i40e_print_features(struct i40e_pf *pf) 9579 { 9580 struct i40e_hw *hw = &pf->hw; 9581 char *buf, *string; 9582 9583 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); 9584 if (!string) { 9585 dev_err(&pf->pdev->dev, "Features string allocation failed\n"); 9586 return; 9587 } 9588 9589 buf = string; 9590 9591 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id); 9592 #ifdef CONFIG_PCI_IOV 9593 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs); 9594 #endif 9595 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ", 9596 pf->hw.func_caps.num_vsis, 9597 pf->vsi[pf->lan_vsi]->num_queue_pairs, 9598 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF"); 9599 9600 if (pf->flags & I40E_FLAG_RSS_ENABLED) 9601 buf += sprintf(buf, "RSS "); 9602 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 9603 buf += sprintf(buf, "FD_ATR "); 9604 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9605 buf += sprintf(buf, "FD_SB "); 9606 buf += sprintf(buf, "NTUPLE "); 9607 } 9608 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 9609 buf += sprintf(buf, "DCB "); 9610 if (pf->flags & I40E_FLAG_PTP) 9611 buf += sprintf(buf, "PTP "); 9612 #ifdef I40E_FCOE 9613 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 9614 buf += sprintf(buf, "FCOE "); 9615 #endif 9616 9617 BUG_ON(buf > (string + INFO_STRING_LEN)); 9618 dev_info(&pf->pdev->dev, "%s\n", string); 9619 kfree(string); 9620 } 9621 9622 /** 9623 * i40e_probe - Device initialization routine 9624 * @pdev: PCI device information struct 9625 * @ent: entry in i40e_pci_tbl 9626 * 9627 * i40e_probe initializes a PF identified by a pci_dev structure. 9628 * The OS initialization, configuring of the PF private structure, 9629 * and a hardware reset occur. 9630 * 9631 * Returns 0 on success, negative on failure 9632 **/ 9633 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 9634 { 9635 struct i40e_aq_get_phy_abilities_resp abilities; 9636 unsigned long ioremap_len; 9637 struct i40e_pf *pf; 9638 struct i40e_hw *hw; 9639 static u16 pfs_found; 9640 u16 link_status; 9641 int err = 0; 9642 u32 len; 9643 u32 i; 9644 9645 err = pci_enable_device_mem(pdev); 9646 if (err) 9647 return err; 9648 9649 /* set up for high or low dma */ 9650 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9651 if (err) { 9652 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9653 if (err) { 9654 dev_err(&pdev->dev, 9655 "DMA configuration failed: 0x%x\n", err); 9656 goto err_dma; 9657 } 9658 } 9659 9660 /* set up pci connections */ 9661 err = pci_request_selected_regions(pdev, pci_select_bars(pdev, 9662 IORESOURCE_MEM), i40e_driver_name); 9663 if (err) { 9664 dev_info(&pdev->dev, 9665 "pci_request_selected_regions failed %d\n", err); 9666 goto err_pci_reg; 9667 } 9668 9669 pci_enable_pcie_error_reporting(pdev); 9670 pci_set_master(pdev); 9671 9672 /* Now that we have a PCI connection, we need to do the 9673 * low level device setup. This is primarily setting up 9674 * the Admin Queue structures and then querying for the 9675 * device's current profile information. 9676 */ 9677 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 9678 if (!pf) { 9679 err = -ENOMEM; 9680 goto err_pf_alloc; 9681 } 9682 pf->next_vsi = 0; 9683 pf->pdev = pdev; 9684 set_bit(__I40E_DOWN, &pf->state); 9685 9686 hw = &pf->hw; 9687 hw->back = pf; 9688 9689 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0), 9690 I40E_MAX_CSR_SPACE); 9691 9692 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len); 9693 if (!hw->hw_addr) { 9694 err = -EIO; 9695 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 9696 (unsigned int)pci_resource_start(pdev, 0), 9697 (unsigned int)pci_resource_len(pdev, 0), err); 9698 goto err_ioremap; 9699 } 9700 hw->vendor_id = pdev->vendor; 9701 hw->device_id = pdev->device; 9702 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 9703 hw->subsystem_vendor_id = pdev->subsystem_vendor; 9704 hw->subsystem_device_id = pdev->subsystem_device; 9705 hw->bus.device = PCI_SLOT(pdev->devfn); 9706 hw->bus.func = PCI_FUNC(pdev->devfn); 9707 pf->instance = pfs_found; 9708 9709 if (debug != -1) { 9710 pf->msg_enable = pf->hw.debug_mask; 9711 pf->msg_enable = debug; 9712 } 9713 9714 /* do a special CORER for clearing PXE mode once at init */ 9715 if (hw->revision_id == 0 && 9716 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 9717 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 9718 i40e_flush(hw); 9719 msleep(200); 9720 pf->corer_count++; 9721 9722 i40e_clear_pxe_mode(hw); 9723 } 9724 9725 /* Reset here to make sure all is clean and to define PF 'n' */ 9726 i40e_clear_hw(hw); 9727 err = i40e_pf_reset(hw); 9728 if (err) { 9729 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 9730 goto err_pf_reset; 9731 } 9732 pf->pfr_count++; 9733 9734 hw->aq.num_arq_entries = I40E_AQ_LEN; 9735 hw->aq.num_asq_entries = I40E_AQ_LEN; 9736 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9737 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9738 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 9739 9740 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 9741 "%s-%s:misc", 9742 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 9743 9744 err = i40e_init_shared_code(hw); 9745 if (err) { 9746 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); 9747 goto err_pf_reset; 9748 } 9749 9750 /* set up a default setting for link flow control */ 9751 pf->hw.fc.requested_mode = I40E_FC_NONE; 9752 9753 err = i40e_init_adminq(hw); 9754 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); 9755 if (err) { 9756 dev_info(&pdev->dev, 9757 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 9758 goto err_pf_reset; 9759 } 9760 9761 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 9762 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 9763 dev_info(&pdev->dev, 9764 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 9765 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 9766 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 9767 dev_info(&pdev->dev, 9768 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 9769 9770 i40e_verify_eeprom(pf); 9771 9772 /* Rev 0 hardware was never productized */ 9773 if (hw->revision_id < 1) 9774 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 9775 9776 i40e_clear_pxe_mode(hw); 9777 err = i40e_get_capabilities(pf); 9778 if (err) 9779 goto err_adminq_setup; 9780 9781 err = i40e_sw_init(pf); 9782 if (err) { 9783 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 9784 goto err_sw_init; 9785 } 9786 9787 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 9788 hw->func_caps.num_rx_qp, 9789 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 9790 if (err) { 9791 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 9792 goto err_init_lan_hmc; 9793 } 9794 9795 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 9796 if (err) { 9797 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 9798 err = -ENOENT; 9799 goto err_configure_lan_hmc; 9800 } 9801 9802 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 9803 * Ignore error return codes because if it was already disabled via 9804 * hardware settings this will fail 9805 */ 9806 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 9807 (pf->hw.aq.fw_maj_ver < 4)) { 9808 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 9809 i40e_aq_stop_lldp(hw, true, NULL); 9810 } 9811 9812 i40e_get_mac_addr(hw, hw->mac.addr); 9813 if (!is_valid_ether_addr(hw->mac.addr)) { 9814 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 9815 err = -EIO; 9816 goto err_mac_addr; 9817 } 9818 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 9819 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 9820 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 9821 if (is_valid_ether_addr(hw->mac.port_addr)) 9822 pf->flags |= I40E_FLAG_PORT_ID_VALID; 9823 #ifdef I40E_FCOE 9824 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 9825 if (err) 9826 dev_info(&pdev->dev, 9827 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 9828 if (!is_valid_ether_addr(hw->mac.san_addr)) { 9829 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 9830 hw->mac.san_addr); 9831 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 9832 } 9833 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 9834 #endif /* I40E_FCOE */ 9835 9836 pci_set_drvdata(pdev, pf); 9837 pci_save_state(pdev); 9838 #ifdef CONFIG_I40E_DCB 9839 err = i40e_init_pf_dcb(pf); 9840 if (err) { 9841 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 9842 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9843 /* Continue without DCB enabled */ 9844 } 9845 #endif /* CONFIG_I40E_DCB */ 9846 9847 /* set up periodic task facility */ 9848 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 9849 pf->service_timer_period = HZ; 9850 9851 INIT_WORK(&pf->service_task, i40e_service_task); 9852 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 9853 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 9854 pf->link_check_timeout = jiffies; 9855 9856 /* WoL defaults to disabled */ 9857 pf->wol_en = false; 9858 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 9859 9860 /* set up the main switch operations */ 9861 i40e_determine_queue_usage(pf); 9862 err = i40e_init_interrupt_scheme(pf); 9863 if (err) 9864 goto err_switch_setup; 9865 9866 /* The number of VSIs reported by the FW is the minimum guaranteed 9867 * to us; HW supports far more and we share the remaining pool with 9868 * the other PFs. We allocate space for more than the guarantee with 9869 * the understanding that we might not get them all later. 9870 */ 9871 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 9872 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 9873 else 9874 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 9875 9876 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 9877 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi; 9878 pf->vsi = kzalloc(len, GFP_KERNEL); 9879 if (!pf->vsi) { 9880 err = -ENOMEM; 9881 goto err_switch_setup; 9882 } 9883 9884 #ifdef CONFIG_PCI_IOV 9885 /* prep for VF support */ 9886 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9887 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 9888 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 9889 if (pci_num_vf(pdev)) 9890 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 9891 } 9892 #endif 9893 err = i40e_setup_pf_switch(pf, false); 9894 if (err) { 9895 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 9896 goto err_vsis; 9897 } 9898 /* if FDIR VSI was set up, start it now */ 9899 for (i = 0; i < pf->num_alloc_vsi; i++) { 9900 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 9901 i40e_vsi_open(pf->vsi[i]); 9902 break; 9903 } 9904 } 9905 9906 /* driver is only interested in link up/down and module qualification 9907 * reports from firmware 9908 */ 9909 err = i40e_aq_set_phy_int_mask(&pf->hw, 9910 I40E_AQ_EVENT_LINK_UPDOWN | 9911 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 9912 if (err) 9913 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err); 9914 9915 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 9916 (pf->hw.aq.fw_maj_ver < 4)) { 9917 msleep(75); 9918 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 9919 if (err) 9920 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 9921 pf->hw.aq.asq_last_status); 9922 } 9923 /* The main driver is (mostly) up and happy. We need to set this state 9924 * before setting up the misc vector or we get a race and the vector 9925 * ends up disabled forever. 9926 */ 9927 clear_bit(__I40E_DOWN, &pf->state); 9928 9929 /* In case of MSIX we are going to setup the misc vector right here 9930 * to handle admin queue events etc. In case of legacy and MSI 9931 * the misc functionality and queue processing is combined in 9932 * the same vector and that gets setup at open. 9933 */ 9934 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 9935 err = i40e_setup_misc_vector(pf); 9936 if (err) { 9937 dev_info(&pdev->dev, 9938 "setup of misc vector failed: %d\n", err); 9939 goto err_vsis; 9940 } 9941 } 9942 9943 #ifdef CONFIG_PCI_IOV 9944 /* prep for VF support */ 9945 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9946 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 9947 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 9948 u32 val; 9949 9950 /* disable link interrupts for VFs */ 9951 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 9952 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 9953 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 9954 i40e_flush(hw); 9955 9956 if (pci_num_vf(pdev)) { 9957 dev_info(&pdev->dev, 9958 "Active VFs found, allocating resources.\n"); 9959 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 9960 if (err) 9961 dev_info(&pdev->dev, 9962 "Error %d allocating resources for existing VFs\n", 9963 err); 9964 } 9965 } 9966 #endif /* CONFIG_PCI_IOV */ 9967 9968 pfs_found++; 9969 9970 i40e_dbg_pf_init(pf); 9971 9972 /* tell the firmware that we're starting */ 9973 i40e_send_version(pf); 9974 9975 /* since everything's happy, start the service_task timer */ 9976 mod_timer(&pf->service_timer, 9977 round_jiffies(jiffies + pf->service_timer_period)); 9978 9979 #ifdef I40E_FCOE 9980 /* create FCoE interface */ 9981 i40e_fcoe_vsi_setup(pf); 9982 9983 #endif 9984 /* Get the negotiated link width and speed from PCI config space */ 9985 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); 9986 9987 i40e_set_pci_config_data(hw, link_status); 9988 9989 dev_info(&pdev->dev, "PCI-Express: %s %s\n", 9990 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : 9991 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : 9992 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : 9993 "Unknown"), 9994 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : 9995 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : 9996 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : 9997 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : 9998 "Unknown")); 9999 10000 if (hw->bus.width < i40e_bus_width_pcie_x8 || 10001 hw->bus.speed < i40e_bus_speed_8000) { 10002 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 10003 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 10004 } 10005 10006 /* get the requested speeds from the fw */ 10007 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 10008 if (err) 10009 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n", 10010 err); 10011 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 10012 10013 /* print a string summarizing features */ 10014 i40e_print_features(pf); 10015 10016 return 0; 10017 10018 /* Unwind what we've done if something failed in the setup */ 10019 err_vsis: 10020 set_bit(__I40E_DOWN, &pf->state); 10021 i40e_clear_interrupt_scheme(pf); 10022 kfree(pf->vsi); 10023 err_switch_setup: 10024 i40e_reset_interrupt_capability(pf); 10025 del_timer_sync(&pf->service_timer); 10026 err_mac_addr: 10027 err_configure_lan_hmc: 10028 (void)i40e_shutdown_lan_hmc(hw); 10029 err_init_lan_hmc: 10030 kfree(pf->qp_pile); 10031 err_sw_init: 10032 err_adminq_setup: 10033 (void)i40e_shutdown_adminq(hw); 10034 err_pf_reset: 10035 iounmap(hw->hw_addr); 10036 err_ioremap: 10037 kfree(pf); 10038 err_pf_alloc: 10039 pci_disable_pcie_error_reporting(pdev); 10040 pci_release_selected_regions(pdev, 10041 pci_select_bars(pdev, IORESOURCE_MEM)); 10042 err_pci_reg: 10043 err_dma: 10044 pci_disable_device(pdev); 10045 return err; 10046 } 10047 10048 /** 10049 * i40e_remove - Device removal routine 10050 * @pdev: PCI device information struct 10051 * 10052 * i40e_remove is called by the PCI subsystem to alert the driver 10053 * that is should release a PCI device. This could be caused by a 10054 * Hot-Plug event, or because the driver is going to be removed from 10055 * memory. 10056 **/ 10057 static void i40e_remove(struct pci_dev *pdev) 10058 { 10059 struct i40e_pf *pf = pci_get_drvdata(pdev); 10060 i40e_status ret_code; 10061 int i; 10062 10063 i40e_dbg_pf_exit(pf); 10064 10065 i40e_ptp_stop(pf); 10066 10067 /* no more scheduling of any task */ 10068 set_bit(__I40E_DOWN, &pf->state); 10069 del_timer_sync(&pf->service_timer); 10070 cancel_work_sync(&pf->service_task); 10071 i40e_fdir_teardown(pf); 10072 10073 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 10074 i40e_free_vfs(pf); 10075 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 10076 } 10077 10078 i40e_fdir_teardown(pf); 10079 10080 /* If there is a switch structure or any orphans, remove them. 10081 * This will leave only the PF's VSI remaining. 10082 */ 10083 for (i = 0; i < I40E_MAX_VEB; i++) { 10084 if (!pf->veb[i]) 10085 continue; 10086 10087 if (pf->veb[i]->uplink_seid == pf->mac_seid || 10088 pf->veb[i]->uplink_seid == 0) 10089 i40e_switch_branch_release(pf->veb[i]); 10090 } 10091 10092 /* Now we can shutdown the PF's VSI, just before we kill 10093 * adminq and hmc. 10094 */ 10095 if (pf->vsi[pf->lan_vsi]) 10096 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 10097 10098 /* shutdown and destroy the HMC */ 10099 if (pf->hw.hmc.hmc_obj) { 10100 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 10101 if (ret_code) 10102 dev_warn(&pdev->dev, 10103 "Failed to destroy the HMC resources: %d\n", 10104 ret_code); 10105 } 10106 10107 /* shutdown the adminq */ 10108 ret_code = i40e_shutdown_adminq(&pf->hw); 10109 if (ret_code) 10110 dev_warn(&pdev->dev, 10111 "Failed to destroy the Admin Queue resources: %d\n", 10112 ret_code); 10113 10114 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 10115 i40e_clear_interrupt_scheme(pf); 10116 for (i = 0; i < pf->num_alloc_vsi; i++) { 10117 if (pf->vsi[i]) { 10118 i40e_vsi_clear_rings(pf->vsi[i]); 10119 i40e_vsi_clear(pf->vsi[i]); 10120 pf->vsi[i] = NULL; 10121 } 10122 } 10123 10124 for (i = 0; i < I40E_MAX_VEB; i++) { 10125 kfree(pf->veb[i]); 10126 pf->veb[i] = NULL; 10127 } 10128 10129 kfree(pf->qp_pile); 10130 kfree(pf->vsi); 10131 10132 iounmap(pf->hw.hw_addr); 10133 kfree(pf); 10134 pci_release_selected_regions(pdev, 10135 pci_select_bars(pdev, IORESOURCE_MEM)); 10136 10137 pci_disable_pcie_error_reporting(pdev); 10138 pci_disable_device(pdev); 10139 } 10140 10141 /** 10142 * i40e_pci_error_detected - warning that something funky happened in PCI land 10143 * @pdev: PCI device information struct 10144 * 10145 * Called to warn that something happened and the error handling steps 10146 * are in progress. Allows the driver to quiesce things, be ready for 10147 * remediation. 10148 **/ 10149 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 10150 enum pci_channel_state error) 10151 { 10152 struct i40e_pf *pf = pci_get_drvdata(pdev); 10153 10154 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 10155 10156 /* shutdown all operations */ 10157 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 10158 rtnl_lock(); 10159 i40e_prep_for_reset(pf); 10160 rtnl_unlock(); 10161 } 10162 10163 /* Request a slot reset */ 10164 return PCI_ERS_RESULT_NEED_RESET; 10165 } 10166 10167 /** 10168 * i40e_pci_error_slot_reset - a PCI slot reset just happened 10169 * @pdev: PCI device information struct 10170 * 10171 * Called to find if the driver can work with the device now that 10172 * the pci slot has been reset. If a basic connection seems good 10173 * (registers are readable and have sane content) then return a 10174 * happy little PCI_ERS_RESULT_xxx. 10175 **/ 10176 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 10177 { 10178 struct i40e_pf *pf = pci_get_drvdata(pdev); 10179 pci_ers_result_t result; 10180 int err; 10181 u32 reg; 10182 10183 dev_info(&pdev->dev, "%s\n", __func__); 10184 if (pci_enable_device_mem(pdev)) { 10185 dev_info(&pdev->dev, 10186 "Cannot re-enable PCI device after reset.\n"); 10187 result = PCI_ERS_RESULT_DISCONNECT; 10188 } else { 10189 pci_set_master(pdev); 10190 pci_restore_state(pdev); 10191 pci_save_state(pdev); 10192 pci_wake_from_d3(pdev, false); 10193 10194 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 10195 if (reg == 0) 10196 result = PCI_ERS_RESULT_RECOVERED; 10197 else 10198 result = PCI_ERS_RESULT_DISCONNECT; 10199 } 10200 10201 err = pci_cleanup_aer_uncorrect_error_status(pdev); 10202 if (err) { 10203 dev_info(&pdev->dev, 10204 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 10205 err); 10206 /* non-fatal, continue */ 10207 } 10208 10209 return result; 10210 } 10211 10212 /** 10213 * i40e_pci_error_resume - restart operations after PCI error recovery 10214 * @pdev: PCI device information struct 10215 * 10216 * Called to allow the driver to bring things back up after PCI error 10217 * and/or reset recovery has finished. 10218 **/ 10219 static void i40e_pci_error_resume(struct pci_dev *pdev) 10220 { 10221 struct i40e_pf *pf = pci_get_drvdata(pdev); 10222 10223 dev_info(&pdev->dev, "%s\n", __func__); 10224 if (test_bit(__I40E_SUSPENDED, &pf->state)) 10225 return; 10226 10227 rtnl_lock(); 10228 i40e_handle_reset_warning(pf); 10229 rtnl_lock(); 10230 } 10231 10232 /** 10233 * i40e_shutdown - PCI callback for shutting down 10234 * @pdev: PCI device information struct 10235 **/ 10236 static void i40e_shutdown(struct pci_dev *pdev) 10237 { 10238 struct i40e_pf *pf = pci_get_drvdata(pdev); 10239 struct i40e_hw *hw = &pf->hw; 10240 10241 set_bit(__I40E_SUSPENDED, &pf->state); 10242 set_bit(__I40E_DOWN, &pf->state); 10243 rtnl_lock(); 10244 i40e_prep_for_reset(pf); 10245 rtnl_unlock(); 10246 10247 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10248 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10249 10250 i40e_clear_interrupt_scheme(pf); 10251 10252 if (system_state == SYSTEM_POWER_OFF) { 10253 pci_wake_from_d3(pdev, pf->wol_en); 10254 pci_set_power_state(pdev, PCI_D3hot); 10255 } 10256 } 10257 10258 #ifdef CONFIG_PM 10259 /** 10260 * i40e_suspend - PCI callback for moving to D3 10261 * @pdev: PCI device information struct 10262 **/ 10263 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 10264 { 10265 struct i40e_pf *pf = pci_get_drvdata(pdev); 10266 struct i40e_hw *hw = &pf->hw; 10267 10268 set_bit(__I40E_SUSPENDED, &pf->state); 10269 set_bit(__I40E_DOWN, &pf->state); 10270 del_timer_sync(&pf->service_timer); 10271 cancel_work_sync(&pf->service_task); 10272 i40e_fdir_teardown(pf); 10273 10274 rtnl_lock(); 10275 i40e_prep_for_reset(pf); 10276 rtnl_unlock(); 10277 10278 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10279 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10280 10281 pci_wake_from_d3(pdev, pf->wol_en); 10282 pci_set_power_state(pdev, PCI_D3hot); 10283 10284 return 0; 10285 } 10286 10287 /** 10288 * i40e_resume - PCI callback for waking up from D3 10289 * @pdev: PCI device information struct 10290 **/ 10291 static int i40e_resume(struct pci_dev *pdev) 10292 { 10293 struct i40e_pf *pf = pci_get_drvdata(pdev); 10294 u32 err; 10295 10296 pci_set_power_state(pdev, PCI_D0); 10297 pci_restore_state(pdev); 10298 /* pci_restore_state() clears dev->state_saves, so 10299 * call pci_save_state() again to restore it. 10300 */ 10301 pci_save_state(pdev); 10302 10303 err = pci_enable_device_mem(pdev); 10304 if (err) { 10305 dev_err(&pdev->dev, 10306 "%s: Cannot enable PCI device from suspend\n", 10307 __func__); 10308 return err; 10309 } 10310 pci_set_master(pdev); 10311 10312 /* no wakeup events while running */ 10313 pci_wake_from_d3(pdev, false); 10314 10315 /* handling the reset will rebuild the device state */ 10316 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 10317 clear_bit(__I40E_DOWN, &pf->state); 10318 rtnl_lock(); 10319 i40e_reset_and_rebuild(pf, false); 10320 rtnl_unlock(); 10321 } 10322 10323 return 0; 10324 } 10325 10326 #endif 10327 static const struct pci_error_handlers i40e_err_handler = { 10328 .error_detected = i40e_pci_error_detected, 10329 .slot_reset = i40e_pci_error_slot_reset, 10330 .resume = i40e_pci_error_resume, 10331 }; 10332 10333 static struct pci_driver i40e_driver = { 10334 .name = i40e_driver_name, 10335 .id_table = i40e_pci_tbl, 10336 .probe = i40e_probe, 10337 .remove = i40e_remove, 10338 #ifdef CONFIG_PM 10339 .suspend = i40e_suspend, 10340 .resume = i40e_resume, 10341 #endif 10342 .shutdown = i40e_shutdown, 10343 .err_handler = &i40e_err_handler, 10344 .sriov_configure = i40e_pci_sriov_configure, 10345 }; 10346 10347 /** 10348 * i40e_init_module - Driver registration routine 10349 * 10350 * i40e_init_module is the first routine called when the driver is 10351 * loaded. All it does is register with the PCI subsystem. 10352 **/ 10353 static int __init i40e_init_module(void) 10354 { 10355 pr_info("%s: %s - version %s\n", i40e_driver_name, 10356 i40e_driver_string, i40e_driver_version_str); 10357 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 10358 10359 i40e_dbg_init(); 10360 return pci_register_driver(&i40e_driver); 10361 } 10362 module_init(i40e_init_module); 10363 10364 /** 10365 * i40e_exit_module - Driver exit cleanup routine 10366 * 10367 * i40e_exit_module is called just before the driver is removed 10368 * from memory. 10369 **/ 10370 static void __exit i40e_exit_module(void) 10371 { 10372 pci_unregister_driver(&i40e_driver); 10373 i40e_dbg_exit(); 10374 } 10375 module_exit(i40e_exit_module); 10376