1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #include <linux/etherdevice.h> 28 #include <linux/of_net.h> 29 #include <linux/pci.h> 30 31 /* Local includes */ 32 #include "i40e.h" 33 #include "i40e_diag.h" 34 #include <net/udp_tunnel.h> 35 36 const char i40e_driver_name[] = "i40e"; 37 static const char i40e_driver_string[] = 38 "Intel(R) Ethernet Connection XL710 Network Driver"; 39 40 #define DRV_KERN "-k" 41 42 #define DRV_VERSION_MAJOR 1 43 #define DRV_VERSION_MINOR 6 44 #define DRV_VERSION_BUILD 27 45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 46 __stringify(DRV_VERSION_MINOR) "." \ 47 __stringify(DRV_VERSION_BUILD) DRV_KERN 48 const char i40e_driver_version_str[] = DRV_VERSION; 49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 50 51 /* a bit of forward declarations */ 52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 53 static void i40e_handle_reset_warning(struct i40e_pf *pf); 54 static int i40e_add_vsi(struct i40e_vsi *vsi); 55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 57 static int i40e_setup_misc_vector(struct i40e_pf *pf); 58 static void i40e_determine_queue_usage(struct i40e_pf *pf); 59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 60 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 61 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 62 63 /* i40e_pci_tbl - PCI Device ID Table 64 * 65 * Last entry must be all 0s 66 * 67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 68 * Class, Class Mask, private data (not used) } 69 */ 70 static const struct pci_device_id i40e_pci_tbl[] = { 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, 80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0}, 81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0}, 82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, 83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, 84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, 85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0}, 86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0}, 88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0}, 89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0}, 90 /* required last entry */ 91 {0, } 92 }; 93 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 94 95 #define I40E_MAX_VF_COUNT 128 96 static int debug = -1; 97 module_param(debug, uint, 0); 98 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)"); 99 100 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 101 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 102 MODULE_LICENSE("GPL"); 103 MODULE_VERSION(DRV_VERSION); 104 105 static struct workqueue_struct *i40e_wq; 106 107 /** 108 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 109 * @hw: pointer to the HW structure 110 * @mem: ptr to mem struct to fill out 111 * @size: size of memory requested 112 * @alignment: what to align the allocation to 113 **/ 114 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 115 u64 size, u32 alignment) 116 { 117 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 118 119 mem->size = ALIGN(size, alignment); 120 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 121 &mem->pa, GFP_KERNEL); 122 if (!mem->va) 123 return -ENOMEM; 124 125 return 0; 126 } 127 128 /** 129 * i40e_free_dma_mem_d - OS specific memory free for shared code 130 * @hw: pointer to the HW structure 131 * @mem: ptr to mem struct to free 132 **/ 133 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 134 { 135 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 136 137 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 138 mem->va = NULL; 139 mem->pa = 0; 140 mem->size = 0; 141 142 return 0; 143 } 144 145 /** 146 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 147 * @hw: pointer to the HW structure 148 * @mem: ptr to mem struct to fill out 149 * @size: size of memory requested 150 **/ 151 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 152 u32 size) 153 { 154 mem->size = size; 155 mem->va = kzalloc(size, GFP_KERNEL); 156 157 if (!mem->va) 158 return -ENOMEM; 159 160 return 0; 161 } 162 163 /** 164 * i40e_free_virt_mem_d - OS specific memory free for shared code 165 * @hw: pointer to the HW structure 166 * @mem: ptr to mem struct to free 167 **/ 168 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 169 { 170 /* it's ok to kfree a NULL pointer */ 171 kfree(mem->va); 172 mem->va = NULL; 173 mem->size = 0; 174 175 return 0; 176 } 177 178 /** 179 * i40e_get_lump - find a lump of free generic resource 180 * @pf: board private structure 181 * @pile: the pile of resource to search 182 * @needed: the number of items needed 183 * @id: an owner id to stick on the items assigned 184 * 185 * Returns the base item index of the lump, or negative for error 186 * 187 * The search_hint trick and lack of advanced fit-finding only work 188 * because we're highly likely to have all the same size lump requests. 189 * Linear search time and any fragmentation should be minimal. 190 **/ 191 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 192 u16 needed, u16 id) 193 { 194 int ret = -ENOMEM; 195 int i, j; 196 197 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 198 dev_info(&pf->pdev->dev, 199 "param err: pile=%p needed=%d id=0x%04x\n", 200 pile, needed, id); 201 return -EINVAL; 202 } 203 204 /* start the linear search with an imperfect hint */ 205 i = pile->search_hint; 206 while (i < pile->num_entries) { 207 /* skip already allocated entries */ 208 if (pile->list[i] & I40E_PILE_VALID_BIT) { 209 i++; 210 continue; 211 } 212 213 /* do we have enough in this lump? */ 214 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 215 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 216 break; 217 } 218 219 if (j == needed) { 220 /* there was enough, so assign it to the requestor */ 221 for (j = 0; j < needed; j++) 222 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 223 ret = i; 224 pile->search_hint = i + j; 225 break; 226 } 227 228 /* not enough, so skip over it and continue looking */ 229 i += j; 230 } 231 232 return ret; 233 } 234 235 /** 236 * i40e_put_lump - return a lump of generic resource 237 * @pile: the pile of resource to search 238 * @index: the base item index 239 * @id: the owner id of the items assigned 240 * 241 * Returns the count of items in the lump 242 **/ 243 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 244 { 245 int valid_id = (id | I40E_PILE_VALID_BIT); 246 int count = 0; 247 int i; 248 249 if (!pile || index >= pile->num_entries) 250 return -EINVAL; 251 252 for (i = index; 253 i < pile->num_entries && pile->list[i] == valid_id; 254 i++) { 255 pile->list[i] = 0; 256 count++; 257 } 258 259 if (count && index < pile->search_hint) 260 pile->search_hint = index; 261 262 return count; 263 } 264 265 /** 266 * i40e_find_vsi_from_id - searches for the vsi with the given id 267 * @pf - the pf structure to search for the vsi 268 * @id - id of the vsi it is searching for 269 **/ 270 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 271 { 272 int i; 273 274 for (i = 0; i < pf->num_alloc_vsi; i++) 275 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 276 return pf->vsi[i]; 277 278 return NULL; 279 } 280 281 /** 282 * i40e_service_event_schedule - Schedule the service task to wake up 283 * @pf: board private structure 284 * 285 * If not already scheduled, this puts the task into the work queue 286 **/ 287 void i40e_service_event_schedule(struct i40e_pf *pf) 288 { 289 if (!test_bit(__I40E_DOWN, &pf->state) && 290 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 291 queue_work(i40e_wq, &pf->service_task); 292 } 293 294 /** 295 * i40e_tx_timeout - Respond to a Tx Hang 296 * @netdev: network interface device structure 297 * 298 * If any port has noticed a Tx timeout, it is likely that the whole 299 * device is munged, not just the one netdev port, so go for the full 300 * reset. 301 **/ 302 #ifdef I40E_FCOE 303 void i40e_tx_timeout(struct net_device *netdev) 304 #else 305 static void i40e_tx_timeout(struct net_device *netdev) 306 #endif 307 { 308 struct i40e_netdev_priv *np = netdev_priv(netdev); 309 struct i40e_vsi *vsi = np->vsi; 310 struct i40e_pf *pf = vsi->back; 311 struct i40e_ring *tx_ring = NULL; 312 unsigned int i, hung_queue = 0; 313 u32 head, val; 314 315 pf->tx_timeout_count++; 316 317 /* find the stopped queue the same way the stack does */ 318 for (i = 0; i < netdev->num_tx_queues; i++) { 319 struct netdev_queue *q; 320 unsigned long trans_start; 321 322 q = netdev_get_tx_queue(netdev, i); 323 trans_start = q->trans_start; 324 if (netif_xmit_stopped(q) && 325 time_after(jiffies, 326 (trans_start + netdev->watchdog_timeo))) { 327 hung_queue = i; 328 break; 329 } 330 } 331 332 if (i == netdev->num_tx_queues) { 333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n"); 334 } else { 335 /* now that we have an index, find the tx_ring struct */ 336 for (i = 0; i < vsi->num_queue_pairs; i++) { 337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 338 if (hung_queue == 339 vsi->tx_rings[i]->queue_index) { 340 tx_ring = vsi->tx_rings[i]; 341 break; 342 } 343 } 344 } 345 } 346 347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 348 pf->tx_timeout_recovery_level = 1; /* reset after some time */ 349 else if (time_before(jiffies, 350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo))) 351 return; /* don't do any new action before the next timeout */ 352 353 if (tx_ring) { 354 head = i40e_get_head(tx_ring); 355 /* Read interrupt register */ 356 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 357 val = rd32(&pf->hw, 358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 359 tx_ring->vsi->base_vector - 1)); 360 else 361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 362 363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n", 364 vsi->seid, hung_queue, tx_ring->next_to_clean, 365 head, tx_ring->next_to_use, 366 readl(tx_ring->tail), val); 367 } 368 369 pf->tx_timeout_last_recovery = jiffies; 370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n", 371 pf->tx_timeout_recovery_level, hung_queue); 372 373 switch (pf->tx_timeout_recovery_level) { 374 case 1: 375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 376 break; 377 case 2: 378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 379 break; 380 case 3: 381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 382 break; 383 default: 384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 385 break; 386 } 387 388 i40e_service_event_schedule(pf); 389 pf->tx_timeout_recovery_level++; 390 } 391 392 /** 393 * i40e_get_vsi_stats_struct - Get System Network Statistics 394 * @vsi: the VSI we care about 395 * 396 * Returns the address of the device statistics structure. 397 * The statistics are actually updated from the service task. 398 **/ 399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 400 { 401 return &vsi->net_stats; 402 } 403 404 /** 405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 406 * @netdev: network interface device structure 407 * 408 * Returns the address of the device statistics structure. 409 * The statistics are actually updated from the service task. 410 **/ 411 #ifndef I40E_FCOE 412 static 413 #endif 414 void i40e_get_netdev_stats_struct(struct net_device *netdev, 415 struct rtnl_link_stats64 *stats) 416 { 417 struct i40e_netdev_priv *np = netdev_priv(netdev); 418 struct i40e_ring *tx_ring, *rx_ring; 419 struct i40e_vsi *vsi = np->vsi; 420 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 421 int i; 422 423 if (test_bit(__I40E_DOWN, &vsi->state)) 424 return; 425 426 if (!vsi->tx_rings) 427 return; 428 429 rcu_read_lock(); 430 for (i = 0; i < vsi->num_queue_pairs; i++) { 431 u64 bytes, packets; 432 unsigned int start; 433 434 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 435 if (!tx_ring) 436 continue; 437 438 do { 439 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 440 packets = tx_ring->stats.packets; 441 bytes = tx_ring->stats.bytes; 442 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 443 444 stats->tx_packets += packets; 445 stats->tx_bytes += bytes; 446 rx_ring = &tx_ring[1]; 447 448 do { 449 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 450 packets = rx_ring->stats.packets; 451 bytes = rx_ring->stats.bytes; 452 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 453 454 stats->rx_packets += packets; 455 stats->rx_bytes += bytes; 456 } 457 rcu_read_unlock(); 458 459 /* following stats updated by i40e_watchdog_subtask() */ 460 stats->multicast = vsi_stats->multicast; 461 stats->tx_errors = vsi_stats->tx_errors; 462 stats->tx_dropped = vsi_stats->tx_dropped; 463 stats->rx_errors = vsi_stats->rx_errors; 464 stats->rx_dropped = vsi_stats->rx_dropped; 465 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 466 stats->rx_length_errors = vsi_stats->rx_length_errors; 467 } 468 469 /** 470 * i40e_vsi_reset_stats - Resets all stats of the given vsi 471 * @vsi: the VSI to have its stats reset 472 **/ 473 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 474 { 475 struct rtnl_link_stats64 *ns; 476 int i; 477 478 if (!vsi) 479 return; 480 481 ns = i40e_get_vsi_stats_struct(vsi); 482 memset(ns, 0, sizeof(*ns)); 483 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 484 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 485 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 486 if (vsi->rx_rings && vsi->rx_rings[0]) { 487 for (i = 0; i < vsi->num_queue_pairs; i++) { 488 memset(&vsi->rx_rings[i]->stats, 0, 489 sizeof(vsi->rx_rings[i]->stats)); 490 memset(&vsi->rx_rings[i]->rx_stats, 0, 491 sizeof(vsi->rx_rings[i]->rx_stats)); 492 memset(&vsi->tx_rings[i]->stats, 0, 493 sizeof(vsi->tx_rings[i]->stats)); 494 memset(&vsi->tx_rings[i]->tx_stats, 0, 495 sizeof(vsi->tx_rings[i]->tx_stats)); 496 } 497 } 498 vsi->stat_offsets_loaded = false; 499 } 500 501 /** 502 * i40e_pf_reset_stats - Reset all of the stats for the given PF 503 * @pf: the PF to be reset 504 **/ 505 void i40e_pf_reset_stats(struct i40e_pf *pf) 506 { 507 int i; 508 509 memset(&pf->stats, 0, sizeof(pf->stats)); 510 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 511 pf->stat_offsets_loaded = false; 512 513 for (i = 0; i < I40E_MAX_VEB; i++) { 514 if (pf->veb[i]) { 515 memset(&pf->veb[i]->stats, 0, 516 sizeof(pf->veb[i]->stats)); 517 memset(&pf->veb[i]->stats_offsets, 0, 518 sizeof(pf->veb[i]->stats_offsets)); 519 pf->veb[i]->stat_offsets_loaded = false; 520 } 521 } 522 pf->hw_csum_rx_error = 0; 523 } 524 525 /** 526 * i40e_stat_update48 - read and update a 48 bit stat from the chip 527 * @hw: ptr to the hardware info 528 * @hireg: the high 32 bit reg to read 529 * @loreg: the low 32 bit reg to read 530 * @offset_loaded: has the initial offset been loaded yet 531 * @offset: ptr to current offset value 532 * @stat: ptr to the stat 533 * 534 * Since the device stats are not reset at PFReset, they likely will not 535 * be zeroed when the driver starts. We'll save the first values read 536 * and use them as offsets to be subtracted from the raw values in order 537 * to report stats that count from zero. In the process, we also manage 538 * the potential roll-over. 539 **/ 540 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 541 bool offset_loaded, u64 *offset, u64 *stat) 542 { 543 u64 new_data; 544 545 if (hw->device_id == I40E_DEV_ID_QEMU) { 546 new_data = rd32(hw, loreg); 547 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 548 } else { 549 new_data = rd64(hw, loreg); 550 } 551 if (!offset_loaded) 552 *offset = new_data; 553 if (likely(new_data >= *offset)) 554 *stat = new_data - *offset; 555 else 556 *stat = (new_data + BIT_ULL(48)) - *offset; 557 *stat &= 0xFFFFFFFFFFFFULL; 558 } 559 560 /** 561 * i40e_stat_update32 - read and update a 32 bit stat from the chip 562 * @hw: ptr to the hardware info 563 * @reg: the hw reg to read 564 * @offset_loaded: has the initial offset been loaded yet 565 * @offset: ptr to current offset value 566 * @stat: ptr to the stat 567 **/ 568 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 569 bool offset_loaded, u64 *offset, u64 *stat) 570 { 571 u32 new_data; 572 573 new_data = rd32(hw, reg); 574 if (!offset_loaded) 575 *offset = new_data; 576 if (likely(new_data >= *offset)) 577 *stat = (u32)(new_data - *offset); 578 else 579 *stat = (u32)((new_data + BIT_ULL(32)) - *offset); 580 } 581 582 /** 583 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 584 * @vsi: the VSI to be updated 585 **/ 586 void i40e_update_eth_stats(struct i40e_vsi *vsi) 587 { 588 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 589 struct i40e_pf *pf = vsi->back; 590 struct i40e_hw *hw = &pf->hw; 591 struct i40e_eth_stats *oes; 592 struct i40e_eth_stats *es; /* device's eth stats */ 593 594 es = &vsi->eth_stats; 595 oes = &vsi->eth_stats_offsets; 596 597 /* Gather up the stats that the hw collects */ 598 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 599 vsi->stat_offsets_loaded, 600 &oes->tx_errors, &es->tx_errors); 601 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 602 vsi->stat_offsets_loaded, 603 &oes->rx_discards, &es->rx_discards); 604 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 605 vsi->stat_offsets_loaded, 606 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 607 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 608 vsi->stat_offsets_loaded, 609 &oes->tx_errors, &es->tx_errors); 610 611 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 612 I40E_GLV_GORCL(stat_idx), 613 vsi->stat_offsets_loaded, 614 &oes->rx_bytes, &es->rx_bytes); 615 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 616 I40E_GLV_UPRCL(stat_idx), 617 vsi->stat_offsets_loaded, 618 &oes->rx_unicast, &es->rx_unicast); 619 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 620 I40E_GLV_MPRCL(stat_idx), 621 vsi->stat_offsets_loaded, 622 &oes->rx_multicast, &es->rx_multicast); 623 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 624 I40E_GLV_BPRCL(stat_idx), 625 vsi->stat_offsets_loaded, 626 &oes->rx_broadcast, &es->rx_broadcast); 627 628 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 629 I40E_GLV_GOTCL(stat_idx), 630 vsi->stat_offsets_loaded, 631 &oes->tx_bytes, &es->tx_bytes); 632 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 633 I40E_GLV_UPTCL(stat_idx), 634 vsi->stat_offsets_loaded, 635 &oes->tx_unicast, &es->tx_unicast); 636 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 637 I40E_GLV_MPTCL(stat_idx), 638 vsi->stat_offsets_loaded, 639 &oes->tx_multicast, &es->tx_multicast); 640 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 641 I40E_GLV_BPTCL(stat_idx), 642 vsi->stat_offsets_loaded, 643 &oes->tx_broadcast, &es->tx_broadcast); 644 vsi->stat_offsets_loaded = true; 645 } 646 647 /** 648 * i40e_update_veb_stats - Update Switch component statistics 649 * @veb: the VEB being updated 650 **/ 651 static void i40e_update_veb_stats(struct i40e_veb *veb) 652 { 653 struct i40e_pf *pf = veb->pf; 654 struct i40e_hw *hw = &pf->hw; 655 struct i40e_eth_stats *oes; 656 struct i40e_eth_stats *es; /* device's eth stats */ 657 struct i40e_veb_tc_stats *veb_oes; 658 struct i40e_veb_tc_stats *veb_es; 659 int i, idx = 0; 660 661 idx = veb->stats_idx; 662 es = &veb->stats; 663 oes = &veb->stats_offsets; 664 veb_es = &veb->tc_stats; 665 veb_oes = &veb->tc_stats_offsets; 666 667 /* Gather up the stats that the hw collects */ 668 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 669 veb->stat_offsets_loaded, 670 &oes->tx_discards, &es->tx_discards); 671 if (hw->revision_id > 0) 672 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 673 veb->stat_offsets_loaded, 674 &oes->rx_unknown_protocol, 675 &es->rx_unknown_protocol); 676 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 677 veb->stat_offsets_loaded, 678 &oes->rx_bytes, &es->rx_bytes); 679 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 680 veb->stat_offsets_loaded, 681 &oes->rx_unicast, &es->rx_unicast); 682 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 683 veb->stat_offsets_loaded, 684 &oes->rx_multicast, &es->rx_multicast); 685 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 686 veb->stat_offsets_loaded, 687 &oes->rx_broadcast, &es->rx_broadcast); 688 689 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 690 veb->stat_offsets_loaded, 691 &oes->tx_bytes, &es->tx_bytes); 692 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 693 veb->stat_offsets_loaded, 694 &oes->tx_unicast, &es->tx_unicast); 695 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 696 veb->stat_offsets_loaded, 697 &oes->tx_multicast, &es->tx_multicast); 698 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 699 veb->stat_offsets_loaded, 700 &oes->tx_broadcast, &es->tx_broadcast); 701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 702 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx), 703 I40E_GLVEBTC_RPCL(i, idx), 704 veb->stat_offsets_loaded, 705 &veb_oes->tc_rx_packets[i], 706 &veb_es->tc_rx_packets[i]); 707 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx), 708 I40E_GLVEBTC_RBCL(i, idx), 709 veb->stat_offsets_loaded, 710 &veb_oes->tc_rx_bytes[i], 711 &veb_es->tc_rx_bytes[i]); 712 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx), 713 I40E_GLVEBTC_TPCL(i, idx), 714 veb->stat_offsets_loaded, 715 &veb_oes->tc_tx_packets[i], 716 &veb_es->tc_tx_packets[i]); 717 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx), 718 I40E_GLVEBTC_TBCL(i, idx), 719 veb->stat_offsets_loaded, 720 &veb_oes->tc_tx_bytes[i], 721 &veb_es->tc_tx_bytes[i]); 722 } 723 veb->stat_offsets_loaded = true; 724 } 725 726 #ifdef I40E_FCOE 727 /** 728 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 729 * @vsi: the VSI that is capable of doing FCoE 730 **/ 731 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 732 { 733 struct i40e_pf *pf = vsi->back; 734 struct i40e_hw *hw = &pf->hw; 735 struct i40e_fcoe_stats *ofs; 736 struct i40e_fcoe_stats *fs; /* device's eth stats */ 737 int idx; 738 739 if (vsi->type != I40E_VSI_FCOE) 740 return; 741 742 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET; 743 fs = &vsi->fcoe_stats; 744 ofs = &vsi->fcoe_stats_offsets; 745 746 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 747 vsi->fcoe_stat_offsets_loaded, 748 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 749 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 750 vsi->fcoe_stat_offsets_loaded, 751 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 752 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 753 vsi->fcoe_stat_offsets_loaded, 754 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 755 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 756 vsi->fcoe_stat_offsets_loaded, 757 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 758 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 759 vsi->fcoe_stat_offsets_loaded, 760 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 761 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 762 vsi->fcoe_stat_offsets_loaded, 763 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 764 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 765 vsi->fcoe_stat_offsets_loaded, 766 &ofs->fcoe_last_error, &fs->fcoe_last_error); 767 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 768 vsi->fcoe_stat_offsets_loaded, 769 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 770 771 vsi->fcoe_stat_offsets_loaded = true; 772 } 773 774 #endif 775 /** 776 * i40e_update_vsi_stats - Update the vsi statistics counters. 777 * @vsi: the VSI to be updated 778 * 779 * There are a few instances where we store the same stat in a 780 * couple of different structs. This is partly because we have 781 * the netdev stats that need to be filled out, which is slightly 782 * different from the "eth_stats" defined by the chip and used in 783 * VF communications. We sort it out here. 784 **/ 785 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 786 { 787 struct i40e_pf *pf = vsi->back; 788 struct rtnl_link_stats64 *ons; 789 struct rtnl_link_stats64 *ns; /* netdev stats */ 790 struct i40e_eth_stats *oes; 791 struct i40e_eth_stats *es; /* device's eth stats */ 792 u32 tx_restart, tx_busy; 793 u64 tx_lost_interrupt; 794 struct i40e_ring *p; 795 u32 rx_page, rx_buf; 796 u64 bytes, packets; 797 unsigned int start; 798 u64 tx_linearize; 799 u64 tx_force_wb; 800 u64 rx_p, rx_b; 801 u64 tx_p, tx_b; 802 u16 q; 803 804 if (test_bit(__I40E_DOWN, &vsi->state) || 805 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 806 return; 807 808 ns = i40e_get_vsi_stats_struct(vsi); 809 ons = &vsi->net_stats_offsets; 810 es = &vsi->eth_stats; 811 oes = &vsi->eth_stats_offsets; 812 813 /* Gather up the netdev and vsi stats that the driver collects 814 * on the fly during packet processing 815 */ 816 rx_b = rx_p = 0; 817 tx_b = tx_p = 0; 818 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0; 819 tx_lost_interrupt = 0; 820 rx_page = 0; 821 rx_buf = 0; 822 rcu_read_lock(); 823 for (q = 0; q < vsi->num_queue_pairs; q++) { 824 /* locate Tx ring */ 825 p = ACCESS_ONCE(vsi->tx_rings[q]); 826 827 do { 828 start = u64_stats_fetch_begin_irq(&p->syncp); 829 packets = p->stats.packets; 830 bytes = p->stats.bytes; 831 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 832 tx_b += bytes; 833 tx_p += packets; 834 tx_restart += p->tx_stats.restart_queue; 835 tx_busy += p->tx_stats.tx_busy; 836 tx_linearize += p->tx_stats.tx_linearize; 837 tx_force_wb += p->tx_stats.tx_force_wb; 838 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt; 839 840 /* Rx queue is part of the same block as Tx queue */ 841 p = &p[1]; 842 do { 843 start = u64_stats_fetch_begin_irq(&p->syncp); 844 packets = p->stats.packets; 845 bytes = p->stats.bytes; 846 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 847 rx_b += bytes; 848 rx_p += packets; 849 rx_buf += p->rx_stats.alloc_buff_failed; 850 rx_page += p->rx_stats.alloc_page_failed; 851 } 852 rcu_read_unlock(); 853 vsi->tx_restart = tx_restart; 854 vsi->tx_busy = tx_busy; 855 vsi->tx_linearize = tx_linearize; 856 vsi->tx_force_wb = tx_force_wb; 857 vsi->tx_lost_interrupt = tx_lost_interrupt; 858 vsi->rx_page_failed = rx_page; 859 vsi->rx_buf_failed = rx_buf; 860 861 ns->rx_packets = rx_p; 862 ns->rx_bytes = rx_b; 863 ns->tx_packets = tx_p; 864 ns->tx_bytes = tx_b; 865 866 /* update netdev stats from eth stats */ 867 i40e_update_eth_stats(vsi); 868 ons->tx_errors = oes->tx_errors; 869 ns->tx_errors = es->tx_errors; 870 ons->multicast = oes->rx_multicast; 871 ns->multicast = es->rx_multicast; 872 ons->rx_dropped = oes->rx_discards; 873 ns->rx_dropped = es->rx_discards; 874 ons->tx_dropped = oes->tx_discards; 875 ns->tx_dropped = es->tx_discards; 876 877 /* pull in a couple PF stats if this is the main vsi */ 878 if (vsi == pf->vsi[pf->lan_vsi]) { 879 ns->rx_crc_errors = pf->stats.crc_errors; 880 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 881 ns->rx_length_errors = pf->stats.rx_length_errors; 882 } 883 } 884 885 /** 886 * i40e_update_pf_stats - Update the PF statistics counters. 887 * @pf: the PF to be updated 888 **/ 889 static void i40e_update_pf_stats(struct i40e_pf *pf) 890 { 891 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 892 struct i40e_hw_port_stats *nsd = &pf->stats; 893 struct i40e_hw *hw = &pf->hw; 894 u32 val; 895 int i; 896 897 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 898 I40E_GLPRT_GORCL(hw->port), 899 pf->stat_offsets_loaded, 900 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 901 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 902 I40E_GLPRT_GOTCL(hw->port), 903 pf->stat_offsets_loaded, 904 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 905 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 906 pf->stat_offsets_loaded, 907 &osd->eth.rx_discards, 908 &nsd->eth.rx_discards); 909 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 910 I40E_GLPRT_UPRCL(hw->port), 911 pf->stat_offsets_loaded, 912 &osd->eth.rx_unicast, 913 &nsd->eth.rx_unicast); 914 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 915 I40E_GLPRT_MPRCL(hw->port), 916 pf->stat_offsets_loaded, 917 &osd->eth.rx_multicast, 918 &nsd->eth.rx_multicast); 919 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 920 I40E_GLPRT_BPRCL(hw->port), 921 pf->stat_offsets_loaded, 922 &osd->eth.rx_broadcast, 923 &nsd->eth.rx_broadcast); 924 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 925 I40E_GLPRT_UPTCL(hw->port), 926 pf->stat_offsets_loaded, 927 &osd->eth.tx_unicast, 928 &nsd->eth.tx_unicast); 929 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 930 I40E_GLPRT_MPTCL(hw->port), 931 pf->stat_offsets_loaded, 932 &osd->eth.tx_multicast, 933 &nsd->eth.tx_multicast); 934 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 935 I40E_GLPRT_BPTCL(hw->port), 936 pf->stat_offsets_loaded, 937 &osd->eth.tx_broadcast, 938 &nsd->eth.tx_broadcast); 939 940 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 941 pf->stat_offsets_loaded, 942 &osd->tx_dropped_link_down, 943 &nsd->tx_dropped_link_down); 944 945 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 946 pf->stat_offsets_loaded, 947 &osd->crc_errors, &nsd->crc_errors); 948 949 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 950 pf->stat_offsets_loaded, 951 &osd->illegal_bytes, &nsd->illegal_bytes); 952 953 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 954 pf->stat_offsets_loaded, 955 &osd->mac_local_faults, 956 &nsd->mac_local_faults); 957 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 958 pf->stat_offsets_loaded, 959 &osd->mac_remote_faults, 960 &nsd->mac_remote_faults); 961 962 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 963 pf->stat_offsets_loaded, 964 &osd->rx_length_errors, 965 &nsd->rx_length_errors); 966 967 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 968 pf->stat_offsets_loaded, 969 &osd->link_xon_rx, &nsd->link_xon_rx); 970 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 971 pf->stat_offsets_loaded, 972 &osd->link_xon_tx, &nsd->link_xon_tx); 973 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 974 pf->stat_offsets_loaded, 975 &osd->link_xoff_rx, &nsd->link_xoff_rx); 976 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 977 pf->stat_offsets_loaded, 978 &osd->link_xoff_tx, &nsd->link_xoff_tx); 979 980 for (i = 0; i < 8; i++) { 981 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 982 pf->stat_offsets_loaded, 983 &osd->priority_xoff_rx[i], 984 &nsd->priority_xoff_rx[i]); 985 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 986 pf->stat_offsets_loaded, 987 &osd->priority_xon_rx[i], 988 &nsd->priority_xon_rx[i]); 989 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 990 pf->stat_offsets_loaded, 991 &osd->priority_xon_tx[i], 992 &nsd->priority_xon_tx[i]); 993 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 994 pf->stat_offsets_loaded, 995 &osd->priority_xoff_tx[i], 996 &nsd->priority_xoff_tx[i]); 997 i40e_stat_update32(hw, 998 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 999 pf->stat_offsets_loaded, 1000 &osd->priority_xon_2_xoff[i], 1001 &nsd->priority_xon_2_xoff[i]); 1002 } 1003 1004 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1005 I40E_GLPRT_PRC64L(hw->port), 1006 pf->stat_offsets_loaded, 1007 &osd->rx_size_64, &nsd->rx_size_64); 1008 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1009 I40E_GLPRT_PRC127L(hw->port), 1010 pf->stat_offsets_loaded, 1011 &osd->rx_size_127, &nsd->rx_size_127); 1012 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1013 I40E_GLPRT_PRC255L(hw->port), 1014 pf->stat_offsets_loaded, 1015 &osd->rx_size_255, &nsd->rx_size_255); 1016 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1017 I40E_GLPRT_PRC511L(hw->port), 1018 pf->stat_offsets_loaded, 1019 &osd->rx_size_511, &nsd->rx_size_511); 1020 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1021 I40E_GLPRT_PRC1023L(hw->port), 1022 pf->stat_offsets_loaded, 1023 &osd->rx_size_1023, &nsd->rx_size_1023); 1024 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1025 I40E_GLPRT_PRC1522L(hw->port), 1026 pf->stat_offsets_loaded, 1027 &osd->rx_size_1522, &nsd->rx_size_1522); 1028 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1029 I40E_GLPRT_PRC9522L(hw->port), 1030 pf->stat_offsets_loaded, 1031 &osd->rx_size_big, &nsd->rx_size_big); 1032 1033 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1034 I40E_GLPRT_PTC64L(hw->port), 1035 pf->stat_offsets_loaded, 1036 &osd->tx_size_64, &nsd->tx_size_64); 1037 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1038 I40E_GLPRT_PTC127L(hw->port), 1039 pf->stat_offsets_loaded, 1040 &osd->tx_size_127, &nsd->tx_size_127); 1041 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1042 I40E_GLPRT_PTC255L(hw->port), 1043 pf->stat_offsets_loaded, 1044 &osd->tx_size_255, &nsd->tx_size_255); 1045 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1046 I40E_GLPRT_PTC511L(hw->port), 1047 pf->stat_offsets_loaded, 1048 &osd->tx_size_511, &nsd->tx_size_511); 1049 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1050 I40E_GLPRT_PTC1023L(hw->port), 1051 pf->stat_offsets_loaded, 1052 &osd->tx_size_1023, &nsd->tx_size_1023); 1053 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1054 I40E_GLPRT_PTC1522L(hw->port), 1055 pf->stat_offsets_loaded, 1056 &osd->tx_size_1522, &nsd->tx_size_1522); 1057 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1058 I40E_GLPRT_PTC9522L(hw->port), 1059 pf->stat_offsets_loaded, 1060 &osd->tx_size_big, &nsd->tx_size_big); 1061 1062 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1063 pf->stat_offsets_loaded, 1064 &osd->rx_undersize, &nsd->rx_undersize); 1065 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1066 pf->stat_offsets_loaded, 1067 &osd->rx_fragments, &nsd->rx_fragments); 1068 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1069 pf->stat_offsets_loaded, 1070 &osd->rx_oversize, &nsd->rx_oversize); 1071 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1072 pf->stat_offsets_loaded, 1073 &osd->rx_jabber, &nsd->rx_jabber); 1074 1075 /* FDIR stats */ 1076 i40e_stat_update32(hw, 1077 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)), 1078 pf->stat_offsets_loaded, 1079 &osd->fd_atr_match, &nsd->fd_atr_match); 1080 i40e_stat_update32(hw, 1081 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)), 1082 pf->stat_offsets_loaded, 1083 &osd->fd_sb_match, &nsd->fd_sb_match); 1084 i40e_stat_update32(hw, 1085 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)), 1086 pf->stat_offsets_loaded, 1087 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match); 1088 1089 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1090 nsd->tx_lpi_status = 1091 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1092 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1093 nsd->rx_lpi_status = 1094 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1095 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1096 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1097 pf->stat_offsets_loaded, 1098 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1099 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1100 pf->stat_offsets_loaded, 1101 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1102 1103 if (pf->flags & I40E_FLAG_FD_SB_ENABLED && 1104 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) 1105 nsd->fd_sb_status = true; 1106 else 1107 nsd->fd_sb_status = false; 1108 1109 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && 1110 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 1111 nsd->fd_atr_status = true; 1112 else 1113 nsd->fd_atr_status = false; 1114 1115 pf->stat_offsets_loaded = true; 1116 } 1117 1118 /** 1119 * i40e_update_stats - Update the various statistics counters. 1120 * @vsi: the VSI to be updated 1121 * 1122 * Update the various stats for this VSI and its related entities. 1123 **/ 1124 void i40e_update_stats(struct i40e_vsi *vsi) 1125 { 1126 struct i40e_pf *pf = vsi->back; 1127 1128 if (vsi == pf->vsi[pf->lan_vsi]) 1129 i40e_update_pf_stats(pf); 1130 1131 i40e_update_vsi_stats(vsi); 1132 #ifdef I40E_FCOE 1133 i40e_update_fcoe_stats(vsi); 1134 #endif 1135 } 1136 1137 /** 1138 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1139 * @vsi: the VSI to be searched 1140 * @macaddr: the MAC address 1141 * @vlan: the vlan 1142 * 1143 * Returns ptr to the filter object or NULL 1144 **/ 1145 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1146 const u8 *macaddr, s16 vlan) 1147 { 1148 struct i40e_mac_filter *f; 1149 u64 key; 1150 1151 if (!vsi || !macaddr) 1152 return NULL; 1153 1154 key = i40e_addr_to_hkey(macaddr); 1155 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1156 if ((ether_addr_equal(macaddr, f->macaddr)) && 1157 (vlan == f->vlan)) 1158 return f; 1159 } 1160 return NULL; 1161 } 1162 1163 /** 1164 * i40e_find_mac - Find a mac addr in the macvlan filters list 1165 * @vsi: the VSI to be searched 1166 * @macaddr: the MAC address we are searching for 1167 * 1168 * Returns the first filter with the provided MAC address or NULL if 1169 * MAC address was not found 1170 **/ 1171 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr) 1172 { 1173 struct i40e_mac_filter *f; 1174 u64 key; 1175 1176 if (!vsi || !macaddr) 1177 return NULL; 1178 1179 key = i40e_addr_to_hkey(macaddr); 1180 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1181 if ((ether_addr_equal(macaddr, f->macaddr))) 1182 return f; 1183 } 1184 return NULL; 1185 } 1186 1187 /** 1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1189 * @vsi: the VSI to be searched 1190 * 1191 * Returns true if VSI is in vlan mode or false otherwise 1192 **/ 1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1194 { 1195 /* If we have a PVID, always operate in VLAN mode */ 1196 if (vsi->info.pvid) 1197 return true; 1198 1199 /* We need to operate in VLAN mode whenever we have any filters with 1200 * a VLAN other than I40E_VLAN_ALL. We could check the table each 1201 * time, incurring search cost repeatedly. However, we can notice two 1202 * things: 1203 * 1204 * 1) the only place where we can gain a VLAN filter is in 1205 * i40e_add_filter. 1206 * 1207 * 2) the only place where filters are actually removed is in 1208 * i40e_sync_filters_subtask. 1209 * 1210 * Thus, we can simply use a boolean value, has_vlan_filters which we 1211 * will set to true when we add a VLAN filter in i40e_add_filter. Then 1212 * we have to perform the full search after deleting filters in 1213 * i40e_sync_filters_subtask, but we already have to search 1214 * filters here and can perform the check at the same time. This 1215 * results in avoiding embedding a loop for VLAN mode inside another 1216 * loop over all the filters, and should maintain correctness as noted 1217 * above. 1218 */ 1219 return vsi->has_vlan_filter; 1220 } 1221 1222 /** 1223 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary 1224 * @vsi: the VSI to configure 1225 * @tmp_add_list: list of filters ready to be added 1226 * @tmp_del_list: list of filters ready to be deleted 1227 * @vlan_filters: the number of active VLAN filters 1228 * 1229 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they 1230 * behave as expected. If we have any active VLAN filters remaining or about 1231 * to be added then we need to update non-VLAN filters to be marked as VLAN=0 1232 * so that they only match against untagged traffic. If we no longer have any 1233 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1 1234 * so that they match against both tagged and untagged traffic. In this way, 1235 * we ensure that we correctly receive the desired traffic. This ensures that 1236 * when we have an active VLAN we will receive only untagged traffic and 1237 * traffic matching active VLANs. If we have no active VLANs then we will 1238 * operate in non-VLAN mode and receive all traffic, tagged or untagged. 1239 * 1240 * Finally, in a similar fashion, this function also corrects filters when 1241 * there is an active PVID assigned to this VSI. 1242 * 1243 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0. 1244 * 1245 * This function is only expected to be called from within 1246 * i40e_sync_vsi_filters. 1247 * 1248 * NOTE: This function expects to be called while under the 1249 * mac_filter_hash_lock 1250 */ 1251 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi, 1252 struct hlist_head *tmp_add_list, 1253 struct hlist_head *tmp_del_list, 1254 int vlan_filters) 1255 { 1256 s16 pvid = le16_to_cpu(vsi->info.pvid); 1257 struct i40e_mac_filter *f, *add_head; 1258 struct i40e_new_mac_filter *new; 1259 struct hlist_node *h; 1260 int bkt, new_vlan; 1261 1262 /* To determine if a particular filter needs to be replaced we 1263 * have the three following conditions: 1264 * 1265 * a) if we have a PVID assigned, then all filters which are 1266 * not marked as VLAN=PVID must be replaced with filters that 1267 * are. 1268 * b) otherwise, if we have any active VLANS, all filters 1269 * which are marked as VLAN=-1 must be replaced with 1270 * filters marked as VLAN=0 1271 * c) finally, if we do not have any active VLANS, all filters 1272 * which are marked as VLAN=0 must be replaced with filters 1273 * marked as VLAN=-1 1274 */ 1275 1276 /* Update the filters about to be added in place */ 1277 hlist_for_each_entry(new, tmp_add_list, hlist) { 1278 if (pvid && new->f->vlan != pvid) 1279 new->f->vlan = pvid; 1280 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY) 1281 new->f->vlan = 0; 1282 else if (!vlan_filters && new->f->vlan == 0) 1283 new->f->vlan = I40E_VLAN_ANY; 1284 } 1285 1286 /* Update the remaining active filters */ 1287 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1288 /* Combine the checks for whether a filter needs to be changed 1289 * and then determine the new VLAN inside the if block, in 1290 * order to avoid duplicating code for adding the new filter 1291 * then deleting the old filter. 1292 */ 1293 if ((pvid && f->vlan != pvid) || 1294 (vlan_filters && f->vlan == I40E_VLAN_ANY) || 1295 (!vlan_filters && f->vlan == 0)) { 1296 /* Determine the new vlan we will be adding */ 1297 if (pvid) 1298 new_vlan = pvid; 1299 else if (vlan_filters) 1300 new_vlan = 0; 1301 else 1302 new_vlan = I40E_VLAN_ANY; 1303 1304 /* Create the new filter */ 1305 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan); 1306 if (!add_head) 1307 return -ENOMEM; 1308 1309 /* Create a temporary i40e_new_mac_filter */ 1310 new = kzalloc(sizeof(*new), GFP_ATOMIC); 1311 if (!new) 1312 return -ENOMEM; 1313 1314 new->f = add_head; 1315 new->state = add_head->state; 1316 1317 /* Add the new filter to the tmp list */ 1318 hlist_add_head(&new->hlist, tmp_add_list); 1319 1320 /* Put the original filter into the delete list */ 1321 f->state = I40E_FILTER_REMOVE; 1322 hash_del(&f->hlist); 1323 hlist_add_head(&f->hlist, tmp_del_list); 1324 } 1325 } 1326 1327 vsi->has_vlan_filter = !!vlan_filters; 1328 1329 return 0; 1330 } 1331 1332 /** 1333 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1334 * @vsi: the PF Main VSI - inappropriate for any other VSI 1335 * @macaddr: the MAC address 1336 * 1337 * Remove whatever filter the firmware set up so the driver can manage 1338 * its own filtering intelligently. 1339 **/ 1340 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1341 { 1342 struct i40e_aqc_remove_macvlan_element_data element; 1343 struct i40e_pf *pf = vsi->back; 1344 1345 /* Only appropriate for the PF main VSI */ 1346 if (vsi->type != I40E_VSI_MAIN) 1347 return; 1348 1349 memset(&element, 0, sizeof(element)); 1350 ether_addr_copy(element.mac_addr, macaddr); 1351 element.vlan_tag = 0; 1352 /* Ignore error returns, some firmware does it this way... */ 1353 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1354 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1355 1356 memset(&element, 0, sizeof(element)); 1357 ether_addr_copy(element.mac_addr, macaddr); 1358 element.vlan_tag = 0; 1359 /* ...and some firmware does it this way. */ 1360 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1361 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1362 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1363 } 1364 1365 /** 1366 * i40e_add_filter - Add a mac/vlan filter to the VSI 1367 * @vsi: the VSI to be searched 1368 * @macaddr: the MAC address 1369 * @vlan: the vlan 1370 * 1371 * Returns ptr to the filter object or NULL when no memory available. 1372 * 1373 * NOTE: This function is expected to be called with mac_filter_hash_lock 1374 * being held. 1375 **/ 1376 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1377 const u8 *macaddr, s16 vlan) 1378 { 1379 struct i40e_mac_filter *f; 1380 u64 key; 1381 1382 if (!vsi || !macaddr) 1383 return NULL; 1384 1385 f = i40e_find_filter(vsi, macaddr, vlan); 1386 if (!f) { 1387 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1388 if (!f) 1389 return NULL; 1390 1391 /* Update the boolean indicating if we need to function in 1392 * VLAN mode. 1393 */ 1394 if (vlan >= 0) 1395 vsi->has_vlan_filter = true; 1396 1397 ether_addr_copy(f->macaddr, macaddr); 1398 f->vlan = vlan; 1399 /* If we're in overflow promisc mode, set the state directly 1400 * to failed, so we don't bother to try sending the filter 1401 * to the hardware. 1402 */ 1403 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state)) 1404 f->state = I40E_FILTER_FAILED; 1405 else 1406 f->state = I40E_FILTER_NEW; 1407 INIT_HLIST_NODE(&f->hlist); 1408 1409 key = i40e_addr_to_hkey(macaddr); 1410 hash_add(vsi->mac_filter_hash, &f->hlist, key); 1411 1412 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1413 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1414 } 1415 1416 /* If we're asked to add a filter that has been marked for removal, it 1417 * is safe to simply restore it to active state. __i40e_del_filter 1418 * will have simply deleted any filters which were previously marked 1419 * NEW or FAILED, so if it is currently marked REMOVE it must have 1420 * previously been ACTIVE. Since we haven't yet run the sync filters 1421 * task, just restore this filter to the ACTIVE state so that the 1422 * sync task leaves it in place 1423 */ 1424 if (f->state == I40E_FILTER_REMOVE) 1425 f->state = I40E_FILTER_ACTIVE; 1426 1427 return f; 1428 } 1429 1430 /** 1431 * __i40e_del_filter - Remove a specific filter from the VSI 1432 * @vsi: VSI to remove from 1433 * @f: the filter to remove from the list 1434 * 1435 * This function should be called instead of i40e_del_filter only if you know 1436 * the exact filter you will remove already, such as via i40e_find_filter or 1437 * i40e_find_mac. 1438 * 1439 * NOTE: This function is expected to be called with mac_filter_hash_lock 1440 * being held. 1441 * ANOTHER NOTE: This function MUST be called from within the context of 1442 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1443 * instead of list_for_each_entry(). 1444 **/ 1445 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f) 1446 { 1447 if (!f) 1448 return; 1449 1450 /* If the filter was never added to firmware then we can just delete it 1451 * directly and we don't want to set the status to remove or else an 1452 * admin queue command will unnecessarily fire. 1453 */ 1454 if ((f->state == I40E_FILTER_FAILED) || 1455 (f->state == I40E_FILTER_NEW)) { 1456 hash_del(&f->hlist); 1457 kfree(f); 1458 } else { 1459 f->state = I40E_FILTER_REMOVE; 1460 } 1461 1462 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1463 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1464 } 1465 1466 /** 1467 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI 1468 * @vsi: the VSI to be searched 1469 * @macaddr: the MAC address 1470 * @vlan: the VLAN 1471 * 1472 * NOTE: This function is expected to be called with mac_filter_hash_lock 1473 * being held. 1474 * ANOTHER NOTE: This function MUST be called from within the context of 1475 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1476 * instead of list_for_each_entry(). 1477 **/ 1478 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan) 1479 { 1480 struct i40e_mac_filter *f; 1481 1482 if (!vsi || !macaddr) 1483 return; 1484 1485 f = i40e_find_filter(vsi, macaddr, vlan); 1486 __i40e_del_filter(vsi, f); 1487 } 1488 1489 /** 1490 * i40e_add_mac_filter - Add a MAC filter for all active VLANs 1491 * @vsi: the VSI to be searched 1492 * @macaddr: the mac address to be filtered 1493 * 1494 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise, 1495 * go through all the macvlan filters and add a macvlan filter for each 1496 * unique vlan that already exists. If a PVID has been assigned, instead only 1497 * add the macaddr to that VLAN. 1498 * 1499 * Returns last filter added on success, else NULL 1500 **/ 1501 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, 1502 const u8 *macaddr) 1503 { 1504 struct i40e_mac_filter *f, *add = NULL; 1505 struct hlist_node *h; 1506 int bkt; 1507 1508 if (vsi->info.pvid) 1509 return i40e_add_filter(vsi, macaddr, 1510 le16_to_cpu(vsi->info.pvid)); 1511 1512 if (!i40e_is_vsi_in_vlan(vsi)) 1513 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY); 1514 1515 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1516 if (f->state == I40E_FILTER_REMOVE) 1517 continue; 1518 add = i40e_add_filter(vsi, macaddr, f->vlan); 1519 if (!add) 1520 return NULL; 1521 } 1522 1523 return add; 1524 } 1525 1526 /** 1527 * i40e_del_mac_filter - Remove a MAC filter from all VLANs 1528 * @vsi: the VSI to be searched 1529 * @macaddr: the mac address to be removed 1530 * 1531 * Removes a given MAC address from a VSI regardless of what VLAN it has been 1532 * associated with. 1533 * 1534 * Returns 0 for success, or error 1535 **/ 1536 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr) 1537 { 1538 struct i40e_mac_filter *f; 1539 struct hlist_node *h; 1540 bool found = false; 1541 int bkt; 1542 1543 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock), 1544 "Missing mac_filter_hash_lock\n"); 1545 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1546 if (ether_addr_equal(macaddr, f->macaddr)) { 1547 __i40e_del_filter(vsi, f); 1548 found = true; 1549 } 1550 } 1551 1552 if (found) 1553 return 0; 1554 else 1555 return -ENOENT; 1556 } 1557 1558 /** 1559 * i40e_set_mac - NDO callback to set mac address 1560 * @netdev: network interface device structure 1561 * @p: pointer to an address structure 1562 * 1563 * Returns 0 on success, negative on failure 1564 **/ 1565 #ifdef I40E_FCOE 1566 int i40e_set_mac(struct net_device *netdev, void *p) 1567 #else 1568 static int i40e_set_mac(struct net_device *netdev, void *p) 1569 #endif 1570 { 1571 struct i40e_netdev_priv *np = netdev_priv(netdev); 1572 struct i40e_vsi *vsi = np->vsi; 1573 struct i40e_pf *pf = vsi->back; 1574 struct i40e_hw *hw = &pf->hw; 1575 struct sockaddr *addr = p; 1576 1577 if (!is_valid_ether_addr(addr->sa_data)) 1578 return -EADDRNOTAVAIL; 1579 1580 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1581 netdev_info(netdev, "already using mac address %pM\n", 1582 addr->sa_data); 1583 return 0; 1584 } 1585 1586 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1587 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1588 return -EADDRNOTAVAIL; 1589 1590 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1591 netdev_info(netdev, "returning to hw mac address %pM\n", 1592 hw->mac.addr); 1593 else 1594 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1595 1596 spin_lock_bh(&vsi->mac_filter_hash_lock); 1597 i40e_del_mac_filter(vsi, netdev->dev_addr); 1598 i40e_add_mac_filter(vsi, addr->sa_data); 1599 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1600 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1601 if (vsi->type == I40E_VSI_MAIN) { 1602 i40e_status ret; 1603 1604 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1605 I40E_AQC_WRITE_TYPE_LAA_WOL, 1606 addr->sa_data, NULL); 1607 if (ret) 1608 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n", 1609 i40e_stat_str(hw, ret), 1610 i40e_aq_str(hw, hw->aq.asq_last_status)); 1611 } 1612 1613 /* schedule our worker thread which will take care of 1614 * applying the new filter changes 1615 */ 1616 i40e_service_event_schedule(vsi->back); 1617 return 0; 1618 } 1619 1620 /** 1621 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1622 * @vsi: the VSI being setup 1623 * @ctxt: VSI context structure 1624 * @enabled_tc: Enabled TCs bitmap 1625 * @is_add: True if called before Add VSI 1626 * 1627 * Setup VSI queue mapping for enabled traffic classes. 1628 **/ 1629 #ifdef I40E_FCOE 1630 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1631 struct i40e_vsi_context *ctxt, 1632 u8 enabled_tc, 1633 bool is_add) 1634 #else 1635 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1636 struct i40e_vsi_context *ctxt, 1637 u8 enabled_tc, 1638 bool is_add) 1639 #endif 1640 { 1641 struct i40e_pf *pf = vsi->back; 1642 u16 sections = 0; 1643 u8 netdev_tc = 0; 1644 u16 numtc = 0; 1645 u16 qcount; 1646 u8 offset; 1647 u16 qmap; 1648 int i; 1649 u16 num_tc_qps = 0; 1650 1651 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1652 offset = 0; 1653 1654 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1655 /* Find numtc from enabled TC bitmap */ 1656 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1657 if (enabled_tc & BIT(i)) /* TC is enabled */ 1658 numtc++; 1659 } 1660 if (!numtc) { 1661 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1662 numtc = 1; 1663 } 1664 } else { 1665 /* At least TC0 is enabled in case of non-DCB case */ 1666 numtc = 1; 1667 } 1668 1669 vsi->tc_config.numtc = numtc; 1670 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1671 /* Number of queues per enabled TC */ 1672 qcount = vsi->alloc_queue_pairs; 1673 1674 num_tc_qps = qcount / numtc; 1675 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf)); 1676 1677 /* Setup queue offset/count for all TCs for given VSI */ 1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1679 /* See if the given TC is enabled for the given VSI */ 1680 if (vsi->tc_config.enabled_tc & BIT(i)) { 1681 /* TC is enabled */ 1682 int pow, num_qps; 1683 1684 switch (vsi->type) { 1685 case I40E_VSI_MAIN: 1686 qcount = min_t(int, pf->alloc_rss_size, 1687 num_tc_qps); 1688 break; 1689 #ifdef I40E_FCOE 1690 case I40E_VSI_FCOE: 1691 qcount = num_tc_qps; 1692 break; 1693 #endif 1694 case I40E_VSI_FDIR: 1695 case I40E_VSI_SRIOV: 1696 case I40E_VSI_VMDQ2: 1697 default: 1698 qcount = num_tc_qps; 1699 WARN_ON(i != 0); 1700 break; 1701 } 1702 vsi->tc_config.tc_info[i].qoffset = offset; 1703 vsi->tc_config.tc_info[i].qcount = qcount; 1704 1705 /* find the next higher power-of-2 of num queue pairs */ 1706 num_qps = qcount; 1707 pow = 0; 1708 while (num_qps && (BIT_ULL(pow) < qcount)) { 1709 pow++; 1710 num_qps >>= 1; 1711 } 1712 1713 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1714 qmap = 1715 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1716 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1717 1718 offset += qcount; 1719 } else { 1720 /* TC is not enabled so set the offset to 1721 * default queue and allocate one queue 1722 * for the given TC. 1723 */ 1724 vsi->tc_config.tc_info[i].qoffset = 0; 1725 vsi->tc_config.tc_info[i].qcount = 1; 1726 vsi->tc_config.tc_info[i].netdev_tc = 0; 1727 1728 qmap = 0; 1729 } 1730 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1731 } 1732 1733 /* Set actual Tx/Rx queue pairs */ 1734 vsi->num_queue_pairs = offset; 1735 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1736 if (vsi->req_queue_pairs > 0) 1737 vsi->num_queue_pairs = vsi->req_queue_pairs; 1738 else if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1739 vsi->num_queue_pairs = pf->num_lan_msix; 1740 } 1741 1742 /* Scheduler section valid can only be set for ADD VSI */ 1743 if (is_add) { 1744 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1745 1746 ctxt->info.up_enable_bits = enabled_tc; 1747 } 1748 if (vsi->type == I40E_VSI_SRIOV) { 1749 ctxt->info.mapping_flags |= 1750 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1751 for (i = 0; i < vsi->num_queue_pairs; i++) 1752 ctxt->info.queue_mapping[i] = 1753 cpu_to_le16(vsi->base_queue + i); 1754 } else { 1755 ctxt->info.mapping_flags |= 1756 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1757 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1758 } 1759 ctxt->info.valid_sections |= cpu_to_le16(sections); 1760 } 1761 1762 /** 1763 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address 1764 * @netdev: the netdevice 1765 * @addr: address to add 1766 * 1767 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call 1768 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1769 */ 1770 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr) 1771 { 1772 struct i40e_netdev_priv *np = netdev_priv(netdev); 1773 struct i40e_vsi *vsi = np->vsi; 1774 1775 if (i40e_add_mac_filter(vsi, addr)) 1776 return 0; 1777 else 1778 return -ENOMEM; 1779 } 1780 1781 /** 1782 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address 1783 * @netdev: the netdevice 1784 * @addr: address to add 1785 * 1786 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call 1787 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1788 */ 1789 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr) 1790 { 1791 struct i40e_netdev_priv *np = netdev_priv(netdev); 1792 struct i40e_vsi *vsi = np->vsi; 1793 1794 i40e_del_mac_filter(vsi, addr); 1795 1796 return 0; 1797 } 1798 1799 /** 1800 * i40e_set_rx_mode - NDO callback to set the netdev filters 1801 * @netdev: network interface device structure 1802 **/ 1803 #ifdef I40E_FCOE 1804 void i40e_set_rx_mode(struct net_device *netdev) 1805 #else 1806 static void i40e_set_rx_mode(struct net_device *netdev) 1807 #endif 1808 { 1809 struct i40e_netdev_priv *np = netdev_priv(netdev); 1810 struct i40e_vsi *vsi = np->vsi; 1811 1812 spin_lock_bh(&vsi->mac_filter_hash_lock); 1813 1814 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1815 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1816 1817 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1818 1819 /* check for other flag changes */ 1820 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1821 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1822 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1823 } 1824 1825 /* schedule our worker thread which will take care of 1826 * applying the new filter changes 1827 */ 1828 i40e_service_event_schedule(vsi->back); 1829 } 1830 1831 /** 1832 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries 1833 * @vsi: Pointer to VSI struct 1834 * @from: Pointer to list which contains MAC filter entries - changes to 1835 * those entries needs to be undone. 1836 * 1837 * MAC filter entries from this list were slated for deletion. 1838 **/ 1839 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi, 1840 struct hlist_head *from) 1841 { 1842 struct i40e_mac_filter *f; 1843 struct hlist_node *h; 1844 1845 hlist_for_each_entry_safe(f, h, from, hlist) { 1846 u64 key = i40e_addr_to_hkey(f->macaddr); 1847 1848 /* Move the element back into MAC filter list*/ 1849 hlist_del(&f->hlist); 1850 hash_add(vsi->mac_filter_hash, &f->hlist, key); 1851 } 1852 } 1853 1854 /** 1855 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries 1856 * @vsi: Pointer to vsi struct 1857 * @from: Pointer to list which contains MAC filter entries - changes to 1858 * those entries needs to be undone. 1859 * 1860 * MAC filter entries from this list were slated for addition. 1861 **/ 1862 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi, 1863 struct hlist_head *from) 1864 { 1865 struct i40e_new_mac_filter *new; 1866 struct hlist_node *h; 1867 1868 hlist_for_each_entry_safe(new, h, from, hlist) { 1869 /* We can simply free the wrapper structure */ 1870 hlist_del(&new->hlist); 1871 kfree(new); 1872 } 1873 } 1874 1875 /** 1876 * i40e_next_entry - Get the next non-broadcast filter from a list 1877 * @next: pointer to filter in list 1878 * 1879 * Returns the next non-broadcast filter in the list. Required so that we 1880 * ignore broadcast filters within the list, since these are not handled via 1881 * the normal firmware update path. 1882 */ 1883 static 1884 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next) 1885 { 1886 while (next) { 1887 next = hlist_entry(next->hlist.next, 1888 typeof(struct i40e_new_mac_filter), 1889 hlist); 1890 1891 /* keep going if we found a broadcast filter */ 1892 if (next && is_broadcast_ether_addr(next->f->macaddr)) 1893 continue; 1894 1895 break; 1896 } 1897 1898 return next; 1899 } 1900 1901 /** 1902 * i40e_update_filter_state - Update filter state based on return data 1903 * from firmware 1904 * @count: Number of filters added 1905 * @add_list: return data from fw 1906 * @head: pointer to first filter in current batch 1907 * 1908 * MAC filter entries from list were slated to be added to device. Returns 1909 * number of successful filters. Note that 0 does NOT mean success! 1910 **/ 1911 static int 1912 i40e_update_filter_state(int count, 1913 struct i40e_aqc_add_macvlan_element_data *add_list, 1914 struct i40e_new_mac_filter *add_head) 1915 { 1916 int retval = 0; 1917 int i; 1918 1919 for (i = 0; i < count; i++) { 1920 /* Always check status of each filter. We don't need to check 1921 * the firmware return status because we pre-set the filter 1922 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter 1923 * request to the adminq. Thus, if it no longer matches then 1924 * we know the filter is active. 1925 */ 1926 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) { 1927 add_head->state = I40E_FILTER_FAILED; 1928 } else { 1929 add_head->state = I40E_FILTER_ACTIVE; 1930 retval++; 1931 } 1932 1933 add_head = i40e_next_filter(add_head); 1934 if (!add_head) 1935 break; 1936 } 1937 1938 return retval; 1939 } 1940 1941 /** 1942 * i40e_aqc_del_filters - Request firmware to delete a set of filters 1943 * @vsi: ptr to the VSI 1944 * @vsi_name: name to display in messages 1945 * @list: the list of filters to send to firmware 1946 * @num_del: the number of filters to delete 1947 * @retval: Set to -EIO on failure to delete 1948 * 1949 * Send a request to firmware via AdminQ to delete a set of filters. Uses 1950 * *retval instead of a return value so that success does not force ret_val to 1951 * be set to 0. This ensures that a sequence of calls to this function 1952 * preserve the previous value of *retval on successful delete. 1953 */ 1954 static 1955 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name, 1956 struct i40e_aqc_remove_macvlan_element_data *list, 1957 int num_del, int *retval) 1958 { 1959 struct i40e_hw *hw = &vsi->back->hw; 1960 i40e_status aq_ret; 1961 int aq_err; 1962 1963 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL); 1964 aq_err = hw->aq.asq_last_status; 1965 1966 /* Explicitly ignore and do not report when firmware returns ENOENT */ 1967 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) { 1968 *retval = -EIO; 1969 dev_info(&vsi->back->pdev->dev, 1970 "ignoring delete macvlan error on %s, err %s, aq_err %s\n", 1971 vsi_name, i40e_stat_str(hw, aq_ret), 1972 i40e_aq_str(hw, aq_err)); 1973 } 1974 } 1975 1976 /** 1977 * i40e_aqc_add_filters - Request firmware to add a set of filters 1978 * @vsi: ptr to the VSI 1979 * @vsi_name: name to display in messages 1980 * @list: the list of filters to send to firmware 1981 * @add_head: Position in the add hlist 1982 * @num_add: the number of filters to add 1983 * @promisc_change: set to true on exit if promiscuous mode was forced on 1984 * 1985 * Send a request to firmware via AdminQ to add a chunk of filters. Will set 1986 * promisc_changed to true if the firmware has run out of space for more 1987 * filters. 1988 */ 1989 static 1990 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name, 1991 struct i40e_aqc_add_macvlan_element_data *list, 1992 struct i40e_new_mac_filter *add_head, 1993 int num_add, bool *promisc_changed) 1994 { 1995 struct i40e_hw *hw = &vsi->back->hw; 1996 int aq_err, fcnt; 1997 1998 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL); 1999 aq_err = hw->aq.asq_last_status; 2000 fcnt = i40e_update_filter_state(num_add, list, add_head); 2001 2002 if (fcnt != num_add) { 2003 *promisc_changed = true; 2004 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state); 2005 dev_warn(&vsi->back->pdev->dev, 2006 "Error %s adding RX filters on %s, promiscuous mode forced on\n", 2007 i40e_aq_str(hw, aq_err), 2008 vsi_name); 2009 } 2010 } 2011 2012 /** 2013 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags 2014 * @vsi: pointer to the VSI 2015 * @f: filter data 2016 * 2017 * This function sets or clears the promiscuous broadcast flags for VLAN 2018 * filters in order to properly receive broadcast frames. Assumes that only 2019 * broadcast filters are passed. 2020 * 2021 * Returns status indicating success or failure; 2022 **/ 2023 static i40e_status 2024 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name, 2025 struct i40e_mac_filter *f) 2026 { 2027 bool enable = f->state == I40E_FILTER_NEW; 2028 struct i40e_hw *hw = &vsi->back->hw; 2029 i40e_status aq_ret; 2030 2031 if (f->vlan == I40E_VLAN_ANY) { 2032 aq_ret = i40e_aq_set_vsi_broadcast(hw, 2033 vsi->seid, 2034 enable, 2035 NULL); 2036 } else { 2037 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw, 2038 vsi->seid, 2039 enable, 2040 f->vlan, 2041 NULL); 2042 } 2043 2044 if (aq_ret) 2045 dev_warn(&vsi->back->pdev->dev, 2046 "Error %s setting broadcast promiscuous mode on %s\n", 2047 i40e_aq_str(hw, hw->aq.asq_last_status), 2048 vsi_name); 2049 2050 return aq_ret; 2051 } 2052 2053 /** 2054 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 2055 * @vsi: ptr to the VSI 2056 * 2057 * Push any outstanding VSI filter changes through the AdminQ. 2058 * 2059 * Returns 0 or error value 2060 **/ 2061 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 2062 { 2063 struct hlist_head tmp_add_list, tmp_del_list; 2064 struct i40e_mac_filter *f; 2065 struct i40e_new_mac_filter *new, *add_head = NULL; 2066 struct i40e_hw *hw = &vsi->back->hw; 2067 unsigned int failed_filters = 0; 2068 unsigned int vlan_filters = 0; 2069 bool promisc_changed = false; 2070 char vsi_name[16] = "PF"; 2071 int filter_list_len = 0; 2072 i40e_status aq_ret = 0; 2073 u32 changed_flags = 0; 2074 struct hlist_node *h; 2075 struct i40e_pf *pf; 2076 int num_add = 0; 2077 int num_del = 0; 2078 int retval = 0; 2079 u16 cmd_flags; 2080 int list_size; 2081 int bkt; 2082 2083 /* empty array typed pointers, kcalloc later */ 2084 struct i40e_aqc_add_macvlan_element_data *add_list; 2085 struct i40e_aqc_remove_macvlan_element_data *del_list; 2086 2087 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 2088 usleep_range(1000, 2000); 2089 pf = vsi->back; 2090 2091 if (vsi->netdev) { 2092 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 2093 vsi->current_netdev_flags = vsi->netdev->flags; 2094 } 2095 2096 INIT_HLIST_HEAD(&tmp_add_list); 2097 INIT_HLIST_HEAD(&tmp_del_list); 2098 2099 if (vsi->type == I40E_VSI_SRIOV) 2100 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id); 2101 else if (vsi->type != I40E_VSI_MAIN) 2102 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid); 2103 2104 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 2105 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 2106 2107 spin_lock_bh(&vsi->mac_filter_hash_lock); 2108 /* Create a list of filters to delete. */ 2109 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2110 if (f->state == I40E_FILTER_REMOVE) { 2111 /* Move the element into temporary del_list */ 2112 hash_del(&f->hlist); 2113 hlist_add_head(&f->hlist, &tmp_del_list); 2114 2115 /* Avoid counting removed filters */ 2116 continue; 2117 } 2118 if (f->state == I40E_FILTER_NEW) { 2119 /* Create a temporary i40e_new_mac_filter */ 2120 new = kzalloc(sizeof(*new), GFP_ATOMIC); 2121 if (!new) 2122 goto err_no_memory_locked; 2123 2124 /* Store pointer to the real filter */ 2125 new->f = f; 2126 new->state = f->state; 2127 2128 /* Add it to the hash list */ 2129 hlist_add_head(&new->hlist, &tmp_add_list); 2130 } 2131 2132 /* Count the number of active (current and new) VLAN 2133 * filters we have now. Does not count filters which 2134 * are marked for deletion. 2135 */ 2136 if (f->vlan > 0) 2137 vlan_filters++; 2138 } 2139 2140 retval = i40e_correct_mac_vlan_filters(vsi, 2141 &tmp_add_list, 2142 &tmp_del_list, 2143 vlan_filters); 2144 if (retval) 2145 goto err_no_memory_locked; 2146 2147 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2148 } 2149 2150 /* Now process 'del_list' outside the lock */ 2151 if (!hlist_empty(&tmp_del_list)) { 2152 filter_list_len = hw->aq.asq_buf_size / 2153 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2154 list_size = filter_list_len * 2155 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2156 del_list = kzalloc(list_size, GFP_ATOMIC); 2157 if (!del_list) 2158 goto err_no_memory; 2159 2160 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) { 2161 cmd_flags = 0; 2162 2163 /* handle broadcast filters by updating the broadcast 2164 * promiscuous flag and release filter list. 2165 */ 2166 if (is_broadcast_ether_addr(f->macaddr)) { 2167 i40e_aqc_broadcast_filter(vsi, vsi_name, f); 2168 2169 hlist_del(&f->hlist); 2170 kfree(f); 2171 continue; 2172 } 2173 2174 /* add to delete list */ 2175 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 2176 if (f->vlan == I40E_VLAN_ANY) { 2177 del_list[num_del].vlan_tag = 0; 2178 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 2179 } else { 2180 del_list[num_del].vlan_tag = 2181 cpu_to_le16((u16)(f->vlan)); 2182 } 2183 2184 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 2185 del_list[num_del].flags = cmd_flags; 2186 num_del++; 2187 2188 /* flush a full buffer */ 2189 if (num_del == filter_list_len) { 2190 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2191 num_del, &retval); 2192 memset(del_list, 0, list_size); 2193 num_del = 0; 2194 } 2195 /* Release memory for MAC filter entries which were 2196 * synced up with HW. 2197 */ 2198 hlist_del(&f->hlist); 2199 kfree(f); 2200 } 2201 2202 if (num_del) { 2203 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2204 num_del, &retval); 2205 } 2206 2207 kfree(del_list); 2208 del_list = NULL; 2209 } 2210 2211 if (!hlist_empty(&tmp_add_list)) { 2212 /* Do all the adds now. */ 2213 filter_list_len = hw->aq.asq_buf_size / 2214 sizeof(struct i40e_aqc_add_macvlan_element_data); 2215 list_size = filter_list_len * 2216 sizeof(struct i40e_aqc_add_macvlan_element_data); 2217 add_list = kzalloc(list_size, GFP_ATOMIC); 2218 if (!add_list) 2219 goto err_no_memory; 2220 2221 num_add = 0; 2222 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2223 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 2224 &vsi->state)) { 2225 new->state = I40E_FILTER_FAILED; 2226 continue; 2227 } 2228 2229 /* handle broadcast filters by updating the broadcast 2230 * promiscuous flag instead of adding a MAC filter. 2231 */ 2232 if (is_broadcast_ether_addr(new->f->macaddr)) { 2233 if (i40e_aqc_broadcast_filter(vsi, vsi_name, 2234 new->f)) 2235 new->state = I40E_FILTER_FAILED; 2236 else 2237 new->state = I40E_FILTER_ACTIVE; 2238 continue; 2239 } 2240 2241 /* add to add array */ 2242 if (num_add == 0) 2243 add_head = new; 2244 cmd_flags = 0; 2245 ether_addr_copy(add_list[num_add].mac_addr, 2246 new->f->macaddr); 2247 if (new->f->vlan == I40E_VLAN_ANY) { 2248 add_list[num_add].vlan_tag = 0; 2249 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; 2250 } else { 2251 add_list[num_add].vlan_tag = 2252 cpu_to_le16((u16)(new->f->vlan)); 2253 } 2254 add_list[num_add].queue_number = 0; 2255 /* set invalid match method for later detection */ 2256 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES; 2257 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 2258 add_list[num_add].flags = cpu_to_le16(cmd_flags); 2259 num_add++; 2260 2261 /* flush a full buffer */ 2262 if (num_add == filter_list_len) { 2263 i40e_aqc_add_filters(vsi, vsi_name, add_list, 2264 add_head, num_add, 2265 &promisc_changed); 2266 memset(add_list, 0, list_size); 2267 num_add = 0; 2268 } 2269 } 2270 if (num_add) { 2271 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head, 2272 num_add, &promisc_changed); 2273 } 2274 /* Now move all of the filters from the temp add list back to 2275 * the VSI's list. 2276 */ 2277 spin_lock_bh(&vsi->mac_filter_hash_lock); 2278 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2279 /* Only update the state if we're still NEW */ 2280 if (new->f->state == I40E_FILTER_NEW) 2281 new->f->state = new->state; 2282 hlist_del(&new->hlist); 2283 kfree(new); 2284 } 2285 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2286 kfree(add_list); 2287 add_list = NULL; 2288 } 2289 2290 /* Determine the number of active and failed filters. */ 2291 spin_lock_bh(&vsi->mac_filter_hash_lock); 2292 vsi->active_filters = 0; 2293 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) { 2294 if (f->state == I40E_FILTER_ACTIVE) 2295 vsi->active_filters++; 2296 else if (f->state == I40E_FILTER_FAILED) 2297 failed_filters++; 2298 } 2299 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2300 2301 /* If promiscuous mode has changed, we need to calculate a new 2302 * threshold for when we are safe to exit 2303 */ 2304 if (promisc_changed) 2305 vsi->promisc_threshold = (vsi->active_filters * 3) / 4; 2306 2307 /* Check if we are able to exit overflow promiscuous mode. We can 2308 * safely exit if we didn't just enter, we no longer have any failed 2309 * filters, and we have reduced filters below the threshold value. 2310 */ 2311 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) && 2312 !promisc_changed && !failed_filters && 2313 (vsi->active_filters < vsi->promisc_threshold)) { 2314 dev_info(&pf->pdev->dev, 2315 "filter logjam cleared on %s, leaving overflow promiscuous mode\n", 2316 vsi_name); 2317 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state); 2318 promisc_changed = true; 2319 vsi->promisc_threshold = 0; 2320 } 2321 2322 /* if the VF is not trusted do not do promisc */ 2323 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) { 2324 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state); 2325 goto out; 2326 } 2327 2328 /* check for changes in promiscuous modes */ 2329 if (changed_flags & IFF_ALLMULTI) { 2330 bool cur_multipromisc; 2331 2332 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 2333 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 2334 vsi->seid, 2335 cur_multipromisc, 2336 NULL); 2337 if (aq_ret) { 2338 retval = i40e_aq_rc_to_posix(aq_ret, 2339 hw->aq.asq_last_status); 2340 dev_info(&pf->pdev->dev, 2341 "set multi promisc failed on %s, err %s aq_err %s\n", 2342 vsi_name, 2343 i40e_stat_str(hw, aq_ret), 2344 i40e_aq_str(hw, hw->aq.asq_last_status)); 2345 } 2346 } 2347 if ((changed_flags & IFF_PROMISC) || 2348 (promisc_changed && 2349 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) { 2350 bool cur_promisc; 2351 2352 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 2353 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 2354 &vsi->state)); 2355 if ((vsi->type == I40E_VSI_MAIN) && 2356 (pf->lan_veb != I40E_NO_VEB) && 2357 !(pf->flags & I40E_FLAG_MFP_ENABLED)) { 2358 /* set defport ON for Main VSI instead of true promisc 2359 * this way we will get all unicast/multicast and VLAN 2360 * promisc behavior but will not get VF or VMDq traffic 2361 * replicated on the Main VSI. 2362 */ 2363 if (pf->cur_promisc != cur_promisc) { 2364 pf->cur_promisc = cur_promisc; 2365 if (cur_promisc) 2366 aq_ret = 2367 i40e_aq_set_default_vsi(hw, 2368 vsi->seid, 2369 NULL); 2370 else 2371 aq_ret = 2372 i40e_aq_clear_default_vsi(hw, 2373 vsi->seid, 2374 NULL); 2375 if (aq_ret) { 2376 retval = i40e_aq_rc_to_posix(aq_ret, 2377 hw->aq.asq_last_status); 2378 dev_info(&pf->pdev->dev, 2379 "Set default VSI failed on %s, err %s, aq_err %s\n", 2380 vsi_name, 2381 i40e_stat_str(hw, aq_ret), 2382 i40e_aq_str(hw, 2383 hw->aq.asq_last_status)); 2384 } 2385 } 2386 } else { 2387 aq_ret = i40e_aq_set_vsi_unicast_promiscuous( 2388 hw, 2389 vsi->seid, 2390 cur_promisc, NULL, 2391 true); 2392 if (aq_ret) { 2393 retval = 2394 i40e_aq_rc_to_posix(aq_ret, 2395 hw->aq.asq_last_status); 2396 dev_info(&pf->pdev->dev, 2397 "set unicast promisc failed on %s, err %s, aq_err %s\n", 2398 vsi_name, 2399 i40e_stat_str(hw, aq_ret), 2400 i40e_aq_str(hw, 2401 hw->aq.asq_last_status)); 2402 } 2403 aq_ret = i40e_aq_set_vsi_multicast_promiscuous( 2404 hw, 2405 vsi->seid, 2406 cur_promisc, NULL); 2407 if (aq_ret) { 2408 retval = 2409 i40e_aq_rc_to_posix(aq_ret, 2410 hw->aq.asq_last_status); 2411 dev_info(&pf->pdev->dev, 2412 "set multicast promisc failed on %s, err %s, aq_err %s\n", 2413 vsi_name, 2414 i40e_stat_str(hw, aq_ret), 2415 i40e_aq_str(hw, 2416 hw->aq.asq_last_status)); 2417 } 2418 } 2419 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 2420 vsi->seid, 2421 cur_promisc, NULL); 2422 if (aq_ret) { 2423 retval = i40e_aq_rc_to_posix(aq_ret, 2424 pf->hw.aq.asq_last_status); 2425 dev_info(&pf->pdev->dev, 2426 "set brdcast promisc failed, err %s, aq_err %s\n", 2427 i40e_stat_str(hw, aq_ret), 2428 i40e_aq_str(hw, 2429 hw->aq.asq_last_status)); 2430 } 2431 } 2432 out: 2433 /* if something went wrong then set the changed flag so we try again */ 2434 if (retval) 2435 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2436 2437 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 2438 return retval; 2439 2440 err_no_memory: 2441 /* Restore elements on the temporary add and delete lists */ 2442 spin_lock_bh(&vsi->mac_filter_hash_lock); 2443 err_no_memory_locked: 2444 i40e_undo_del_filter_entries(vsi, &tmp_del_list); 2445 i40e_undo_add_filter_entries(vsi, &tmp_add_list); 2446 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2447 2448 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2449 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 2450 return -ENOMEM; 2451 } 2452 2453 /** 2454 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 2455 * @pf: board private structure 2456 **/ 2457 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 2458 { 2459 int v; 2460 2461 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 2462 return; 2463 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 2464 2465 for (v = 0; v < pf->num_alloc_vsi; v++) { 2466 if (pf->vsi[v] && 2467 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { 2468 int ret = i40e_sync_vsi_filters(pf->vsi[v]); 2469 2470 if (ret) { 2471 /* come back and try again later */ 2472 pf->flags |= I40E_FLAG_FILTER_SYNC; 2473 break; 2474 } 2475 } 2476 } 2477 } 2478 2479 /** 2480 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 2481 * @netdev: network interface device structure 2482 * @new_mtu: new value for maximum frame size 2483 * 2484 * Returns 0 on success, negative on failure 2485 **/ 2486 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 2487 { 2488 struct i40e_netdev_priv *np = netdev_priv(netdev); 2489 struct i40e_vsi *vsi = np->vsi; 2490 2491 netdev_info(netdev, "changing MTU from %d to %d\n", 2492 netdev->mtu, new_mtu); 2493 netdev->mtu = new_mtu; 2494 if (netif_running(netdev)) 2495 i40e_vsi_reinit_locked(vsi); 2496 i40e_notify_client_of_l2_param_changes(vsi); 2497 return 0; 2498 } 2499 2500 /** 2501 * i40e_ioctl - Access the hwtstamp interface 2502 * @netdev: network interface device structure 2503 * @ifr: interface request data 2504 * @cmd: ioctl command 2505 **/ 2506 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2507 { 2508 struct i40e_netdev_priv *np = netdev_priv(netdev); 2509 struct i40e_pf *pf = np->vsi->back; 2510 2511 switch (cmd) { 2512 case SIOCGHWTSTAMP: 2513 return i40e_ptp_get_ts_config(pf, ifr); 2514 case SIOCSHWTSTAMP: 2515 return i40e_ptp_set_ts_config(pf, ifr); 2516 default: 2517 return -EOPNOTSUPP; 2518 } 2519 } 2520 2521 /** 2522 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 2523 * @vsi: the vsi being adjusted 2524 **/ 2525 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 2526 { 2527 struct i40e_vsi_context ctxt; 2528 i40e_status ret; 2529 2530 if ((vsi->info.valid_sections & 2531 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2532 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 2533 return; /* already enabled */ 2534 2535 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2536 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2537 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 2538 2539 ctxt.seid = vsi->seid; 2540 ctxt.info = vsi->info; 2541 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2542 if (ret) { 2543 dev_info(&vsi->back->pdev->dev, 2544 "update vlan stripping failed, err %s aq_err %s\n", 2545 i40e_stat_str(&vsi->back->hw, ret), 2546 i40e_aq_str(&vsi->back->hw, 2547 vsi->back->hw.aq.asq_last_status)); 2548 } 2549 } 2550 2551 /** 2552 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2553 * @vsi: the vsi being adjusted 2554 **/ 2555 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2556 { 2557 struct i40e_vsi_context ctxt; 2558 i40e_status ret; 2559 2560 if ((vsi->info.valid_sections & 2561 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2562 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2563 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2564 return; /* already disabled */ 2565 2566 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2567 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2568 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2569 2570 ctxt.seid = vsi->seid; 2571 ctxt.info = vsi->info; 2572 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2573 if (ret) { 2574 dev_info(&vsi->back->pdev->dev, 2575 "update vlan stripping failed, err %s aq_err %s\n", 2576 i40e_stat_str(&vsi->back->hw, ret), 2577 i40e_aq_str(&vsi->back->hw, 2578 vsi->back->hw.aq.asq_last_status)); 2579 } 2580 } 2581 2582 /** 2583 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2584 * @netdev: network interface to be adjusted 2585 * @features: netdev features to test if VLAN offload is enabled or not 2586 **/ 2587 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2588 { 2589 struct i40e_netdev_priv *np = netdev_priv(netdev); 2590 struct i40e_vsi *vsi = np->vsi; 2591 2592 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2593 i40e_vlan_stripping_enable(vsi); 2594 else 2595 i40e_vlan_stripping_disable(vsi); 2596 } 2597 2598 /** 2599 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address 2600 * @vsi: the vsi being configured 2601 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2602 * 2603 * This is a helper function for adding a new MAC/VLAN filter with the 2604 * specified VLAN for each existing MAC address already in the hash table. 2605 * This function does *not* perform any accounting to update filters based on 2606 * VLAN mode. 2607 * 2608 * NOTE: this function expects to be called while under the 2609 * mac_filter_hash_lock 2610 **/ 2611 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2612 { 2613 struct i40e_mac_filter *f, *add_f; 2614 struct hlist_node *h; 2615 int bkt; 2616 2617 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2618 if (f->state == I40E_FILTER_REMOVE) 2619 continue; 2620 add_f = i40e_add_filter(vsi, f->macaddr, vid); 2621 if (!add_f) { 2622 dev_info(&vsi->back->pdev->dev, 2623 "Could not add vlan filter %d for %pM\n", 2624 vid, f->macaddr); 2625 return -ENOMEM; 2626 } 2627 } 2628 2629 return 0; 2630 } 2631 2632 /** 2633 * i40e_vsi_add_vlan - Add VSI membership for given VLAN 2634 * @vsi: the VSI being configured 2635 * @vid: VLAN id to be added 2636 **/ 2637 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid) 2638 { 2639 int err; 2640 2641 if (!vid || vsi->info.pvid) 2642 return -EINVAL; 2643 2644 /* Locked once because all functions invoked below iterates list*/ 2645 spin_lock_bh(&vsi->mac_filter_hash_lock); 2646 err = i40e_add_vlan_all_mac(vsi, vid); 2647 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2648 if (err) 2649 return err; 2650 2651 /* schedule our worker thread which will take care of 2652 * applying the new filter changes 2653 */ 2654 i40e_service_event_schedule(vsi->back); 2655 return 0; 2656 } 2657 2658 /** 2659 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN 2660 * @vsi: the vsi being configured 2661 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2662 * 2663 * This function should be used to remove all VLAN filters which match the 2664 * given VID. It does not schedule the service event and does not take the 2665 * mac_filter_hash_lock so it may be combined with other operations under 2666 * a single invocation of the mac_filter_hash_lock. 2667 * 2668 * NOTE: this function expects to be called while under the 2669 * mac_filter_hash_lock 2670 */ 2671 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2672 { 2673 struct i40e_mac_filter *f; 2674 struct hlist_node *h; 2675 int bkt; 2676 2677 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2678 if (f->vlan == vid) 2679 __i40e_del_filter(vsi, f); 2680 } 2681 } 2682 2683 /** 2684 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN 2685 * @vsi: the VSI being configured 2686 * @vid: VLAN id to be removed 2687 **/ 2688 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid) 2689 { 2690 if (!vid || vsi->info.pvid) 2691 return; 2692 2693 spin_lock_bh(&vsi->mac_filter_hash_lock); 2694 i40e_rm_vlan_all_mac(vsi, vid); 2695 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2696 2697 /* schedule our worker thread which will take care of 2698 * applying the new filter changes 2699 */ 2700 i40e_service_event_schedule(vsi->back); 2701 } 2702 2703 /** 2704 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2705 * @netdev: network interface to be adjusted 2706 * @vid: vlan id to be added 2707 * 2708 * net_device_ops implementation for adding vlan ids 2709 **/ 2710 #ifdef I40E_FCOE 2711 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2712 __always_unused __be16 proto, u16 vid) 2713 #else 2714 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2715 __always_unused __be16 proto, u16 vid) 2716 #endif 2717 { 2718 struct i40e_netdev_priv *np = netdev_priv(netdev); 2719 struct i40e_vsi *vsi = np->vsi; 2720 int ret = 0; 2721 2722 if (vid >= VLAN_N_VID) 2723 return -EINVAL; 2724 2725 /* If the network stack called us with vid = 0 then 2726 * it is asking to receive priority tagged packets with 2727 * vlan id 0. Our HW receives them by default when configured 2728 * to receive untagged packets so there is no need to add an 2729 * extra filter for vlan 0 tagged packets. 2730 */ 2731 if (vid) 2732 ret = i40e_vsi_add_vlan(vsi, vid); 2733 2734 if (!ret) 2735 set_bit(vid, vsi->active_vlans); 2736 2737 return ret; 2738 } 2739 2740 /** 2741 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2742 * @netdev: network interface to be adjusted 2743 * @vid: vlan id to be removed 2744 * 2745 * net_device_ops implementation for removing vlan ids 2746 **/ 2747 #ifdef I40E_FCOE 2748 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2749 __always_unused __be16 proto, u16 vid) 2750 #else 2751 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2752 __always_unused __be16 proto, u16 vid) 2753 #endif 2754 { 2755 struct i40e_netdev_priv *np = netdev_priv(netdev); 2756 struct i40e_vsi *vsi = np->vsi; 2757 2758 /* return code is ignored as there is nothing a user 2759 * can do about failure to remove and a log message was 2760 * already printed from the other function 2761 */ 2762 i40e_vsi_kill_vlan(vsi, vid); 2763 2764 clear_bit(vid, vsi->active_vlans); 2765 2766 return 0; 2767 } 2768 2769 /** 2770 * i40e_macaddr_init - explicitly write the mac address filters 2771 * 2772 * @vsi: pointer to the vsi 2773 * @macaddr: the MAC address 2774 * 2775 * This is needed when the macaddr has been obtained by other 2776 * means than the default, e.g., from Open Firmware or IDPROM. 2777 * Returns 0 on success, negative on failure 2778 **/ 2779 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr) 2780 { 2781 int ret; 2782 struct i40e_aqc_add_macvlan_element_data element; 2783 2784 ret = i40e_aq_mac_address_write(&vsi->back->hw, 2785 I40E_AQC_WRITE_TYPE_LAA_WOL, 2786 macaddr, NULL); 2787 if (ret) { 2788 dev_info(&vsi->back->pdev->dev, 2789 "Addr change for VSI failed: %d\n", ret); 2790 return -EADDRNOTAVAIL; 2791 } 2792 2793 memset(&element, 0, sizeof(element)); 2794 ether_addr_copy(element.mac_addr, macaddr); 2795 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 2796 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL); 2797 if (ret) { 2798 dev_info(&vsi->back->pdev->dev, 2799 "add filter failed err %s aq_err %s\n", 2800 i40e_stat_str(&vsi->back->hw, ret), 2801 i40e_aq_str(&vsi->back->hw, 2802 vsi->back->hw.aq.asq_last_status)); 2803 } 2804 return ret; 2805 } 2806 2807 /** 2808 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2809 * @vsi: the vsi being brought back up 2810 **/ 2811 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2812 { 2813 u16 vid; 2814 2815 if (!vsi->netdev) 2816 return; 2817 2818 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2819 2820 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2821 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2822 vid); 2823 } 2824 2825 /** 2826 * i40e_vsi_add_pvid - Add pvid for the VSI 2827 * @vsi: the vsi being adjusted 2828 * @vid: the vlan id to set as a PVID 2829 **/ 2830 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2831 { 2832 struct i40e_vsi_context ctxt; 2833 i40e_status ret; 2834 2835 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2836 vsi->info.pvid = cpu_to_le16(vid); 2837 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2838 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2839 I40E_AQ_VSI_PVLAN_EMOD_STR; 2840 2841 ctxt.seid = vsi->seid; 2842 ctxt.info = vsi->info; 2843 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2844 if (ret) { 2845 dev_info(&vsi->back->pdev->dev, 2846 "add pvid failed, err %s aq_err %s\n", 2847 i40e_stat_str(&vsi->back->hw, ret), 2848 i40e_aq_str(&vsi->back->hw, 2849 vsi->back->hw.aq.asq_last_status)); 2850 return -ENOENT; 2851 } 2852 2853 return 0; 2854 } 2855 2856 /** 2857 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2858 * @vsi: the vsi being adjusted 2859 * 2860 * Just use the vlan_rx_register() service to put it back to normal 2861 **/ 2862 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2863 { 2864 i40e_vlan_stripping_disable(vsi); 2865 2866 vsi->info.pvid = 0; 2867 } 2868 2869 /** 2870 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2871 * @vsi: ptr to the VSI 2872 * 2873 * If this function returns with an error, then it's possible one or 2874 * more of the rings is populated (while the rest are not). It is the 2875 * callers duty to clean those orphaned rings. 2876 * 2877 * Return 0 on success, negative on failure 2878 **/ 2879 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2880 { 2881 int i, err = 0; 2882 2883 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2884 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2885 2886 return err; 2887 } 2888 2889 /** 2890 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2891 * @vsi: ptr to the VSI 2892 * 2893 * Free VSI's transmit software resources 2894 **/ 2895 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2896 { 2897 int i; 2898 2899 if (!vsi->tx_rings) 2900 return; 2901 2902 for (i = 0; i < vsi->num_queue_pairs; i++) 2903 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2904 i40e_free_tx_resources(vsi->tx_rings[i]); 2905 } 2906 2907 /** 2908 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2909 * @vsi: ptr to the VSI 2910 * 2911 * If this function returns with an error, then it's possible one or 2912 * more of the rings is populated (while the rest are not). It is the 2913 * callers duty to clean those orphaned rings. 2914 * 2915 * Return 0 on success, negative on failure 2916 **/ 2917 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2918 { 2919 int i, err = 0; 2920 2921 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2922 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2923 #ifdef I40E_FCOE 2924 i40e_fcoe_setup_ddp_resources(vsi); 2925 #endif 2926 return err; 2927 } 2928 2929 /** 2930 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2931 * @vsi: ptr to the VSI 2932 * 2933 * Free all receive software resources 2934 **/ 2935 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2936 { 2937 int i; 2938 2939 if (!vsi->rx_rings) 2940 return; 2941 2942 for (i = 0; i < vsi->num_queue_pairs; i++) 2943 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2944 i40e_free_rx_resources(vsi->rx_rings[i]); 2945 #ifdef I40E_FCOE 2946 i40e_fcoe_free_ddp_resources(vsi); 2947 #endif 2948 } 2949 2950 /** 2951 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2952 * @ring: The Tx ring to configure 2953 * 2954 * This enables/disables XPS for a given Tx descriptor ring 2955 * based on the TCs enabled for the VSI that ring belongs to. 2956 **/ 2957 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2958 { 2959 struct i40e_vsi *vsi = ring->vsi; 2960 cpumask_var_t mask; 2961 2962 if (!ring->q_vector || !ring->netdev) 2963 return; 2964 2965 /* Single TC mode enable XPS */ 2966 if (vsi->tc_config.numtc <= 1) { 2967 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) 2968 netif_set_xps_queue(ring->netdev, 2969 &ring->q_vector->affinity_mask, 2970 ring->queue_index); 2971 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2972 /* Disable XPS to allow selection based on TC */ 2973 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2974 netif_set_xps_queue(ring->netdev, mask, ring->queue_index); 2975 free_cpumask_var(mask); 2976 } 2977 2978 /* schedule our worker thread which will take care of 2979 * applying the new filter changes 2980 */ 2981 i40e_service_event_schedule(vsi->back); 2982 } 2983 2984 /** 2985 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2986 * @ring: The Tx ring to configure 2987 * 2988 * Configure the Tx descriptor ring in the HMC context. 2989 **/ 2990 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2991 { 2992 struct i40e_vsi *vsi = ring->vsi; 2993 u16 pf_q = vsi->base_queue + ring->queue_index; 2994 struct i40e_hw *hw = &vsi->back->hw; 2995 struct i40e_hmc_obj_txq tx_ctx; 2996 i40e_status err = 0; 2997 u32 qtx_ctl = 0; 2998 2999 /* some ATR related tx ring init */ 3000 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 3001 ring->atr_sample_rate = vsi->back->atr_sample_rate; 3002 ring->atr_count = 0; 3003 } else { 3004 ring->atr_sample_rate = 0; 3005 } 3006 3007 /* configure XPS */ 3008 i40e_config_xps_tx_ring(ring); 3009 3010 /* clear the context structure first */ 3011 memset(&tx_ctx, 0, sizeof(tx_ctx)); 3012 3013 tx_ctx.new_context = 1; 3014 tx_ctx.base = (ring->dma / 128); 3015 tx_ctx.qlen = ring->count; 3016 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 3017 I40E_FLAG_FD_ATR_ENABLED)); 3018 #ifdef I40E_FCOE 3019 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 3020 #endif 3021 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 3022 /* FDIR VSI tx ring can still use RS bit and writebacks */ 3023 if (vsi->type != I40E_VSI_FDIR) 3024 tx_ctx.head_wb_ena = 1; 3025 tx_ctx.head_wb_addr = ring->dma + 3026 (ring->count * sizeof(struct i40e_tx_desc)); 3027 3028 /* As part of VSI creation/update, FW allocates certain 3029 * Tx arbitration queue sets for each TC enabled for 3030 * the VSI. The FW returns the handles to these queue 3031 * sets as part of the response buffer to Add VSI, 3032 * Update VSI, etc. AQ commands. It is expected that 3033 * these queue set handles be associated with the Tx 3034 * queues by the driver as part of the TX queue context 3035 * initialization. This has to be done regardless of 3036 * DCB as by default everything is mapped to TC0. 3037 */ 3038 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 3039 tx_ctx.rdylist_act = 0; 3040 3041 /* clear the context in the HMC */ 3042 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 3043 if (err) { 3044 dev_info(&vsi->back->pdev->dev, 3045 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 3046 ring->queue_index, pf_q, err); 3047 return -ENOMEM; 3048 } 3049 3050 /* set the context in the HMC */ 3051 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 3052 if (err) { 3053 dev_info(&vsi->back->pdev->dev, 3054 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 3055 ring->queue_index, pf_q, err); 3056 return -ENOMEM; 3057 } 3058 3059 /* Now associate this queue with this PCI function */ 3060 if (vsi->type == I40E_VSI_VMDQ2) { 3061 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 3062 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 3063 I40E_QTX_CTL_VFVM_INDX_MASK; 3064 } else { 3065 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 3066 } 3067 3068 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 3069 I40E_QTX_CTL_PF_INDX_MASK); 3070 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 3071 i40e_flush(hw); 3072 3073 /* cache tail off for easier writes later */ 3074 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 3075 3076 return 0; 3077 } 3078 3079 /** 3080 * i40e_configure_rx_ring - Configure a receive ring context 3081 * @ring: The Rx ring to configure 3082 * 3083 * Configure the Rx descriptor ring in the HMC context. 3084 **/ 3085 static int i40e_configure_rx_ring(struct i40e_ring *ring) 3086 { 3087 struct i40e_vsi *vsi = ring->vsi; 3088 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 3089 u16 pf_q = vsi->base_queue + ring->queue_index; 3090 struct i40e_hw *hw = &vsi->back->hw; 3091 struct i40e_hmc_obj_rxq rx_ctx; 3092 i40e_status err = 0; 3093 3094 ring->state = 0; 3095 3096 /* clear the context structure first */ 3097 memset(&rx_ctx, 0, sizeof(rx_ctx)); 3098 3099 ring->rx_buf_len = vsi->rx_buf_len; 3100 3101 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 3102 3103 rx_ctx.base = (ring->dma / 128); 3104 rx_ctx.qlen = ring->count; 3105 3106 /* use 32 byte descriptors */ 3107 rx_ctx.dsize = 1; 3108 3109 /* descriptor type is always zero 3110 * rx_ctx.dtype = 0; 3111 */ 3112 rx_ctx.hsplit_0 = 0; 3113 3114 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len); 3115 if (hw->revision_id == 0) 3116 rx_ctx.lrxqthresh = 0; 3117 else 3118 rx_ctx.lrxqthresh = 2; 3119 rx_ctx.crcstrip = 1; 3120 rx_ctx.l2tsel = 1; 3121 /* this controls whether VLAN is stripped from inner headers */ 3122 rx_ctx.showiv = 0; 3123 #ifdef I40E_FCOE 3124 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 3125 #endif 3126 /* set the prefena field to 1 because the manual says to */ 3127 rx_ctx.prefena = 1; 3128 3129 /* clear the context in the HMC */ 3130 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 3131 if (err) { 3132 dev_info(&vsi->back->pdev->dev, 3133 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3134 ring->queue_index, pf_q, err); 3135 return -ENOMEM; 3136 } 3137 3138 /* set the context in the HMC */ 3139 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 3140 if (err) { 3141 dev_info(&vsi->back->pdev->dev, 3142 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3143 ring->queue_index, pf_q, err); 3144 return -ENOMEM; 3145 } 3146 3147 /* cache tail for quicker writes, and clear the reg before use */ 3148 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 3149 writel(0, ring->tail); 3150 3151 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); 3152 3153 return 0; 3154 } 3155 3156 /** 3157 * i40e_vsi_configure_tx - Configure the VSI for Tx 3158 * @vsi: VSI structure describing this set of rings and resources 3159 * 3160 * Configure the Tx VSI for operation. 3161 **/ 3162 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 3163 { 3164 int err = 0; 3165 u16 i; 3166 3167 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 3168 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 3169 3170 return err; 3171 } 3172 3173 /** 3174 * i40e_vsi_configure_rx - Configure the VSI for Rx 3175 * @vsi: the VSI being configured 3176 * 3177 * Configure the Rx VSI for operation. 3178 **/ 3179 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 3180 { 3181 int err = 0; 3182 u16 i; 3183 3184 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 3185 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 3186 + ETH_FCS_LEN + VLAN_HLEN; 3187 else 3188 vsi->max_frame = I40E_RXBUFFER_2048; 3189 3190 vsi->rx_buf_len = I40E_RXBUFFER_2048; 3191 3192 #ifdef I40E_FCOE 3193 /* setup rx buffer for FCoE */ 3194 if ((vsi->type == I40E_VSI_FCOE) && 3195 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 3196 vsi->rx_buf_len = I40E_RXBUFFER_3072; 3197 vsi->max_frame = I40E_RXBUFFER_3072; 3198 } 3199 3200 #endif /* I40E_FCOE */ 3201 /* round up for the chip's needs */ 3202 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 3203 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); 3204 3205 /* set up individual rings */ 3206 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3207 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 3208 3209 return err; 3210 } 3211 3212 /** 3213 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 3214 * @vsi: ptr to the VSI 3215 **/ 3216 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 3217 { 3218 struct i40e_ring *tx_ring, *rx_ring; 3219 u16 qoffset, qcount; 3220 int i, n; 3221 3222 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 3223 /* Reset the TC information */ 3224 for (i = 0; i < vsi->num_queue_pairs; i++) { 3225 rx_ring = vsi->rx_rings[i]; 3226 tx_ring = vsi->tx_rings[i]; 3227 rx_ring->dcb_tc = 0; 3228 tx_ring->dcb_tc = 0; 3229 } 3230 } 3231 3232 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 3233 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) 3234 continue; 3235 3236 qoffset = vsi->tc_config.tc_info[n].qoffset; 3237 qcount = vsi->tc_config.tc_info[n].qcount; 3238 for (i = qoffset; i < (qoffset + qcount); i++) { 3239 rx_ring = vsi->rx_rings[i]; 3240 tx_ring = vsi->tx_rings[i]; 3241 rx_ring->dcb_tc = n; 3242 tx_ring->dcb_tc = n; 3243 } 3244 } 3245 } 3246 3247 /** 3248 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 3249 * @vsi: ptr to the VSI 3250 **/ 3251 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 3252 { 3253 struct i40e_pf *pf = vsi->back; 3254 int err; 3255 3256 if (vsi->netdev) 3257 i40e_set_rx_mode(vsi->netdev); 3258 3259 if (!!(pf->flags & I40E_FLAG_PF_MAC)) { 3260 err = i40e_macaddr_init(vsi, pf->hw.mac.addr); 3261 if (err) { 3262 dev_warn(&pf->pdev->dev, 3263 "could not set up macaddr; err %d\n", err); 3264 } 3265 } 3266 } 3267 3268 /** 3269 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 3270 * @vsi: Pointer to the targeted VSI 3271 * 3272 * This function replays the hlist on the hw where all the SB Flow Director 3273 * filters were saved. 3274 **/ 3275 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 3276 { 3277 struct i40e_fdir_filter *filter; 3278 struct i40e_pf *pf = vsi->back; 3279 struct hlist_node *node; 3280 3281 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3282 return; 3283 3284 hlist_for_each_entry_safe(filter, node, 3285 &pf->fdir_filter_list, fdir_node) { 3286 i40e_add_del_fdir(vsi, filter, true); 3287 } 3288 } 3289 3290 /** 3291 * i40e_vsi_configure - Set up the VSI for action 3292 * @vsi: the VSI being configured 3293 **/ 3294 static int i40e_vsi_configure(struct i40e_vsi *vsi) 3295 { 3296 int err; 3297 3298 i40e_set_vsi_rx_mode(vsi); 3299 i40e_restore_vlan(vsi); 3300 i40e_vsi_config_dcb_rings(vsi); 3301 err = i40e_vsi_configure_tx(vsi); 3302 if (!err) 3303 err = i40e_vsi_configure_rx(vsi); 3304 3305 return err; 3306 } 3307 3308 /** 3309 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 3310 * @vsi: the VSI being configured 3311 **/ 3312 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 3313 { 3314 struct i40e_pf *pf = vsi->back; 3315 struct i40e_hw *hw = &pf->hw; 3316 u16 vector; 3317 int i, q; 3318 u32 qp; 3319 3320 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 3321 * and PFINT_LNKLSTn registers, e.g.: 3322 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 3323 */ 3324 qp = vsi->base_queue; 3325 vector = vsi->base_vector; 3326 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 3327 struct i40e_q_vector *q_vector = vsi->q_vectors[i]; 3328 3329 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3330 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting); 3331 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3332 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 3333 q_vector->rx.itr); 3334 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting); 3335 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3336 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 3337 q_vector->tx.itr); 3338 wr32(hw, I40E_PFINT_RATEN(vector - 1), 3339 i40e_intrl_usec_to_reg(vsi->int_rate_limit)); 3340 3341 /* Linked list for the queuepairs assigned to this vector */ 3342 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 3343 for (q = 0; q < q_vector->num_ringpairs; q++) { 3344 u32 val; 3345 3346 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3347 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3348 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 3349 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 3350 (I40E_QUEUE_TYPE_TX 3351 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 3352 3353 wr32(hw, I40E_QINT_RQCTL(qp), val); 3354 3355 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3356 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3357 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3358 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 3359 (I40E_QUEUE_TYPE_RX 3360 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3361 3362 /* Terminate the linked list */ 3363 if (q == (q_vector->num_ringpairs - 1)) 3364 val |= (I40E_QUEUE_END_OF_LIST 3365 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3366 3367 wr32(hw, I40E_QINT_TQCTL(qp), val); 3368 qp++; 3369 } 3370 } 3371 3372 i40e_flush(hw); 3373 } 3374 3375 /** 3376 * i40e_enable_misc_int_causes - enable the non-queue interrupts 3377 * @hw: ptr to the hardware info 3378 **/ 3379 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 3380 { 3381 struct i40e_hw *hw = &pf->hw; 3382 u32 val; 3383 3384 /* clear things first */ 3385 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 3386 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 3387 3388 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 3389 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 3390 I40E_PFINT_ICR0_ENA_GRST_MASK | 3391 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 3392 I40E_PFINT_ICR0_ENA_GPIO_MASK | 3393 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 3394 I40E_PFINT_ICR0_ENA_VFLR_MASK | 3395 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3396 3397 if (pf->flags & I40E_FLAG_IWARP_ENABLED) 3398 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3399 3400 if (pf->flags & I40E_FLAG_PTP) 3401 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3402 3403 wr32(hw, I40E_PFINT_ICR0_ENA, val); 3404 3405 /* SW_ITR_IDX = 0, but don't change INTENA */ 3406 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 3407 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 3408 3409 /* OTHER_ITR_IDX = 0 */ 3410 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 3411 } 3412 3413 /** 3414 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 3415 * @vsi: the VSI being configured 3416 **/ 3417 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 3418 { 3419 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3420 struct i40e_pf *pf = vsi->back; 3421 struct i40e_hw *hw = &pf->hw; 3422 u32 val; 3423 3424 /* set the ITR configuration */ 3425 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3426 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting); 3427 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3428 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 3429 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting); 3430 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3431 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 3432 3433 i40e_enable_misc_int_causes(pf); 3434 3435 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 3436 wr32(hw, I40E_PFINT_LNKLST0, 0); 3437 3438 /* Associate the queue pair to the vector and enable the queue int */ 3439 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3440 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3441 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3442 3443 wr32(hw, I40E_QINT_RQCTL(0), val); 3444 3445 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3446 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3447 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3448 3449 wr32(hw, I40E_QINT_TQCTL(0), val); 3450 i40e_flush(hw); 3451 } 3452 3453 /** 3454 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 3455 * @pf: board private structure 3456 **/ 3457 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 3458 { 3459 struct i40e_hw *hw = &pf->hw; 3460 3461 wr32(hw, I40E_PFINT_DYN_CTL0, 3462 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 3463 i40e_flush(hw); 3464 } 3465 3466 /** 3467 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 3468 * @pf: board private structure 3469 * @clearpba: true when all pending interrupt events should be cleared 3470 **/ 3471 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba) 3472 { 3473 struct i40e_hw *hw = &pf->hw; 3474 u32 val; 3475 3476 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 3477 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) | 3478 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 3479 3480 wr32(hw, I40E_PFINT_DYN_CTL0, val); 3481 i40e_flush(hw); 3482 } 3483 3484 /** 3485 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 3486 * @irq: interrupt number 3487 * @data: pointer to a q_vector 3488 **/ 3489 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3490 { 3491 struct i40e_q_vector *q_vector = data; 3492 3493 if (!q_vector->tx.ring && !q_vector->rx.ring) 3494 return IRQ_HANDLED; 3495 3496 napi_schedule_irqoff(&q_vector->napi); 3497 3498 return IRQ_HANDLED; 3499 } 3500 3501 /** 3502 * i40e_irq_affinity_notify - Callback for affinity changes 3503 * @notify: context as to what irq was changed 3504 * @mask: the new affinity mask 3505 * 3506 * This is a callback function used by the irq_set_affinity_notifier function 3507 * so that we may register to receive changes to the irq affinity masks. 3508 **/ 3509 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify, 3510 const cpumask_t *mask) 3511 { 3512 struct i40e_q_vector *q_vector = 3513 container_of(notify, struct i40e_q_vector, affinity_notify); 3514 3515 q_vector->affinity_mask = *mask; 3516 } 3517 3518 /** 3519 * i40e_irq_affinity_release - Callback for affinity notifier release 3520 * @ref: internal core kernel usage 3521 * 3522 * This is a callback function used by the irq_set_affinity_notifier function 3523 * to inform the current notification subscriber that they will no longer 3524 * receive notifications. 3525 **/ 3526 static void i40e_irq_affinity_release(struct kref *ref) {} 3527 3528 /** 3529 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3530 * @vsi: the VSI being configured 3531 * @basename: name for the vector 3532 * 3533 * Allocates MSI-X vectors and requests interrupts from the kernel. 3534 **/ 3535 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3536 { 3537 int q_vectors = vsi->num_q_vectors; 3538 struct i40e_pf *pf = vsi->back; 3539 int base = vsi->base_vector; 3540 int rx_int_idx = 0; 3541 int tx_int_idx = 0; 3542 int vector, err; 3543 int irq_num; 3544 3545 for (vector = 0; vector < q_vectors; vector++) { 3546 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3547 3548 irq_num = pf->msix_entries[base + vector].vector; 3549 3550 if (q_vector->tx.ring && q_vector->rx.ring) { 3551 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3552 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3553 tx_int_idx++; 3554 } else if (q_vector->rx.ring) { 3555 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3556 "%s-%s-%d", basename, "rx", rx_int_idx++); 3557 } else if (q_vector->tx.ring) { 3558 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3559 "%s-%s-%d", basename, "tx", tx_int_idx++); 3560 } else { 3561 /* skip this unused q_vector */ 3562 continue; 3563 } 3564 err = request_irq(irq_num, 3565 vsi->irq_handler, 3566 0, 3567 q_vector->name, 3568 q_vector); 3569 if (err) { 3570 dev_info(&pf->pdev->dev, 3571 "MSIX request_irq failed, error: %d\n", err); 3572 goto free_queue_irqs; 3573 } 3574 3575 /* register for affinity change notifications */ 3576 q_vector->affinity_notify.notify = i40e_irq_affinity_notify; 3577 q_vector->affinity_notify.release = i40e_irq_affinity_release; 3578 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify); 3579 /* assign the mask for this irq */ 3580 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask); 3581 } 3582 3583 vsi->irqs_ready = true; 3584 return 0; 3585 3586 free_queue_irqs: 3587 while (vector) { 3588 vector--; 3589 irq_num = pf->msix_entries[base + vector].vector; 3590 irq_set_affinity_notifier(irq_num, NULL); 3591 irq_set_affinity_hint(irq_num, NULL); 3592 free_irq(irq_num, &vsi->q_vectors[vector]); 3593 } 3594 return err; 3595 } 3596 3597 /** 3598 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3599 * @vsi: the VSI being un-configured 3600 **/ 3601 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3602 { 3603 struct i40e_pf *pf = vsi->back; 3604 struct i40e_hw *hw = &pf->hw; 3605 int base = vsi->base_vector; 3606 int i; 3607 3608 for (i = 0; i < vsi->num_queue_pairs; i++) { 3609 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3610 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3611 } 3612 3613 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3614 for (i = vsi->base_vector; 3615 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3616 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3617 3618 i40e_flush(hw); 3619 for (i = 0; i < vsi->num_q_vectors; i++) 3620 synchronize_irq(pf->msix_entries[i + base].vector); 3621 } else { 3622 /* Legacy and MSI mode - this stops all interrupt handling */ 3623 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3624 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3625 i40e_flush(hw); 3626 synchronize_irq(pf->pdev->irq); 3627 } 3628 } 3629 3630 /** 3631 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3632 * @vsi: the VSI being configured 3633 **/ 3634 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3635 { 3636 struct i40e_pf *pf = vsi->back; 3637 int i; 3638 3639 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3640 for (i = 0; i < vsi->num_q_vectors; i++) 3641 i40e_irq_dynamic_enable(vsi, i); 3642 } else { 3643 i40e_irq_dynamic_enable_icr0(pf, true); 3644 } 3645 3646 i40e_flush(&pf->hw); 3647 return 0; 3648 } 3649 3650 /** 3651 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3652 * @pf: board private structure 3653 **/ 3654 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3655 { 3656 /* Disable ICR 0 */ 3657 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3658 i40e_flush(&pf->hw); 3659 } 3660 3661 /** 3662 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3663 * @irq: interrupt number 3664 * @data: pointer to a q_vector 3665 * 3666 * This is the handler used for all MSI/Legacy interrupts, and deals 3667 * with both queue and non-queue interrupts. This is also used in 3668 * MSIX mode to handle the non-queue interrupts. 3669 **/ 3670 static irqreturn_t i40e_intr(int irq, void *data) 3671 { 3672 struct i40e_pf *pf = (struct i40e_pf *)data; 3673 struct i40e_hw *hw = &pf->hw; 3674 irqreturn_t ret = IRQ_NONE; 3675 u32 icr0, icr0_remaining; 3676 u32 val, ena_mask; 3677 3678 icr0 = rd32(hw, I40E_PFINT_ICR0); 3679 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3680 3681 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3682 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3683 goto enable_intr; 3684 3685 /* if interrupt but no bits showing, must be SWINT */ 3686 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3687 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3688 pf->sw_int_count++; 3689 3690 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 3691 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { 3692 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3693 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3694 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n"); 3695 } 3696 3697 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3698 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3699 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 3700 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3701 3702 /* We do not have a way to disarm Queue causes while leaving 3703 * interrupt enabled for all other causes, ideally 3704 * interrupt should be disabled while we are in NAPI but 3705 * this is not a performance path and napi_schedule() 3706 * can deal with rescheduling. 3707 */ 3708 if (!test_bit(__I40E_DOWN, &pf->state)) 3709 napi_schedule_irqoff(&q_vector->napi); 3710 } 3711 3712 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3713 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3714 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3715 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n"); 3716 } 3717 3718 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3719 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3720 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3721 } 3722 3723 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3724 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3725 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3726 } 3727 3728 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3729 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3730 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3731 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3732 val = rd32(hw, I40E_GLGEN_RSTAT); 3733 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3734 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3735 if (val == I40E_RESET_CORER) { 3736 pf->corer_count++; 3737 } else if (val == I40E_RESET_GLOBR) { 3738 pf->globr_count++; 3739 } else if (val == I40E_RESET_EMPR) { 3740 pf->empr_count++; 3741 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); 3742 } 3743 } 3744 3745 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3746 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3747 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3748 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3749 rd32(hw, I40E_PFHMC_ERRORINFO), 3750 rd32(hw, I40E_PFHMC_ERRORDATA)); 3751 } 3752 3753 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3754 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3755 3756 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3757 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3758 i40e_ptp_tx_hwtstamp(pf); 3759 } 3760 } 3761 3762 /* If a critical error is pending we have no choice but to reset the 3763 * device. 3764 * Report and mask out any remaining unexpected interrupts. 3765 */ 3766 icr0_remaining = icr0 & ena_mask; 3767 if (icr0_remaining) { 3768 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3769 icr0_remaining); 3770 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3771 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3772 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3773 dev_info(&pf->pdev->dev, "device will be reset\n"); 3774 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3775 i40e_service_event_schedule(pf); 3776 } 3777 ena_mask &= ~icr0_remaining; 3778 } 3779 ret = IRQ_HANDLED; 3780 3781 enable_intr: 3782 /* re-enable interrupt causes */ 3783 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3784 if (!test_bit(__I40E_DOWN, &pf->state)) { 3785 i40e_service_event_schedule(pf); 3786 i40e_irq_dynamic_enable_icr0(pf, false); 3787 } 3788 3789 return ret; 3790 } 3791 3792 /** 3793 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3794 * @tx_ring: tx ring to clean 3795 * @budget: how many cleans we're allowed 3796 * 3797 * Returns true if there's any budget left (e.g. the clean is finished) 3798 **/ 3799 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3800 { 3801 struct i40e_vsi *vsi = tx_ring->vsi; 3802 u16 i = tx_ring->next_to_clean; 3803 struct i40e_tx_buffer *tx_buf; 3804 struct i40e_tx_desc *tx_desc; 3805 3806 tx_buf = &tx_ring->tx_bi[i]; 3807 tx_desc = I40E_TX_DESC(tx_ring, i); 3808 i -= tx_ring->count; 3809 3810 do { 3811 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3812 3813 /* if next_to_watch is not set then there is no work pending */ 3814 if (!eop_desc) 3815 break; 3816 3817 /* prevent any other reads prior to eop_desc */ 3818 read_barrier_depends(); 3819 3820 /* if the descriptor isn't done, no work yet to do */ 3821 if (!(eop_desc->cmd_type_offset_bsz & 3822 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3823 break; 3824 3825 /* clear next_to_watch to prevent false hangs */ 3826 tx_buf->next_to_watch = NULL; 3827 3828 tx_desc->buffer_addr = 0; 3829 tx_desc->cmd_type_offset_bsz = 0; 3830 /* move past filter desc */ 3831 tx_buf++; 3832 tx_desc++; 3833 i++; 3834 if (unlikely(!i)) { 3835 i -= tx_ring->count; 3836 tx_buf = tx_ring->tx_bi; 3837 tx_desc = I40E_TX_DESC(tx_ring, 0); 3838 } 3839 /* unmap skb header data */ 3840 dma_unmap_single(tx_ring->dev, 3841 dma_unmap_addr(tx_buf, dma), 3842 dma_unmap_len(tx_buf, len), 3843 DMA_TO_DEVICE); 3844 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3845 kfree(tx_buf->raw_buf); 3846 3847 tx_buf->raw_buf = NULL; 3848 tx_buf->tx_flags = 0; 3849 tx_buf->next_to_watch = NULL; 3850 dma_unmap_len_set(tx_buf, len, 0); 3851 tx_desc->buffer_addr = 0; 3852 tx_desc->cmd_type_offset_bsz = 0; 3853 3854 /* move us past the eop_desc for start of next FD desc */ 3855 tx_buf++; 3856 tx_desc++; 3857 i++; 3858 if (unlikely(!i)) { 3859 i -= tx_ring->count; 3860 tx_buf = tx_ring->tx_bi; 3861 tx_desc = I40E_TX_DESC(tx_ring, 0); 3862 } 3863 3864 /* update budget accounting */ 3865 budget--; 3866 } while (likely(budget)); 3867 3868 i += tx_ring->count; 3869 tx_ring->next_to_clean = i; 3870 3871 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) 3872 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx); 3873 3874 return budget > 0; 3875 } 3876 3877 /** 3878 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3879 * @irq: interrupt number 3880 * @data: pointer to a q_vector 3881 **/ 3882 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3883 { 3884 struct i40e_q_vector *q_vector = data; 3885 struct i40e_vsi *vsi; 3886 3887 if (!q_vector->tx.ring) 3888 return IRQ_HANDLED; 3889 3890 vsi = q_vector->tx.ring->vsi; 3891 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3892 3893 return IRQ_HANDLED; 3894 } 3895 3896 /** 3897 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3898 * @vsi: the VSI being configured 3899 * @v_idx: vector index 3900 * @qp_idx: queue pair index 3901 **/ 3902 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3903 { 3904 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3905 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3906 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3907 3908 tx_ring->q_vector = q_vector; 3909 tx_ring->next = q_vector->tx.ring; 3910 q_vector->tx.ring = tx_ring; 3911 q_vector->tx.count++; 3912 3913 rx_ring->q_vector = q_vector; 3914 rx_ring->next = q_vector->rx.ring; 3915 q_vector->rx.ring = rx_ring; 3916 q_vector->rx.count++; 3917 } 3918 3919 /** 3920 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3921 * @vsi: the VSI being configured 3922 * 3923 * This function maps descriptor rings to the queue-specific vectors 3924 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3925 * one vector per queue pair, but on a constrained vector budget, we 3926 * group the queue pairs as "efficiently" as possible. 3927 **/ 3928 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3929 { 3930 int qp_remaining = vsi->num_queue_pairs; 3931 int q_vectors = vsi->num_q_vectors; 3932 int num_ringpairs; 3933 int v_start = 0; 3934 int qp_idx = 0; 3935 3936 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3937 * group them so there are multiple queues per vector. 3938 * It is also important to go through all the vectors available to be 3939 * sure that if we don't use all the vectors, that the remaining vectors 3940 * are cleared. This is especially important when decreasing the 3941 * number of queues in use. 3942 */ 3943 for (; v_start < q_vectors; v_start++) { 3944 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3945 3946 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3947 3948 q_vector->num_ringpairs = num_ringpairs; 3949 3950 q_vector->rx.count = 0; 3951 q_vector->tx.count = 0; 3952 q_vector->rx.ring = NULL; 3953 q_vector->tx.ring = NULL; 3954 3955 while (num_ringpairs--) { 3956 i40e_map_vector_to_qp(vsi, v_start, qp_idx); 3957 qp_idx++; 3958 qp_remaining--; 3959 } 3960 } 3961 } 3962 3963 /** 3964 * i40e_vsi_request_irq - Request IRQ from the OS 3965 * @vsi: the VSI being configured 3966 * @basename: name for the vector 3967 **/ 3968 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3969 { 3970 struct i40e_pf *pf = vsi->back; 3971 int err; 3972 3973 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3974 err = i40e_vsi_request_irq_msix(vsi, basename); 3975 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3976 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3977 pf->int_name, pf); 3978 else 3979 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3980 pf->int_name, pf); 3981 3982 if (err) 3983 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3984 3985 return err; 3986 } 3987 3988 #ifdef CONFIG_NET_POLL_CONTROLLER 3989 /** 3990 * i40e_netpoll - A Polling 'interrupt' handler 3991 * @netdev: network interface device structure 3992 * 3993 * This is used by netconsole to send skbs without having to re-enable 3994 * interrupts. It's not called while the normal interrupt routine is executing. 3995 **/ 3996 #ifdef I40E_FCOE 3997 void i40e_netpoll(struct net_device *netdev) 3998 #else 3999 static void i40e_netpoll(struct net_device *netdev) 4000 #endif 4001 { 4002 struct i40e_netdev_priv *np = netdev_priv(netdev); 4003 struct i40e_vsi *vsi = np->vsi; 4004 struct i40e_pf *pf = vsi->back; 4005 int i; 4006 4007 /* if interface is down do nothing */ 4008 if (test_bit(__I40E_DOWN, &vsi->state)) 4009 return; 4010 4011 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4012 for (i = 0; i < vsi->num_q_vectors; i++) 4013 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 4014 } else { 4015 i40e_intr(pf->pdev->irq, netdev); 4016 } 4017 } 4018 #endif 4019 4020 /** 4021 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 4022 * @pf: the PF being configured 4023 * @pf_q: the PF queue 4024 * @enable: enable or disable state of the queue 4025 * 4026 * This routine will wait for the given Tx queue of the PF to reach the 4027 * enabled or disabled state. 4028 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4029 * multiple retries; else will return 0 in case of success. 4030 **/ 4031 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4032 { 4033 int i; 4034 u32 tx_reg; 4035 4036 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4037 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 4038 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4039 break; 4040 4041 usleep_range(10, 20); 4042 } 4043 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4044 return -ETIMEDOUT; 4045 4046 return 0; 4047 } 4048 4049 /** 4050 * i40e_vsi_control_tx - Start or stop a VSI's rings 4051 * @vsi: the VSI being configured 4052 * @enable: start or stop the rings 4053 **/ 4054 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 4055 { 4056 struct i40e_pf *pf = vsi->back; 4057 struct i40e_hw *hw = &pf->hw; 4058 int i, j, pf_q, ret = 0; 4059 u32 tx_reg; 4060 4061 pf_q = vsi->base_queue; 4062 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4063 4064 /* warn the TX unit of coming changes */ 4065 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 4066 if (!enable) 4067 usleep_range(10, 20); 4068 4069 for (j = 0; j < 50; j++) { 4070 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 4071 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 4072 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 4073 break; 4074 usleep_range(1000, 2000); 4075 } 4076 /* Skip if the queue is already in the requested state */ 4077 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4078 continue; 4079 4080 /* turn on/off the queue */ 4081 if (enable) { 4082 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 4083 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 4084 } else { 4085 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 4086 } 4087 4088 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 4089 /* No waiting for the Tx queue to disable */ 4090 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 4091 continue; 4092 4093 /* wait for the change to finish */ 4094 ret = i40e_pf_txq_wait(pf, pf_q, enable); 4095 if (ret) { 4096 dev_info(&pf->pdev->dev, 4097 "VSI seid %d Tx ring %d %sable timeout\n", 4098 vsi->seid, pf_q, (enable ? "en" : "dis")); 4099 break; 4100 } 4101 } 4102 4103 if (hw->revision_id == 0) 4104 mdelay(50); 4105 return ret; 4106 } 4107 4108 /** 4109 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 4110 * @pf: the PF being configured 4111 * @pf_q: the PF queue 4112 * @enable: enable or disable state of the queue 4113 * 4114 * This routine will wait for the given Rx queue of the PF to reach the 4115 * enabled or disabled state. 4116 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4117 * multiple retries; else will return 0 in case of success. 4118 **/ 4119 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4120 { 4121 int i; 4122 u32 rx_reg; 4123 4124 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4125 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 4126 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4127 break; 4128 4129 usleep_range(10, 20); 4130 } 4131 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4132 return -ETIMEDOUT; 4133 4134 return 0; 4135 } 4136 4137 /** 4138 * i40e_vsi_control_rx - Start or stop a VSI's rings 4139 * @vsi: the VSI being configured 4140 * @enable: start or stop the rings 4141 **/ 4142 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 4143 { 4144 struct i40e_pf *pf = vsi->back; 4145 struct i40e_hw *hw = &pf->hw; 4146 int i, j, pf_q, ret = 0; 4147 u32 rx_reg; 4148 4149 pf_q = vsi->base_queue; 4150 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4151 for (j = 0; j < 50; j++) { 4152 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 4153 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 4154 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 4155 break; 4156 usleep_range(1000, 2000); 4157 } 4158 4159 /* Skip if the queue is already in the requested state */ 4160 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4161 continue; 4162 4163 /* turn on/off the queue */ 4164 if (enable) 4165 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 4166 else 4167 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 4168 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 4169 /* No waiting for the Tx queue to disable */ 4170 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 4171 continue; 4172 4173 /* wait for the change to finish */ 4174 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 4175 if (ret) { 4176 dev_info(&pf->pdev->dev, 4177 "VSI seid %d Rx ring %d %sable timeout\n", 4178 vsi->seid, pf_q, (enable ? "en" : "dis")); 4179 break; 4180 } 4181 } 4182 4183 return ret; 4184 } 4185 4186 /** 4187 * i40e_vsi_start_rings - Start a VSI's rings 4188 * @vsi: the VSI being configured 4189 **/ 4190 int i40e_vsi_start_rings(struct i40e_vsi *vsi) 4191 { 4192 int ret = 0; 4193 4194 /* do rx first for enable and last for disable */ 4195 ret = i40e_vsi_control_rx(vsi, true); 4196 if (ret) 4197 return ret; 4198 ret = i40e_vsi_control_tx(vsi, true); 4199 4200 return ret; 4201 } 4202 4203 /** 4204 * i40e_vsi_stop_rings - Stop a VSI's rings 4205 * @vsi: the VSI being configured 4206 **/ 4207 void i40e_vsi_stop_rings(struct i40e_vsi *vsi) 4208 { 4209 /* do rx first for enable and last for disable 4210 * Ignore return value, we need to shutdown whatever we can 4211 */ 4212 i40e_vsi_control_tx(vsi, false); 4213 i40e_vsi_control_rx(vsi, false); 4214 } 4215 4216 /** 4217 * i40e_vsi_free_irq - Free the irq association with the OS 4218 * @vsi: the VSI being configured 4219 **/ 4220 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 4221 { 4222 struct i40e_pf *pf = vsi->back; 4223 struct i40e_hw *hw = &pf->hw; 4224 int base = vsi->base_vector; 4225 u32 val, qp; 4226 int i; 4227 4228 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4229 if (!vsi->q_vectors) 4230 return; 4231 4232 if (!vsi->irqs_ready) 4233 return; 4234 4235 vsi->irqs_ready = false; 4236 for (i = 0; i < vsi->num_q_vectors; i++) { 4237 int irq_num; 4238 u16 vector; 4239 4240 vector = i + base; 4241 irq_num = pf->msix_entries[vector].vector; 4242 4243 /* free only the irqs that were actually requested */ 4244 if (!vsi->q_vectors[i] || 4245 !vsi->q_vectors[i]->num_ringpairs) 4246 continue; 4247 4248 /* clear the affinity notifier in the IRQ descriptor */ 4249 irq_set_affinity_notifier(irq_num, NULL); 4250 /* clear the affinity_mask in the IRQ descriptor */ 4251 irq_set_affinity_hint(irq_num, NULL); 4252 synchronize_irq(irq_num); 4253 free_irq(irq_num, vsi->q_vectors[i]); 4254 4255 /* Tear down the interrupt queue link list 4256 * 4257 * We know that they come in pairs and always 4258 * the Rx first, then the Tx. To clear the 4259 * link list, stick the EOL value into the 4260 * next_q field of the registers. 4261 */ 4262 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 4263 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4264 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4265 val |= I40E_QUEUE_END_OF_LIST 4266 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4267 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 4268 4269 while (qp != I40E_QUEUE_END_OF_LIST) { 4270 u32 next; 4271 4272 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4273 4274 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4275 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4276 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4277 I40E_QINT_RQCTL_INTEVENT_MASK); 4278 4279 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4280 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4281 4282 wr32(hw, I40E_QINT_RQCTL(qp), val); 4283 4284 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4285 4286 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 4287 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 4288 4289 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4290 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4291 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4292 I40E_QINT_TQCTL_INTEVENT_MASK); 4293 4294 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4295 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4296 4297 wr32(hw, I40E_QINT_TQCTL(qp), val); 4298 qp = next; 4299 } 4300 } 4301 } else { 4302 free_irq(pf->pdev->irq, pf); 4303 4304 val = rd32(hw, I40E_PFINT_LNKLST0); 4305 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4306 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4307 val |= I40E_QUEUE_END_OF_LIST 4308 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 4309 wr32(hw, I40E_PFINT_LNKLST0, val); 4310 4311 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4312 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4313 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4314 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4315 I40E_QINT_RQCTL_INTEVENT_MASK); 4316 4317 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4318 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4319 4320 wr32(hw, I40E_QINT_RQCTL(qp), val); 4321 4322 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4323 4324 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4325 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4326 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4327 I40E_QINT_TQCTL_INTEVENT_MASK); 4328 4329 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4330 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4331 4332 wr32(hw, I40E_QINT_TQCTL(qp), val); 4333 } 4334 } 4335 4336 /** 4337 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 4338 * @vsi: the VSI being configured 4339 * @v_idx: Index of vector to be freed 4340 * 4341 * This function frees the memory allocated to the q_vector. In addition if 4342 * NAPI is enabled it will delete any references to the NAPI struct prior 4343 * to freeing the q_vector. 4344 **/ 4345 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 4346 { 4347 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4348 struct i40e_ring *ring; 4349 4350 if (!q_vector) 4351 return; 4352 4353 /* disassociate q_vector from rings */ 4354 i40e_for_each_ring(ring, q_vector->tx) 4355 ring->q_vector = NULL; 4356 4357 i40e_for_each_ring(ring, q_vector->rx) 4358 ring->q_vector = NULL; 4359 4360 /* only VSI w/ an associated netdev is set up w/ NAPI */ 4361 if (vsi->netdev) 4362 netif_napi_del(&q_vector->napi); 4363 4364 vsi->q_vectors[v_idx] = NULL; 4365 4366 kfree_rcu(q_vector, rcu); 4367 } 4368 4369 /** 4370 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 4371 * @vsi: the VSI being un-configured 4372 * 4373 * This frees the memory allocated to the q_vectors and 4374 * deletes references to the NAPI struct. 4375 **/ 4376 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 4377 { 4378 int v_idx; 4379 4380 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 4381 i40e_free_q_vector(vsi, v_idx); 4382 } 4383 4384 /** 4385 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 4386 * @pf: board private structure 4387 **/ 4388 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 4389 { 4390 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 4391 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4392 pci_disable_msix(pf->pdev); 4393 kfree(pf->msix_entries); 4394 pf->msix_entries = NULL; 4395 kfree(pf->irq_pile); 4396 pf->irq_pile = NULL; 4397 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 4398 pci_disable_msi(pf->pdev); 4399 } 4400 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 4401 } 4402 4403 /** 4404 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 4405 * @pf: board private structure 4406 * 4407 * We go through and clear interrupt specific resources and reset the structure 4408 * to pre-load conditions 4409 **/ 4410 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 4411 { 4412 int i; 4413 4414 i40e_stop_misc_vector(pf); 4415 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) { 4416 synchronize_irq(pf->msix_entries[0].vector); 4417 free_irq(pf->msix_entries[0].vector, pf); 4418 } 4419 4420 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, 4421 I40E_IWARP_IRQ_PILE_ID); 4422 4423 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 4424 for (i = 0; i < pf->num_alloc_vsi; i++) 4425 if (pf->vsi[i]) 4426 i40e_vsi_free_q_vectors(pf->vsi[i]); 4427 i40e_reset_interrupt_capability(pf); 4428 } 4429 4430 /** 4431 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 4432 * @vsi: the VSI being configured 4433 **/ 4434 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 4435 { 4436 int q_idx; 4437 4438 if (!vsi->netdev) 4439 return; 4440 4441 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 4442 napi_enable(&vsi->q_vectors[q_idx]->napi); 4443 } 4444 4445 /** 4446 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 4447 * @vsi: the VSI being configured 4448 **/ 4449 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 4450 { 4451 int q_idx; 4452 4453 if (!vsi->netdev) 4454 return; 4455 4456 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 4457 napi_disable(&vsi->q_vectors[q_idx]->napi); 4458 } 4459 4460 /** 4461 * i40e_vsi_close - Shut down a VSI 4462 * @vsi: the vsi to be quelled 4463 **/ 4464 static void i40e_vsi_close(struct i40e_vsi *vsi) 4465 { 4466 bool reset = false; 4467 4468 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 4469 i40e_down(vsi); 4470 i40e_vsi_free_irq(vsi); 4471 i40e_vsi_free_tx_resources(vsi); 4472 i40e_vsi_free_rx_resources(vsi); 4473 vsi->current_netdev_flags = 0; 4474 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 4475 reset = true; 4476 i40e_notify_client_of_netdev_close(vsi, reset); 4477 } 4478 4479 /** 4480 * i40e_quiesce_vsi - Pause a given VSI 4481 * @vsi: the VSI being paused 4482 **/ 4483 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 4484 { 4485 if (test_bit(__I40E_DOWN, &vsi->state)) 4486 return; 4487 4488 /* No need to disable FCoE VSI when Tx suspended */ 4489 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 4490 vsi->type == I40E_VSI_FCOE) { 4491 dev_dbg(&vsi->back->pdev->dev, 4492 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid); 4493 return; 4494 } 4495 4496 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 4497 if (vsi->netdev && netif_running(vsi->netdev)) 4498 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 4499 else 4500 i40e_vsi_close(vsi); 4501 } 4502 4503 /** 4504 * i40e_unquiesce_vsi - Resume a given VSI 4505 * @vsi: the VSI being resumed 4506 **/ 4507 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 4508 { 4509 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 4510 return; 4511 4512 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 4513 if (vsi->netdev && netif_running(vsi->netdev)) 4514 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 4515 else 4516 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 4517 } 4518 4519 /** 4520 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 4521 * @pf: the PF 4522 **/ 4523 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 4524 { 4525 int v; 4526 4527 for (v = 0; v < pf->num_alloc_vsi; v++) { 4528 if (pf->vsi[v]) 4529 i40e_quiesce_vsi(pf->vsi[v]); 4530 } 4531 } 4532 4533 /** 4534 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 4535 * @pf: the PF 4536 **/ 4537 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 4538 { 4539 int v; 4540 4541 for (v = 0; v < pf->num_alloc_vsi; v++) { 4542 if (pf->vsi[v]) 4543 i40e_unquiesce_vsi(pf->vsi[v]); 4544 } 4545 } 4546 4547 #ifdef CONFIG_I40E_DCB 4548 /** 4549 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled 4550 * @vsi: the VSI being configured 4551 * 4552 * This function waits for the given VSI's queues to be disabled. 4553 **/ 4554 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi) 4555 { 4556 struct i40e_pf *pf = vsi->back; 4557 int i, pf_q, ret; 4558 4559 pf_q = vsi->base_queue; 4560 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4561 /* Check and wait for the disable status of the queue */ 4562 ret = i40e_pf_txq_wait(pf, pf_q, false); 4563 if (ret) { 4564 dev_info(&pf->pdev->dev, 4565 "VSI seid %d Tx ring %d disable timeout\n", 4566 vsi->seid, pf_q); 4567 return ret; 4568 } 4569 } 4570 4571 pf_q = vsi->base_queue; 4572 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4573 /* Check and wait for the disable status of the queue */ 4574 ret = i40e_pf_rxq_wait(pf, pf_q, false); 4575 if (ret) { 4576 dev_info(&pf->pdev->dev, 4577 "VSI seid %d Rx ring %d disable timeout\n", 4578 vsi->seid, pf_q); 4579 return ret; 4580 } 4581 } 4582 4583 return 0; 4584 } 4585 4586 /** 4587 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled 4588 * @pf: the PF 4589 * 4590 * This function waits for the queues to be in disabled state for all the 4591 * VSIs that are managed by this PF. 4592 **/ 4593 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf) 4594 { 4595 int v, ret = 0; 4596 4597 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4598 /* No need to wait for FCoE VSI queues */ 4599 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 4600 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); 4601 if (ret) 4602 break; 4603 } 4604 } 4605 4606 return ret; 4607 } 4608 4609 #endif 4610 4611 /** 4612 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue 4613 * @q_idx: TX queue number 4614 * @vsi: Pointer to VSI struct 4615 * 4616 * This function checks specified queue for given VSI. Detects hung condition. 4617 * Sets hung bit since it is two step process. Before next run of service task 4618 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not, 4619 * hung condition remain unchanged and during subsequent run, this function 4620 * issues SW interrupt to recover from hung condition. 4621 **/ 4622 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi) 4623 { 4624 struct i40e_ring *tx_ring = NULL; 4625 struct i40e_pf *pf; 4626 u32 head, val, tx_pending_hw; 4627 int i; 4628 4629 pf = vsi->back; 4630 4631 /* now that we have an index, find the tx_ring struct */ 4632 for (i = 0; i < vsi->num_queue_pairs; i++) { 4633 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 4634 if (q_idx == vsi->tx_rings[i]->queue_index) { 4635 tx_ring = vsi->tx_rings[i]; 4636 break; 4637 } 4638 } 4639 } 4640 4641 if (!tx_ring) 4642 return; 4643 4644 /* Read interrupt register */ 4645 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4646 val = rd32(&pf->hw, 4647 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 4648 tx_ring->vsi->base_vector - 1)); 4649 else 4650 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 4651 4652 head = i40e_get_head(tx_ring); 4653 4654 tx_pending_hw = i40e_get_tx_pending(tx_ring, false); 4655 4656 /* HW is done executing descriptors, updated HEAD write back, 4657 * but SW hasn't processed those descriptors. If interrupt is 4658 * not generated from this point ON, it could result into 4659 * dev_watchdog detecting timeout on those netdev_queue, 4660 * hence proactively trigger SW interrupt. 4661 */ 4662 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) { 4663 /* NAPI Poll didn't run and clear since it was set */ 4664 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT, 4665 &tx_ring->q_vector->hung_detected)) { 4666 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n", 4667 vsi->seid, q_idx, tx_pending_hw, 4668 tx_ring->next_to_clean, head, 4669 tx_ring->next_to_use, 4670 readl(tx_ring->tail)); 4671 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n", 4672 vsi->seid, q_idx, val); 4673 i40e_force_wb(vsi, tx_ring->q_vector); 4674 } else { 4675 /* First Chance - detected possible hung */ 4676 set_bit(I40E_Q_VECTOR_HUNG_DETECT, 4677 &tx_ring->q_vector->hung_detected); 4678 } 4679 } 4680 4681 /* This is the case where we have interrupts missing, 4682 * so the tx_pending in HW will most likely be 0, but we 4683 * will have tx_pending in SW since the WB happened but the 4684 * interrupt got lost. 4685 */ 4686 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) && 4687 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) { 4688 local_bh_disable(); 4689 if (napi_reschedule(&tx_ring->q_vector->napi)) 4690 tx_ring->tx_stats.tx_lost_interrupt++; 4691 local_bh_enable(); 4692 } 4693 } 4694 4695 /** 4696 * i40e_detect_recover_hung - Function to detect and recover hung_queues 4697 * @pf: pointer to PF struct 4698 * 4699 * LAN VSI has netdev and netdev has TX queues. This function is to check 4700 * each of those TX queues if they are hung, trigger recovery by issuing 4701 * SW interrupt. 4702 **/ 4703 static void i40e_detect_recover_hung(struct i40e_pf *pf) 4704 { 4705 struct net_device *netdev; 4706 struct i40e_vsi *vsi; 4707 int i; 4708 4709 /* Only for LAN VSI */ 4710 vsi = pf->vsi[pf->lan_vsi]; 4711 4712 if (!vsi) 4713 return; 4714 4715 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */ 4716 if (test_bit(__I40E_DOWN, &vsi->back->state) || 4717 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 4718 return; 4719 4720 /* Make sure type is MAIN VSI */ 4721 if (vsi->type != I40E_VSI_MAIN) 4722 return; 4723 4724 netdev = vsi->netdev; 4725 if (!netdev) 4726 return; 4727 4728 /* Bail out if netif_carrier is not OK */ 4729 if (!netif_carrier_ok(netdev)) 4730 return; 4731 4732 /* Go thru' TX queues for netdev */ 4733 for (i = 0; i < netdev->num_tx_queues; i++) { 4734 struct netdev_queue *q; 4735 4736 q = netdev_get_tx_queue(netdev, i); 4737 if (q) 4738 i40e_detect_recover_hung_queue(i, vsi); 4739 } 4740 } 4741 4742 /** 4743 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4744 * @pf: pointer to PF 4745 * 4746 * Get TC map for ISCSI PF type that will include iSCSI TC 4747 * and LAN TC. 4748 **/ 4749 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4750 { 4751 struct i40e_dcb_app_priority_table app; 4752 struct i40e_hw *hw = &pf->hw; 4753 u8 enabled_tc = 1; /* TC0 is always enabled */ 4754 u8 tc, i; 4755 /* Get the iSCSI APP TLV */ 4756 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4757 4758 for (i = 0; i < dcbcfg->numapps; i++) { 4759 app = dcbcfg->app[i]; 4760 if (app.selector == I40E_APP_SEL_TCPIP && 4761 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4762 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4763 enabled_tc |= BIT(tc); 4764 break; 4765 } 4766 } 4767 4768 return enabled_tc; 4769 } 4770 4771 /** 4772 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4773 * @dcbcfg: the corresponding DCBx configuration structure 4774 * 4775 * Return the number of TCs from given DCBx configuration 4776 **/ 4777 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4778 { 4779 int i, tc_unused = 0; 4780 u8 num_tc = 0; 4781 u8 ret = 0; 4782 4783 /* Scan the ETS Config Priority Table to find 4784 * traffic class enabled for a given priority 4785 * and create a bitmask of enabled TCs 4786 */ 4787 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4788 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]); 4789 4790 /* Now scan the bitmask to check for 4791 * contiguous TCs starting with TC0 4792 */ 4793 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4794 if (num_tc & BIT(i)) { 4795 if (!tc_unused) { 4796 ret++; 4797 } else { 4798 pr_err("Non-contiguous TC - Disabling DCB\n"); 4799 return 1; 4800 } 4801 } else { 4802 tc_unused = 1; 4803 } 4804 } 4805 4806 /* There is always at least TC0 */ 4807 if (!ret) 4808 ret = 1; 4809 4810 return ret; 4811 } 4812 4813 /** 4814 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4815 * @dcbcfg: the corresponding DCBx configuration structure 4816 * 4817 * Query the current DCB configuration and return the number of 4818 * traffic classes enabled from the given DCBX config 4819 **/ 4820 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4821 { 4822 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4823 u8 enabled_tc = 1; 4824 u8 i; 4825 4826 for (i = 0; i < num_tc; i++) 4827 enabled_tc |= BIT(i); 4828 4829 return enabled_tc; 4830 } 4831 4832 /** 4833 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4834 * @pf: PF being queried 4835 * 4836 * Return number of traffic classes enabled for the given PF 4837 **/ 4838 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4839 { 4840 struct i40e_hw *hw = &pf->hw; 4841 u8 i, enabled_tc = 1; 4842 u8 num_tc = 0; 4843 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4844 4845 /* If DCB is not enabled then always in single TC */ 4846 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4847 return 1; 4848 4849 /* SFP mode will be enabled for all TCs on port */ 4850 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4851 return i40e_dcb_get_num_tc(dcbcfg); 4852 4853 /* MFP mode return count of enabled TCs for this PF */ 4854 if (pf->hw.func_caps.iscsi) 4855 enabled_tc = i40e_get_iscsi_tc_map(pf); 4856 else 4857 return 1; /* Only TC0 */ 4858 4859 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4860 if (enabled_tc & BIT(i)) 4861 num_tc++; 4862 } 4863 return num_tc; 4864 } 4865 4866 /** 4867 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4868 * @pf: PF being queried 4869 * 4870 * Return a bitmap for enabled traffic classes for this PF. 4871 **/ 4872 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4873 { 4874 /* If DCB is not enabled for this PF then just return default TC */ 4875 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4876 return I40E_DEFAULT_TRAFFIC_CLASS; 4877 4878 /* SFP mode we want PF to be enabled for all TCs */ 4879 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4880 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4881 4882 /* MFP enabled and iSCSI PF type */ 4883 if (pf->hw.func_caps.iscsi) 4884 return i40e_get_iscsi_tc_map(pf); 4885 else 4886 return I40E_DEFAULT_TRAFFIC_CLASS; 4887 } 4888 4889 /** 4890 * i40e_vsi_get_bw_info - Query VSI BW Information 4891 * @vsi: the VSI being queried 4892 * 4893 * Returns 0 on success, negative value on failure 4894 **/ 4895 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4896 { 4897 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4898 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4899 struct i40e_pf *pf = vsi->back; 4900 struct i40e_hw *hw = &pf->hw; 4901 i40e_status ret; 4902 u32 tc_bw_max; 4903 int i; 4904 4905 /* Get the VSI level BW configuration */ 4906 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4907 if (ret) { 4908 dev_info(&pf->pdev->dev, 4909 "couldn't get PF vsi bw config, err %s aq_err %s\n", 4910 i40e_stat_str(&pf->hw, ret), 4911 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4912 return -EINVAL; 4913 } 4914 4915 /* Get the VSI level BW configuration per TC */ 4916 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4917 NULL); 4918 if (ret) { 4919 dev_info(&pf->pdev->dev, 4920 "couldn't get PF vsi ets bw config, err %s aq_err %s\n", 4921 i40e_stat_str(&pf->hw, ret), 4922 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4923 return -EINVAL; 4924 } 4925 4926 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4927 dev_info(&pf->pdev->dev, 4928 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4929 bw_config.tc_valid_bits, 4930 bw_ets_config.tc_valid_bits); 4931 /* Still continuing */ 4932 } 4933 4934 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4935 vsi->bw_max_quanta = bw_config.max_bw; 4936 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4937 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4938 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4939 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4940 vsi->bw_ets_limit_credits[i] = 4941 le16_to_cpu(bw_ets_config.credits[i]); 4942 /* 3 bits out of 4 for each TC */ 4943 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4944 } 4945 4946 return 0; 4947 } 4948 4949 /** 4950 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4951 * @vsi: the VSI being configured 4952 * @enabled_tc: TC bitmap 4953 * @bw_credits: BW shared credits per TC 4954 * 4955 * Returns 0 on success, negative value on failure 4956 **/ 4957 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4958 u8 *bw_share) 4959 { 4960 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4961 i40e_status ret; 4962 int i; 4963 4964 bw_data.tc_valid_bits = enabled_tc; 4965 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4966 bw_data.tc_bw_credits[i] = bw_share[i]; 4967 4968 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4969 NULL); 4970 if (ret) { 4971 dev_info(&vsi->back->pdev->dev, 4972 "AQ command Config VSI BW allocation per TC failed = %d\n", 4973 vsi->back->hw.aq.asq_last_status); 4974 return -EINVAL; 4975 } 4976 4977 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4978 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4979 4980 return 0; 4981 } 4982 4983 /** 4984 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4985 * @vsi: the VSI being configured 4986 * @enabled_tc: TC map to be enabled 4987 * 4988 **/ 4989 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4990 { 4991 struct net_device *netdev = vsi->netdev; 4992 struct i40e_pf *pf = vsi->back; 4993 struct i40e_hw *hw = &pf->hw; 4994 u8 netdev_tc = 0; 4995 int i; 4996 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4997 4998 if (!netdev) 4999 return; 5000 5001 if (!enabled_tc) { 5002 netdev_reset_tc(netdev); 5003 return; 5004 } 5005 5006 /* Set up actual enabled TCs on the VSI */ 5007 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 5008 return; 5009 5010 /* set per TC queues for the VSI */ 5011 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5012 /* Only set TC queues for enabled tcs 5013 * 5014 * e.g. For a VSI that has TC0 and TC3 enabled the 5015 * enabled_tc bitmap would be 0x00001001; the driver 5016 * will set the numtc for netdev as 2 that will be 5017 * referenced by the netdev layer as TC 0 and 1. 5018 */ 5019 if (vsi->tc_config.enabled_tc & BIT(i)) 5020 netdev_set_tc_queue(netdev, 5021 vsi->tc_config.tc_info[i].netdev_tc, 5022 vsi->tc_config.tc_info[i].qcount, 5023 vsi->tc_config.tc_info[i].qoffset); 5024 } 5025 5026 /* Assign UP2TC map for the VSI */ 5027 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 5028 /* Get the actual TC# for the UP */ 5029 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 5030 /* Get the mapped netdev TC# for the UP */ 5031 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 5032 netdev_set_prio_tc_map(netdev, i, netdev_tc); 5033 } 5034 } 5035 5036 /** 5037 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 5038 * @vsi: the VSI being configured 5039 * @ctxt: the ctxt buffer returned from AQ VSI update param command 5040 **/ 5041 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 5042 struct i40e_vsi_context *ctxt) 5043 { 5044 /* copy just the sections touched not the entire info 5045 * since not all sections are valid as returned by 5046 * update vsi params 5047 */ 5048 vsi->info.mapping_flags = ctxt->info.mapping_flags; 5049 memcpy(&vsi->info.queue_mapping, 5050 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 5051 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 5052 sizeof(vsi->info.tc_mapping)); 5053 } 5054 5055 /** 5056 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 5057 * @vsi: VSI to be configured 5058 * @enabled_tc: TC bitmap 5059 * 5060 * This configures a particular VSI for TCs that are mapped to the 5061 * given TC bitmap. It uses default bandwidth share for TCs across 5062 * VSIs to configure TC for a particular VSI. 5063 * 5064 * NOTE: 5065 * It is expected that the VSI queues have been quisced before calling 5066 * this function. 5067 **/ 5068 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 5069 { 5070 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 5071 struct i40e_vsi_context ctxt; 5072 int ret = 0; 5073 int i; 5074 5075 /* Check if enabled_tc is same as existing or new TCs */ 5076 if (vsi->tc_config.enabled_tc == enabled_tc) 5077 return ret; 5078 5079 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 5080 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5081 if (enabled_tc & BIT(i)) 5082 bw_share[i] = 1; 5083 } 5084 5085 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 5086 if (ret) { 5087 dev_info(&vsi->back->pdev->dev, 5088 "Failed configuring TC map %d for VSI %d\n", 5089 enabled_tc, vsi->seid); 5090 goto out; 5091 } 5092 5093 /* Update Queue Pairs Mapping for currently enabled UPs */ 5094 ctxt.seid = vsi->seid; 5095 ctxt.pf_num = vsi->back->hw.pf_id; 5096 ctxt.vf_num = 0; 5097 ctxt.uplink_seid = vsi->uplink_seid; 5098 ctxt.info = vsi->info; 5099 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 5100 5101 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 5102 ctxt.info.valid_sections |= 5103 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 5104 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA; 5105 } 5106 5107 /* Update the VSI after updating the VSI queue-mapping information */ 5108 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 5109 if (ret) { 5110 dev_info(&vsi->back->pdev->dev, 5111 "Update vsi tc config failed, err %s aq_err %s\n", 5112 i40e_stat_str(&vsi->back->hw, ret), 5113 i40e_aq_str(&vsi->back->hw, 5114 vsi->back->hw.aq.asq_last_status)); 5115 goto out; 5116 } 5117 /* update the local VSI info with updated queue map */ 5118 i40e_vsi_update_queue_map(vsi, &ctxt); 5119 vsi->info.valid_sections = 0; 5120 5121 /* Update current VSI BW information */ 5122 ret = i40e_vsi_get_bw_info(vsi); 5123 if (ret) { 5124 dev_info(&vsi->back->pdev->dev, 5125 "Failed updating vsi bw info, err %s aq_err %s\n", 5126 i40e_stat_str(&vsi->back->hw, ret), 5127 i40e_aq_str(&vsi->back->hw, 5128 vsi->back->hw.aq.asq_last_status)); 5129 goto out; 5130 } 5131 5132 /* Update the netdev TC setup */ 5133 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 5134 out: 5135 return ret; 5136 } 5137 5138 /** 5139 * i40e_veb_config_tc - Configure TCs for given VEB 5140 * @veb: given VEB 5141 * @enabled_tc: TC bitmap 5142 * 5143 * Configures given TC bitmap for VEB (switching) element 5144 **/ 5145 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 5146 { 5147 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 5148 struct i40e_pf *pf = veb->pf; 5149 int ret = 0; 5150 int i; 5151 5152 /* No TCs or already enabled TCs just return */ 5153 if (!enabled_tc || veb->enabled_tc == enabled_tc) 5154 return ret; 5155 5156 bw_data.tc_valid_bits = enabled_tc; 5157 /* bw_data.absolute_credits is not set (relative) */ 5158 5159 /* Enable ETS TCs with equal BW Share for now */ 5160 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5161 if (enabled_tc & BIT(i)) 5162 bw_data.tc_bw_share_credits[i] = 1; 5163 } 5164 5165 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 5166 &bw_data, NULL); 5167 if (ret) { 5168 dev_info(&pf->pdev->dev, 5169 "VEB bw config failed, err %s aq_err %s\n", 5170 i40e_stat_str(&pf->hw, ret), 5171 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5172 goto out; 5173 } 5174 5175 /* Update the BW information */ 5176 ret = i40e_veb_get_bw_info(veb); 5177 if (ret) { 5178 dev_info(&pf->pdev->dev, 5179 "Failed getting veb bw config, err %s aq_err %s\n", 5180 i40e_stat_str(&pf->hw, ret), 5181 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5182 } 5183 5184 out: 5185 return ret; 5186 } 5187 5188 #ifdef CONFIG_I40E_DCB 5189 /** 5190 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 5191 * @pf: PF struct 5192 * 5193 * Reconfigure VEB/VSIs on a given PF; it is assumed that 5194 * the caller would've quiesce all the VSIs before calling 5195 * this function 5196 **/ 5197 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 5198 { 5199 u8 tc_map = 0; 5200 int ret; 5201 u8 v; 5202 5203 /* Enable the TCs available on PF to all VEBs */ 5204 tc_map = i40e_pf_get_tc_map(pf); 5205 for (v = 0; v < I40E_MAX_VEB; v++) { 5206 if (!pf->veb[v]) 5207 continue; 5208 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 5209 if (ret) { 5210 dev_info(&pf->pdev->dev, 5211 "Failed configuring TC for VEB seid=%d\n", 5212 pf->veb[v]->seid); 5213 /* Will try to configure as many components */ 5214 } 5215 } 5216 5217 /* Update each VSI */ 5218 for (v = 0; v < pf->num_alloc_vsi; v++) { 5219 if (!pf->vsi[v]) 5220 continue; 5221 5222 /* - Enable all TCs for the LAN VSI 5223 #ifdef I40E_FCOE 5224 * - For FCoE VSI only enable the TC configured 5225 * as per the APP TLV 5226 #endif 5227 * - For all others keep them at TC0 for now 5228 */ 5229 if (v == pf->lan_vsi) 5230 tc_map = i40e_pf_get_tc_map(pf); 5231 else 5232 tc_map = I40E_DEFAULT_TRAFFIC_CLASS; 5233 #ifdef I40E_FCOE 5234 if (pf->vsi[v]->type == I40E_VSI_FCOE) 5235 tc_map = i40e_get_fcoe_tc_map(pf); 5236 #endif /* #ifdef I40E_FCOE */ 5237 5238 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 5239 if (ret) { 5240 dev_info(&pf->pdev->dev, 5241 "Failed configuring TC for VSI seid=%d\n", 5242 pf->vsi[v]->seid); 5243 /* Will try to configure as many components */ 5244 } else { 5245 /* Re-configure VSI vectors based on updated TC map */ 5246 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 5247 if (pf->vsi[v]->netdev) 5248 i40e_dcbnl_set_all(pf->vsi[v]); 5249 } 5250 } 5251 } 5252 5253 /** 5254 * i40e_resume_port_tx - Resume port Tx 5255 * @pf: PF struct 5256 * 5257 * Resume a port's Tx and issue a PF reset in case of failure to 5258 * resume. 5259 **/ 5260 static int i40e_resume_port_tx(struct i40e_pf *pf) 5261 { 5262 struct i40e_hw *hw = &pf->hw; 5263 int ret; 5264 5265 ret = i40e_aq_resume_port_tx(hw, NULL); 5266 if (ret) { 5267 dev_info(&pf->pdev->dev, 5268 "Resume Port Tx failed, err %s aq_err %s\n", 5269 i40e_stat_str(&pf->hw, ret), 5270 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5271 /* Schedule PF reset to recover */ 5272 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5273 i40e_service_event_schedule(pf); 5274 } 5275 5276 return ret; 5277 } 5278 5279 /** 5280 * i40e_init_pf_dcb - Initialize DCB configuration 5281 * @pf: PF being configured 5282 * 5283 * Query the current DCB configuration and cache it 5284 * in the hardware structure 5285 **/ 5286 static int i40e_init_pf_dcb(struct i40e_pf *pf) 5287 { 5288 struct i40e_hw *hw = &pf->hw; 5289 int err = 0; 5290 5291 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 5292 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT) 5293 goto out; 5294 5295 /* Get the initial DCB configuration */ 5296 err = i40e_init_dcb(hw); 5297 if (!err) { 5298 /* Device/Function is not DCBX capable */ 5299 if ((!hw->func_caps.dcb) || 5300 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 5301 dev_info(&pf->pdev->dev, 5302 "DCBX offload is not supported or is disabled for this PF.\n"); 5303 5304 if (pf->flags & I40E_FLAG_MFP_ENABLED) 5305 goto out; 5306 5307 } else { 5308 /* When status is not DISABLED then DCBX in FW */ 5309 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 5310 DCB_CAP_DCBX_VER_IEEE; 5311 5312 pf->flags |= I40E_FLAG_DCB_CAPABLE; 5313 /* Enable DCB tagging only when more than one TC 5314 * or explicitly disable if only one TC 5315 */ 5316 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5317 pf->flags |= I40E_FLAG_DCB_ENABLED; 5318 else 5319 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5320 dev_dbg(&pf->pdev->dev, 5321 "DCBX offload is supported for this PF.\n"); 5322 } 5323 } else { 5324 dev_info(&pf->pdev->dev, 5325 "Query for DCB configuration failed, err %s aq_err %s\n", 5326 i40e_stat_str(&pf->hw, err), 5327 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5328 } 5329 5330 out: 5331 return err; 5332 } 5333 #endif /* CONFIG_I40E_DCB */ 5334 #define SPEED_SIZE 14 5335 #define FC_SIZE 8 5336 /** 5337 * i40e_print_link_message - print link up or down 5338 * @vsi: the VSI for which link needs a message 5339 */ 5340 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 5341 { 5342 enum i40e_aq_link_speed new_speed; 5343 char *speed = "Unknown"; 5344 char *fc = "Unknown"; 5345 char *fec = ""; 5346 char *an = ""; 5347 5348 new_speed = vsi->back->hw.phy.link_info.link_speed; 5349 5350 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed)) 5351 return; 5352 vsi->current_isup = isup; 5353 vsi->current_speed = new_speed; 5354 if (!isup) { 5355 netdev_info(vsi->netdev, "NIC Link is Down\n"); 5356 return; 5357 } 5358 5359 /* Warn user if link speed on NPAR enabled partition is not at 5360 * least 10GB 5361 */ 5362 if (vsi->back->hw.func_caps.npar_enable && 5363 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 5364 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 5365 netdev_warn(vsi->netdev, 5366 "The partition detected link speed that is less than 10Gbps\n"); 5367 5368 switch (vsi->back->hw.phy.link_info.link_speed) { 5369 case I40E_LINK_SPEED_40GB: 5370 speed = "40 G"; 5371 break; 5372 case I40E_LINK_SPEED_20GB: 5373 speed = "20 G"; 5374 break; 5375 case I40E_LINK_SPEED_25GB: 5376 speed = "25 G"; 5377 break; 5378 case I40E_LINK_SPEED_10GB: 5379 speed = "10 G"; 5380 break; 5381 case I40E_LINK_SPEED_1GB: 5382 speed = "1000 M"; 5383 break; 5384 case I40E_LINK_SPEED_100MB: 5385 speed = "100 M"; 5386 break; 5387 default: 5388 break; 5389 } 5390 5391 switch (vsi->back->hw.fc.current_mode) { 5392 case I40E_FC_FULL: 5393 fc = "RX/TX"; 5394 break; 5395 case I40E_FC_TX_PAUSE: 5396 fc = "TX"; 5397 break; 5398 case I40E_FC_RX_PAUSE: 5399 fc = "RX"; 5400 break; 5401 default: 5402 fc = "None"; 5403 break; 5404 } 5405 5406 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) { 5407 fec = ", FEC: None"; 5408 an = ", Autoneg: False"; 5409 5410 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED) 5411 an = ", Autoneg: True"; 5412 5413 if (vsi->back->hw.phy.link_info.fec_info & 5414 I40E_AQ_CONFIG_FEC_KR_ENA) 5415 fec = ", FEC: CL74 FC-FEC/BASE-R"; 5416 else if (vsi->back->hw.phy.link_info.fec_info & 5417 I40E_AQ_CONFIG_FEC_RS_ENA) 5418 fec = ", FEC: CL108 RS-FEC"; 5419 } 5420 5421 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n", 5422 speed, fec, an, fc); 5423 } 5424 5425 /** 5426 * i40e_up_complete - Finish the last steps of bringing up a connection 5427 * @vsi: the VSI being configured 5428 **/ 5429 static int i40e_up_complete(struct i40e_vsi *vsi) 5430 { 5431 struct i40e_pf *pf = vsi->back; 5432 int err; 5433 5434 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 5435 i40e_vsi_configure_msix(vsi); 5436 else 5437 i40e_configure_msi_and_legacy(vsi); 5438 5439 /* start rings */ 5440 err = i40e_vsi_start_rings(vsi); 5441 if (err) 5442 return err; 5443 5444 clear_bit(__I40E_DOWN, &vsi->state); 5445 i40e_napi_enable_all(vsi); 5446 i40e_vsi_enable_irq(vsi); 5447 5448 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 5449 (vsi->netdev)) { 5450 i40e_print_link_message(vsi, true); 5451 netif_tx_start_all_queues(vsi->netdev); 5452 netif_carrier_on(vsi->netdev); 5453 } else if (vsi->netdev) { 5454 i40e_print_link_message(vsi, false); 5455 /* need to check for qualified module here*/ 5456 if ((pf->hw.phy.link_info.link_info & 5457 I40E_AQ_MEDIA_AVAILABLE) && 5458 (!(pf->hw.phy.link_info.an_info & 5459 I40E_AQ_QUALIFIED_MODULE))) 5460 netdev_err(vsi->netdev, 5461 "the driver failed to link because an unqualified module was detected."); 5462 } 5463 5464 /* replay FDIR SB filters */ 5465 if (vsi->type == I40E_VSI_FDIR) { 5466 /* reset fd counters */ 5467 pf->fd_add_err = pf->fd_atr_cnt = 0; 5468 if (pf->fd_tcp_rule > 0) { 5469 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED; 5470 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5471 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 5472 pf->fd_tcp_rule = 0; 5473 } 5474 i40e_fdir_filter_restore(vsi); 5475 } 5476 5477 /* On the next run of the service_task, notify any clients of the new 5478 * opened netdev 5479 */ 5480 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; 5481 i40e_service_event_schedule(pf); 5482 5483 return 0; 5484 } 5485 5486 /** 5487 * i40e_vsi_reinit_locked - Reset the VSI 5488 * @vsi: the VSI being configured 5489 * 5490 * Rebuild the ring structs after some configuration 5491 * has changed, e.g. MTU size. 5492 **/ 5493 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 5494 { 5495 struct i40e_pf *pf = vsi->back; 5496 5497 WARN_ON(in_interrupt()); 5498 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 5499 usleep_range(1000, 2000); 5500 i40e_down(vsi); 5501 5502 i40e_up(vsi); 5503 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 5504 } 5505 5506 /** 5507 * i40e_up - Bring the connection back up after being down 5508 * @vsi: the VSI being configured 5509 **/ 5510 int i40e_up(struct i40e_vsi *vsi) 5511 { 5512 int err; 5513 5514 err = i40e_vsi_configure(vsi); 5515 if (!err) 5516 err = i40e_up_complete(vsi); 5517 5518 return err; 5519 } 5520 5521 /** 5522 * i40e_down - Shutdown the connection processing 5523 * @vsi: the VSI being stopped 5524 **/ 5525 void i40e_down(struct i40e_vsi *vsi) 5526 { 5527 int i; 5528 5529 /* It is assumed that the caller of this function 5530 * sets the vsi->state __I40E_DOWN bit. 5531 */ 5532 if (vsi->netdev) { 5533 netif_carrier_off(vsi->netdev); 5534 netif_tx_disable(vsi->netdev); 5535 } 5536 i40e_vsi_disable_irq(vsi); 5537 i40e_vsi_stop_rings(vsi); 5538 i40e_napi_disable_all(vsi); 5539 5540 for (i = 0; i < vsi->num_queue_pairs; i++) { 5541 i40e_clean_tx_ring(vsi->tx_rings[i]); 5542 i40e_clean_rx_ring(vsi->rx_rings[i]); 5543 } 5544 5545 i40e_notify_client_of_netdev_close(vsi, false); 5546 5547 } 5548 5549 /** 5550 * i40e_setup_tc - configure multiple traffic classes 5551 * @netdev: net device to configure 5552 * @tc: number of traffic classes to enable 5553 **/ 5554 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 5555 { 5556 struct i40e_netdev_priv *np = netdev_priv(netdev); 5557 struct i40e_vsi *vsi = np->vsi; 5558 struct i40e_pf *pf = vsi->back; 5559 u8 enabled_tc = 0; 5560 int ret = -EINVAL; 5561 int i; 5562 5563 /* Check if DCB enabled to continue */ 5564 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 5565 netdev_info(netdev, "DCB is not enabled for adapter\n"); 5566 goto exit; 5567 } 5568 5569 /* Check if MFP enabled */ 5570 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 5571 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 5572 goto exit; 5573 } 5574 5575 /* Check whether tc count is within enabled limit */ 5576 if (tc > i40e_pf_get_num_tc(pf)) { 5577 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 5578 goto exit; 5579 } 5580 5581 /* Generate TC map for number of tc requested */ 5582 for (i = 0; i < tc; i++) 5583 enabled_tc |= BIT(i); 5584 5585 /* Requesting same TC configuration as already enabled */ 5586 if (enabled_tc == vsi->tc_config.enabled_tc) 5587 return 0; 5588 5589 /* Quiesce VSI queues */ 5590 i40e_quiesce_vsi(vsi); 5591 5592 /* Configure VSI for enabled TCs */ 5593 ret = i40e_vsi_config_tc(vsi, enabled_tc); 5594 if (ret) { 5595 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 5596 vsi->seid); 5597 goto exit; 5598 } 5599 5600 /* Unquiesce VSI */ 5601 i40e_unquiesce_vsi(vsi); 5602 5603 exit: 5604 return ret; 5605 } 5606 5607 #ifdef I40E_FCOE 5608 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto, 5609 struct tc_to_netdev *tc) 5610 #else 5611 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto, 5612 struct tc_to_netdev *tc) 5613 #endif 5614 { 5615 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO) 5616 return -EINVAL; 5617 return i40e_setup_tc(netdev, tc->tc); 5618 } 5619 5620 /** 5621 * i40e_open - Called when a network interface is made active 5622 * @netdev: network interface device structure 5623 * 5624 * The open entry point is called when a network interface is made 5625 * active by the system (IFF_UP). At this point all resources needed 5626 * for transmit and receive operations are allocated, the interrupt 5627 * handler is registered with the OS, the netdev watchdog subtask is 5628 * enabled, and the stack is notified that the interface is ready. 5629 * 5630 * Returns 0 on success, negative value on failure 5631 **/ 5632 int i40e_open(struct net_device *netdev) 5633 { 5634 struct i40e_netdev_priv *np = netdev_priv(netdev); 5635 struct i40e_vsi *vsi = np->vsi; 5636 struct i40e_pf *pf = vsi->back; 5637 int err; 5638 5639 /* disallow open during test or if eeprom is broken */ 5640 if (test_bit(__I40E_TESTING, &pf->state) || 5641 test_bit(__I40E_BAD_EEPROM, &pf->state)) 5642 return -EBUSY; 5643 5644 netif_carrier_off(netdev); 5645 5646 err = i40e_vsi_open(vsi); 5647 if (err) 5648 return err; 5649 5650 /* configure global TSO hardware offload settings */ 5651 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 5652 TCP_FLAG_FIN) >> 16); 5653 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 5654 TCP_FLAG_FIN | 5655 TCP_FLAG_CWR) >> 16); 5656 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 5657 5658 udp_tunnel_get_rx_info(netdev); 5659 5660 return 0; 5661 } 5662 5663 /** 5664 * i40e_vsi_open - 5665 * @vsi: the VSI to open 5666 * 5667 * Finish initialization of the VSI. 5668 * 5669 * Returns 0 on success, negative value on failure 5670 **/ 5671 int i40e_vsi_open(struct i40e_vsi *vsi) 5672 { 5673 struct i40e_pf *pf = vsi->back; 5674 char int_name[I40E_INT_NAME_STR_LEN]; 5675 int err; 5676 5677 /* allocate descriptors */ 5678 err = i40e_vsi_setup_tx_resources(vsi); 5679 if (err) 5680 goto err_setup_tx; 5681 err = i40e_vsi_setup_rx_resources(vsi); 5682 if (err) 5683 goto err_setup_rx; 5684 5685 err = i40e_vsi_configure(vsi); 5686 if (err) 5687 goto err_setup_rx; 5688 5689 if (vsi->netdev) { 5690 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 5691 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 5692 err = i40e_vsi_request_irq(vsi, int_name); 5693 if (err) 5694 goto err_setup_rx; 5695 5696 /* Notify the stack of the actual queue counts. */ 5697 err = netif_set_real_num_tx_queues(vsi->netdev, 5698 vsi->num_queue_pairs); 5699 if (err) 5700 goto err_set_queues; 5701 5702 err = netif_set_real_num_rx_queues(vsi->netdev, 5703 vsi->num_queue_pairs); 5704 if (err) 5705 goto err_set_queues; 5706 5707 } else if (vsi->type == I40E_VSI_FDIR) { 5708 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 5709 dev_driver_string(&pf->pdev->dev), 5710 dev_name(&pf->pdev->dev)); 5711 err = i40e_vsi_request_irq(vsi, int_name); 5712 5713 } else { 5714 err = -EINVAL; 5715 goto err_setup_rx; 5716 } 5717 5718 err = i40e_up_complete(vsi); 5719 if (err) 5720 goto err_up_complete; 5721 5722 return 0; 5723 5724 err_up_complete: 5725 i40e_down(vsi); 5726 err_set_queues: 5727 i40e_vsi_free_irq(vsi); 5728 err_setup_rx: 5729 i40e_vsi_free_rx_resources(vsi); 5730 err_setup_tx: 5731 i40e_vsi_free_tx_resources(vsi); 5732 if (vsi == pf->vsi[pf->lan_vsi]) 5733 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 5734 5735 return err; 5736 } 5737 5738 /** 5739 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 5740 * @pf: Pointer to PF 5741 * 5742 * This function destroys the hlist where all the Flow Director 5743 * filters were saved. 5744 **/ 5745 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 5746 { 5747 struct i40e_fdir_filter *filter; 5748 struct hlist_node *node2; 5749 5750 hlist_for_each_entry_safe(filter, node2, 5751 &pf->fdir_filter_list, fdir_node) { 5752 hlist_del(&filter->fdir_node); 5753 kfree(filter); 5754 } 5755 pf->fdir_pf_active_filters = 0; 5756 } 5757 5758 /** 5759 * i40e_close - Disables a network interface 5760 * @netdev: network interface device structure 5761 * 5762 * The close entry point is called when an interface is de-activated 5763 * by the OS. The hardware is still under the driver's control, but 5764 * this netdev interface is disabled. 5765 * 5766 * Returns 0, this is not allowed to fail 5767 **/ 5768 int i40e_close(struct net_device *netdev) 5769 { 5770 struct i40e_netdev_priv *np = netdev_priv(netdev); 5771 struct i40e_vsi *vsi = np->vsi; 5772 5773 i40e_vsi_close(vsi); 5774 5775 return 0; 5776 } 5777 5778 /** 5779 * i40e_do_reset - Start a PF or Core Reset sequence 5780 * @pf: board private structure 5781 * @reset_flags: which reset is requested 5782 * 5783 * The essential difference in resets is that the PF Reset 5784 * doesn't clear the packet buffers, doesn't reset the PE 5785 * firmware, and doesn't bother the other PFs on the chip. 5786 **/ 5787 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 5788 { 5789 u32 val; 5790 5791 WARN_ON(in_interrupt()); 5792 5793 5794 /* do the biggest reset indicated */ 5795 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { 5796 5797 /* Request a Global Reset 5798 * 5799 * This will start the chip's countdown to the actual full 5800 * chip reset event, and a warning interrupt to be sent 5801 * to all PFs, including the requestor. Our handler 5802 * for the warning interrupt will deal with the shutdown 5803 * and recovery of the switch setup. 5804 */ 5805 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 5806 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5807 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 5808 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5809 5810 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { 5811 5812 /* Request a Core Reset 5813 * 5814 * Same as Global Reset, except does *not* include the MAC/PHY 5815 */ 5816 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 5817 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5818 val |= I40E_GLGEN_RTRIG_CORER_MASK; 5819 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5820 i40e_flush(&pf->hw); 5821 5822 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) { 5823 5824 /* Request a PF Reset 5825 * 5826 * Resets only the PF-specific registers 5827 * 5828 * This goes directly to the tear-down and rebuild of 5829 * the switch, since we need to do all the recovery as 5830 * for the Core Reset. 5831 */ 5832 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5833 i40e_handle_reset_warning(pf); 5834 5835 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { 5836 int v; 5837 5838 /* Find the VSI(s) that requested a re-init */ 5839 dev_info(&pf->pdev->dev, 5840 "VSI reinit requested\n"); 5841 for (v = 0; v < pf->num_alloc_vsi; v++) { 5842 struct i40e_vsi *vsi = pf->vsi[v]; 5843 5844 if (vsi != NULL && 5845 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5846 i40e_vsi_reinit_locked(pf->vsi[v]); 5847 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5848 } 5849 } 5850 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { 5851 int v; 5852 5853 /* Find the VSI(s) that needs to be brought down */ 5854 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5855 for (v = 0; v < pf->num_alloc_vsi; v++) { 5856 struct i40e_vsi *vsi = pf->vsi[v]; 5857 5858 if (vsi != NULL && 5859 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5860 set_bit(__I40E_DOWN, &vsi->state); 5861 i40e_down(vsi); 5862 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5863 } 5864 } 5865 } else { 5866 dev_info(&pf->pdev->dev, 5867 "bad reset request 0x%08x\n", reset_flags); 5868 } 5869 } 5870 5871 #ifdef CONFIG_I40E_DCB 5872 /** 5873 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5874 * @pf: board private structure 5875 * @old_cfg: current DCB config 5876 * @new_cfg: new DCB config 5877 **/ 5878 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5879 struct i40e_dcbx_config *old_cfg, 5880 struct i40e_dcbx_config *new_cfg) 5881 { 5882 bool need_reconfig = false; 5883 5884 /* Check if ETS configuration has changed */ 5885 if (memcmp(&new_cfg->etscfg, 5886 &old_cfg->etscfg, 5887 sizeof(new_cfg->etscfg))) { 5888 /* If Priority Table has changed reconfig is needed */ 5889 if (memcmp(&new_cfg->etscfg.prioritytable, 5890 &old_cfg->etscfg.prioritytable, 5891 sizeof(new_cfg->etscfg.prioritytable))) { 5892 need_reconfig = true; 5893 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5894 } 5895 5896 if (memcmp(&new_cfg->etscfg.tcbwtable, 5897 &old_cfg->etscfg.tcbwtable, 5898 sizeof(new_cfg->etscfg.tcbwtable))) 5899 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5900 5901 if (memcmp(&new_cfg->etscfg.tsatable, 5902 &old_cfg->etscfg.tsatable, 5903 sizeof(new_cfg->etscfg.tsatable))) 5904 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5905 } 5906 5907 /* Check if PFC configuration has changed */ 5908 if (memcmp(&new_cfg->pfc, 5909 &old_cfg->pfc, 5910 sizeof(new_cfg->pfc))) { 5911 need_reconfig = true; 5912 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5913 } 5914 5915 /* Check if APP Table has changed */ 5916 if (memcmp(&new_cfg->app, 5917 &old_cfg->app, 5918 sizeof(new_cfg->app))) { 5919 need_reconfig = true; 5920 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5921 } 5922 5923 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig); 5924 return need_reconfig; 5925 } 5926 5927 /** 5928 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5929 * @pf: board private structure 5930 * @e: event info posted on ARQ 5931 **/ 5932 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5933 struct i40e_arq_event_info *e) 5934 { 5935 struct i40e_aqc_lldp_get_mib *mib = 5936 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5937 struct i40e_hw *hw = &pf->hw; 5938 struct i40e_dcbx_config tmp_dcbx_cfg; 5939 bool need_reconfig = false; 5940 int ret = 0; 5941 u8 type; 5942 5943 /* Not DCB capable or capability disabled */ 5944 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5945 return ret; 5946 5947 /* Ignore if event is not for Nearest Bridge */ 5948 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5949 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5950 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type); 5951 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5952 return ret; 5953 5954 /* Check MIB Type and return if event for Remote MIB update */ 5955 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5956 dev_dbg(&pf->pdev->dev, 5957 "LLDP event mib type %s\n", type ? "remote" : "local"); 5958 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5959 /* Update the remote cached instance and return */ 5960 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5961 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5962 &hw->remote_dcbx_config); 5963 goto exit; 5964 } 5965 5966 /* Store the old configuration */ 5967 tmp_dcbx_cfg = hw->local_dcbx_config; 5968 5969 /* Reset the old DCBx configuration data */ 5970 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 5971 /* Get updated DCBX data from firmware */ 5972 ret = i40e_get_dcb_config(&pf->hw); 5973 if (ret) { 5974 dev_info(&pf->pdev->dev, 5975 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", 5976 i40e_stat_str(&pf->hw, ret), 5977 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5978 goto exit; 5979 } 5980 5981 /* No change detected in DCBX configs */ 5982 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 5983 sizeof(tmp_dcbx_cfg))) { 5984 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5985 goto exit; 5986 } 5987 5988 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 5989 &hw->local_dcbx_config); 5990 5991 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 5992 5993 if (!need_reconfig) 5994 goto exit; 5995 5996 /* Enable DCB tagging only when more than one TC */ 5997 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5998 pf->flags |= I40E_FLAG_DCB_ENABLED; 5999 else 6000 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6001 6002 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 6003 /* Reconfiguration needed quiesce all VSIs */ 6004 i40e_pf_quiesce_all_vsi(pf); 6005 6006 /* Changes in configuration update VEB/VSI */ 6007 i40e_dcb_reconfigure(pf); 6008 6009 ret = i40e_resume_port_tx(pf); 6010 6011 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 6012 /* In case of error no point in resuming VSIs */ 6013 if (ret) 6014 goto exit; 6015 6016 /* Wait for the PF's queues to be disabled */ 6017 ret = i40e_pf_wait_queues_disabled(pf); 6018 if (ret) { 6019 /* Schedule PF reset to recover */ 6020 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6021 i40e_service_event_schedule(pf); 6022 } else { 6023 i40e_pf_unquiesce_all_vsi(pf); 6024 /* Notify the client for the DCB changes */ 6025 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]); 6026 } 6027 6028 exit: 6029 return ret; 6030 } 6031 #endif /* CONFIG_I40E_DCB */ 6032 6033 /** 6034 * i40e_do_reset_safe - Protected reset path for userland calls. 6035 * @pf: board private structure 6036 * @reset_flags: which reset is requested 6037 * 6038 **/ 6039 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 6040 { 6041 rtnl_lock(); 6042 i40e_do_reset(pf, reset_flags); 6043 rtnl_unlock(); 6044 } 6045 6046 /** 6047 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 6048 * @pf: board private structure 6049 * @e: event info posted on ARQ 6050 * 6051 * Handler for LAN Queue Overflow Event generated by the firmware for PF 6052 * and VF queues 6053 **/ 6054 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 6055 struct i40e_arq_event_info *e) 6056 { 6057 struct i40e_aqc_lan_overflow *data = 6058 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 6059 u32 queue = le32_to_cpu(data->prtdcb_rupto); 6060 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 6061 struct i40e_hw *hw = &pf->hw; 6062 struct i40e_vf *vf; 6063 u16 vf_id; 6064 6065 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 6066 queue, qtx_ctl); 6067 6068 /* Queue belongs to VF, find the VF and issue VF reset */ 6069 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 6070 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 6071 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 6072 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 6073 vf_id -= hw->func_caps.vf_base_id; 6074 vf = &pf->vf[vf_id]; 6075 i40e_vc_notify_vf_reset(vf); 6076 /* Allow VF to process pending reset notification */ 6077 msleep(20); 6078 i40e_reset_vf(vf, false); 6079 } 6080 } 6081 6082 /** 6083 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 6084 * @pf: board private structure 6085 **/ 6086 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 6087 { 6088 u32 val, fcnt_prog; 6089 6090 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 6091 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 6092 return fcnt_prog; 6093 } 6094 6095 /** 6096 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 6097 * @pf: board private structure 6098 **/ 6099 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 6100 { 6101 u32 val, fcnt_prog; 6102 6103 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 6104 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 6105 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 6106 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 6107 return fcnt_prog; 6108 } 6109 6110 /** 6111 * i40e_get_global_fd_count - Get total FD filters programmed on device 6112 * @pf: board private structure 6113 **/ 6114 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 6115 { 6116 u32 val, fcnt_prog; 6117 6118 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 6119 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 6120 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 6121 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 6122 return fcnt_prog; 6123 } 6124 6125 /** 6126 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 6127 * @pf: board private structure 6128 **/ 6129 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 6130 { 6131 struct i40e_fdir_filter *filter; 6132 u32 fcnt_prog, fcnt_avail; 6133 struct hlist_node *node; 6134 6135 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 6136 return; 6137 6138 /* Check if, FD SB or ATR was auto disabled and if there is enough room 6139 * to re-enable 6140 */ 6141 fcnt_prog = i40e_get_global_fd_count(pf); 6142 fcnt_avail = pf->fdir_pf_filter_count; 6143 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 6144 (pf->fd_add_err == 0) || 6145 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 6146 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 6147 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 6148 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 6149 if (I40E_DEBUG_FD & pf->hw.debug_mask) 6150 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 6151 } 6152 } 6153 6154 /* Wait for some more space to be available to turn on ATR. We also 6155 * must check that no existing ntuple rules for TCP are in effect 6156 */ 6157 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 6158 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 6159 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) && 6160 (pf->fd_tcp_rule == 0)) { 6161 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 6162 if (I40E_DEBUG_FD & pf->hw.debug_mask) 6163 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n"); 6164 } 6165 } 6166 6167 /* if hw had a problem adding a filter, delete it */ 6168 if (pf->fd_inv > 0) { 6169 hlist_for_each_entry_safe(filter, node, 6170 &pf->fdir_filter_list, fdir_node) { 6171 if (filter->fd_id == pf->fd_inv) { 6172 hlist_del(&filter->fdir_node); 6173 kfree(filter); 6174 pf->fdir_pf_active_filters--; 6175 } 6176 } 6177 } 6178 } 6179 6180 #define I40E_MIN_FD_FLUSH_INTERVAL 10 6181 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 6182 /** 6183 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 6184 * @pf: board private structure 6185 **/ 6186 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 6187 { 6188 unsigned long min_flush_time; 6189 int flush_wait_retry = 50; 6190 bool disable_atr = false; 6191 int fd_room; 6192 int reg; 6193 6194 if (!time_after(jiffies, pf->fd_flush_timestamp + 6195 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) 6196 return; 6197 6198 /* If the flush is happening too quick and we have mostly SB rules we 6199 * should not re-enable ATR for some time. 6200 */ 6201 min_flush_time = pf->fd_flush_timestamp + 6202 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 6203 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 6204 6205 if (!(time_after(jiffies, min_flush_time)) && 6206 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 6207 if (I40E_DEBUG_FD & pf->hw.debug_mask) 6208 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 6209 disable_atr = true; 6210 } 6211 6212 pf->fd_flush_timestamp = jiffies; 6213 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED; 6214 /* flush all filters */ 6215 wr32(&pf->hw, I40E_PFQF_CTL_1, 6216 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 6217 i40e_flush(&pf->hw); 6218 pf->fd_flush_cnt++; 6219 pf->fd_add_err = 0; 6220 do { 6221 /* Check FD flush status every 5-6msec */ 6222 usleep_range(5000, 6000); 6223 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 6224 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 6225 break; 6226 } while (flush_wait_retry--); 6227 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 6228 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 6229 } else { 6230 /* replay sideband filters */ 6231 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 6232 if (!disable_atr) 6233 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 6234 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 6235 if (I40E_DEBUG_FD & pf->hw.debug_mask) 6236 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 6237 } 6238 } 6239 6240 /** 6241 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 6242 * @pf: board private structure 6243 **/ 6244 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 6245 { 6246 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 6247 } 6248 6249 /* We can see up to 256 filter programming desc in transit if the filters are 6250 * being applied really fast; before we see the first 6251 * filter miss error on Rx queue 0. Accumulating enough error messages before 6252 * reacting will make sure we don't cause flush too often. 6253 */ 6254 #define I40E_MAX_FD_PROGRAM_ERROR 256 6255 6256 /** 6257 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 6258 * @pf: board private structure 6259 **/ 6260 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 6261 { 6262 6263 /* if interface is down do nothing */ 6264 if (test_bit(__I40E_DOWN, &pf->state)) 6265 return; 6266 6267 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 6268 i40e_fdir_flush_and_replay(pf); 6269 6270 i40e_fdir_check_and_reenable(pf); 6271 6272 } 6273 6274 /** 6275 * i40e_vsi_link_event - notify VSI of a link event 6276 * @vsi: vsi to be notified 6277 * @link_up: link up or down 6278 **/ 6279 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 6280 { 6281 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 6282 return; 6283 6284 switch (vsi->type) { 6285 case I40E_VSI_MAIN: 6286 #ifdef I40E_FCOE 6287 case I40E_VSI_FCOE: 6288 #endif 6289 if (!vsi->netdev || !vsi->netdev_registered) 6290 break; 6291 6292 if (link_up) { 6293 netif_carrier_on(vsi->netdev); 6294 netif_tx_wake_all_queues(vsi->netdev); 6295 } else { 6296 netif_carrier_off(vsi->netdev); 6297 netif_tx_stop_all_queues(vsi->netdev); 6298 } 6299 break; 6300 6301 case I40E_VSI_SRIOV: 6302 case I40E_VSI_VMDQ2: 6303 case I40E_VSI_CTRL: 6304 case I40E_VSI_IWARP: 6305 case I40E_VSI_MIRROR: 6306 default: 6307 /* there is no notification for other VSIs */ 6308 break; 6309 } 6310 } 6311 6312 /** 6313 * i40e_veb_link_event - notify elements on the veb of a link event 6314 * @veb: veb to be notified 6315 * @link_up: link up or down 6316 **/ 6317 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 6318 { 6319 struct i40e_pf *pf; 6320 int i; 6321 6322 if (!veb || !veb->pf) 6323 return; 6324 pf = veb->pf; 6325 6326 /* depth first... */ 6327 for (i = 0; i < I40E_MAX_VEB; i++) 6328 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 6329 i40e_veb_link_event(pf->veb[i], link_up); 6330 6331 /* ... now the local VSIs */ 6332 for (i = 0; i < pf->num_alloc_vsi; i++) 6333 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 6334 i40e_vsi_link_event(pf->vsi[i], link_up); 6335 } 6336 6337 /** 6338 * i40e_link_event - Update netif_carrier status 6339 * @pf: board private structure 6340 **/ 6341 static void i40e_link_event(struct i40e_pf *pf) 6342 { 6343 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6344 u8 new_link_speed, old_link_speed; 6345 i40e_status status; 6346 bool new_link, old_link; 6347 6348 /* save off old link status information */ 6349 pf->hw.phy.link_info_old = pf->hw.phy.link_info; 6350 6351 /* set this to force the get_link_status call to refresh state */ 6352 pf->hw.phy.get_link_info = true; 6353 6354 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 6355 6356 status = i40e_get_link_status(&pf->hw, &new_link); 6357 6358 /* On success, disable temp link polling */ 6359 if (status == I40E_SUCCESS) { 6360 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING) 6361 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING; 6362 } else { 6363 /* Enable link polling temporarily until i40e_get_link_status 6364 * returns I40E_SUCCESS 6365 */ 6366 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING; 6367 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n", 6368 status); 6369 return; 6370 } 6371 6372 old_link_speed = pf->hw.phy.link_info_old.link_speed; 6373 new_link_speed = pf->hw.phy.link_info.link_speed; 6374 6375 if (new_link == old_link && 6376 new_link_speed == old_link_speed && 6377 (test_bit(__I40E_DOWN, &vsi->state) || 6378 new_link == netif_carrier_ok(vsi->netdev))) 6379 return; 6380 6381 if (!test_bit(__I40E_DOWN, &vsi->state)) 6382 i40e_print_link_message(vsi, new_link); 6383 6384 /* Notify the base of the switch tree connected to 6385 * the link. Floating VEBs are not notified. 6386 */ 6387 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 6388 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 6389 else 6390 i40e_vsi_link_event(vsi, new_link); 6391 6392 if (pf->vf) 6393 i40e_vc_notify_link_state(pf); 6394 6395 if (pf->flags & I40E_FLAG_PTP) 6396 i40e_ptp_set_increment(pf); 6397 } 6398 6399 /** 6400 * i40e_watchdog_subtask - periodic checks not using event driven response 6401 * @pf: board private structure 6402 **/ 6403 static void i40e_watchdog_subtask(struct i40e_pf *pf) 6404 { 6405 int i; 6406 6407 /* if interface is down do nothing */ 6408 if (test_bit(__I40E_DOWN, &pf->state) || 6409 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 6410 return; 6411 6412 /* make sure we don't do these things too often */ 6413 if (time_before(jiffies, (pf->service_timer_previous + 6414 pf->service_timer_period))) 6415 return; 6416 pf->service_timer_previous = jiffies; 6417 6418 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) || 6419 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)) 6420 i40e_link_event(pf); 6421 6422 /* Update the stats for active netdevs so the network stack 6423 * can look at updated numbers whenever it cares to 6424 */ 6425 for (i = 0; i < pf->num_alloc_vsi; i++) 6426 if (pf->vsi[i] && pf->vsi[i]->netdev) 6427 i40e_update_stats(pf->vsi[i]); 6428 6429 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) { 6430 /* Update the stats for the active switching components */ 6431 for (i = 0; i < I40E_MAX_VEB; i++) 6432 if (pf->veb[i]) 6433 i40e_update_veb_stats(pf->veb[i]); 6434 } 6435 6436 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 6437 } 6438 6439 /** 6440 * i40e_reset_subtask - Set up for resetting the device and driver 6441 * @pf: board private structure 6442 **/ 6443 static void i40e_reset_subtask(struct i40e_pf *pf) 6444 { 6445 u32 reset_flags = 0; 6446 6447 rtnl_lock(); 6448 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 6449 reset_flags |= BIT(__I40E_REINIT_REQUESTED); 6450 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 6451 } 6452 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 6453 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED); 6454 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6455 } 6456 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 6457 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED); 6458 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 6459 } 6460 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 6461 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); 6462 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 6463 } 6464 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 6465 reset_flags |= BIT(__I40E_DOWN_REQUESTED); 6466 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 6467 } 6468 6469 /* If there's a recovery already waiting, it takes 6470 * precedence before starting a new reset sequence. 6471 */ 6472 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 6473 i40e_handle_reset_warning(pf); 6474 goto unlock; 6475 } 6476 6477 /* If we're already down or resetting, just bail */ 6478 if (reset_flags && 6479 !test_bit(__I40E_DOWN, &pf->state) && 6480 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 6481 i40e_do_reset(pf, reset_flags); 6482 6483 unlock: 6484 rtnl_unlock(); 6485 } 6486 6487 /** 6488 * i40e_handle_link_event - Handle link event 6489 * @pf: board private structure 6490 * @e: event info posted on ARQ 6491 **/ 6492 static void i40e_handle_link_event(struct i40e_pf *pf, 6493 struct i40e_arq_event_info *e) 6494 { 6495 struct i40e_aqc_get_link_status *status = 6496 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 6497 6498 /* Do a new status request to re-enable LSE reporting 6499 * and load new status information into the hw struct 6500 * This completely ignores any state information 6501 * in the ARQ event info, instead choosing to always 6502 * issue the AQ update link status command. 6503 */ 6504 i40e_link_event(pf); 6505 6506 /* check for unqualified module, if link is down */ 6507 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 6508 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 6509 (!(status->link_info & I40E_AQ_LINK_UP))) 6510 dev_err(&pf->pdev->dev, 6511 "The driver failed to link because an unqualified module was detected.\n"); 6512 } 6513 6514 /** 6515 * i40e_clean_adminq_subtask - Clean the AdminQ rings 6516 * @pf: board private structure 6517 **/ 6518 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 6519 { 6520 struct i40e_arq_event_info event; 6521 struct i40e_hw *hw = &pf->hw; 6522 u16 pending, i = 0; 6523 i40e_status ret; 6524 u16 opcode; 6525 u32 oldval; 6526 u32 val; 6527 6528 /* Do not run clean AQ when PF reset fails */ 6529 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 6530 return; 6531 6532 /* check for error indications */ 6533 val = rd32(&pf->hw, pf->hw.aq.arq.len); 6534 oldval = val; 6535 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 6536 if (hw->debug_mask & I40E_DEBUG_AQ) 6537 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 6538 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 6539 } 6540 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 6541 if (hw->debug_mask & I40E_DEBUG_AQ) 6542 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 6543 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 6544 pf->arq_overflows++; 6545 } 6546 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 6547 if (hw->debug_mask & I40E_DEBUG_AQ) 6548 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 6549 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 6550 } 6551 if (oldval != val) 6552 wr32(&pf->hw, pf->hw.aq.arq.len, val); 6553 6554 val = rd32(&pf->hw, pf->hw.aq.asq.len); 6555 oldval = val; 6556 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 6557 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6558 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 6559 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 6560 } 6561 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 6562 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6563 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 6564 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 6565 } 6566 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 6567 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6568 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 6569 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 6570 } 6571 if (oldval != val) 6572 wr32(&pf->hw, pf->hw.aq.asq.len, val); 6573 6574 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 6575 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 6576 if (!event.msg_buf) 6577 return; 6578 6579 do { 6580 ret = i40e_clean_arq_element(hw, &event, &pending); 6581 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 6582 break; 6583 else if (ret) { 6584 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 6585 break; 6586 } 6587 6588 opcode = le16_to_cpu(event.desc.opcode); 6589 switch (opcode) { 6590 6591 case i40e_aqc_opc_get_link_status: 6592 i40e_handle_link_event(pf, &event); 6593 break; 6594 case i40e_aqc_opc_send_msg_to_pf: 6595 ret = i40e_vc_process_vf_msg(pf, 6596 le16_to_cpu(event.desc.retval), 6597 le32_to_cpu(event.desc.cookie_high), 6598 le32_to_cpu(event.desc.cookie_low), 6599 event.msg_buf, 6600 event.msg_len); 6601 break; 6602 case i40e_aqc_opc_lldp_update_mib: 6603 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 6604 #ifdef CONFIG_I40E_DCB 6605 rtnl_lock(); 6606 ret = i40e_handle_lldp_event(pf, &event); 6607 rtnl_unlock(); 6608 #endif /* CONFIG_I40E_DCB */ 6609 break; 6610 case i40e_aqc_opc_event_lan_overflow: 6611 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 6612 i40e_handle_lan_overflow_event(pf, &event); 6613 break; 6614 case i40e_aqc_opc_send_msg_to_peer: 6615 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 6616 break; 6617 case i40e_aqc_opc_nvm_erase: 6618 case i40e_aqc_opc_nvm_update: 6619 case i40e_aqc_opc_oem_post_update: 6620 i40e_debug(&pf->hw, I40E_DEBUG_NVM, 6621 "ARQ NVM operation 0x%04x completed\n", 6622 opcode); 6623 break; 6624 default: 6625 dev_info(&pf->pdev->dev, 6626 "ARQ: Unknown event 0x%04x ignored\n", 6627 opcode); 6628 break; 6629 } 6630 } while (pending && (i++ < pf->adminq_work_limit)); 6631 6632 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 6633 /* re-enable Admin queue interrupt cause */ 6634 val = rd32(hw, I40E_PFINT_ICR0_ENA); 6635 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 6636 wr32(hw, I40E_PFINT_ICR0_ENA, val); 6637 i40e_flush(hw); 6638 6639 kfree(event.msg_buf); 6640 } 6641 6642 /** 6643 * i40e_verify_eeprom - make sure eeprom is good to use 6644 * @pf: board private structure 6645 **/ 6646 static void i40e_verify_eeprom(struct i40e_pf *pf) 6647 { 6648 int err; 6649 6650 err = i40e_diag_eeprom_test(&pf->hw); 6651 if (err) { 6652 /* retry in case of garbage read */ 6653 err = i40e_diag_eeprom_test(&pf->hw); 6654 if (err) { 6655 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 6656 err); 6657 set_bit(__I40E_BAD_EEPROM, &pf->state); 6658 } 6659 } 6660 6661 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 6662 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 6663 clear_bit(__I40E_BAD_EEPROM, &pf->state); 6664 } 6665 } 6666 6667 /** 6668 * i40e_enable_pf_switch_lb 6669 * @pf: pointer to the PF structure 6670 * 6671 * enable switch loop back or die - no point in a return value 6672 **/ 6673 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 6674 { 6675 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6676 struct i40e_vsi_context ctxt; 6677 int ret; 6678 6679 ctxt.seid = pf->main_vsi_seid; 6680 ctxt.pf_num = pf->hw.pf_id; 6681 ctxt.vf_num = 0; 6682 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6683 if (ret) { 6684 dev_info(&pf->pdev->dev, 6685 "couldn't get PF vsi config, err %s aq_err %s\n", 6686 i40e_stat_str(&pf->hw, ret), 6687 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6688 return; 6689 } 6690 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6691 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6692 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6693 6694 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6695 if (ret) { 6696 dev_info(&pf->pdev->dev, 6697 "update vsi switch failed, err %s aq_err %s\n", 6698 i40e_stat_str(&pf->hw, ret), 6699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6700 } 6701 } 6702 6703 /** 6704 * i40e_disable_pf_switch_lb 6705 * @pf: pointer to the PF structure 6706 * 6707 * disable switch loop back or die - no point in a return value 6708 **/ 6709 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 6710 { 6711 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6712 struct i40e_vsi_context ctxt; 6713 int ret; 6714 6715 ctxt.seid = pf->main_vsi_seid; 6716 ctxt.pf_num = pf->hw.pf_id; 6717 ctxt.vf_num = 0; 6718 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6719 if (ret) { 6720 dev_info(&pf->pdev->dev, 6721 "couldn't get PF vsi config, err %s aq_err %s\n", 6722 i40e_stat_str(&pf->hw, ret), 6723 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6724 return; 6725 } 6726 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6727 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6728 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6729 6730 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6731 if (ret) { 6732 dev_info(&pf->pdev->dev, 6733 "update vsi switch failed, err %s aq_err %s\n", 6734 i40e_stat_str(&pf->hw, ret), 6735 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6736 } 6737 } 6738 6739 /** 6740 * i40e_config_bridge_mode - Configure the HW bridge mode 6741 * @veb: pointer to the bridge instance 6742 * 6743 * Configure the loop back mode for the LAN VSI that is downlink to the 6744 * specified HW bridge instance. It is expected this function is called 6745 * when a new HW bridge is instantiated. 6746 **/ 6747 static void i40e_config_bridge_mode(struct i40e_veb *veb) 6748 { 6749 struct i40e_pf *pf = veb->pf; 6750 6751 if (pf->hw.debug_mask & I40E_DEBUG_LAN) 6752 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 6753 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 6754 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 6755 i40e_disable_pf_switch_lb(pf); 6756 else 6757 i40e_enable_pf_switch_lb(pf); 6758 } 6759 6760 /** 6761 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 6762 * @veb: pointer to the VEB instance 6763 * 6764 * This is a recursive function that first builds the attached VSIs then 6765 * recurses in to build the next layer of VEB. We track the connections 6766 * through our own index numbers because the seid's from the HW could 6767 * change across the reset. 6768 **/ 6769 static int i40e_reconstitute_veb(struct i40e_veb *veb) 6770 { 6771 struct i40e_vsi *ctl_vsi = NULL; 6772 struct i40e_pf *pf = veb->pf; 6773 int v, veb_idx; 6774 int ret; 6775 6776 /* build VSI that owns this VEB, temporarily attached to base VEB */ 6777 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 6778 if (pf->vsi[v] && 6779 pf->vsi[v]->veb_idx == veb->idx && 6780 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 6781 ctl_vsi = pf->vsi[v]; 6782 break; 6783 } 6784 } 6785 if (!ctl_vsi) { 6786 dev_info(&pf->pdev->dev, 6787 "missing owner VSI for veb_idx %d\n", veb->idx); 6788 ret = -ENOENT; 6789 goto end_reconstitute; 6790 } 6791 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 6792 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6793 ret = i40e_add_vsi(ctl_vsi); 6794 if (ret) { 6795 dev_info(&pf->pdev->dev, 6796 "rebuild of veb_idx %d owner VSI failed: %d\n", 6797 veb->idx, ret); 6798 goto end_reconstitute; 6799 } 6800 i40e_vsi_reset_stats(ctl_vsi); 6801 6802 /* create the VEB in the switch and move the VSI onto the VEB */ 6803 ret = i40e_add_veb(veb, ctl_vsi); 6804 if (ret) 6805 goto end_reconstitute; 6806 6807 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 6808 veb->bridge_mode = BRIDGE_MODE_VEB; 6809 else 6810 veb->bridge_mode = BRIDGE_MODE_VEPA; 6811 i40e_config_bridge_mode(veb); 6812 6813 /* create the remaining VSIs attached to this VEB */ 6814 for (v = 0; v < pf->num_alloc_vsi; v++) { 6815 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 6816 continue; 6817 6818 if (pf->vsi[v]->veb_idx == veb->idx) { 6819 struct i40e_vsi *vsi = pf->vsi[v]; 6820 6821 vsi->uplink_seid = veb->seid; 6822 ret = i40e_add_vsi(vsi); 6823 if (ret) { 6824 dev_info(&pf->pdev->dev, 6825 "rebuild of vsi_idx %d failed: %d\n", 6826 v, ret); 6827 goto end_reconstitute; 6828 } 6829 i40e_vsi_reset_stats(vsi); 6830 } 6831 } 6832 6833 /* create any VEBs attached to this VEB - RECURSION */ 6834 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 6835 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 6836 pf->veb[veb_idx]->uplink_seid = veb->seid; 6837 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 6838 if (ret) 6839 break; 6840 } 6841 } 6842 6843 end_reconstitute: 6844 return ret; 6845 } 6846 6847 /** 6848 * i40e_get_capabilities - get info about the HW 6849 * @pf: the PF struct 6850 **/ 6851 static int i40e_get_capabilities(struct i40e_pf *pf) 6852 { 6853 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 6854 u16 data_size; 6855 int buf_len; 6856 int err; 6857 6858 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 6859 do { 6860 cap_buf = kzalloc(buf_len, GFP_KERNEL); 6861 if (!cap_buf) 6862 return -ENOMEM; 6863 6864 /* this loads the data into the hw struct for us */ 6865 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 6866 &data_size, 6867 i40e_aqc_opc_list_func_capabilities, 6868 NULL); 6869 /* data loaded, buffer no longer needed */ 6870 kfree(cap_buf); 6871 6872 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 6873 /* retry with a larger buffer */ 6874 buf_len = data_size; 6875 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 6876 dev_info(&pf->pdev->dev, 6877 "capability discovery failed, err %s aq_err %s\n", 6878 i40e_stat_str(&pf->hw, err), 6879 i40e_aq_str(&pf->hw, 6880 pf->hw.aq.asq_last_status)); 6881 return -ENODEV; 6882 } 6883 } while (err); 6884 6885 if (pf->hw.debug_mask & I40E_DEBUG_USER) 6886 dev_info(&pf->pdev->dev, 6887 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 6888 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 6889 pf->hw.func_caps.num_msix_vectors, 6890 pf->hw.func_caps.num_msix_vectors_vf, 6891 pf->hw.func_caps.fd_filters_guaranteed, 6892 pf->hw.func_caps.fd_filters_best_effort, 6893 pf->hw.func_caps.num_tx_qp, 6894 pf->hw.func_caps.num_vsis); 6895 6896 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 6897 + pf->hw.func_caps.num_vfs) 6898 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 6899 dev_info(&pf->pdev->dev, 6900 "got num_vsis %d, setting num_vsis to %d\n", 6901 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 6902 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 6903 } 6904 6905 return 0; 6906 } 6907 6908 static int i40e_vsi_clear(struct i40e_vsi *vsi); 6909 6910 /** 6911 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 6912 * @pf: board private structure 6913 **/ 6914 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 6915 { 6916 struct i40e_vsi *vsi; 6917 6918 /* quick workaround for an NVM issue that leaves a critical register 6919 * uninitialized 6920 */ 6921 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6922 static const u32 hkey[] = { 6923 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6924 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6925 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6926 0x95b3a76d}; 6927 int i; 6928 6929 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6930 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6931 } 6932 6933 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6934 return; 6935 6936 /* find existing VSI and see if it needs configuring */ 6937 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 6938 6939 /* create a new VSI if none exists */ 6940 if (!vsi) { 6941 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6942 pf->vsi[pf->lan_vsi]->seid, 0); 6943 if (!vsi) { 6944 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6945 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6946 return; 6947 } 6948 } 6949 6950 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6951 } 6952 6953 /** 6954 * i40e_fdir_teardown - release the Flow Director resources 6955 * @pf: board private structure 6956 **/ 6957 static void i40e_fdir_teardown(struct i40e_pf *pf) 6958 { 6959 struct i40e_vsi *vsi; 6960 6961 i40e_fdir_filter_exit(pf); 6962 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 6963 if (vsi) 6964 i40e_vsi_release(vsi); 6965 } 6966 6967 /** 6968 * i40e_prep_for_reset - prep for the core to reset 6969 * @pf: board private structure 6970 * 6971 * Close up the VFs and other things in prep for PF Reset. 6972 **/ 6973 static void i40e_prep_for_reset(struct i40e_pf *pf) 6974 { 6975 struct i40e_hw *hw = &pf->hw; 6976 i40e_status ret = 0; 6977 u32 v; 6978 6979 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6980 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6981 return; 6982 if (i40e_check_asq_alive(&pf->hw)) 6983 i40e_vc_notify_reset(pf); 6984 6985 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6986 6987 /* quiesce the VSIs and their queues that are not already DOWN */ 6988 i40e_pf_quiesce_all_vsi(pf); 6989 6990 for (v = 0; v < pf->num_alloc_vsi; v++) { 6991 if (pf->vsi[v]) 6992 pf->vsi[v]->seid = 0; 6993 } 6994 6995 i40e_shutdown_adminq(&pf->hw); 6996 6997 /* call shutdown HMC */ 6998 if (hw->hmc.hmc_obj) { 6999 ret = i40e_shutdown_lan_hmc(hw); 7000 if (ret) 7001 dev_warn(&pf->pdev->dev, 7002 "shutdown_lan_hmc failed: %d\n", ret); 7003 } 7004 } 7005 7006 /** 7007 * i40e_send_version - update firmware with driver version 7008 * @pf: PF struct 7009 */ 7010 static void i40e_send_version(struct i40e_pf *pf) 7011 { 7012 struct i40e_driver_version dv; 7013 7014 dv.major_version = DRV_VERSION_MAJOR; 7015 dv.minor_version = DRV_VERSION_MINOR; 7016 dv.build_version = DRV_VERSION_BUILD; 7017 dv.subbuild_version = 0; 7018 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 7019 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 7020 } 7021 7022 /** 7023 * i40e_reset_and_rebuild - reset and rebuild using a saved config 7024 * @pf: board private structure 7025 * @reinit: if the Main VSI needs to re-initialized. 7026 **/ 7027 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 7028 { 7029 struct i40e_hw *hw = &pf->hw; 7030 u8 set_fc_aq_fail = 0; 7031 i40e_status ret; 7032 u32 val; 7033 u32 v; 7034 7035 /* Now we wait for GRST to settle out. 7036 * We don't have to delete the VEBs or VSIs from the hw switch 7037 * because the reset will make them disappear. 7038 */ 7039 ret = i40e_pf_reset(hw); 7040 if (ret) { 7041 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 7042 set_bit(__I40E_RESET_FAILED, &pf->state); 7043 goto clear_recovery; 7044 } 7045 pf->pfr_count++; 7046 7047 if (test_bit(__I40E_DOWN, &pf->state)) 7048 goto clear_recovery; 7049 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 7050 7051 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 7052 ret = i40e_init_adminq(&pf->hw); 7053 if (ret) { 7054 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", 7055 i40e_stat_str(&pf->hw, ret), 7056 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7057 goto clear_recovery; 7058 } 7059 7060 /* re-verify the eeprom if we just had an EMP reset */ 7061 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) 7062 i40e_verify_eeprom(pf); 7063 7064 i40e_clear_pxe_mode(hw); 7065 ret = i40e_get_capabilities(pf); 7066 if (ret) 7067 goto end_core_reset; 7068 7069 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 7070 hw->func_caps.num_rx_qp, 7071 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 7072 if (ret) { 7073 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 7074 goto end_core_reset; 7075 } 7076 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 7077 if (ret) { 7078 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 7079 goto end_core_reset; 7080 } 7081 7082 #ifdef CONFIG_I40E_DCB 7083 ret = i40e_init_pf_dcb(pf); 7084 if (ret) { 7085 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 7086 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 7087 /* Continue without DCB enabled */ 7088 } 7089 #endif /* CONFIG_I40E_DCB */ 7090 #ifdef I40E_FCOE 7091 i40e_init_pf_fcoe(pf); 7092 7093 #endif 7094 /* do basic switch setup */ 7095 ret = i40e_setup_pf_switch(pf, reinit); 7096 if (ret) 7097 goto end_core_reset; 7098 7099 /* The driver only wants link up/down and module qualification 7100 * reports from firmware. Note the negative logic. 7101 */ 7102 ret = i40e_aq_set_phy_int_mask(&pf->hw, 7103 ~(I40E_AQ_EVENT_LINK_UPDOWN | 7104 I40E_AQ_EVENT_MEDIA_NA | 7105 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 7106 if (ret) 7107 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 7108 i40e_stat_str(&pf->hw, ret), 7109 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7110 7111 /* make sure our flow control settings are restored */ 7112 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 7113 if (ret) 7114 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n", 7115 i40e_stat_str(&pf->hw, ret), 7116 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7117 7118 /* Rebuild the VSIs and VEBs that existed before reset. 7119 * They are still in our local switch element arrays, so only 7120 * need to rebuild the switch model in the HW. 7121 * 7122 * If there were VEBs but the reconstitution failed, we'll try 7123 * try to recover minimal use by getting the basic PF VSI working. 7124 */ 7125 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 7126 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 7127 /* find the one VEB connected to the MAC, and find orphans */ 7128 for (v = 0; v < I40E_MAX_VEB; v++) { 7129 if (!pf->veb[v]) 7130 continue; 7131 7132 if (pf->veb[v]->uplink_seid == pf->mac_seid || 7133 pf->veb[v]->uplink_seid == 0) { 7134 ret = i40e_reconstitute_veb(pf->veb[v]); 7135 7136 if (!ret) 7137 continue; 7138 7139 /* If Main VEB failed, we're in deep doodoo, 7140 * so give up rebuilding the switch and set up 7141 * for minimal rebuild of PF VSI. 7142 * If orphan failed, we'll report the error 7143 * but try to keep going. 7144 */ 7145 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 7146 dev_info(&pf->pdev->dev, 7147 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 7148 ret); 7149 pf->vsi[pf->lan_vsi]->uplink_seid 7150 = pf->mac_seid; 7151 break; 7152 } else if (pf->veb[v]->uplink_seid == 0) { 7153 dev_info(&pf->pdev->dev, 7154 "rebuild of orphan VEB failed: %d\n", 7155 ret); 7156 } 7157 } 7158 } 7159 } 7160 7161 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 7162 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 7163 /* no VEB, so rebuild only the Main VSI */ 7164 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 7165 if (ret) { 7166 dev_info(&pf->pdev->dev, 7167 "rebuild of Main VSI failed: %d\n", ret); 7168 goto end_core_reset; 7169 } 7170 } 7171 7172 /* Reconfigure hardware for allowing smaller MSS in the case 7173 * of TSO, so that we avoid the MDD being fired and causing 7174 * a reset in the case of small MSS+TSO. 7175 */ 7176 #define I40E_REG_MSS 0x000E64DC 7177 #define I40E_REG_MSS_MIN_MASK 0x3FF0000 7178 #define I40E_64BYTE_MSS 0x400000 7179 val = rd32(hw, I40E_REG_MSS); 7180 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 7181 val &= ~I40E_REG_MSS_MIN_MASK; 7182 val |= I40E_64BYTE_MSS; 7183 wr32(hw, I40E_REG_MSS, val); 7184 } 7185 7186 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { 7187 msleep(75); 7188 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 7189 if (ret) 7190 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 7191 i40e_stat_str(&pf->hw, ret), 7192 i40e_aq_str(&pf->hw, 7193 pf->hw.aq.asq_last_status)); 7194 } 7195 /* reinit the misc interrupt */ 7196 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7197 ret = i40e_setup_misc_vector(pf); 7198 7199 /* Add a filter to drop all Flow control frames from any VSI from being 7200 * transmitted. By doing so we stop a malicious VF from sending out 7201 * PAUSE or PFC frames and potentially controlling traffic for other 7202 * PF/VF VSIs. 7203 * The FW can still send Flow control frames if enabled. 7204 */ 7205 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 7206 pf->main_vsi_seid); 7207 7208 /* restart the VSIs that were rebuilt and running before the reset */ 7209 i40e_pf_unquiesce_all_vsi(pf); 7210 7211 if (pf->num_alloc_vfs) { 7212 for (v = 0; v < pf->num_alloc_vfs; v++) 7213 i40e_reset_vf(&pf->vf[v], true); 7214 } 7215 7216 /* tell the firmware that we're starting */ 7217 i40e_send_version(pf); 7218 7219 end_core_reset: 7220 clear_bit(__I40E_RESET_FAILED, &pf->state); 7221 clear_recovery: 7222 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 7223 } 7224 7225 /** 7226 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 7227 * @pf: board private structure 7228 * 7229 * Close up the VFs and other things in prep for a Core Reset, 7230 * then get ready to rebuild the world. 7231 **/ 7232 static void i40e_handle_reset_warning(struct i40e_pf *pf) 7233 { 7234 i40e_prep_for_reset(pf); 7235 i40e_reset_and_rebuild(pf, false); 7236 } 7237 7238 /** 7239 * i40e_handle_mdd_event 7240 * @pf: pointer to the PF structure 7241 * 7242 * Called from the MDD irq handler to identify possibly malicious vfs 7243 **/ 7244 static void i40e_handle_mdd_event(struct i40e_pf *pf) 7245 { 7246 struct i40e_hw *hw = &pf->hw; 7247 bool mdd_detected = false; 7248 bool pf_mdd_detected = false; 7249 struct i40e_vf *vf; 7250 u32 reg; 7251 int i; 7252 7253 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 7254 return; 7255 7256 /* find what triggered the MDD event */ 7257 reg = rd32(hw, I40E_GL_MDET_TX); 7258 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 7259 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 7260 I40E_GL_MDET_TX_PF_NUM_SHIFT; 7261 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 7262 I40E_GL_MDET_TX_VF_NUM_SHIFT; 7263 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 7264 I40E_GL_MDET_TX_EVENT_SHIFT; 7265 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 7266 I40E_GL_MDET_TX_QUEUE_SHIFT) - 7267 pf->hw.func_caps.base_queue; 7268 if (netif_msg_tx_err(pf)) 7269 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 7270 event, queue, pf_num, vf_num); 7271 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 7272 mdd_detected = true; 7273 } 7274 reg = rd32(hw, I40E_GL_MDET_RX); 7275 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 7276 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 7277 I40E_GL_MDET_RX_FUNCTION_SHIFT; 7278 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 7279 I40E_GL_MDET_RX_EVENT_SHIFT; 7280 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 7281 I40E_GL_MDET_RX_QUEUE_SHIFT) - 7282 pf->hw.func_caps.base_queue; 7283 if (netif_msg_rx_err(pf)) 7284 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 7285 event, queue, func); 7286 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 7287 mdd_detected = true; 7288 } 7289 7290 if (mdd_detected) { 7291 reg = rd32(hw, I40E_PF_MDET_TX); 7292 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 7293 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 7294 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 7295 pf_mdd_detected = true; 7296 } 7297 reg = rd32(hw, I40E_PF_MDET_RX); 7298 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 7299 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 7300 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 7301 pf_mdd_detected = true; 7302 } 7303 /* Queue belongs to the PF, initiate a reset */ 7304 if (pf_mdd_detected) { 7305 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 7306 i40e_service_event_schedule(pf); 7307 } 7308 } 7309 7310 /* see if one of the VFs needs its hand slapped */ 7311 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 7312 vf = &(pf->vf[i]); 7313 reg = rd32(hw, I40E_VP_MDET_TX(i)); 7314 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 7315 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 7316 vf->num_mdd_events++; 7317 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 7318 i); 7319 } 7320 7321 reg = rd32(hw, I40E_VP_MDET_RX(i)); 7322 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 7323 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 7324 vf->num_mdd_events++; 7325 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 7326 i); 7327 } 7328 7329 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 7330 dev_info(&pf->pdev->dev, 7331 "Too many MDD events on VF %d, disabled\n", i); 7332 dev_info(&pf->pdev->dev, 7333 "Use PF Control I/F to re-enable the VF\n"); 7334 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 7335 } 7336 } 7337 7338 /* re-enable mdd interrupt cause */ 7339 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 7340 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 7341 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 7342 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 7343 i40e_flush(hw); 7344 } 7345 7346 /** 7347 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW 7348 * @pf: board private structure 7349 **/ 7350 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf) 7351 { 7352 struct i40e_hw *hw = &pf->hw; 7353 i40e_status ret; 7354 __be16 port; 7355 int i; 7356 7357 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC)) 7358 return; 7359 7360 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC; 7361 7362 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7363 if (pf->pending_udp_bitmap & BIT_ULL(i)) { 7364 pf->pending_udp_bitmap &= ~BIT_ULL(i); 7365 port = pf->udp_ports[i].index; 7366 if (port) 7367 ret = i40e_aq_add_udp_tunnel(hw, port, 7368 pf->udp_ports[i].type, 7369 NULL, NULL); 7370 else 7371 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 7372 7373 if (ret) { 7374 dev_dbg(&pf->pdev->dev, 7375 "%s %s port %d, index %d failed, err %s aq_err %s\n", 7376 pf->udp_ports[i].type ? "vxlan" : "geneve", 7377 port ? "add" : "delete", 7378 ntohs(port), i, 7379 i40e_stat_str(&pf->hw, ret), 7380 i40e_aq_str(&pf->hw, 7381 pf->hw.aq.asq_last_status)); 7382 pf->udp_ports[i].index = 0; 7383 } 7384 } 7385 } 7386 } 7387 7388 /** 7389 * i40e_service_task - Run the driver's async subtasks 7390 * @work: pointer to work_struct containing our data 7391 **/ 7392 static void i40e_service_task(struct work_struct *work) 7393 { 7394 struct i40e_pf *pf = container_of(work, 7395 struct i40e_pf, 7396 service_task); 7397 unsigned long start_time = jiffies; 7398 7399 /* don't bother with service tasks if a reset is in progress */ 7400 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7401 return; 7402 } 7403 7404 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 7405 return; 7406 7407 i40e_detect_recover_hung(pf); 7408 i40e_sync_filters_subtask(pf); 7409 i40e_reset_subtask(pf); 7410 i40e_handle_mdd_event(pf); 7411 i40e_vc_process_vflr_event(pf); 7412 i40e_watchdog_subtask(pf); 7413 i40e_fdir_reinit_subtask(pf); 7414 i40e_client_subtask(pf); 7415 i40e_sync_filters_subtask(pf); 7416 i40e_sync_udp_filters_subtask(pf); 7417 i40e_clean_adminq_subtask(pf); 7418 7419 /* flush memory to make sure state is correct before next watchdog */ 7420 smp_mb__before_atomic(); 7421 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 7422 7423 /* If the tasks have taken longer than one timer cycle or there 7424 * is more work to be done, reschedule the service task now 7425 * rather than wait for the timer to tick again. 7426 */ 7427 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 7428 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 7429 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 7430 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 7431 i40e_service_event_schedule(pf); 7432 } 7433 7434 /** 7435 * i40e_service_timer - timer callback 7436 * @data: pointer to PF struct 7437 **/ 7438 static void i40e_service_timer(unsigned long data) 7439 { 7440 struct i40e_pf *pf = (struct i40e_pf *)data; 7441 7442 mod_timer(&pf->service_timer, 7443 round_jiffies(jiffies + pf->service_timer_period)); 7444 i40e_service_event_schedule(pf); 7445 } 7446 7447 /** 7448 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 7449 * @vsi: the VSI being configured 7450 **/ 7451 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 7452 { 7453 struct i40e_pf *pf = vsi->back; 7454 7455 switch (vsi->type) { 7456 case I40E_VSI_MAIN: 7457 vsi->alloc_queue_pairs = pf->num_lan_qps; 7458 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7459 I40E_REQ_DESCRIPTOR_MULTIPLE); 7460 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7461 vsi->num_q_vectors = pf->num_lan_msix; 7462 else 7463 vsi->num_q_vectors = 1; 7464 7465 break; 7466 7467 case I40E_VSI_FDIR: 7468 vsi->alloc_queue_pairs = 1; 7469 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 7470 I40E_REQ_DESCRIPTOR_MULTIPLE); 7471 vsi->num_q_vectors = pf->num_fdsb_msix; 7472 break; 7473 7474 case I40E_VSI_VMDQ2: 7475 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 7476 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7477 I40E_REQ_DESCRIPTOR_MULTIPLE); 7478 vsi->num_q_vectors = pf->num_vmdq_msix; 7479 break; 7480 7481 case I40E_VSI_SRIOV: 7482 vsi->alloc_queue_pairs = pf->num_vf_qps; 7483 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7484 I40E_REQ_DESCRIPTOR_MULTIPLE); 7485 break; 7486 7487 #ifdef I40E_FCOE 7488 case I40E_VSI_FCOE: 7489 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 7490 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7491 I40E_REQ_DESCRIPTOR_MULTIPLE); 7492 vsi->num_q_vectors = pf->num_fcoe_msix; 7493 break; 7494 7495 #endif /* I40E_FCOE */ 7496 default: 7497 WARN_ON(1); 7498 return -ENODATA; 7499 } 7500 7501 return 0; 7502 } 7503 7504 /** 7505 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 7506 * @type: VSI pointer 7507 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 7508 * 7509 * On error: returns error code (negative) 7510 * On success: returns 0 7511 **/ 7512 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 7513 { 7514 int size; 7515 int ret = 0; 7516 7517 /* allocate memory for both Tx and Rx ring pointers */ 7518 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 7519 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 7520 if (!vsi->tx_rings) 7521 return -ENOMEM; 7522 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 7523 7524 if (alloc_qvectors) { 7525 /* allocate memory for q_vector pointers */ 7526 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 7527 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 7528 if (!vsi->q_vectors) { 7529 ret = -ENOMEM; 7530 goto err_vectors; 7531 } 7532 } 7533 return ret; 7534 7535 err_vectors: 7536 kfree(vsi->tx_rings); 7537 return ret; 7538 } 7539 7540 /** 7541 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 7542 * @pf: board private structure 7543 * @type: type of VSI 7544 * 7545 * On error: returns error code (negative) 7546 * On success: returns vsi index in PF (positive) 7547 **/ 7548 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 7549 { 7550 int ret = -ENODEV; 7551 struct i40e_vsi *vsi; 7552 int vsi_idx; 7553 int i; 7554 7555 /* Need to protect the allocation of the VSIs at the PF level */ 7556 mutex_lock(&pf->switch_mutex); 7557 7558 /* VSI list may be fragmented if VSI creation/destruction has 7559 * been happening. We can afford to do a quick scan to look 7560 * for any free VSIs in the list. 7561 * 7562 * find next empty vsi slot, looping back around if necessary 7563 */ 7564 i = pf->next_vsi; 7565 while (i < pf->num_alloc_vsi && pf->vsi[i]) 7566 i++; 7567 if (i >= pf->num_alloc_vsi) { 7568 i = 0; 7569 while (i < pf->next_vsi && pf->vsi[i]) 7570 i++; 7571 } 7572 7573 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 7574 vsi_idx = i; /* Found one! */ 7575 } else { 7576 ret = -ENODEV; 7577 goto unlock_pf; /* out of VSI slots! */ 7578 } 7579 pf->next_vsi = ++i; 7580 7581 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 7582 if (!vsi) { 7583 ret = -ENOMEM; 7584 goto unlock_pf; 7585 } 7586 vsi->type = type; 7587 vsi->back = pf; 7588 set_bit(__I40E_DOWN, &vsi->state); 7589 vsi->flags = 0; 7590 vsi->idx = vsi_idx; 7591 vsi->int_rate_limit = 0; 7592 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 7593 pf->rss_table_size : 64; 7594 vsi->netdev_registered = false; 7595 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 7596 hash_init(vsi->mac_filter_hash); 7597 vsi->irqs_ready = false; 7598 7599 ret = i40e_set_num_rings_in_vsi(vsi); 7600 if (ret) 7601 goto err_rings; 7602 7603 ret = i40e_vsi_alloc_arrays(vsi, true); 7604 if (ret) 7605 goto err_rings; 7606 7607 /* Setup default MSIX irq handler for VSI */ 7608 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 7609 7610 /* Initialize VSI lock */ 7611 spin_lock_init(&vsi->mac_filter_hash_lock); 7612 pf->vsi[vsi_idx] = vsi; 7613 ret = vsi_idx; 7614 goto unlock_pf; 7615 7616 err_rings: 7617 pf->next_vsi = i - 1; 7618 kfree(vsi); 7619 unlock_pf: 7620 mutex_unlock(&pf->switch_mutex); 7621 return ret; 7622 } 7623 7624 /** 7625 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 7626 * @type: VSI pointer 7627 * @free_qvectors: a bool to specify if q_vectors need to be freed. 7628 * 7629 * On error: returns error code (negative) 7630 * On success: returns 0 7631 **/ 7632 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 7633 { 7634 /* free the ring and vector containers */ 7635 if (free_qvectors) { 7636 kfree(vsi->q_vectors); 7637 vsi->q_vectors = NULL; 7638 } 7639 kfree(vsi->tx_rings); 7640 vsi->tx_rings = NULL; 7641 vsi->rx_rings = NULL; 7642 } 7643 7644 /** 7645 * i40e_clear_rss_config_user - clear the user configured RSS hash keys 7646 * and lookup table 7647 * @vsi: Pointer to VSI structure 7648 */ 7649 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi) 7650 { 7651 if (!vsi) 7652 return; 7653 7654 kfree(vsi->rss_hkey_user); 7655 vsi->rss_hkey_user = NULL; 7656 7657 kfree(vsi->rss_lut_user); 7658 vsi->rss_lut_user = NULL; 7659 } 7660 7661 /** 7662 * i40e_vsi_clear - Deallocate the VSI provided 7663 * @vsi: the VSI being un-configured 7664 **/ 7665 static int i40e_vsi_clear(struct i40e_vsi *vsi) 7666 { 7667 struct i40e_pf *pf; 7668 7669 if (!vsi) 7670 return 0; 7671 7672 if (!vsi->back) 7673 goto free_vsi; 7674 pf = vsi->back; 7675 7676 mutex_lock(&pf->switch_mutex); 7677 if (!pf->vsi[vsi->idx]) { 7678 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 7679 vsi->idx, vsi->idx, vsi, vsi->type); 7680 goto unlock_vsi; 7681 } 7682 7683 if (pf->vsi[vsi->idx] != vsi) { 7684 dev_err(&pf->pdev->dev, 7685 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 7686 pf->vsi[vsi->idx]->idx, 7687 pf->vsi[vsi->idx], 7688 pf->vsi[vsi->idx]->type, 7689 vsi->idx, vsi, vsi->type); 7690 goto unlock_vsi; 7691 } 7692 7693 /* updates the PF for this cleared vsi */ 7694 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 7695 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 7696 7697 i40e_vsi_free_arrays(vsi, true); 7698 i40e_clear_rss_config_user(vsi); 7699 7700 pf->vsi[vsi->idx] = NULL; 7701 if (vsi->idx < pf->next_vsi) 7702 pf->next_vsi = vsi->idx; 7703 7704 unlock_vsi: 7705 mutex_unlock(&pf->switch_mutex); 7706 free_vsi: 7707 kfree(vsi); 7708 7709 return 0; 7710 } 7711 7712 /** 7713 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 7714 * @vsi: the VSI being cleaned 7715 **/ 7716 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 7717 { 7718 int i; 7719 7720 if (vsi->tx_rings && vsi->tx_rings[0]) { 7721 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7722 kfree_rcu(vsi->tx_rings[i], rcu); 7723 vsi->tx_rings[i] = NULL; 7724 vsi->rx_rings[i] = NULL; 7725 } 7726 } 7727 } 7728 7729 /** 7730 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 7731 * @vsi: the VSI being configured 7732 **/ 7733 static int i40e_alloc_rings(struct i40e_vsi *vsi) 7734 { 7735 struct i40e_ring *tx_ring, *rx_ring; 7736 struct i40e_pf *pf = vsi->back; 7737 int i; 7738 7739 /* Set basic values in the rings to be used later during open() */ 7740 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7741 /* allocate space for both Tx and Rx in one shot */ 7742 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 7743 if (!tx_ring) 7744 goto err_out; 7745 7746 tx_ring->queue_index = i; 7747 tx_ring->reg_idx = vsi->base_queue + i; 7748 tx_ring->ring_active = false; 7749 tx_ring->vsi = vsi; 7750 tx_ring->netdev = vsi->netdev; 7751 tx_ring->dev = &pf->pdev->dev; 7752 tx_ring->count = vsi->num_desc; 7753 tx_ring->size = 0; 7754 tx_ring->dcb_tc = 0; 7755 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) 7756 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 7757 tx_ring->tx_itr_setting = pf->tx_itr_default; 7758 vsi->tx_rings[i] = tx_ring; 7759 7760 rx_ring = &tx_ring[1]; 7761 rx_ring->queue_index = i; 7762 rx_ring->reg_idx = vsi->base_queue + i; 7763 rx_ring->ring_active = false; 7764 rx_ring->vsi = vsi; 7765 rx_ring->netdev = vsi->netdev; 7766 rx_ring->dev = &pf->pdev->dev; 7767 rx_ring->count = vsi->num_desc; 7768 rx_ring->size = 0; 7769 rx_ring->dcb_tc = 0; 7770 rx_ring->rx_itr_setting = pf->rx_itr_default; 7771 vsi->rx_rings[i] = rx_ring; 7772 } 7773 7774 return 0; 7775 7776 err_out: 7777 i40e_vsi_clear_rings(vsi); 7778 return -ENOMEM; 7779 } 7780 7781 /** 7782 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 7783 * @pf: board private structure 7784 * @vectors: the number of MSI-X vectors to request 7785 * 7786 * Returns the number of vectors reserved, or error 7787 **/ 7788 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 7789 { 7790 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 7791 I40E_MIN_MSIX, vectors); 7792 if (vectors < 0) { 7793 dev_info(&pf->pdev->dev, 7794 "MSI-X vector reservation failed: %d\n", vectors); 7795 vectors = 0; 7796 } 7797 7798 return vectors; 7799 } 7800 7801 /** 7802 * i40e_init_msix - Setup the MSIX capability 7803 * @pf: board private structure 7804 * 7805 * Work with the OS to set up the MSIX vectors needed. 7806 * 7807 * Returns the number of vectors reserved or negative on failure 7808 **/ 7809 static int i40e_init_msix(struct i40e_pf *pf) 7810 { 7811 struct i40e_hw *hw = &pf->hw; 7812 int vectors_left; 7813 int v_budget, i; 7814 int v_actual; 7815 int iwarp_requested = 0; 7816 7817 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7818 return -ENODEV; 7819 7820 /* The number of vectors we'll request will be comprised of: 7821 * - Add 1 for "other" cause for Admin Queue events, etc. 7822 * - The number of LAN queue pairs 7823 * - Queues being used for RSS. 7824 * We don't need as many as max_rss_size vectors. 7825 * use rss_size instead in the calculation since that 7826 * is governed by number of cpus in the system. 7827 * - assumes symmetric Tx/Rx pairing 7828 * - The number of VMDq pairs 7829 * - The CPU count within the NUMA node if iWARP is enabled 7830 #ifdef I40E_FCOE 7831 * - The number of FCOE qps. 7832 #endif 7833 * Once we count this up, try the request. 7834 * 7835 * If we can't get what we want, we'll simplify to nearly nothing 7836 * and try again. If that still fails, we punt. 7837 */ 7838 vectors_left = hw->func_caps.num_msix_vectors; 7839 v_budget = 0; 7840 7841 /* reserve one vector for miscellaneous handler */ 7842 if (vectors_left) { 7843 v_budget++; 7844 vectors_left--; 7845 } 7846 7847 /* reserve vectors for the main PF traffic queues */ 7848 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left); 7849 vectors_left -= pf->num_lan_msix; 7850 v_budget += pf->num_lan_msix; 7851 7852 /* reserve one vector for sideband flow director */ 7853 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7854 if (vectors_left) { 7855 pf->num_fdsb_msix = 1; 7856 v_budget++; 7857 vectors_left--; 7858 } else { 7859 pf->num_fdsb_msix = 0; 7860 } 7861 } 7862 7863 #ifdef I40E_FCOE 7864 /* can we reserve enough for FCoE? */ 7865 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7866 if (!vectors_left) 7867 pf->num_fcoe_msix = 0; 7868 else if (vectors_left >= pf->num_fcoe_qps) 7869 pf->num_fcoe_msix = pf->num_fcoe_qps; 7870 else 7871 pf->num_fcoe_msix = 1; 7872 v_budget += pf->num_fcoe_msix; 7873 vectors_left -= pf->num_fcoe_msix; 7874 } 7875 7876 #endif 7877 /* can we reserve enough for iWARP? */ 7878 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7879 iwarp_requested = pf->num_iwarp_msix; 7880 7881 if (!vectors_left) 7882 pf->num_iwarp_msix = 0; 7883 else if (vectors_left < pf->num_iwarp_msix) 7884 pf->num_iwarp_msix = 1; 7885 v_budget += pf->num_iwarp_msix; 7886 vectors_left -= pf->num_iwarp_msix; 7887 } 7888 7889 /* any vectors left over go for VMDq support */ 7890 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 7891 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 7892 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 7893 7894 if (!vectors_left) { 7895 pf->num_vmdq_msix = 0; 7896 pf->num_vmdq_qps = 0; 7897 } else { 7898 /* if we're short on vectors for what's desired, we limit 7899 * the queues per vmdq. If this is still more than are 7900 * available, the user will need to change the number of 7901 * queues/vectors used by the PF later with the ethtool 7902 * channels command 7903 */ 7904 if (vmdq_vecs < vmdq_vecs_wanted) 7905 pf->num_vmdq_qps = 1; 7906 pf->num_vmdq_msix = pf->num_vmdq_qps; 7907 7908 v_budget += vmdq_vecs; 7909 vectors_left -= vmdq_vecs; 7910 } 7911 } 7912 7913 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 7914 GFP_KERNEL); 7915 if (!pf->msix_entries) 7916 return -ENOMEM; 7917 7918 for (i = 0; i < v_budget; i++) 7919 pf->msix_entries[i].entry = i; 7920 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 7921 7922 if (v_actual < I40E_MIN_MSIX) { 7923 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 7924 kfree(pf->msix_entries); 7925 pf->msix_entries = NULL; 7926 pci_disable_msix(pf->pdev); 7927 return -ENODEV; 7928 7929 } else if (v_actual == I40E_MIN_MSIX) { 7930 /* Adjust for minimal MSIX use */ 7931 pf->num_vmdq_vsis = 0; 7932 pf->num_vmdq_qps = 0; 7933 pf->num_lan_qps = 1; 7934 pf->num_lan_msix = 1; 7935 7936 } else if (!vectors_left) { 7937 /* If we have limited resources, we will start with no vectors 7938 * for the special features and then allocate vectors to some 7939 * of these features based on the policy and at the end disable 7940 * the features that did not get any vectors. 7941 */ 7942 int vec; 7943 7944 dev_info(&pf->pdev->dev, 7945 "MSI-X vector limit reached, attempting to redistribute vectors\n"); 7946 /* reserve the misc vector */ 7947 vec = v_actual - 1; 7948 7949 /* Scale vector usage down */ 7950 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 7951 pf->num_vmdq_vsis = 1; 7952 pf->num_vmdq_qps = 1; 7953 #ifdef I40E_FCOE 7954 pf->num_fcoe_qps = 0; 7955 pf->num_fcoe_msix = 0; 7956 #endif 7957 7958 /* partition out the remaining vectors */ 7959 switch (vec) { 7960 case 2: 7961 pf->num_lan_msix = 1; 7962 break; 7963 case 3: 7964 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7965 pf->num_lan_msix = 1; 7966 pf->num_iwarp_msix = 1; 7967 } else { 7968 pf->num_lan_msix = 2; 7969 } 7970 #ifdef I40E_FCOE 7971 /* give one vector to FCoE */ 7972 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7973 pf->num_lan_msix = 1; 7974 pf->num_fcoe_msix = 1; 7975 } 7976 #endif 7977 break; 7978 default: 7979 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7980 pf->num_iwarp_msix = min_t(int, (vec / 3), 7981 iwarp_requested); 7982 pf->num_vmdq_vsis = min_t(int, (vec / 3), 7983 I40E_DEFAULT_NUM_VMDQ_VSI); 7984 } else { 7985 pf->num_vmdq_vsis = min_t(int, (vec / 2), 7986 I40E_DEFAULT_NUM_VMDQ_VSI); 7987 } 7988 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7989 pf->num_fdsb_msix = 1; 7990 vec--; 7991 } 7992 pf->num_lan_msix = min_t(int, 7993 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)), 7994 pf->num_lan_msix); 7995 pf->num_lan_qps = pf->num_lan_msix; 7996 #ifdef I40E_FCOE 7997 /* give one vector to FCoE */ 7998 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7999 pf->num_fcoe_msix = 1; 8000 vec--; 8001 } 8002 #endif 8003 break; 8004 } 8005 } 8006 8007 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 8008 (pf->num_fdsb_msix == 0)) { 8009 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n"); 8010 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8011 } 8012 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 8013 (pf->num_vmdq_msix == 0)) { 8014 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 8015 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 8016 } 8017 8018 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 8019 (pf->num_iwarp_msix == 0)) { 8020 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n"); 8021 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 8022 } 8023 #ifdef I40E_FCOE 8024 8025 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 8026 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 8027 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 8028 } 8029 #endif 8030 i40e_debug(&pf->hw, I40E_DEBUG_INIT, 8031 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n", 8032 pf->num_lan_msix, 8033 pf->num_vmdq_msix * pf->num_vmdq_vsis, 8034 pf->num_fdsb_msix, 8035 pf->num_iwarp_msix); 8036 8037 return v_actual; 8038 } 8039 8040 /** 8041 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 8042 * @vsi: the VSI being configured 8043 * @v_idx: index of the vector in the vsi struct 8044 * @cpu: cpu to be used on affinity_mask 8045 * 8046 * We allocate one q_vector. If allocation fails we return -ENOMEM. 8047 **/ 8048 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu) 8049 { 8050 struct i40e_q_vector *q_vector; 8051 8052 /* allocate q_vector */ 8053 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 8054 if (!q_vector) 8055 return -ENOMEM; 8056 8057 q_vector->vsi = vsi; 8058 q_vector->v_idx = v_idx; 8059 cpumask_set_cpu(cpu, &q_vector->affinity_mask); 8060 8061 if (vsi->netdev) 8062 netif_napi_add(vsi->netdev, &q_vector->napi, 8063 i40e_napi_poll, NAPI_POLL_WEIGHT); 8064 8065 q_vector->rx.latency_range = I40E_LOW_LATENCY; 8066 q_vector->tx.latency_range = I40E_LOW_LATENCY; 8067 8068 /* tie q_vector and vsi together */ 8069 vsi->q_vectors[v_idx] = q_vector; 8070 8071 return 0; 8072 } 8073 8074 /** 8075 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 8076 * @vsi: the VSI being configured 8077 * 8078 * We allocate one q_vector per queue interrupt. If allocation fails we 8079 * return -ENOMEM. 8080 **/ 8081 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 8082 { 8083 struct i40e_pf *pf = vsi->back; 8084 int err, v_idx, num_q_vectors, current_cpu; 8085 8086 /* if not MSIX, give the one vector only to the LAN VSI */ 8087 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 8088 num_q_vectors = vsi->num_q_vectors; 8089 else if (vsi == pf->vsi[pf->lan_vsi]) 8090 num_q_vectors = 1; 8091 else 8092 return -EINVAL; 8093 8094 current_cpu = cpumask_first(cpu_online_mask); 8095 8096 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 8097 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu); 8098 if (err) 8099 goto err_out; 8100 current_cpu = cpumask_next(current_cpu, cpu_online_mask); 8101 if (unlikely(current_cpu >= nr_cpu_ids)) 8102 current_cpu = cpumask_first(cpu_online_mask); 8103 } 8104 8105 return 0; 8106 8107 err_out: 8108 while (v_idx--) 8109 i40e_free_q_vector(vsi, v_idx); 8110 8111 return err; 8112 } 8113 8114 /** 8115 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 8116 * @pf: board private structure to initialize 8117 **/ 8118 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 8119 { 8120 int vectors = 0; 8121 ssize_t size; 8122 8123 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 8124 vectors = i40e_init_msix(pf); 8125 if (vectors < 0) { 8126 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 8127 I40E_FLAG_IWARP_ENABLED | 8128 #ifdef I40E_FCOE 8129 I40E_FLAG_FCOE_ENABLED | 8130 #endif 8131 I40E_FLAG_RSS_ENABLED | 8132 I40E_FLAG_DCB_CAPABLE | 8133 I40E_FLAG_DCB_ENABLED | 8134 I40E_FLAG_SRIOV_ENABLED | 8135 I40E_FLAG_FD_SB_ENABLED | 8136 I40E_FLAG_FD_ATR_ENABLED | 8137 I40E_FLAG_VMDQ_ENABLED); 8138 8139 /* rework the queue expectations without MSIX */ 8140 i40e_determine_queue_usage(pf); 8141 } 8142 } 8143 8144 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 8145 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 8146 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 8147 vectors = pci_enable_msi(pf->pdev); 8148 if (vectors < 0) { 8149 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 8150 vectors); 8151 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 8152 } 8153 vectors = 1; /* one MSI or Legacy vector */ 8154 } 8155 8156 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 8157 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 8158 8159 /* set up vector assignment tracking */ 8160 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 8161 pf->irq_pile = kzalloc(size, GFP_KERNEL); 8162 if (!pf->irq_pile) { 8163 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 8164 return -ENOMEM; 8165 } 8166 pf->irq_pile->num_entries = vectors; 8167 pf->irq_pile->search_hint = 0; 8168 8169 /* track first vector for misc interrupts, ignore return */ 8170 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 8171 8172 return 0; 8173 } 8174 8175 /** 8176 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 8177 * @pf: board private structure 8178 * 8179 * This sets up the handler for MSIX 0, which is used to manage the 8180 * non-queue interrupts, e.g. AdminQ and errors. This is not used 8181 * when in MSI or Legacy interrupt mode. 8182 **/ 8183 static int i40e_setup_misc_vector(struct i40e_pf *pf) 8184 { 8185 struct i40e_hw *hw = &pf->hw; 8186 int err = 0; 8187 8188 /* Only request the irq if this is the first time through, and 8189 * not when we're rebuilding after a Reset 8190 */ 8191 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 8192 err = request_irq(pf->msix_entries[0].vector, 8193 i40e_intr, 0, pf->int_name, pf); 8194 if (err) { 8195 dev_info(&pf->pdev->dev, 8196 "request_irq for %s failed: %d\n", 8197 pf->int_name, err); 8198 return -EFAULT; 8199 } 8200 } 8201 8202 i40e_enable_misc_int_causes(pf); 8203 8204 /* associate no queues to the misc vector */ 8205 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 8206 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 8207 8208 i40e_flush(hw); 8209 8210 i40e_irq_dynamic_enable_icr0(pf, true); 8211 8212 return err; 8213 } 8214 8215 /** 8216 * i40e_config_rss_aq - Prepare for RSS using AQ commands 8217 * @vsi: vsi structure 8218 * @seed: RSS hash seed 8219 **/ 8220 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 8221 u8 *lut, u16 lut_size) 8222 { 8223 struct i40e_pf *pf = vsi->back; 8224 struct i40e_hw *hw = &pf->hw; 8225 int ret = 0; 8226 8227 if (seed) { 8228 struct i40e_aqc_get_set_rss_key_data *seed_dw = 8229 (struct i40e_aqc_get_set_rss_key_data *)seed; 8230 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw); 8231 if (ret) { 8232 dev_info(&pf->pdev->dev, 8233 "Cannot set RSS key, err %s aq_err %s\n", 8234 i40e_stat_str(hw, ret), 8235 i40e_aq_str(hw, hw->aq.asq_last_status)); 8236 return ret; 8237 } 8238 } 8239 if (lut) { 8240 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; 8241 8242 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 8243 if (ret) { 8244 dev_info(&pf->pdev->dev, 8245 "Cannot set RSS lut, err %s aq_err %s\n", 8246 i40e_stat_str(hw, ret), 8247 i40e_aq_str(hw, hw->aq.asq_last_status)); 8248 return ret; 8249 } 8250 } 8251 return ret; 8252 } 8253 8254 /** 8255 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands 8256 * @vsi: Pointer to vsi structure 8257 * @seed: Buffter to store the hash keys 8258 * @lut: Buffer to store the lookup table entries 8259 * @lut_size: Size of buffer to store the lookup table entries 8260 * 8261 * Return 0 on success, negative on failure 8262 */ 8263 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 8264 u8 *lut, u16 lut_size) 8265 { 8266 struct i40e_pf *pf = vsi->back; 8267 struct i40e_hw *hw = &pf->hw; 8268 int ret = 0; 8269 8270 if (seed) { 8271 ret = i40e_aq_get_rss_key(hw, vsi->id, 8272 (struct i40e_aqc_get_set_rss_key_data *)seed); 8273 if (ret) { 8274 dev_info(&pf->pdev->dev, 8275 "Cannot get RSS key, err %s aq_err %s\n", 8276 i40e_stat_str(&pf->hw, ret), 8277 i40e_aq_str(&pf->hw, 8278 pf->hw.aq.asq_last_status)); 8279 return ret; 8280 } 8281 } 8282 8283 if (lut) { 8284 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; 8285 8286 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 8287 if (ret) { 8288 dev_info(&pf->pdev->dev, 8289 "Cannot get RSS lut, err %s aq_err %s\n", 8290 i40e_stat_str(&pf->hw, ret), 8291 i40e_aq_str(&pf->hw, 8292 pf->hw.aq.asq_last_status)); 8293 return ret; 8294 } 8295 } 8296 8297 return ret; 8298 } 8299 8300 /** 8301 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used 8302 * @vsi: VSI structure 8303 **/ 8304 static int i40e_vsi_config_rss(struct i40e_vsi *vsi) 8305 { 8306 u8 seed[I40E_HKEY_ARRAY_SIZE]; 8307 struct i40e_pf *pf = vsi->back; 8308 u8 *lut; 8309 int ret; 8310 8311 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) 8312 return 0; 8313 8314 if (!vsi->rss_size) 8315 vsi->rss_size = min_t(int, pf->alloc_rss_size, 8316 vsi->num_queue_pairs); 8317 if (!vsi->rss_size) 8318 return -EINVAL; 8319 8320 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 8321 if (!lut) 8322 return -ENOMEM; 8323 /* Use the user configured hash keys and lookup table if there is one, 8324 * otherwise use default 8325 */ 8326 if (vsi->rss_lut_user) 8327 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 8328 else 8329 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 8330 if (vsi->rss_hkey_user) 8331 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 8332 else 8333 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 8334 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size); 8335 kfree(lut); 8336 8337 return ret; 8338 } 8339 8340 /** 8341 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers 8342 * @vsi: Pointer to vsi structure 8343 * @seed: RSS hash seed 8344 * @lut: Lookup table 8345 * @lut_size: Lookup table size 8346 * 8347 * Returns 0 on success, negative on failure 8348 **/ 8349 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed, 8350 const u8 *lut, u16 lut_size) 8351 { 8352 struct i40e_pf *pf = vsi->back; 8353 struct i40e_hw *hw = &pf->hw; 8354 u16 vf_id = vsi->vf_id; 8355 u8 i; 8356 8357 /* Fill out hash function seed */ 8358 if (seed) { 8359 u32 *seed_dw = (u32 *)seed; 8360 8361 if (vsi->type == I40E_VSI_MAIN) { 8362 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 8363 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i), 8364 seed_dw[i]); 8365 } else if (vsi->type == I40E_VSI_SRIOV) { 8366 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++) 8367 i40e_write_rx_ctl(hw, 8368 I40E_VFQF_HKEY1(i, vf_id), 8369 seed_dw[i]); 8370 } else { 8371 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n"); 8372 } 8373 } 8374 8375 if (lut) { 8376 u32 *lut_dw = (u32 *)lut; 8377 8378 if (vsi->type == I40E_VSI_MAIN) { 8379 if (lut_size != I40E_HLUT_ARRAY_SIZE) 8380 return -EINVAL; 8381 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 8382 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]); 8383 } else if (vsi->type == I40E_VSI_SRIOV) { 8384 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE) 8385 return -EINVAL; 8386 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 8387 i40e_write_rx_ctl(hw, 8388 I40E_VFQF_HLUT1(i, vf_id), 8389 lut_dw[i]); 8390 } else { 8391 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 8392 } 8393 } 8394 i40e_flush(hw); 8395 8396 return 0; 8397 } 8398 8399 /** 8400 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers 8401 * @vsi: Pointer to VSI structure 8402 * @seed: Buffer to store the keys 8403 * @lut: Buffer to store the lookup table entries 8404 * @lut_size: Size of buffer to store the lookup table entries 8405 * 8406 * Returns 0 on success, negative on failure 8407 */ 8408 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed, 8409 u8 *lut, u16 lut_size) 8410 { 8411 struct i40e_pf *pf = vsi->back; 8412 struct i40e_hw *hw = &pf->hw; 8413 u16 i; 8414 8415 if (seed) { 8416 u32 *seed_dw = (u32 *)seed; 8417 8418 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 8419 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i)); 8420 } 8421 if (lut) { 8422 u32 *lut_dw = (u32 *)lut; 8423 8424 if (lut_size != I40E_HLUT_ARRAY_SIZE) 8425 return -EINVAL; 8426 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 8427 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i)); 8428 } 8429 8430 return 0; 8431 } 8432 8433 /** 8434 * i40e_config_rss - Configure RSS keys and lut 8435 * @vsi: Pointer to VSI structure 8436 * @seed: RSS hash seed 8437 * @lut: Lookup table 8438 * @lut_size: Lookup table size 8439 * 8440 * Returns 0 on success, negative on failure 8441 */ 8442 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 8443 { 8444 struct i40e_pf *pf = vsi->back; 8445 8446 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) 8447 return i40e_config_rss_aq(vsi, seed, lut, lut_size); 8448 else 8449 return i40e_config_rss_reg(vsi, seed, lut, lut_size); 8450 } 8451 8452 /** 8453 * i40e_get_rss - Get RSS keys and lut 8454 * @vsi: Pointer to VSI structure 8455 * @seed: Buffer to store the keys 8456 * @lut: Buffer to store the lookup table entries 8457 * lut_size: Size of buffer to store the lookup table entries 8458 * 8459 * Returns 0 on success, negative on failure 8460 */ 8461 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 8462 { 8463 struct i40e_pf *pf = vsi->back; 8464 8465 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) 8466 return i40e_get_rss_aq(vsi, seed, lut, lut_size); 8467 else 8468 return i40e_get_rss_reg(vsi, seed, lut, lut_size); 8469 } 8470 8471 /** 8472 * i40e_fill_rss_lut - Fill the RSS lookup table with default values 8473 * @pf: Pointer to board private structure 8474 * @lut: Lookup table 8475 * @rss_table_size: Lookup table size 8476 * @rss_size: Range of queue number for hashing 8477 */ 8478 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 8479 u16 rss_table_size, u16 rss_size) 8480 { 8481 u16 i; 8482 8483 for (i = 0; i < rss_table_size; i++) 8484 lut[i] = i % rss_size; 8485 } 8486 8487 /** 8488 * i40e_pf_config_rss - Prepare for RSS if used 8489 * @pf: board private structure 8490 **/ 8491 static int i40e_pf_config_rss(struct i40e_pf *pf) 8492 { 8493 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 8494 u8 seed[I40E_HKEY_ARRAY_SIZE]; 8495 u8 *lut; 8496 struct i40e_hw *hw = &pf->hw; 8497 u32 reg_val; 8498 u64 hena; 8499 int ret; 8500 8501 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 8502 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 8503 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 8504 hena |= i40e_pf_get_default_rss_hena(pf); 8505 8506 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 8507 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 8508 8509 /* Determine the RSS table size based on the hardware capabilities */ 8510 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0); 8511 reg_val = (pf->rss_table_size == 512) ? 8512 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) : 8513 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512); 8514 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val); 8515 8516 /* Determine the RSS size of the VSI */ 8517 if (!vsi->rss_size) 8518 vsi->rss_size = min_t(int, pf->alloc_rss_size, 8519 vsi->num_queue_pairs); 8520 if (!vsi->rss_size) 8521 return -EINVAL; 8522 8523 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 8524 if (!lut) 8525 return -ENOMEM; 8526 8527 /* Use user configured lut if there is one, otherwise use default */ 8528 if (vsi->rss_lut_user) 8529 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 8530 else 8531 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 8532 8533 /* Use user configured hash key if there is one, otherwise 8534 * use default. 8535 */ 8536 if (vsi->rss_hkey_user) 8537 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 8538 else 8539 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 8540 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 8541 kfree(lut); 8542 8543 return ret; 8544 } 8545 8546 /** 8547 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 8548 * @pf: board private structure 8549 * @queue_count: the requested queue count for rss. 8550 * 8551 * returns 0 if rss is not enabled, if enabled returns the final rss queue 8552 * count which may be different from the requested queue count. 8553 **/ 8554 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 8555 { 8556 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 8557 int new_rss_size; 8558 8559 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 8560 return 0; 8561 8562 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 8563 8564 if (queue_count != vsi->num_queue_pairs) { 8565 vsi->req_queue_pairs = queue_count; 8566 i40e_prep_for_reset(pf); 8567 8568 pf->alloc_rss_size = new_rss_size; 8569 8570 i40e_reset_and_rebuild(pf, true); 8571 8572 /* Discard the user configured hash keys and lut, if less 8573 * queues are enabled. 8574 */ 8575 if (queue_count < vsi->rss_size) { 8576 i40e_clear_rss_config_user(vsi); 8577 dev_dbg(&pf->pdev->dev, 8578 "discard user configured hash keys and lut\n"); 8579 } 8580 8581 /* Reset vsi->rss_size, as number of enabled queues changed */ 8582 vsi->rss_size = min_t(int, pf->alloc_rss_size, 8583 vsi->num_queue_pairs); 8584 8585 i40e_pf_config_rss(pf); 8586 } 8587 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n", 8588 vsi->req_queue_pairs, pf->rss_size_max); 8589 return pf->alloc_rss_size; 8590 } 8591 8592 /** 8593 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition 8594 * @pf: board private structure 8595 **/ 8596 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) 8597 { 8598 i40e_status status; 8599 bool min_valid, max_valid; 8600 u32 max_bw, min_bw; 8601 8602 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 8603 &min_valid, &max_valid); 8604 8605 if (!status) { 8606 if (min_valid) 8607 pf->npar_min_bw = min_bw; 8608 if (max_valid) 8609 pf->npar_max_bw = max_bw; 8610 } 8611 8612 return status; 8613 } 8614 8615 /** 8616 * i40e_set_npar_bw_setting - Set BW settings for this PF partition 8617 * @pf: board private structure 8618 **/ 8619 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) 8620 { 8621 struct i40e_aqc_configure_partition_bw_data bw_data; 8622 i40e_status status; 8623 8624 /* Set the valid bit for this PF */ 8625 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); 8626 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; 8627 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; 8628 8629 /* Set the new bandwidths */ 8630 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 8631 8632 return status; 8633 } 8634 8635 /** 8636 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition 8637 * @pf: board private structure 8638 **/ 8639 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) 8640 { 8641 /* Commit temporary BW setting to permanent NVM image */ 8642 enum i40e_admin_queue_err last_aq_status; 8643 i40e_status ret; 8644 u16 nvm_word; 8645 8646 if (pf->hw.partition_id != 1) { 8647 dev_info(&pf->pdev->dev, 8648 "Commit BW only works on partition 1! This is partition %d", 8649 pf->hw.partition_id); 8650 ret = I40E_NOT_SUPPORTED; 8651 goto bw_commit_out; 8652 } 8653 8654 /* Acquire NVM for read access */ 8655 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 8656 last_aq_status = pf->hw.aq.asq_last_status; 8657 if (ret) { 8658 dev_info(&pf->pdev->dev, 8659 "Cannot acquire NVM for read access, err %s aq_err %s\n", 8660 i40e_stat_str(&pf->hw, ret), 8661 i40e_aq_str(&pf->hw, last_aq_status)); 8662 goto bw_commit_out; 8663 } 8664 8665 /* Read word 0x10 of NVM - SW compatibility word 1 */ 8666 ret = i40e_aq_read_nvm(&pf->hw, 8667 I40E_SR_NVM_CONTROL_WORD, 8668 0x10, sizeof(nvm_word), &nvm_word, 8669 false, NULL); 8670 /* Save off last admin queue command status before releasing 8671 * the NVM 8672 */ 8673 last_aq_status = pf->hw.aq.asq_last_status; 8674 i40e_release_nvm(&pf->hw); 8675 if (ret) { 8676 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", 8677 i40e_stat_str(&pf->hw, ret), 8678 i40e_aq_str(&pf->hw, last_aq_status)); 8679 goto bw_commit_out; 8680 } 8681 8682 /* Wait a bit for NVM release to complete */ 8683 msleep(50); 8684 8685 /* Acquire NVM for write access */ 8686 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 8687 last_aq_status = pf->hw.aq.asq_last_status; 8688 if (ret) { 8689 dev_info(&pf->pdev->dev, 8690 "Cannot acquire NVM for write access, err %s aq_err %s\n", 8691 i40e_stat_str(&pf->hw, ret), 8692 i40e_aq_str(&pf->hw, last_aq_status)); 8693 goto bw_commit_out; 8694 } 8695 /* Write it back out unchanged to initiate update NVM, 8696 * which will force a write of the shadow (alt) RAM to 8697 * the NVM - thus storing the bandwidth values permanently. 8698 */ 8699 ret = i40e_aq_update_nvm(&pf->hw, 8700 I40E_SR_NVM_CONTROL_WORD, 8701 0x10, sizeof(nvm_word), 8702 &nvm_word, true, NULL); 8703 /* Save off last admin queue command status before releasing 8704 * the NVM 8705 */ 8706 last_aq_status = pf->hw.aq.asq_last_status; 8707 i40e_release_nvm(&pf->hw); 8708 if (ret) 8709 dev_info(&pf->pdev->dev, 8710 "BW settings NOT SAVED, err %s aq_err %s\n", 8711 i40e_stat_str(&pf->hw, ret), 8712 i40e_aq_str(&pf->hw, last_aq_status)); 8713 bw_commit_out: 8714 8715 return ret; 8716 } 8717 8718 /** 8719 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 8720 * @pf: board private structure to initialize 8721 * 8722 * i40e_sw_init initializes the Adapter private data structure. 8723 * Fields are initialized based on PCI device information and 8724 * OS network device settings (MTU size). 8725 **/ 8726 static int i40e_sw_init(struct i40e_pf *pf) 8727 { 8728 int err = 0; 8729 int size; 8730 8731 /* Set default capability flags */ 8732 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 8733 I40E_FLAG_MSI_ENABLED | 8734 I40E_FLAG_MSIX_ENABLED; 8735 8736 /* Set default ITR */ 8737 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 8738 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 8739 8740 /* Depending on PF configurations, it is possible that the RSS 8741 * maximum might end up larger than the available queues 8742 */ 8743 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); 8744 pf->alloc_rss_size = 1; 8745 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 8746 pf->rss_size_max = min_t(int, pf->rss_size_max, 8747 pf->hw.func_caps.num_tx_qp); 8748 if (pf->hw.func_caps.rss) { 8749 pf->flags |= I40E_FLAG_RSS_ENABLED; 8750 pf->alloc_rss_size = min_t(int, pf->rss_size_max, 8751 num_online_cpus()); 8752 } 8753 8754 /* MFP mode enabled */ 8755 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { 8756 pf->flags |= I40E_FLAG_MFP_ENABLED; 8757 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 8758 if (i40e_get_npar_bw_setting(pf)) 8759 dev_warn(&pf->pdev->dev, 8760 "Could not get NPAR bw settings\n"); 8761 else 8762 dev_info(&pf->pdev->dev, 8763 "Min BW = %8.8x, Max BW = %8.8x\n", 8764 pf->npar_min_bw, pf->npar_max_bw); 8765 } 8766 8767 /* FW/NVM is not yet fixed in this regard */ 8768 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 8769 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 8770 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 8771 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 8772 if (pf->flags & I40E_FLAG_MFP_ENABLED && 8773 pf->hw.num_partitions > 1) 8774 dev_info(&pf->pdev->dev, 8775 "Flow Director Sideband mode Disabled in MFP mode\n"); 8776 else 8777 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8778 pf->fdir_pf_filter_count = 8779 pf->hw.func_caps.fd_filters_guaranteed; 8780 pf->hw.fdir_shared_filter_count = 8781 pf->hw.func_caps.fd_filters_best_effort; 8782 } 8783 8784 if ((pf->hw.mac.type == I40E_MAC_XL710) && 8785 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 8786 (pf->hw.aq.fw_maj_ver < 4))) { 8787 pf->flags |= I40E_FLAG_RESTART_AUTONEG; 8788 /* No DCB support for FW < v4.33 */ 8789 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT; 8790 } 8791 8792 /* Disable FW LLDP if FW < v4.3 */ 8793 if ((pf->hw.mac.type == I40E_MAC_XL710) && 8794 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 8795 (pf->hw.aq.fw_maj_ver < 4))) 8796 pf->flags |= I40E_FLAG_STOP_FW_LLDP; 8797 8798 /* Use the FW Set LLDP MIB API if FW > v4.40 */ 8799 if ((pf->hw.mac.type == I40E_MAC_XL710) && 8800 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) || 8801 (pf->hw.aq.fw_maj_ver >= 5))) 8802 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB; 8803 8804 if (pf->hw.func_caps.vmdq) { 8805 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 8806 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 8807 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf); 8808 } 8809 8810 if (pf->hw.func_caps.iwarp) { 8811 pf->flags |= I40E_FLAG_IWARP_ENABLED; 8812 /* IWARP needs one extra vector for CQP just like MISC.*/ 8813 pf->num_iwarp_msix = (int)num_online_cpus() + 1; 8814 } 8815 8816 #ifdef I40E_FCOE 8817 i40e_init_pf_fcoe(pf); 8818 8819 #endif /* I40E_FCOE */ 8820 #ifdef CONFIG_PCI_IOV 8821 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 8822 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 8823 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 8824 pf->num_req_vfs = min_t(int, 8825 pf->hw.func_caps.num_vfs, 8826 I40E_MAX_VF_COUNT); 8827 } 8828 #endif /* CONFIG_PCI_IOV */ 8829 if (pf->hw.mac.type == I40E_MAC_X722) { 8830 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE 8831 | I40E_FLAG_128_QP_RSS_CAPABLE 8832 | I40E_FLAG_HW_ATR_EVICT_CAPABLE 8833 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE 8834 | I40E_FLAG_WB_ON_ITR_CAPABLE 8835 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE 8836 | I40E_FLAG_NO_PCI_LINK_CHECK 8837 | I40E_FLAG_USE_SET_LLDP_MIB 8838 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE 8839 | I40E_FLAG_PTP_L4_CAPABLE 8840 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE; 8841 } else if ((pf->hw.aq.api_maj_ver > 1) || 8842 ((pf->hw.aq.api_maj_ver == 1) && 8843 (pf->hw.aq.api_min_ver > 4))) { 8844 /* Supported in FW API version higher than 1.4 */ 8845 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; 8846 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; 8847 } else { 8848 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; 8849 } 8850 8851 pf->eeprom_version = 0xDEAD; 8852 pf->lan_veb = I40E_NO_VEB; 8853 pf->lan_vsi = I40E_NO_VSI; 8854 8855 /* By default FW has this off for performance reasons */ 8856 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; 8857 8858 /* set up queue assignment tracking */ 8859 size = sizeof(struct i40e_lump_tracking) 8860 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 8861 pf->qp_pile = kzalloc(size, GFP_KERNEL); 8862 if (!pf->qp_pile) { 8863 err = -ENOMEM; 8864 goto sw_init_done; 8865 } 8866 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 8867 pf->qp_pile->search_hint = 0; 8868 8869 pf->tx_timeout_recovery_level = 1; 8870 8871 mutex_init(&pf->switch_mutex); 8872 8873 /* If NPAR is enabled nudge the Tx scheduler */ 8874 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) 8875 i40e_set_npar_bw_setting(pf); 8876 8877 sw_init_done: 8878 return err; 8879 } 8880 8881 /** 8882 * i40e_set_ntuple - set the ntuple feature flag and take action 8883 * @pf: board private structure to initialize 8884 * @features: the feature set that the stack is suggesting 8885 * 8886 * returns a bool to indicate if reset needs to happen 8887 **/ 8888 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 8889 { 8890 bool need_reset = false; 8891 8892 /* Check if Flow Director n-tuple support was enabled or disabled. If 8893 * the state changed, we need to reset. 8894 */ 8895 if (features & NETIF_F_NTUPLE) { 8896 /* Enable filters and mark for reset */ 8897 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 8898 need_reset = true; 8899 /* enable FD_SB only if there is MSI-X vector */ 8900 if (pf->num_fdsb_msix > 0) 8901 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8902 } else { 8903 /* turn off filters, mark for reset and clear SW filter list */ 8904 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 8905 need_reset = true; 8906 i40e_fdir_filter_exit(pf); 8907 } 8908 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8909 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 8910 /* reset fd counters */ 8911 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 8912 pf->fdir_pf_active_filters = 0; 8913 /* if ATR was auto disabled it can be re-enabled. */ 8914 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 8915 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 8916 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 8917 if (I40E_DEBUG_FD & pf->hw.debug_mask) 8918 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 8919 } 8920 } 8921 return need_reset; 8922 } 8923 8924 /** 8925 * i40e_clear_rss_lut - clear the rx hash lookup table 8926 * @vsi: the VSI being configured 8927 **/ 8928 static void i40e_clear_rss_lut(struct i40e_vsi *vsi) 8929 { 8930 struct i40e_pf *pf = vsi->back; 8931 struct i40e_hw *hw = &pf->hw; 8932 u16 vf_id = vsi->vf_id; 8933 u8 i; 8934 8935 if (vsi->type == I40E_VSI_MAIN) { 8936 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 8937 wr32(hw, I40E_PFQF_HLUT(i), 0); 8938 } else if (vsi->type == I40E_VSI_SRIOV) { 8939 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 8940 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0); 8941 } else { 8942 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 8943 } 8944 } 8945 8946 /** 8947 * i40e_set_features - set the netdev feature flags 8948 * @netdev: ptr to the netdev being adjusted 8949 * @features: the feature set that the stack is suggesting 8950 **/ 8951 static int i40e_set_features(struct net_device *netdev, 8952 netdev_features_t features) 8953 { 8954 struct i40e_netdev_priv *np = netdev_priv(netdev); 8955 struct i40e_vsi *vsi = np->vsi; 8956 struct i40e_pf *pf = vsi->back; 8957 bool need_reset; 8958 8959 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH)) 8960 i40e_pf_config_rss(pf); 8961 else if (!(features & NETIF_F_RXHASH) && 8962 netdev->features & NETIF_F_RXHASH) 8963 i40e_clear_rss_lut(vsi); 8964 8965 if (features & NETIF_F_HW_VLAN_CTAG_RX) 8966 i40e_vlan_stripping_enable(vsi); 8967 else 8968 i40e_vlan_stripping_disable(vsi); 8969 8970 need_reset = i40e_set_ntuple(pf, features); 8971 8972 if (need_reset) 8973 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 8974 8975 return 0; 8976 } 8977 8978 /** 8979 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port 8980 * @pf: board private structure 8981 * @port: The UDP port to look up 8982 * 8983 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 8984 **/ 8985 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port) 8986 { 8987 u8 i; 8988 8989 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 8990 if (pf->udp_ports[i].index == port) 8991 return i; 8992 } 8993 8994 return i; 8995 } 8996 8997 /** 8998 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up 8999 * @netdev: This physical port's netdev 9000 * @ti: Tunnel endpoint information 9001 **/ 9002 static void i40e_udp_tunnel_add(struct net_device *netdev, 9003 struct udp_tunnel_info *ti) 9004 { 9005 struct i40e_netdev_priv *np = netdev_priv(netdev); 9006 struct i40e_vsi *vsi = np->vsi; 9007 struct i40e_pf *pf = vsi->back; 9008 __be16 port = ti->port; 9009 u8 next_idx; 9010 u8 idx; 9011 9012 idx = i40e_get_udp_port_idx(pf, port); 9013 9014 /* Check if port already exists */ 9015 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 9016 netdev_info(netdev, "port %d already offloaded\n", 9017 ntohs(port)); 9018 return; 9019 } 9020 9021 /* Now check if there is space to add the new port */ 9022 next_idx = i40e_get_udp_port_idx(pf, 0); 9023 9024 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 9025 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n", 9026 ntohs(port)); 9027 return; 9028 } 9029 9030 switch (ti->type) { 9031 case UDP_TUNNEL_TYPE_VXLAN: 9032 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN; 9033 break; 9034 case UDP_TUNNEL_TYPE_GENEVE: 9035 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)) 9036 return; 9037 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE; 9038 break; 9039 default: 9040 return; 9041 } 9042 9043 /* New port: add it and mark its index in the bitmap */ 9044 pf->udp_ports[next_idx].index = port; 9045 pf->pending_udp_bitmap |= BIT_ULL(next_idx); 9046 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 9047 } 9048 9049 /** 9050 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away 9051 * @netdev: This physical port's netdev 9052 * @ti: Tunnel endpoint information 9053 **/ 9054 static void i40e_udp_tunnel_del(struct net_device *netdev, 9055 struct udp_tunnel_info *ti) 9056 { 9057 struct i40e_netdev_priv *np = netdev_priv(netdev); 9058 struct i40e_vsi *vsi = np->vsi; 9059 struct i40e_pf *pf = vsi->back; 9060 __be16 port = ti->port; 9061 u8 idx; 9062 9063 idx = i40e_get_udp_port_idx(pf, port); 9064 9065 /* Check if port already exists */ 9066 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS) 9067 goto not_found; 9068 9069 switch (ti->type) { 9070 case UDP_TUNNEL_TYPE_VXLAN: 9071 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN) 9072 goto not_found; 9073 break; 9074 case UDP_TUNNEL_TYPE_GENEVE: 9075 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE) 9076 goto not_found; 9077 break; 9078 default: 9079 goto not_found; 9080 } 9081 9082 /* if port exists, set it to 0 (mark for deletion) 9083 * and make it pending 9084 */ 9085 pf->udp_ports[idx].index = 0; 9086 pf->pending_udp_bitmap |= BIT_ULL(idx); 9087 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 9088 9089 return; 9090 not_found: 9091 netdev_warn(netdev, "UDP port %d was not found, not deleting\n", 9092 ntohs(port)); 9093 } 9094 9095 static int i40e_get_phys_port_id(struct net_device *netdev, 9096 struct netdev_phys_item_id *ppid) 9097 { 9098 struct i40e_netdev_priv *np = netdev_priv(netdev); 9099 struct i40e_pf *pf = np->vsi->back; 9100 struct i40e_hw *hw = &pf->hw; 9101 9102 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 9103 return -EOPNOTSUPP; 9104 9105 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 9106 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 9107 9108 return 0; 9109 } 9110 9111 /** 9112 * i40e_ndo_fdb_add - add an entry to the hardware database 9113 * @ndm: the input from the stack 9114 * @tb: pointer to array of nladdr (unused) 9115 * @dev: the net device pointer 9116 * @addr: the MAC address entry being added 9117 * @flags: instructions from stack about fdb operation 9118 */ 9119 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 9120 struct net_device *dev, 9121 const unsigned char *addr, u16 vid, 9122 u16 flags) 9123 { 9124 struct i40e_netdev_priv *np = netdev_priv(dev); 9125 struct i40e_pf *pf = np->vsi->back; 9126 int err = 0; 9127 9128 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 9129 return -EOPNOTSUPP; 9130 9131 if (vid) { 9132 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 9133 return -EINVAL; 9134 } 9135 9136 /* Hardware does not support aging addresses so if a 9137 * ndm_state is given only allow permanent addresses 9138 */ 9139 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 9140 netdev_info(dev, "FDB only supports static addresses\n"); 9141 return -EINVAL; 9142 } 9143 9144 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 9145 err = dev_uc_add_excl(dev, addr); 9146 else if (is_multicast_ether_addr(addr)) 9147 err = dev_mc_add_excl(dev, addr); 9148 else 9149 err = -EINVAL; 9150 9151 /* Only return duplicate errors if NLM_F_EXCL is set */ 9152 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 9153 err = 0; 9154 9155 return err; 9156 } 9157 9158 /** 9159 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 9160 * @dev: the netdev being configured 9161 * @nlh: RTNL message 9162 * 9163 * Inserts a new hardware bridge if not already created and 9164 * enables the bridging mode requested (VEB or VEPA). If the 9165 * hardware bridge has already been inserted and the request 9166 * is to change the mode then that requires a PF reset to 9167 * allow rebuild of the components with required hardware 9168 * bridge mode enabled. 9169 **/ 9170 static int i40e_ndo_bridge_setlink(struct net_device *dev, 9171 struct nlmsghdr *nlh, 9172 u16 flags) 9173 { 9174 struct i40e_netdev_priv *np = netdev_priv(dev); 9175 struct i40e_vsi *vsi = np->vsi; 9176 struct i40e_pf *pf = vsi->back; 9177 struct i40e_veb *veb = NULL; 9178 struct nlattr *attr, *br_spec; 9179 int i, rem; 9180 9181 /* Only for PF VSI for now */ 9182 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 9183 return -EOPNOTSUPP; 9184 9185 /* Find the HW bridge for PF VSI */ 9186 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 9187 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 9188 veb = pf->veb[i]; 9189 } 9190 9191 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 9192 9193 nla_for_each_nested(attr, br_spec, rem) { 9194 __u16 mode; 9195 9196 if (nla_type(attr) != IFLA_BRIDGE_MODE) 9197 continue; 9198 9199 mode = nla_get_u16(attr); 9200 if ((mode != BRIDGE_MODE_VEPA) && 9201 (mode != BRIDGE_MODE_VEB)) 9202 return -EINVAL; 9203 9204 /* Insert a new HW bridge */ 9205 if (!veb) { 9206 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 9207 vsi->tc_config.enabled_tc); 9208 if (veb) { 9209 veb->bridge_mode = mode; 9210 i40e_config_bridge_mode(veb); 9211 } else { 9212 /* No Bridge HW offload available */ 9213 return -ENOENT; 9214 } 9215 break; 9216 } else if (mode != veb->bridge_mode) { 9217 /* Existing HW bridge but different mode needs reset */ 9218 veb->bridge_mode = mode; 9219 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 9220 if (mode == BRIDGE_MODE_VEB) 9221 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 9222 else 9223 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 9224 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 9225 break; 9226 } 9227 } 9228 9229 return 0; 9230 } 9231 9232 /** 9233 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 9234 * @skb: skb buff 9235 * @pid: process id 9236 * @seq: RTNL message seq # 9237 * @dev: the netdev being configured 9238 * @filter_mask: unused 9239 * @nlflags: netlink flags passed in 9240 * 9241 * Return the mode in which the hardware bridge is operating in 9242 * i.e VEB or VEPA. 9243 **/ 9244 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 9245 struct net_device *dev, 9246 u32 __always_unused filter_mask, 9247 int nlflags) 9248 { 9249 struct i40e_netdev_priv *np = netdev_priv(dev); 9250 struct i40e_vsi *vsi = np->vsi; 9251 struct i40e_pf *pf = vsi->back; 9252 struct i40e_veb *veb = NULL; 9253 int i; 9254 9255 /* Only for PF VSI for now */ 9256 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 9257 return -EOPNOTSUPP; 9258 9259 /* Find the HW bridge for the PF VSI */ 9260 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 9261 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 9262 veb = pf->veb[i]; 9263 } 9264 9265 if (!veb) 9266 return 0; 9267 9268 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 9269 0, 0, nlflags, filter_mask, NULL); 9270 } 9271 9272 /** 9273 * i40e_features_check - Validate encapsulated packet conforms to limits 9274 * @skb: skb buff 9275 * @dev: This physical port's netdev 9276 * @features: Offload features that the stack believes apply 9277 **/ 9278 static netdev_features_t i40e_features_check(struct sk_buff *skb, 9279 struct net_device *dev, 9280 netdev_features_t features) 9281 { 9282 size_t len; 9283 9284 /* No point in doing any of this if neither checksum nor GSO are 9285 * being requested for this frame. We can rule out both by just 9286 * checking for CHECKSUM_PARTIAL 9287 */ 9288 if (skb->ip_summed != CHECKSUM_PARTIAL) 9289 return features; 9290 9291 /* We cannot support GSO if the MSS is going to be less than 9292 * 64 bytes. If it is then we need to drop support for GSO. 9293 */ 9294 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64)) 9295 features &= ~NETIF_F_GSO_MASK; 9296 9297 /* MACLEN can support at most 63 words */ 9298 len = skb_network_header(skb) - skb->data; 9299 if (len & ~(63 * 2)) 9300 goto out_err; 9301 9302 /* IPLEN and EIPLEN can support at most 127 dwords */ 9303 len = skb_transport_header(skb) - skb_network_header(skb); 9304 if (len & ~(127 * 4)) 9305 goto out_err; 9306 9307 if (skb->encapsulation) { 9308 /* L4TUNLEN can support 127 words */ 9309 len = skb_inner_network_header(skb) - skb_transport_header(skb); 9310 if (len & ~(127 * 2)) 9311 goto out_err; 9312 9313 /* IPLEN can support at most 127 dwords */ 9314 len = skb_inner_transport_header(skb) - 9315 skb_inner_network_header(skb); 9316 if (len & ~(127 * 4)) 9317 goto out_err; 9318 } 9319 9320 /* No need to validate L4LEN as TCP is the only protocol with a 9321 * a flexible value and we support all possible values supported 9322 * by TCP, which is at most 15 dwords 9323 */ 9324 9325 return features; 9326 out_err: 9327 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 9328 } 9329 9330 static const struct net_device_ops i40e_netdev_ops = { 9331 .ndo_open = i40e_open, 9332 .ndo_stop = i40e_close, 9333 .ndo_start_xmit = i40e_lan_xmit_frame, 9334 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 9335 .ndo_set_rx_mode = i40e_set_rx_mode, 9336 .ndo_validate_addr = eth_validate_addr, 9337 .ndo_set_mac_address = i40e_set_mac, 9338 .ndo_change_mtu = i40e_change_mtu, 9339 .ndo_do_ioctl = i40e_ioctl, 9340 .ndo_tx_timeout = i40e_tx_timeout, 9341 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 9342 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 9343 #ifdef CONFIG_NET_POLL_CONTROLLER 9344 .ndo_poll_controller = i40e_netpoll, 9345 #endif 9346 .ndo_setup_tc = __i40e_setup_tc, 9347 #ifdef I40E_FCOE 9348 .ndo_fcoe_enable = i40e_fcoe_enable, 9349 .ndo_fcoe_disable = i40e_fcoe_disable, 9350 #endif 9351 .ndo_set_features = i40e_set_features, 9352 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 9353 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 9354 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 9355 .ndo_get_vf_config = i40e_ndo_get_vf_config, 9356 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 9357 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 9358 .ndo_set_vf_trust = i40e_ndo_set_vf_trust, 9359 .ndo_udp_tunnel_add = i40e_udp_tunnel_add, 9360 .ndo_udp_tunnel_del = i40e_udp_tunnel_del, 9361 .ndo_get_phys_port_id = i40e_get_phys_port_id, 9362 .ndo_fdb_add = i40e_ndo_fdb_add, 9363 .ndo_features_check = i40e_features_check, 9364 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 9365 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 9366 }; 9367 9368 /** 9369 * i40e_config_netdev - Setup the netdev flags 9370 * @vsi: the VSI being configured 9371 * 9372 * Returns 0 on success, negative value on failure 9373 **/ 9374 static int i40e_config_netdev(struct i40e_vsi *vsi) 9375 { 9376 struct i40e_pf *pf = vsi->back; 9377 struct i40e_hw *hw = &pf->hw; 9378 struct i40e_netdev_priv *np; 9379 struct net_device *netdev; 9380 u8 broadcast[ETH_ALEN]; 9381 u8 mac_addr[ETH_ALEN]; 9382 int etherdev_size; 9383 9384 etherdev_size = sizeof(struct i40e_netdev_priv); 9385 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 9386 if (!netdev) 9387 return -ENOMEM; 9388 9389 vsi->netdev = netdev; 9390 np = netdev_priv(netdev); 9391 np->vsi = vsi; 9392 9393 netdev->hw_enc_features |= NETIF_F_SG | 9394 NETIF_F_IP_CSUM | 9395 NETIF_F_IPV6_CSUM | 9396 NETIF_F_HIGHDMA | 9397 NETIF_F_SOFT_FEATURES | 9398 NETIF_F_TSO | 9399 NETIF_F_TSO_ECN | 9400 NETIF_F_TSO6 | 9401 NETIF_F_GSO_GRE | 9402 NETIF_F_GSO_GRE_CSUM | 9403 NETIF_F_GSO_IPXIP4 | 9404 NETIF_F_GSO_IPXIP6 | 9405 NETIF_F_GSO_UDP_TUNNEL | 9406 NETIF_F_GSO_UDP_TUNNEL_CSUM | 9407 NETIF_F_GSO_PARTIAL | 9408 NETIF_F_SCTP_CRC | 9409 NETIF_F_RXHASH | 9410 NETIF_F_RXCSUM | 9411 0; 9412 9413 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)) 9414 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; 9415 9416 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; 9417 9418 /* record features VLANs can make use of */ 9419 netdev->vlan_features |= netdev->hw_enc_features | 9420 NETIF_F_TSO_MANGLEID; 9421 9422 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 9423 netdev->hw_features |= NETIF_F_NTUPLE; 9424 9425 netdev->hw_features |= netdev->hw_enc_features | 9426 NETIF_F_HW_VLAN_CTAG_TX | 9427 NETIF_F_HW_VLAN_CTAG_RX; 9428 9429 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER; 9430 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; 9431 9432 if (vsi->type == I40E_VSI_MAIN) { 9433 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 9434 ether_addr_copy(mac_addr, hw->mac.perm_addr); 9435 /* The following steps are necessary to prevent reception 9436 * of tagged packets - some older NVM configurations load a 9437 * default a MAC-VLAN filter that accepts any tagged packet 9438 * which must be replaced by a normal filter. 9439 */ 9440 i40e_rm_default_mac_filter(vsi, mac_addr); 9441 spin_lock_bh(&vsi->mac_filter_hash_lock); 9442 i40e_add_mac_filter(vsi, mac_addr); 9443 spin_unlock_bh(&vsi->mac_filter_hash_lock); 9444 } else { 9445 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 9446 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 9447 pf->vsi[pf->lan_vsi]->netdev->name); 9448 random_ether_addr(mac_addr); 9449 9450 spin_lock_bh(&vsi->mac_filter_hash_lock); 9451 i40e_add_mac_filter(vsi, mac_addr); 9452 spin_unlock_bh(&vsi->mac_filter_hash_lock); 9453 } 9454 9455 /* Add the broadcast filter so that we initially will receive 9456 * broadcast packets. Note that when a new VLAN is first added the 9457 * driver will convert all filters marked I40E_VLAN_ANY into VLAN 9458 * specific filters as part of transitioning into "vlan" operation. 9459 * When more VLANs are added, the driver will copy each existing MAC 9460 * filter and add it for the new VLAN. 9461 * 9462 * Broadcast filters are handled specially by 9463 * i40e_sync_filters_subtask, as the driver must to set the broadcast 9464 * promiscuous bit instead of adding this directly as a MAC/VLAN 9465 * filter. The subtask will update the correct broadcast promiscuous 9466 * bits as VLANs become active or inactive. 9467 */ 9468 eth_broadcast_addr(broadcast); 9469 spin_lock_bh(&vsi->mac_filter_hash_lock); 9470 i40e_add_mac_filter(vsi, broadcast); 9471 spin_unlock_bh(&vsi->mac_filter_hash_lock); 9472 9473 ether_addr_copy(netdev->dev_addr, mac_addr); 9474 ether_addr_copy(netdev->perm_addr, mac_addr); 9475 9476 netdev->priv_flags |= IFF_UNICAST_FLT; 9477 netdev->priv_flags |= IFF_SUPP_NOFCS; 9478 /* Setup netdev TC information */ 9479 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 9480 9481 netdev->netdev_ops = &i40e_netdev_ops; 9482 netdev->watchdog_timeo = 5 * HZ; 9483 i40e_set_ethtool_ops(netdev); 9484 #ifdef I40E_FCOE 9485 i40e_fcoe_config_netdev(netdev, vsi); 9486 #endif 9487 9488 /* MTU range: 68 - 9706 */ 9489 netdev->min_mtu = ETH_MIN_MTU; 9490 netdev->max_mtu = I40E_MAX_RXBUFFER - 9491 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 9492 9493 return 0; 9494 } 9495 9496 /** 9497 * i40e_vsi_delete - Delete a VSI from the switch 9498 * @vsi: the VSI being removed 9499 * 9500 * Returns 0 on success, negative value on failure 9501 **/ 9502 static void i40e_vsi_delete(struct i40e_vsi *vsi) 9503 { 9504 /* remove default VSI is not allowed */ 9505 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 9506 return; 9507 9508 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 9509 } 9510 9511 /** 9512 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 9513 * @vsi: the VSI being queried 9514 * 9515 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 9516 **/ 9517 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 9518 { 9519 struct i40e_veb *veb; 9520 struct i40e_pf *pf = vsi->back; 9521 9522 /* Uplink is not a bridge so default to VEB */ 9523 if (vsi->veb_idx == I40E_NO_VEB) 9524 return 1; 9525 9526 veb = pf->veb[vsi->veb_idx]; 9527 if (!veb) { 9528 dev_info(&pf->pdev->dev, 9529 "There is no veb associated with the bridge\n"); 9530 return -ENOENT; 9531 } 9532 9533 /* Uplink is a bridge in VEPA mode */ 9534 if (veb->bridge_mode & BRIDGE_MODE_VEPA) { 9535 return 0; 9536 } else { 9537 /* Uplink is a bridge in VEB mode */ 9538 return 1; 9539 } 9540 9541 /* VEPA is now default bridge, so return 0 */ 9542 return 0; 9543 } 9544 9545 /** 9546 * i40e_add_vsi - Add a VSI to the switch 9547 * @vsi: the VSI being configured 9548 * 9549 * This initializes a VSI context depending on the VSI type to be added and 9550 * passes it down to the add_vsi aq command. 9551 **/ 9552 static int i40e_add_vsi(struct i40e_vsi *vsi) 9553 { 9554 int ret = -ENODEV; 9555 struct i40e_pf *pf = vsi->back; 9556 struct i40e_hw *hw = &pf->hw; 9557 struct i40e_vsi_context ctxt; 9558 struct i40e_mac_filter *f; 9559 struct hlist_node *h; 9560 int bkt; 9561 9562 u8 enabled_tc = 0x1; /* TC0 enabled */ 9563 int f_count = 0; 9564 9565 memset(&ctxt, 0, sizeof(ctxt)); 9566 switch (vsi->type) { 9567 case I40E_VSI_MAIN: 9568 /* The PF's main VSI is already setup as part of the 9569 * device initialization, so we'll not bother with 9570 * the add_vsi call, but we will retrieve the current 9571 * VSI context. 9572 */ 9573 ctxt.seid = pf->main_vsi_seid; 9574 ctxt.pf_num = pf->hw.pf_id; 9575 ctxt.vf_num = 0; 9576 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 9577 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9578 if (ret) { 9579 dev_info(&pf->pdev->dev, 9580 "couldn't get PF vsi config, err %s aq_err %s\n", 9581 i40e_stat_str(&pf->hw, ret), 9582 i40e_aq_str(&pf->hw, 9583 pf->hw.aq.asq_last_status)); 9584 return -ENOENT; 9585 } 9586 vsi->info = ctxt.info; 9587 vsi->info.valid_sections = 0; 9588 9589 vsi->seid = ctxt.seid; 9590 vsi->id = ctxt.vsi_number; 9591 9592 enabled_tc = i40e_pf_get_tc_map(pf); 9593 9594 /* MFP mode setup queue map and update VSI */ 9595 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 9596 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 9597 memset(&ctxt, 0, sizeof(ctxt)); 9598 ctxt.seid = pf->main_vsi_seid; 9599 ctxt.pf_num = pf->hw.pf_id; 9600 ctxt.vf_num = 0; 9601 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 9602 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 9603 if (ret) { 9604 dev_info(&pf->pdev->dev, 9605 "update vsi failed, err %s aq_err %s\n", 9606 i40e_stat_str(&pf->hw, ret), 9607 i40e_aq_str(&pf->hw, 9608 pf->hw.aq.asq_last_status)); 9609 ret = -ENOENT; 9610 goto err; 9611 } 9612 /* update the local VSI info queue map */ 9613 i40e_vsi_update_queue_map(vsi, &ctxt); 9614 vsi->info.valid_sections = 0; 9615 } else { 9616 /* Default/Main VSI is only enabled for TC0 9617 * reconfigure it to enable all TCs that are 9618 * available on the port in SFP mode. 9619 * For MFP case the iSCSI PF would use this 9620 * flow to enable LAN+iSCSI TC. 9621 */ 9622 ret = i40e_vsi_config_tc(vsi, enabled_tc); 9623 if (ret) { 9624 dev_info(&pf->pdev->dev, 9625 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", 9626 enabled_tc, 9627 i40e_stat_str(&pf->hw, ret), 9628 i40e_aq_str(&pf->hw, 9629 pf->hw.aq.asq_last_status)); 9630 ret = -ENOENT; 9631 } 9632 } 9633 break; 9634 9635 case I40E_VSI_FDIR: 9636 ctxt.pf_num = hw->pf_id; 9637 ctxt.vf_num = 0; 9638 ctxt.uplink_seid = vsi->uplink_seid; 9639 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9640 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9641 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 9642 (i40e_is_vsi_uplink_mode_veb(vsi))) { 9643 ctxt.info.valid_sections |= 9644 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9645 ctxt.info.switch_id = 9646 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9647 } 9648 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9649 break; 9650 9651 case I40E_VSI_VMDQ2: 9652 ctxt.pf_num = hw->pf_id; 9653 ctxt.vf_num = 0; 9654 ctxt.uplink_seid = vsi->uplink_seid; 9655 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9656 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 9657 9658 /* This VSI is connected to VEB so the switch_id 9659 * should be set to zero by default. 9660 */ 9661 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 9662 ctxt.info.valid_sections |= 9663 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9664 ctxt.info.switch_id = 9665 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9666 } 9667 9668 /* Setup the VSI tx/rx queue map for TC0 only for now */ 9669 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9670 break; 9671 9672 case I40E_VSI_SRIOV: 9673 ctxt.pf_num = hw->pf_id; 9674 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 9675 ctxt.uplink_seid = vsi->uplink_seid; 9676 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9677 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 9678 9679 /* This VSI is connected to VEB so the switch_id 9680 * should be set to zero by default. 9681 */ 9682 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 9683 ctxt.info.valid_sections |= 9684 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9685 ctxt.info.switch_id = 9686 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9687 } 9688 9689 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 9690 ctxt.info.valid_sections |= 9691 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 9692 ctxt.info.queueing_opt_flags |= 9693 (I40E_AQ_VSI_QUE_OPT_TCP_ENA | 9694 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI); 9695 } 9696 9697 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 9698 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 9699 if (pf->vf[vsi->vf_id].spoofchk) { 9700 ctxt.info.valid_sections |= 9701 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 9702 ctxt.info.sec_flags |= 9703 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 9704 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 9705 } 9706 /* Setup the VSI tx/rx queue map for TC0 only for now */ 9707 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9708 break; 9709 9710 #ifdef I40E_FCOE 9711 case I40E_VSI_FCOE: 9712 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 9713 if (ret) { 9714 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 9715 return ret; 9716 } 9717 break; 9718 9719 #endif /* I40E_FCOE */ 9720 case I40E_VSI_IWARP: 9721 /* send down message to iWARP */ 9722 break; 9723 9724 default: 9725 return -ENODEV; 9726 } 9727 9728 if (vsi->type != I40E_VSI_MAIN) { 9729 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 9730 if (ret) { 9731 dev_info(&vsi->back->pdev->dev, 9732 "add vsi failed, err %s aq_err %s\n", 9733 i40e_stat_str(&pf->hw, ret), 9734 i40e_aq_str(&pf->hw, 9735 pf->hw.aq.asq_last_status)); 9736 ret = -ENOENT; 9737 goto err; 9738 } 9739 vsi->info = ctxt.info; 9740 vsi->info.valid_sections = 0; 9741 vsi->seid = ctxt.seid; 9742 vsi->id = ctxt.vsi_number; 9743 } 9744 9745 vsi->active_filters = 0; 9746 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state); 9747 spin_lock_bh(&vsi->mac_filter_hash_lock); 9748 /* If macvlan filters already exist, force them to get loaded */ 9749 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 9750 f->state = I40E_FILTER_NEW; 9751 f_count++; 9752 } 9753 spin_unlock_bh(&vsi->mac_filter_hash_lock); 9754 9755 if (f_count) { 9756 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 9757 pf->flags |= I40E_FLAG_FILTER_SYNC; 9758 } 9759 9760 /* Update VSI BW information */ 9761 ret = i40e_vsi_get_bw_info(vsi); 9762 if (ret) { 9763 dev_info(&pf->pdev->dev, 9764 "couldn't get vsi bw info, err %s aq_err %s\n", 9765 i40e_stat_str(&pf->hw, ret), 9766 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9767 /* VSI is already added so not tearing that up */ 9768 ret = 0; 9769 } 9770 9771 err: 9772 return ret; 9773 } 9774 9775 /** 9776 * i40e_vsi_release - Delete a VSI and free its resources 9777 * @vsi: the VSI being removed 9778 * 9779 * Returns 0 on success or < 0 on error 9780 **/ 9781 int i40e_vsi_release(struct i40e_vsi *vsi) 9782 { 9783 struct i40e_mac_filter *f; 9784 struct hlist_node *h; 9785 struct i40e_veb *veb = NULL; 9786 struct i40e_pf *pf; 9787 u16 uplink_seid; 9788 int i, n, bkt; 9789 9790 pf = vsi->back; 9791 9792 /* release of a VEB-owner or last VSI is not allowed */ 9793 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 9794 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 9795 vsi->seid, vsi->uplink_seid); 9796 return -ENODEV; 9797 } 9798 if (vsi == pf->vsi[pf->lan_vsi] && 9799 !test_bit(__I40E_DOWN, &pf->state)) { 9800 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 9801 return -ENODEV; 9802 } 9803 9804 uplink_seid = vsi->uplink_seid; 9805 if (vsi->type != I40E_VSI_SRIOV) { 9806 if (vsi->netdev_registered) { 9807 vsi->netdev_registered = false; 9808 if (vsi->netdev) { 9809 /* results in a call to i40e_close() */ 9810 unregister_netdev(vsi->netdev); 9811 } 9812 } else { 9813 i40e_vsi_close(vsi); 9814 } 9815 i40e_vsi_disable_irq(vsi); 9816 } 9817 9818 spin_lock_bh(&vsi->mac_filter_hash_lock); 9819 9820 /* clear the sync flag on all filters */ 9821 if (vsi->netdev) { 9822 __dev_uc_unsync(vsi->netdev, NULL); 9823 __dev_mc_unsync(vsi->netdev, NULL); 9824 } 9825 9826 /* make sure any remaining filters are marked for deletion */ 9827 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) 9828 __i40e_del_filter(vsi, f); 9829 9830 spin_unlock_bh(&vsi->mac_filter_hash_lock); 9831 9832 i40e_sync_vsi_filters(vsi); 9833 9834 i40e_vsi_delete(vsi); 9835 i40e_vsi_free_q_vectors(vsi); 9836 if (vsi->netdev) { 9837 free_netdev(vsi->netdev); 9838 vsi->netdev = NULL; 9839 } 9840 i40e_vsi_clear_rings(vsi); 9841 i40e_vsi_clear(vsi); 9842 9843 /* If this was the last thing on the VEB, except for the 9844 * controlling VSI, remove the VEB, which puts the controlling 9845 * VSI onto the next level down in the switch. 9846 * 9847 * Well, okay, there's one more exception here: don't remove 9848 * the orphan VEBs yet. We'll wait for an explicit remove request 9849 * from up the network stack. 9850 */ 9851 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 9852 if (pf->vsi[i] && 9853 pf->vsi[i]->uplink_seid == uplink_seid && 9854 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 9855 n++; /* count the VSIs */ 9856 } 9857 } 9858 for (i = 0; i < I40E_MAX_VEB; i++) { 9859 if (!pf->veb[i]) 9860 continue; 9861 if (pf->veb[i]->uplink_seid == uplink_seid) 9862 n++; /* count the VEBs */ 9863 if (pf->veb[i]->seid == uplink_seid) 9864 veb = pf->veb[i]; 9865 } 9866 if (n == 0 && veb && veb->uplink_seid != 0) 9867 i40e_veb_release(veb); 9868 9869 return 0; 9870 } 9871 9872 /** 9873 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 9874 * @vsi: ptr to the VSI 9875 * 9876 * This should only be called after i40e_vsi_mem_alloc() which allocates the 9877 * corresponding SW VSI structure and initializes num_queue_pairs for the 9878 * newly allocated VSI. 9879 * 9880 * Returns 0 on success or negative on failure 9881 **/ 9882 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 9883 { 9884 int ret = -ENOENT; 9885 struct i40e_pf *pf = vsi->back; 9886 9887 if (vsi->q_vectors[0]) { 9888 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 9889 vsi->seid); 9890 return -EEXIST; 9891 } 9892 9893 if (vsi->base_vector) { 9894 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 9895 vsi->seid, vsi->base_vector); 9896 return -EEXIST; 9897 } 9898 9899 ret = i40e_vsi_alloc_q_vectors(vsi); 9900 if (ret) { 9901 dev_info(&pf->pdev->dev, 9902 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 9903 vsi->num_q_vectors, vsi->seid, ret); 9904 vsi->num_q_vectors = 0; 9905 goto vector_setup_out; 9906 } 9907 9908 /* In Legacy mode, we do not have to get any other vector since we 9909 * piggyback on the misc/ICR0 for queue interrupts. 9910 */ 9911 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 9912 return ret; 9913 if (vsi->num_q_vectors) 9914 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 9915 vsi->num_q_vectors, vsi->idx); 9916 if (vsi->base_vector < 0) { 9917 dev_info(&pf->pdev->dev, 9918 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 9919 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 9920 i40e_vsi_free_q_vectors(vsi); 9921 ret = -ENOENT; 9922 goto vector_setup_out; 9923 } 9924 9925 vector_setup_out: 9926 return ret; 9927 } 9928 9929 /** 9930 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 9931 * @vsi: pointer to the vsi. 9932 * 9933 * This re-allocates a vsi's queue resources. 9934 * 9935 * Returns pointer to the successfully allocated and configured VSI sw struct 9936 * on success, otherwise returns NULL on failure. 9937 **/ 9938 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 9939 { 9940 struct i40e_pf *pf; 9941 u8 enabled_tc; 9942 int ret; 9943 9944 if (!vsi) 9945 return NULL; 9946 9947 pf = vsi->back; 9948 9949 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 9950 i40e_vsi_clear_rings(vsi); 9951 9952 i40e_vsi_free_arrays(vsi, false); 9953 i40e_set_num_rings_in_vsi(vsi); 9954 ret = i40e_vsi_alloc_arrays(vsi, false); 9955 if (ret) 9956 goto err_vsi; 9957 9958 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 9959 if (ret < 0) { 9960 dev_info(&pf->pdev->dev, 9961 "failed to get tracking for %d queues for VSI %d err %d\n", 9962 vsi->alloc_queue_pairs, vsi->seid, ret); 9963 goto err_vsi; 9964 } 9965 vsi->base_queue = ret; 9966 9967 /* Update the FW view of the VSI. Force a reset of TC and queue 9968 * layout configurations. 9969 */ 9970 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 9971 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 9972 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 9973 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 9974 if (vsi->type == I40E_VSI_MAIN) 9975 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr); 9976 9977 /* assign it some queues */ 9978 ret = i40e_alloc_rings(vsi); 9979 if (ret) 9980 goto err_rings; 9981 9982 /* map all of the rings to the q_vectors */ 9983 i40e_vsi_map_rings_to_vectors(vsi); 9984 return vsi; 9985 9986 err_rings: 9987 i40e_vsi_free_q_vectors(vsi); 9988 if (vsi->netdev_registered) { 9989 vsi->netdev_registered = false; 9990 unregister_netdev(vsi->netdev); 9991 free_netdev(vsi->netdev); 9992 vsi->netdev = NULL; 9993 } 9994 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 9995 err_vsi: 9996 i40e_vsi_clear(vsi); 9997 return NULL; 9998 } 9999 10000 /** 10001 * i40e_vsi_setup - Set up a VSI by a given type 10002 * @pf: board private structure 10003 * @type: VSI type 10004 * @uplink_seid: the switch element to link to 10005 * @param1: usage depends upon VSI type. For VF types, indicates VF id 10006 * 10007 * This allocates the sw VSI structure and its queue resources, then add a VSI 10008 * to the identified VEB. 10009 * 10010 * Returns pointer to the successfully allocated and configure VSI sw struct on 10011 * success, otherwise returns NULL on failure. 10012 **/ 10013 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 10014 u16 uplink_seid, u32 param1) 10015 { 10016 struct i40e_vsi *vsi = NULL; 10017 struct i40e_veb *veb = NULL; 10018 int ret, i; 10019 int v_idx; 10020 10021 /* The requested uplink_seid must be either 10022 * - the PF's port seid 10023 * no VEB is needed because this is the PF 10024 * or this is a Flow Director special case VSI 10025 * - seid of an existing VEB 10026 * - seid of a VSI that owns an existing VEB 10027 * - seid of a VSI that doesn't own a VEB 10028 * a new VEB is created and the VSI becomes the owner 10029 * - seid of the PF VSI, which is what creates the first VEB 10030 * this is a special case of the previous 10031 * 10032 * Find which uplink_seid we were given and create a new VEB if needed 10033 */ 10034 for (i = 0; i < I40E_MAX_VEB; i++) { 10035 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 10036 veb = pf->veb[i]; 10037 break; 10038 } 10039 } 10040 10041 if (!veb && uplink_seid != pf->mac_seid) { 10042 10043 for (i = 0; i < pf->num_alloc_vsi; i++) { 10044 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 10045 vsi = pf->vsi[i]; 10046 break; 10047 } 10048 } 10049 if (!vsi) { 10050 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 10051 uplink_seid); 10052 return NULL; 10053 } 10054 10055 if (vsi->uplink_seid == pf->mac_seid) 10056 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 10057 vsi->tc_config.enabled_tc); 10058 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 10059 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 10060 vsi->tc_config.enabled_tc); 10061 if (veb) { 10062 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 10063 dev_info(&vsi->back->pdev->dev, 10064 "New VSI creation error, uplink seid of LAN VSI expected.\n"); 10065 return NULL; 10066 } 10067 /* We come up by default in VEPA mode if SRIOV is not 10068 * already enabled, in which case we can't force VEPA 10069 * mode. 10070 */ 10071 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 10072 veb->bridge_mode = BRIDGE_MODE_VEPA; 10073 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 10074 } 10075 i40e_config_bridge_mode(veb); 10076 } 10077 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 10078 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 10079 veb = pf->veb[i]; 10080 } 10081 if (!veb) { 10082 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 10083 return NULL; 10084 } 10085 10086 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 10087 uplink_seid = veb->seid; 10088 } 10089 10090 /* get vsi sw struct */ 10091 v_idx = i40e_vsi_mem_alloc(pf, type); 10092 if (v_idx < 0) 10093 goto err_alloc; 10094 vsi = pf->vsi[v_idx]; 10095 if (!vsi) 10096 goto err_alloc; 10097 vsi->type = type; 10098 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 10099 10100 if (type == I40E_VSI_MAIN) 10101 pf->lan_vsi = v_idx; 10102 else if (type == I40E_VSI_SRIOV) 10103 vsi->vf_id = param1; 10104 /* assign it some queues */ 10105 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 10106 vsi->idx); 10107 if (ret < 0) { 10108 dev_info(&pf->pdev->dev, 10109 "failed to get tracking for %d queues for VSI %d err=%d\n", 10110 vsi->alloc_queue_pairs, vsi->seid, ret); 10111 goto err_vsi; 10112 } 10113 vsi->base_queue = ret; 10114 10115 /* get a VSI from the hardware */ 10116 vsi->uplink_seid = uplink_seid; 10117 ret = i40e_add_vsi(vsi); 10118 if (ret) 10119 goto err_vsi; 10120 10121 switch (vsi->type) { 10122 /* setup the netdev if needed */ 10123 case I40E_VSI_MAIN: 10124 /* Apply relevant filters if a platform-specific mac 10125 * address was selected. 10126 */ 10127 if (!!(pf->flags & I40E_FLAG_PF_MAC)) { 10128 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr); 10129 if (ret) { 10130 dev_warn(&pf->pdev->dev, 10131 "could not set up macaddr; err %d\n", 10132 ret); 10133 } 10134 } 10135 case I40E_VSI_VMDQ2: 10136 case I40E_VSI_FCOE: 10137 ret = i40e_config_netdev(vsi); 10138 if (ret) 10139 goto err_netdev; 10140 ret = register_netdev(vsi->netdev); 10141 if (ret) 10142 goto err_netdev; 10143 vsi->netdev_registered = true; 10144 netif_carrier_off(vsi->netdev); 10145 #ifdef CONFIG_I40E_DCB 10146 /* Setup DCB netlink interface */ 10147 i40e_dcbnl_setup(vsi); 10148 #endif /* CONFIG_I40E_DCB */ 10149 /* fall through */ 10150 10151 case I40E_VSI_FDIR: 10152 /* set up vectors and rings if needed */ 10153 ret = i40e_vsi_setup_vectors(vsi); 10154 if (ret) 10155 goto err_msix; 10156 10157 ret = i40e_alloc_rings(vsi); 10158 if (ret) 10159 goto err_rings; 10160 10161 /* map all of the rings to the q_vectors */ 10162 i40e_vsi_map_rings_to_vectors(vsi); 10163 10164 i40e_vsi_reset_stats(vsi); 10165 break; 10166 10167 default: 10168 /* no netdev or rings for the other VSI types */ 10169 break; 10170 } 10171 10172 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) && 10173 (vsi->type == I40E_VSI_VMDQ2)) { 10174 ret = i40e_vsi_config_rss(vsi); 10175 } 10176 return vsi; 10177 10178 err_rings: 10179 i40e_vsi_free_q_vectors(vsi); 10180 err_msix: 10181 if (vsi->netdev_registered) { 10182 vsi->netdev_registered = false; 10183 unregister_netdev(vsi->netdev); 10184 free_netdev(vsi->netdev); 10185 vsi->netdev = NULL; 10186 } 10187 err_netdev: 10188 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 10189 err_vsi: 10190 i40e_vsi_clear(vsi); 10191 err_alloc: 10192 return NULL; 10193 } 10194 10195 /** 10196 * i40e_veb_get_bw_info - Query VEB BW information 10197 * @veb: the veb to query 10198 * 10199 * Query the Tx scheduler BW configuration data for given VEB 10200 **/ 10201 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 10202 { 10203 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 10204 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 10205 struct i40e_pf *pf = veb->pf; 10206 struct i40e_hw *hw = &pf->hw; 10207 u32 tc_bw_max; 10208 int ret = 0; 10209 int i; 10210 10211 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 10212 &bw_data, NULL); 10213 if (ret) { 10214 dev_info(&pf->pdev->dev, 10215 "query veb bw config failed, err %s aq_err %s\n", 10216 i40e_stat_str(&pf->hw, ret), 10217 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 10218 goto out; 10219 } 10220 10221 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 10222 &ets_data, NULL); 10223 if (ret) { 10224 dev_info(&pf->pdev->dev, 10225 "query veb bw ets config failed, err %s aq_err %s\n", 10226 i40e_stat_str(&pf->hw, ret), 10227 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 10228 goto out; 10229 } 10230 10231 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 10232 veb->bw_max_quanta = ets_data.tc_bw_max; 10233 veb->is_abs_credits = bw_data.absolute_credits_enable; 10234 veb->enabled_tc = ets_data.tc_valid_bits; 10235 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 10236 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 10237 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 10238 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 10239 veb->bw_tc_limit_credits[i] = 10240 le16_to_cpu(bw_data.tc_bw_limits[i]); 10241 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 10242 } 10243 10244 out: 10245 return ret; 10246 } 10247 10248 /** 10249 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 10250 * @pf: board private structure 10251 * 10252 * On error: returns error code (negative) 10253 * On success: returns vsi index in PF (positive) 10254 **/ 10255 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 10256 { 10257 int ret = -ENOENT; 10258 struct i40e_veb *veb; 10259 int i; 10260 10261 /* Need to protect the allocation of switch elements at the PF level */ 10262 mutex_lock(&pf->switch_mutex); 10263 10264 /* VEB list may be fragmented if VEB creation/destruction has 10265 * been happening. We can afford to do a quick scan to look 10266 * for any free slots in the list. 10267 * 10268 * find next empty veb slot, looping back around if necessary 10269 */ 10270 i = 0; 10271 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 10272 i++; 10273 if (i >= I40E_MAX_VEB) { 10274 ret = -ENOMEM; 10275 goto err_alloc_veb; /* out of VEB slots! */ 10276 } 10277 10278 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 10279 if (!veb) { 10280 ret = -ENOMEM; 10281 goto err_alloc_veb; 10282 } 10283 veb->pf = pf; 10284 veb->idx = i; 10285 veb->enabled_tc = 1; 10286 10287 pf->veb[i] = veb; 10288 ret = i; 10289 err_alloc_veb: 10290 mutex_unlock(&pf->switch_mutex); 10291 return ret; 10292 } 10293 10294 /** 10295 * i40e_switch_branch_release - Delete a branch of the switch tree 10296 * @branch: where to start deleting 10297 * 10298 * This uses recursion to find the tips of the branch to be 10299 * removed, deleting until we get back to and can delete this VEB. 10300 **/ 10301 static void i40e_switch_branch_release(struct i40e_veb *branch) 10302 { 10303 struct i40e_pf *pf = branch->pf; 10304 u16 branch_seid = branch->seid; 10305 u16 veb_idx = branch->idx; 10306 int i; 10307 10308 /* release any VEBs on this VEB - RECURSION */ 10309 for (i = 0; i < I40E_MAX_VEB; i++) { 10310 if (!pf->veb[i]) 10311 continue; 10312 if (pf->veb[i]->uplink_seid == branch->seid) 10313 i40e_switch_branch_release(pf->veb[i]); 10314 } 10315 10316 /* Release the VSIs on this VEB, but not the owner VSI. 10317 * 10318 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 10319 * the VEB itself, so don't use (*branch) after this loop. 10320 */ 10321 for (i = 0; i < pf->num_alloc_vsi; i++) { 10322 if (!pf->vsi[i]) 10323 continue; 10324 if (pf->vsi[i]->uplink_seid == branch_seid && 10325 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 10326 i40e_vsi_release(pf->vsi[i]); 10327 } 10328 } 10329 10330 /* There's one corner case where the VEB might not have been 10331 * removed, so double check it here and remove it if needed. 10332 * This case happens if the veb was created from the debugfs 10333 * commands and no VSIs were added to it. 10334 */ 10335 if (pf->veb[veb_idx]) 10336 i40e_veb_release(pf->veb[veb_idx]); 10337 } 10338 10339 /** 10340 * i40e_veb_clear - remove veb struct 10341 * @veb: the veb to remove 10342 **/ 10343 static void i40e_veb_clear(struct i40e_veb *veb) 10344 { 10345 if (!veb) 10346 return; 10347 10348 if (veb->pf) { 10349 struct i40e_pf *pf = veb->pf; 10350 10351 mutex_lock(&pf->switch_mutex); 10352 if (pf->veb[veb->idx] == veb) 10353 pf->veb[veb->idx] = NULL; 10354 mutex_unlock(&pf->switch_mutex); 10355 } 10356 10357 kfree(veb); 10358 } 10359 10360 /** 10361 * i40e_veb_release - Delete a VEB and free its resources 10362 * @veb: the VEB being removed 10363 **/ 10364 void i40e_veb_release(struct i40e_veb *veb) 10365 { 10366 struct i40e_vsi *vsi = NULL; 10367 struct i40e_pf *pf; 10368 int i, n = 0; 10369 10370 pf = veb->pf; 10371 10372 /* find the remaining VSI and check for extras */ 10373 for (i = 0; i < pf->num_alloc_vsi; i++) { 10374 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 10375 n++; 10376 vsi = pf->vsi[i]; 10377 } 10378 } 10379 if (n != 1) { 10380 dev_info(&pf->pdev->dev, 10381 "can't remove VEB %d with %d VSIs left\n", 10382 veb->seid, n); 10383 return; 10384 } 10385 10386 /* move the remaining VSI to uplink veb */ 10387 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 10388 if (veb->uplink_seid) { 10389 vsi->uplink_seid = veb->uplink_seid; 10390 if (veb->uplink_seid == pf->mac_seid) 10391 vsi->veb_idx = I40E_NO_VEB; 10392 else 10393 vsi->veb_idx = veb->veb_idx; 10394 } else { 10395 /* floating VEB */ 10396 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 10397 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 10398 } 10399 10400 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 10401 i40e_veb_clear(veb); 10402 } 10403 10404 /** 10405 * i40e_add_veb - create the VEB in the switch 10406 * @veb: the VEB to be instantiated 10407 * @vsi: the controlling VSI 10408 **/ 10409 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 10410 { 10411 struct i40e_pf *pf = veb->pf; 10412 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED); 10413 int ret; 10414 10415 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, 10416 veb->enabled_tc, false, 10417 &veb->seid, enable_stats, NULL); 10418 10419 /* get a VEB from the hardware */ 10420 if (ret) { 10421 dev_info(&pf->pdev->dev, 10422 "couldn't add VEB, err %s aq_err %s\n", 10423 i40e_stat_str(&pf->hw, ret), 10424 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10425 return -EPERM; 10426 } 10427 10428 /* get statistics counter */ 10429 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, 10430 &veb->stats_idx, NULL, NULL, NULL); 10431 if (ret) { 10432 dev_info(&pf->pdev->dev, 10433 "couldn't get VEB statistics idx, err %s aq_err %s\n", 10434 i40e_stat_str(&pf->hw, ret), 10435 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10436 return -EPERM; 10437 } 10438 ret = i40e_veb_get_bw_info(veb); 10439 if (ret) { 10440 dev_info(&pf->pdev->dev, 10441 "couldn't get VEB bw info, err %s aq_err %s\n", 10442 i40e_stat_str(&pf->hw, ret), 10443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10444 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 10445 return -ENOENT; 10446 } 10447 10448 vsi->uplink_seid = veb->seid; 10449 vsi->veb_idx = veb->idx; 10450 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 10451 10452 return 0; 10453 } 10454 10455 /** 10456 * i40e_veb_setup - Set up a VEB 10457 * @pf: board private structure 10458 * @flags: VEB setup flags 10459 * @uplink_seid: the switch element to link to 10460 * @vsi_seid: the initial VSI seid 10461 * @enabled_tc: Enabled TC bit-map 10462 * 10463 * This allocates the sw VEB structure and links it into the switch 10464 * It is possible and legal for this to be a duplicate of an already 10465 * existing VEB. It is also possible for both uplink and vsi seids 10466 * to be zero, in order to create a floating VEB. 10467 * 10468 * Returns pointer to the successfully allocated VEB sw struct on 10469 * success, otherwise returns NULL on failure. 10470 **/ 10471 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 10472 u16 uplink_seid, u16 vsi_seid, 10473 u8 enabled_tc) 10474 { 10475 struct i40e_veb *veb, *uplink_veb = NULL; 10476 int vsi_idx, veb_idx; 10477 int ret; 10478 10479 /* if one seid is 0, the other must be 0 to create a floating relay */ 10480 if ((uplink_seid == 0 || vsi_seid == 0) && 10481 (uplink_seid + vsi_seid != 0)) { 10482 dev_info(&pf->pdev->dev, 10483 "one, not both seid's are 0: uplink=%d vsi=%d\n", 10484 uplink_seid, vsi_seid); 10485 return NULL; 10486 } 10487 10488 /* make sure there is such a vsi and uplink */ 10489 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 10490 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 10491 break; 10492 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 10493 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 10494 vsi_seid); 10495 return NULL; 10496 } 10497 10498 if (uplink_seid && uplink_seid != pf->mac_seid) { 10499 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 10500 if (pf->veb[veb_idx] && 10501 pf->veb[veb_idx]->seid == uplink_seid) { 10502 uplink_veb = pf->veb[veb_idx]; 10503 break; 10504 } 10505 } 10506 if (!uplink_veb) { 10507 dev_info(&pf->pdev->dev, 10508 "uplink seid %d not found\n", uplink_seid); 10509 return NULL; 10510 } 10511 } 10512 10513 /* get veb sw struct */ 10514 veb_idx = i40e_veb_mem_alloc(pf); 10515 if (veb_idx < 0) 10516 goto err_alloc; 10517 veb = pf->veb[veb_idx]; 10518 veb->flags = flags; 10519 veb->uplink_seid = uplink_seid; 10520 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 10521 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 10522 10523 /* create the VEB in the switch */ 10524 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 10525 if (ret) 10526 goto err_veb; 10527 if (vsi_idx == pf->lan_vsi) 10528 pf->lan_veb = veb->idx; 10529 10530 return veb; 10531 10532 err_veb: 10533 i40e_veb_clear(veb); 10534 err_alloc: 10535 return NULL; 10536 } 10537 10538 /** 10539 * i40e_setup_pf_switch_element - set PF vars based on switch type 10540 * @pf: board private structure 10541 * @ele: element we are building info from 10542 * @num_reported: total number of elements 10543 * @printconfig: should we print the contents 10544 * 10545 * helper function to assist in extracting a few useful SEID values. 10546 **/ 10547 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 10548 struct i40e_aqc_switch_config_element_resp *ele, 10549 u16 num_reported, bool printconfig) 10550 { 10551 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 10552 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 10553 u8 element_type = ele->element_type; 10554 u16 seid = le16_to_cpu(ele->seid); 10555 10556 if (printconfig) 10557 dev_info(&pf->pdev->dev, 10558 "type=%d seid=%d uplink=%d downlink=%d\n", 10559 element_type, seid, uplink_seid, downlink_seid); 10560 10561 switch (element_type) { 10562 case I40E_SWITCH_ELEMENT_TYPE_MAC: 10563 pf->mac_seid = seid; 10564 break; 10565 case I40E_SWITCH_ELEMENT_TYPE_VEB: 10566 /* Main VEB? */ 10567 if (uplink_seid != pf->mac_seid) 10568 break; 10569 if (pf->lan_veb == I40E_NO_VEB) { 10570 int v; 10571 10572 /* find existing or else empty VEB */ 10573 for (v = 0; v < I40E_MAX_VEB; v++) { 10574 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 10575 pf->lan_veb = v; 10576 break; 10577 } 10578 } 10579 if (pf->lan_veb == I40E_NO_VEB) { 10580 v = i40e_veb_mem_alloc(pf); 10581 if (v < 0) 10582 break; 10583 pf->lan_veb = v; 10584 } 10585 } 10586 10587 pf->veb[pf->lan_veb]->seid = seid; 10588 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 10589 pf->veb[pf->lan_veb]->pf = pf; 10590 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 10591 break; 10592 case I40E_SWITCH_ELEMENT_TYPE_VSI: 10593 if (num_reported != 1) 10594 break; 10595 /* This is immediately after a reset so we can assume this is 10596 * the PF's VSI 10597 */ 10598 pf->mac_seid = uplink_seid; 10599 pf->pf_seid = downlink_seid; 10600 pf->main_vsi_seid = seid; 10601 if (printconfig) 10602 dev_info(&pf->pdev->dev, 10603 "pf_seid=%d main_vsi_seid=%d\n", 10604 pf->pf_seid, pf->main_vsi_seid); 10605 break; 10606 case I40E_SWITCH_ELEMENT_TYPE_PF: 10607 case I40E_SWITCH_ELEMENT_TYPE_VF: 10608 case I40E_SWITCH_ELEMENT_TYPE_EMP: 10609 case I40E_SWITCH_ELEMENT_TYPE_BMC: 10610 case I40E_SWITCH_ELEMENT_TYPE_PE: 10611 case I40E_SWITCH_ELEMENT_TYPE_PA: 10612 /* ignore these for now */ 10613 break; 10614 default: 10615 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 10616 element_type, seid); 10617 break; 10618 } 10619 } 10620 10621 /** 10622 * i40e_fetch_switch_configuration - Get switch config from firmware 10623 * @pf: board private structure 10624 * @printconfig: should we print the contents 10625 * 10626 * Get the current switch configuration from the device and 10627 * extract a few useful SEID values. 10628 **/ 10629 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 10630 { 10631 struct i40e_aqc_get_switch_config_resp *sw_config; 10632 u16 next_seid = 0; 10633 int ret = 0; 10634 u8 *aq_buf; 10635 int i; 10636 10637 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 10638 if (!aq_buf) 10639 return -ENOMEM; 10640 10641 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 10642 do { 10643 u16 num_reported, num_total; 10644 10645 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 10646 I40E_AQ_LARGE_BUF, 10647 &next_seid, NULL); 10648 if (ret) { 10649 dev_info(&pf->pdev->dev, 10650 "get switch config failed err %s aq_err %s\n", 10651 i40e_stat_str(&pf->hw, ret), 10652 i40e_aq_str(&pf->hw, 10653 pf->hw.aq.asq_last_status)); 10654 kfree(aq_buf); 10655 return -ENOENT; 10656 } 10657 10658 num_reported = le16_to_cpu(sw_config->header.num_reported); 10659 num_total = le16_to_cpu(sw_config->header.num_total); 10660 10661 if (printconfig) 10662 dev_info(&pf->pdev->dev, 10663 "header: %d reported %d total\n", 10664 num_reported, num_total); 10665 10666 for (i = 0; i < num_reported; i++) { 10667 struct i40e_aqc_switch_config_element_resp *ele = 10668 &sw_config->element[i]; 10669 10670 i40e_setup_pf_switch_element(pf, ele, num_reported, 10671 printconfig); 10672 } 10673 } while (next_seid != 0); 10674 10675 kfree(aq_buf); 10676 return ret; 10677 } 10678 10679 /** 10680 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 10681 * @pf: board private structure 10682 * @reinit: if the Main VSI needs to re-initialized. 10683 * 10684 * Returns 0 on success, negative value on failure 10685 **/ 10686 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 10687 { 10688 u16 flags = 0; 10689 int ret; 10690 10691 /* find out what's out there already */ 10692 ret = i40e_fetch_switch_configuration(pf, false); 10693 if (ret) { 10694 dev_info(&pf->pdev->dev, 10695 "couldn't fetch switch config, err %s aq_err %s\n", 10696 i40e_stat_str(&pf->hw, ret), 10697 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10698 return ret; 10699 } 10700 i40e_pf_reset_stats(pf); 10701 10702 /* set the switch config bit for the whole device to 10703 * support limited promisc or true promisc 10704 * when user requests promisc. The default is limited 10705 * promisc. 10706 */ 10707 10708 if ((pf->hw.pf_id == 0) && 10709 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 10710 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 10711 10712 if (pf->hw.pf_id == 0) { 10713 u16 valid_flags; 10714 10715 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 10716 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 10717 NULL); 10718 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 10719 dev_info(&pf->pdev->dev, 10720 "couldn't set switch config bits, err %s aq_err %s\n", 10721 i40e_stat_str(&pf->hw, ret), 10722 i40e_aq_str(&pf->hw, 10723 pf->hw.aq.asq_last_status)); 10724 /* not a fatal problem, just keep going */ 10725 } 10726 } 10727 10728 /* first time setup */ 10729 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 10730 struct i40e_vsi *vsi = NULL; 10731 u16 uplink_seid; 10732 10733 /* Set up the PF VSI associated with the PF's main VSI 10734 * that is already in the HW switch 10735 */ 10736 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 10737 uplink_seid = pf->veb[pf->lan_veb]->seid; 10738 else 10739 uplink_seid = pf->mac_seid; 10740 if (pf->lan_vsi == I40E_NO_VSI) 10741 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 10742 else if (reinit) 10743 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 10744 if (!vsi) { 10745 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 10746 i40e_fdir_teardown(pf); 10747 return -EAGAIN; 10748 } 10749 } else { 10750 /* force a reset of TC and queue layout configurations */ 10751 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 10752 10753 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 10754 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 10755 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 10756 } 10757 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 10758 10759 i40e_fdir_sb_setup(pf); 10760 10761 /* Setup static PF queue filter control settings */ 10762 ret = i40e_setup_pf_filter_control(pf); 10763 if (ret) { 10764 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 10765 ret); 10766 /* Failure here should not stop continuing other steps */ 10767 } 10768 10769 /* enable RSS in the HW, even for only one queue, as the stack can use 10770 * the hash 10771 */ 10772 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 10773 i40e_pf_config_rss(pf); 10774 10775 /* fill in link information and enable LSE reporting */ 10776 i40e_link_event(pf); 10777 10778 /* Initialize user-specific link properties */ 10779 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 10780 I40E_AQ_AN_COMPLETED) ? true : false); 10781 10782 i40e_ptp_init(pf); 10783 10784 return ret; 10785 } 10786 10787 /** 10788 * i40e_determine_queue_usage - Work out queue distribution 10789 * @pf: board private structure 10790 **/ 10791 static void i40e_determine_queue_usage(struct i40e_pf *pf) 10792 { 10793 int queues_left; 10794 10795 pf->num_lan_qps = 0; 10796 #ifdef I40E_FCOE 10797 pf->num_fcoe_qps = 0; 10798 #endif 10799 10800 /* Find the max queues to be put into basic use. We'll always be 10801 * using TC0, whether or not DCB is running, and TC0 will get the 10802 * big RSS set. 10803 */ 10804 queues_left = pf->hw.func_caps.num_tx_qp; 10805 10806 if ((queues_left == 1) || 10807 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 10808 /* one qp for PF, no queues for anything else */ 10809 queues_left = 0; 10810 pf->alloc_rss_size = pf->num_lan_qps = 1; 10811 10812 /* make sure all the fancies are disabled */ 10813 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 10814 I40E_FLAG_IWARP_ENABLED | 10815 #ifdef I40E_FCOE 10816 I40E_FLAG_FCOE_ENABLED | 10817 #endif 10818 I40E_FLAG_FD_SB_ENABLED | 10819 I40E_FLAG_FD_ATR_ENABLED | 10820 I40E_FLAG_DCB_CAPABLE | 10821 I40E_FLAG_DCB_ENABLED | 10822 I40E_FLAG_SRIOV_ENABLED | 10823 I40E_FLAG_VMDQ_ENABLED); 10824 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 10825 I40E_FLAG_FD_SB_ENABLED | 10826 I40E_FLAG_FD_ATR_ENABLED | 10827 I40E_FLAG_DCB_CAPABLE))) { 10828 /* one qp for PF */ 10829 pf->alloc_rss_size = pf->num_lan_qps = 1; 10830 queues_left -= pf->num_lan_qps; 10831 10832 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 10833 I40E_FLAG_IWARP_ENABLED | 10834 #ifdef I40E_FCOE 10835 I40E_FLAG_FCOE_ENABLED | 10836 #endif 10837 I40E_FLAG_FD_SB_ENABLED | 10838 I40E_FLAG_FD_ATR_ENABLED | 10839 I40E_FLAG_DCB_ENABLED | 10840 I40E_FLAG_VMDQ_ENABLED); 10841 } else { 10842 /* Not enough queues for all TCs */ 10843 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 10844 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 10845 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | 10846 I40E_FLAG_DCB_ENABLED); 10847 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 10848 } 10849 pf->num_lan_qps = max_t(int, pf->rss_size_max, 10850 num_online_cpus()); 10851 pf->num_lan_qps = min_t(int, pf->num_lan_qps, 10852 pf->hw.func_caps.num_tx_qp); 10853 10854 queues_left -= pf->num_lan_qps; 10855 } 10856 10857 #ifdef I40E_FCOE 10858 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 10859 if (I40E_DEFAULT_FCOE <= queues_left) { 10860 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 10861 } else if (I40E_MINIMUM_FCOE <= queues_left) { 10862 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 10863 } else { 10864 pf->num_fcoe_qps = 0; 10865 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 10866 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 10867 } 10868 10869 queues_left -= pf->num_fcoe_qps; 10870 } 10871 10872 #endif 10873 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 10874 if (queues_left > 1) { 10875 queues_left -= 1; /* save 1 queue for FD */ 10876 } else { 10877 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 10878 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 10879 } 10880 } 10881 10882 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 10883 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 10884 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 10885 (queues_left / pf->num_vf_qps)); 10886 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 10887 } 10888 10889 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 10890 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 10891 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 10892 (queues_left / pf->num_vmdq_qps)); 10893 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 10894 } 10895 10896 pf->queues_left = queues_left; 10897 dev_dbg(&pf->pdev->dev, 10898 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n", 10899 pf->hw.func_caps.num_tx_qp, 10900 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED), 10901 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs, 10902 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps, 10903 queues_left); 10904 #ifdef I40E_FCOE 10905 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 10906 #endif 10907 } 10908 10909 /** 10910 * i40e_setup_pf_filter_control - Setup PF static filter control 10911 * @pf: PF to be setup 10912 * 10913 * i40e_setup_pf_filter_control sets up a PF's initial filter control 10914 * settings. If PE/FCoE are enabled then it will also set the per PF 10915 * based filter sizes required for them. It also enables Flow director, 10916 * ethertype and macvlan type filter settings for the pf. 10917 * 10918 * Returns 0 on success, negative on failure 10919 **/ 10920 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 10921 { 10922 struct i40e_filter_control_settings *settings = &pf->filter_settings; 10923 10924 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 10925 10926 /* Flow Director is enabled */ 10927 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 10928 settings->enable_fdir = true; 10929 10930 /* Ethtype and MACVLAN filters enabled for PF */ 10931 settings->enable_ethtype = true; 10932 settings->enable_macvlan = true; 10933 10934 if (i40e_set_filter_control(&pf->hw, settings)) 10935 return -ENOENT; 10936 10937 return 0; 10938 } 10939 10940 #define INFO_STRING_LEN 255 10941 #define REMAIN(__x) (INFO_STRING_LEN - (__x)) 10942 static void i40e_print_features(struct i40e_pf *pf) 10943 { 10944 struct i40e_hw *hw = &pf->hw; 10945 char *buf; 10946 int i; 10947 10948 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL); 10949 if (!buf) 10950 return; 10951 10952 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id); 10953 #ifdef CONFIG_PCI_IOV 10954 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs); 10955 #endif 10956 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d", 10957 pf->hw.func_caps.num_vsis, 10958 pf->vsi[pf->lan_vsi]->num_queue_pairs); 10959 if (pf->flags & I40E_FLAG_RSS_ENABLED) 10960 i += snprintf(&buf[i], REMAIN(i), " RSS"); 10961 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 10962 i += snprintf(&buf[i], REMAIN(i), " FD_ATR"); 10963 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 10964 i += snprintf(&buf[i], REMAIN(i), " FD_SB"); 10965 i += snprintf(&buf[i], REMAIN(i), " NTUPLE"); 10966 } 10967 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 10968 i += snprintf(&buf[i], REMAIN(i), " DCB"); 10969 i += snprintf(&buf[i], REMAIN(i), " VxLAN"); 10970 i += snprintf(&buf[i], REMAIN(i), " Geneve"); 10971 if (pf->flags & I40E_FLAG_PTP) 10972 i += snprintf(&buf[i], REMAIN(i), " PTP"); 10973 #ifdef I40E_FCOE 10974 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 10975 i += snprintf(&buf[i], REMAIN(i), " FCOE"); 10976 #endif 10977 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 10978 i += snprintf(&buf[i], REMAIN(i), " VEB"); 10979 else 10980 i += snprintf(&buf[i], REMAIN(i), " VEPA"); 10981 10982 dev_info(&pf->pdev->dev, "%s\n", buf); 10983 kfree(buf); 10984 WARN_ON(i > INFO_STRING_LEN); 10985 } 10986 10987 /** 10988 * i40e_get_platform_mac_addr - get platform-specific MAC address 10989 * 10990 * @pdev: PCI device information struct 10991 * @pf: board private structure 10992 * 10993 * Look up the MAC address in Open Firmware on systems that support it, 10994 * and use IDPROM on SPARC if no OF address is found. On return, the 10995 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value 10996 * has been selected. 10997 **/ 10998 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf) 10999 { 11000 pf->flags &= ~I40E_FLAG_PF_MAC; 11001 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr)) 11002 pf->flags |= I40E_FLAG_PF_MAC; 11003 } 11004 11005 /** 11006 * i40e_probe - Device initialization routine 11007 * @pdev: PCI device information struct 11008 * @ent: entry in i40e_pci_tbl 11009 * 11010 * i40e_probe initializes a PF identified by a pci_dev structure. 11011 * The OS initialization, configuring of the PF private structure, 11012 * and a hardware reset occur. 11013 * 11014 * Returns 0 on success, negative on failure 11015 **/ 11016 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 11017 { 11018 struct i40e_aq_get_phy_abilities_resp abilities; 11019 struct i40e_pf *pf; 11020 struct i40e_hw *hw; 11021 static u16 pfs_found; 11022 u16 wol_nvm_bits; 11023 u16 link_status; 11024 int err; 11025 u32 val; 11026 u32 i; 11027 u8 set_fc_aq_fail; 11028 11029 err = pci_enable_device_mem(pdev); 11030 if (err) 11031 return err; 11032 11033 /* set up for high or low dma */ 11034 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11035 if (err) { 11036 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11037 if (err) { 11038 dev_err(&pdev->dev, 11039 "DMA configuration failed: 0x%x\n", err); 11040 goto err_dma; 11041 } 11042 } 11043 11044 /* set up pci connections */ 11045 err = pci_request_mem_regions(pdev, i40e_driver_name); 11046 if (err) { 11047 dev_info(&pdev->dev, 11048 "pci_request_selected_regions failed %d\n", err); 11049 goto err_pci_reg; 11050 } 11051 11052 pci_enable_pcie_error_reporting(pdev); 11053 pci_set_master(pdev); 11054 11055 /* Now that we have a PCI connection, we need to do the 11056 * low level device setup. This is primarily setting up 11057 * the Admin Queue structures and then querying for the 11058 * device's current profile information. 11059 */ 11060 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 11061 if (!pf) { 11062 err = -ENOMEM; 11063 goto err_pf_alloc; 11064 } 11065 pf->next_vsi = 0; 11066 pf->pdev = pdev; 11067 set_bit(__I40E_DOWN, &pf->state); 11068 11069 hw = &pf->hw; 11070 hw->back = pf; 11071 11072 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), 11073 I40E_MAX_CSR_SPACE); 11074 11075 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len); 11076 if (!hw->hw_addr) { 11077 err = -EIO; 11078 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 11079 (unsigned int)pci_resource_start(pdev, 0), 11080 pf->ioremap_len, err); 11081 goto err_ioremap; 11082 } 11083 hw->vendor_id = pdev->vendor; 11084 hw->device_id = pdev->device; 11085 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 11086 hw->subsystem_vendor_id = pdev->subsystem_vendor; 11087 hw->subsystem_device_id = pdev->subsystem_device; 11088 hw->bus.device = PCI_SLOT(pdev->devfn); 11089 hw->bus.func = PCI_FUNC(pdev->devfn); 11090 hw->bus.bus_id = pdev->bus->number; 11091 pf->instance = pfs_found; 11092 11093 /* set up the locks for the AQ, do this only once in probe 11094 * and destroy them only once in remove 11095 */ 11096 mutex_init(&hw->aq.asq_mutex); 11097 mutex_init(&hw->aq.arq_mutex); 11098 11099 pf->msg_enable = netif_msg_init(debug, 11100 NETIF_MSG_DRV | 11101 NETIF_MSG_PROBE | 11102 NETIF_MSG_LINK); 11103 if (debug < -1) 11104 pf->hw.debug_mask = debug; 11105 11106 /* do a special CORER for clearing PXE mode once at init */ 11107 if (hw->revision_id == 0 && 11108 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 11109 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 11110 i40e_flush(hw); 11111 msleep(200); 11112 pf->corer_count++; 11113 11114 i40e_clear_pxe_mode(hw); 11115 } 11116 11117 /* Reset here to make sure all is clean and to define PF 'n' */ 11118 i40e_clear_hw(hw); 11119 err = i40e_pf_reset(hw); 11120 if (err) { 11121 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 11122 goto err_pf_reset; 11123 } 11124 pf->pfr_count++; 11125 11126 hw->aq.num_arq_entries = I40E_AQ_LEN; 11127 hw->aq.num_asq_entries = I40E_AQ_LEN; 11128 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 11129 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 11130 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 11131 11132 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 11133 "%s-%s:misc", 11134 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 11135 11136 err = i40e_init_shared_code(hw); 11137 if (err) { 11138 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 11139 err); 11140 goto err_pf_reset; 11141 } 11142 11143 /* set up a default setting for link flow control */ 11144 pf->hw.fc.requested_mode = I40E_FC_NONE; 11145 11146 err = i40e_init_adminq(hw); 11147 if (err) { 11148 if (err == I40E_ERR_FIRMWARE_API_VERSION) 11149 dev_info(&pdev->dev, 11150 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 11151 else 11152 dev_info(&pdev->dev, 11153 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n"); 11154 11155 goto err_pf_reset; 11156 } 11157 11158 /* provide nvm, fw, api versions */ 11159 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n", 11160 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, 11161 hw->aq.api_maj_ver, hw->aq.api_min_ver, 11162 i40e_nvm_version_str(hw)); 11163 11164 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 11165 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 11166 dev_info(&pdev->dev, 11167 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 11168 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 11169 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 11170 dev_info(&pdev->dev, 11171 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 11172 11173 i40e_verify_eeprom(pf); 11174 11175 /* Rev 0 hardware was never productized */ 11176 if (hw->revision_id < 1) 11177 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 11178 11179 i40e_clear_pxe_mode(hw); 11180 err = i40e_get_capabilities(pf); 11181 if (err) 11182 goto err_adminq_setup; 11183 11184 err = i40e_sw_init(pf); 11185 if (err) { 11186 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 11187 goto err_sw_init; 11188 } 11189 11190 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 11191 hw->func_caps.num_rx_qp, 11192 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 11193 if (err) { 11194 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 11195 goto err_init_lan_hmc; 11196 } 11197 11198 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 11199 if (err) { 11200 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 11201 err = -ENOENT; 11202 goto err_configure_lan_hmc; 11203 } 11204 11205 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 11206 * Ignore error return codes because if it was already disabled via 11207 * hardware settings this will fail 11208 */ 11209 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) { 11210 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 11211 i40e_aq_stop_lldp(hw, true, NULL); 11212 } 11213 11214 i40e_get_mac_addr(hw, hw->mac.addr); 11215 /* allow a platform config to override the HW addr */ 11216 i40e_get_platform_mac_addr(pdev, pf); 11217 if (!is_valid_ether_addr(hw->mac.addr)) { 11218 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 11219 err = -EIO; 11220 goto err_mac_addr; 11221 } 11222 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 11223 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 11224 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 11225 if (is_valid_ether_addr(hw->mac.port_addr)) 11226 pf->flags |= I40E_FLAG_PORT_ID_VALID; 11227 #ifdef I40E_FCOE 11228 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 11229 if (err) 11230 dev_info(&pdev->dev, 11231 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 11232 if (!is_valid_ether_addr(hw->mac.san_addr)) { 11233 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 11234 hw->mac.san_addr); 11235 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 11236 } 11237 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 11238 #endif /* I40E_FCOE */ 11239 11240 pci_set_drvdata(pdev, pf); 11241 pci_save_state(pdev); 11242 #ifdef CONFIG_I40E_DCB 11243 err = i40e_init_pf_dcb(pf); 11244 if (err) { 11245 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 11246 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED); 11247 /* Continue without DCB enabled */ 11248 } 11249 #endif /* CONFIG_I40E_DCB */ 11250 11251 /* set up periodic task facility */ 11252 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 11253 pf->service_timer_period = HZ; 11254 11255 INIT_WORK(&pf->service_task, i40e_service_task); 11256 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 11257 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 11258 11259 /* NVM bit on means WoL disabled for the port */ 11260 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 11261 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1) 11262 pf->wol_en = false; 11263 else 11264 pf->wol_en = true; 11265 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 11266 11267 /* set up the main switch operations */ 11268 i40e_determine_queue_usage(pf); 11269 err = i40e_init_interrupt_scheme(pf); 11270 if (err) 11271 goto err_switch_setup; 11272 11273 /* The number of VSIs reported by the FW is the minimum guaranteed 11274 * to us; HW supports far more and we share the remaining pool with 11275 * the other PFs. We allocate space for more than the guarantee with 11276 * the understanding that we might not get them all later. 11277 */ 11278 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 11279 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 11280 else 11281 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 11282 11283 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 11284 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), 11285 GFP_KERNEL); 11286 if (!pf->vsi) { 11287 err = -ENOMEM; 11288 goto err_switch_setup; 11289 } 11290 11291 #ifdef CONFIG_PCI_IOV 11292 /* prep for VF support */ 11293 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 11294 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 11295 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 11296 if (pci_num_vf(pdev)) 11297 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 11298 } 11299 #endif 11300 err = i40e_setup_pf_switch(pf, false); 11301 if (err) { 11302 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 11303 goto err_vsis; 11304 } 11305 11306 /* Make sure flow control is set according to current settings */ 11307 err = i40e_set_fc(hw, &set_fc_aq_fail, true); 11308 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET) 11309 dev_dbg(&pf->pdev->dev, 11310 "Set fc with err %s aq_err %s on get_phy_cap\n", 11311 i40e_stat_str(hw, err), 11312 i40e_aq_str(hw, hw->aq.asq_last_status)); 11313 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET) 11314 dev_dbg(&pf->pdev->dev, 11315 "Set fc with err %s aq_err %s on set_phy_config\n", 11316 i40e_stat_str(hw, err), 11317 i40e_aq_str(hw, hw->aq.asq_last_status)); 11318 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE) 11319 dev_dbg(&pf->pdev->dev, 11320 "Set fc with err %s aq_err %s on get_link_info\n", 11321 i40e_stat_str(hw, err), 11322 i40e_aq_str(hw, hw->aq.asq_last_status)); 11323 11324 /* if FDIR VSI was set up, start it now */ 11325 for (i = 0; i < pf->num_alloc_vsi; i++) { 11326 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 11327 i40e_vsi_open(pf->vsi[i]); 11328 break; 11329 } 11330 } 11331 11332 /* The driver only wants link up/down and module qualification 11333 * reports from firmware. Note the negative logic. 11334 */ 11335 err = i40e_aq_set_phy_int_mask(&pf->hw, 11336 ~(I40E_AQ_EVENT_LINK_UPDOWN | 11337 I40E_AQ_EVENT_MEDIA_NA | 11338 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 11339 if (err) 11340 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 11341 i40e_stat_str(&pf->hw, err), 11342 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11343 11344 /* Reconfigure hardware for allowing smaller MSS in the case 11345 * of TSO, so that we avoid the MDD being fired and causing 11346 * a reset in the case of small MSS+TSO. 11347 */ 11348 val = rd32(hw, I40E_REG_MSS); 11349 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 11350 val &= ~I40E_REG_MSS_MIN_MASK; 11351 val |= I40E_64BYTE_MSS; 11352 wr32(hw, I40E_REG_MSS, val); 11353 } 11354 11355 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { 11356 msleep(75); 11357 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 11358 if (err) 11359 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 11360 i40e_stat_str(&pf->hw, err), 11361 i40e_aq_str(&pf->hw, 11362 pf->hw.aq.asq_last_status)); 11363 } 11364 /* The main driver is (mostly) up and happy. We need to set this state 11365 * before setting up the misc vector or we get a race and the vector 11366 * ends up disabled forever. 11367 */ 11368 clear_bit(__I40E_DOWN, &pf->state); 11369 11370 /* In case of MSIX we are going to setup the misc vector right here 11371 * to handle admin queue events etc. In case of legacy and MSI 11372 * the misc functionality and queue processing is combined in 11373 * the same vector and that gets setup at open. 11374 */ 11375 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 11376 err = i40e_setup_misc_vector(pf); 11377 if (err) { 11378 dev_info(&pdev->dev, 11379 "setup of misc vector failed: %d\n", err); 11380 goto err_vsis; 11381 } 11382 } 11383 11384 #ifdef CONFIG_PCI_IOV 11385 /* prep for VF support */ 11386 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 11387 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 11388 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 11389 /* disable link interrupts for VFs */ 11390 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 11391 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 11392 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 11393 i40e_flush(hw); 11394 11395 if (pci_num_vf(pdev)) { 11396 dev_info(&pdev->dev, 11397 "Active VFs found, allocating resources.\n"); 11398 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 11399 if (err) 11400 dev_info(&pdev->dev, 11401 "Error %d allocating resources for existing VFs\n", 11402 err); 11403 } 11404 } 11405 #endif /* CONFIG_PCI_IOV */ 11406 11407 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 11408 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile, 11409 pf->num_iwarp_msix, 11410 I40E_IWARP_IRQ_PILE_ID); 11411 if (pf->iwarp_base_vector < 0) { 11412 dev_info(&pdev->dev, 11413 "failed to get tracking for %d vectors for IWARP err=%d\n", 11414 pf->num_iwarp_msix, pf->iwarp_base_vector); 11415 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 11416 } 11417 } 11418 11419 i40e_dbg_pf_init(pf); 11420 11421 /* tell the firmware that we're starting */ 11422 i40e_send_version(pf); 11423 11424 /* since everything's happy, start the service_task timer */ 11425 mod_timer(&pf->service_timer, 11426 round_jiffies(jiffies + pf->service_timer_period)); 11427 11428 /* add this PF to client device list and launch a client service task */ 11429 err = i40e_lan_add_device(pf); 11430 if (err) 11431 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n", 11432 err); 11433 11434 #ifdef I40E_FCOE 11435 /* create FCoE interface */ 11436 i40e_fcoe_vsi_setup(pf); 11437 11438 #endif 11439 #define PCI_SPEED_SIZE 8 11440 #define PCI_WIDTH_SIZE 8 11441 /* Devices on the IOSF bus do not have this information 11442 * and will report PCI Gen 1 x 1 by default so don't bother 11443 * checking them. 11444 */ 11445 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) { 11446 char speed[PCI_SPEED_SIZE] = "Unknown"; 11447 char width[PCI_WIDTH_SIZE] = "Unknown"; 11448 11449 /* Get the negotiated link width and speed from PCI config 11450 * space 11451 */ 11452 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, 11453 &link_status); 11454 11455 i40e_set_pci_config_data(hw, link_status); 11456 11457 switch (hw->bus.speed) { 11458 case i40e_bus_speed_8000: 11459 strncpy(speed, "8.0", PCI_SPEED_SIZE); break; 11460 case i40e_bus_speed_5000: 11461 strncpy(speed, "5.0", PCI_SPEED_SIZE); break; 11462 case i40e_bus_speed_2500: 11463 strncpy(speed, "2.5", PCI_SPEED_SIZE); break; 11464 default: 11465 break; 11466 } 11467 switch (hw->bus.width) { 11468 case i40e_bus_width_pcie_x8: 11469 strncpy(width, "8", PCI_WIDTH_SIZE); break; 11470 case i40e_bus_width_pcie_x4: 11471 strncpy(width, "4", PCI_WIDTH_SIZE); break; 11472 case i40e_bus_width_pcie_x2: 11473 strncpy(width, "2", PCI_WIDTH_SIZE); break; 11474 case i40e_bus_width_pcie_x1: 11475 strncpy(width, "1", PCI_WIDTH_SIZE); break; 11476 default: 11477 break; 11478 } 11479 11480 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n", 11481 speed, width); 11482 11483 if (hw->bus.width < i40e_bus_width_pcie_x8 || 11484 hw->bus.speed < i40e_bus_speed_8000) { 11485 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 11486 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 11487 } 11488 } 11489 11490 /* get the requested speeds from the fw */ 11491 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 11492 if (err) 11493 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n", 11494 i40e_stat_str(&pf->hw, err), 11495 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11496 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 11497 11498 /* get the supported phy types from the fw */ 11499 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL); 11500 if (err) 11501 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n", 11502 i40e_stat_str(&pf->hw, err), 11503 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11504 11505 /* Add a filter to drop all Flow control frames from any VSI from being 11506 * transmitted. By doing so we stop a malicious VF from sending out 11507 * PAUSE or PFC frames and potentially controlling traffic for other 11508 * PF/VF VSIs. 11509 * The FW can still send Flow control frames if enabled. 11510 */ 11511 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 11512 pf->main_vsi_seid); 11513 11514 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) || 11515 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4)) 11516 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS; 11517 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722) 11518 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER; 11519 /* print a string summarizing features */ 11520 i40e_print_features(pf); 11521 11522 return 0; 11523 11524 /* Unwind what we've done if something failed in the setup */ 11525 err_vsis: 11526 set_bit(__I40E_DOWN, &pf->state); 11527 i40e_clear_interrupt_scheme(pf); 11528 kfree(pf->vsi); 11529 err_switch_setup: 11530 i40e_reset_interrupt_capability(pf); 11531 del_timer_sync(&pf->service_timer); 11532 err_mac_addr: 11533 err_configure_lan_hmc: 11534 (void)i40e_shutdown_lan_hmc(hw); 11535 err_init_lan_hmc: 11536 kfree(pf->qp_pile); 11537 err_sw_init: 11538 err_adminq_setup: 11539 err_pf_reset: 11540 iounmap(hw->hw_addr); 11541 err_ioremap: 11542 kfree(pf); 11543 err_pf_alloc: 11544 pci_disable_pcie_error_reporting(pdev); 11545 pci_release_mem_regions(pdev); 11546 err_pci_reg: 11547 err_dma: 11548 pci_disable_device(pdev); 11549 return err; 11550 } 11551 11552 /** 11553 * i40e_remove - Device removal routine 11554 * @pdev: PCI device information struct 11555 * 11556 * i40e_remove is called by the PCI subsystem to alert the driver 11557 * that is should release a PCI device. This could be caused by a 11558 * Hot-Plug event, or because the driver is going to be removed from 11559 * memory. 11560 **/ 11561 static void i40e_remove(struct pci_dev *pdev) 11562 { 11563 struct i40e_pf *pf = pci_get_drvdata(pdev); 11564 struct i40e_hw *hw = &pf->hw; 11565 i40e_status ret_code; 11566 int i; 11567 11568 i40e_dbg_pf_exit(pf); 11569 11570 i40e_ptp_stop(pf); 11571 11572 /* Disable RSS in hw */ 11573 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); 11574 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); 11575 11576 /* no more scheduling of any task */ 11577 set_bit(__I40E_SUSPENDED, &pf->state); 11578 set_bit(__I40E_DOWN, &pf->state); 11579 if (pf->service_timer.data) 11580 del_timer_sync(&pf->service_timer); 11581 if (pf->service_task.func) 11582 cancel_work_sync(&pf->service_task); 11583 11584 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 11585 i40e_free_vfs(pf); 11586 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 11587 } 11588 11589 i40e_fdir_teardown(pf); 11590 11591 /* If there is a switch structure or any orphans, remove them. 11592 * This will leave only the PF's VSI remaining. 11593 */ 11594 for (i = 0; i < I40E_MAX_VEB; i++) { 11595 if (!pf->veb[i]) 11596 continue; 11597 11598 if (pf->veb[i]->uplink_seid == pf->mac_seid || 11599 pf->veb[i]->uplink_seid == 0) 11600 i40e_switch_branch_release(pf->veb[i]); 11601 } 11602 11603 /* Now we can shutdown the PF's VSI, just before we kill 11604 * adminq and hmc. 11605 */ 11606 if (pf->vsi[pf->lan_vsi]) 11607 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 11608 11609 /* remove attached clients */ 11610 ret_code = i40e_lan_del_device(pf); 11611 if (ret_code) { 11612 dev_warn(&pdev->dev, "Failed to delete client device: %d\n", 11613 ret_code); 11614 } 11615 11616 /* shutdown and destroy the HMC */ 11617 if (hw->hmc.hmc_obj) { 11618 ret_code = i40e_shutdown_lan_hmc(hw); 11619 if (ret_code) 11620 dev_warn(&pdev->dev, 11621 "Failed to destroy the HMC resources: %d\n", 11622 ret_code); 11623 } 11624 11625 /* shutdown the adminq */ 11626 i40e_shutdown_adminq(hw); 11627 11628 /* destroy the locks only once, here */ 11629 mutex_destroy(&hw->aq.arq_mutex); 11630 mutex_destroy(&hw->aq.asq_mutex); 11631 11632 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 11633 i40e_clear_interrupt_scheme(pf); 11634 for (i = 0; i < pf->num_alloc_vsi; i++) { 11635 if (pf->vsi[i]) { 11636 i40e_vsi_clear_rings(pf->vsi[i]); 11637 i40e_vsi_clear(pf->vsi[i]); 11638 pf->vsi[i] = NULL; 11639 } 11640 } 11641 11642 for (i = 0; i < I40E_MAX_VEB; i++) { 11643 kfree(pf->veb[i]); 11644 pf->veb[i] = NULL; 11645 } 11646 11647 kfree(pf->qp_pile); 11648 kfree(pf->vsi); 11649 11650 iounmap(hw->hw_addr); 11651 kfree(pf); 11652 pci_release_mem_regions(pdev); 11653 11654 pci_disable_pcie_error_reporting(pdev); 11655 pci_disable_device(pdev); 11656 } 11657 11658 /** 11659 * i40e_pci_error_detected - warning that something funky happened in PCI land 11660 * @pdev: PCI device information struct 11661 * 11662 * Called to warn that something happened and the error handling steps 11663 * are in progress. Allows the driver to quiesce things, be ready for 11664 * remediation. 11665 **/ 11666 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 11667 enum pci_channel_state error) 11668 { 11669 struct i40e_pf *pf = pci_get_drvdata(pdev); 11670 11671 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 11672 11673 if (!pf) { 11674 dev_info(&pdev->dev, 11675 "Cannot recover - error happened during device probe\n"); 11676 return PCI_ERS_RESULT_DISCONNECT; 11677 } 11678 11679 /* shutdown all operations */ 11680 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 11681 rtnl_lock(); 11682 i40e_prep_for_reset(pf); 11683 rtnl_unlock(); 11684 } 11685 11686 /* Request a slot reset */ 11687 return PCI_ERS_RESULT_NEED_RESET; 11688 } 11689 11690 /** 11691 * i40e_pci_error_slot_reset - a PCI slot reset just happened 11692 * @pdev: PCI device information struct 11693 * 11694 * Called to find if the driver can work with the device now that 11695 * the pci slot has been reset. If a basic connection seems good 11696 * (registers are readable and have sane content) then return a 11697 * happy little PCI_ERS_RESULT_xxx. 11698 **/ 11699 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 11700 { 11701 struct i40e_pf *pf = pci_get_drvdata(pdev); 11702 pci_ers_result_t result; 11703 int err; 11704 u32 reg; 11705 11706 dev_dbg(&pdev->dev, "%s\n", __func__); 11707 if (pci_enable_device_mem(pdev)) { 11708 dev_info(&pdev->dev, 11709 "Cannot re-enable PCI device after reset.\n"); 11710 result = PCI_ERS_RESULT_DISCONNECT; 11711 } else { 11712 pci_set_master(pdev); 11713 pci_restore_state(pdev); 11714 pci_save_state(pdev); 11715 pci_wake_from_d3(pdev, false); 11716 11717 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 11718 if (reg == 0) 11719 result = PCI_ERS_RESULT_RECOVERED; 11720 else 11721 result = PCI_ERS_RESULT_DISCONNECT; 11722 } 11723 11724 err = pci_cleanup_aer_uncorrect_error_status(pdev); 11725 if (err) { 11726 dev_info(&pdev->dev, 11727 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 11728 err); 11729 /* non-fatal, continue */ 11730 } 11731 11732 return result; 11733 } 11734 11735 /** 11736 * i40e_pci_error_resume - restart operations after PCI error recovery 11737 * @pdev: PCI device information struct 11738 * 11739 * Called to allow the driver to bring things back up after PCI error 11740 * and/or reset recovery has finished. 11741 **/ 11742 static void i40e_pci_error_resume(struct pci_dev *pdev) 11743 { 11744 struct i40e_pf *pf = pci_get_drvdata(pdev); 11745 11746 dev_dbg(&pdev->dev, "%s\n", __func__); 11747 if (test_bit(__I40E_SUSPENDED, &pf->state)) 11748 return; 11749 11750 rtnl_lock(); 11751 i40e_handle_reset_warning(pf); 11752 rtnl_unlock(); 11753 } 11754 11755 /** 11756 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up 11757 * using the mac_address_write admin q function 11758 * @pf: pointer to i40e_pf struct 11759 **/ 11760 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf) 11761 { 11762 struct i40e_hw *hw = &pf->hw; 11763 i40e_status ret; 11764 u8 mac_addr[6]; 11765 u16 flags = 0; 11766 11767 /* Get current MAC address in case it's an LAA */ 11768 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) { 11769 ether_addr_copy(mac_addr, 11770 pf->vsi[pf->lan_vsi]->netdev->dev_addr); 11771 } else { 11772 dev_err(&pf->pdev->dev, 11773 "Failed to retrieve MAC address; using default\n"); 11774 ether_addr_copy(mac_addr, hw->mac.addr); 11775 } 11776 11777 /* The FW expects the mac address write cmd to first be called with 11778 * one of these flags before calling it again with the multicast 11779 * enable flags. 11780 */ 11781 flags = I40E_AQC_WRITE_TYPE_LAA_WOL; 11782 11783 if (hw->func_caps.flex10_enable && hw->partition_id != 1) 11784 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY; 11785 11786 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 11787 if (ret) { 11788 dev_err(&pf->pdev->dev, 11789 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up"); 11790 return; 11791 } 11792 11793 flags = I40E_AQC_MC_MAG_EN 11794 | I40E_AQC_WOL_PRESERVE_ON_PFR 11795 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG; 11796 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 11797 if (ret) 11798 dev_err(&pf->pdev->dev, 11799 "Failed to enable Multicast Magic Packet wake up\n"); 11800 } 11801 11802 /** 11803 * i40e_shutdown - PCI callback for shutting down 11804 * @pdev: PCI device information struct 11805 **/ 11806 static void i40e_shutdown(struct pci_dev *pdev) 11807 { 11808 struct i40e_pf *pf = pci_get_drvdata(pdev); 11809 struct i40e_hw *hw = &pf->hw; 11810 11811 set_bit(__I40E_SUSPENDED, &pf->state); 11812 set_bit(__I40E_DOWN, &pf->state); 11813 rtnl_lock(); 11814 i40e_prep_for_reset(pf); 11815 rtnl_unlock(); 11816 11817 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11818 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11819 11820 del_timer_sync(&pf->service_timer); 11821 cancel_work_sync(&pf->service_task); 11822 i40e_fdir_teardown(pf); 11823 11824 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE)) 11825 i40e_enable_mc_magic_wake(pf); 11826 11827 rtnl_lock(); 11828 i40e_prep_for_reset(pf); 11829 rtnl_unlock(); 11830 11831 wr32(hw, I40E_PFPM_APM, 11832 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11833 wr32(hw, I40E_PFPM_WUFC, 11834 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11835 11836 i40e_clear_interrupt_scheme(pf); 11837 11838 if (system_state == SYSTEM_POWER_OFF) { 11839 pci_wake_from_d3(pdev, pf->wol_en); 11840 pci_set_power_state(pdev, PCI_D3hot); 11841 } 11842 } 11843 11844 #ifdef CONFIG_PM 11845 /** 11846 * i40e_suspend - PCI callback for moving to D3 11847 * @pdev: PCI device information struct 11848 **/ 11849 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 11850 { 11851 struct i40e_pf *pf = pci_get_drvdata(pdev); 11852 struct i40e_hw *hw = &pf->hw; 11853 int retval = 0; 11854 11855 set_bit(__I40E_SUSPENDED, &pf->state); 11856 set_bit(__I40E_DOWN, &pf->state); 11857 11858 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE)) 11859 i40e_enable_mc_magic_wake(pf); 11860 11861 rtnl_lock(); 11862 i40e_prep_for_reset(pf); 11863 rtnl_unlock(); 11864 11865 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11866 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11867 11868 i40e_stop_misc_vector(pf); 11869 11870 retval = pci_save_state(pdev); 11871 if (retval) 11872 return retval; 11873 11874 pci_wake_from_d3(pdev, pf->wol_en); 11875 pci_set_power_state(pdev, PCI_D3hot); 11876 11877 return retval; 11878 } 11879 11880 /** 11881 * i40e_resume - PCI callback for waking up from D3 11882 * @pdev: PCI device information struct 11883 **/ 11884 static int i40e_resume(struct pci_dev *pdev) 11885 { 11886 struct i40e_pf *pf = pci_get_drvdata(pdev); 11887 u32 err; 11888 11889 pci_set_power_state(pdev, PCI_D0); 11890 pci_restore_state(pdev); 11891 /* pci_restore_state() clears dev->state_saves, so 11892 * call pci_save_state() again to restore it. 11893 */ 11894 pci_save_state(pdev); 11895 11896 err = pci_enable_device_mem(pdev); 11897 if (err) { 11898 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); 11899 return err; 11900 } 11901 pci_set_master(pdev); 11902 11903 /* no wakeup events while running */ 11904 pci_wake_from_d3(pdev, false); 11905 11906 /* handling the reset will rebuild the device state */ 11907 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 11908 clear_bit(__I40E_DOWN, &pf->state); 11909 rtnl_lock(); 11910 i40e_reset_and_rebuild(pf, false); 11911 rtnl_unlock(); 11912 } 11913 11914 return 0; 11915 } 11916 11917 #endif 11918 static const struct pci_error_handlers i40e_err_handler = { 11919 .error_detected = i40e_pci_error_detected, 11920 .slot_reset = i40e_pci_error_slot_reset, 11921 .resume = i40e_pci_error_resume, 11922 }; 11923 11924 static struct pci_driver i40e_driver = { 11925 .name = i40e_driver_name, 11926 .id_table = i40e_pci_tbl, 11927 .probe = i40e_probe, 11928 .remove = i40e_remove, 11929 #ifdef CONFIG_PM 11930 .suspend = i40e_suspend, 11931 .resume = i40e_resume, 11932 #endif 11933 .shutdown = i40e_shutdown, 11934 .err_handler = &i40e_err_handler, 11935 .sriov_configure = i40e_pci_sriov_configure, 11936 }; 11937 11938 /** 11939 * i40e_init_module - Driver registration routine 11940 * 11941 * i40e_init_module is the first routine called when the driver is 11942 * loaded. All it does is register with the PCI subsystem. 11943 **/ 11944 static int __init i40e_init_module(void) 11945 { 11946 pr_info("%s: %s - version %s\n", i40e_driver_name, 11947 i40e_driver_string, i40e_driver_version_str); 11948 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 11949 11950 /* we will see if single thread per module is enough for now, 11951 * it can't be any worse than using the system workqueue which 11952 * was already single threaded 11953 */ 11954 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1, 11955 i40e_driver_name); 11956 if (!i40e_wq) { 11957 pr_err("%s: Failed to create workqueue\n", i40e_driver_name); 11958 return -ENOMEM; 11959 } 11960 11961 i40e_dbg_init(); 11962 return pci_register_driver(&i40e_driver); 11963 } 11964 module_init(i40e_init_module); 11965 11966 /** 11967 * i40e_exit_module - Driver exit cleanup routine 11968 * 11969 * i40e_exit_module is called just before the driver is removed 11970 * from memory. 11971 **/ 11972 static void __exit i40e_exit_module(void) 11973 { 11974 pci_unregister_driver(&i40e_driver); 11975 destroy_workqueue(i40e_wq); 11976 i40e_dbg_exit(); 11977 } 11978 module_exit(i40e_exit_module); 11979