1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2015 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* Local includes */ 28 #include "i40e.h" 29 #include "i40e_diag.h" 30 #ifdef CONFIG_I40E_VXLAN 31 #include <net/vxlan.h> 32 #endif 33 34 const char i40e_driver_name[] = "i40e"; 35 static const char i40e_driver_string[] = 36 "Intel(R) Ethernet Connection XL710 Network Driver"; 37 38 #define DRV_KERN "-k" 39 40 #define DRV_VERSION_MAJOR 1 41 #define DRV_VERSION_MINOR 3 42 #define DRV_VERSION_BUILD 2 43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 44 __stringify(DRV_VERSION_MINOR) "." \ 45 __stringify(DRV_VERSION_BUILD) DRV_KERN 46 const char i40e_driver_version_str[] = DRV_VERSION; 47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 48 49 /* a bit of forward declarations */ 50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 51 static void i40e_handle_reset_warning(struct i40e_pf *pf); 52 static int i40e_add_vsi(struct i40e_vsi *vsi); 53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 55 static int i40e_setup_misc_vector(struct i40e_pf *pf); 56 static void i40e_determine_queue_usage(struct i40e_pf *pf); 57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 58 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 59 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 60 61 /* i40e_pci_tbl - PCI Device ID Table 62 * 63 * Last entry must be all 0s 64 * 65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 66 * Class, Class Mask, private data (not used) } 67 */ 68 static const struct pci_device_id i40e_pci_tbl[] = { 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 79 /* required last entry */ 80 {0, } 81 }; 82 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 83 84 #define I40E_MAX_VF_COUNT 128 85 static int debug = -1; 86 module_param(debug, int, 0); 87 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 88 89 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 90 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 91 MODULE_LICENSE("GPL"); 92 MODULE_VERSION(DRV_VERSION); 93 94 /** 95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 96 * @hw: pointer to the HW structure 97 * @mem: ptr to mem struct to fill out 98 * @size: size of memory requested 99 * @alignment: what to align the allocation to 100 **/ 101 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 102 u64 size, u32 alignment) 103 { 104 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 105 106 mem->size = ALIGN(size, alignment); 107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 108 &mem->pa, GFP_KERNEL); 109 if (!mem->va) 110 return -ENOMEM; 111 112 return 0; 113 } 114 115 /** 116 * i40e_free_dma_mem_d - OS specific memory free for shared code 117 * @hw: pointer to the HW structure 118 * @mem: ptr to mem struct to free 119 **/ 120 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 121 { 122 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 123 124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 125 mem->va = NULL; 126 mem->pa = 0; 127 mem->size = 0; 128 129 return 0; 130 } 131 132 /** 133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 134 * @hw: pointer to the HW structure 135 * @mem: ptr to mem struct to fill out 136 * @size: size of memory requested 137 **/ 138 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 139 u32 size) 140 { 141 mem->size = size; 142 mem->va = kzalloc(size, GFP_KERNEL); 143 144 if (!mem->va) 145 return -ENOMEM; 146 147 return 0; 148 } 149 150 /** 151 * i40e_free_virt_mem_d - OS specific memory free for shared code 152 * @hw: pointer to the HW structure 153 * @mem: ptr to mem struct to free 154 **/ 155 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 156 { 157 /* it's ok to kfree a NULL pointer */ 158 kfree(mem->va); 159 mem->va = NULL; 160 mem->size = 0; 161 162 return 0; 163 } 164 165 /** 166 * i40e_get_lump - find a lump of free generic resource 167 * @pf: board private structure 168 * @pile: the pile of resource to search 169 * @needed: the number of items needed 170 * @id: an owner id to stick on the items assigned 171 * 172 * Returns the base item index of the lump, or negative for error 173 * 174 * The search_hint trick and lack of advanced fit-finding only work 175 * because we're highly likely to have all the same size lump requests. 176 * Linear search time and any fragmentation should be minimal. 177 **/ 178 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 179 u16 needed, u16 id) 180 { 181 int ret = -ENOMEM; 182 int i, j; 183 184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 185 dev_info(&pf->pdev->dev, 186 "param err: pile=%p needed=%d id=0x%04x\n", 187 pile, needed, id); 188 return -EINVAL; 189 } 190 191 /* start the linear search with an imperfect hint */ 192 i = pile->search_hint; 193 while (i < pile->num_entries) { 194 /* skip already allocated entries */ 195 if (pile->list[i] & I40E_PILE_VALID_BIT) { 196 i++; 197 continue; 198 } 199 200 /* do we have enough in this lump? */ 201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 202 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 203 break; 204 } 205 206 if (j == needed) { 207 /* there was enough, so assign it to the requestor */ 208 for (j = 0; j < needed; j++) 209 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 210 ret = i; 211 pile->search_hint = i + j; 212 break; 213 } else { 214 /* not enough, so skip over it and continue looking */ 215 i += j; 216 } 217 } 218 219 return ret; 220 } 221 222 /** 223 * i40e_put_lump - return a lump of generic resource 224 * @pile: the pile of resource to search 225 * @index: the base item index 226 * @id: the owner id of the items assigned 227 * 228 * Returns the count of items in the lump 229 **/ 230 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 231 { 232 int valid_id = (id | I40E_PILE_VALID_BIT); 233 int count = 0; 234 int i; 235 236 if (!pile || index >= pile->num_entries) 237 return -EINVAL; 238 239 for (i = index; 240 i < pile->num_entries && pile->list[i] == valid_id; 241 i++) { 242 pile->list[i] = 0; 243 count++; 244 } 245 246 if (count && index < pile->search_hint) 247 pile->search_hint = index; 248 249 return count; 250 } 251 252 /** 253 * i40e_find_vsi_from_id - searches for the vsi with the given id 254 * @pf - the pf structure to search for the vsi 255 * @id - id of the vsi it is searching for 256 **/ 257 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 258 { 259 int i; 260 261 for (i = 0; i < pf->num_alloc_vsi; i++) 262 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 263 return pf->vsi[i]; 264 265 return NULL; 266 } 267 268 /** 269 * i40e_service_event_schedule - Schedule the service task to wake up 270 * @pf: board private structure 271 * 272 * If not already scheduled, this puts the task into the work queue 273 **/ 274 static void i40e_service_event_schedule(struct i40e_pf *pf) 275 { 276 if (!test_bit(__I40E_DOWN, &pf->state) && 277 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 278 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 279 schedule_work(&pf->service_task); 280 } 281 282 /** 283 * i40e_tx_timeout - Respond to a Tx Hang 284 * @netdev: network interface device structure 285 * 286 * If any port has noticed a Tx timeout, it is likely that the whole 287 * device is munged, not just the one netdev port, so go for the full 288 * reset. 289 **/ 290 #ifdef I40E_FCOE 291 void i40e_tx_timeout(struct net_device *netdev) 292 #else 293 static void i40e_tx_timeout(struct net_device *netdev) 294 #endif 295 { 296 struct i40e_netdev_priv *np = netdev_priv(netdev); 297 struct i40e_vsi *vsi = np->vsi; 298 struct i40e_pf *pf = vsi->back; 299 300 pf->tx_timeout_count++; 301 302 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 303 pf->tx_timeout_recovery_level = 1; 304 pf->tx_timeout_last_recovery = jiffies; 305 netdev_info(netdev, "tx_timeout recovery level %d\n", 306 pf->tx_timeout_recovery_level); 307 308 switch (pf->tx_timeout_recovery_level) { 309 case 0: 310 /* disable and re-enable queues for the VSI */ 311 if (in_interrupt()) { 312 set_bit(__I40E_REINIT_REQUESTED, &pf->state); 313 set_bit(__I40E_REINIT_REQUESTED, &vsi->state); 314 } else { 315 i40e_vsi_reinit_locked(vsi); 316 } 317 break; 318 case 1: 319 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 320 break; 321 case 2: 322 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 323 break; 324 case 3: 325 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 326 break; 327 default: 328 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 329 set_bit(__I40E_DOWN_REQUESTED, &pf->state); 330 set_bit(__I40E_DOWN_REQUESTED, &vsi->state); 331 break; 332 } 333 i40e_service_event_schedule(pf); 334 pf->tx_timeout_recovery_level++; 335 } 336 337 /** 338 * i40e_release_rx_desc - Store the new tail and head values 339 * @rx_ring: ring to bump 340 * @val: new head index 341 **/ 342 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) 343 { 344 rx_ring->next_to_use = val; 345 346 /* Force memory writes to complete before letting h/w 347 * know there are new descriptors to fetch. (Only 348 * applicable for weak-ordered memory model archs, 349 * such as IA-64). 350 */ 351 wmb(); 352 writel(val, rx_ring->tail); 353 } 354 355 /** 356 * i40e_get_vsi_stats_struct - Get System Network Statistics 357 * @vsi: the VSI we care about 358 * 359 * Returns the address of the device statistics structure. 360 * The statistics are actually updated from the service task. 361 **/ 362 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 363 { 364 return &vsi->net_stats; 365 } 366 367 /** 368 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 369 * @netdev: network interface device structure 370 * 371 * Returns the address of the device statistics structure. 372 * The statistics are actually updated from the service task. 373 **/ 374 #ifdef I40E_FCOE 375 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 376 struct net_device *netdev, 377 struct rtnl_link_stats64 *stats) 378 #else 379 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 380 struct net_device *netdev, 381 struct rtnl_link_stats64 *stats) 382 #endif 383 { 384 struct i40e_netdev_priv *np = netdev_priv(netdev); 385 struct i40e_ring *tx_ring, *rx_ring; 386 struct i40e_vsi *vsi = np->vsi; 387 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 388 int i; 389 390 if (test_bit(__I40E_DOWN, &vsi->state)) 391 return stats; 392 393 if (!vsi->tx_rings) 394 return stats; 395 396 rcu_read_lock(); 397 for (i = 0; i < vsi->num_queue_pairs; i++) { 398 u64 bytes, packets; 399 unsigned int start; 400 401 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 402 if (!tx_ring) 403 continue; 404 405 do { 406 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 407 packets = tx_ring->stats.packets; 408 bytes = tx_ring->stats.bytes; 409 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 410 411 stats->tx_packets += packets; 412 stats->tx_bytes += bytes; 413 rx_ring = &tx_ring[1]; 414 415 do { 416 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 417 packets = rx_ring->stats.packets; 418 bytes = rx_ring->stats.bytes; 419 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 420 421 stats->rx_packets += packets; 422 stats->rx_bytes += bytes; 423 } 424 rcu_read_unlock(); 425 426 /* following stats updated by i40e_watchdog_subtask() */ 427 stats->multicast = vsi_stats->multicast; 428 stats->tx_errors = vsi_stats->tx_errors; 429 stats->tx_dropped = vsi_stats->tx_dropped; 430 stats->rx_errors = vsi_stats->rx_errors; 431 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 432 stats->rx_length_errors = vsi_stats->rx_length_errors; 433 434 return stats; 435 } 436 437 /** 438 * i40e_vsi_reset_stats - Resets all stats of the given vsi 439 * @vsi: the VSI to have its stats reset 440 **/ 441 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 442 { 443 struct rtnl_link_stats64 *ns; 444 int i; 445 446 if (!vsi) 447 return; 448 449 ns = i40e_get_vsi_stats_struct(vsi); 450 memset(ns, 0, sizeof(*ns)); 451 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 452 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 453 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 454 if (vsi->rx_rings && vsi->rx_rings[0]) { 455 for (i = 0; i < vsi->num_queue_pairs; i++) { 456 memset(&vsi->rx_rings[i]->stats, 0 , 457 sizeof(vsi->rx_rings[i]->stats)); 458 memset(&vsi->rx_rings[i]->rx_stats, 0 , 459 sizeof(vsi->rx_rings[i]->rx_stats)); 460 memset(&vsi->tx_rings[i]->stats, 0 , 461 sizeof(vsi->tx_rings[i]->stats)); 462 memset(&vsi->tx_rings[i]->tx_stats, 0, 463 sizeof(vsi->tx_rings[i]->tx_stats)); 464 } 465 } 466 vsi->stat_offsets_loaded = false; 467 } 468 469 /** 470 * i40e_pf_reset_stats - Reset all of the stats for the given PF 471 * @pf: the PF to be reset 472 **/ 473 void i40e_pf_reset_stats(struct i40e_pf *pf) 474 { 475 int i; 476 477 memset(&pf->stats, 0, sizeof(pf->stats)); 478 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 479 pf->stat_offsets_loaded = false; 480 481 for (i = 0; i < I40E_MAX_VEB; i++) { 482 if (pf->veb[i]) { 483 memset(&pf->veb[i]->stats, 0, 484 sizeof(pf->veb[i]->stats)); 485 memset(&pf->veb[i]->stats_offsets, 0, 486 sizeof(pf->veb[i]->stats_offsets)); 487 pf->veb[i]->stat_offsets_loaded = false; 488 } 489 } 490 } 491 492 /** 493 * i40e_stat_update48 - read and update a 48 bit stat from the chip 494 * @hw: ptr to the hardware info 495 * @hireg: the high 32 bit reg to read 496 * @loreg: the low 32 bit reg to read 497 * @offset_loaded: has the initial offset been loaded yet 498 * @offset: ptr to current offset value 499 * @stat: ptr to the stat 500 * 501 * Since the device stats are not reset at PFReset, they likely will not 502 * be zeroed when the driver starts. We'll save the first values read 503 * and use them as offsets to be subtracted from the raw values in order 504 * to report stats that count from zero. In the process, we also manage 505 * the potential roll-over. 506 **/ 507 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 508 bool offset_loaded, u64 *offset, u64 *stat) 509 { 510 u64 new_data; 511 512 if (hw->device_id == I40E_DEV_ID_QEMU) { 513 new_data = rd32(hw, loreg); 514 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 515 } else { 516 new_data = rd64(hw, loreg); 517 } 518 if (!offset_loaded) 519 *offset = new_data; 520 if (likely(new_data >= *offset)) 521 *stat = new_data - *offset; 522 else 523 *stat = (new_data + ((u64)1 << 48)) - *offset; 524 *stat &= 0xFFFFFFFFFFFFULL; 525 } 526 527 /** 528 * i40e_stat_update32 - read and update a 32 bit stat from the chip 529 * @hw: ptr to the hardware info 530 * @reg: the hw reg to read 531 * @offset_loaded: has the initial offset been loaded yet 532 * @offset: ptr to current offset value 533 * @stat: ptr to the stat 534 **/ 535 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 536 bool offset_loaded, u64 *offset, u64 *stat) 537 { 538 u32 new_data; 539 540 new_data = rd32(hw, reg); 541 if (!offset_loaded) 542 *offset = new_data; 543 if (likely(new_data >= *offset)) 544 *stat = (u32)(new_data - *offset); 545 else 546 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); 547 } 548 549 /** 550 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 551 * @vsi: the VSI to be updated 552 **/ 553 void i40e_update_eth_stats(struct i40e_vsi *vsi) 554 { 555 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 556 struct i40e_pf *pf = vsi->back; 557 struct i40e_hw *hw = &pf->hw; 558 struct i40e_eth_stats *oes; 559 struct i40e_eth_stats *es; /* device's eth stats */ 560 561 es = &vsi->eth_stats; 562 oes = &vsi->eth_stats_offsets; 563 564 /* Gather up the stats that the hw collects */ 565 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 566 vsi->stat_offsets_loaded, 567 &oes->tx_errors, &es->tx_errors); 568 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 569 vsi->stat_offsets_loaded, 570 &oes->rx_discards, &es->rx_discards); 571 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 572 vsi->stat_offsets_loaded, 573 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 574 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 575 vsi->stat_offsets_loaded, 576 &oes->tx_errors, &es->tx_errors); 577 578 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 579 I40E_GLV_GORCL(stat_idx), 580 vsi->stat_offsets_loaded, 581 &oes->rx_bytes, &es->rx_bytes); 582 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 583 I40E_GLV_UPRCL(stat_idx), 584 vsi->stat_offsets_loaded, 585 &oes->rx_unicast, &es->rx_unicast); 586 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 587 I40E_GLV_MPRCL(stat_idx), 588 vsi->stat_offsets_loaded, 589 &oes->rx_multicast, &es->rx_multicast); 590 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 591 I40E_GLV_BPRCL(stat_idx), 592 vsi->stat_offsets_loaded, 593 &oes->rx_broadcast, &es->rx_broadcast); 594 595 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 596 I40E_GLV_GOTCL(stat_idx), 597 vsi->stat_offsets_loaded, 598 &oes->tx_bytes, &es->tx_bytes); 599 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 600 I40E_GLV_UPTCL(stat_idx), 601 vsi->stat_offsets_loaded, 602 &oes->tx_unicast, &es->tx_unicast); 603 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 604 I40E_GLV_MPTCL(stat_idx), 605 vsi->stat_offsets_loaded, 606 &oes->tx_multicast, &es->tx_multicast); 607 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 608 I40E_GLV_BPTCL(stat_idx), 609 vsi->stat_offsets_loaded, 610 &oes->tx_broadcast, &es->tx_broadcast); 611 vsi->stat_offsets_loaded = true; 612 } 613 614 /** 615 * i40e_update_veb_stats - Update Switch component statistics 616 * @veb: the VEB being updated 617 **/ 618 static void i40e_update_veb_stats(struct i40e_veb *veb) 619 { 620 struct i40e_pf *pf = veb->pf; 621 struct i40e_hw *hw = &pf->hw; 622 struct i40e_eth_stats *oes; 623 struct i40e_eth_stats *es; /* device's eth stats */ 624 int idx = 0; 625 626 idx = veb->stats_idx; 627 es = &veb->stats; 628 oes = &veb->stats_offsets; 629 630 /* Gather up the stats that the hw collects */ 631 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 632 veb->stat_offsets_loaded, 633 &oes->tx_discards, &es->tx_discards); 634 if (hw->revision_id > 0) 635 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 636 veb->stat_offsets_loaded, 637 &oes->rx_unknown_protocol, 638 &es->rx_unknown_protocol); 639 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 640 veb->stat_offsets_loaded, 641 &oes->rx_bytes, &es->rx_bytes); 642 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 643 veb->stat_offsets_loaded, 644 &oes->rx_unicast, &es->rx_unicast); 645 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 646 veb->stat_offsets_loaded, 647 &oes->rx_multicast, &es->rx_multicast); 648 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 649 veb->stat_offsets_loaded, 650 &oes->rx_broadcast, &es->rx_broadcast); 651 652 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 653 veb->stat_offsets_loaded, 654 &oes->tx_bytes, &es->tx_bytes); 655 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 656 veb->stat_offsets_loaded, 657 &oes->tx_unicast, &es->tx_unicast); 658 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 659 veb->stat_offsets_loaded, 660 &oes->tx_multicast, &es->tx_multicast); 661 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 662 veb->stat_offsets_loaded, 663 &oes->tx_broadcast, &es->tx_broadcast); 664 veb->stat_offsets_loaded = true; 665 } 666 667 #ifdef I40E_FCOE 668 /** 669 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 670 * @vsi: the VSI that is capable of doing FCoE 671 **/ 672 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 673 { 674 struct i40e_pf *pf = vsi->back; 675 struct i40e_hw *hw = &pf->hw; 676 struct i40e_fcoe_stats *ofs; 677 struct i40e_fcoe_stats *fs; /* device's eth stats */ 678 int idx; 679 680 if (vsi->type != I40E_VSI_FCOE) 681 return; 682 683 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET; 684 fs = &vsi->fcoe_stats; 685 ofs = &vsi->fcoe_stats_offsets; 686 687 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 688 vsi->fcoe_stat_offsets_loaded, 689 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 690 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 691 vsi->fcoe_stat_offsets_loaded, 692 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 693 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 694 vsi->fcoe_stat_offsets_loaded, 695 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 696 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 697 vsi->fcoe_stat_offsets_loaded, 698 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 699 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 700 vsi->fcoe_stat_offsets_loaded, 701 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 702 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 703 vsi->fcoe_stat_offsets_loaded, 704 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 705 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 706 vsi->fcoe_stat_offsets_loaded, 707 &ofs->fcoe_last_error, &fs->fcoe_last_error); 708 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 709 vsi->fcoe_stat_offsets_loaded, 710 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 711 712 vsi->fcoe_stat_offsets_loaded = true; 713 } 714 715 #endif 716 /** 717 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode 718 * @pf: the corresponding PF 719 * 720 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode 721 **/ 722 static void i40e_update_link_xoff_rx(struct i40e_pf *pf) 723 { 724 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 725 struct i40e_hw_port_stats *nsd = &pf->stats; 726 struct i40e_hw *hw = &pf->hw; 727 u64 xoff = 0; 728 u16 i, v; 729 730 if ((hw->fc.current_mode != I40E_FC_FULL) && 731 (hw->fc.current_mode != I40E_FC_RX_PAUSE)) 732 return; 733 734 xoff = nsd->link_xoff_rx; 735 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 736 pf->stat_offsets_loaded, 737 &osd->link_xoff_rx, &nsd->link_xoff_rx); 738 739 /* No new LFC xoff rx */ 740 if (!(nsd->link_xoff_rx - xoff)) 741 return; 742 743 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ 744 for (v = 0; v < pf->num_alloc_vsi; v++) { 745 struct i40e_vsi *vsi = pf->vsi[v]; 746 747 if (!vsi || !vsi->tx_rings[0]) 748 continue; 749 750 for (i = 0; i < vsi->num_queue_pairs; i++) { 751 struct i40e_ring *ring = vsi->tx_rings[i]; 752 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 753 } 754 } 755 } 756 757 /** 758 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode 759 * @pf: the corresponding PF 760 * 761 * Update the Rx XOFF counter (PAUSE frames) in PFC mode 762 **/ 763 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) 764 { 765 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 766 struct i40e_hw_port_stats *nsd = &pf->stats; 767 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; 768 struct i40e_dcbx_config *dcb_cfg; 769 struct i40e_hw *hw = &pf->hw; 770 u16 i, v; 771 u8 tc; 772 773 dcb_cfg = &hw->local_dcbx_config; 774 775 /* See if DCB enabled with PFC TC */ 776 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) || 777 !(dcb_cfg->pfc.pfcenable)) { 778 i40e_update_link_xoff_rx(pf); 779 return; 780 } 781 782 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 783 u64 prio_xoff = nsd->priority_xoff_rx[i]; 784 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 785 pf->stat_offsets_loaded, 786 &osd->priority_xoff_rx[i], 787 &nsd->priority_xoff_rx[i]); 788 789 /* No new PFC xoff rx */ 790 if (!(nsd->priority_xoff_rx[i] - prio_xoff)) 791 continue; 792 /* Get the TC for given priority */ 793 tc = dcb_cfg->etscfg.prioritytable[i]; 794 xoff[tc] = true; 795 } 796 797 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ 798 for (v = 0; v < pf->num_alloc_vsi; v++) { 799 struct i40e_vsi *vsi = pf->vsi[v]; 800 801 if (!vsi || !vsi->tx_rings[0]) 802 continue; 803 804 for (i = 0; i < vsi->num_queue_pairs; i++) { 805 struct i40e_ring *ring = vsi->tx_rings[i]; 806 807 tc = ring->dcb_tc; 808 if (xoff[tc]) 809 clear_bit(__I40E_HANG_CHECK_ARMED, 810 &ring->state); 811 } 812 } 813 } 814 815 /** 816 * i40e_update_vsi_stats - Update the vsi statistics counters. 817 * @vsi: the VSI to be updated 818 * 819 * There are a few instances where we store the same stat in a 820 * couple of different structs. This is partly because we have 821 * the netdev stats that need to be filled out, which is slightly 822 * different from the "eth_stats" defined by the chip and used in 823 * VF communications. We sort it out here. 824 **/ 825 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 826 { 827 struct i40e_pf *pf = vsi->back; 828 struct rtnl_link_stats64 *ons; 829 struct rtnl_link_stats64 *ns; /* netdev stats */ 830 struct i40e_eth_stats *oes; 831 struct i40e_eth_stats *es; /* device's eth stats */ 832 u32 tx_restart, tx_busy; 833 struct i40e_ring *p; 834 u32 rx_page, rx_buf; 835 u64 bytes, packets; 836 unsigned int start; 837 u64 rx_p, rx_b; 838 u64 tx_p, tx_b; 839 u16 q; 840 841 if (test_bit(__I40E_DOWN, &vsi->state) || 842 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 843 return; 844 845 ns = i40e_get_vsi_stats_struct(vsi); 846 ons = &vsi->net_stats_offsets; 847 es = &vsi->eth_stats; 848 oes = &vsi->eth_stats_offsets; 849 850 /* Gather up the netdev and vsi stats that the driver collects 851 * on the fly during packet processing 852 */ 853 rx_b = rx_p = 0; 854 tx_b = tx_p = 0; 855 tx_restart = tx_busy = 0; 856 rx_page = 0; 857 rx_buf = 0; 858 rcu_read_lock(); 859 for (q = 0; q < vsi->num_queue_pairs; q++) { 860 /* locate Tx ring */ 861 p = ACCESS_ONCE(vsi->tx_rings[q]); 862 863 do { 864 start = u64_stats_fetch_begin_irq(&p->syncp); 865 packets = p->stats.packets; 866 bytes = p->stats.bytes; 867 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 868 tx_b += bytes; 869 tx_p += packets; 870 tx_restart += p->tx_stats.restart_queue; 871 tx_busy += p->tx_stats.tx_busy; 872 873 /* Rx queue is part of the same block as Tx queue */ 874 p = &p[1]; 875 do { 876 start = u64_stats_fetch_begin_irq(&p->syncp); 877 packets = p->stats.packets; 878 bytes = p->stats.bytes; 879 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 880 rx_b += bytes; 881 rx_p += packets; 882 rx_buf += p->rx_stats.alloc_buff_failed; 883 rx_page += p->rx_stats.alloc_page_failed; 884 } 885 rcu_read_unlock(); 886 vsi->tx_restart = tx_restart; 887 vsi->tx_busy = tx_busy; 888 vsi->rx_page_failed = rx_page; 889 vsi->rx_buf_failed = rx_buf; 890 891 ns->rx_packets = rx_p; 892 ns->rx_bytes = rx_b; 893 ns->tx_packets = tx_p; 894 ns->tx_bytes = tx_b; 895 896 /* update netdev stats from eth stats */ 897 i40e_update_eth_stats(vsi); 898 ons->tx_errors = oes->tx_errors; 899 ns->tx_errors = es->tx_errors; 900 ons->multicast = oes->rx_multicast; 901 ns->multicast = es->rx_multicast; 902 ons->rx_dropped = oes->rx_discards; 903 ns->rx_dropped = es->rx_discards; 904 ons->tx_dropped = oes->tx_discards; 905 ns->tx_dropped = es->tx_discards; 906 907 /* pull in a couple PF stats if this is the main vsi */ 908 if (vsi == pf->vsi[pf->lan_vsi]) { 909 ns->rx_crc_errors = pf->stats.crc_errors; 910 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 911 ns->rx_length_errors = pf->stats.rx_length_errors; 912 } 913 } 914 915 /** 916 * i40e_update_pf_stats - Update the PF statistics counters. 917 * @pf: the PF to be updated 918 **/ 919 static void i40e_update_pf_stats(struct i40e_pf *pf) 920 { 921 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 922 struct i40e_hw_port_stats *nsd = &pf->stats; 923 struct i40e_hw *hw = &pf->hw; 924 u32 val; 925 int i; 926 927 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 928 I40E_GLPRT_GORCL(hw->port), 929 pf->stat_offsets_loaded, 930 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 931 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 932 I40E_GLPRT_GOTCL(hw->port), 933 pf->stat_offsets_loaded, 934 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 935 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 936 pf->stat_offsets_loaded, 937 &osd->eth.rx_discards, 938 &nsd->eth.rx_discards); 939 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 940 I40E_GLPRT_UPRCL(hw->port), 941 pf->stat_offsets_loaded, 942 &osd->eth.rx_unicast, 943 &nsd->eth.rx_unicast); 944 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 945 I40E_GLPRT_MPRCL(hw->port), 946 pf->stat_offsets_loaded, 947 &osd->eth.rx_multicast, 948 &nsd->eth.rx_multicast); 949 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 950 I40E_GLPRT_BPRCL(hw->port), 951 pf->stat_offsets_loaded, 952 &osd->eth.rx_broadcast, 953 &nsd->eth.rx_broadcast); 954 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 955 I40E_GLPRT_UPTCL(hw->port), 956 pf->stat_offsets_loaded, 957 &osd->eth.tx_unicast, 958 &nsd->eth.tx_unicast); 959 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 960 I40E_GLPRT_MPTCL(hw->port), 961 pf->stat_offsets_loaded, 962 &osd->eth.tx_multicast, 963 &nsd->eth.tx_multicast); 964 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 965 I40E_GLPRT_BPTCL(hw->port), 966 pf->stat_offsets_loaded, 967 &osd->eth.tx_broadcast, 968 &nsd->eth.tx_broadcast); 969 970 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 971 pf->stat_offsets_loaded, 972 &osd->tx_dropped_link_down, 973 &nsd->tx_dropped_link_down); 974 975 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 976 pf->stat_offsets_loaded, 977 &osd->crc_errors, &nsd->crc_errors); 978 979 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 980 pf->stat_offsets_loaded, 981 &osd->illegal_bytes, &nsd->illegal_bytes); 982 983 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 984 pf->stat_offsets_loaded, 985 &osd->mac_local_faults, 986 &nsd->mac_local_faults); 987 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 988 pf->stat_offsets_loaded, 989 &osd->mac_remote_faults, 990 &nsd->mac_remote_faults); 991 992 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 993 pf->stat_offsets_loaded, 994 &osd->rx_length_errors, 995 &nsd->rx_length_errors); 996 997 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 998 pf->stat_offsets_loaded, 999 &osd->link_xon_rx, &nsd->link_xon_rx); 1000 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 1001 pf->stat_offsets_loaded, 1002 &osd->link_xon_tx, &nsd->link_xon_tx); 1003 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ 1004 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 1005 pf->stat_offsets_loaded, 1006 &osd->link_xoff_tx, &nsd->link_xoff_tx); 1007 1008 for (i = 0; i < 8; i++) { 1009 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 1010 pf->stat_offsets_loaded, 1011 &osd->priority_xon_rx[i], 1012 &nsd->priority_xon_rx[i]); 1013 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 1014 pf->stat_offsets_loaded, 1015 &osd->priority_xon_tx[i], 1016 &nsd->priority_xon_tx[i]); 1017 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 1018 pf->stat_offsets_loaded, 1019 &osd->priority_xoff_tx[i], 1020 &nsd->priority_xoff_tx[i]); 1021 i40e_stat_update32(hw, 1022 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 1023 pf->stat_offsets_loaded, 1024 &osd->priority_xon_2_xoff[i], 1025 &nsd->priority_xon_2_xoff[i]); 1026 } 1027 1028 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1029 I40E_GLPRT_PRC64L(hw->port), 1030 pf->stat_offsets_loaded, 1031 &osd->rx_size_64, &nsd->rx_size_64); 1032 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1033 I40E_GLPRT_PRC127L(hw->port), 1034 pf->stat_offsets_loaded, 1035 &osd->rx_size_127, &nsd->rx_size_127); 1036 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1037 I40E_GLPRT_PRC255L(hw->port), 1038 pf->stat_offsets_loaded, 1039 &osd->rx_size_255, &nsd->rx_size_255); 1040 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1041 I40E_GLPRT_PRC511L(hw->port), 1042 pf->stat_offsets_loaded, 1043 &osd->rx_size_511, &nsd->rx_size_511); 1044 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1045 I40E_GLPRT_PRC1023L(hw->port), 1046 pf->stat_offsets_loaded, 1047 &osd->rx_size_1023, &nsd->rx_size_1023); 1048 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1049 I40E_GLPRT_PRC1522L(hw->port), 1050 pf->stat_offsets_loaded, 1051 &osd->rx_size_1522, &nsd->rx_size_1522); 1052 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1053 I40E_GLPRT_PRC9522L(hw->port), 1054 pf->stat_offsets_loaded, 1055 &osd->rx_size_big, &nsd->rx_size_big); 1056 1057 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1058 I40E_GLPRT_PTC64L(hw->port), 1059 pf->stat_offsets_loaded, 1060 &osd->tx_size_64, &nsd->tx_size_64); 1061 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1062 I40E_GLPRT_PTC127L(hw->port), 1063 pf->stat_offsets_loaded, 1064 &osd->tx_size_127, &nsd->tx_size_127); 1065 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1066 I40E_GLPRT_PTC255L(hw->port), 1067 pf->stat_offsets_loaded, 1068 &osd->tx_size_255, &nsd->tx_size_255); 1069 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1070 I40E_GLPRT_PTC511L(hw->port), 1071 pf->stat_offsets_loaded, 1072 &osd->tx_size_511, &nsd->tx_size_511); 1073 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1074 I40E_GLPRT_PTC1023L(hw->port), 1075 pf->stat_offsets_loaded, 1076 &osd->tx_size_1023, &nsd->tx_size_1023); 1077 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1078 I40E_GLPRT_PTC1522L(hw->port), 1079 pf->stat_offsets_loaded, 1080 &osd->tx_size_1522, &nsd->tx_size_1522); 1081 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1082 I40E_GLPRT_PTC9522L(hw->port), 1083 pf->stat_offsets_loaded, 1084 &osd->tx_size_big, &nsd->tx_size_big); 1085 1086 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1087 pf->stat_offsets_loaded, 1088 &osd->rx_undersize, &nsd->rx_undersize); 1089 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1090 pf->stat_offsets_loaded, 1091 &osd->rx_fragments, &nsd->rx_fragments); 1092 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1093 pf->stat_offsets_loaded, 1094 &osd->rx_oversize, &nsd->rx_oversize); 1095 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1096 pf->stat_offsets_loaded, 1097 &osd->rx_jabber, &nsd->rx_jabber); 1098 1099 /* FDIR stats */ 1100 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx), 1101 pf->stat_offsets_loaded, 1102 &osd->fd_atr_match, &nsd->fd_atr_match); 1103 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx), 1104 pf->stat_offsets_loaded, 1105 &osd->fd_sb_match, &nsd->fd_sb_match); 1106 1107 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1108 nsd->tx_lpi_status = 1109 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1110 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1111 nsd->rx_lpi_status = 1112 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1113 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1114 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1115 pf->stat_offsets_loaded, 1116 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1117 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1118 pf->stat_offsets_loaded, 1119 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1120 1121 pf->stat_offsets_loaded = true; 1122 } 1123 1124 /** 1125 * i40e_update_stats - Update the various statistics counters. 1126 * @vsi: the VSI to be updated 1127 * 1128 * Update the various stats for this VSI and its related entities. 1129 **/ 1130 void i40e_update_stats(struct i40e_vsi *vsi) 1131 { 1132 struct i40e_pf *pf = vsi->back; 1133 1134 if (vsi == pf->vsi[pf->lan_vsi]) 1135 i40e_update_pf_stats(pf); 1136 1137 i40e_update_vsi_stats(vsi); 1138 #ifdef I40E_FCOE 1139 i40e_update_fcoe_stats(vsi); 1140 #endif 1141 } 1142 1143 /** 1144 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1145 * @vsi: the VSI to be searched 1146 * @macaddr: the MAC address 1147 * @vlan: the vlan 1148 * @is_vf: make sure its a VF filter, else doesn't matter 1149 * @is_netdev: make sure its a netdev filter, else doesn't matter 1150 * 1151 * Returns ptr to the filter object or NULL 1152 **/ 1153 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1154 u8 *macaddr, s16 vlan, 1155 bool is_vf, bool is_netdev) 1156 { 1157 struct i40e_mac_filter *f; 1158 1159 if (!vsi || !macaddr) 1160 return NULL; 1161 1162 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1163 if ((ether_addr_equal(macaddr, f->macaddr)) && 1164 (vlan == f->vlan) && 1165 (!is_vf || f->is_vf) && 1166 (!is_netdev || f->is_netdev)) 1167 return f; 1168 } 1169 return NULL; 1170 } 1171 1172 /** 1173 * i40e_find_mac - Find a mac addr in the macvlan filters list 1174 * @vsi: the VSI to be searched 1175 * @macaddr: the MAC address we are searching for 1176 * @is_vf: make sure its a VF filter, else doesn't matter 1177 * @is_netdev: make sure its a netdev filter, else doesn't matter 1178 * 1179 * Returns the first filter with the provided MAC address or NULL if 1180 * MAC address was not found 1181 **/ 1182 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, 1183 bool is_vf, bool is_netdev) 1184 { 1185 struct i40e_mac_filter *f; 1186 1187 if (!vsi || !macaddr) 1188 return NULL; 1189 1190 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1191 if ((ether_addr_equal(macaddr, f->macaddr)) && 1192 (!is_vf || f->is_vf) && 1193 (!is_netdev || f->is_netdev)) 1194 return f; 1195 } 1196 return NULL; 1197 } 1198 1199 /** 1200 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1201 * @vsi: the VSI to be searched 1202 * 1203 * Returns true if VSI is in vlan mode or false otherwise 1204 **/ 1205 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1206 { 1207 struct i40e_mac_filter *f; 1208 1209 /* Only -1 for all the filters denotes not in vlan mode 1210 * so we have to go through all the list in order to make sure 1211 */ 1212 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1213 if (f->vlan >= 0) 1214 return true; 1215 } 1216 1217 return false; 1218 } 1219 1220 /** 1221 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans 1222 * @vsi: the VSI to be searched 1223 * @macaddr: the mac address to be filtered 1224 * @is_vf: true if it is a VF 1225 * @is_netdev: true if it is a netdev 1226 * 1227 * Goes through all the macvlan filters and adds a 1228 * macvlan filter for each unique vlan that already exists 1229 * 1230 * Returns first filter found on success, else NULL 1231 **/ 1232 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1233 bool is_vf, bool is_netdev) 1234 { 1235 struct i40e_mac_filter *f; 1236 1237 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1238 if (!i40e_find_filter(vsi, macaddr, f->vlan, 1239 is_vf, is_netdev)) { 1240 if (!i40e_add_filter(vsi, macaddr, f->vlan, 1241 is_vf, is_netdev)) 1242 return NULL; 1243 } 1244 } 1245 1246 return list_first_entry_or_null(&vsi->mac_filter_list, 1247 struct i40e_mac_filter, list); 1248 } 1249 1250 /** 1251 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1252 * @vsi: the PF Main VSI - inappropriate for any other VSI 1253 * @macaddr: the MAC address 1254 * 1255 * Some older firmware configurations set up a default promiscuous VLAN 1256 * filter that needs to be removed. 1257 **/ 1258 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1259 { 1260 struct i40e_aqc_remove_macvlan_element_data element; 1261 struct i40e_pf *pf = vsi->back; 1262 i40e_status aq_ret; 1263 1264 /* Only appropriate for the PF main VSI */ 1265 if (vsi->type != I40E_VSI_MAIN) 1266 return -EINVAL; 1267 1268 memset(&element, 0, sizeof(element)); 1269 ether_addr_copy(element.mac_addr, macaddr); 1270 element.vlan_tag = 0; 1271 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1272 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1273 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1274 if (aq_ret) 1275 return -ENOENT; 1276 1277 return 0; 1278 } 1279 1280 /** 1281 * i40e_add_filter - Add a mac/vlan filter to the VSI 1282 * @vsi: the VSI to be searched 1283 * @macaddr: the MAC address 1284 * @vlan: the vlan 1285 * @is_vf: make sure its a VF filter, else doesn't matter 1286 * @is_netdev: make sure its a netdev filter, else doesn't matter 1287 * 1288 * Returns ptr to the filter object or NULL when no memory available. 1289 **/ 1290 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1291 u8 *macaddr, s16 vlan, 1292 bool is_vf, bool is_netdev) 1293 { 1294 struct i40e_mac_filter *f; 1295 1296 if (!vsi || !macaddr) 1297 return NULL; 1298 1299 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1300 if (!f) { 1301 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1302 if (!f) 1303 goto add_filter_out; 1304 1305 ether_addr_copy(f->macaddr, macaddr); 1306 f->vlan = vlan; 1307 f->changed = true; 1308 1309 INIT_LIST_HEAD(&f->list); 1310 list_add(&f->list, &vsi->mac_filter_list); 1311 } 1312 1313 /* increment counter and add a new flag if needed */ 1314 if (is_vf) { 1315 if (!f->is_vf) { 1316 f->is_vf = true; 1317 f->counter++; 1318 } 1319 } else if (is_netdev) { 1320 if (!f->is_netdev) { 1321 f->is_netdev = true; 1322 f->counter++; 1323 } 1324 } else { 1325 f->counter++; 1326 } 1327 1328 /* changed tells sync_filters_subtask to 1329 * push the filter down to the firmware 1330 */ 1331 if (f->changed) { 1332 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1333 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1334 } 1335 1336 add_filter_out: 1337 return f; 1338 } 1339 1340 /** 1341 * i40e_del_filter - Remove a mac/vlan filter from the VSI 1342 * @vsi: the VSI to be searched 1343 * @macaddr: the MAC address 1344 * @vlan: the vlan 1345 * @is_vf: make sure it's a VF filter, else doesn't matter 1346 * @is_netdev: make sure it's a netdev filter, else doesn't matter 1347 **/ 1348 void i40e_del_filter(struct i40e_vsi *vsi, 1349 u8 *macaddr, s16 vlan, 1350 bool is_vf, bool is_netdev) 1351 { 1352 struct i40e_mac_filter *f; 1353 1354 if (!vsi || !macaddr) 1355 return; 1356 1357 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1358 if (!f || f->counter == 0) 1359 return; 1360 1361 if (is_vf) { 1362 if (f->is_vf) { 1363 f->is_vf = false; 1364 f->counter--; 1365 } 1366 } else if (is_netdev) { 1367 if (f->is_netdev) { 1368 f->is_netdev = false; 1369 f->counter--; 1370 } 1371 } else { 1372 /* make sure we don't remove a filter in use by VF or netdev */ 1373 int min_f = 0; 1374 min_f += (f->is_vf ? 1 : 0); 1375 min_f += (f->is_netdev ? 1 : 0); 1376 1377 if (f->counter > min_f) 1378 f->counter--; 1379 } 1380 1381 /* counter == 0 tells sync_filters_subtask to 1382 * remove the filter from the firmware's list 1383 */ 1384 if (f->counter == 0) { 1385 f->changed = true; 1386 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1387 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1388 } 1389 } 1390 1391 /** 1392 * i40e_set_mac - NDO callback to set mac address 1393 * @netdev: network interface device structure 1394 * @p: pointer to an address structure 1395 * 1396 * Returns 0 on success, negative on failure 1397 **/ 1398 #ifdef I40E_FCOE 1399 int i40e_set_mac(struct net_device *netdev, void *p) 1400 #else 1401 static int i40e_set_mac(struct net_device *netdev, void *p) 1402 #endif 1403 { 1404 struct i40e_netdev_priv *np = netdev_priv(netdev); 1405 struct i40e_vsi *vsi = np->vsi; 1406 struct i40e_pf *pf = vsi->back; 1407 struct i40e_hw *hw = &pf->hw; 1408 struct sockaddr *addr = p; 1409 struct i40e_mac_filter *f; 1410 1411 if (!is_valid_ether_addr(addr->sa_data)) 1412 return -EADDRNOTAVAIL; 1413 1414 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1415 netdev_info(netdev, "already using mac address %pM\n", 1416 addr->sa_data); 1417 return 0; 1418 } 1419 1420 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1421 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1422 return -EADDRNOTAVAIL; 1423 1424 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1425 netdev_info(netdev, "returning to hw mac address %pM\n", 1426 hw->mac.addr); 1427 else 1428 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1429 1430 if (vsi->type == I40E_VSI_MAIN) { 1431 i40e_status ret; 1432 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1433 I40E_AQC_WRITE_TYPE_LAA_WOL, 1434 addr->sa_data, NULL); 1435 if (ret) { 1436 netdev_info(netdev, 1437 "Addr change for Main VSI failed: %d\n", 1438 ret); 1439 return -EADDRNOTAVAIL; 1440 } 1441 } 1442 1443 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) { 1444 struct i40e_aqc_remove_macvlan_element_data element; 1445 1446 memset(&element, 0, sizeof(element)); 1447 ether_addr_copy(element.mac_addr, netdev->dev_addr); 1448 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1449 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1450 } else { 1451 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 1452 false, false); 1453 } 1454 1455 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) { 1456 struct i40e_aqc_add_macvlan_element_data element; 1457 1458 memset(&element, 0, sizeof(element)); 1459 ether_addr_copy(element.mac_addr, hw->mac.addr); 1460 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 1461 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1462 } else { 1463 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, 1464 false, false); 1465 if (f) 1466 f->is_laa = true; 1467 } 1468 1469 i40e_sync_vsi_filters(vsi); 1470 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1471 1472 return 0; 1473 } 1474 1475 /** 1476 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1477 * @vsi: the VSI being setup 1478 * @ctxt: VSI context structure 1479 * @enabled_tc: Enabled TCs bitmap 1480 * @is_add: True if called before Add VSI 1481 * 1482 * Setup VSI queue mapping for enabled traffic classes. 1483 **/ 1484 #ifdef I40E_FCOE 1485 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1486 struct i40e_vsi_context *ctxt, 1487 u8 enabled_tc, 1488 bool is_add) 1489 #else 1490 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1491 struct i40e_vsi_context *ctxt, 1492 u8 enabled_tc, 1493 bool is_add) 1494 #endif 1495 { 1496 struct i40e_pf *pf = vsi->back; 1497 u16 sections = 0; 1498 u8 netdev_tc = 0; 1499 u16 numtc = 0; 1500 u16 qcount; 1501 u8 offset; 1502 u16 qmap; 1503 int i; 1504 u16 num_tc_qps = 0; 1505 1506 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1507 offset = 0; 1508 1509 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1510 /* Find numtc from enabled TC bitmap */ 1511 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1512 if (enabled_tc & (1 << i)) /* TC is enabled */ 1513 numtc++; 1514 } 1515 if (!numtc) { 1516 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1517 numtc = 1; 1518 } 1519 } else { 1520 /* At least TC0 is enabled in case of non-DCB case */ 1521 numtc = 1; 1522 } 1523 1524 vsi->tc_config.numtc = numtc; 1525 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1526 /* Number of queues per enabled TC */ 1527 /* In MFP case we can have a much lower count of MSIx 1528 * vectors available and so we need to lower the used 1529 * q count. 1530 */ 1531 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix); 1532 num_tc_qps = qcount / numtc; 1533 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1534 1535 /* Setup queue offset/count for all TCs for given VSI */ 1536 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1537 /* See if the given TC is enabled for the given VSI */ 1538 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ 1539 int pow, num_qps; 1540 1541 switch (vsi->type) { 1542 case I40E_VSI_MAIN: 1543 qcount = min_t(int, pf->rss_size, num_tc_qps); 1544 break; 1545 #ifdef I40E_FCOE 1546 case I40E_VSI_FCOE: 1547 qcount = num_tc_qps; 1548 break; 1549 #endif 1550 case I40E_VSI_FDIR: 1551 case I40E_VSI_SRIOV: 1552 case I40E_VSI_VMDQ2: 1553 default: 1554 qcount = num_tc_qps; 1555 WARN_ON(i != 0); 1556 break; 1557 } 1558 vsi->tc_config.tc_info[i].qoffset = offset; 1559 vsi->tc_config.tc_info[i].qcount = qcount; 1560 1561 /* find the next higher power-of-2 of num queue pairs */ 1562 num_qps = qcount; 1563 pow = 0; 1564 while (num_qps && ((1 << pow) < qcount)) { 1565 pow++; 1566 num_qps >>= 1; 1567 } 1568 1569 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1570 qmap = 1571 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1572 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1573 1574 offset += qcount; 1575 } else { 1576 /* TC is not enabled so set the offset to 1577 * default queue and allocate one queue 1578 * for the given TC. 1579 */ 1580 vsi->tc_config.tc_info[i].qoffset = 0; 1581 vsi->tc_config.tc_info[i].qcount = 1; 1582 vsi->tc_config.tc_info[i].netdev_tc = 0; 1583 1584 qmap = 0; 1585 } 1586 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1587 } 1588 1589 /* Set actual Tx/Rx queue pairs */ 1590 vsi->num_queue_pairs = offset; 1591 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1592 if (vsi->req_queue_pairs > 0) 1593 vsi->num_queue_pairs = vsi->req_queue_pairs; 1594 else 1595 vsi->num_queue_pairs = pf->num_lan_msix; 1596 } 1597 1598 /* Scheduler section valid can only be set for ADD VSI */ 1599 if (is_add) { 1600 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1601 1602 ctxt->info.up_enable_bits = enabled_tc; 1603 } 1604 if (vsi->type == I40E_VSI_SRIOV) { 1605 ctxt->info.mapping_flags |= 1606 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1607 for (i = 0; i < vsi->num_queue_pairs; i++) 1608 ctxt->info.queue_mapping[i] = 1609 cpu_to_le16(vsi->base_queue + i); 1610 } else { 1611 ctxt->info.mapping_flags |= 1612 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1613 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1614 } 1615 ctxt->info.valid_sections |= cpu_to_le16(sections); 1616 } 1617 1618 /** 1619 * i40e_set_rx_mode - NDO callback to set the netdev filters 1620 * @netdev: network interface device structure 1621 **/ 1622 #ifdef I40E_FCOE 1623 void i40e_set_rx_mode(struct net_device *netdev) 1624 #else 1625 static void i40e_set_rx_mode(struct net_device *netdev) 1626 #endif 1627 { 1628 struct i40e_netdev_priv *np = netdev_priv(netdev); 1629 struct i40e_mac_filter *f, *ftmp; 1630 struct i40e_vsi *vsi = np->vsi; 1631 struct netdev_hw_addr *uca; 1632 struct netdev_hw_addr *mca; 1633 struct netdev_hw_addr *ha; 1634 1635 /* add addr if not already in the filter list */ 1636 netdev_for_each_uc_addr(uca, netdev) { 1637 if (!i40e_find_mac(vsi, uca->addr, false, true)) { 1638 if (i40e_is_vsi_in_vlan(vsi)) 1639 i40e_put_mac_in_vlan(vsi, uca->addr, 1640 false, true); 1641 else 1642 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, 1643 false, true); 1644 } 1645 } 1646 1647 netdev_for_each_mc_addr(mca, netdev) { 1648 if (!i40e_find_mac(vsi, mca->addr, false, true)) { 1649 if (i40e_is_vsi_in_vlan(vsi)) 1650 i40e_put_mac_in_vlan(vsi, mca->addr, 1651 false, true); 1652 else 1653 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, 1654 false, true); 1655 } 1656 } 1657 1658 /* remove filter if not in netdev list */ 1659 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1660 bool found = false; 1661 1662 if (!f->is_netdev) 1663 continue; 1664 1665 if (is_multicast_ether_addr(f->macaddr)) { 1666 netdev_for_each_mc_addr(mca, netdev) { 1667 if (ether_addr_equal(mca->addr, f->macaddr)) { 1668 found = true; 1669 break; 1670 } 1671 } 1672 } else { 1673 netdev_for_each_uc_addr(uca, netdev) { 1674 if (ether_addr_equal(uca->addr, f->macaddr)) { 1675 found = true; 1676 break; 1677 } 1678 } 1679 1680 for_each_dev_addr(netdev, ha) { 1681 if (ether_addr_equal(ha->addr, f->macaddr)) { 1682 found = true; 1683 break; 1684 } 1685 } 1686 } 1687 if (!found) 1688 i40e_del_filter( 1689 vsi, f->macaddr, I40E_VLAN_ANY, false, true); 1690 } 1691 1692 /* check for other flag changes */ 1693 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1694 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1695 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1696 } 1697 } 1698 1699 /** 1700 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 1701 * @vsi: ptr to the VSI 1702 * 1703 * Push any outstanding VSI filter changes through the AdminQ. 1704 * 1705 * Returns 0 or error value 1706 **/ 1707 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 1708 { 1709 struct i40e_mac_filter *f, *ftmp; 1710 bool promisc_forced_on = false; 1711 bool add_happened = false; 1712 int filter_list_len = 0; 1713 u32 changed_flags = 0; 1714 i40e_status aq_ret = 0; 1715 struct i40e_pf *pf; 1716 int num_add = 0; 1717 int num_del = 0; 1718 u16 cmd_flags; 1719 1720 /* empty array typed pointers, kcalloc later */ 1721 struct i40e_aqc_add_macvlan_element_data *add_list; 1722 struct i40e_aqc_remove_macvlan_element_data *del_list; 1723 1724 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 1725 usleep_range(1000, 2000); 1726 pf = vsi->back; 1727 1728 if (vsi->netdev) { 1729 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 1730 vsi->current_netdev_flags = vsi->netdev->flags; 1731 } 1732 1733 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 1734 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 1735 1736 filter_list_len = pf->hw.aq.asq_buf_size / 1737 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1738 del_list = kcalloc(filter_list_len, 1739 sizeof(struct i40e_aqc_remove_macvlan_element_data), 1740 GFP_KERNEL); 1741 if (!del_list) 1742 return -ENOMEM; 1743 1744 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1745 if (!f->changed) 1746 continue; 1747 1748 if (f->counter != 0) 1749 continue; 1750 f->changed = false; 1751 cmd_flags = 0; 1752 1753 /* add to delete list */ 1754 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 1755 del_list[num_del].vlan_tag = 1756 cpu_to_le16((u16)(f->vlan == 1757 I40E_VLAN_ANY ? 0 : f->vlan)); 1758 1759 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1760 del_list[num_del].flags = cmd_flags; 1761 num_del++; 1762 1763 /* unlink from filter list */ 1764 list_del(&f->list); 1765 kfree(f); 1766 1767 /* flush a full buffer */ 1768 if (num_del == filter_list_len) { 1769 aq_ret = i40e_aq_remove_macvlan(&pf->hw, 1770 vsi->seid, del_list, num_del, 1771 NULL); 1772 num_del = 0; 1773 memset(del_list, 0, sizeof(*del_list)); 1774 1775 if (aq_ret && 1776 pf->hw.aq.asq_last_status != 1777 I40E_AQ_RC_ENOENT) 1778 dev_info(&pf->pdev->dev, 1779 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", 1780 aq_ret, 1781 pf->hw.aq.asq_last_status); 1782 } 1783 } 1784 if (num_del) { 1785 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, 1786 del_list, num_del, NULL); 1787 num_del = 0; 1788 1789 if (aq_ret && 1790 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT) 1791 dev_info(&pf->pdev->dev, 1792 "ignoring delete macvlan error, err %d, aq_err %d\n", 1793 aq_ret, pf->hw.aq.asq_last_status); 1794 } 1795 1796 kfree(del_list); 1797 del_list = NULL; 1798 1799 /* do all the adds now */ 1800 filter_list_len = pf->hw.aq.asq_buf_size / 1801 sizeof(struct i40e_aqc_add_macvlan_element_data), 1802 add_list = kcalloc(filter_list_len, 1803 sizeof(struct i40e_aqc_add_macvlan_element_data), 1804 GFP_KERNEL); 1805 if (!add_list) 1806 return -ENOMEM; 1807 1808 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1809 if (!f->changed) 1810 continue; 1811 1812 if (f->counter == 0) 1813 continue; 1814 f->changed = false; 1815 add_happened = true; 1816 cmd_flags = 0; 1817 1818 /* add to add array */ 1819 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); 1820 add_list[num_add].vlan_tag = 1821 cpu_to_le16( 1822 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 1823 add_list[num_add].queue_number = 0; 1824 1825 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 1826 add_list[num_add].flags = cpu_to_le16(cmd_flags); 1827 num_add++; 1828 1829 /* flush a full buffer */ 1830 if (num_add == filter_list_len) { 1831 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1832 add_list, num_add, 1833 NULL); 1834 num_add = 0; 1835 1836 if (aq_ret) 1837 break; 1838 memset(add_list, 0, sizeof(*add_list)); 1839 } 1840 } 1841 if (num_add) { 1842 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 1843 add_list, num_add, NULL); 1844 num_add = 0; 1845 } 1846 kfree(add_list); 1847 add_list = NULL; 1848 1849 if (add_happened && aq_ret && 1850 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) { 1851 dev_info(&pf->pdev->dev, 1852 "add filter failed, err %d, aq_err %d\n", 1853 aq_ret, pf->hw.aq.asq_last_status); 1854 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && 1855 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1856 &vsi->state)) { 1857 promisc_forced_on = true; 1858 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1859 &vsi->state); 1860 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); 1861 } 1862 } 1863 } 1864 1865 /* check for changes in promiscuous modes */ 1866 if (changed_flags & IFF_ALLMULTI) { 1867 bool cur_multipromisc; 1868 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 1869 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 1870 vsi->seid, 1871 cur_multipromisc, 1872 NULL); 1873 if (aq_ret) 1874 dev_info(&pf->pdev->dev, 1875 "set multi promisc failed, err %d, aq_err %d\n", 1876 aq_ret, pf->hw.aq.asq_last_status); 1877 } 1878 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { 1879 bool cur_promisc; 1880 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 1881 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 1882 &vsi->state)); 1883 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, 1884 vsi->seid, 1885 cur_promisc, NULL); 1886 if (aq_ret) 1887 dev_info(&pf->pdev->dev, 1888 "set uni promisc failed, err %d, aq_err %d\n", 1889 aq_ret, pf->hw.aq.asq_last_status); 1890 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 1891 vsi->seid, 1892 cur_promisc, NULL); 1893 if (aq_ret) 1894 dev_info(&pf->pdev->dev, 1895 "set brdcast promisc failed, err %d, aq_err %d\n", 1896 aq_ret, pf->hw.aq.asq_last_status); 1897 } 1898 1899 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 1900 return 0; 1901 } 1902 1903 /** 1904 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 1905 * @pf: board private structure 1906 **/ 1907 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 1908 { 1909 int v; 1910 1911 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 1912 return; 1913 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 1914 1915 for (v = 0; v < pf->num_alloc_vsi; v++) { 1916 if (pf->vsi[v] && 1917 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) 1918 i40e_sync_vsi_filters(pf->vsi[v]); 1919 } 1920 } 1921 1922 /** 1923 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 1924 * @netdev: network interface device structure 1925 * @new_mtu: new value for maximum frame size 1926 * 1927 * Returns 0 on success, negative on failure 1928 **/ 1929 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 1930 { 1931 struct i40e_netdev_priv *np = netdev_priv(netdev); 1932 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 1933 struct i40e_vsi *vsi = np->vsi; 1934 1935 /* MTU < 68 is an error and causes problems on some kernels */ 1936 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) 1937 return -EINVAL; 1938 1939 netdev_info(netdev, "changing MTU from %d to %d\n", 1940 netdev->mtu, new_mtu); 1941 netdev->mtu = new_mtu; 1942 if (netif_running(netdev)) 1943 i40e_vsi_reinit_locked(vsi); 1944 1945 return 0; 1946 } 1947 1948 /** 1949 * i40e_ioctl - Access the hwtstamp interface 1950 * @netdev: network interface device structure 1951 * @ifr: interface request data 1952 * @cmd: ioctl command 1953 **/ 1954 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 1955 { 1956 struct i40e_netdev_priv *np = netdev_priv(netdev); 1957 struct i40e_pf *pf = np->vsi->back; 1958 1959 switch (cmd) { 1960 case SIOCGHWTSTAMP: 1961 return i40e_ptp_get_ts_config(pf, ifr); 1962 case SIOCSHWTSTAMP: 1963 return i40e_ptp_set_ts_config(pf, ifr); 1964 default: 1965 return -EOPNOTSUPP; 1966 } 1967 } 1968 1969 /** 1970 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 1971 * @vsi: the vsi being adjusted 1972 **/ 1973 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 1974 { 1975 struct i40e_vsi_context ctxt; 1976 i40e_status ret; 1977 1978 if ((vsi->info.valid_sections & 1979 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 1980 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 1981 return; /* already enabled */ 1982 1983 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 1984 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 1985 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 1986 1987 ctxt.seid = vsi->seid; 1988 ctxt.info = vsi->info; 1989 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 1990 if (ret) { 1991 dev_info(&vsi->back->pdev->dev, 1992 "%s: update vsi failed, aq_err=%d\n", 1993 __func__, vsi->back->hw.aq.asq_last_status); 1994 } 1995 } 1996 1997 /** 1998 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 1999 * @vsi: the vsi being adjusted 2000 **/ 2001 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2002 { 2003 struct i40e_vsi_context ctxt; 2004 i40e_status ret; 2005 2006 if ((vsi->info.valid_sections & 2007 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2008 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2009 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2010 return; /* already disabled */ 2011 2012 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2013 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2014 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2015 2016 ctxt.seid = vsi->seid; 2017 ctxt.info = vsi->info; 2018 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2019 if (ret) { 2020 dev_info(&vsi->back->pdev->dev, 2021 "%s: update vsi failed, aq_err=%d\n", 2022 __func__, vsi->back->hw.aq.asq_last_status); 2023 } 2024 } 2025 2026 /** 2027 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2028 * @netdev: network interface to be adjusted 2029 * @features: netdev features to test if VLAN offload is enabled or not 2030 **/ 2031 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2032 { 2033 struct i40e_netdev_priv *np = netdev_priv(netdev); 2034 struct i40e_vsi *vsi = np->vsi; 2035 2036 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2037 i40e_vlan_stripping_enable(vsi); 2038 else 2039 i40e_vlan_stripping_disable(vsi); 2040 } 2041 2042 /** 2043 * i40e_vsi_add_vlan - Add vsi membership for given vlan 2044 * @vsi: the vsi being configured 2045 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2046 **/ 2047 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) 2048 { 2049 struct i40e_mac_filter *f, *add_f; 2050 bool is_netdev, is_vf; 2051 2052 is_vf = (vsi->type == I40E_VSI_SRIOV); 2053 is_netdev = !!(vsi->netdev); 2054 2055 if (is_netdev) { 2056 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, 2057 is_vf, is_netdev); 2058 if (!add_f) { 2059 dev_info(&vsi->back->pdev->dev, 2060 "Could not add vlan filter %d for %pM\n", 2061 vid, vsi->netdev->dev_addr); 2062 return -ENOMEM; 2063 } 2064 } 2065 2066 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2067 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2068 if (!add_f) { 2069 dev_info(&vsi->back->pdev->dev, 2070 "Could not add vlan filter %d for %pM\n", 2071 vid, f->macaddr); 2072 return -ENOMEM; 2073 } 2074 } 2075 2076 /* Now if we add a vlan tag, make sure to check if it is the first 2077 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" 2078 * with 0, so we now accept untagged and specified tagged traffic 2079 * (and not any taged and untagged) 2080 */ 2081 if (vid > 0) { 2082 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, 2083 I40E_VLAN_ANY, 2084 is_vf, is_netdev)) { 2085 i40e_del_filter(vsi, vsi->netdev->dev_addr, 2086 I40E_VLAN_ANY, is_vf, is_netdev); 2087 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, 2088 is_vf, is_netdev); 2089 if (!add_f) { 2090 dev_info(&vsi->back->pdev->dev, 2091 "Could not add filter 0 for %pM\n", 2092 vsi->netdev->dev_addr); 2093 return -ENOMEM; 2094 } 2095 } 2096 } 2097 2098 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ 2099 if (vid > 0 && !vsi->info.pvid) { 2100 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2101 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2102 is_vf, is_netdev)) { 2103 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2104 is_vf, is_netdev); 2105 add_f = i40e_add_filter(vsi, f->macaddr, 2106 0, is_vf, is_netdev); 2107 if (!add_f) { 2108 dev_info(&vsi->back->pdev->dev, 2109 "Could not add filter 0 for %pM\n", 2110 f->macaddr); 2111 return -ENOMEM; 2112 } 2113 } 2114 } 2115 } 2116 2117 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2118 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2119 return 0; 2120 2121 return i40e_sync_vsi_filters(vsi); 2122 } 2123 2124 /** 2125 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan 2126 * @vsi: the vsi being configured 2127 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2128 * 2129 * Return: 0 on success or negative otherwise 2130 **/ 2131 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) 2132 { 2133 struct net_device *netdev = vsi->netdev; 2134 struct i40e_mac_filter *f, *add_f; 2135 bool is_vf, is_netdev; 2136 int filter_count = 0; 2137 2138 is_vf = (vsi->type == I40E_VSI_SRIOV); 2139 is_netdev = !!(netdev); 2140 2141 if (is_netdev) 2142 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); 2143 2144 list_for_each_entry(f, &vsi->mac_filter_list, list) 2145 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2146 2147 /* go through all the filters for this VSI and if there is only 2148 * vid == 0 it means there are no other filters, so vid 0 must 2149 * be replaced with -1. This signifies that we should from now 2150 * on accept any traffic (with any tag present, or untagged) 2151 */ 2152 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2153 if (is_netdev) { 2154 if (f->vlan && 2155 ether_addr_equal(netdev->dev_addr, f->macaddr)) 2156 filter_count++; 2157 } 2158 2159 if (f->vlan) 2160 filter_count++; 2161 } 2162 2163 if (!filter_count && is_netdev) { 2164 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); 2165 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 2166 is_vf, is_netdev); 2167 if (!f) { 2168 dev_info(&vsi->back->pdev->dev, 2169 "Could not add filter %d for %pM\n", 2170 I40E_VLAN_ANY, netdev->dev_addr); 2171 return -ENOMEM; 2172 } 2173 } 2174 2175 if (!filter_count) { 2176 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2177 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); 2178 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2179 is_vf, is_netdev); 2180 if (!add_f) { 2181 dev_info(&vsi->back->pdev->dev, 2182 "Could not add filter %d for %pM\n", 2183 I40E_VLAN_ANY, f->macaddr); 2184 return -ENOMEM; 2185 } 2186 } 2187 } 2188 2189 if (test_bit(__I40E_DOWN, &vsi->back->state) || 2190 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 2191 return 0; 2192 2193 return i40e_sync_vsi_filters(vsi); 2194 } 2195 2196 /** 2197 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2198 * @netdev: network interface to be adjusted 2199 * @vid: vlan id to be added 2200 * 2201 * net_device_ops implementation for adding vlan ids 2202 **/ 2203 #ifdef I40E_FCOE 2204 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2205 __always_unused __be16 proto, u16 vid) 2206 #else 2207 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2208 __always_unused __be16 proto, u16 vid) 2209 #endif 2210 { 2211 struct i40e_netdev_priv *np = netdev_priv(netdev); 2212 struct i40e_vsi *vsi = np->vsi; 2213 int ret = 0; 2214 2215 if (vid > 4095) 2216 return -EINVAL; 2217 2218 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); 2219 2220 /* If the network stack called us with vid = 0 then 2221 * it is asking to receive priority tagged packets with 2222 * vlan id 0. Our HW receives them by default when configured 2223 * to receive untagged packets so there is no need to add an 2224 * extra filter for vlan 0 tagged packets. 2225 */ 2226 if (vid) 2227 ret = i40e_vsi_add_vlan(vsi, vid); 2228 2229 if (!ret && (vid < VLAN_N_VID)) 2230 set_bit(vid, vsi->active_vlans); 2231 2232 return ret; 2233 } 2234 2235 /** 2236 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2237 * @netdev: network interface to be adjusted 2238 * @vid: vlan id to be removed 2239 * 2240 * net_device_ops implementation for removing vlan ids 2241 **/ 2242 #ifdef I40E_FCOE 2243 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2244 __always_unused __be16 proto, u16 vid) 2245 #else 2246 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2247 __always_unused __be16 proto, u16 vid) 2248 #endif 2249 { 2250 struct i40e_netdev_priv *np = netdev_priv(netdev); 2251 struct i40e_vsi *vsi = np->vsi; 2252 2253 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); 2254 2255 /* return code is ignored as there is nothing a user 2256 * can do about failure to remove and a log message was 2257 * already printed from the other function 2258 */ 2259 i40e_vsi_kill_vlan(vsi, vid); 2260 2261 clear_bit(vid, vsi->active_vlans); 2262 2263 return 0; 2264 } 2265 2266 /** 2267 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2268 * @vsi: the vsi being brought back up 2269 **/ 2270 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2271 { 2272 u16 vid; 2273 2274 if (!vsi->netdev) 2275 return; 2276 2277 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2278 2279 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2280 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2281 vid); 2282 } 2283 2284 /** 2285 * i40e_vsi_add_pvid - Add pvid for the VSI 2286 * @vsi: the vsi being adjusted 2287 * @vid: the vlan id to set as a PVID 2288 **/ 2289 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2290 { 2291 struct i40e_vsi_context ctxt; 2292 i40e_status aq_ret; 2293 2294 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2295 vsi->info.pvid = cpu_to_le16(vid); 2296 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2297 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2298 I40E_AQ_VSI_PVLAN_EMOD_STR; 2299 2300 ctxt.seid = vsi->seid; 2301 ctxt.info = vsi->info; 2302 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2303 if (aq_ret) { 2304 dev_info(&vsi->back->pdev->dev, 2305 "%s: update vsi failed, aq_err=%d\n", 2306 __func__, vsi->back->hw.aq.asq_last_status); 2307 return -ENOENT; 2308 } 2309 2310 return 0; 2311 } 2312 2313 /** 2314 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2315 * @vsi: the vsi being adjusted 2316 * 2317 * Just use the vlan_rx_register() service to put it back to normal 2318 **/ 2319 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2320 { 2321 i40e_vlan_stripping_disable(vsi); 2322 2323 vsi->info.pvid = 0; 2324 } 2325 2326 /** 2327 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2328 * @vsi: ptr to the VSI 2329 * 2330 * If this function returns with an error, then it's possible one or 2331 * more of the rings is populated (while the rest are not). It is the 2332 * callers duty to clean those orphaned rings. 2333 * 2334 * Return 0 on success, negative on failure 2335 **/ 2336 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2337 { 2338 int i, err = 0; 2339 2340 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2341 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2342 2343 return err; 2344 } 2345 2346 /** 2347 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2348 * @vsi: ptr to the VSI 2349 * 2350 * Free VSI's transmit software resources 2351 **/ 2352 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2353 { 2354 int i; 2355 2356 if (!vsi->tx_rings) 2357 return; 2358 2359 for (i = 0; i < vsi->num_queue_pairs; i++) 2360 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2361 i40e_free_tx_resources(vsi->tx_rings[i]); 2362 } 2363 2364 /** 2365 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2366 * @vsi: ptr to the VSI 2367 * 2368 * If this function returns with an error, then it's possible one or 2369 * more of the rings is populated (while the rest are not). It is the 2370 * callers duty to clean those orphaned rings. 2371 * 2372 * Return 0 on success, negative on failure 2373 **/ 2374 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2375 { 2376 int i, err = 0; 2377 2378 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2379 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2380 #ifdef I40E_FCOE 2381 i40e_fcoe_setup_ddp_resources(vsi); 2382 #endif 2383 return err; 2384 } 2385 2386 /** 2387 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2388 * @vsi: ptr to the VSI 2389 * 2390 * Free all receive software resources 2391 **/ 2392 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2393 { 2394 int i; 2395 2396 if (!vsi->rx_rings) 2397 return; 2398 2399 for (i = 0; i < vsi->num_queue_pairs; i++) 2400 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2401 i40e_free_rx_resources(vsi->rx_rings[i]); 2402 #ifdef I40E_FCOE 2403 i40e_fcoe_free_ddp_resources(vsi); 2404 #endif 2405 } 2406 2407 /** 2408 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2409 * @ring: The Tx ring to configure 2410 * 2411 * This enables/disables XPS for a given Tx descriptor ring 2412 * based on the TCs enabled for the VSI that ring belongs to. 2413 **/ 2414 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2415 { 2416 struct i40e_vsi *vsi = ring->vsi; 2417 cpumask_var_t mask; 2418 2419 if (!ring->q_vector || !ring->netdev) 2420 return; 2421 2422 /* Single TC mode enable XPS */ 2423 if (vsi->tc_config.numtc <= 1) { 2424 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) 2425 netif_set_xps_queue(ring->netdev, 2426 &ring->q_vector->affinity_mask, 2427 ring->queue_index); 2428 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2429 /* Disable XPS to allow selection based on TC */ 2430 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2431 netif_set_xps_queue(ring->netdev, mask, ring->queue_index); 2432 free_cpumask_var(mask); 2433 } 2434 } 2435 2436 /** 2437 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2438 * @ring: The Tx ring to configure 2439 * 2440 * Configure the Tx descriptor ring in the HMC context. 2441 **/ 2442 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2443 { 2444 struct i40e_vsi *vsi = ring->vsi; 2445 u16 pf_q = vsi->base_queue + ring->queue_index; 2446 struct i40e_hw *hw = &vsi->back->hw; 2447 struct i40e_hmc_obj_txq tx_ctx; 2448 i40e_status err = 0; 2449 u32 qtx_ctl = 0; 2450 2451 /* some ATR related tx ring init */ 2452 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 2453 ring->atr_sample_rate = vsi->back->atr_sample_rate; 2454 ring->atr_count = 0; 2455 } else { 2456 ring->atr_sample_rate = 0; 2457 } 2458 2459 /* configure XPS */ 2460 i40e_config_xps_tx_ring(ring); 2461 2462 /* clear the context structure first */ 2463 memset(&tx_ctx, 0, sizeof(tx_ctx)); 2464 2465 tx_ctx.new_context = 1; 2466 tx_ctx.base = (ring->dma / 128); 2467 tx_ctx.qlen = ring->count; 2468 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 2469 I40E_FLAG_FD_ATR_ENABLED)); 2470 #ifdef I40E_FCOE 2471 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2472 #endif 2473 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 2474 /* FDIR VSI tx ring can still use RS bit and writebacks */ 2475 if (vsi->type != I40E_VSI_FDIR) 2476 tx_ctx.head_wb_ena = 1; 2477 tx_ctx.head_wb_addr = ring->dma + 2478 (ring->count * sizeof(struct i40e_tx_desc)); 2479 2480 /* As part of VSI creation/update, FW allocates certain 2481 * Tx arbitration queue sets for each TC enabled for 2482 * the VSI. The FW returns the handles to these queue 2483 * sets as part of the response buffer to Add VSI, 2484 * Update VSI, etc. AQ commands. It is expected that 2485 * these queue set handles be associated with the Tx 2486 * queues by the driver as part of the TX queue context 2487 * initialization. This has to be done regardless of 2488 * DCB as by default everything is mapped to TC0. 2489 */ 2490 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 2491 tx_ctx.rdylist_act = 0; 2492 2493 /* clear the context in the HMC */ 2494 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 2495 if (err) { 2496 dev_info(&vsi->back->pdev->dev, 2497 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 2498 ring->queue_index, pf_q, err); 2499 return -ENOMEM; 2500 } 2501 2502 /* set the context in the HMC */ 2503 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 2504 if (err) { 2505 dev_info(&vsi->back->pdev->dev, 2506 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 2507 ring->queue_index, pf_q, err); 2508 return -ENOMEM; 2509 } 2510 2511 /* Now associate this queue with this PCI function */ 2512 if (vsi->type == I40E_VSI_VMDQ2) { 2513 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 2514 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 2515 I40E_QTX_CTL_VFVM_INDX_MASK; 2516 } else { 2517 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 2518 } 2519 2520 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 2521 I40E_QTX_CTL_PF_INDX_MASK); 2522 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 2523 i40e_flush(hw); 2524 2525 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); 2526 2527 /* cache tail off for easier writes later */ 2528 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 2529 2530 return 0; 2531 } 2532 2533 /** 2534 * i40e_configure_rx_ring - Configure a receive ring context 2535 * @ring: The Rx ring to configure 2536 * 2537 * Configure the Rx descriptor ring in the HMC context. 2538 **/ 2539 static int i40e_configure_rx_ring(struct i40e_ring *ring) 2540 { 2541 struct i40e_vsi *vsi = ring->vsi; 2542 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 2543 u16 pf_q = vsi->base_queue + ring->queue_index; 2544 struct i40e_hw *hw = &vsi->back->hw; 2545 struct i40e_hmc_obj_rxq rx_ctx; 2546 i40e_status err = 0; 2547 2548 ring->state = 0; 2549 2550 /* clear the context structure first */ 2551 memset(&rx_ctx, 0, sizeof(rx_ctx)); 2552 2553 ring->rx_buf_len = vsi->rx_buf_len; 2554 ring->rx_hdr_len = vsi->rx_hdr_len; 2555 2556 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 2557 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; 2558 2559 rx_ctx.base = (ring->dma / 128); 2560 rx_ctx.qlen = ring->count; 2561 2562 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { 2563 set_ring_16byte_desc_enabled(ring); 2564 rx_ctx.dsize = 0; 2565 } else { 2566 rx_ctx.dsize = 1; 2567 } 2568 2569 rx_ctx.dtype = vsi->dtype; 2570 if (vsi->dtype) { 2571 set_ring_ps_enabled(ring); 2572 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | 2573 I40E_RX_SPLIT_IP | 2574 I40E_RX_SPLIT_TCP_UDP | 2575 I40E_RX_SPLIT_SCTP; 2576 } else { 2577 rx_ctx.hsplit_0 = 0; 2578 } 2579 2580 rx_ctx.rxmax = min_t(u16, vsi->max_frame, 2581 (chain_len * ring->rx_buf_len)); 2582 if (hw->revision_id == 0) 2583 rx_ctx.lrxqthresh = 0; 2584 else 2585 rx_ctx.lrxqthresh = 2; 2586 rx_ctx.crcstrip = 1; 2587 rx_ctx.l2tsel = 1; 2588 rx_ctx.showiv = 1; 2589 #ifdef I40E_FCOE 2590 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2591 #endif 2592 /* set the prefena field to 1 because the manual says to */ 2593 rx_ctx.prefena = 1; 2594 2595 /* clear the context in the HMC */ 2596 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2597 if (err) { 2598 dev_info(&vsi->back->pdev->dev, 2599 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2600 ring->queue_index, pf_q, err); 2601 return -ENOMEM; 2602 } 2603 2604 /* set the context in the HMC */ 2605 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 2606 if (err) { 2607 dev_info(&vsi->back->pdev->dev, 2608 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2609 ring->queue_index, pf_q, err); 2610 return -ENOMEM; 2611 } 2612 2613 /* cache tail for quicker writes, and clear the reg before use */ 2614 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 2615 writel(0, ring->tail); 2616 2617 if (ring_is_ps_enabled(ring)) { 2618 i40e_alloc_rx_headers(ring); 2619 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring)); 2620 } else { 2621 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring)); 2622 } 2623 2624 return 0; 2625 } 2626 2627 /** 2628 * i40e_vsi_configure_tx - Configure the VSI for Tx 2629 * @vsi: VSI structure describing this set of rings and resources 2630 * 2631 * Configure the Tx VSI for operation. 2632 **/ 2633 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 2634 { 2635 int err = 0; 2636 u16 i; 2637 2638 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 2639 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 2640 2641 return err; 2642 } 2643 2644 /** 2645 * i40e_vsi_configure_rx - Configure the VSI for Rx 2646 * @vsi: the VSI being configured 2647 * 2648 * Configure the Rx VSI for operation. 2649 **/ 2650 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 2651 { 2652 int err = 0; 2653 u16 i; 2654 2655 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 2656 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 2657 + ETH_FCS_LEN + VLAN_HLEN; 2658 else 2659 vsi->max_frame = I40E_RXBUFFER_2048; 2660 2661 /* figure out correct receive buffer length */ 2662 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | 2663 I40E_FLAG_RX_PS_ENABLED)) { 2664 case I40E_FLAG_RX_1BUF_ENABLED: 2665 vsi->rx_hdr_len = 0; 2666 vsi->rx_buf_len = vsi->max_frame; 2667 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2668 break; 2669 case I40E_FLAG_RX_PS_ENABLED: 2670 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2671 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2672 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; 2673 break; 2674 default: 2675 vsi->rx_hdr_len = I40E_RX_HDR_SIZE; 2676 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2677 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; 2678 break; 2679 } 2680 2681 #ifdef I40E_FCOE 2682 /* setup rx buffer for FCoE */ 2683 if ((vsi->type == I40E_VSI_FCOE) && 2684 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 2685 vsi->rx_hdr_len = 0; 2686 vsi->rx_buf_len = I40E_RXBUFFER_3072; 2687 vsi->max_frame = I40E_RXBUFFER_3072; 2688 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; 2689 } 2690 2691 #endif /* I40E_FCOE */ 2692 /* round up for the chip's needs */ 2693 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, 2694 (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); 2695 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 2696 (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); 2697 2698 /* set up individual rings */ 2699 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2700 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 2701 2702 return err; 2703 } 2704 2705 /** 2706 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 2707 * @vsi: ptr to the VSI 2708 **/ 2709 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2710 { 2711 struct i40e_ring *tx_ring, *rx_ring; 2712 u16 qoffset, qcount; 2713 int i, n; 2714 2715 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 2716 /* Reset the TC information */ 2717 for (i = 0; i < vsi->num_queue_pairs; i++) { 2718 rx_ring = vsi->rx_rings[i]; 2719 tx_ring = vsi->tx_rings[i]; 2720 rx_ring->dcb_tc = 0; 2721 tx_ring->dcb_tc = 0; 2722 } 2723 } 2724 2725 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2726 if (!(vsi->tc_config.enabled_tc & (1 << n))) 2727 continue; 2728 2729 qoffset = vsi->tc_config.tc_info[n].qoffset; 2730 qcount = vsi->tc_config.tc_info[n].qcount; 2731 for (i = qoffset; i < (qoffset + qcount); i++) { 2732 rx_ring = vsi->rx_rings[i]; 2733 tx_ring = vsi->tx_rings[i]; 2734 rx_ring->dcb_tc = n; 2735 tx_ring->dcb_tc = n; 2736 } 2737 } 2738 } 2739 2740 /** 2741 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 2742 * @vsi: ptr to the VSI 2743 **/ 2744 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 2745 { 2746 if (vsi->netdev) 2747 i40e_set_rx_mode(vsi->netdev); 2748 } 2749 2750 /** 2751 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 2752 * @vsi: Pointer to the targeted VSI 2753 * 2754 * This function replays the hlist on the hw where all the SB Flow Director 2755 * filters were saved. 2756 **/ 2757 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 2758 { 2759 struct i40e_fdir_filter *filter; 2760 struct i40e_pf *pf = vsi->back; 2761 struct hlist_node *node; 2762 2763 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 2764 return; 2765 2766 hlist_for_each_entry_safe(filter, node, 2767 &pf->fdir_filter_list, fdir_node) { 2768 i40e_add_del_fdir(vsi, filter, true); 2769 } 2770 } 2771 2772 /** 2773 * i40e_vsi_configure - Set up the VSI for action 2774 * @vsi: the VSI being configured 2775 **/ 2776 static int i40e_vsi_configure(struct i40e_vsi *vsi) 2777 { 2778 int err; 2779 2780 i40e_set_vsi_rx_mode(vsi); 2781 i40e_restore_vlan(vsi); 2782 i40e_vsi_config_dcb_rings(vsi); 2783 err = i40e_vsi_configure_tx(vsi); 2784 if (!err) 2785 err = i40e_vsi_configure_rx(vsi); 2786 2787 return err; 2788 } 2789 2790 /** 2791 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 2792 * @vsi: the VSI being configured 2793 **/ 2794 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 2795 { 2796 struct i40e_pf *pf = vsi->back; 2797 struct i40e_q_vector *q_vector; 2798 struct i40e_hw *hw = &pf->hw; 2799 u16 vector; 2800 int i, q; 2801 u32 val; 2802 u32 qp; 2803 2804 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 2805 * and PFINT_LNKLSTn registers, e.g.: 2806 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 2807 */ 2808 qp = vsi->base_queue; 2809 vector = vsi->base_vector; 2810 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 2811 q_vector = vsi->q_vectors[i]; 2812 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2813 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2814 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 2815 q_vector->rx.itr); 2816 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2817 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2818 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 2819 q_vector->tx.itr); 2820 2821 /* Linked list for the queuepairs assigned to this vector */ 2822 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 2823 for (q = 0; q < q_vector->num_ringpairs; q++) { 2824 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2825 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2826 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 2827 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 2828 (I40E_QUEUE_TYPE_TX 2829 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 2830 2831 wr32(hw, I40E_QINT_RQCTL(qp), val); 2832 2833 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2834 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2835 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 2836 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 2837 (I40E_QUEUE_TYPE_RX 2838 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2839 2840 /* Terminate the linked list */ 2841 if (q == (q_vector->num_ringpairs - 1)) 2842 val |= (I40E_QUEUE_END_OF_LIST 2843 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2844 2845 wr32(hw, I40E_QINT_TQCTL(qp), val); 2846 qp++; 2847 } 2848 } 2849 2850 i40e_flush(hw); 2851 } 2852 2853 /** 2854 * i40e_enable_misc_int_causes - enable the non-queue interrupts 2855 * @hw: ptr to the hardware info 2856 **/ 2857 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 2858 { 2859 struct i40e_hw *hw = &pf->hw; 2860 u32 val; 2861 2862 /* clear things first */ 2863 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 2864 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 2865 2866 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 2867 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 2868 I40E_PFINT_ICR0_ENA_GRST_MASK | 2869 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 2870 I40E_PFINT_ICR0_ENA_GPIO_MASK | 2871 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 2872 I40E_PFINT_ICR0_ENA_VFLR_MASK | 2873 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 2874 2875 if (pf->flags & I40E_FLAG_PTP) 2876 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 2877 2878 wr32(hw, I40E_PFINT_ICR0_ENA, val); 2879 2880 /* SW_ITR_IDX = 0, but don't change INTENA */ 2881 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 2882 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 2883 2884 /* OTHER_ITR_IDX = 0 */ 2885 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 2886 } 2887 2888 /** 2889 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 2890 * @vsi: the VSI being configured 2891 **/ 2892 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 2893 { 2894 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 2895 struct i40e_pf *pf = vsi->back; 2896 struct i40e_hw *hw = &pf->hw; 2897 u32 val; 2898 2899 /* set the ITR configuration */ 2900 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); 2901 q_vector->rx.latency_range = I40E_LOW_LATENCY; 2902 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 2903 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); 2904 q_vector->tx.latency_range = I40E_LOW_LATENCY; 2905 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 2906 2907 i40e_enable_misc_int_causes(pf); 2908 2909 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 2910 wr32(hw, I40E_PFINT_LNKLST0, 0); 2911 2912 /* Associate the queue pair to the vector and enable the queue int */ 2913 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 2914 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 2915 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 2916 2917 wr32(hw, I40E_QINT_RQCTL(0), val); 2918 2919 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 2920 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 2921 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 2922 2923 wr32(hw, I40E_QINT_TQCTL(0), val); 2924 i40e_flush(hw); 2925 } 2926 2927 /** 2928 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 2929 * @pf: board private structure 2930 **/ 2931 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 2932 { 2933 struct i40e_hw *hw = &pf->hw; 2934 2935 wr32(hw, I40E_PFINT_DYN_CTL0, 2936 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2937 i40e_flush(hw); 2938 } 2939 2940 /** 2941 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 2942 * @pf: board private structure 2943 **/ 2944 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 2945 { 2946 struct i40e_hw *hw = &pf->hw; 2947 u32 val; 2948 2949 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 2950 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 2951 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 2952 2953 wr32(hw, I40E_PFINT_DYN_CTL0, val); 2954 i40e_flush(hw); 2955 } 2956 2957 /** 2958 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 2959 * @vsi: pointer to a vsi 2960 * @vector: enable a particular Hw Interrupt vector 2961 **/ 2962 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 2963 { 2964 struct i40e_pf *pf = vsi->back; 2965 struct i40e_hw *hw = &pf->hw; 2966 u32 val; 2967 2968 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 2969 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 2970 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 2971 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2972 /* skip the flush */ 2973 } 2974 2975 /** 2976 * i40e_irq_dynamic_disable - Disable default interrupt generation settings 2977 * @vsi: pointer to a vsi 2978 * @vector: disable a particular Hw Interrupt vector 2979 **/ 2980 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector) 2981 { 2982 struct i40e_pf *pf = vsi->back; 2983 struct i40e_hw *hw = &pf->hw; 2984 u32 val; 2985 2986 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT; 2987 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); 2988 i40e_flush(hw); 2989 } 2990 2991 /** 2992 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 2993 * @irq: interrupt number 2994 * @data: pointer to a q_vector 2995 **/ 2996 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 2997 { 2998 struct i40e_q_vector *q_vector = data; 2999 3000 if (!q_vector->tx.ring && !q_vector->rx.ring) 3001 return IRQ_HANDLED; 3002 3003 napi_schedule(&q_vector->napi); 3004 3005 return IRQ_HANDLED; 3006 } 3007 3008 /** 3009 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3010 * @vsi: the VSI being configured 3011 * @basename: name for the vector 3012 * 3013 * Allocates MSI-X vectors and requests interrupts from the kernel. 3014 **/ 3015 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3016 { 3017 int q_vectors = vsi->num_q_vectors; 3018 struct i40e_pf *pf = vsi->back; 3019 int base = vsi->base_vector; 3020 int rx_int_idx = 0; 3021 int tx_int_idx = 0; 3022 int vector, err; 3023 3024 for (vector = 0; vector < q_vectors; vector++) { 3025 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3026 3027 if (q_vector->tx.ring && q_vector->rx.ring) { 3028 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3029 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3030 tx_int_idx++; 3031 } else if (q_vector->rx.ring) { 3032 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3033 "%s-%s-%d", basename, "rx", rx_int_idx++); 3034 } else if (q_vector->tx.ring) { 3035 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3036 "%s-%s-%d", basename, "tx", tx_int_idx++); 3037 } else { 3038 /* skip this unused q_vector */ 3039 continue; 3040 } 3041 err = request_irq(pf->msix_entries[base + vector].vector, 3042 vsi->irq_handler, 3043 0, 3044 q_vector->name, 3045 q_vector); 3046 if (err) { 3047 dev_info(&pf->pdev->dev, 3048 "%s: request_irq failed, error: %d\n", 3049 __func__, err); 3050 goto free_queue_irqs; 3051 } 3052 /* assign the mask for this irq */ 3053 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3054 &q_vector->affinity_mask); 3055 } 3056 3057 vsi->irqs_ready = true; 3058 return 0; 3059 3060 free_queue_irqs: 3061 while (vector) { 3062 vector--; 3063 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3064 NULL); 3065 free_irq(pf->msix_entries[base + vector].vector, 3066 &(vsi->q_vectors[vector])); 3067 } 3068 return err; 3069 } 3070 3071 /** 3072 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3073 * @vsi: the VSI being un-configured 3074 **/ 3075 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3076 { 3077 struct i40e_pf *pf = vsi->back; 3078 struct i40e_hw *hw = &pf->hw; 3079 int base = vsi->base_vector; 3080 int i; 3081 3082 for (i = 0; i < vsi->num_queue_pairs; i++) { 3083 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3084 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3085 } 3086 3087 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3088 for (i = vsi->base_vector; 3089 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3090 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3091 3092 i40e_flush(hw); 3093 for (i = 0; i < vsi->num_q_vectors; i++) 3094 synchronize_irq(pf->msix_entries[i + base].vector); 3095 } else { 3096 /* Legacy and MSI mode - this stops all interrupt handling */ 3097 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3098 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3099 i40e_flush(hw); 3100 synchronize_irq(pf->pdev->irq); 3101 } 3102 } 3103 3104 /** 3105 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3106 * @vsi: the VSI being configured 3107 **/ 3108 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3109 { 3110 struct i40e_pf *pf = vsi->back; 3111 int i; 3112 3113 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3114 for (i = vsi->base_vector; 3115 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3116 i40e_irq_dynamic_enable(vsi, i); 3117 } else { 3118 i40e_irq_dynamic_enable_icr0(pf); 3119 } 3120 3121 i40e_flush(&pf->hw); 3122 return 0; 3123 } 3124 3125 /** 3126 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3127 * @pf: board private structure 3128 **/ 3129 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3130 { 3131 /* Disable ICR 0 */ 3132 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3133 i40e_flush(&pf->hw); 3134 } 3135 3136 /** 3137 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3138 * @irq: interrupt number 3139 * @data: pointer to a q_vector 3140 * 3141 * This is the handler used for all MSI/Legacy interrupts, and deals 3142 * with both queue and non-queue interrupts. This is also used in 3143 * MSIX mode to handle the non-queue interrupts. 3144 **/ 3145 static irqreturn_t i40e_intr(int irq, void *data) 3146 { 3147 struct i40e_pf *pf = (struct i40e_pf *)data; 3148 struct i40e_hw *hw = &pf->hw; 3149 irqreturn_t ret = IRQ_NONE; 3150 u32 icr0, icr0_remaining; 3151 u32 val, ena_mask; 3152 3153 icr0 = rd32(hw, I40E_PFINT_ICR0); 3154 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3155 3156 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3157 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3158 goto enable_intr; 3159 3160 /* if interrupt but no bits showing, must be SWINT */ 3161 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3162 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3163 pf->sw_int_count++; 3164 3165 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3166 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3167 3168 /* temporarily disable queue cause for NAPI processing */ 3169 u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); 3170 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3171 wr32(hw, I40E_QINT_RQCTL(0), qval); 3172 3173 qval = rd32(hw, I40E_QINT_TQCTL(0)); 3174 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3175 wr32(hw, I40E_QINT_TQCTL(0), qval); 3176 3177 if (!test_bit(__I40E_DOWN, &pf->state)) 3178 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); 3179 } 3180 3181 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3182 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3183 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3184 } 3185 3186 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3187 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3188 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3189 } 3190 3191 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3192 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3193 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3194 } 3195 3196 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3197 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3198 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3199 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3200 val = rd32(hw, I40E_GLGEN_RSTAT); 3201 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3202 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3203 if (val == I40E_RESET_CORER) { 3204 pf->corer_count++; 3205 } else if (val == I40E_RESET_GLOBR) { 3206 pf->globr_count++; 3207 } else if (val == I40E_RESET_EMPR) { 3208 pf->empr_count++; 3209 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); 3210 } 3211 } 3212 3213 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3214 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3215 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3216 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3217 rd32(hw, I40E_PFHMC_ERRORINFO), 3218 rd32(hw, I40E_PFHMC_ERRORDATA)); 3219 } 3220 3221 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3222 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3223 3224 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3225 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3226 i40e_ptp_tx_hwtstamp(pf); 3227 } 3228 } 3229 3230 /* If a critical error is pending we have no choice but to reset the 3231 * device. 3232 * Report and mask out any remaining unexpected interrupts. 3233 */ 3234 icr0_remaining = icr0 & ena_mask; 3235 if (icr0_remaining) { 3236 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3237 icr0_remaining); 3238 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3239 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3240 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3241 dev_info(&pf->pdev->dev, "device will be reset\n"); 3242 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3243 i40e_service_event_schedule(pf); 3244 } 3245 ena_mask &= ~icr0_remaining; 3246 } 3247 ret = IRQ_HANDLED; 3248 3249 enable_intr: 3250 /* re-enable interrupt causes */ 3251 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3252 if (!test_bit(__I40E_DOWN, &pf->state)) { 3253 i40e_service_event_schedule(pf); 3254 i40e_irq_dynamic_enable_icr0(pf); 3255 } 3256 3257 return ret; 3258 } 3259 3260 /** 3261 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3262 * @tx_ring: tx ring to clean 3263 * @budget: how many cleans we're allowed 3264 * 3265 * Returns true if there's any budget left (e.g. the clean is finished) 3266 **/ 3267 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3268 { 3269 struct i40e_vsi *vsi = tx_ring->vsi; 3270 u16 i = tx_ring->next_to_clean; 3271 struct i40e_tx_buffer *tx_buf; 3272 struct i40e_tx_desc *tx_desc; 3273 3274 tx_buf = &tx_ring->tx_bi[i]; 3275 tx_desc = I40E_TX_DESC(tx_ring, i); 3276 i -= tx_ring->count; 3277 3278 do { 3279 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3280 3281 /* if next_to_watch is not set then there is no work pending */ 3282 if (!eop_desc) 3283 break; 3284 3285 /* prevent any other reads prior to eop_desc */ 3286 read_barrier_depends(); 3287 3288 /* if the descriptor isn't done, no work yet to do */ 3289 if (!(eop_desc->cmd_type_offset_bsz & 3290 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3291 break; 3292 3293 /* clear next_to_watch to prevent false hangs */ 3294 tx_buf->next_to_watch = NULL; 3295 3296 tx_desc->buffer_addr = 0; 3297 tx_desc->cmd_type_offset_bsz = 0; 3298 /* move past filter desc */ 3299 tx_buf++; 3300 tx_desc++; 3301 i++; 3302 if (unlikely(!i)) { 3303 i -= tx_ring->count; 3304 tx_buf = tx_ring->tx_bi; 3305 tx_desc = I40E_TX_DESC(tx_ring, 0); 3306 } 3307 /* unmap skb header data */ 3308 dma_unmap_single(tx_ring->dev, 3309 dma_unmap_addr(tx_buf, dma), 3310 dma_unmap_len(tx_buf, len), 3311 DMA_TO_DEVICE); 3312 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3313 kfree(tx_buf->raw_buf); 3314 3315 tx_buf->raw_buf = NULL; 3316 tx_buf->tx_flags = 0; 3317 tx_buf->next_to_watch = NULL; 3318 dma_unmap_len_set(tx_buf, len, 0); 3319 tx_desc->buffer_addr = 0; 3320 tx_desc->cmd_type_offset_bsz = 0; 3321 3322 /* move us past the eop_desc for start of next FD desc */ 3323 tx_buf++; 3324 tx_desc++; 3325 i++; 3326 if (unlikely(!i)) { 3327 i -= tx_ring->count; 3328 tx_buf = tx_ring->tx_bi; 3329 tx_desc = I40E_TX_DESC(tx_ring, 0); 3330 } 3331 3332 /* update budget accounting */ 3333 budget--; 3334 } while (likely(budget)); 3335 3336 i += tx_ring->count; 3337 tx_ring->next_to_clean = i; 3338 3339 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { 3340 i40e_irq_dynamic_enable(vsi, 3341 tx_ring->q_vector->v_idx + vsi->base_vector); 3342 } 3343 return budget > 0; 3344 } 3345 3346 /** 3347 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3348 * @irq: interrupt number 3349 * @data: pointer to a q_vector 3350 **/ 3351 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3352 { 3353 struct i40e_q_vector *q_vector = data; 3354 struct i40e_vsi *vsi; 3355 3356 if (!q_vector->tx.ring) 3357 return IRQ_HANDLED; 3358 3359 vsi = q_vector->tx.ring->vsi; 3360 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3361 3362 return IRQ_HANDLED; 3363 } 3364 3365 /** 3366 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3367 * @vsi: the VSI being configured 3368 * @v_idx: vector index 3369 * @qp_idx: queue pair index 3370 **/ 3371 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3372 { 3373 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3374 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3375 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3376 3377 tx_ring->q_vector = q_vector; 3378 tx_ring->next = q_vector->tx.ring; 3379 q_vector->tx.ring = tx_ring; 3380 q_vector->tx.count++; 3381 3382 rx_ring->q_vector = q_vector; 3383 rx_ring->next = q_vector->rx.ring; 3384 q_vector->rx.ring = rx_ring; 3385 q_vector->rx.count++; 3386 } 3387 3388 /** 3389 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3390 * @vsi: the VSI being configured 3391 * 3392 * This function maps descriptor rings to the queue-specific vectors 3393 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3394 * one vector per queue pair, but on a constrained vector budget, we 3395 * group the queue pairs as "efficiently" as possible. 3396 **/ 3397 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3398 { 3399 int qp_remaining = vsi->num_queue_pairs; 3400 int q_vectors = vsi->num_q_vectors; 3401 int num_ringpairs; 3402 int v_start = 0; 3403 int qp_idx = 0; 3404 3405 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3406 * group them so there are multiple queues per vector. 3407 * It is also important to go through all the vectors available to be 3408 * sure that if we don't use all the vectors, that the remaining vectors 3409 * are cleared. This is especially important when decreasing the 3410 * number of queues in use. 3411 */ 3412 for (; v_start < q_vectors; v_start++) { 3413 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3414 3415 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3416 3417 q_vector->num_ringpairs = num_ringpairs; 3418 3419 q_vector->rx.count = 0; 3420 q_vector->tx.count = 0; 3421 q_vector->rx.ring = NULL; 3422 q_vector->tx.ring = NULL; 3423 3424 while (num_ringpairs--) { 3425 map_vector_to_qp(vsi, v_start, qp_idx); 3426 qp_idx++; 3427 qp_remaining--; 3428 } 3429 } 3430 } 3431 3432 /** 3433 * i40e_vsi_request_irq - Request IRQ from the OS 3434 * @vsi: the VSI being configured 3435 * @basename: name for the vector 3436 **/ 3437 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3438 { 3439 struct i40e_pf *pf = vsi->back; 3440 int err; 3441 3442 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3443 err = i40e_vsi_request_irq_msix(vsi, basename); 3444 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3445 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3446 pf->int_name, pf); 3447 else 3448 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3449 pf->int_name, pf); 3450 3451 if (err) 3452 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3453 3454 return err; 3455 } 3456 3457 #ifdef CONFIG_NET_POLL_CONTROLLER 3458 /** 3459 * i40e_netpoll - A Polling 'interrupt'handler 3460 * @netdev: network interface device structure 3461 * 3462 * This is used by netconsole to send skbs without having to re-enable 3463 * interrupts. It's not called while the normal interrupt routine is executing. 3464 **/ 3465 #ifdef I40E_FCOE 3466 void i40e_netpoll(struct net_device *netdev) 3467 #else 3468 static void i40e_netpoll(struct net_device *netdev) 3469 #endif 3470 { 3471 struct i40e_netdev_priv *np = netdev_priv(netdev); 3472 struct i40e_vsi *vsi = np->vsi; 3473 struct i40e_pf *pf = vsi->back; 3474 int i; 3475 3476 /* if interface is down do nothing */ 3477 if (test_bit(__I40E_DOWN, &vsi->state)) 3478 return; 3479 3480 pf->flags |= I40E_FLAG_IN_NETPOLL; 3481 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3482 for (i = 0; i < vsi->num_q_vectors; i++) 3483 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 3484 } else { 3485 i40e_intr(pf->pdev->irq, netdev); 3486 } 3487 pf->flags &= ~I40E_FLAG_IN_NETPOLL; 3488 } 3489 #endif 3490 3491 /** 3492 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 3493 * @pf: the PF being configured 3494 * @pf_q: the PF queue 3495 * @enable: enable or disable state of the queue 3496 * 3497 * This routine will wait for the given Tx queue of the PF to reach the 3498 * enabled or disabled state. 3499 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3500 * multiple retries; else will return 0 in case of success. 3501 **/ 3502 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3503 { 3504 int i; 3505 u32 tx_reg; 3506 3507 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3508 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 3509 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3510 break; 3511 3512 usleep_range(10, 20); 3513 } 3514 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3515 return -ETIMEDOUT; 3516 3517 return 0; 3518 } 3519 3520 /** 3521 * i40e_vsi_control_tx - Start or stop a VSI's rings 3522 * @vsi: the VSI being configured 3523 * @enable: start or stop the rings 3524 **/ 3525 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 3526 { 3527 struct i40e_pf *pf = vsi->back; 3528 struct i40e_hw *hw = &pf->hw; 3529 int i, j, pf_q, ret = 0; 3530 u32 tx_reg; 3531 3532 pf_q = vsi->base_queue; 3533 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3534 3535 /* warn the TX unit of coming changes */ 3536 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 3537 if (!enable) 3538 usleep_range(10, 20); 3539 3540 for (j = 0; j < 50; j++) { 3541 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3542 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3543 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 3544 break; 3545 usleep_range(1000, 2000); 3546 } 3547 /* Skip if the queue is already in the requested state */ 3548 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3549 continue; 3550 3551 /* turn on/off the queue */ 3552 if (enable) { 3553 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 3554 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3555 } else { 3556 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 3557 } 3558 3559 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 3560 /* No waiting for the Tx queue to disable */ 3561 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3562 continue; 3563 3564 /* wait for the change to finish */ 3565 ret = i40e_pf_txq_wait(pf, pf_q, enable); 3566 if (ret) { 3567 dev_info(&pf->pdev->dev, 3568 "%s: VSI seid %d Tx ring %d %sable timeout\n", 3569 __func__, vsi->seid, pf_q, 3570 (enable ? "en" : "dis")); 3571 break; 3572 } 3573 } 3574 3575 if (hw->revision_id == 0) 3576 mdelay(50); 3577 return ret; 3578 } 3579 3580 /** 3581 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 3582 * @pf: the PF being configured 3583 * @pf_q: the PF queue 3584 * @enable: enable or disable state of the queue 3585 * 3586 * This routine will wait for the given Rx queue of the PF to reach the 3587 * enabled or disabled state. 3588 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3589 * multiple retries; else will return 0 in case of success. 3590 **/ 3591 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3592 { 3593 int i; 3594 u32 rx_reg; 3595 3596 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3597 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 3598 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3599 break; 3600 3601 usleep_range(10, 20); 3602 } 3603 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3604 return -ETIMEDOUT; 3605 3606 return 0; 3607 } 3608 3609 /** 3610 * i40e_vsi_control_rx - Start or stop a VSI's rings 3611 * @vsi: the VSI being configured 3612 * @enable: start or stop the rings 3613 **/ 3614 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 3615 { 3616 struct i40e_pf *pf = vsi->back; 3617 struct i40e_hw *hw = &pf->hw; 3618 int i, j, pf_q, ret = 0; 3619 u32 rx_reg; 3620 3621 pf_q = vsi->base_queue; 3622 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3623 for (j = 0; j < 50; j++) { 3624 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3625 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 3626 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 3627 break; 3628 usleep_range(1000, 2000); 3629 } 3630 3631 /* Skip if the queue is already in the requested state */ 3632 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3633 continue; 3634 3635 /* turn on/off the queue */ 3636 if (enable) 3637 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 3638 else 3639 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 3640 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 3641 3642 /* wait for the change to finish */ 3643 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 3644 if (ret) { 3645 dev_info(&pf->pdev->dev, 3646 "%s: VSI seid %d Rx ring %d %sable timeout\n", 3647 __func__, vsi->seid, pf_q, 3648 (enable ? "en" : "dis")); 3649 break; 3650 } 3651 } 3652 3653 return ret; 3654 } 3655 3656 /** 3657 * i40e_vsi_control_rings - Start or stop a VSI's rings 3658 * @vsi: the VSI being configured 3659 * @enable: start or stop the rings 3660 **/ 3661 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) 3662 { 3663 int ret = 0; 3664 3665 /* do rx first for enable and last for disable */ 3666 if (request) { 3667 ret = i40e_vsi_control_rx(vsi, request); 3668 if (ret) 3669 return ret; 3670 ret = i40e_vsi_control_tx(vsi, request); 3671 } else { 3672 /* Ignore return value, we need to shutdown whatever we can */ 3673 i40e_vsi_control_tx(vsi, request); 3674 i40e_vsi_control_rx(vsi, request); 3675 } 3676 3677 return ret; 3678 } 3679 3680 /** 3681 * i40e_vsi_free_irq - Free the irq association with the OS 3682 * @vsi: the VSI being configured 3683 **/ 3684 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 3685 { 3686 struct i40e_pf *pf = vsi->back; 3687 struct i40e_hw *hw = &pf->hw; 3688 int base = vsi->base_vector; 3689 u32 val, qp; 3690 int i; 3691 3692 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3693 if (!vsi->q_vectors) 3694 return; 3695 3696 if (!vsi->irqs_ready) 3697 return; 3698 3699 vsi->irqs_ready = false; 3700 for (i = 0; i < vsi->num_q_vectors; i++) { 3701 u16 vector = i + base; 3702 3703 /* free only the irqs that were actually requested */ 3704 if (!vsi->q_vectors[i] || 3705 !vsi->q_vectors[i]->num_ringpairs) 3706 continue; 3707 3708 /* clear the affinity_mask in the IRQ descriptor */ 3709 irq_set_affinity_hint(pf->msix_entries[vector].vector, 3710 NULL); 3711 free_irq(pf->msix_entries[vector].vector, 3712 vsi->q_vectors[i]); 3713 3714 /* Tear down the interrupt queue link list 3715 * 3716 * We know that they come in pairs and always 3717 * the Rx first, then the Tx. To clear the 3718 * link list, stick the EOL value into the 3719 * next_q field of the registers. 3720 */ 3721 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 3722 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3723 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3724 val |= I40E_QUEUE_END_OF_LIST 3725 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3726 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 3727 3728 while (qp != I40E_QUEUE_END_OF_LIST) { 3729 u32 next; 3730 3731 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3732 3733 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3734 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3735 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3736 I40E_QINT_RQCTL_INTEVENT_MASK); 3737 3738 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3739 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3740 3741 wr32(hw, I40E_QINT_RQCTL(qp), val); 3742 3743 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3744 3745 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 3746 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 3747 3748 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3749 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3750 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3751 I40E_QINT_TQCTL_INTEVENT_MASK); 3752 3753 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3754 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3755 3756 wr32(hw, I40E_QINT_TQCTL(qp), val); 3757 qp = next; 3758 } 3759 } 3760 } else { 3761 free_irq(pf->pdev->irq, pf); 3762 3763 val = rd32(hw, I40E_PFINT_LNKLST0); 3764 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3765 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3766 val |= I40E_QUEUE_END_OF_LIST 3767 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 3768 wr32(hw, I40E_PFINT_LNKLST0, val); 3769 3770 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3771 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3772 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3773 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3774 I40E_QINT_RQCTL_INTEVENT_MASK); 3775 3776 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3777 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3778 3779 wr32(hw, I40E_QINT_RQCTL(qp), val); 3780 3781 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3782 3783 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3784 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3785 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3786 I40E_QINT_TQCTL_INTEVENT_MASK); 3787 3788 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3789 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3790 3791 wr32(hw, I40E_QINT_TQCTL(qp), val); 3792 } 3793 } 3794 3795 /** 3796 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 3797 * @vsi: the VSI being configured 3798 * @v_idx: Index of vector to be freed 3799 * 3800 * This function frees the memory allocated to the q_vector. In addition if 3801 * NAPI is enabled it will delete any references to the NAPI struct prior 3802 * to freeing the q_vector. 3803 **/ 3804 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 3805 { 3806 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3807 struct i40e_ring *ring; 3808 3809 if (!q_vector) 3810 return; 3811 3812 /* disassociate q_vector from rings */ 3813 i40e_for_each_ring(ring, q_vector->tx) 3814 ring->q_vector = NULL; 3815 3816 i40e_for_each_ring(ring, q_vector->rx) 3817 ring->q_vector = NULL; 3818 3819 /* only VSI w/ an associated netdev is set up w/ NAPI */ 3820 if (vsi->netdev) 3821 netif_napi_del(&q_vector->napi); 3822 3823 vsi->q_vectors[v_idx] = NULL; 3824 3825 kfree_rcu(q_vector, rcu); 3826 } 3827 3828 /** 3829 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 3830 * @vsi: the VSI being un-configured 3831 * 3832 * This frees the memory allocated to the q_vectors and 3833 * deletes references to the NAPI struct. 3834 **/ 3835 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 3836 { 3837 int v_idx; 3838 3839 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 3840 i40e_free_q_vector(vsi, v_idx); 3841 } 3842 3843 /** 3844 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 3845 * @pf: board private structure 3846 **/ 3847 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 3848 { 3849 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 3850 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3851 pci_disable_msix(pf->pdev); 3852 kfree(pf->msix_entries); 3853 pf->msix_entries = NULL; 3854 kfree(pf->irq_pile); 3855 pf->irq_pile = NULL; 3856 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 3857 pci_disable_msi(pf->pdev); 3858 } 3859 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 3860 } 3861 3862 /** 3863 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 3864 * @pf: board private structure 3865 * 3866 * We go through and clear interrupt specific resources and reset the structure 3867 * to pre-load conditions 3868 **/ 3869 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 3870 { 3871 int i; 3872 3873 i40e_stop_misc_vector(pf); 3874 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3875 synchronize_irq(pf->msix_entries[0].vector); 3876 free_irq(pf->msix_entries[0].vector, pf); 3877 } 3878 3879 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3880 for (i = 0; i < pf->num_alloc_vsi; i++) 3881 if (pf->vsi[i]) 3882 i40e_vsi_free_q_vectors(pf->vsi[i]); 3883 i40e_reset_interrupt_capability(pf); 3884 } 3885 3886 /** 3887 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 3888 * @vsi: the VSI being configured 3889 **/ 3890 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 3891 { 3892 int q_idx; 3893 3894 if (!vsi->netdev) 3895 return; 3896 3897 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3898 napi_enable(&vsi->q_vectors[q_idx]->napi); 3899 } 3900 3901 /** 3902 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 3903 * @vsi: the VSI being configured 3904 **/ 3905 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 3906 { 3907 int q_idx; 3908 3909 if (!vsi->netdev) 3910 return; 3911 3912 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 3913 napi_disable(&vsi->q_vectors[q_idx]->napi); 3914 } 3915 3916 /** 3917 * i40e_vsi_close - Shut down a VSI 3918 * @vsi: the vsi to be quelled 3919 **/ 3920 static void i40e_vsi_close(struct i40e_vsi *vsi) 3921 { 3922 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 3923 i40e_down(vsi); 3924 i40e_vsi_free_irq(vsi); 3925 i40e_vsi_free_tx_resources(vsi); 3926 i40e_vsi_free_rx_resources(vsi); 3927 } 3928 3929 /** 3930 * i40e_quiesce_vsi - Pause a given VSI 3931 * @vsi: the VSI being paused 3932 **/ 3933 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 3934 { 3935 if (test_bit(__I40E_DOWN, &vsi->state)) 3936 return; 3937 3938 /* No need to disable FCoE VSI when Tx suspended */ 3939 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 3940 vsi->type == I40E_VSI_FCOE) { 3941 dev_dbg(&vsi->back->pdev->dev, 3942 "%s: VSI seid %d skipping FCoE VSI disable\n", 3943 __func__, vsi->seid); 3944 return; 3945 } 3946 3947 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 3948 if (vsi->netdev && netif_running(vsi->netdev)) { 3949 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 3950 } else { 3951 i40e_vsi_close(vsi); 3952 } 3953 } 3954 3955 /** 3956 * i40e_unquiesce_vsi - Resume a given VSI 3957 * @vsi: the VSI being resumed 3958 **/ 3959 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 3960 { 3961 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 3962 return; 3963 3964 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 3965 if (vsi->netdev && netif_running(vsi->netdev)) 3966 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 3967 else 3968 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 3969 } 3970 3971 /** 3972 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 3973 * @pf: the PF 3974 **/ 3975 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 3976 { 3977 int v; 3978 3979 for (v = 0; v < pf->num_alloc_vsi; v++) { 3980 if (pf->vsi[v]) 3981 i40e_quiesce_vsi(pf->vsi[v]); 3982 } 3983 } 3984 3985 /** 3986 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 3987 * @pf: the PF 3988 **/ 3989 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 3990 { 3991 int v; 3992 3993 for (v = 0; v < pf->num_alloc_vsi; v++) { 3994 if (pf->vsi[v]) 3995 i40e_unquiesce_vsi(pf->vsi[v]); 3996 } 3997 } 3998 3999 #ifdef CONFIG_I40E_DCB 4000 /** 4001 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled 4002 * @vsi: the VSI being configured 4003 * 4004 * This function waits for the given VSI's Tx queues to be disabled. 4005 **/ 4006 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi) 4007 { 4008 struct i40e_pf *pf = vsi->back; 4009 int i, pf_q, ret; 4010 4011 pf_q = vsi->base_queue; 4012 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4013 /* Check and wait for the disable status of the queue */ 4014 ret = i40e_pf_txq_wait(pf, pf_q, false); 4015 if (ret) { 4016 dev_info(&pf->pdev->dev, 4017 "%s: VSI seid %d Tx ring %d disable timeout\n", 4018 __func__, vsi->seid, pf_q); 4019 return ret; 4020 } 4021 } 4022 4023 return 0; 4024 } 4025 4026 /** 4027 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled 4028 * @pf: the PF 4029 * 4030 * This function waits for the Tx queues to be in disabled state for all the 4031 * VSIs that are managed by this PF. 4032 **/ 4033 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf) 4034 { 4035 int v, ret = 0; 4036 4037 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4038 /* No need to wait for FCoE VSI queues */ 4039 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 4040 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]); 4041 if (ret) 4042 break; 4043 } 4044 } 4045 4046 return ret; 4047 } 4048 4049 #endif 4050 /** 4051 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4052 * @pf: pointer to PF 4053 * 4054 * Get TC map for ISCSI PF type that will include iSCSI TC 4055 * and LAN TC. 4056 **/ 4057 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4058 { 4059 struct i40e_dcb_app_priority_table app; 4060 struct i40e_hw *hw = &pf->hw; 4061 u8 enabled_tc = 1; /* TC0 is always enabled */ 4062 u8 tc, i; 4063 /* Get the iSCSI APP TLV */ 4064 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4065 4066 for (i = 0; i < dcbcfg->numapps; i++) { 4067 app = dcbcfg->app[i]; 4068 if (app.selector == I40E_APP_SEL_TCPIP && 4069 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4070 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4071 enabled_tc |= (1 << tc); 4072 break; 4073 } 4074 } 4075 4076 return enabled_tc; 4077 } 4078 4079 /** 4080 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4081 * @dcbcfg: the corresponding DCBx configuration structure 4082 * 4083 * Return the number of TCs from given DCBx configuration 4084 **/ 4085 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4086 { 4087 u8 num_tc = 0; 4088 int i; 4089 4090 /* Scan the ETS Config Priority Table to find 4091 * traffic class enabled for a given priority 4092 * and use the traffic class index to get the 4093 * number of traffic classes enabled 4094 */ 4095 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4096 if (dcbcfg->etscfg.prioritytable[i] > num_tc) 4097 num_tc = dcbcfg->etscfg.prioritytable[i]; 4098 } 4099 4100 /* Traffic class index starts from zero so 4101 * increment to return the actual count 4102 */ 4103 return num_tc + 1; 4104 } 4105 4106 /** 4107 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4108 * @dcbcfg: the corresponding DCBx configuration structure 4109 * 4110 * Query the current DCB configuration and return the number of 4111 * traffic classes enabled from the given DCBX config 4112 **/ 4113 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4114 { 4115 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4116 u8 enabled_tc = 1; 4117 u8 i; 4118 4119 for (i = 0; i < num_tc; i++) 4120 enabled_tc |= 1 << i; 4121 4122 return enabled_tc; 4123 } 4124 4125 /** 4126 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4127 * @pf: PF being queried 4128 * 4129 * Return number of traffic classes enabled for the given PF 4130 **/ 4131 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4132 { 4133 struct i40e_hw *hw = &pf->hw; 4134 u8 i, enabled_tc; 4135 u8 num_tc = 0; 4136 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4137 4138 /* If DCB is not enabled then always in single TC */ 4139 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4140 return 1; 4141 4142 /* SFP mode will be enabled for all TCs on port */ 4143 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4144 return i40e_dcb_get_num_tc(dcbcfg); 4145 4146 /* MFP mode return count of enabled TCs for this PF */ 4147 if (pf->hw.func_caps.iscsi) 4148 enabled_tc = i40e_get_iscsi_tc_map(pf); 4149 else 4150 return 1; /* Only TC0 */ 4151 4152 /* At least have TC0 */ 4153 enabled_tc = (enabled_tc ? enabled_tc : 0x1); 4154 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4155 if (enabled_tc & (1 << i)) 4156 num_tc++; 4157 } 4158 return num_tc; 4159 } 4160 4161 /** 4162 * i40e_pf_get_default_tc - Get bitmap for first enabled TC 4163 * @pf: PF being queried 4164 * 4165 * Return a bitmap for first enabled traffic class for this PF. 4166 **/ 4167 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) 4168 { 4169 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4170 u8 i = 0; 4171 4172 if (!enabled_tc) 4173 return 0x1; /* TC0 */ 4174 4175 /* Find the first enabled TC */ 4176 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4177 if (enabled_tc & (1 << i)) 4178 break; 4179 } 4180 4181 return 1 << i; 4182 } 4183 4184 /** 4185 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4186 * @pf: PF being queried 4187 * 4188 * Return a bitmap for enabled traffic classes for this PF. 4189 **/ 4190 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4191 { 4192 /* If DCB is not enabled for this PF then just return default TC */ 4193 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4194 return i40e_pf_get_default_tc(pf); 4195 4196 /* SFP mode we want PF to be enabled for all TCs */ 4197 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4198 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4199 4200 /* MFP enabled and iSCSI PF type */ 4201 if (pf->hw.func_caps.iscsi) 4202 return i40e_get_iscsi_tc_map(pf); 4203 else 4204 return i40e_pf_get_default_tc(pf); 4205 } 4206 4207 /** 4208 * i40e_vsi_get_bw_info - Query VSI BW Information 4209 * @vsi: the VSI being queried 4210 * 4211 * Returns 0 on success, negative value on failure 4212 **/ 4213 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4214 { 4215 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4216 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4217 struct i40e_pf *pf = vsi->back; 4218 struct i40e_hw *hw = &pf->hw; 4219 i40e_status aq_ret; 4220 u32 tc_bw_max; 4221 int i; 4222 4223 /* Get the VSI level BW configuration */ 4224 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4225 if (aq_ret) { 4226 dev_info(&pf->pdev->dev, 4227 "couldn't get PF vsi bw config, err %d, aq_err %d\n", 4228 aq_ret, pf->hw.aq.asq_last_status); 4229 return -EINVAL; 4230 } 4231 4232 /* Get the VSI level BW configuration per TC */ 4233 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4234 NULL); 4235 if (aq_ret) { 4236 dev_info(&pf->pdev->dev, 4237 "couldn't get PF vsi ets bw config, err %d, aq_err %d\n", 4238 aq_ret, pf->hw.aq.asq_last_status); 4239 return -EINVAL; 4240 } 4241 4242 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4243 dev_info(&pf->pdev->dev, 4244 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4245 bw_config.tc_valid_bits, 4246 bw_ets_config.tc_valid_bits); 4247 /* Still continuing */ 4248 } 4249 4250 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4251 vsi->bw_max_quanta = bw_config.max_bw; 4252 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4253 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4254 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4255 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4256 vsi->bw_ets_limit_credits[i] = 4257 le16_to_cpu(bw_ets_config.credits[i]); 4258 /* 3 bits out of 4 for each TC */ 4259 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4260 } 4261 4262 return 0; 4263 } 4264 4265 /** 4266 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4267 * @vsi: the VSI being configured 4268 * @enabled_tc: TC bitmap 4269 * @bw_credits: BW shared credits per TC 4270 * 4271 * Returns 0 on success, negative value on failure 4272 **/ 4273 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4274 u8 *bw_share) 4275 { 4276 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4277 i40e_status aq_ret; 4278 int i; 4279 4280 bw_data.tc_valid_bits = enabled_tc; 4281 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4282 bw_data.tc_bw_credits[i] = bw_share[i]; 4283 4284 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4285 NULL); 4286 if (aq_ret) { 4287 dev_info(&vsi->back->pdev->dev, 4288 "AQ command Config VSI BW allocation per TC failed = %d\n", 4289 vsi->back->hw.aq.asq_last_status); 4290 return -EINVAL; 4291 } 4292 4293 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4294 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4295 4296 return 0; 4297 } 4298 4299 /** 4300 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4301 * @vsi: the VSI being configured 4302 * @enabled_tc: TC map to be enabled 4303 * 4304 **/ 4305 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4306 { 4307 struct net_device *netdev = vsi->netdev; 4308 struct i40e_pf *pf = vsi->back; 4309 struct i40e_hw *hw = &pf->hw; 4310 u8 netdev_tc = 0; 4311 int i; 4312 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4313 4314 if (!netdev) 4315 return; 4316 4317 if (!enabled_tc) { 4318 netdev_reset_tc(netdev); 4319 return; 4320 } 4321 4322 /* Set up actual enabled TCs on the VSI */ 4323 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 4324 return; 4325 4326 /* set per TC queues for the VSI */ 4327 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4328 /* Only set TC queues for enabled tcs 4329 * 4330 * e.g. For a VSI that has TC0 and TC3 enabled the 4331 * enabled_tc bitmap would be 0x00001001; the driver 4332 * will set the numtc for netdev as 2 that will be 4333 * referenced by the netdev layer as TC 0 and 1. 4334 */ 4335 if (vsi->tc_config.enabled_tc & (1 << i)) 4336 netdev_set_tc_queue(netdev, 4337 vsi->tc_config.tc_info[i].netdev_tc, 4338 vsi->tc_config.tc_info[i].qcount, 4339 vsi->tc_config.tc_info[i].qoffset); 4340 } 4341 4342 /* Assign UP2TC map for the VSI */ 4343 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4344 /* Get the actual TC# for the UP */ 4345 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 4346 /* Get the mapped netdev TC# for the UP */ 4347 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 4348 netdev_set_prio_tc_map(netdev, i, netdev_tc); 4349 } 4350 } 4351 4352 /** 4353 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 4354 * @vsi: the VSI being configured 4355 * @ctxt: the ctxt buffer returned from AQ VSI update param command 4356 **/ 4357 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 4358 struct i40e_vsi_context *ctxt) 4359 { 4360 /* copy just the sections touched not the entire info 4361 * since not all sections are valid as returned by 4362 * update vsi params 4363 */ 4364 vsi->info.mapping_flags = ctxt->info.mapping_flags; 4365 memcpy(&vsi->info.queue_mapping, 4366 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 4367 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 4368 sizeof(vsi->info.tc_mapping)); 4369 } 4370 4371 /** 4372 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 4373 * @vsi: VSI to be configured 4374 * @enabled_tc: TC bitmap 4375 * 4376 * This configures a particular VSI for TCs that are mapped to the 4377 * given TC bitmap. It uses default bandwidth share for TCs across 4378 * VSIs to configure TC for a particular VSI. 4379 * 4380 * NOTE: 4381 * It is expected that the VSI queues have been quisced before calling 4382 * this function. 4383 **/ 4384 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4385 { 4386 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 4387 struct i40e_vsi_context ctxt; 4388 int ret = 0; 4389 int i; 4390 4391 /* Check if enabled_tc is same as existing or new TCs */ 4392 if (vsi->tc_config.enabled_tc == enabled_tc) 4393 return ret; 4394 4395 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 4396 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4397 if (enabled_tc & (1 << i)) 4398 bw_share[i] = 1; 4399 } 4400 4401 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 4402 if (ret) { 4403 dev_info(&vsi->back->pdev->dev, 4404 "Failed configuring TC map %d for VSI %d\n", 4405 enabled_tc, vsi->seid); 4406 goto out; 4407 } 4408 4409 /* Update Queue Pairs Mapping for currently enabled UPs */ 4410 ctxt.seid = vsi->seid; 4411 ctxt.pf_num = vsi->back->hw.pf_id; 4412 ctxt.vf_num = 0; 4413 ctxt.uplink_seid = vsi->uplink_seid; 4414 ctxt.info = vsi->info; 4415 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 4416 4417 /* Update the VSI after updating the VSI queue-mapping information */ 4418 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 4419 if (ret) { 4420 dev_info(&vsi->back->pdev->dev, 4421 "update vsi failed, aq_err=%d\n", 4422 vsi->back->hw.aq.asq_last_status); 4423 goto out; 4424 } 4425 /* update the local VSI info with updated queue map */ 4426 i40e_vsi_update_queue_map(vsi, &ctxt); 4427 vsi->info.valid_sections = 0; 4428 4429 /* Update current VSI BW information */ 4430 ret = i40e_vsi_get_bw_info(vsi); 4431 if (ret) { 4432 dev_info(&vsi->back->pdev->dev, 4433 "Failed updating vsi bw info, aq_err=%d\n", 4434 vsi->back->hw.aq.asq_last_status); 4435 goto out; 4436 } 4437 4438 /* Update the netdev TC setup */ 4439 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 4440 out: 4441 return ret; 4442 } 4443 4444 /** 4445 * i40e_veb_config_tc - Configure TCs for given VEB 4446 * @veb: given VEB 4447 * @enabled_tc: TC bitmap 4448 * 4449 * Configures given TC bitmap for VEB (switching) element 4450 **/ 4451 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 4452 { 4453 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 4454 struct i40e_pf *pf = veb->pf; 4455 int ret = 0; 4456 int i; 4457 4458 /* No TCs or already enabled TCs just return */ 4459 if (!enabled_tc || veb->enabled_tc == enabled_tc) 4460 return ret; 4461 4462 bw_data.tc_valid_bits = enabled_tc; 4463 /* bw_data.absolute_credits is not set (relative) */ 4464 4465 /* Enable ETS TCs with equal BW Share for now */ 4466 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4467 if (enabled_tc & (1 << i)) 4468 bw_data.tc_bw_share_credits[i] = 1; 4469 } 4470 4471 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 4472 &bw_data, NULL); 4473 if (ret) { 4474 dev_info(&pf->pdev->dev, 4475 "veb bw config failed, aq_err=%d\n", 4476 pf->hw.aq.asq_last_status); 4477 goto out; 4478 } 4479 4480 /* Update the BW information */ 4481 ret = i40e_veb_get_bw_info(veb); 4482 if (ret) { 4483 dev_info(&pf->pdev->dev, 4484 "Failed getting veb bw config, aq_err=%d\n", 4485 pf->hw.aq.asq_last_status); 4486 } 4487 4488 out: 4489 return ret; 4490 } 4491 4492 #ifdef CONFIG_I40E_DCB 4493 /** 4494 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 4495 * @pf: PF struct 4496 * 4497 * Reconfigure VEB/VSIs on a given PF; it is assumed that 4498 * the caller would've quiesce all the VSIs before calling 4499 * this function 4500 **/ 4501 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 4502 { 4503 u8 tc_map = 0; 4504 int ret; 4505 u8 v; 4506 4507 /* Enable the TCs available on PF to all VEBs */ 4508 tc_map = i40e_pf_get_tc_map(pf); 4509 for (v = 0; v < I40E_MAX_VEB; v++) { 4510 if (!pf->veb[v]) 4511 continue; 4512 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 4513 if (ret) { 4514 dev_info(&pf->pdev->dev, 4515 "Failed configuring TC for VEB seid=%d\n", 4516 pf->veb[v]->seid); 4517 /* Will try to configure as many components */ 4518 } 4519 } 4520 4521 /* Update each VSI */ 4522 for (v = 0; v < pf->num_alloc_vsi; v++) { 4523 if (!pf->vsi[v]) 4524 continue; 4525 4526 /* - Enable all TCs for the LAN VSI 4527 #ifdef I40E_FCOE 4528 * - For FCoE VSI only enable the TC configured 4529 * as per the APP TLV 4530 #endif 4531 * - For all others keep them at TC0 for now 4532 */ 4533 if (v == pf->lan_vsi) 4534 tc_map = i40e_pf_get_tc_map(pf); 4535 else 4536 tc_map = i40e_pf_get_default_tc(pf); 4537 #ifdef I40E_FCOE 4538 if (pf->vsi[v]->type == I40E_VSI_FCOE) 4539 tc_map = i40e_get_fcoe_tc_map(pf); 4540 #endif /* #ifdef I40E_FCOE */ 4541 4542 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 4543 if (ret) { 4544 dev_info(&pf->pdev->dev, 4545 "Failed configuring TC for VSI seid=%d\n", 4546 pf->vsi[v]->seid); 4547 /* Will try to configure as many components */ 4548 } else { 4549 /* Re-configure VSI vectors based on updated TC map */ 4550 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 4551 if (pf->vsi[v]->netdev) 4552 i40e_dcbnl_set_all(pf->vsi[v]); 4553 } 4554 } 4555 } 4556 4557 /** 4558 * i40e_resume_port_tx - Resume port Tx 4559 * @pf: PF struct 4560 * 4561 * Resume a port's Tx and issue a PF reset in case of failure to 4562 * resume. 4563 **/ 4564 static int i40e_resume_port_tx(struct i40e_pf *pf) 4565 { 4566 struct i40e_hw *hw = &pf->hw; 4567 int ret; 4568 4569 ret = i40e_aq_resume_port_tx(hw, NULL); 4570 if (ret) { 4571 dev_info(&pf->pdev->dev, 4572 "AQ command Resume Port Tx failed = %d\n", 4573 pf->hw.aq.asq_last_status); 4574 /* Schedule PF reset to recover */ 4575 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 4576 i40e_service_event_schedule(pf); 4577 } 4578 4579 return ret; 4580 } 4581 4582 /** 4583 * i40e_init_pf_dcb - Initialize DCB configuration 4584 * @pf: PF being configured 4585 * 4586 * Query the current DCB configuration and cache it 4587 * in the hardware structure 4588 **/ 4589 static int i40e_init_pf_dcb(struct i40e_pf *pf) 4590 { 4591 struct i40e_hw *hw = &pf->hw; 4592 int err = 0; 4593 4594 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 4595 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 4596 (pf->hw.aq.fw_maj_ver < 4)) 4597 goto out; 4598 4599 /* Get the initial DCB configuration */ 4600 err = i40e_init_dcb(hw); 4601 if (!err) { 4602 /* Device/Function is not DCBX capable */ 4603 if ((!hw->func_caps.dcb) || 4604 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 4605 dev_info(&pf->pdev->dev, 4606 "DCBX offload is not supported or is disabled for this PF.\n"); 4607 4608 if (pf->flags & I40E_FLAG_MFP_ENABLED) 4609 goto out; 4610 4611 } else { 4612 /* When status is not DISABLED then DCBX in FW */ 4613 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 4614 DCB_CAP_DCBX_VER_IEEE; 4615 4616 pf->flags |= I40E_FLAG_DCB_CAPABLE; 4617 /* Enable DCB tagging only when more than one TC */ 4618 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 4619 pf->flags |= I40E_FLAG_DCB_ENABLED; 4620 dev_dbg(&pf->pdev->dev, 4621 "DCBX offload is supported for this PF.\n"); 4622 } 4623 } else { 4624 dev_info(&pf->pdev->dev, 4625 "AQ Querying DCB configuration failed: aq_err %d\n", 4626 pf->hw.aq.asq_last_status); 4627 } 4628 4629 out: 4630 return err; 4631 } 4632 #endif /* CONFIG_I40E_DCB */ 4633 #define SPEED_SIZE 14 4634 #define FC_SIZE 8 4635 /** 4636 * i40e_print_link_message - print link up or down 4637 * @vsi: the VSI for which link needs a message 4638 */ 4639 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 4640 { 4641 char speed[SPEED_SIZE] = "Unknown"; 4642 char fc[FC_SIZE] = "RX/TX"; 4643 4644 if (!isup) { 4645 netdev_info(vsi->netdev, "NIC Link is Down\n"); 4646 return; 4647 } 4648 4649 /* Warn user if link speed on NPAR enabled partition is not at 4650 * least 10GB 4651 */ 4652 if (vsi->back->hw.func_caps.npar_enable && 4653 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 4654 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 4655 netdev_warn(vsi->netdev, 4656 "The partition detected link speed that is less than 10Gbps\n"); 4657 4658 switch (vsi->back->hw.phy.link_info.link_speed) { 4659 case I40E_LINK_SPEED_40GB: 4660 strlcpy(speed, "40 Gbps", SPEED_SIZE); 4661 break; 4662 case I40E_LINK_SPEED_20GB: 4663 strncpy(speed, "20 Gbps", SPEED_SIZE); 4664 break; 4665 case I40E_LINK_SPEED_10GB: 4666 strlcpy(speed, "10 Gbps", SPEED_SIZE); 4667 break; 4668 case I40E_LINK_SPEED_1GB: 4669 strlcpy(speed, "1000 Mbps", SPEED_SIZE); 4670 break; 4671 case I40E_LINK_SPEED_100MB: 4672 strncpy(speed, "100 Mbps", SPEED_SIZE); 4673 break; 4674 default: 4675 break; 4676 } 4677 4678 switch (vsi->back->hw.fc.current_mode) { 4679 case I40E_FC_FULL: 4680 strlcpy(fc, "RX/TX", FC_SIZE); 4681 break; 4682 case I40E_FC_TX_PAUSE: 4683 strlcpy(fc, "TX", FC_SIZE); 4684 break; 4685 case I40E_FC_RX_PAUSE: 4686 strlcpy(fc, "RX", FC_SIZE); 4687 break; 4688 default: 4689 strlcpy(fc, "None", FC_SIZE); 4690 break; 4691 } 4692 4693 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n", 4694 speed, fc); 4695 } 4696 4697 /** 4698 * i40e_up_complete - Finish the last steps of bringing up a connection 4699 * @vsi: the VSI being configured 4700 **/ 4701 static int i40e_up_complete(struct i40e_vsi *vsi) 4702 { 4703 struct i40e_pf *pf = vsi->back; 4704 int err; 4705 4706 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4707 i40e_vsi_configure_msix(vsi); 4708 else 4709 i40e_configure_msi_and_legacy(vsi); 4710 4711 /* start rings */ 4712 err = i40e_vsi_control_rings(vsi, true); 4713 if (err) 4714 return err; 4715 4716 clear_bit(__I40E_DOWN, &vsi->state); 4717 i40e_napi_enable_all(vsi); 4718 i40e_vsi_enable_irq(vsi); 4719 4720 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 4721 (vsi->netdev)) { 4722 i40e_print_link_message(vsi, true); 4723 netif_tx_start_all_queues(vsi->netdev); 4724 netif_carrier_on(vsi->netdev); 4725 } else if (vsi->netdev) { 4726 i40e_print_link_message(vsi, false); 4727 /* need to check for qualified module here*/ 4728 if ((pf->hw.phy.link_info.link_info & 4729 I40E_AQ_MEDIA_AVAILABLE) && 4730 (!(pf->hw.phy.link_info.an_info & 4731 I40E_AQ_QUALIFIED_MODULE))) 4732 netdev_err(vsi->netdev, 4733 "the driver failed to link because an unqualified module was detected."); 4734 } 4735 4736 /* replay FDIR SB filters */ 4737 if (vsi->type == I40E_VSI_FDIR) { 4738 /* reset fd counters */ 4739 pf->fd_add_err = pf->fd_atr_cnt = 0; 4740 if (pf->fd_tcp_rule > 0) { 4741 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 4742 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 4743 pf->fd_tcp_rule = 0; 4744 } 4745 i40e_fdir_filter_restore(vsi); 4746 } 4747 i40e_service_event_schedule(pf); 4748 4749 return 0; 4750 } 4751 4752 /** 4753 * i40e_vsi_reinit_locked - Reset the VSI 4754 * @vsi: the VSI being configured 4755 * 4756 * Rebuild the ring structs after some configuration 4757 * has changed, e.g. MTU size. 4758 **/ 4759 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 4760 { 4761 struct i40e_pf *pf = vsi->back; 4762 4763 WARN_ON(in_interrupt()); 4764 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 4765 usleep_range(1000, 2000); 4766 i40e_down(vsi); 4767 4768 /* Give a VF some time to respond to the reset. The 4769 * two second wait is based upon the watchdog cycle in 4770 * the VF driver. 4771 */ 4772 if (vsi->type == I40E_VSI_SRIOV) 4773 msleep(2000); 4774 i40e_up(vsi); 4775 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 4776 } 4777 4778 /** 4779 * i40e_up - Bring the connection back up after being down 4780 * @vsi: the VSI being configured 4781 **/ 4782 int i40e_up(struct i40e_vsi *vsi) 4783 { 4784 int err; 4785 4786 err = i40e_vsi_configure(vsi); 4787 if (!err) 4788 err = i40e_up_complete(vsi); 4789 4790 return err; 4791 } 4792 4793 /** 4794 * i40e_down - Shutdown the connection processing 4795 * @vsi: the VSI being stopped 4796 **/ 4797 void i40e_down(struct i40e_vsi *vsi) 4798 { 4799 int i; 4800 4801 /* It is assumed that the caller of this function 4802 * sets the vsi->state __I40E_DOWN bit. 4803 */ 4804 if (vsi->netdev) { 4805 netif_carrier_off(vsi->netdev); 4806 netif_tx_disable(vsi->netdev); 4807 } 4808 i40e_vsi_disable_irq(vsi); 4809 i40e_vsi_control_rings(vsi, false); 4810 i40e_napi_disable_all(vsi); 4811 4812 for (i = 0; i < vsi->num_queue_pairs; i++) { 4813 i40e_clean_tx_ring(vsi->tx_rings[i]); 4814 i40e_clean_rx_ring(vsi->rx_rings[i]); 4815 } 4816 } 4817 4818 /** 4819 * i40e_setup_tc - configure multiple traffic classes 4820 * @netdev: net device to configure 4821 * @tc: number of traffic classes to enable 4822 **/ 4823 #ifdef I40E_FCOE 4824 int i40e_setup_tc(struct net_device *netdev, u8 tc) 4825 #else 4826 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 4827 #endif 4828 { 4829 struct i40e_netdev_priv *np = netdev_priv(netdev); 4830 struct i40e_vsi *vsi = np->vsi; 4831 struct i40e_pf *pf = vsi->back; 4832 u8 enabled_tc = 0; 4833 int ret = -EINVAL; 4834 int i; 4835 4836 /* Check if DCB enabled to continue */ 4837 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 4838 netdev_info(netdev, "DCB is not enabled for adapter\n"); 4839 goto exit; 4840 } 4841 4842 /* Check if MFP enabled */ 4843 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4844 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 4845 goto exit; 4846 } 4847 4848 /* Check whether tc count is within enabled limit */ 4849 if (tc > i40e_pf_get_num_tc(pf)) { 4850 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 4851 goto exit; 4852 } 4853 4854 /* Generate TC map for number of tc requested */ 4855 for (i = 0; i < tc; i++) 4856 enabled_tc |= (1 << i); 4857 4858 /* Requesting same TC configuration as already enabled */ 4859 if (enabled_tc == vsi->tc_config.enabled_tc) 4860 return 0; 4861 4862 /* Quiesce VSI queues */ 4863 i40e_quiesce_vsi(vsi); 4864 4865 /* Configure VSI for enabled TCs */ 4866 ret = i40e_vsi_config_tc(vsi, enabled_tc); 4867 if (ret) { 4868 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 4869 vsi->seid); 4870 goto exit; 4871 } 4872 4873 /* Unquiesce VSI */ 4874 i40e_unquiesce_vsi(vsi); 4875 4876 exit: 4877 return ret; 4878 } 4879 4880 /** 4881 * i40e_open - Called when a network interface is made active 4882 * @netdev: network interface device structure 4883 * 4884 * The open entry point is called when a network interface is made 4885 * active by the system (IFF_UP). At this point all resources needed 4886 * for transmit and receive operations are allocated, the interrupt 4887 * handler is registered with the OS, the netdev watchdog subtask is 4888 * enabled, and the stack is notified that the interface is ready. 4889 * 4890 * Returns 0 on success, negative value on failure 4891 **/ 4892 int i40e_open(struct net_device *netdev) 4893 { 4894 struct i40e_netdev_priv *np = netdev_priv(netdev); 4895 struct i40e_vsi *vsi = np->vsi; 4896 struct i40e_pf *pf = vsi->back; 4897 int err; 4898 4899 /* disallow open during test or if eeprom is broken */ 4900 if (test_bit(__I40E_TESTING, &pf->state) || 4901 test_bit(__I40E_BAD_EEPROM, &pf->state)) 4902 return -EBUSY; 4903 4904 netif_carrier_off(netdev); 4905 4906 err = i40e_vsi_open(vsi); 4907 if (err) 4908 return err; 4909 4910 /* configure global TSO hardware offload settings */ 4911 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 4912 TCP_FLAG_FIN) >> 16); 4913 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 4914 TCP_FLAG_FIN | 4915 TCP_FLAG_CWR) >> 16); 4916 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 4917 4918 #ifdef CONFIG_I40E_VXLAN 4919 vxlan_get_rx_port(netdev); 4920 #endif 4921 4922 return 0; 4923 } 4924 4925 /** 4926 * i40e_vsi_open - 4927 * @vsi: the VSI to open 4928 * 4929 * Finish initialization of the VSI. 4930 * 4931 * Returns 0 on success, negative value on failure 4932 **/ 4933 int i40e_vsi_open(struct i40e_vsi *vsi) 4934 { 4935 struct i40e_pf *pf = vsi->back; 4936 char int_name[I40E_INT_NAME_STR_LEN]; 4937 int err; 4938 4939 /* allocate descriptors */ 4940 err = i40e_vsi_setup_tx_resources(vsi); 4941 if (err) 4942 goto err_setup_tx; 4943 err = i40e_vsi_setup_rx_resources(vsi); 4944 if (err) 4945 goto err_setup_rx; 4946 4947 err = i40e_vsi_configure(vsi); 4948 if (err) 4949 goto err_setup_rx; 4950 4951 if (vsi->netdev) { 4952 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 4953 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 4954 err = i40e_vsi_request_irq(vsi, int_name); 4955 if (err) 4956 goto err_setup_rx; 4957 4958 /* Notify the stack of the actual queue counts. */ 4959 err = netif_set_real_num_tx_queues(vsi->netdev, 4960 vsi->num_queue_pairs); 4961 if (err) 4962 goto err_set_queues; 4963 4964 err = netif_set_real_num_rx_queues(vsi->netdev, 4965 vsi->num_queue_pairs); 4966 if (err) 4967 goto err_set_queues; 4968 4969 } else if (vsi->type == I40E_VSI_FDIR) { 4970 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 4971 dev_driver_string(&pf->pdev->dev), 4972 dev_name(&pf->pdev->dev)); 4973 err = i40e_vsi_request_irq(vsi, int_name); 4974 4975 } else { 4976 err = -EINVAL; 4977 goto err_setup_rx; 4978 } 4979 4980 err = i40e_up_complete(vsi); 4981 if (err) 4982 goto err_up_complete; 4983 4984 return 0; 4985 4986 err_up_complete: 4987 i40e_down(vsi); 4988 err_set_queues: 4989 i40e_vsi_free_irq(vsi); 4990 err_setup_rx: 4991 i40e_vsi_free_rx_resources(vsi); 4992 err_setup_tx: 4993 i40e_vsi_free_tx_resources(vsi); 4994 if (vsi == pf->vsi[pf->lan_vsi]) 4995 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 4996 4997 return err; 4998 } 4999 5000 /** 5001 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 5002 * @pf: Pointer to PF 5003 * 5004 * This function destroys the hlist where all the Flow Director 5005 * filters were saved. 5006 **/ 5007 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 5008 { 5009 struct i40e_fdir_filter *filter; 5010 struct hlist_node *node2; 5011 5012 hlist_for_each_entry_safe(filter, node2, 5013 &pf->fdir_filter_list, fdir_node) { 5014 hlist_del(&filter->fdir_node); 5015 kfree(filter); 5016 } 5017 pf->fdir_pf_active_filters = 0; 5018 } 5019 5020 /** 5021 * i40e_close - Disables a network interface 5022 * @netdev: network interface device structure 5023 * 5024 * The close entry point is called when an interface is de-activated 5025 * by the OS. The hardware is still under the driver's control, but 5026 * this netdev interface is disabled. 5027 * 5028 * Returns 0, this is not allowed to fail 5029 **/ 5030 #ifdef I40E_FCOE 5031 int i40e_close(struct net_device *netdev) 5032 #else 5033 static int i40e_close(struct net_device *netdev) 5034 #endif 5035 { 5036 struct i40e_netdev_priv *np = netdev_priv(netdev); 5037 struct i40e_vsi *vsi = np->vsi; 5038 5039 i40e_vsi_close(vsi); 5040 5041 return 0; 5042 } 5043 5044 /** 5045 * i40e_do_reset - Start a PF or Core Reset sequence 5046 * @pf: board private structure 5047 * @reset_flags: which reset is requested 5048 * 5049 * The essential difference in resets is that the PF Reset 5050 * doesn't clear the packet buffers, doesn't reset the PE 5051 * firmware, and doesn't bother the other PFs on the chip. 5052 **/ 5053 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 5054 { 5055 u32 val; 5056 5057 WARN_ON(in_interrupt()); 5058 5059 if (i40e_check_asq_alive(&pf->hw)) 5060 i40e_vc_notify_reset(pf); 5061 5062 /* do the biggest reset indicated */ 5063 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { 5064 5065 /* Request a Global Reset 5066 * 5067 * This will start the chip's countdown to the actual full 5068 * chip reset event, and a warning interrupt to be sent 5069 * to all PFs, including the requestor. Our handler 5070 * for the warning interrupt will deal with the shutdown 5071 * and recovery of the switch setup. 5072 */ 5073 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 5074 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5075 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 5076 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5077 5078 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { 5079 5080 /* Request a Core Reset 5081 * 5082 * Same as Global Reset, except does *not* include the MAC/PHY 5083 */ 5084 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 5085 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5086 val |= I40E_GLGEN_RTRIG_CORER_MASK; 5087 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5088 i40e_flush(&pf->hw); 5089 5090 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { 5091 5092 /* Request a PF Reset 5093 * 5094 * Resets only the PF-specific registers 5095 * 5096 * This goes directly to the tear-down and rebuild of 5097 * the switch, since we need to do all the recovery as 5098 * for the Core Reset. 5099 */ 5100 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5101 i40e_handle_reset_warning(pf); 5102 5103 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { 5104 int v; 5105 5106 /* Find the VSI(s) that requested a re-init */ 5107 dev_info(&pf->pdev->dev, 5108 "VSI reinit requested\n"); 5109 for (v = 0; v < pf->num_alloc_vsi; v++) { 5110 struct i40e_vsi *vsi = pf->vsi[v]; 5111 if (vsi != NULL && 5112 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5113 i40e_vsi_reinit_locked(pf->vsi[v]); 5114 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5115 } 5116 } 5117 5118 /* no further action needed, so return now */ 5119 return; 5120 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) { 5121 int v; 5122 5123 /* Find the VSI(s) that needs to be brought down */ 5124 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5125 for (v = 0; v < pf->num_alloc_vsi; v++) { 5126 struct i40e_vsi *vsi = pf->vsi[v]; 5127 if (vsi != NULL && 5128 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5129 set_bit(__I40E_DOWN, &vsi->state); 5130 i40e_down(vsi); 5131 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5132 } 5133 } 5134 5135 /* no further action needed, so return now */ 5136 return; 5137 } else { 5138 dev_info(&pf->pdev->dev, 5139 "bad reset request 0x%08x\n", reset_flags); 5140 return; 5141 } 5142 } 5143 5144 #ifdef CONFIG_I40E_DCB 5145 /** 5146 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5147 * @pf: board private structure 5148 * @old_cfg: current DCB config 5149 * @new_cfg: new DCB config 5150 **/ 5151 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5152 struct i40e_dcbx_config *old_cfg, 5153 struct i40e_dcbx_config *new_cfg) 5154 { 5155 bool need_reconfig = false; 5156 5157 /* Check if ETS configuration has changed */ 5158 if (memcmp(&new_cfg->etscfg, 5159 &old_cfg->etscfg, 5160 sizeof(new_cfg->etscfg))) { 5161 /* If Priority Table has changed reconfig is needed */ 5162 if (memcmp(&new_cfg->etscfg.prioritytable, 5163 &old_cfg->etscfg.prioritytable, 5164 sizeof(new_cfg->etscfg.prioritytable))) { 5165 need_reconfig = true; 5166 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5167 } 5168 5169 if (memcmp(&new_cfg->etscfg.tcbwtable, 5170 &old_cfg->etscfg.tcbwtable, 5171 sizeof(new_cfg->etscfg.tcbwtable))) 5172 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5173 5174 if (memcmp(&new_cfg->etscfg.tsatable, 5175 &old_cfg->etscfg.tsatable, 5176 sizeof(new_cfg->etscfg.tsatable))) 5177 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5178 } 5179 5180 /* Check if PFC configuration has changed */ 5181 if (memcmp(&new_cfg->pfc, 5182 &old_cfg->pfc, 5183 sizeof(new_cfg->pfc))) { 5184 need_reconfig = true; 5185 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5186 } 5187 5188 /* Check if APP Table has changed */ 5189 if (memcmp(&new_cfg->app, 5190 &old_cfg->app, 5191 sizeof(new_cfg->app))) { 5192 need_reconfig = true; 5193 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5194 } 5195 5196 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__, 5197 need_reconfig); 5198 return need_reconfig; 5199 } 5200 5201 /** 5202 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5203 * @pf: board private structure 5204 * @e: event info posted on ARQ 5205 **/ 5206 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5207 struct i40e_arq_event_info *e) 5208 { 5209 struct i40e_aqc_lldp_get_mib *mib = 5210 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5211 struct i40e_hw *hw = &pf->hw; 5212 struct i40e_dcbx_config tmp_dcbx_cfg; 5213 bool need_reconfig = false; 5214 int ret = 0; 5215 u8 type; 5216 5217 /* Not DCB capable or capability disabled */ 5218 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5219 return ret; 5220 5221 /* Ignore if event is not for Nearest Bridge */ 5222 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5223 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5224 dev_dbg(&pf->pdev->dev, 5225 "%s: LLDP event mib bridge type 0x%x\n", __func__, type); 5226 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5227 return ret; 5228 5229 /* Check MIB Type and return if event for Remote MIB update */ 5230 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5231 dev_dbg(&pf->pdev->dev, 5232 "%s: LLDP event mib type %s\n", __func__, 5233 type ? "remote" : "local"); 5234 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5235 /* Update the remote cached instance and return */ 5236 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5237 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5238 &hw->remote_dcbx_config); 5239 goto exit; 5240 } 5241 5242 /* Store the old configuration */ 5243 tmp_dcbx_cfg = hw->local_dcbx_config; 5244 5245 /* Reset the old DCBx configuration data */ 5246 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 5247 /* Get updated DCBX data from firmware */ 5248 ret = i40e_get_dcb_config(&pf->hw); 5249 if (ret) { 5250 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n"); 5251 goto exit; 5252 } 5253 5254 /* No change detected in DCBX configs */ 5255 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 5256 sizeof(tmp_dcbx_cfg))) { 5257 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5258 goto exit; 5259 } 5260 5261 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 5262 &hw->local_dcbx_config); 5263 5264 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 5265 5266 if (!need_reconfig) 5267 goto exit; 5268 5269 /* Enable DCB tagging only when more than one TC */ 5270 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5271 pf->flags |= I40E_FLAG_DCB_ENABLED; 5272 else 5273 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5274 5275 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5276 /* Reconfiguration needed quiesce all VSIs */ 5277 i40e_pf_quiesce_all_vsi(pf); 5278 5279 /* Changes in configuration update VEB/VSI */ 5280 i40e_dcb_reconfigure(pf); 5281 5282 ret = i40e_resume_port_tx(pf); 5283 5284 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5285 /* In case of error no point in resuming VSIs */ 5286 if (ret) 5287 goto exit; 5288 5289 /* Wait for the PF's Tx queues to be disabled */ 5290 ret = i40e_pf_wait_txq_disabled(pf); 5291 if (ret) { 5292 /* Schedule PF reset to recover */ 5293 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5294 i40e_service_event_schedule(pf); 5295 } else { 5296 i40e_pf_unquiesce_all_vsi(pf); 5297 } 5298 5299 exit: 5300 return ret; 5301 } 5302 #endif /* CONFIG_I40E_DCB */ 5303 5304 /** 5305 * i40e_do_reset_safe - Protected reset path for userland calls. 5306 * @pf: board private structure 5307 * @reset_flags: which reset is requested 5308 * 5309 **/ 5310 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 5311 { 5312 rtnl_lock(); 5313 i40e_do_reset(pf, reset_flags); 5314 rtnl_unlock(); 5315 } 5316 5317 /** 5318 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 5319 * @pf: board private structure 5320 * @e: event info posted on ARQ 5321 * 5322 * Handler for LAN Queue Overflow Event generated by the firmware for PF 5323 * and VF queues 5324 **/ 5325 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 5326 struct i40e_arq_event_info *e) 5327 { 5328 struct i40e_aqc_lan_overflow *data = 5329 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 5330 u32 queue = le32_to_cpu(data->prtdcb_rupto); 5331 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 5332 struct i40e_hw *hw = &pf->hw; 5333 struct i40e_vf *vf; 5334 u16 vf_id; 5335 5336 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 5337 queue, qtx_ctl); 5338 5339 /* Queue belongs to VF, find the VF and issue VF reset */ 5340 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 5341 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 5342 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 5343 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 5344 vf_id -= hw->func_caps.vf_base_id; 5345 vf = &pf->vf[vf_id]; 5346 i40e_vc_notify_vf_reset(vf); 5347 /* Allow VF to process pending reset notification */ 5348 msleep(20); 5349 i40e_reset_vf(vf, false); 5350 } 5351 } 5352 5353 /** 5354 * i40e_service_event_complete - Finish up the service event 5355 * @pf: board private structure 5356 **/ 5357 static void i40e_service_event_complete(struct i40e_pf *pf) 5358 { 5359 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); 5360 5361 /* flush memory to make sure state is correct before next watchog */ 5362 smp_mb__before_atomic(); 5363 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 5364 } 5365 5366 /** 5367 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 5368 * @pf: board private structure 5369 **/ 5370 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 5371 { 5372 u32 val, fcnt_prog; 5373 5374 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5375 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 5376 return fcnt_prog; 5377 } 5378 5379 /** 5380 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 5381 * @pf: board private structure 5382 **/ 5383 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 5384 { 5385 u32 val, fcnt_prog; 5386 5387 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5388 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 5389 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 5390 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 5391 return fcnt_prog; 5392 } 5393 5394 /** 5395 * i40e_get_global_fd_count - Get total FD filters programmed on device 5396 * @pf: board private structure 5397 **/ 5398 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 5399 { 5400 u32 val, fcnt_prog; 5401 5402 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 5403 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 5404 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 5405 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 5406 return fcnt_prog; 5407 } 5408 5409 /** 5410 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 5411 * @pf: board private structure 5412 **/ 5413 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 5414 { 5415 u32 fcnt_prog, fcnt_avail; 5416 5417 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5418 return; 5419 5420 /* Check if, FD SB or ATR was auto disabled and if there is enough room 5421 * to re-enable 5422 */ 5423 fcnt_prog = i40e_get_global_fd_count(pf); 5424 fcnt_avail = pf->fdir_pf_filter_count; 5425 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 5426 (pf->fd_add_err == 0) || 5427 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 5428 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 5429 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 5430 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5431 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 5432 } 5433 } 5434 /* Wait for some more space to be available to turn on ATR */ 5435 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 5436 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 5437 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5438 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5439 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); 5440 } 5441 } 5442 } 5443 5444 #define I40E_MIN_FD_FLUSH_INTERVAL 10 5445 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 5446 /** 5447 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 5448 * @pf: board private structure 5449 **/ 5450 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 5451 { 5452 unsigned long min_flush_time; 5453 int flush_wait_retry = 50; 5454 bool disable_atr = false; 5455 int fd_room; 5456 int reg; 5457 5458 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5459 return; 5460 5461 if (time_after(jiffies, pf->fd_flush_timestamp + 5462 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) { 5463 /* If the flush is happening too quick and we have mostly 5464 * SB rules we should not re-enable ATR for some time. 5465 */ 5466 min_flush_time = pf->fd_flush_timestamp 5467 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 5468 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 5469 5470 if (!(time_after(jiffies, min_flush_time)) && 5471 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 5472 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 5473 disable_atr = true; 5474 } 5475 5476 pf->fd_flush_timestamp = jiffies; 5477 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5478 /* flush all filters */ 5479 wr32(&pf->hw, I40E_PFQF_CTL_1, 5480 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 5481 i40e_flush(&pf->hw); 5482 pf->fd_flush_cnt++; 5483 pf->fd_add_err = 0; 5484 do { 5485 /* Check FD flush status every 5-6msec */ 5486 usleep_range(5000, 6000); 5487 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 5488 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 5489 break; 5490 } while (flush_wait_retry--); 5491 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 5492 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 5493 } else { 5494 /* replay sideband filters */ 5495 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 5496 if (!disable_atr) 5497 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 5498 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5499 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 5500 } 5501 } 5502 } 5503 5504 /** 5505 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 5506 * @pf: board private structure 5507 **/ 5508 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 5509 { 5510 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 5511 } 5512 5513 /* We can see up to 256 filter programming desc in transit if the filters are 5514 * being applied really fast; before we see the first 5515 * filter miss error on Rx queue 0. Accumulating enough error messages before 5516 * reacting will make sure we don't cause flush too often. 5517 */ 5518 #define I40E_MAX_FD_PROGRAM_ERROR 256 5519 5520 /** 5521 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 5522 * @pf: board private structure 5523 **/ 5524 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 5525 { 5526 5527 /* if interface is down do nothing */ 5528 if (test_bit(__I40E_DOWN, &pf->state)) 5529 return; 5530 5531 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5532 return; 5533 5534 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5535 i40e_fdir_flush_and_replay(pf); 5536 5537 i40e_fdir_check_and_reenable(pf); 5538 5539 } 5540 5541 /** 5542 * i40e_vsi_link_event - notify VSI of a link event 5543 * @vsi: vsi to be notified 5544 * @link_up: link up or down 5545 **/ 5546 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 5547 { 5548 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 5549 return; 5550 5551 switch (vsi->type) { 5552 case I40E_VSI_MAIN: 5553 #ifdef I40E_FCOE 5554 case I40E_VSI_FCOE: 5555 #endif 5556 if (!vsi->netdev || !vsi->netdev_registered) 5557 break; 5558 5559 if (link_up) { 5560 netif_carrier_on(vsi->netdev); 5561 netif_tx_wake_all_queues(vsi->netdev); 5562 } else { 5563 netif_carrier_off(vsi->netdev); 5564 netif_tx_stop_all_queues(vsi->netdev); 5565 } 5566 break; 5567 5568 case I40E_VSI_SRIOV: 5569 case I40E_VSI_VMDQ2: 5570 case I40E_VSI_CTRL: 5571 case I40E_VSI_MIRROR: 5572 default: 5573 /* there is no notification for other VSIs */ 5574 break; 5575 } 5576 } 5577 5578 /** 5579 * i40e_veb_link_event - notify elements on the veb of a link event 5580 * @veb: veb to be notified 5581 * @link_up: link up or down 5582 **/ 5583 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 5584 { 5585 struct i40e_pf *pf; 5586 int i; 5587 5588 if (!veb || !veb->pf) 5589 return; 5590 pf = veb->pf; 5591 5592 /* depth first... */ 5593 for (i = 0; i < I40E_MAX_VEB; i++) 5594 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 5595 i40e_veb_link_event(pf->veb[i], link_up); 5596 5597 /* ... now the local VSIs */ 5598 for (i = 0; i < pf->num_alloc_vsi; i++) 5599 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 5600 i40e_vsi_link_event(pf->vsi[i], link_up); 5601 } 5602 5603 /** 5604 * i40e_link_event - Update netif_carrier status 5605 * @pf: board private structure 5606 **/ 5607 static void i40e_link_event(struct i40e_pf *pf) 5608 { 5609 bool new_link, old_link; 5610 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5611 u8 new_link_speed, old_link_speed; 5612 5613 /* set this to force the get_link_status call to refresh state */ 5614 pf->hw.phy.get_link_info = true; 5615 5616 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 5617 new_link = i40e_get_link_status(&pf->hw); 5618 old_link_speed = pf->hw.phy.link_info_old.link_speed; 5619 new_link_speed = pf->hw.phy.link_info.link_speed; 5620 5621 if (new_link == old_link && 5622 new_link_speed == old_link_speed && 5623 (test_bit(__I40E_DOWN, &vsi->state) || 5624 new_link == netif_carrier_ok(vsi->netdev))) 5625 return; 5626 5627 if (!test_bit(__I40E_DOWN, &vsi->state)) 5628 i40e_print_link_message(vsi, new_link); 5629 5630 /* Notify the base of the switch tree connected to 5631 * the link. Floating VEBs are not notified. 5632 */ 5633 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 5634 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 5635 else 5636 i40e_vsi_link_event(vsi, new_link); 5637 5638 if (pf->vf) 5639 i40e_vc_notify_link_state(pf); 5640 5641 if (pf->flags & I40E_FLAG_PTP) 5642 i40e_ptp_set_increment(pf); 5643 } 5644 5645 /** 5646 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts 5647 * @pf: board private structure 5648 * 5649 * Set the per-queue flags to request a check for stuck queues in the irq 5650 * clean functions, then force interrupts to be sure the irq clean is called. 5651 **/ 5652 static void i40e_check_hang_subtask(struct i40e_pf *pf) 5653 { 5654 int i, v; 5655 5656 /* If we're down or resetting, just bail */ 5657 if (test_bit(__I40E_DOWN, &pf->state) || 5658 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5659 return; 5660 5661 /* for each VSI/netdev 5662 * for each Tx queue 5663 * set the check flag 5664 * for each q_vector 5665 * force an interrupt 5666 */ 5667 for (v = 0; v < pf->num_alloc_vsi; v++) { 5668 struct i40e_vsi *vsi = pf->vsi[v]; 5669 int armed = 0; 5670 5671 if (!pf->vsi[v] || 5672 test_bit(__I40E_DOWN, &vsi->state) || 5673 (vsi->netdev && !netif_carrier_ok(vsi->netdev))) 5674 continue; 5675 5676 for (i = 0; i < vsi->num_queue_pairs; i++) { 5677 set_check_for_tx_hang(vsi->tx_rings[i]); 5678 if (test_bit(__I40E_HANG_CHECK_ARMED, 5679 &vsi->tx_rings[i]->state)) 5680 armed++; 5681 } 5682 5683 if (armed) { 5684 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 5685 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, 5686 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 5687 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 5688 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 5689 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 5690 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 5691 } else { 5692 u16 vec = vsi->base_vector - 1; 5693 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | 5694 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK | 5695 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | 5696 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK | 5697 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK); 5698 for (i = 0; i < vsi->num_q_vectors; i++, vec++) 5699 wr32(&vsi->back->hw, 5700 I40E_PFINT_DYN_CTLN(vec), val); 5701 } 5702 i40e_flush(&vsi->back->hw); 5703 } 5704 } 5705 } 5706 5707 /** 5708 * i40e_watchdog_subtask - periodic checks not using event driven response 5709 * @pf: board private structure 5710 **/ 5711 static void i40e_watchdog_subtask(struct i40e_pf *pf) 5712 { 5713 int i; 5714 5715 /* if interface is down do nothing */ 5716 if (test_bit(__I40E_DOWN, &pf->state) || 5717 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5718 return; 5719 5720 /* make sure we don't do these things too often */ 5721 if (time_before(jiffies, (pf->service_timer_previous + 5722 pf->service_timer_period))) 5723 return; 5724 pf->service_timer_previous = jiffies; 5725 5726 i40e_check_hang_subtask(pf); 5727 i40e_link_event(pf); 5728 5729 /* Update the stats for active netdevs so the network stack 5730 * can look at updated numbers whenever it cares to 5731 */ 5732 for (i = 0; i < pf->num_alloc_vsi; i++) 5733 if (pf->vsi[i] && pf->vsi[i]->netdev) 5734 i40e_update_stats(pf->vsi[i]); 5735 5736 /* Update the stats for the active switching components */ 5737 for (i = 0; i < I40E_MAX_VEB; i++) 5738 if (pf->veb[i]) 5739 i40e_update_veb_stats(pf->veb[i]); 5740 5741 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 5742 } 5743 5744 /** 5745 * i40e_reset_subtask - Set up for resetting the device and driver 5746 * @pf: board private structure 5747 **/ 5748 static void i40e_reset_subtask(struct i40e_pf *pf) 5749 { 5750 u32 reset_flags = 0; 5751 5752 rtnl_lock(); 5753 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 5754 reset_flags |= (1 << __I40E_REINIT_REQUESTED); 5755 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 5756 } 5757 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 5758 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); 5759 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5760 } 5761 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 5762 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); 5763 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 5764 } 5765 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 5766 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); 5767 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 5768 } 5769 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 5770 reset_flags |= (1 << __I40E_DOWN_REQUESTED); 5771 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 5772 } 5773 5774 /* If there's a recovery already waiting, it takes 5775 * precedence before starting a new reset sequence. 5776 */ 5777 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 5778 i40e_handle_reset_warning(pf); 5779 goto unlock; 5780 } 5781 5782 /* If we're already down or resetting, just bail */ 5783 if (reset_flags && 5784 !test_bit(__I40E_DOWN, &pf->state) && 5785 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5786 i40e_do_reset(pf, reset_flags); 5787 5788 unlock: 5789 rtnl_unlock(); 5790 } 5791 5792 /** 5793 * i40e_handle_link_event - Handle link event 5794 * @pf: board private structure 5795 * @e: event info posted on ARQ 5796 **/ 5797 static void i40e_handle_link_event(struct i40e_pf *pf, 5798 struct i40e_arq_event_info *e) 5799 { 5800 struct i40e_hw *hw = &pf->hw; 5801 struct i40e_aqc_get_link_status *status = 5802 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 5803 5804 /* save off old link status information */ 5805 hw->phy.link_info_old = hw->phy.link_info; 5806 5807 /* Do a new status request to re-enable LSE reporting 5808 * and load new status information into the hw struct 5809 * This completely ignores any state information 5810 * in the ARQ event info, instead choosing to always 5811 * issue the AQ update link status command. 5812 */ 5813 i40e_link_event(pf); 5814 5815 /* check for unqualified module, if link is down */ 5816 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 5817 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 5818 (!(status->link_info & I40E_AQ_LINK_UP))) 5819 dev_err(&pf->pdev->dev, 5820 "The driver failed to link because an unqualified module was detected.\n"); 5821 } 5822 5823 /** 5824 * i40e_clean_adminq_subtask - Clean the AdminQ rings 5825 * @pf: board private structure 5826 **/ 5827 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 5828 { 5829 struct i40e_arq_event_info event; 5830 struct i40e_hw *hw = &pf->hw; 5831 u16 pending, i = 0; 5832 i40e_status ret; 5833 u16 opcode; 5834 u32 oldval; 5835 u32 val; 5836 5837 /* Do not run clean AQ when PF reset fails */ 5838 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 5839 return; 5840 5841 /* check for error indications */ 5842 val = rd32(&pf->hw, pf->hw.aq.arq.len); 5843 oldval = val; 5844 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 5845 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 5846 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 5847 } 5848 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 5849 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 5850 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 5851 } 5852 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 5853 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 5854 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 5855 } 5856 if (oldval != val) 5857 wr32(&pf->hw, pf->hw.aq.arq.len, val); 5858 5859 val = rd32(&pf->hw, pf->hw.aq.asq.len); 5860 oldval = val; 5861 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 5862 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 5863 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 5864 } 5865 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 5866 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 5867 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 5868 } 5869 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 5870 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 5871 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 5872 } 5873 if (oldval != val) 5874 wr32(&pf->hw, pf->hw.aq.asq.len, val); 5875 5876 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 5877 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 5878 if (!event.msg_buf) 5879 return; 5880 5881 do { 5882 ret = i40e_clean_arq_element(hw, &event, &pending); 5883 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 5884 break; 5885 else if (ret) { 5886 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 5887 break; 5888 } 5889 5890 opcode = le16_to_cpu(event.desc.opcode); 5891 switch (opcode) { 5892 5893 case i40e_aqc_opc_get_link_status: 5894 i40e_handle_link_event(pf, &event); 5895 break; 5896 case i40e_aqc_opc_send_msg_to_pf: 5897 ret = i40e_vc_process_vf_msg(pf, 5898 le16_to_cpu(event.desc.retval), 5899 le32_to_cpu(event.desc.cookie_high), 5900 le32_to_cpu(event.desc.cookie_low), 5901 event.msg_buf, 5902 event.msg_len); 5903 break; 5904 case i40e_aqc_opc_lldp_update_mib: 5905 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 5906 #ifdef CONFIG_I40E_DCB 5907 rtnl_lock(); 5908 ret = i40e_handle_lldp_event(pf, &event); 5909 rtnl_unlock(); 5910 #endif /* CONFIG_I40E_DCB */ 5911 break; 5912 case i40e_aqc_opc_event_lan_overflow: 5913 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 5914 i40e_handle_lan_overflow_event(pf, &event); 5915 break; 5916 case i40e_aqc_opc_send_msg_to_peer: 5917 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 5918 break; 5919 case i40e_aqc_opc_nvm_erase: 5920 case i40e_aqc_opc_nvm_update: 5921 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n"); 5922 break; 5923 default: 5924 dev_info(&pf->pdev->dev, 5925 "ARQ Error: Unknown event 0x%04x received\n", 5926 opcode); 5927 break; 5928 } 5929 } while (pending && (i++ < pf->adminq_work_limit)); 5930 5931 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 5932 /* re-enable Admin queue interrupt cause */ 5933 val = rd32(hw, I40E_PFINT_ICR0_ENA); 5934 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 5935 wr32(hw, I40E_PFINT_ICR0_ENA, val); 5936 i40e_flush(hw); 5937 5938 kfree(event.msg_buf); 5939 } 5940 5941 /** 5942 * i40e_verify_eeprom - make sure eeprom is good to use 5943 * @pf: board private structure 5944 **/ 5945 static void i40e_verify_eeprom(struct i40e_pf *pf) 5946 { 5947 int err; 5948 5949 err = i40e_diag_eeprom_test(&pf->hw); 5950 if (err) { 5951 /* retry in case of garbage read */ 5952 err = i40e_diag_eeprom_test(&pf->hw); 5953 if (err) { 5954 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 5955 err); 5956 set_bit(__I40E_BAD_EEPROM, &pf->state); 5957 } 5958 } 5959 5960 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 5961 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 5962 clear_bit(__I40E_BAD_EEPROM, &pf->state); 5963 } 5964 } 5965 5966 /** 5967 * i40e_enable_pf_switch_lb 5968 * @pf: pointer to the PF structure 5969 * 5970 * enable switch loop back or die - no point in a return value 5971 **/ 5972 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 5973 { 5974 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5975 struct i40e_vsi_context ctxt; 5976 int aq_ret; 5977 5978 ctxt.seid = pf->main_vsi_seid; 5979 ctxt.pf_num = pf->hw.pf_id; 5980 ctxt.vf_num = 0; 5981 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 5982 if (aq_ret) { 5983 dev_info(&pf->pdev->dev, 5984 "%s couldn't get PF vsi config, err %d, aq_err %d\n", 5985 __func__, aq_ret, pf->hw.aq.asq_last_status); 5986 return; 5987 } 5988 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 5989 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 5990 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 5991 5992 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 5993 if (aq_ret) { 5994 dev_info(&pf->pdev->dev, 5995 "%s: update vsi switch failed, aq_err=%d\n", 5996 __func__, vsi->back->hw.aq.asq_last_status); 5997 } 5998 } 5999 6000 /** 6001 * i40e_disable_pf_switch_lb 6002 * @pf: pointer to the PF structure 6003 * 6004 * disable switch loop back or die - no point in a return value 6005 **/ 6006 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 6007 { 6008 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6009 struct i40e_vsi_context ctxt; 6010 int aq_ret; 6011 6012 ctxt.seid = pf->main_vsi_seid; 6013 ctxt.pf_num = pf->hw.pf_id; 6014 ctxt.vf_num = 0; 6015 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6016 if (aq_ret) { 6017 dev_info(&pf->pdev->dev, 6018 "%s couldn't get PF vsi config, err %d, aq_err %d\n", 6019 __func__, aq_ret, pf->hw.aq.asq_last_status); 6020 return; 6021 } 6022 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6023 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6024 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6025 6026 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6027 if (aq_ret) { 6028 dev_info(&pf->pdev->dev, 6029 "%s: update vsi switch failed, aq_err=%d\n", 6030 __func__, vsi->back->hw.aq.asq_last_status); 6031 } 6032 } 6033 6034 /** 6035 * i40e_config_bridge_mode - Configure the HW bridge mode 6036 * @veb: pointer to the bridge instance 6037 * 6038 * Configure the loop back mode for the LAN VSI that is downlink to the 6039 * specified HW bridge instance. It is expected this function is called 6040 * when a new HW bridge is instantiated. 6041 **/ 6042 static void i40e_config_bridge_mode(struct i40e_veb *veb) 6043 { 6044 struct i40e_pf *pf = veb->pf; 6045 6046 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 6047 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 6048 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 6049 i40e_disable_pf_switch_lb(pf); 6050 else 6051 i40e_enable_pf_switch_lb(pf); 6052 } 6053 6054 /** 6055 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 6056 * @veb: pointer to the VEB instance 6057 * 6058 * This is a recursive function that first builds the attached VSIs then 6059 * recurses in to build the next layer of VEB. We track the connections 6060 * through our own index numbers because the seid's from the HW could 6061 * change across the reset. 6062 **/ 6063 static int i40e_reconstitute_veb(struct i40e_veb *veb) 6064 { 6065 struct i40e_vsi *ctl_vsi = NULL; 6066 struct i40e_pf *pf = veb->pf; 6067 int v, veb_idx; 6068 int ret; 6069 6070 /* build VSI that owns this VEB, temporarily attached to base VEB */ 6071 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 6072 if (pf->vsi[v] && 6073 pf->vsi[v]->veb_idx == veb->idx && 6074 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 6075 ctl_vsi = pf->vsi[v]; 6076 break; 6077 } 6078 } 6079 if (!ctl_vsi) { 6080 dev_info(&pf->pdev->dev, 6081 "missing owner VSI for veb_idx %d\n", veb->idx); 6082 ret = -ENOENT; 6083 goto end_reconstitute; 6084 } 6085 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 6086 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6087 ret = i40e_add_vsi(ctl_vsi); 6088 if (ret) { 6089 dev_info(&pf->pdev->dev, 6090 "rebuild of owner VSI failed: %d\n", ret); 6091 goto end_reconstitute; 6092 } 6093 i40e_vsi_reset_stats(ctl_vsi); 6094 6095 /* create the VEB in the switch and move the VSI onto the VEB */ 6096 ret = i40e_add_veb(veb, ctl_vsi); 6097 if (ret) 6098 goto end_reconstitute; 6099 6100 i40e_config_bridge_mode(veb); 6101 6102 /* create the remaining VSIs attached to this VEB */ 6103 for (v = 0; v < pf->num_alloc_vsi; v++) { 6104 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 6105 continue; 6106 6107 if (pf->vsi[v]->veb_idx == veb->idx) { 6108 struct i40e_vsi *vsi = pf->vsi[v]; 6109 vsi->uplink_seid = veb->seid; 6110 ret = i40e_add_vsi(vsi); 6111 if (ret) { 6112 dev_info(&pf->pdev->dev, 6113 "rebuild of vsi_idx %d failed: %d\n", 6114 v, ret); 6115 goto end_reconstitute; 6116 } 6117 i40e_vsi_reset_stats(vsi); 6118 } 6119 } 6120 6121 /* create any VEBs attached to this VEB - RECURSION */ 6122 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 6123 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 6124 pf->veb[veb_idx]->uplink_seid = veb->seid; 6125 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 6126 if (ret) 6127 break; 6128 } 6129 } 6130 6131 end_reconstitute: 6132 return ret; 6133 } 6134 6135 /** 6136 * i40e_get_capabilities - get info about the HW 6137 * @pf: the PF struct 6138 **/ 6139 static int i40e_get_capabilities(struct i40e_pf *pf) 6140 { 6141 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 6142 u16 data_size; 6143 int buf_len; 6144 int err; 6145 6146 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 6147 do { 6148 cap_buf = kzalloc(buf_len, GFP_KERNEL); 6149 if (!cap_buf) 6150 return -ENOMEM; 6151 6152 /* this loads the data into the hw struct for us */ 6153 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 6154 &data_size, 6155 i40e_aqc_opc_list_func_capabilities, 6156 NULL); 6157 /* data loaded, buffer no longer needed */ 6158 kfree(cap_buf); 6159 6160 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 6161 /* retry with a larger buffer */ 6162 buf_len = data_size; 6163 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 6164 dev_info(&pf->pdev->dev, 6165 "capability discovery failed: aq=%d\n", 6166 pf->hw.aq.asq_last_status); 6167 return -ENODEV; 6168 } 6169 } while (err); 6170 6171 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || 6172 (pf->hw.aq.fw_maj_ver < 2)) { 6173 pf->hw.func_caps.num_msix_vectors++; 6174 pf->hw.func_caps.num_msix_vectors_vf++; 6175 } 6176 6177 if (pf->hw.debug_mask & I40E_DEBUG_USER) 6178 dev_info(&pf->pdev->dev, 6179 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 6180 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 6181 pf->hw.func_caps.num_msix_vectors, 6182 pf->hw.func_caps.num_msix_vectors_vf, 6183 pf->hw.func_caps.fd_filters_guaranteed, 6184 pf->hw.func_caps.fd_filters_best_effort, 6185 pf->hw.func_caps.num_tx_qp, 6186 pf->hw.func_caps.num_vsis); 6187 6188 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 6189 + pf->hw.func_caps.num_vfs) 6190 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 6191 dev_info(&pf->pdev->dev, 6192 "got num_vsis %d, setting num_vsis to %d\n", 6193 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 6194 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 6195 } 6196 6197 return 0; 6198 } 6199 6200 static int i40e_vsi_clear(struct i40e_vsi *vsi); 6201 6202 /** 6203 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 6204 * @pf: board private structure 6205 **/ 6206 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 6207 { 6208 struct i40e_vsi *vsi; 6209 int i; 6210 6211 /* quick workaround for an NVM issue that leaves a critical register 6212 * uninitialized 6213 */ 6214 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6215 static const u32 hkey[] = { 6216 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6217 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6218 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6219 0x95b3a76d}; 6220 6221 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6222 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6223 } 6224 6225 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6226 return; 6227 6228 /* find existing VSI and see if it needs configuring */ 6229 vsi = NULL; 6230 for (i = 0; i < pf->num_alloc_vsi; i++) { 6231 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6232 vsi = pf->vsi[i]; 6233 break; 6234 } 6235 } 6236 6237 /* create a new VSI if none exists */ 6238 if (!vsi) { 6239 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6240 pf->vsi[pf->lan_vsi]->seid, 0); 6241 if (!vsi) { 6242 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6243 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6244 return; 6245 } 6246 } 6247 6248 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6249 } 6250 6251 /** 6252 * i40e_fdir_teardown - release the Flow Director resources 6253 * @pf: board private structure 6254 **/ 6255 static void i40e_fdir_teardown(struct i40e_pf *pf) 6256 { 6257 int i; 6258 6259 i40e_fdir_filter_exit(pf); 6260 for (i = 0; i < pf->num_alloc_vsi; i++) { 6261 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6262 i40e_vsi_release(pf->vsi[i]); 6263 break; 6264 } 6265 } 6266 } 6267 6268 /** 6269 * i40e_prep_for_reset - prep for the core to reset 6270 * @pf: board private structure 6271 * 6272 * Close up the VFs and other things in prep for PF Reset. 6273 **/ 6274 static void i40e_prep_for_reset(struct i40e_pf *pf) 6275 { 6276 struct i40e_hw *hw = &pf->hw; 6277 i40e_status ret = 0; 6278 u32 v; 6279 6280 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6281 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6282 return; 6283 6284 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6285 6286 /* quiesce the VSIs and their queues that are not already DOWN */ 6287 i40e_pf_quiesce_all_vsi(pf); 6288 6289 for (v = 0; v < pf->num_alloc_vsi; v++) { 6290 if (pf->vsi[v]) 6291 pf->vsi[v]->seid = 0; 6292 } 6293 6294 i40e_shutdown_adminq(&pf->hw); 6295 6296 /* call shutdown HMC */ 6297 if (hw->hmc.hmc_obj) { 6298 ret = i40e_shutdown_lan_hmc(hw); 6299 if (ret) 6300 dev_warn(&pf->pdev->dev, 6301 "shutdown_lan_hmc failed: %d\n", ret); 6302 } 6303 } 6304 6305 /** 6306 * i40e_send_version - update firmware with driver version 6307 * @pf: PF struct 6308 */ 6309 static void i40e_send_version(struct i40e_pf *pf) 6310 { 6311 struct i40e_driver_version dv; 6312 6313 dv.major_version = DRV_VERSION_MAJOR; 6314 dv.minor_version = DRV_VERSION_MINOR; 6315 dv.build_version = DRV_VERSION_BUILD; 6316 dv.subbuild_version = 0; 6317 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 6318 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 6319 } 6320 6321 /** 6322 * i40e_reset_and_rebuild - reset and rebuild using a saved config 6323 * @pf: board private structure 6324 * @reinit: if the Main VSI needs to re-initialized. 6325 **/ 6326 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 6327 { 6328 struct i40e_hw *hw = &pf->hw; 6329 u8 set_fc_aq_fail = 0; 6330 i40e_status ret; 6331 u32 v; 6332 6333 /* Now we wait for GRST to settle out. 6334 * We don't have to delete the VEBs or VSIs from the hw switch 6335 * because the reset will make them disappear. 6336 */ 6337 ret = i40e_pf_reset(hw); 6338 if (ret) { 6339 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 6340 set_bit(__I40E_RESET_FAILED, &pf->state); 6341 goto clear_recovery; 6342 } 6343 pf->pfr_count++; 6344 6345 if (test_bit(__I40E_DOWN, &pf->state)) 6346 goto clear_recovery; 6347 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 6348 6349 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 6350 ret = i40e_init_adminq(&pf->hw); 6351 if (ret) { 6352 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); 6353 goto clear_recovery; 6354 } 6355 6356 /* re-verify the eeprom if we just had an EMP reset */ 6357 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) 6358 i40e_verify_eeprom(pf); 6359 6360 i40e_clear_pxe_mode(hw); 6361 ret = i40e_get_capabilities(pf); 6362 if (ret) { 6363 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", 6364 ret); 6365 goto end_core_reset; 6366 } 6367 6368 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 6369 hw->func_caps.num_rx_qp, 6370 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 6371 if (ret) { 6372 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 6373 goto end_core_reset; 6374 } 6375 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 6376 if (ret) { 6377 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 6378 goto end_core_reset; 6379 } 6380 6381 #ifdef CONFIG_I40E_DCB 6382 ret = i40e_init_pf_dcb(pf); 6383 if (ret) { 6384 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 6385 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 6386 /* Continue without DCB enabled */ 6387 } 6388 #endif /* CONFIG_I40E_DCB */ 6389 #ifdef I40E_FCOE 6390 ret = i40e_init_pf_fcoe(pf); 6391 if (ret) 6392 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret); 6393 6394 #endif 6395 /* do basic switch setup */ 6396 ret = i40e_setup_pf_switch(pf, reinit); 6397 if (ret) 6398 goto end_core_reset; 6399 6400 /* driver is only interested in link up/down and module qualification 6401 * reports from firmware 6402 */ 6403 ret = i40e_aq_set_phy_int_mask(&pf->hw, 6404 I40E_AQ_EVENT_LINK_UPDOWN | 6405 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 6406 if (ret) 6407 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret); 6408 6409 /* make sure our flow control settings are restored */ 6410 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 6411 if (ret) 6412 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret); 6413 6414 /* Rebuild the VSIs and VEBs that existed before reset. 6415 * They are still in our local switch element arrays, so only 6416 * need to rebuild the switch model in the HW. 6417 * 6418 * If there were VEBs but the reconstitution failed, we'll try 6419 * try to recover minimal use by getting the basic PF VSI working. 6420 */ 6421 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 6422 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 6423 /* find the one VEB connected to the MAC, and find orphans */ 6424 for (v = 0; v < I40E_MAX_VEB; v++) { 6425 if (!pf->veb[v]) 6426 continue; 6427 6428 if (pf->veb[v]->uplink_seid == pf->mac_seid || 6429 pf->veb[v]->uplink_seid == 0) { 6430 ret = i40e_reconstitute_veb(pf->veb[v]); 6431 6432 if (!ret) 6433 continue; 6434 6435 /* If Main VEB failed, we're in deep doodoo, 6436 * so give up rebuilding the switch and set up 6437 * for minimal rebuild of PF VSI. 6438 * If orphan failed, we'll report the error 6439 * but try to keep going. 6440 */ 6441 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 6442 dev_info(&pf->pdev->dev, 6443 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 6444 ret); 6445 pf->vsi[pf->lan_vsi]->uplink_seid 6446 = pf->mac_seid; 6447 break; 6448 } else if (pf->veb[v]->uplink_seid == 0) { 6449 dev_info(&pf->pdev->dev, 6450 "rebuild of orphan VEB failed: %d\n", 6451 ret); 6452 } 6453 } 6454 } 6455 } 6456 6457 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 6458 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 6459 /* no VEB, so rebuild only the Main VSI */ 6460 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 6461 if (ret) { 6462 dev_info(&pf->pdev->dev, 6463 "rebuild of Main VSI failed: %d\n", ret); 6464 goto end_core_reset; 6465 } 6466 } 6467 6468 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 6469 (pf->hw.aq.fw_maj_ver < 4)) { 6470 msleep(75); 6471 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6472 if (ret) 6473 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 6474 pf->hw.aq.asq_last_status); 6475 } 6476 /* reinit the misc interrupt */ 6477 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6478 ret = i40e_setup_misc_vector(pf); 6479 6480 /* restart the VSIs that were rebuilt and running before the reset */ 6481 i40e_pf_unquiesce_all_vsi(pf); 6482 6483 if (pf->num_alloc_vfs) { 6484 for (v = 0; v < pf->num_alloc_vfs; v++) 6485 i40e_reset_vf(&pf->vf[v], true); 6486 } 6487 6488 /* tell the firmware that we're starting */ 6489 i40e_send_version(pf); 6490 6491 end_core_reset: 6492 clear_bit(__I40E_RESET_FAILED, &pf->state); 6493 clear_recovery: 6494 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 6495 } 6496 6497 /** 6498 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 6499 * @pf: board private structure 6500 * 6501 * Close up the VFs and other things in prep for a Core Reset, 6502 * then get ready to rebuild the world. 6503 **/ 6504 static void i40e_handle_reset_warning(struct i40e_pf *pf) 6505 { 6506 i40e_prep_for_reset(pf); 6507 i40e_reset_and_rebuild(pf, false); 6508 } 6509 6510 /** 6511 * i40e_handle_mdd_event 6512 * @pf: pointer to the PF structure 6513 * 6514 * Called from the MDD irq handler to identify possibly malicious vfs 6515 **/ 6516 static void i40e_handle_mdd_event(struct i40e_pf *pf) 6517 { 6518 struct i40e_hw *hw = &pf->hw; 6519 bool mdd_detected = false; 6520 bool pf_mdd_detected = false; 6521 struct i40e_vf *vf; 6522 u32 reg; 6523 int i; 6524 6525 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 6526 return; 6527 6528 /* find what triggered the MDD event */ 6529 reg = rd32(hw, I40E_GL_MDET_TX); 6530 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 6531 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 6532 I40E_GL_MDET_TX_PF_NUM_SHIFT; 6533 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 6534 I40E_GL_MDET_TX_VF_NUM_SHIFT; 6535 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 6536 I40E_GL_MDET_TX_EVENT_SHIFT; 6537 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 6538 I40E_GL_MDET_TX_QUEUE_SHIFT) - 6539 pf->hw.func_caps.base_queue; 6540 if (netif_msg_tx_err(pf)) 6541 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 6542 event, queue, pf_num, vf_num); 6543 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 6544 mdd_detected = true; 6545 } 6546 reg = rd32(hw, I40E_GL_MDET_RX); 6547 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 6548 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 6549 I40E_GL_MDET_RX_FUNCTION_SHIFT; 6550 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 6551 I40E_GL_MDET_RX_EVENT_SHIFT; 6552 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 6553 I40E_GL_MDET_RX_QUEUE_SHIFT) - 6554 pf->hw.func_caps.base_queue; 6555 if (netif_msg_rx_err(pf)) 6556 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 6557 event, queue, func); 6558 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 6559 mdd_detected = true; 6560 } 6561 6562 if (mdd_detected) { 6563 reg = rd32(hw, I40E_PF_MDET_TX); 6564 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 6565 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 6566 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 6567 pf_mdd_detected = true; 6568 } 6569 reg = rd32(hw, I40E_PF_MDET_RX); 6570 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 6571 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 6572 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 6573 pf_mdd_detected = true; 6574 } 6575 /* Queue belongs to the PF, initiate a reset */ 6576 if (pf_mdd_detected) { 6577 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6578 i40e_service_event_schedule(pf); 6579 } 6580 } 6581 6582 /* see if one of the VFs needs its hand slapped */ 6583 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 6584 vf = &(pf->vf[i]); 6585 reg = rd32(hw, I40E_VP_MDET_TX(i)); 6586 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 6587 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 6588 vf->num_mdd_events++; 6589 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 6590 i); 6591 } 6592 6593 reg = rd32(hw, I40E_VP_MDET_RX(i)); 6594 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 6595 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 6596 vf->num_mdd_events++; 6597 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 6598 i); 6599 } 6600 6601 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 6602 dev_info(&pf->pdev->dev, 6603 "Too many MDD events on VF %d, disabled\n", i); 6604 dev_info(&pf->pdev->dev, 6605 "Use PF Control I/F to re-enable the VF\n"); 6606 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 6607 } 6608 } 6609 6610 /* re-enable mdd interrupt cause */ 6611 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 6612 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 6613 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 6614 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 6615 i40e_flush(hw); 6616 } 6617 6618 #ifdef CONFIG_I40E_VXLAN 6619 /** 6620 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW 6621 * @pf: board private structure 6622 **/ 6623 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) 6624 { 6625 struct i40e_hw *hw = &pf->hw; 6626 i40e_status ret; 6627 __be16 port; 6628 int i; 6629 6630 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC)) 6631 return; 6632 6633 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC; 6634 6635 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 6636 if (pf->pending_vxlan_bitmap & (1 << i)) { 6637 pf->pending_vxlan_bitmap &= ~(1 << i); 6638 port = pf->vxlan_ports[i]; 6639 if (port) 6640 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port), 6641 I40E_AQC_TUNNEL_TYPE_VXLAN, 6642 NULL, NULL); 6643 else 6644 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 6645 6646 if (ret) { 6647 dev_info(&pf->pdev->dev, 6648 "%s vxlan port %d, index %d failed, err %d, aq_err %d\n", 6649 port ? "add" : "delete", 6650 ntohs(port), i, ret, 6651 pf->hw.aq.asq_last_status); 6652 pf->vxlan_ports[i] = 0; 6653 } 6654 } 6655 } 6656 } 6657 6658 #endif 6659 /** 6660 * i40e_service_task - Run the driver's async subtasks 6661 * @work: pointer to work_struct containing our data 6662 **/ 6663 static void i40e_service_task(struct work_struct *work) 6664 { 6665 struct i40e_pf *pf = container_of(work, 6666 struct i40e_pf, 6667 service_task); 6668 unsigned long start_time = jiffies; 6669 6670 /* don't bother with service tasks if a reset is in progress */ 6671 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 6672 i40e_service_event_complete(pf); 6673 return; 6674 } 6675 6676 i40e_reset_subtask(pf); 6677 i40e_handle_mdd_event(pf); 6678 i40e_vc_process_vflr_event(pf); 6679 i40e_watchdog_subtask(pf); 6680 i40e_fdir_reinit_subtask(pf); 6681 i40e_sync_filters_subtask(pf); 6682 #ifdef CONFIG_I40E_VXLAN 6683 i40e_sync_vxlan_filters_subtask(pf); 6684 #endif 6685 i40e_clean_adminq_subtask(pf); 6686 6687 i40e_service_event_complete(pf); 6688 6689 /* If the tasks have taken longer than one timer cycle or there 6690 * is more work to be done, reschedule the service task now 6691 * rather than wait for the timer to tick again. 6692 */ 6693 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 6694 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 6695 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 6696 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 6697 i40e_service_event_schedule(pf); 6698 } 6699 6700 /** 6701 * i40e_service_timer - timer callback 6702 * @data: pointer to PF struct 6703 **/ 6704 static void i40e_service_timer(unsigned long data) 6705 { 6706 struct i40e_pf *pf = (struct i40e_pf *)data; 6707 6708 mod_timer(&pf->service_timer, 6709 round_jiffies(jiffies + pf->service_timer_period)); 6710 i40e_service_event_schedule(pf); 6711 } 6712 6713 /** 6714 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 6715 * @vsi: the VSI being configured 6716 **/ 6717 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 6718 { 6719 struct i40e_pf *pf = vsi->back; 6720 6721 switch (vsi->type) { 6722 case I40E_VSI_MAIN: 6723 vsi->alloc_queue_pairs = pf->num_lan_qps; 6724 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6725 I40E_REQ_DESCRIPTOR_MULTIPLE); 6726 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6727 vsi->num_q_vectors = pf->num_lan_msix; 6728 else 6729 vsi->num_q_vectors = 1; 6730 6731 break; 6732 6733 case I40E_VSI_FDIR: 6734 vsi->alloc_queue_pairs = 1; 6735 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 6736 I40E_REQ_DESCRIPTOR_MULTIPLE); 6737 vsi->num_q_vectors = 1; 6738 break; 6739 6740 case I40E_VSI_VMDQ2: 6741 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 6742 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6743 I40E_REQ_DESCRIPTOR_MULTIPLE); 6744 vsi->num_q_vectors = pf->num_vmdq_msix; 6745 break; 6746 6747 case I40E_VSI_SRIOV: 6748 vsi->alloc_queue_pairs = pf->num_vf_qps; 6749 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6750 I40E_REQ_DESCRIPTOR_MULTIPLE); 6751 break; 6752 6753 #ifdef I40E_FCOE 6754 case I40E_VSI_FCOE: 6755 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 6756 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 6757 I40E_REQ_DESCRIPTOR_MULTIPLE); 6758 vsi->num_q_vectors = pf->num_fcoe_msix; 6759 break; 6760 6761 #endif /* I40E_FCOE */ 6762 default: 6763 WARN_ON(1); 6764 return -ENODATA; 6765 } 6766 6767 return 0; 6768 } 6769 6770 /** 6771 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 6772 * @type: VSI pointer 6773 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 6774 * 6775 * On error: returns error code (negative) 6776 * On success: returns 0 6777 **/ 6778 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 6779 { 6780 int size; 6781 int ret = 0; 6782 6783 /* allocate memory for both Tx and Rx ring pointers */ 6784 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 6785 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 6786 if (!vsi->tx_rings) 6787 return -ENOMEM; 6788 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 6789 6790 if (alloc_qvectors) { 6791 /* allocate memory for q_vector pointers */ 6792 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 6793 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 6794 if (!vsi->q_vectors) { 6795 ret = -ENOMEM; 6796 goto err_vectors; 6797 } 6798 } 6799 return ret; 6800 6801 err_vectors: 6802 kfree(vsi->tx_rings); 6803 return ret; 6804 } 6805 6806 /** 6807 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 6808 * @pf: board private structure 6809 * @type: type of VSI 6810 * 6811 * On error: returns error code (negative) 6812 * On success: returns vsi index in PF (positive) 6813 **/ 6814 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 6815 { 6816 int ret = -ENODEV; 6817 struct i40e_vsi *vsi; 6818 int vsi_idx; 6819 int i; 6820 6821 /* Need to protect the allocation of the VSIs at the PF level */ 6822 mutex_lock(&pf->switch_mutex); 6823 6824 /* VSI list may be fragmented if VSI creation/destruction has 6825 * been happening. We can afford to do a quick scan to look 6826 * for any free VSIs in the list. 6827 * 6828 * find next empty vsi slot, looping back around if necessary 6829 */ 6830 i = pf->next_vsi; 6831 while (i < pf->num_alloc_vsi && pf->vsi[i]) 6832 i++; 6833 if (i >= pf->num_alloc_vsi) { 6834 i = 0; 6835 while (i < pf->next_vsi && pf->vsi[i]) 6836 i++; 6837 } 6838 6839 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 6840 vsi_idx = i; /* Found one! */ 6841 } else { 6842 ret = -ENODEV; 6843 goto unlock_pf; /* out of VSI slots! */ 6844 } 6845 pf->next_vsi = ++i; 6846 6847 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 6848 if (!vsi) { 6849 ret = -ENOMEM; 6850 goto unlock_pf; 6851 } 6852 vsi->type = type; 6853 vsi->back = pf; 6854 set_bit(__I40E_DOWN, &vsi->state); 6855 vsi->flags = 0; 6856 vsi->idx = vsi_idx; 6857 vsi->rx_itr_setting = pf->rx_itr_default; 6858 vsi->tx_itr_setting = pf->tx_itr_default; 6859 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 6860 pf->rss_table_size : 64; 6861 vsi->netdev_registered = false; 6862 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 6863 INIT_LIST_HEAD(&vsi->mac_filter_list); 6864 vsi->irqs_ready = false; 6865 6866 ret = i40e_set_num_rings_in_vsi(vsi); 6867 if (ret) 6868 goto err_rings; 6869 6870 ret = i40e_vsi_alloc_arrays(vsi, true); 6871 if (ret) 6872 goto err_rings; 6873 6874 /* Setup default MSIX irq handler for VSI */ 6875 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 6876 6877 pf->vsi[vsi_idx] = vsi; 6878 ret = vsi_idx; 6879 goto unlock_pf; 6880 6881 err_rings: 6882 pf->next_vsi = i - 1; 6883 kfree(vsi); 6884 unlock_pf: 6885 mutex_unlock(&pf->switch_mutex); 6886 return ret; 6887 } 6888 6889 /** 6890 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 6891 * @type: VSI pointer 6892 * @free_qvectors: a bool to specify if q_vectors need to be freed. 6893 * 6894 * On error: returns error code (negative) 6895 * On success: returns 0 6896 **/ 6897 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 6898 { 6899 /* free the ring and vector containers */ 6900 if (free_qvectors) { 6901 kfree(vsi->q_vectors); 6902 vsi->q_vectors = NULL; 6903 } 6904 kfree(vsi->tx_rings); 6905 vsi->tx_rings = NULL; 6906 vsi->rx_rings = NULL; 6907 } 6908 6909 /** 6910 * i40e_vsi_clear - Deallocate the VSI provided 6911 * @vsi: the VSI being un-configured 6912 **/ 6913 static int i40e_vsi_clear(struct i40e_vsi *vsi) 6914 { 6915 struct i40e_pf *pf; 6916 6917 if (!vsi) 6918 return 0; 6919 6920 if (!vsi->back) 6921 goto free_vsi; 6922 pf = vsi->back; 6923 6924 mutex_lock(&pf->switch_mutex); 6925 if (!pf->vsi[vsi->idx]) { 6926 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 6927 vsi->idx, vsi->idx, vsi, vsi->type); 6928 goto unlock_vsi; 6929 } 6930 6931 if (pf->vsi[vsi->idx] != vsi) { 6932 dev_err(&pf->pdev->dev, 6933 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 6934 pf->vsi[vsi->idx]->idx, 6935 pf->vsi[vsi->idx], 6936 pf->vsi[vsi->idx]->type, 6937 vsi->idx, vsi, vsi->type); 6938 goto unlock_vsi; 6939 } 6940 6941 /* updates the PF for this cleared vsi */ 6942 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 6943 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 6944 6945 i40e_vsi_free_arrays(vsi, true); 6946 6947 pf->vsi[vsi->idx] = NULL; 6948 if (vsi->idx < pf->next_vsi) 6949 pf->next_vsi = vsi->idx; 6950 6951 unlock_vsi: 6952 mutex_unlock(&pf->switch_mutex); 6953 free_vsi: 6954 kfree(vsi); 6955 6956 return 0; 6957 } 6958 6959 /** 6960 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 6961 * @vsi: the VSI being cleaned 6962 **/ 6963 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 6964 { 6965 int i; 6966 6967 if (vsi->tx_rings && vsi->tx_rings[0]) { 6968 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6969 kfree_rcu(vsi->tx_rings[i], rcu); 6970 vsi->tx_rings[i] = NULL; 6971 vsi->rx_rings[i] = NULL; 6972 } 6973 } 6974 } 6975 6976 /** 6977 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 6978 * @vsi: the VSI being configured 6979 **/ 6980 static int i40e_alloc_rings(struct i40e_vsi *vsi) 6981 { 6982 struct i40e_ring *tx_ring, *rx_ring; 6983 struct i40e_pf *pf = vsi->back; 6984 int i; 6985 6986 /* Set basic values in the rings to be used later during open() */ 6987 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6988 /* allocate space for both Tx and Rx in one shot */ 6989 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 6990 if (!tx_ring) 6991 goto err_out; 6992 6993 tx_ring->queue_index = i; 6994 tx_ring->reg_idx = vsi->base_queue + i; 6995 tx_ring->ring_active = false; 6996 tx_ring->vsi = vsi; 6997 tx_ring->netdev = vsi->netdev; 6998 tx_ring->dev = &pf->pdev->dev; 6999 tx_ring->count = vsi->num_desc; 7000 tx_ring->size = 0; 7001 tx_ring->dcb_tc = 0; 7002 vsi->tx_rings[i] = tx_ring; 7003 7004 rx_ring = &tx_ring[1]; 7005 rx_ring->queue_index = i; 7006 rx_ring->reg_idx = vsi->base_queue + i; 7007 rx_ring->ring_active = false; 7008 rx_ring->vsi = vsi; 7009 rx_ring->netdev = vsi->netdev; 7010 rx_ring->dev = &pf->pdev->dev; 7011 rx_ring->count = vsi->num_desc; 7012 rx_ring->size = 0; 7013 rx_ring->dcb_tc = 0; 7014 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) 7015 set_ring_16byte_desc_enabled(rx_ring); 7016 else 7017 clear_ring_16byte_desc_enabled(rx_ring); 7018 vsi->rx_rings[i] = rx_ring; 7019 } 7020 7021 return 0; 7022 7023 err_out: 7024 i40e_vsi_clear_rings(vsi); 7025 return -ENOMEM; 7026 } 7027 7028 /** 7029 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 7030 * @pf: board private structure 7031 * @vectors: the number of MSI-X vectors to request 7032 * 7033 * Returns the number of vectors reserved, or error 7034 **/ 7035 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 7036 { 7037 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 7038 I40E_MIN_MSIX, vectors); 7039 if (vectors < 0) { 7040 dev_info(&pf->pdev->dev, 7041 "MSI-X vector reservation failed: %d\n", vectors); 7042 vectors = 0; 7043 } 7044 7045 return vectors; 7046 } 7047 7048 /** 7049 * i40e_init_msix - Setup the MSIX capability 7050 * @pf: board private structure 7051 * 7052 * Work with the OS to set up the MSIX vectors needed. 7053 * 7054 * Returns the number of vectors reserved or negative on failure 7055 **/ 7056 static int i40e_init_msix(struct i40e_pf *pf) 7057 { 7058 struct i40e_hw *hw = &pf->hw; 7059 int vectors_left; 7060 int v_budget, i; 7061 int v_actual; 7062 7063 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7064 return -ENODEV; 7065 7066 /* The number of vectors we'll request will be comprised of: 7067 * - Add 1 for "other" cause for Admin Queue events, etc. 7068 * - The number of LAN queue pairs 7069 * - Queues being used for RSS. 7070 * We don't need as many as max_rss_size vectors. 7071 * use rss_size instead in the calculation since that 7072 * is governed by number of cpus in the system. 7073 * - assumes symmetric Tx/Rx pairing 7074 * - The number of VMDq pairs 7075 #ifdef I40E_FCOE 7076 * - The number of FCOE qps. 7077 #endif 7078 * Once we count this up, try the request. 7079 * 7080 * If we can't get what we want, we'll simplify to nearly nothing 7081 * and try again. If that still fails, we punt. 7082 */ 7083 vectors_left = hw->func_caps.num_msix_vectors; 7084 v_budget = 0; 7085 7086 /* reserve one vector for miscellaneous handler */ 7087 if (vectors_left) { 7088 v_budget++; 7089 vectors_left--; 7090 } 7091 7092 /* reserve vectors for the main PF traffic queues */ 7093 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left); 7094 vectors_left -= pf->num_lan_msix; 7095 v_budget += pf->num_lan_msix; 7096 7097 /* reserve one vector for sideband flow director */ 7098 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7099 if (vectors_left) { 7100 v_budget++; 7101 vectors_left--; 7102 } else { 7103 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7104 } 7105 } 7106 7107 #ifdef I40E_FCOE 7108 /* can we reserve enough for FCoE? */ 7109 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7110 if (!vectors_left) 7111 pf->num_fcoe_msix = 0; 7112 else if (vectors_left >= pf->num_fcoe_qps) 7113 pf->num_fcoe_msix = pf->num_fcoe_qps; 7114 else 7115 pf->num_fcoe_msix = 1; 7116 v_budget += pf->num_fcoe_msix; 7117 vectors_left -= pf->num_fcoe_msix; 7118 } 7119 7120 #endif 7121 /* any vectors left over go for VMDq support */ 7122 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 7123 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 7124 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 7125 7126 /* if we're short on vectors for what's desired, we limit 7127 * the queues per vmdq. If this is still more than are 7128 * available, the user will need to change the number of 7129 * queues/vectors used by the PF later with the ethtool 7130 * channels command 7131 */ 7132 if (vmdq_vecs < vmdq_vecs_wanted) 7133 pf->num_vmdq_qps = 1; 7134 pf->num_vmdq_msix = pf->num_vmdq_qps; 7135 7136 v_budget += vmdq_vecs; 7137 vectors_left -= vmdq_vecs; 7138 } 7139 7140 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 7141 GFP_KERNEL); 7142 if (!pf->msix_entries) 7143 return -ENOMEM; 7144 7145 for (i = 0; i < v_budget; i++) 7146 pf->msix_entries[i].entry = i; 7147 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 7148 7149 if (v_actual != v_budget) { 7150 /* If we have limited resources, we will start with no vectors 7151 * for the special features and then allocate vectors to some 7152 * of these features based on the policy and at the end disable 7153 * the features that did not get any vectors. 7154 */ 7155 #ifdef I40E_FCOE 7156 pf->num_fcoe_qps = 0; 7157 pf->num_fcoe_msix = 0; 7158 #endif 7159 pf->num_vmdq_msix = 0; 7160 } 7161 7162 if (v_actual < I40E_MIN_MSIX) { 7163 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 7164 kfree(pf->msix_entries); 7165 pf->msix_entries = NULL; 7166 return -ENODEV; 7167 7168 } else if (v_actual == I40E_MIN_MSIX) { 7169 /* Adjust for minimal MSIX use */ 7170 pf->num_vmdq_vsis = 0; 7171 pf->num_vmdq_qps = 0; 7172 pf->num_lan_qps = 1; 7173 pf->num_lan_msix = 1; 7174 7175 } else if (v_actual != v_budget) { 7176 int vec; 7177 7178 /* reserve the misc vector */ 7179 vec = v_actual - 1; 7180 7181 /* Scale vector usage down */ 7182 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 7183 pf->num_vmdq_vsis = 1; 7184 pf->num_vmdq_qps = 1; 7185 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7186 7187 /* partition out the remaining vectors */ 7188 switch (vec) { 7189 case 2: 7190 pf->num_lan_msix = 1; 7191 break; 7192 case 3: 7193 #ifdef I40E_FCOE 7194 /* give one vector to FCoE */ 7195 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7196 pf->num_lan_msix = 1; 7197 pf->num_fcoe_msix = 1; 7198 } 7199 #else 7200 pf->num_lan_msix = 2; 7201 #endif 7202 break; 7203 default: 7204 #ifdef I40E_FCOE 7205 /* give one vector to FCoE */ 7206 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7207 pf->num_fcoe_msix = 1; 7208 vec--; 7209 } 7210 #endif 7211 /* give the rest to the PF */ 7212 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps); 7213 break; 7214 } 7215 } 7216 7217 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 7218 (pf->num_vmdq_msix == 0)) { 7219 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 7220 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 7221 } 7222 #ifdef I40E_FCOE 7223 7224 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 7225 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 7226 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 7227 } 7228 #endif 7229 return v_actual; 7230 } 7231 7232 /** 7233 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 7234 * @vsi: the VSI being configured 7235 * @v_idx: index of the vector in the vsi struct 7236 * 7237 * We allocate one q_vector. If allocation fails we return -ENOMEM. 7238 **/ 7239 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) 7240 { 7241 struct i40e_q_vector *q_vector; 7242 7243 /* allocate q_vector */ 7244 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 7245 if (!q_vector) 7246 return -ENOMEM; 7247 7248 q_vector->vsi = vsi; 7249 q_vector->v_idx = v_idx; 7250 cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 7251 if (vsi->netdev) 7252 netif_napi_add(vsi->netdev, &q_vector->napi, 7253 i40e_napi_poll, NAPI_POLL_WEIGHT); 7254 7255 q_vector->rx.latency_range = I40E_LOW_LATENCY; 7256 q_vector->tx.latency_range = I40E_LOW_LATENCY; 7257 7258 /* tie q_vector and vsi together */ 7259 vsi->q_vectors[v_idx] = q_vector; 7260 7261 return 0; 7262 } 7263 7264 /** 7265 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 7266 * @vsi: the VSI being configured 7267 * 7268 * We allocate one q_vector per queue interrupt. If allocation fails we 7269 * return -ENOMEM. 7270 **/ 7271 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 7272 { 7273 struct i40e_pf *pf = vsi->back; 7274 int v_idx, num_q_vectors; 7275 int err; 7276 7277 /* if not MSIX, give the one vector only to the LAN VSI */ 7278 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7279 num_q_vectors = vsi->num_q_vectors; 7280 else if (vsi == pf->vsi[pf->lan_vsi]) 7281 num_q_vectors = 1; 7282 else 7283 return -EINVAL; 7284 7285 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 7286 err = i40e_vsi_alloc_q_vector(vsi, v_idx); 7287 if (err) 7288 goto err_out; 7289 } 7290 7291 return 0; 7292 7293 err_out: 7294 while (v_idx--) 7295 i40e_free_q_vector(vsi, v_idx); 7296 7297 return err; 7298 } 7299 7300 /** 7301 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 7302 * @pf: board private structure to initialize 7303 **/ 7304 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 7305 { 7306 int vectors = 0; 7307 ssize_t size; 7308 7309 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 7310 vectors = i40e_init_msix(pf); 7311 if (vectors < 0) { 7312 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 7313 #ifdef I40E_FCOE 7314 I40E_FLAG_FCOE_ENABLED | 7315 #endif 7316 I40E_FLAG_RSS_ENABLED | 7317 I40E_FLAG_DCB_CAPABLE | 7318 I40E_FLAG_SRIOV_ENABLED | 7319 I40E_FLAG_FD_SB_ENABLED | 7320 I40E_FLAG_FD_ATR_ENABLED | 7321 I40E_FLAG_VMDQ_ENABLED); 7322 7323 /* rework the queue expectations without MSIX */ 7324 i40e_determine_queue_usage(pf); 7325 } 7326 } 7327 7328 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 7329 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 7330 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 7331 vectors = pci_enable_msi(pf->pdev); 7332 if (vectors < 0) { 7333 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 7334 vectors); 7335 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 7336 } 7337 vectors = 1; /* one MSI or Legacy vector */ 7338 } 7339 7340 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 7341 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 7342 7343 /* set up vector assignment tracking */ 7344 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 7345 pf->irq_pile = kzalloc(size, GFP_KERNEL); 7346 if (!pf->irq_pile) { 7347 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 7348 return -ENOMEM; 7349 } 7350 pf->irq_pile->num_entries = vectors; 7351 pf->irq_pile->search_hint = 0; 7352 7353 /* track first vector for misc interrupts, ignore return */ 7354 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 7355 7356 return 0; 7357 } 7358 7359 /** 7360 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 7361 * @pf: board private structure 7362 * 7363 * This sets up the handler for MSIX 0, which is used to manage the 7364 * non-queue interrupts, e.g. AdminQ and errors. This is not used 7365 * when in MSI or Legacy interrupt mode. 7366 **/ 7367 static int i40e_setup_misc_vector(struct i40e_pf *pf) 7368 { 7369 struct i40e_hw *hw = &pf->hw; 7370 int err = 0; 7371 7372 /* Only request the irq if this is the first time through, and 7373 * not when we're rebuilding after a Reset 7374 */ 7375 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7376 err = request_irq(pf->msix_entries[0].vector, 7377 i40e_intr, 0, pf->int_name, pf); 7378 if (err) { 7379 dev_info(&pf->pdev->dev, 7380 "request_irq for %s failed: %d\n", 7381 pf->int_name, err); 7382 return -EFAULT; 7383 } 7384 } 7385 7386 i40e_enable_misc_int_causes(pf); 7387 7388 /* associate no queues to the misc vector */ 7389 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 7390 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 7391 7392 i40e_flush(hw); 7393 7394 i40e_irq_dynamic_enable_icr0(pf); 7395 7396 return err; 7397 } 7398 7399 /** 7400 * i40e_config_rss - Prepare for RSS if used 7401 * @pf: board private structure 7402 **/ 7403 static int i40e_config_rss(struct i40e_pf *pf) 7404 { 7405 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1]; 7406 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7407 struct i40e_hw *hw = &pf->hw; 7408 u32 lut = 0; 7409 int i, j; 7410 u64 hena; 7411 u32 reg_val; 7412 7413 netdev_rss_key_fill(rss_key, sizeof(rss_key)); 7414 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 7415 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]); 7416 7417 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 7418 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | 7419 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); 7420 hena |= I40E_DEFAULT_RSS_HENA; 7421 wr32(hw, I40E_PFQF_HENA(0), (u32)hena); 7422 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 7423 7424 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs); 7425 7426 /* Check capability and Set table size and register per hw expectation*/ 7427 reg_val = rd32(hw, I40E_PFQF_CTL_0); 7428 if (pf->rss_table_size == 512) 7429 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7430 else 7431 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; 7432 wr32(hw, I40E_PFQF_CTL_0, reg_val); 7433 7434 /* Populate the LUT with max no. of queues in round robin fashion */ 7435 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) { 7436 7437 /* The assumption is that lan qp count will be the highest 7438 * qp count for any PF VSI that needs RSS. 7439 * If multiple VSIs need RSS support, all the qp counts 7440 * for those VSIs should be a power of 2 for RSS to work. 7441 * If LAN VSI is the only consumer for RSS then this requirement 7442 * is not necessary. 7443 */ 7444 if (j == vsi->rss_size) 7445 j = 0; 7446 /* lut = 4-byte sliding window of 4 lut entries */ 7447 lut = (lut << 8) | (j & 7448 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); 7449 /* On i = 3, we have 4 entries in lut; write to the register */ 7450 if ((i & 3) == 3) 7451 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); 7452 } 7453 i40e_flush(hw); 7454 7455 return 0; 7456 } 7457 7458 /** 7459 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 7460 * @pf: board private structure 7461 * @queue_count: the requested queue count for rss. 7462 * 7463 * returns 0 if rss is not enabled, if enabled returns the final rss queue 7464 * count which may be different from the requested queue count. 7465 **/ 7466 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 7467 { 7468 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7469 int new_rss_size; 7470 7471 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 7472 return 0; 7473 7474 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 7475 7476 if (queue_count != vsi->num_queue_pairs) { 7477 vsi->req_queue_pairs = queue_count; 7478 i40e_prep_for_reset(pf); 7479 7480 pf->rss_size = new_rss_size; 7481 7482 i40e_reset_and_rebuild(pf, true); 7483 i40e_config_rss(pf); 7484 } 7485 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); 7486 return pf->rss_size; 7487 } 7488 7489 /** 7490 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition 7491 * @pf: board private structure 7492 **/ 7493 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) 7494 { 7495 i40e_status status; 7496 bool min_valid, max_valid; 7497 u32 max_bw, min_bw; 7498 7499 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 7500 &min_valid, &max_valid); 7501 7502 if (!status) { 7503 if (min_valid) 7504 pf->npar_min_bw = min_bw; 7505 if (max_valid) 7506 pf->npar_max_bw = max_bw; 7507 } 7508 7509 return status; 7510 } 7511 7512 /** 7513 * i40e_set_npar_bw_setting - Set BW settings for this PF partition 7514 * @pf: board private structure 7515 **/ 7516 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) 7517 { 7518 struct i40e_aqc_configure_partition_bw_data bw_data; 7519 i40e_status status; 7520 7521 /* Set the valid bit for this PF */ 7522 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id); 7523 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; 7524 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; 7525 7526 /* Set the new bandwidths */ 7527 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 7528 7529 return status; 7530 } 7531 7532 /** 7533 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition 7534 * @pf: board private structure 7535 **/ 7536 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) 7537 { 7538 /* Commit temporary BW setting to permanent NVM image */ 7539 enum i40e_admin_queue_err last_aq_status; 7540 i40e_status ret; 7541 u16 nvm_word; 7542 7543 if (pf->hw.partition_id != 1) { 7544 dev_info(&pf->pdev->dev, 7545 "Commit BW only works on partition 1! This is partition %d", 7546 pf->hw.partition_id); 7547 ret = I40E_NOT_SUPPORTED; 7548 goto bw_commit_out; 7549 } 7550 7551 /* Acquire NVM for read access */ 7552 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 7553 last_aq_status = pf->hw.aq.asq_last_status; 7554 if (ret) { 7555 dev_info(&pf->pdev->dev, 7556 "Cannot acquire NVM for read access, err %d: aq_err %d\n", 7557 ret, last_aq_status); 7558 goto bw_commit_out; 7559 } 7560 7561 /* Read word 0x10 of NVM - SW compatibility word 1 */ 7562 ret = i40e_aq_read_nvm(&pf->hw, 7563 I40E_SR_NVM_CONTROL_WORD, 7564 0x10, sizeof(nvm_word), &nvm_word, 7565 false, NULL); 7566 /* Save off last admin queue command status before releasing 7567 * the NVM 7568 */ 7569 last_aq_status = pf->hw.aq.asq_last_status; 7570 i40e_release_nvm(&pf->hw); 7571 if (ret) { 7572 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n", 7573 ret, last_aq_status); 7574 goto bw_commit_out; 7575 } 7576 7577 /* Wait a bit for NVM release to complete */ 7578 msleep(50); 7579 7580 /* Acquire NVM for write access */ 7581 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 7582 last_aq_status = pf->hw.aq.asq_last_status; 7583 if (ret) { 7584 dev_info(&pf->pdev->dev, 7585 "Cannot acquire NVM for write access, err %d: aq_err %d\n", 7586 ret, last_aq_status); 7587 goto bw_commit_out; 7588 } 7589 /* Write it back out unchanged to initiate update NVM, 7590 * which will force a write of the shadow (alt) RAM to 7591 * the NVM - thus storing the bandwidth values permanently. 7592 */ 7593 ret = i40e_aq_update_nvm(&pf->hw, 7594 I40E_SR_NVM_CONTROL_WORD, 7595 0x10, sizeof(nvm_word), 7596 &nvm_word, true, NULL); 7597 /* Save off last admin queue command status before releasing 7598 * the NVM 7599 */ 7600 last_aq_status = pf->hw.aq.asq_last_status; 7601 i40e_release_nvm(&pf->hw); 7602 if (ret) 7603 dev_info(&pf->pdev->dev, 7604 "BW settings NOT SAVED, err %d aq_err %d\n", 7605 ret, last_aq_status); 7606 bw_commit_out: 7607 7608 return ret; 7609 } 7610 7611 /** 7612 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 7613 * @pf: board private structure to initialize 7614 * 7615 * i40e_sw_init initializes the Adapter private data structure. 7616 * Fields are initialized based on PCI device information and 7617 * OS network device settings (MTU size). 7618 **/ 7619 static int i40e_sw_init(struct i40e_pf *pf) 7620 { 7621 int err = 0; 7622 int size; 7623 7624 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, 7625 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); 7626 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; 7627 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { 7628 if (I40E_DEBUG_USER & debug) 7629 pf->hw.debug_mask = debug; 7630 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), 7631 I40E_DEFAULT_MSG_ENABLE); 7632 } 7633 7634 /* Set default capability flags */ 7635 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 7636 I40E_FLAG_MSI_ENABLED | 7637 I40E_FLAG_MSIX_ENABLED; 7638 7639 if (iommu_present(&pci_bus_type)) 7640 pf->flags |= I40E_FLAG_RX_PS_ENABLED; 7641 else 7642 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED; 7643 7644 /* Set default ITR */ 7645 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 7646 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 7647 7648 /* Depending on PF configurations, it is possible that the RSS 7649 * maximum might end up larger than the available queues 7650 */ 7651 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; 7652 pf->rss_size = 1; 7653 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 7654 pf->rss_size_max = min_t(int, pf->rss_size_max, 7655 pf->hw.func_caps.num_tx_qp); 7656 if (pf->hw.func_caps.rss) { 7657 pf->flags |= I40E_FLAG_RSS_ENABLED; 7658 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); 7659 } 7660 7661 /* MFP mode enabled */ 7662 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { 7663 pf->flags |= I40E_FLAG_MFP_ENABLED; 7664 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 7665 if (i40e_get_npar_bw_setting(pf)) 7666 dev_warn(&pf->pdev->dev, 7667 "Could not get NPAR bw settings\n"); 7668 else 7669 dev_info(&pf->pdev->dev, 7670 "Min BW = %8.8x, Max BW = %8.8x\n", 7671 pf->npar_min_bw, pf->npar_max_bw); 7672 } 7673 7674 /* FW/NVM is not yet fixed in this regard */ 7675 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 7676 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 7677 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7678 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 7679 /* Setup a counter for fd_atr per PF */ 7680 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id); 7681 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { 7682 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7683 /* Setup a counter for fd_sb per PF */ 7684 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 7685 } else { 7686 dev_info(&pf->pdev->dev, 7687 "Flow Director Sideband mode Disabled in MFP mode\n"); 7688 } 7689 pf->fdir_pf_filter_count = 7690 pf->hw.func_caps.fd_filters_guaranteed; 7691 pf->hw.fdir_shared_filter_count = 7692 pf->hw.func_caps.fd_filters_best_effort; 7693 } 7694 7695 if (pf->hw.func_caps.vmdq) { 7696 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 7697 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 7698 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; 7699 } 7700 7701 #ifdef I40E_FCOE 7702 err = i40e_init_pf_fcoe(pf); 7703 if (err) 7704 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err); 7705 7706 #endif /* I40E_FCOE */ 7707 #ifdef CONFIG_PCI_IOV 7708 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 7709 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 7710 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 7711 pf->num_req_vfs = min_t(int, 7712 pf->hw.func_caps.num_vfs, 7713 I40E_MAX_VF_COUNT); 7714 } 7715 #endif /* CONFIG_PCI_IOV */ 7716 pf->eeprom_version = 0xDEAD; 7717 pf->lan_veb = I40E_NO_VEB; 7718 pf->lan_vsi = I40E_NO_VSI; 7719 7720 /* set up queue assignment tracking */ 7721 size = sizeof(struct i40e_lump_tracking) 7722 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 7723 pf->qp_pile = kzalloc(size, GFP_KERNEL); 7724 if (!pf->qp_pile) { 7725 err = -ENOMEM; 7726 goto sw_init_done; 7727 } 7728 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 7729 pf->qp_pile->search_hint = 0; 7730 7731 pf->tx_timeout_recovery_level = 1; 7732 7733 mutex_init(&pf->switch_mutex); 7734 7735 /* If NPAR is enabled nudge the Tx scheduler */ 7736 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) 7737 i40e_set_npar_bw_setting(pf); 7738 7739 sw_init_done: 7740 return err; 7741 } 7742 7743 /** 7744 * i40e_set_ntuple - set the ntuple feature flag and take action 7745 * @pf: board private structure to initialize 7746 * @features: the feature set that the stack is suggesting 7747 * 7748 * returns a bool to indicate if reset needs to happen 7749 **/ 7750 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 7751 { 7752 bool need_reset = false; 7753 7754 /* Check if Flow Director n-tuple support was enabled or disabled. If 7755 * the state changed, we need to reset. 7756 */ 7757 if (features & NETIF_F_NTUPLE) { 7758 /* Enable filters and mark for reset */ 7759 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 7760 need_reset = true; 7761 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 7762 } else { 7763 /* turn off filters, mark for reset and clear SW filter list */ 7764 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7765 need_reset = true; 7766 i40e_fdir_filter_exit(pf); 7767 } 7768 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7769 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 7770 /* reset fd counters */ 7771 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 7772 pf->fdir_pf_active_filters = 0; 7773 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 7774 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 7775 /* if ATR was auto disabled it can be re-enabled. */ 7776 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 7777 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 7778 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 7779 } 7780 return need_reset; 7781 } 7782 7783 /** 7784 * i40e_set_features - set the netdev feature flags 7785 * @netdev: ptr to the netdev being adjusted 7786 * @features: the feature set that the stack is suggesting 7787 **/ 7788 static int i40e_set_features(struct net_device *netdev, 7789 netdev_features_t features) 7790 { 7791 struct i40e_netdev_priv *np = netdev_priv(netdev); 7792 struct i40e_vsi *vsi = np->vsi; 7793 struct i40e_pf *pf = vsi->back; 7794 bool need_reset; 7795 7796 if (features & NETIF_F_HW_VLAN_CTAG_RX) 7797 i40e_vlan_stripping_enable(vsi); 7798 else 7799 i40e_vlan_stripping_disable(vsi); 7800 7801 need_reset = i40e_set_ntuple(pf, features); 7802 7803 if (need_reset) 7804 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 7805 7806 return 0; 7807 } 7808 7809 #ifdef CONFIG_I40E_VXLAN 7810 /** 7811 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port 7812 * @pf: board private structure 7813 * @port: The UDP port to look up 7814 * 7815 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 7816 **/ 7817 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port) 7818 { 7819 u8 i; 7820 7821 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7822 if (pf->vxlan_ports[i] == port) 7823 return i; 7824 } 7825 7826 return i; 7827 } 7828 7829 /** 7830 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up 7831 * @netdev: This physical port's netdev 7832 * @sa_family: Socket Family that VXLAN is notifying us about 7833 * @port: New UDP port number that VXLAN started listening to 7834 **/ 7835 static void i40e_add_vxlan_port(struct net_device *netdev, 7836 sa_family_t sa_family, __be16 port) 7837 { 7838 struct i40e_netdev_priv *np = netdev_priv(netdev); 7839 struct i40e_vsi *vsi = np->vsi; 7840 struct i40e_pf *pf = vsi->back; 7841 u8 next_idx; 7842 u8 idx; 7843 7844 if (sa_family == AF_INET6) 7845 return; 7846 7847 idx = i40e_get_vxlan_port_idx(pf, port); 7848 7849 /* Check if port already exists */ 7850 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7851 netdev_info(netdev, "vxlan port %d already offloaded\n", 7852 ntohs(port)); 7853 return; 7854 } 7855 7856 /* Now check if there is space to add the new port */ 7857 next_idx = i40e_get_vxlan_port_idx(pf, 0); 7858 7859 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7860 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n", 7861 ntohs(port)); 7862 return; 7863 } 7864 7865 /* New port: add it and mark its index in the bitmap */ 7866 pf->vxlan_ports[next_idx] = port; 7867 pf->pending_vxlan_bitmap |= (1 << next_idx); 7868 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7869 7870 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port)); 7871 } 7872 7873 /** 7874 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away 7875 * @netdev: This physical port's netdev 7876 * @sa_family: Socket Family that VXLAN is notifying us about 7877 * @port: UDP port number that VXLAN stopped listening to 7878 **/ 7879 static void i40e_del_vxlan_port(struct net_device *netdev, 7880 sa_family_t sa_family, __be16 port) 7881 { 7882 struct i40e_netdev_priv *np = netdev_priv(netdev); 7883 struct i40e_vsi *vsi = np->vsi; 7884 struct i40e_pf *pf = vsi->back; 7885 u8 idx; 7886 7887 if (sa_family == AF_INET6) 7888 return; 7889 7890 idx = i40e_get_vxlan_port_idx(pf, port); 7891 7892 /* Check if port already exists */ 7893 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 7894 /* if port exists, set it to 0 (mark for deletion) 7895 * and make it pending 7896 */ 7897 pf->vxlan_ports[idx] = 0; 7898 pf->pending_vxlan_bitmap |= (1 << idx); 7899 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; 7900 7901 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n", 7902 ntohs(port)); 7903 } else { 7904 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n", 7905 ntohs(port)); 7906 } 7907 } 7908 7909 #endif 7910 static int i40e_get_phys_port_id(struct net_device *netdev, 7911 struct netdev_phys_item_id *ppid) 7912 { 7913 struct i40e_netdev_priv *np = netdev_priv(netdev); 7914 struct i40e_pf *pf = np->vsi->back; 7915 struct i40e_hw *hw = &pf->hw; 7916 7917 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 7918 return -EOPNOTSUPP; 7919 7920 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 7921 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 7922 7923 return 0; 7924 } 7925 7926 /** 7927 * i40e_ndo_fdb_add - add an entry to the hardware database 7928 * @ndm: the input from the stack 7929 * @tb: pointer to array of nladdr (unused) 7930 * @dev: the net device pointer 7931 * @addr: the MAC address entry being added 7932 * @flags: instructions from stack about fdb operation 7933 */ 7934 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 7935 struct net_device *dev, 7936 const unsigned char *addr, u16 vid, 7937 u16 flags) 7938 { 7939 struct i40e_netdev_priv *np = netdev_priv(dev); 7940 struct i40e_pf *pf = np->vsi->back; 7941 int err = 0; 7942 7943 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 7944 return -EOPNOTSUPP; 7945 7946 if (vid) { 7947 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 7948 return -EINVAL; 7949 } 7950 7951 /* Hardware does not support aging addresses so if a 7952 * ndm_state is given only allow permanent addresses 7953 */ 7954 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 7955 netdev_info(dev, "FDB only supports static addresses\n"); 7956 return -EINVAL; 7957 } 7958 7959 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 7960 err = dev_uc_add_excl(dev, addr); 7961 else if (is_multicast_ether_addr(addr)) 7962 err = dev_mc_add_excl(dev, addr); 7963 else 7964 err = -EINVAL; 7965 7966 /* Only return duplicate errors if NLM_F_EXCL is set */ 7967 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 7968 err = 0; 7969 7970 return err; 7971 } 7972 7973 #ifdef HAVE_BRIDGE_ATTRIBS 7974 /** 7975 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 7976 * @dev: the netdev being configured 7977 * @nlh: RTNL message 7978 * 7979 * Inserts a new hardware bridge if not already created and 7980 * enables the bridging mode requested (VEB or VEPA). If the 7981 * hardware bridge has already been inserted and the request 7982 * is to change the mode then that requires a PF reset to 7983 * allow rebuild of the components with required hardware 7984 * bridge mode enabled. 7985 **/ 7986 static int i40e_ndo_bridge_setlink(struct net_device *dev, 7987 struct nlmsghdr *nlh) 7988 { 7989 struct i40e_netdev_priv *np = netdev_priv(dev); 7990 struct i40e_vsi *vsi = np->vsi; 7991 struct i40e_pf *pf = vsi->back; 7992 struct i40e_veb *veb = NULL; 7993 struct nlattr *attr, *br_spec; 7994 int i, rem; 7995 7996 /* Only for PF VSI for now */ 7997 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 7998 return -EOPNOTSUPP; 7999 8000 /* Find the HW bridge for PF VSI */ 8001 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8002 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8003 veb = pf->veb[i]; 8004 } 8005 8006 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 8007 8008 nla_for_each_nested(attr, br_spec, rem) { 8009 __u16 mode; 8010 8011 if (nla_type(attr) != IFLA_BRIDGE_MODE) 8012 continue; 8013 8014 mode = nla_get_u16(attr); 8015 if ((mode != BRIDGE_MODE_VEPA) && 8016 (mode != BRIDGE_MODE_VEB)) 8017 return -EINVAL; 8018 8019 /* Insert a new HW bridge */ 8020 if (!veb) { 8021 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8022 vsi->tc_config.enabled_tc); 8023 if (veb) { 8024 veb->bridge_mode = mode; 8025 i40e_config_bridge_mode(veb); 8026 } else { 8027 /* No Bridge HW offload available */ 8028 return -ENOENT; 8029 } 8030 break; 8031 } else if (mode != veb->bridge_mode) { 8032 /* Existing HW bridge but different mode needs reset */ 8033 veb->bridge_mode = mode; 8034 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); 8035 break; 8036 } 8037 } 8038 8039 return 0; 8040 } 8041 8042 /** 8043 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 8044 * @skb: skb buff 8045 * @pid: process id 8046 * @seq: RTNL message seq # 8047 * @dev: the netdev being configured 8048 * @filter_mask: unused 8049 * 8050 * Return the mode in which the hardware bridge is operating in 8051 * i.e VEB or VEPA. 8052 **/ 8053 #ifdef HAVE_BRIDGE_FILTER 8054 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8055 struct net_device *dev, 8056 u32 __always_unused filter_mask, int nlflags) 8057 #else 8058 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8059 struct net_device *dev, int nlflags) 8060 #endif /* HAVE_BRIDGE_FILTER */ 8061 { 8062 struct i40e_netdev_priv *np = netdev_priv(dev); 8063 struct i40e_vsi *vsi = np->vsi; 8064 struct i40e_pf *pf = vsi->back; 8065 struct i40e_veb *veb = NULL; 8066 int i; 8067 8068 /* Only for PF VSI for now */ 8069 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8070 return -EOPNOTSUPP; 8071 8072 /* Find the HW bridge for the PF VSI */ 8073 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8074 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8075 veb = pf->veb[i]; 8076 } 8077 8078 if (!veb) 8079 return 0; 8080 8081 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 8082 nlflags); 8083 } 8084 #endif /* HAVE_BRIDGE_ATTRIBS */ 8085 8086 static const struct net_device_ops i40e_netdev_ops = { 8087 .ndo_open = i40e_open, 8088 .ndo_stop = i40e_close, 8089 .ndo_start_xmit = i40e_lan_xmit_frame, 8090 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 8091 .ndo_set_rx_mode = i40e_set_rx_mode, 8092 .ndo_validate_addr = eth_validate_addr, 8093 .ndo_set_mac_address = i40e_set_mac, 8094 .ndo_change_mtu = i40e_change_mtu, 8095 .ndo_do_ioctl = i40e_ioctl, 8096 .ndo_tx_timeout = i40e_tx_timeout, 8097 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 8098 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 8099 #ifdef CONFIG_NET_POLL_CONTROLLER 8100 .ndo_poll_controller = i40e_netpoll, 8101 #endif 8102 .ndo_setup_tc = i40e_setup_tc, 8103 #ifdef I40E_FCOE 8104 .ndo_fcoe_enable = i40e_fcoe_enable, 8105 .ndo_fcoe_disable = i40e_fcoe_disable, 8106 #endif 8107 .ndo_set_features = i40e_set_features, 8108 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 8109 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 8110 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 8111 .ndo_get_vf_config = i40e_ndo_get_vf_config, 8112 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 8113 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 8114 #ifdef CONFIG_I40E_VXLAN 8115 .ndo_add_vxlan_port = i40e_add_vxlan_port, 8116 .ndo_del_vxlan_port = i40e_del_vxlan_port, 8117 #endif 8118 .ndo_get_phys_port_id = i40e_get_phys_port_id, 8119 .ndo_fdb_add = i40e_ndo_fdb_add, 8120 #ifdef HAVE_BRIDGE_ATTRIBS 8121 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 8122 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 8123 #endif /* HAVE_BRIDGE_ATTRIBS */ 8124 }; 8125 8126 /** 8127 * i40e_config_netdev - Setup the netdev flags 8128 * @vsi: the VSI being configured 8129 * 8130 * Returns 0 on success, negative value on failure 8131 **/ 8132 static int i40e_config_netdev(struct i40e_vsi *vsi) 8133 { 8134 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 8135 struct i40e_pf *pf = vsi->back; 8136 struct i40e_hw *hw = &pf->hw; 8137 struct i40e_netdev_priv *np; 8138 struct net_device *netdev; 8139 u8 mac_addr[ETH_ALEN]; 8140 int etherdev_size; 8141 8142 etherdev_size = sizeof(struct i40e_netdev_priv); 8143 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 8144 if (!netdev) 8145 return -ENOMEM; 8146 8147 vsi->netdev = netdev; 8148 np = netdev_priv(netdev); 8149 np->vsi = vsi; 8150 8151 netdev->hw_enc_features |= NETIF_F_IP_CSUM | 8152 NETIF_F_GSO_UDP_TUNNEL | 8153 NETIF_F_TSO; 8154 8155 netdev->features = NETIF_F_SG | 8156 NETIF_F_IP_CSUM | 8157 NETIF_F_SCTP_CSUM | 8158 NETIF_F_HIGHDMA | 8159 NETIF_F_GSO_UDP_TUNNEL | 8160 NETIF_F_HW_VLAN_CTAG_TX | 8161 NETIF_F_HW_VLAN_CTAG_RX | 8162 NETIF_F_HW_VLAN_CTAG_FILTER | 8163 NETIF_F_IPV6_CSUM | 8164 NETIF_F_TSO | 8165 NETIF_F_TSO_ECN | 8166 NETIF_F_TSO6 | 8167 NETIF_F_RXCSUM | 8168 NETIF_F_RXHASH | 8169 0; 8170 8171 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 8172 netdev->features |= NETIF_F_NTUPLE; 8173 8174 /* copy netdev features into list of user selectable features */ 8175 netdev->hw_features |= netdev->features; 8176 8177 if (vsi->type == I40E_VSI_MAIN) { 8178 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 8179 ether_addr_copy(mac_addr, hw->mac.perm_addr); 8180 /* The following steps are necessary to prevent reception 8181 * of tagged packets - some older NVM configurations load a 8182 * default a MAC-VLAN filter that accepts any tagged packet 8183 * which must be replaced by a normal filter. 8184 */ 8185 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) 8186 i40e_add_filter(vsi, mac_addr, 8187 I40E_VLAN_ANY, false, true); 8188 } else { 8189 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 8190 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 8191 pf->vsi[pf->lan_vsi]->netdev->name); 8192 random_ether_addr(mac_addr); 8193 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); 8194 } 8195 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 8196 8197 ether_addr_copy(netdev->dev_addr, mac_addr); 8198 ether_addr_copy(netdev->perm_addr, mac_addr); 8199 /* vlan gets same features (except vlan offload) 8200 * after any tweaks for specific VSI types 8201 */ 8202 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | 8203 NETIF_F_HW_VLAN_CTAG_RX | 8204 NETIF_F_HW_VLAN_CTAG_FILTER); 8205 netdev->priv_flags |= IFF_UNICAST_FLT; 8206 netdev->priv_flags |= IFF_SUPP_NOFCS; 8207 /* Setup netdev TC information */ 8208 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 8209 8210 netdev->netdev_ops = &i40e_netdev_ops; 8211 netdev->watchdog_timeo = 5 * HZ; 8212 i40e_set_ethtool_ops(netdev); 8213 #ifdef I40E_FCOE 8214 i40e_fcoe_config_netdev(netdev, vsi); 8215 #endif 8216 8217 return 0; 8218 } 8219 8220 /** 8221 * i40e_vsi_delete - Delete a VSI from the switch 8222 * @vsi: the VSI being removed 8223 * 8224 * Returns 0 on success, negative value on failure 8225 **/ 8226 static void i40e_vsi_delete(struct i40e_vsi *vsi) 8227 { 8228 /* remove default VSI is not allowed */ 8229 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 8230 return; 8231 8232 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 8233 } 8234 8235 /** 8236 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 8237 * @vsi: the VSI being queried 8238 * 8239 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 8240 **/ 8241 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 8242 { 8243 struct i40e_veb *veb; 8244 struct i40e_pf *pf = vsi->back; 8245 8246 /* Uplink is not a bridge so default to VEB */ 8247 if (vsi->veb_idx == I40E_NO_VEB) 8248 return 1; 8249 8250 veb = pf->veb[vsi->veb_idx]; 8251 /* Uplink is a bridge in VEPA mode */ 8252 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA)) 8253 return 0; 8254 8255 /* Uplink is a bridge in VEB mode */ 8256 return 1; 8257 } 8258 8259 /** 8260 * i40e_add_vsi - Add a VSI to the switch 8261 * @vsi: the VSI being configured 8262 * 8263 * This initializes a VSI context depending on the VSI type to be added and 8264 * passes it down to the add_vsi aq command. 8265 **/ 8266 static int i40e_add_vsi(struct i40e_vsi *vsi) 8267 { 8268 int ret = -ENODEV; 8269 struct i40e_mac_filter *f, *ftmp; 8270 struct i40e_pf *pf = vsi->back; 8271 struct i40e_hw *hw = &pf->hw; 8272 struct i40e_vsi_context ctxt; 8273 u8 enabled_tc = 0x1; /* TC0 enabled */ 8274 int f_count = 0; 8275 8276 memset(&ctxt, 0, sizeof(ctxt)); 8277 switch (vsi->type) { 8278 case I40E_VSI_MAIN: 8279 /* The PF's main VSI is already setup as part of the 8280 * device initialization, so we'll not bother with 8281 * the add_vsi call, but we will retrieve the current 8282 * VSI context. 8283 */ 8284 ctxt.seid = pf->main_vsi_seid; 8285 ctxt.pf_num = pf->hw.pf_id; 8286 ctxt.vf_num = 0; 8287 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 8288 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8289 if (ret) { 8290 dev_info(&pf->pdev->dev, 8291 "couldn't get PF vsi config, err %d, aq_err %d\n", 8292 ret, pf->hw.aq.asq_last_status); 8293 return -ENOENT; 8294 } 8295 vsi->info = ctxt.info; 8296 vsi->info.valid_sections = 0; 8297 8298 vsi->seid = ctxt.seid; 8299 vsi->id = ctxt.vsi_number; 8300 8301 enabled_tc = i40e_pf_get_tc_map(pf); 8302 8303 /* MFP mode setup queue map and update VSI */ 8304 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 8305 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 8306 memset(&ctxt, 0, sizeof(ctxt)); 8307 ctxt.seid = pf->main_vsi_seid; 8308 ctxt.pf_num = pf->hw.pf_id; 8309 ctxt.vf_num = 0; 8310 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 8311 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 8312 if (ret) { 8313 dev_info(&pf->pdev->dev, 8314 "update vsi failed, aq_err=%d\n", 8315 pf->hw.aq.asq_last_status); 8316 ret = -ENOENT; 8317 goto err; 8318 } 8319 /* update the local VSI info queue map */ 8320 i40e_vsi_update_queue_map(vsi, &ctxt); 8321 vsi->info.valid_sections = 0; 8322 } else { 8323 /* Default/Main VSI is only enabled for TC0 8324 * reconfigure it to enable all TCs that are 8325 * available on the port in SFP mode. 8326 * For MFP case the iSCSI PF would use this 8327 * flow to enable LAN+iSCSI TC. 8328 */ 8329 ret = i40e_vsi_config_tc(vsi, enabled_tc); 8330 if (ret) { 8331 dev_info(&pf->pdev->dev, 8332 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", 8333 enabled_tc, ret, 8334 pf->hw.aq.asq_last_status); 8335 ret = -ENOENT; 8336 } 8337 } 8338 break; 8339 8340 case I40E_VSI_FDIR: 8341 ctxt.pf_num = hw->pf_id; 8342 ctxt.vf_num = 0; 8343 ctxt.uplink_seid = vsi->uplink_seid; 8344 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8345 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 8346 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8347 ctxt.info.valid_sections |= 8348 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8349 ctxt.info.switch_id = 8350 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8351 } 8352 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8353 break; 8354 8355 case I40E_VSI_VMDQ2: 8356 ctxt.pf_num = hw->pf_id; 8357 ctxt.vf_num = 0; 8358 ctxt.uplink_seid = vsi->uplink_seid; 8359 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8360 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 8361 8362 /* This VSI is connected to VEB so the switch_id 8363 * should be set to zero by default. 8364 */ 8365 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8366 ctxt.info.valid_sections |= 8367 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8368 ctxt.info.switch_id = 8369 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8370 } 8371 8372 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8373 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8374 break; 8375 8376 case I40E_VSI_SRIOV: 8377 ctxt.pf_num = hw->pf_id; 8378 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 8379 ctxt.uplink_seid = vsi->uplink_seid; 8380 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 8381 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 8382 8383 /* This VSI is connected to VEB so the switch_id 8384 * should be set to zero by default. 8385 */ 8386 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 8387 ctxt.info.valid_sections |= 8388 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 8389 ctxt.info.switch_id = 8390 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 8391 } 8392 8393 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 8394 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 8395 if (pf->vf[vsi->vf_id].spoofchk) { 8396 ctxt.info.valid_sections |= 8397 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 8398 ctxt.info.sec_flags |= 8399 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 8400 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 8401 } 8402 /* Setup the VSI tx/rx queue map for TC0 only for now */ 8403 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 8404 break; 8405 8406 #ifdef I40E_FCOE 8407 case I40E_VSI_FCOE: 8408 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 8409 if (ret) { 8410 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 8411 return ret; 8412 } 8413 break; 8414 8415 #endif /* I40E_FCOE */ 8416 default: 8417 return -ENODEV; 8418 } 8419 8420 if (vsi->type != I40E_VSI_MAIN) { 8421 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 8422 if (ret) { 8423 dev_info(&vsi->back->pdev->dev, 8424 "add vsi failed, aq_err=%d\n", 8425 vsi->back->hw.aq.asq_last_status); 8426 ret = -ENOENT; 8427 goto err; 8428 } 8429 vsi->info = ctxt.info; 8430 vsi->info.valid_sections = 0; 8431 vsi->seid = ctxt.seid; 8432 vsi->id = ctxt.vsi_number; 8433 } 8434 8435 /* If macvlan filters already exist, force them to get loaded */ 8436 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 8437 f->changed = true; 8438 f_count++; 8439 8440 if (f->is_laa && vsi->type == I40E_VSI_MAIN) { 8441 struct i40e_aqc_remove_macvlan_element_data element; 8442 8443 memset(&element, 0, sizeof(element)); 8444 ether_addr_copy(element.mac_addr, f->macaddr); 8445 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 8446 ret = i40e_aq_remove_macvlan(hw, vsi->seid, 8447 &element, 1, NULL); 8448 if (ret) { 8449 /* some older FW has a different default */ 8450 element.flags |= 8451 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 8452 i40e_aq_remove_macvlan(hw, vsi->seid, 8453 &element, 1, NULL); 8454 } 8455 8456 i40e_aq_mac_address_write(hw, 8457 I40E_AQC_WRITE_TYPE_LAA_WOL, 8458 f->macaddr, NULL); 8459 } 8460 } 8461 if (f_count) { 8462 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 8463 pf->flags |= I40E_FLAG_FILTER_SYNC; 8464 } 8465 8466 /* Update VSI BW information */ 8467 ret = i40e_vsi_get_bw_info(vsi); 8468 if (ret) { 8469 dev_info(&pf->pdev->dev, 8470 "couldn't get vsi bw info, err %d, aq_err %d\n", 8471 ret, pf->hw.aq.asq_last_status); 8472 /* VSI is already added so not tearing that up */ 8473 ret = 0; 8474 } 8475 8476 err: 8477 return ret; 8478 } 8479 8480 /** 8481 * i40e_vsi_release - Delete a VSI and free its resources 8482 * @vsi: the VSI being removed 8483 * 8484 * Returns 0 on success or < 0 on error 8485 **/ 8486 int i40e_vsi_release(struct i40e_vsi *vsi) 8487 { 8488 struct i40e_mac_filter *f, *ftmp; 8489 struct i40e_veb *veb = NULL; 8490 struct i40e_pf *pf; 8491 u16 uplink_seid; 8492 int i, n; 8493 8494 pf = vsi->back; 8495 8496 /* release of a VEB-owner or last VSI is not allowed */ 8497 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 8498 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 8499 vsi->seid, vsi->uplink_seid); 8500 return -ENODEV; 8501 } 8502 if (vsi == pf->vsi[pf->lan_vsi] && 8503 !test_bit(__I40E_DOWN, &pf->state)) { 8504 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 8505 return -ENODEV; 8506 } 8507 8508 uplink_seid = vsi->uplink_seid; 8509 if (vsi->type != I40E_VSI_SRIOV) { 8510 if (vsi->netdev_registered) { 8511 vsi->netdev_registered = false; 8512 if (vsi->netdev) { 8513 /* results in a call to i40e_close() */ 8514 unregister_netdev(vsi->netdev); 8515 } 8516 } else { 8517 i40e_vsi_close(vsi); 8518 } 8519 i40e_vsi_disable_irq(vsi); 8520 } 8521 8522 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) 8523 i40e_del_filter(vsi, f->macaddr, f->vlan, 8524 f->is_vf, f->is_netdev); 8525 i40e_sync_vsi_filters(vsi); 8526 8527 i40e_vsi_delete(vsi); 8528 i40e_vsi_free_q_vectors(vsi); 8529 if (vsi->netdev) { 8530 free_netdev(vsi->netdev); 8531 vsi->netdev = NULL; 8532 } 8533 i40e_vsi_clear_rings(vsi); 8534 i40e_vsi_clear(vsi); 8535 8536 /* If this was the last thing on the VEB, except for the 8537 * controlling VSI, remove the VEB, which puts the controlling 8538 * VSI onto the next level down in the switch. 8539 * 8540 * Well, okay, there's one more exception here: don't remove 8541 * the orphan VEBs yet. We'll wait for an explicit remove request 8542 * from up the network stack. 8543 */ 8544 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 8545 if (pf->vsi[i] && 8546 pf->vsi[i]->uplink_seid == uplink_seid && 8547 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8548 n++; /* count the VSIs */ 8549 } 8550 } 8551 for (i = 0; i < I40E_MAX_VEB; i++) { 8552 if (!pf->veb[i]) 8553 continue; 8554 if (pf->veb[i]->uplink_seid == uplink_seid) 8555 n++; /* count the VEBs */ 8556 if (pf->veb[i]->seid == uplink_seid) 8557 veb = pf->veb[i]; 8558 } 8559 if (n == 0 && veb && veb->uplink_seid != 0) 8560 i40e_veb_release(veb); 8561 8562 return 0; 8563 } 8564 8565 /** 8566 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 8567 * @vsi: ptr to the VSI 8568 * 8569 * This should only be called after i40e_vsi_mem_alloc() which allocates the 8570 * corresponding SW VSI structure and initializes num_queue_pairs for the 8571 * newly allocated VSI. 8572 * 8573 * Returns 0 on success or negative on failure 8574 **/ 8575 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 8576 { 8577 int ret = -ENOENT; 8578 struct i40e_pf *pf = vsi->back; 8579 8580 if (vsi->q_vectors[0]) { 8581 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 8582 vsi->seid); 8583 return -EEXIST; 8584 } 8585 8586 if (vsi->base_vector) { 8587 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 8588 vsi->seid, vsi->base_vector); 8589 return -EEXIST; 8590 } 8591 8592 ret = i40e_vsi_alloc_q_vectors(vsi); 8593 if (ret) { 8594 dev_info(&pf->pdev->dev, 8595 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 8596 vsi->num_q_vectors, vsi->seid, ret); 8597 vsi->num_q_vectors = 0; 8598 goto vector_setup_out; 8599 } 8600 8601 if (vsi->num_q_vectors) 8602 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 8603 vsi->num_q_vectors, vsi->idx); 8604 if (vsi->base_vector < 0) { 8605 dev_info(&pf->pdev->dev, 8606 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 8607 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 8608 i40e_vsi_free_q_vectors(vsi); 8609 ret = -ENOENT; 8610 goto vector_setup_out; 8611 } 8612 8613 vector_setup_out: 8614 return ret; 8615 } 8616 8617 /** 8618 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 8619 * @vsi: pointer to the vsi. 8620 * 8621 * This re-allocates a vsi's queue resources. 8622 * 8623 * Returns pointer to the successfully allocated and configured VSI sw struct 8624 * on success, otherwise returns NULL on failure. 8625 **/ 8626 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 8627 { 8628 struct i40e_pf *pf = vsi->back; 8629 u8 enabled_tc; 8630 int ret; 8631 8632 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 8633 i40e_vsi_clear_rings(vsi); 8634 8635 i40e_vsi_free_arrays(vsi, false); 8636 i40e_set_num_rings_in_vsi(vsi); 8637 ret = i40e_vsi_alloc_arrays(vsi, false); 8638 if (ret) 8639 goto err_vsi; 8640 8641 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 8642 if (ret < 0) { 8643 dev_info(&pf->pdev->dev, 8644 "failed to get tracking for %d queues for VSI %d err=%d\n", 8645 vsi->alloc_queue_pairs, vsi->seid, ret); 8646 goto err_vsi; 8647 } 8648 vsi->base_queue = ret; 8649 8650 /* Update the FW view of the VSI. Force a reset of TC and queue 8651 * layout configurations. 8652 */ 8653 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 8654 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 8655 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 8656 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 8657 8658 /* assign it some queues */ 8659 ret = i40e_alloc_rings(vsi); 8660 if (ret) 8661 goto err_rings; 8662 8663 /* map all of the rings to the q_vectors */ 8664 i40e_vsi_map_rings_to_vectors(vsi); 8665 return vsi; 8666 8667 err_rings: 8668 i40e_vsi_free_q_vectors(vsi); 8669 if (vsi->netdev_registered) { 8670 vsi->netdev_registered = false; 8671 unregister_netdev(vsi->netdev); 8672 free_netdev(vsi->netdev); 8673 vsi->netdev = NULL; 8674 } 8675 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8676 err_vsi: 8677 i40e_vsi_clear(vsi); 8678 return NULL; 8679 } 8680 8681 /** 8682 * i40e_vsi_setup - Set up a VSI by a given type 8683 * @pf: board private structure 8684 * @type: VSI type 8685 * @uplink_seid: the switch element to link to 8686 * @param1: usage depends upon VSI type. For VF types, indicates VF id 8687 * 8688 * This allocates the sw VSI structure and its queue resources, then add a VSI 8689 * to the identified VEB. 8690 * 8691 * Returns pointer to the successfully allocated and configure VSI sw struct on 8692 * success, otherwise returns NULL on failure. 8693 **/ 8694 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 8695 u16 uplink_seid, u32 param1) 8696 { 8697 struct i40e_vsi *vsi = NULL; 8698 struct i40e_veb *veb = NULL; 8699 int ret, i; 8700 int v_idx; 8701 8702 /* The requested uplink_seid must be either 8703 * - the PF's port seid 8704 * no VEB is needed because this is the PF 8705 * or this is a Flow Director special case VSI 8706 * - seid of an existing VEB 8707 * - seid of a VSI that owns an existing VEB 8708 * - seid of a VSI that doesn't own a VEB 8709 * a new VEB is created and the VSI becomes the owner 8710 * - seid of the PF VSI, which is what creates the first VEB 8711 * this is a special case of the previous 8712 * 8713 * Find which uplink_seid we were given and create a new VEB if needed 8714 */ 8715 for (i = 0; i < I40E_MAX_VEB; i++) { 8716 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 8717 veb = pf->veb[i]; 8718 break; 8719 } 8720 } 8721 8722 if (!veb && uplink_seid != pf->mac_seid) { 8723 8724 for (i = 0; i < pf->num_alloc_vsi; i++) { 8725 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 8726 vsi = pf->vsi[i]; 8727 break; 8728 } 8729 } 8730 if (!vsi) { 8731 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 8732 uplink_seid); 8733 return NULL; 8734 } 8735 8736 if (vsi->uplink_seid == pf->mac_seid) 8737 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 8738 vsi->tc_config.enabled_tc); 8739 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 8740 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8741 vsi->tc_config.enabled_tc); 8742 if (veb) { 8743 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 8744 dev_info(&vsi->back->pdev->dev, 8745 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n", 8746 __func__); 8747 return NULL; 8748 } 8749 i40e_config_bridge_mode(veb); 8750 } 8751 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8752 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8753 veb = pf->veb[i]; 8754 } 8755 if (!veb) { 8756 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 8757 return NULL; 8758 } 8759 8760 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 8761 uplink_seid = veb->seid; 8762 } 8763 8764 /* get vsi sw struct */ 8765 v_idx = i40e_vsi_mem_alloc(pf, type); 8766 if (v_idx < 0) 8767 goto err_alloc; 8768 vsi = pf->vsi[v_idx]; 8769 if (!vsi) 8770 goto err_alloc; 8771 vsi->type = type; 8772 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 8773 8774 if (type == I40E_VSI_MAIN) 8775 pf->lan_vsi = v_idx; 8776 else if (type == I40E_VSI_SRIOV) 8777 vsi->vf_id = param1; 8778 /* assign it some queues */ 8779 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 8780 vsi->idx); 8781 if (ret < 0) { 8782 dev_info(&pf->pdev->dev, 8783 "failed to get tracking for %d queues for VSI %d err=%d\n", 8784 vsi->alloc_queue_pairs, vsi->seid, ret); 8785 goto err_vsi; 8786 } 8787 vsi->base_queue = ret; 8788 8789 /* get a VSI from the hardware */ 8790 vsi->uplink_seid = uplink_seid; 8791 ret = i40e_add_vsi(vsi); 8792 if (ret) 8793 goto err_vsi; 8794 8795 switch (vsi->type) { 8796 /* setup the netdev if needed */ 8797 case I40E_VSI_MAIN: 8798 case I40E_VSI_VMDQ2: 8799 case I40E_VSI_FCOE: 8800 ret = i40e_config_netdev(vsi); 8801 if (ret) 8802 goto err_netdev; 8803 ret = register_netdev(vsi->netdev); 8804 if (ret) 8805 goto err_netdev; 8806 vsi->netdev_registered = true; 8807 netif_carrier_off(vsi->netdev); 8808 #ifdef CONFIG_I40E_DCB 8809 /* Setup DCB netlink interface */ 8810 i40e_dcbnl_setup(vsi); 8811 #endif /* CONFIG_I40E_DCB */ 8812 /* fall through */ 8813 8814 case I40E_VSI_FDIR: 8815 /* set up vectors and rings if needed */ 8816 ret = i40e_vsi_setup_vectors(vsi); 8817 if (ret) 8818 goto err_msix; 8819 8820 ret = i40e_alloc_rings(vsi); 8821 if (ret) 8822 goto err_rings; 8823 8824 /* map all of the rings to the q_vectors */ 8825 i40e_vsi_map_rings_to_vectors(vsi); 8826 8827 i40e_vsi_reset_stats(vsi); 8828 break; 8829 8830 default: 8831 /* no netdev or rings for the other VSI types */ 8832 break; 8833 } 8834 8835 return vsi; 8836 8837 err_rings: 8838 i40e_vsi_free_q_vectors(vsi); 8839 err_msix: 8840 if (vsi->netdev_registered) { 8841 vsi->netdev_registered = false; 8842 unregister_netdev(vsi->netdev); 8843 free_netdev(vsi->netdev); 8844 vsi->netdev = NULL; 8845 } 8846 err_netdev: 8847 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 8848 err_vsi: 8849 i40e_vsi_clear(vsi); 8850 err_alloc: 8851 return NULL; 8852 } 8853 8854 /** 8855 * i40e_veb_get_bw_info - Query VEB BW information 8856 * @veb: the veb to query 8857 * 8858 * Query the Tx scheduler BW configuration data for given VEB 8859 **/ 8860 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 8861 { 8862 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 8863 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 8864 struct i40e_pf *pf = veb->pf; 8865 struct i40e_hw *hw = &pf->hw; 8866 u32 tc_bw_max; 8867 int ret = 0; 8868 int i; 8869 8870 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 8871 &bw_data, NULL); 8872 if (ret) { 8873 dev_info(&pf->pdev->dev, 8874 "query veb bw config failed, aq_err=%d\n", 8875 hw->aq.asq_last_status); 8876 goto out; 8877 } 8878 8879 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 8880 &ets_data, NULL); 8881 if (ret) { 8882 dev_info(&pf->pdev->dev, 8883 "query veb bw ets config failed, aq_err=%d\n", 8884 hw->aq.asq_last_status); 8885 goto out; 8886 } 8887 8888 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 8889 veb->bw_max_quanta = ets_data.tc_bw_max; 8890 veb->is_abs_credits = bw_data.absolute_credits_enable; 8891 veb->enabled_tc = ets_data.tc_valid_bits; 8892 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 8893 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 8894 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 8895 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 8896 veb->bw_tc_limit_credits[i] = 8897 le16_to_cpu(bw_data.tc_bw_limits[i]); 8898 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 8899 } 8900 8901 out: 8902 return ret; 8903 } 8904 8905 /** 8906 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 8907 * @pf: board private structure 8908 * 8909 * On error: returns error code (negative) 8910 * On success: returns vsi index in PF (positive) 8911 **/ 8912 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 8913 { 8914 int ret = -ENOENT; 8915 struct i40e_veb *veb; 8916 int i; 8917 8918 /* Need to protect the allocation of switch elements at the PF level */ 8919 mutex_lock(&pf->switch_mutex); 8920 8921 /* VEB list may be fragmented if VEB creation/destruction has 8922 * been happening. We can afford to do a quick scan to look 8923 * for any free slots in the list. 8924 * 8925 * find next empty veb slot, looping back around if necessary 8926 */ 8927 i = 0; 8928 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 8929 i++; 8930 if (i >= I40E_MAX_VEB) { 8931 ret = -ENOMEM; 8932 goto err_alloc_veb; /* out of VEB slots! */ 8933 } 8934 8935 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 8936 if (!veb) { 8937 ret = -ENOMEM; 8938 goto err_alloc_veb; 8939 } 8940 veb->pf = pf; 8941 veb->idx = i; 8942 veb->enabled_tc = 1; 8943 8944 pf->veb[i] = veb; 8945 ret = i; 8946 err_alloc_veb: 8947 mutex_unlock(&pf->switch_mutex); 8948 return ret; 8949 } 8950 8951 /** 8952 * i40e_switch_branch_release - Delete a branch of the switch tree 8953 * @branch: where to start deleting 8954 * 8955 * This uses recursion to find the tips of the branch to be 8956 * removed, deleting until we get back to and can delete this VEB. 8957 **/ 8958 static void i40e_switch_branch_release(struct i40e_veb *branch) 8959 { 8960 struct i40e_pf *pf = branch->pf; 8961 u16 branch_seid = branch->seid; 8962 u16 veb_idx = branch->idx; 8963 int i; 8964 8965 /* release any VEBs on this VEB - RECURSION */ 8966 for (i = 0; i < I40E_MAX_VEB; i++) { 8967 if (!pf->veb[i]) 8968 continue; 8969 if (pf->veb[i]->uplink_seid == branch->seid) 8970 i40e_switch_branch_release(pf->veb[i]); 8971 } 8972 8973 /* Release the VSIs on this VEB, but not the owner VSI. 8974 * 8975 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 8976 * the VEB itself, so don't use (*branch) after this loop. 8977 */ 8978 for (i = 0; i < pf->num_alloc_vsi; i++) { 8979 if (!pf->vsi[i]) 8980 continue; 8981 if (pf->vsi[i]->uplink_seid == branch_seid && 8982 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 8983 i40e_vsi_release(pf->vsi[i]); 8984 } 8985 } 8986 8987 /* There's one corner case where the VEB might not have been 8988 * removed, so double check it here and remove it if needed. 8989 * This case happens if the veb was created from the debugfs 8990 * commands and no VSIs were added to it. 8991 */ 8992 if (pf->veb[veb_idx]) 8993 i40e_veb_release(pf->veb[veb_idx]); 8994 } 8995 8996 /** 8997 * i40e_veb_clear - remove veb struct 8998 * @veb: the veb to remove 8999 **/ 9000 static void i40e_veb_clear(struct i40e_veb *veb) 9001 { 9002 if (!veb) 9003 return; 9004 9005 if (veb->pf) { 9006 struct i40e_pf *pf = veb->pf; 9007 9008 mutex_lock(&pf->switch_mutex); 9009 if (pf->veb[veb->idx] == veb) 9010 pf->veb[veb->idx] = NULL; 9011 mutex_unlock(&pf->switch_mutex); 9012 } 9013 9014 kfree(veb); 9015 } 9016 9017 /** 9018 * i40e_veb_release - Delete a VEB and free its resources 9019 * @veb: the VEB being removed 9020 **/ 9021 void i40e_veb_release(struct i40e_veb *veb) 9022 { 9023 struct i40e_vsi *vsi = NULL; 9024 struct i40e_pf *pf; 9025 int i, n = 0; 9026 9027 pf = veb->pf; 9028 9029 /* find the remaining VSI and check for extras */ 9030 for (i = 0; i < pf->num_alloc_vsi; i++) { 9031 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 9032 n++; 9033 vsi = pf->vsi[i]; 9034 } 9035 } 9036 if (n != 1) { 9037 dev_info(&pf->pdev->dev, 9038 "can't remove VEB %d with %d VSIs left\n", 9039 veb->seid, n); 9040 return; 9041 } 9042 9043 /* move the remaining VSI to uplink veb */ 9044 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 9045 if (veb->uplink_seid) { 9046 vsi->uplink_seid = veb->uplink_seid; 9047 if (veb->uplink_seid == pf->mac_seid) 9048 vsi->veb_idx = I40E_NO_VEB; 9049 else 9050 vsi->veb_idx = veb->veb_idx; 9051 } else { 9052 /* floating VEB */ 9053 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 9054 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 9055 } 9056 9057 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 9058 i40e_veb_clear(veb); 9059 } 9060 9061 /** 9062 * i40e_add_veb - create the VEB in the switch 9063 * @veb: the VEB to be instantiated 9064 * @vsi: the controlling VSI 9065 **/ 9066 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 9067 { 9068 bool is_default = false; 9069 bool is_cloud = false; 9070 int ret; 9071 9072 /* get a VEB from the hardware */ 9073 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, 9074 veb->enabled_tc, is_default, 9075 is_cloud, &veb->seid, NULL); 9076 if (ret) { 9077 dev_info(&veb->pf->pdev->dev, 9078 "couldn't add VEB, err %d, aq_err %d\n", 9079 ret, veb->pf->hw.aq.asq_last_status); 9080 return -EPERM; 9081 } 9082 9083 /* get statistics counter */ 9084 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, 9085 &veb->stats_idx, NULL, NULL, NULL); 9086 if (ret) { 9087 dev_info(&veb->pf->pdev->dev, 9088 "couldn't get VEB statistics idx, err %d, aq_err %d\n", 9089 ret, veb->pf->hw.aq.asq_last_status); 9090 return -EPERM; 9091 } 9092 ret = i40e_veb_get_bw_info(veb); 9093 if (ret) { 9094 dev_info(&veb->pf->pdev->dev, 9095 "couldn't get VEB bw info, err %d, aq_err %d\n", 9096 ret, veb->pf->hw.aq.asq_last_status); 9097 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); 9098 return -ENOENT; 9099 } 9100 9101 vsi->uplink_seid = veb->seid; 9102 vsi->veb_idx = veb->idx; 9103 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 9104 9105 return 0; 9106 } 9107 9108 /** 9109 * i40e_veb_setup - Set up a VEB 9110 * @pf: board private structure 9111 * @flags: VEB setup flags 9112 * @uplink_seid: the switch element to link to 9113 * @vsi_seid: the initial VSI seid 9114 * @enabled_tc: Enabled TC bit-map 9115 * 9116 * This allocates the sw VEB structure and links it into the switch 9117 * It is possible and legal for this to be a duplicate of an already 9118 * existing VEB. It is also possible for both uplink and vsi seids 9119 * to be zero, in order to create a floating VEB. 9120 * 9121 * Returns pointer to the successfully allocated VEB sw struct on 9122 * success, otherwise returns NULL on failure. 9123 **/ 9124 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 9125 u16 uplink_seid, u16 vsi_seid, 9126 u8 enabled_tc) 9127 { 9128 struct i40e_veb *veb, *uplink_veb = NULL; 9129 int vsi_idx, veb_idx; 9130 int ret; 9131 9132 /* if one seid is 0, the other must be 0 to create a floating relay */ 9133 if ((uplink_seid == 0 || vsi_seid == 0) && 9134 (uplink_seid + vsi_seid != 0)) { 9135 dev_info(&pf->pdev->dev, 9136 "one, not both seid's are 0: uplink=%d vsi=%d\n", 9137 uplink_seid, vsi_seid); 9138 return NULL; 9139 } 9140 9141 /* make sure there is such a vsi and uplink */ 9142 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 9143 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 9144 break; 9145 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 9146 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 9147 vsi_seid); 9148 return NULL; 9149 } 9150 9151 if (uplink_seid && uplink_seid != pf->mac_seid) { 9152 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 9153 if (pf->veb[veb_idx] && 9154 pf->veb[veb_idx]->seid == uplink_seid) { 9155 uplink_veb = pf->veb[veb_idx]; 9156 break; 9157 } 9158 } 9159 if (!uplink_veb) { 9160 dev_info(&pf->pdev->dev, 9161 "uplink seid %d not found\n", uplink_seid); 9162 return NULL; 9163 } 9164 } 9165 9166 /* get veb sw struct */ 9167 veb_idx = i40e_veb_mem_alloc(pf); 9168 if (veb_idx < 0) 9169 goto err_alloc; 9170 veb = pf->veb[veb_idx]; 9171 veb->flags = flags; 9172 veb->uplink_seid = uplink_seid; 9173 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 9174 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 9175 9176 /* create the VEB in the switch */ 9177 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 9178 if (ret) 9179 goto err_veb; 9180 if (vsi_idx == pf->lan_vsi) 9181 pf->lan_veb = veb->idx; 9182 9183 return veb; 9184 9185 err_veb: 9186 i40e_veb_clear(veb); 9187 err_alloc: 9188 return NULL; 9189 } 9190 9191 /** 9192 * i40e_setup_pf_switch_element - set PF vars based on switch type 9193 * @pf: board private structure 9194 * @ele: element we are building info from 9195 * @num_reported: total number of elements 9196 * @printconfig: should we print the contents 9197 * 9198 * helper function to assist in extracting a few useful SEID values. 9199 **/ 9200 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 9201 struct i40e_aqc_switch_config_element_resp *ele, 9202 u16 num_reported, bool printconfig) 9203 { 9204 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 9205 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 9206 u8 element_type = ele->element_type; 9207 u16 seid = le16_to_cpu(ele->seid); 9208 9209 if (printconfig) 9210 dev_info(&pf->pdev->dev, 9211 "type=%d seid=%d uplink=%d downlink=%d\n", 9212 element_type, seid, uplink_seid, downlink_seid); 9213 9214 switch (element_type) { 9215 case I40E_SWITCH_ELEMENT_TYPE_MAC: 9216 pf->mac_seid = seid; 9217 break; 9218 case I40E_SWITCH_ELEMENT_TYPE_VEB: 9219 /* Main VEB? */ 9220 if (uplink_seid != pf->mac_seid) 9221 break; 9222 if (pf->lan_veb == I40E_NO_VEB) { 9223 int v; 9224 9225 /* find existing or else empty VEB */ 9226 for (v = 0; v < I40E_MAX_VEB; v++) { 9227 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 9228 pf->lan_veb = v; 9229 break; 9230 } 9231 } 9232 if (pf->lan_veb == I40E_NO_VEB) { 9233 v = i40e_veb_mem_alloc(pf); 9234 if (v < 0) 9235 break; 9236 pf->lan_veb = v; 9237 } 9238 } 9239 9240 pf->veb[pf->lan_veb]->seid = seid; 9241 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 9242 pf->veb[pf->lan_veb]->pf = pf; 9243 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 9244 break; 9245 case I40E_SWITCH_ELEMENT_TYPE_VSI: 9246 if (num_reported != 1) 9247 break; 9248 /* This is immediately after a reset so we can assume this is 9249 * the PF's VSI 9250 */ 9251 pf->mac_seid = uplink_seid; 9252 pf->pf_seid = downlink_seid; 9253 pf->main_vsi_seid = seid; 9254 if (printconfig) 9255 dev_info(&pf->pdev->dev, 9256 "pf_seid=%d main_vsi_seid=%d\n", 9257 pf->pf_seid, pf->main_vsi_seid); 9258 break; 9259 case I40E_SWITCH_ELEMENT_TYPE_PF: 9260 case I40E_SWITCH_ELEMENT_TYPE_VF: 9261 case I40E_SWITCH_ELEMENT_TYPE_EMP: 9262 case I40E_SWITCH_ELEMENT_TYPE_BMC: 9263 case I40E_SWITCH_ELEMENT_TYPE_PE: 9264 case I40E_SWITCH_ELEMENT_TYPE_PA: 9265 /* ignore these for now */ 9266 break; 9267 default: 9268 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 9269 element_type, seid); 9270 break; 9271 } 9272 } 9273 9274 /** 9275 * i40e_fetch_switch_configuration - Get switch config from firmware 9276 * @pf: board private structure 9277 * @printconfig: should we print the contents 9278 * 9279 * Get the current switch configuration from the device and 9280 * extract a few useful SEID values. 9281 **/ 9282 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 9283 { 9284 struct i40e_aqc_get_switch_config_resp *sw_config; 9285 u16 next_seid = 0; 9286 int ret = 0; 9287 u8 *aq_buf; 9288 int i; 9289 9290 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 9291 if (!aq_buf) 9292 return -ENOMEM; 9293 9294 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 9295 do { 9296 u16 num_reported, num_total; 9297 9298 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 9299 I40E_AQ_LARGE_BUF, 9300 &next_seid, NULL); 9301 if (ret) { 9302 dev_info(&pf->pdev->dev, 9303 "get switch config failed %d aq_err=%x\n", 9304 ret, pf->hw.aq.asq_last_status); 9305 kfree(aq_buf); 9306 return -ENOENT; 9307 } 9308 9309 num_reported = le16_to_cpu(sw_config->header.num_reported); 9310 num_total = le16_to_cpu(sw_config->header.num_total); 9311 9312 if (printconfig) 9313 dev_info(&pf->pdev->dev, 9314 "header: %d reported %d total\n", 9315 num_reported, num_total); 9316 9317 for (i = 0; i < num_reported; i++) { 9318 struct i40e_aqc_switch_config_element_resp *ele = 9319 &sw_config->element[i]; 9320 9321 i40e_setup_pf_switch_element(pf, ele, num_reported, 9322 printconfig); 9323 } 9324 } while (next_seid != 0); 9325 9326 kfree(aq_buf); 9327 return ret; 9328 } 9329 9330 /** 9331 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 9332 * @pf: board private structure 9333 * @reinit: if the Main VSI needs to re-initialized. 9334 * 9335 * Returns 0 on success, negative value on failure 9336 **/ 9337 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 9338 { 9339 int ret; 9340 9341 /* find out what's out there already */ 9342 ret = i40e_fetch_switch_configuration(pf, false); 9343 if (ret) { 9344 dev_info(&pf->pdev->dev, 9345 "couldn't fetch switch config, err %d, aq_err %d\n", 9346 ret, pf->hw.aq.asq_last_status); 9347 return ret; 9348 } 9349 i40e_pf_reset_stats(pf); 9350 9351 /* first time setup */ 9352 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 9353 struct i40e_vsi *vsi = NULL; 9354 u16 uplink_seid; 9355 9356 /* Set up the PF VSI associated with the PF's main VSI 9357 * that is already in the HW switch 9358 */ 9359 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 9360 uplink_seid = pf->veb[pf->lan_veb]->seid; 9361 else 9362 uplink_seid = pf->mac_seid; 9363 if (pf->lan_vsi == I40E_NO_VSI) 9364 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 9365 else if (reinit) 9366 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 9367 if (!vsi) { 9368 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 9369 i40e_fdir_teardown(pf); 9370 return -EAGAIN; 9371 } 9372 } else { 9373 /* force a reset of TC and queue layout configurations */ 9374 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 9375 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 9376 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 9377 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 9378 } 9379 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 9380 9381 i40e_fdir_sb_setup(pf); 9382 9383 /* Setup static PF queue filter control settings */ 9384 ret = i40e_setup_pf_filter_control(pf); 9385 if (ret) { 9386 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 9387 ret); 9388 /* Failure here should not stop continuing other steps */ 9389 } 9390 9391 /* enable RSS in the HW, even for only one queue, as the stack can use 9392 * the hash 9393 */ 9394 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 9395 i40e_config_rss(pf); 9396 9397 /* fill in link information and enable LSE reporting */ 9398 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); 9399 i40e_link_event(pf); 9400 9401 /* Initialize user-specific link properties */ 9402 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 9403 I40E_AQ_AN_COMPLETED) ? true : false); 9404 9405 i40e_ptp_init(pf); 9406 9407 return ret; 9408 } 9409 9410 /** 9411 * i40e_determine_queue_usage - Work out queue distribution 9412 * @pf: board private structure 9413 **/ 9414 static void i40e_determine_queue_usage(struct i40e_pf *pf) 9415 { 9416 int queues_left; 9417 9418 pf->num_lan_qps = 0; 9419 #ifdef I40E_FCOE 9420 pf->num_fcoe_qps = 0; 9421 #endif 9422 9423 /* Find the max queues to be put into basic use. We'll always be 9424 * using TC0, whether or not DCB is running, and TC0 will get the 9425 * big RSS set. 9426 */ 9427 queues_left = pf->hw.func_caps.num_tx_qp; 9428 9429 if ((queues_left == 1) || 9430 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 9431 /* one qp for PF, no queues for anything else */ 9432 queues_left = 0; 9433 pf->rss_size = pf->num_lan_qps = 1; 9434 9435 /* make sure all the fancies are disabled */ 9436 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9437 #ifdef I40E_FCOE 9438 I40E_FLAG_FCOE_ENABLED | 9439 #endif 9440 I40E_FLAG_FD_SB_ENABLED | 9441 I40E_FLAG_FD_ATR_ENABLED | 9442 I40E_FLAG_DCB_CAPABLE | 9443 I40E_FLAG_SRIOV_ENABLED | 9444 I40E_FLAG_VMDQ_ENABLED); 9445 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 9446 I40E_FLAG_FD_SB_ENABLED | 9447 I40E_FLAG_FD_ATR_ENABLED | 9448 I40E_FLAG_DCB_CAPABLE))) { 9449 /* one qp for PF */ 9450 pf->rss_size = pf->num_lan_qps = 1; 9451 queues_left -= pf->num_lan_qps; 9452 9453 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 9454 #ifdef I40E_FCOE 9455 I40E_FLAG_FCOE_ENABLED | 9456 #endif 9457 I40E_FLAG_FD_SB_ENABLED | 9458 I40E_FLAG_FD_ATR_ENABLED | 9459 I40E_FLAG_DCB_ENABLED | 9460 I40E_FLAG_VMDQ_ENABLED); 9461 } else { 9462 /* Not enough queues for all TCs */ 9463 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 9464 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 9465 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9466 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 9467 } 9468 pf->num_lan_qps = max_t(int, pf->rss_size_max, 9469 num_online_cpus()); 9470 pf->num_lan_qps = min_t(int, pf->num_lan_qps, 9471 pf->hw.func_caps.num_tx_qp); 9472 9473 queues_left -= pf->num_lan_qps; 9474 } 9475 9476 #ifdef I40E_FCOE 9477 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 9478 if (I40E_DEFAULT_FCOE <= queues_left) { 9479 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 9480 } else if (I40E_MINIMUM_FCOE <= queues_left) { 9481 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 9482 } else { 9483 pf->num_fcoe_qps = 0; 9484 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 9485 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 9486 } 9487 9488 queues_left -= pf->num_fcoe_qps; 9489 } 9490 9491 #endif 9492 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9493 if (queues_left > 1) { 9494 queues_left -= 1; /* save 1 queue for FD */ 9495 } else { 9496 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 9497 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 9498 } 9499 } 9500 9501 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9502 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 9503 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 9504 (queues_left / pf->num_vf_qps)); 9505 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 9506 } 9507 9508 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 9509 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 9510 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 9511 (queues_left / pf->num_vmdq_qps)); 9512 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 9513 } 9514 9515 pf->queues_left = queues_left; 9516 #ifdef I40E_FCOE 9517 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 9518 #endif 9519 } 9520 9521 /** 9522 * i40e_setup_pf_filter_control - Setup PF static filter control 9523 * @pf: PF to be setup 9524 * 9525 * i40e_setup_pf_filter_control sets up a PF's initial filter control 9526 * settings. If PE/FCoE are enabled then it will also set the per PF 9527 * based filter sizes required for them. It also enables Flow director, 9528 * ethertype and macvlan type filter settings for the pf. 9529 * 9530 * Returns 0 on success, negative on failure 9531 **/ 9532 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 9533 { 9534 struct i40e_filter_control_settings *settings = &pf->filter_settings; 9535 9536 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 9537 9538 /* Flow Director is enabled */ 9539 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 9540 settings->enable_fdir = true; 9541 9542 /* Ethtype and MACVLAN filters enabled for PF */ 9543 settings->enable_ethtype = true; 9544 settings->enable_macvlan = true; 9545 9546 if (i40e_set_filter_control(&pf->hw, settings)) 9547 return -ENOENT; 9548 9549 return 0; 9550 } 9551 9552 #define INFO_STRING_LEN 255 9553 static void i40e_print_features(struct i40e_pf *pf) 9554 { 9555 struct i40e_hw *hw = &pf->hw; 9556 char *buf, *string; 9557 9558 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); 9559 if (!string) { 9560 dev_err(&pf->pdev->dev, "Features string allocation failed\n"); 9561 return; 9562 } 9563 9564 buf = string; 9565 9566 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id); 9567 #ifdef CONFIG_PCI_IOV 9568 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs); 9569 #endif 9570 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ", 9571 pf->hw.func_caps.num_vsis, 9572 pf->vsi[pf->lan_vsi]->num_queue_pairs, 9573 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF"); 9574 9575 if (pf->flags & I40E_FLAG_RSS_ENABLED) 9576 buf += sprintf(buf, "RSS "); 9577 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 9578 buf += sprintf(buf, "FD_ATR "); 9579 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9580 buf += sprintf(buf, "FD_SB "); 9581 buf += sprintf(buf, "NTUPLE "); 9582 } 9583 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 9584 buf += sprintf(buf, "DCB "); 9585 if (pf->flags & I40E_FLAG_PTP) 9586 buf += sprintf(buf, "PTP "); 9587 #ifdef I40E_FCOE 9588 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 9589 buf += sprintf(buf, "FCOE "); 9590 #endif 9591 9592 BUG_ON(buf > (string + INFO_STRING_LEN)); 9593 dev_info(&pf->pdev->dev, "%s\n", string); 9594 kfree(string); 9595 } 9596 9597 /** 9598 * i40e_probe - Device initialization routine 9599 * @pdev: PCI device information struct 9600 * @ent: entry in i40e_pci_tbl 9601 * 9602 * i40e_probe initializes a PF identified by a pci_dev structure. 9603 * The OS initialization, configuring of the PF private structure, 9604 * and a hardware reset occur. 9605 * 9606 * Returns 0 on success, negative on failure 9607 **/ 9608 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 9609 { 9610 struct i40e_aq_get_phy_abilities_resp abilities; 9611 unsigned long ioremap_len; 9612 struct i40e_pf *pf; 9613 struct i40e_hw *hw; 9614 static u16 pfs_found; 9615 u16 link_status; 9616 int err = 0; 9617 u32 len; 9618 u32 i; 9619 9620 err = pci_enable_device_mem(pdev); 9621 if (err) 9622 return err; 9623 9624 /* set up for high or low dma */ 9625 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9626 if (err) { 9627 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9628 if (err) { 9629 dev_err(&pdev->dev, 9630 "DMA configuration failed: 0x%x\n", err); 9631 goto err_dma; 9632 } 9633 } 9634 9635 /* set up pci connections */ 9636 err = pci_request_selected_regions(pdev, pci_select_bars(pdev, 9637 IORESOURCE_MEM), i40e_driver_name); 9638 if (err) { 9639 dev_info(&pdev->dev, 9640 "pci_request_selected_regions failed %d\n", err); 9641 goto err_pci_reg; 9642 } 9643 9644 pci_enable_pcie_error_reporting(pdev); 9645 pci_set_master(pdev); 9646 9647 /* Now that we have a PCI connection, we need to do the 9648 * low level device setup. This is primarily setting up 9649 * the Admin Queue structures and then querying for the 9650 * device's current profile information. 9651 */ 9652 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 9653 if (!pf) { 9654 err = -ENOMEM; 9655 goto err_pf_alloc; 9656 } 9657 pf->next_vsi = 0; 9658 pf->pdev = pdev; 9659 set_bit(__I40E_DOWN, &pf->state); 9660 9661 hw = &pf->hw; 9662 hw->back = pf; 9663 9664 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0), 9665 I40E_MAX_CSR_SPACE); 9666 9667 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len); 9668 if (!hw->hw_addr) { 9669 err = -EIO; 9670 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 9671 (unsigned int)pci_resource_start(pdev, 0), 9672 (unsigned int)pci_resource_len(pdev, 0), err); 9673 goto err_ioremap; 9674 } 9675 hw->vendor_id = pdev->vendor; 9676 hw->device_id = pdev->device; 9677 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 9678 hw->subsystem_vendor_id = pdev->subsystem_vendor; 9679 hw->subsystem_device_id = pdev->subsystem_device; 9680 hw->bus.device = PCI_SLOT(pdev->devfn); 9681 hw->bus.func = PCI_FUNC(pdev->devfn); 9682 pf->instance = pfs_found; 9683 9684 if (debug != -1) { 9685 pf->msg_enable = pf->hw.debug_mask; 9686 pf->msg_enable = debug; 9687 } 9688 9689 /* do a special CORER for clearing PXE mode once at init */ 9690 if (hw->revision_id == 0 && 9691 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 9692 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 9693 i40e_flush(hw); 9694 msleep(200); 9695 pf->corer_count++; 9696 9697 i40e_clear_pxe_mode(hw); 9698 } 9699 9700 /* Reset here to make sure all is clean and to define PF 'n' */ 9701 i40e_clear_hw(hw); 9702 err = i40e_pf_reset(hw); 9703 if (err) { 9704 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 9705 goto err_pf_reset; 9706 } 9707 pf->pfr_count++; 9708 9709 hw->aq.num_arq_entries = I40E_AQ_LEN; 9710 hw->aq.num_asq_entries = I40E_AQ_LEN; 9711 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9712 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 9713 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 9714 9715 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 9716 "%s-%s:misc", 9717 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 9718 9719 err = i40e_init_shared_code(hw); 9720 if (err) { 9721 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); 9722 goto err_pf_reset; 9723 } 9724 9725 /* set up a default setting for link flow control */ 9726 pf->hw.fc.requested_mode = I40E_FC_NONE; 9727 9728 err = i40e_init_adminq(hw); 9729 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); 9730 if (err) { 9731 dev_info(&pdev->dev, 9732 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 9733 goto err_pf_reset; 9734 } 9735 9736 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 9737 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 9738 dev_info(&pdev->dev, 9739 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 9740 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 9741 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 9742 dev_info(&pdev->dev, 9743 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 9744 9745 i40e_verify_eeprom(pf); 9746 9747 /* Rev 0 hardware was never productized */ 9748 if (hw->revision_id < 1) 9749 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 9750 9751 i40e_clear_pxe_mode(hw); 9752 err = i40e_get_capabilities(pf); 9753 if (err) 9754 goto err_adminq_setup; 9755 9756 err = i40e_sw_init(pf); 9757 if (err) { 9758 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 9759 goto err_sw_init; 9760 } 9761 9762 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 9763 hw->func_caps.num_rx_qp, 9764 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 9765 if (err) { 9766 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 9767 goto err_init_lan_hmc; 9768 } 9769 9770 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 9771 if (err) { 9772 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 9773 err = -ENOENT; 9774 goto err_configure_lan_hmc; 9775 } 9776 9777 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 9778 * Ignore error return codes because if it was already disabled via 9779 * hardware settings this will fail 9780 */ 9781 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 9782 (pf->hw.aq.fw_maj_ver < 4)) { 9783 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 9784 i40e_aq_stop_lldp(hw, true, NULL); 9785 } 9786 9787 i40e_get_mac_addr(hw, hw->mac.addr); 9788 if (!is_valid_ether_addr(hw->mac.addr)) { 9789 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 9790 err = -EIO; 9791 goto err_mac_addr; 9792 } 9793 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 9794 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 9795 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 9796 if (is_valid_ether_addr(hw->mac.port_addr)) 9797 pf->flags |= I40E_FLAG_PORT_ID_VALID; 9798 #ifdef I40E_FCOE 9799 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 9800 if (err) 9801 dev_info(&pdev->dev, 9802 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 9803 if (!is_valid_ether_addr(hw->mac.san_addr)) { 9804 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 9805 hw->mac.san_addr); 9806 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 9807 } 9808 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 9809 #endif /* I40E_FCOE */ 9810 9811 pci_set_drvdata(pdev, pf); 9812 pci_save_state(pdev); 9813 #ifdef CONFIG_I40E_DCB 9814 err = i40e_init_pf_dcb(pf); 9815 if (err) { 9816 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 9817 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 9818 /* Continue without DCB enabled */ 9819 } 9820 #endif /* CONFIG_I40E_DCB */ 9821 9822 /* set up periodic task facility */ 9823 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 9824 pf->service_timer_period = HZ; 9825 9826 INIT_WORK(&pf->service_task, i40e_service_task); 9827 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 9828 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 9829 pf->link_check_timeout = jiffies; 9830 9831 /* WoL defaults to disabled */ 9832 pf->wol_en = false; 9833 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 9834 9835 /* set up the main switch operations */ 9836 i40e_determine_queue_usage(pf); 9837 err = i40e_init_interrupt_scheme(pf); 9838 if (err) 9839 goto err_switch_setup; 9840 9841 /* The number of VSIs reported by the FW is the minimum guaranteed 9842 * to us; HW supports far more and we share the remaining pool with 9843 * the other PFs. We allocate space for more than the guarantee with 9844 * the understanding that we might not get them all later. 9845 */ 9846 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 9847 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 9848 else 9849 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 9850 9851 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 9852 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi; 9853 pf->vsi = kzalloc(len, GFP_KERNEL); 9854 if (!pf->vsi) { 9855 err = -ENOMEM; 9856 goto err_switch_setup; 9857 } 9858 9859 err = i40e_setup_pf_switch(pf, false); 9860 if (err) { 9861 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 9862 goto err_vsis; 9863 } 9864 /* if FDIR VSI was set up, start it now */ 9865 for (i = 0; i < pf->num_alloc_vsi; i++) { 9866 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 9867 i40e_vsi_open(pf->vsi[i]); 9868 break; 9869 } 9870 } 9871 9872 /* driver is only interested in link up/down and module qualification 9873 * reports from firmware 9874 */ 9875 err = i40e_aq_set_phy_int_mask(&pf->hw, 9876 I40E_AQ_EVENT_LINK_UPDOWN | 9877 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL); 9878 if (err) 9879 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err); 9880 9881 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 9882 (pf->hw.aq.fw_maj_ver < 4)) { 9883 msleep(75); 9884 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 9885 if (err) 9886 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n", 9887 pf->hw.aq.asq_last_status); 9888 } 9889 /* The main driver is (mostly) up and happy. We need to set this state 9890 * before setting up the misc vector or we get a race and the vector 9891 * ends up disabled forever. 9892 */ 9893 clear_bit(__I40E_DOWN, &pf->state); 9894 9895 /* In case of MSIX we are going to setup the misc vector right here 9896 * to handle admin queue events etc. In case of legacy and MSI 9897 * the misc functionality and queue processing is combined in 9898 * the same vector and that gets setup at open. 9899 */ 9900 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 9901 err = i40e_setup_misc_vector(pf); 9902 if (err) { 9903 dev_info(&pdev->dev, 9904 "setup of misc vector failed: %d\n", err); 9905 goto err_vsis; 9906 } 9907 } 9908 9909 #ifdef CONFIG_PCI_IOV 9910 /* prep for VF support */ 9911 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 9912 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 9913 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 9914 u32 val; 9915 9916 /* disable link interrupts for VFs */ 9917 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 9918 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 9919 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 9920 i40e_flush(hw); 9921 9922 if (pci_num_vf(pdev)) { 9923 dev_info(&pdev->dev, 9924 "Active VFs found, allocating resources.\n"); 9925 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 9926 if (err) 9927 dev_info(&pdev->dev, 9928 "Error %d allocating resources for existing VFs\n", 9929 err); 9930 } 9931 } 9932 #endif /* CONFIG_PCI_IOV */ 9933 9934 pfs_found++; 9935 9936 i40e_dbg_pf_init(pf); 9937 9938 /* tell the firmware that we're starting */ 9939 i40e_send_version(pf); 9940 9941 /* since everything's happy, start the service_task timer */ 9942 mod_timer(&pf->service_timer, 9943 round_jiffies(jiffies + pf->service_timer_period)); 9944 9945 #ifdef I40E_FCOE 9946 /* create FCoE interface */ 9947 i40e_fcoe_vsi_setup(pf); 9948 9949 #endif 9950 /* Get the negotiated link width and speed from PCI config space */ 9951 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); 9952 9953 i40e_set_pci_config_data(hw, link_status); 9954 9955 dev_info(&pdev->dev, "PCI-Express: %s %s\n", 9956 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : 9957 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : 9958 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : 9959 "Unknown"), 9960 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : 9961 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : 9962 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : 9963 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : 9964 "Unknown")); 9965 9966 if (hw->bus.width < i40e_bus_width_pcie_x8 || 9967 hw->bus.speed < i40e_bus_speed_8000) { 9968 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 9969 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 9970 } 9971 9972 /* get the requested speeds from the fw */ 9973 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 9974 if (err) 9975 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n", 9976 err); 9977 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 9978 9979 /* print a string summarizing features */ 9980 i40e_print_features(pf); 9981 9982 return 0; 9983 9984 /* Unwind what we've done if something failed in the setup */ 9985 err_vsis: 9986 set_bit(__I40E_DOWN, &pf->state); 9987 i40e_clear_interrupt_scheme(pf); 9988 kfree(pf->vsi); 9989 err_switch_setup: 9990 i40e_reset_interrupt_capability(pf); 9991 del_timer_sync(&pf->service_timer); 9992 err_mac_addr: 9993 err_configure_lan_hmc: 9994 (void)i40e_shutdown_lan_hmc(hw); 9995 err_init_lan_hmc: 9996 kfree(pf->qp_pile); 9997 err_sw_init: 9998 err_adminq_setup: 9999 (void)i40e_shutdown_adminq(hw); 10000 err_pf_reset: 10001 iounmap(hw->hw_addr); 10002 err_ioremap: 10003 kfree(pf); 10004 err_pf_alloc: 10005 pci_disable_pcie_error_reporting(pdev); 10006 pci_release_selected_regions(pdev, 10007 pci_select_bars(pdev, IORESOURCE_MEM)); 10008 err_pci_reg: 10009 err_dma: 10010 pci_disable_device(pdev); 10011 return err; 10012 } 10013 10014 /** 10015 * i40e_remove - Device removal routine 10016 * @pdev: PCI device information struct 10017 * 10018 * i40e_remove is called by the PCI subsystem to alert the driver 10019 * that is should release a PCI device. This could be caused by a 10020 * Hot-Plug event, or because the driver is going to be removed from 10021 * memory. 10022 **/ 10023 static void i40e_remove(struct pci_dev *pdev) 10024 { 10025 struct i40e_pf *pf = pci_get_drvdata(pdev); 10026 i40e_status ret_code; 10027 int i; 10028 10029 i40e_dbg_pf_exit(pf); 10030 10031 i40e_ptp_stop(pf); 10032 10033 /* no more scheduling of any task */ 10034 set_bit(__I40E_DOWN, &pf->state); 10035 del_timer_sync(&pf->service_timer); 10036 cancel_work_sync(&pf->service_task); 10037 i40e_fdir_teardown(pf); 10038 10039 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 10040 i40e_free_vfs(pf); 10041 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 10042 } 10043 10044 i40e_fdir_teardown(pf); 10045 10046 /* If there is a switch structure or any orphans, remove them. 10047 * This will leave only the PF's VSI remaining. 10048 */ 10049 for (i = 0; i < I40E_MAX_VEB; i++) { 10050 if (!pf->veb[i]) 10051 continue; 10052 10053 if (pf->veb[i]->uplink_seid == pf->mac_seid || 10054 pf->veb[i]->uplink_seid == 0) 10055 i40e_switch_branch_release(pf->veb[i]); 10056 } 10057 10058 /* Now we can shutdown the PF's VSI, just before we kill 10059 * adminq and hmc. 10060 */ 10061 if (pf->vsi[pf->lan_vsi]) 10062 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 10063 10064 /* shutdown and destroy the HMC */ 10065 if (pf->hw.hmc.hmc_obj) { 10066 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 10067 if (ret_code) 10068 dev_warn(&pdev->dev, 10069 "Failed to destroy the HMC resources: %d\n", 10070 ret_code); 10071 } 10072 10073 /* shutdown the adminq */ 10074 ret_code = i40e_shutdown_adminq(&pf->hw); 10075 if (ret_code) 10076 dev_warn(&pdev->dev, 10077 "Failed to destroy the Admin Queue resources: %d\n", 10078 ret_code); 10079 10080 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 10081 i40e_clear_interrupt_scheme(pf); 10082 for (i = 0; i < pf->num_alloc_vsi; i++) { 10083 if (pf->vsi[i]) { 10084 i40e_vsi_clear_rings(pf->vsi[i]); 10085 i40e_vsi_clear(pf->vsi[i]); 10086 pf->vsi[i] = NULL; 10087 } 10088 } 10089 10090 for (i = 0; i < I40E_MAX_VEB; i++) { 10091 kfree(pf->veb[i]); 10092 pf->veb[i] = NULL; 10093 } 10094 10095 kfree(pf->qp_pile); 10096 kfree(pf->vsi); 10097 10098 iounmap(pf->hw.hw_addr); 10099 kfree(pf); 10100 pci_release_selected_regions(pdev, 10101 pci_select_bars(pdev, IORESOURCE_MEM)); 10102 10103 pci_disable_pcie_error_reporting(pdev); 10104 pci_disable_device(pdev); 10105 } 10106 10107 /** 10108 * i40e_pci_error_detected - warning that something funky happened in PCI land 10109 * @pdev: PCI device information struct 10110 * 10111 * Called to warn that something happened and the error handling steps 10112 * are in progress. Allows the driver to quiesce things, be ready for 10113 * remediation. 10114 **/ 10115 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 10116 enum pci_channel_state error) 10117 { 10118 struct i40e_pf *pf = pci_get_drvdata(pdev); 10119 10120 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 10121 10122 /* shutdown all operations */ 10123 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 10124 rtnl_lock(); 10125 i40e_prep_for_reset(pf); 10126 rtnl_unlock(); 10127 } 10128 10129 /* Request a slot reset */ 10130 return PCI_ERS_RESULT_NEED_RESET; 10131 } 10132 10133 /** 10134 * i40e_pci_error_slot_reset - a PCI slot reset just happened 10135 * @pdev: PCI device information struct 10136 * 10137 * Called to find if the driver can work with the device now that 10138 * the pci slot has been reset. If a basic connection seems good 10139 * (registers are readable and have sane content) then return a 10140 * happy little PCI_ERS_RESULT_xxx. 10141 **/ 10142 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 10143 { 10144 struct i40e_pf *pf = pci_get_drvdata(pdev); 10145 pci_ers_result_t result; 10146 int err; 10147 u32 reg; 10148 10149 dev_info(&pdev->dev, "%s\n", __func__); 10150 if (pci_enable_device_mem(pdev)) { 10151 dev_info(&pdev->dev, 10152 "Cannot re-enable PCI device after reset.\n"); 10153 result = PCI_ERS_RESULT_DISCONNECT; 10154 } else { 10155 pci_set_master(pdev); 10156 pci_restore_state(pdev); 10157 pci_save_state(pdev); 10158 pci_wake_from_d3(pdev, false); 10159 10160 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 10161 if (reg == 0) 10162 result = PCI_ERS_RESULT_RECOVERED; 10163 else 10164 result = PCI_ERS_RESULT_DISCONNECT; 10165 } 10166 10167 err = pci_cleanup_aer_uncorrect_error_status(pdev); 10168 if (err) { 10169 dev_info(&pdev->dev, 10170 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 10171 err); 10172 /* non-fatal, continue */ 10173 } 10174 10175 return result; 10176 } 10177 10178 /** 10179 * i40e_pci_error_resume - restart operations after PCI error recovery 10180 * @pdev: PCI device information struct 10181 * 10182 * Called to allow the driver to bring things back up after PCI error 10183 * and/or reset recovery has finished. 10184 **/ 10185 static void i40e_pci_error_resume(struct pci_dev *pdev) 10186 { 10187 struct i40e_pf *pf = pci_get_drvdata(pdev); 10188 10189 dev_info(&pdev->dev, "%s\n", __func__); 10190 if (test_bit(__I40E_SUSPENDED, &pf->state)) 10191 return; 10192 10193 rtnl_lock(); 10194 i40e_handle_reset_warning(pf); 10195 rtnl_lock(); 10196 } 10197 10198 /** 10199 * i40e_shutdown - PCI callback for shutting down 10200 * @pdev: PCI device information struct 10201 **/ 10202 static void i40e_shutdown(struct pci_dev *pdev) 10203 { 10204 struct i40e_pf *pf = pci_get_drvdata(pdev); 10205 struct i40e_hw *hw = &pf->hw; 10206 10207 set_bit(__I40E_SUSPENDED, &pf->state); 10208 set_bit(__I40E_DOWN, &pf->state); 10209 rtnl_lock(); 10210 i40e_prep_for_reset(pf); 10211 rtnl_unlock(); 10212 10213 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10214 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10215 10216 i40e_clear_interrupt_scheme(pf); 10217 10218 if (system_state == SYSTEM_POWER_OFF) { 10219 pci_wake_from_d3(pdev, pf->wol_en); 10220 pci_set_power_state(pdev, PCI_D3hot); 10221 } 10222 } 10223 10224 #ifdef CONFIG_PM 10225 /** 10226 * i40e_suspend - PCI callback for moving to D3 10227 * @pdev: PCI device information struct 10228 **/ 10229 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 10230 { 10231 struct i40e_pf *pf = pci_get_drvdata(pdev); 10232 struct i40e_hw *hw = &pf->hw; 10233 10234 set_bit(__I40E_SUSPENDED, &pf->state); 10235 set_bit(__I40E_DOWN, &pf->state); 10236 del_timer_sync(&pf->service_timer); 10237 cancel_work_sync(&pf->service_task); 10238 i40e_fdir_teardown(pf); 10239 10240 rtnl_lock(); 10241 i40e_prep_for_reset(pf); 10242 rtnl_unlock(); 10243 10244 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 10245 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 10246 10247 pci_wake_from_d3(pdev, pf->wol_en); 10248 pci_set_power_state(pdev, PCI_D3hot); 10249 10250 return 0; 10251 } 10252 10253 /** 10254 * i40e_resume - PCI callback for waking up from D3 10255 * @pdev: PCI device information struct 10256 **/ 10257 static int i40e_resume(struct pci_dev *pdev) 10258 { 10259 struct i40e_pf *pf = pci_get_drvdata(pdev); 10260 u32 err; 10261 10262 pci_set_power_state(pdev, PCI_D0); 10263 pci_restore_state(pdev); 10264 /* pci_restore_state() clears dev->state_saves, so 10265 * call pci_save_state() again to restore it. 10266 */ 10267 pci_save_state(pdev); 10268 10269 err = pci_enable_device_mem(pdev); 10270 if (err) { 10271 dev_err(&pdev->dev, 10272 "%s: Cannot enable PCI device from suspend\n", 10273 __func__); 10274 return err; 10275 } 10276 pci_set_master(pdev); 10277 10278 /* no wakeup events while running */ 10279 pci_wake_from_d3(pdev, false); 10280 10281 /* handling the reset will rebuild the device state */ 10282 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 10283 clear_bit(__I40E_DOWN, &pf->state); 10284 rtnl_lock(); 10285 i40e_reset_and_rebuild(pf, false); 10286 rtnl_unlock(); 10287 } 10288 10289 return 0; 10290 } 10291 10292 #endif 10293 static const struct pci_error_handlers i40e_err_handler = { 10294 .error_detected = i40e_pci_error_detected, 10295 .slot_reset = i40e_pci_error_slot_reset, 10296 .resume = i40e_pci_error_resume, 10297 }; 10298 10299 static struct pci_driver i40e_driver = { 10300 .name = i40e_driver_name, 10301 .id_table = i40e_pci_tbl, 10302 .probe = i40e_probe, 10303 .remove = i40e_remove, 10304 #ifdef CONFIG_PM 10305 .suspend = i40e_suspend, 10306 .resume = i40e_resume, 10307 #endif 10308 .shutdown = i40e_shutdown, 10309 .err_handler = &i40e_err_handler, 10310 .sriov_configure = i40e_pci_sriov_configure, 10311 }; 10312 10313 /** 10314 * i40e_init_module - Driver registration routine 10315 * 10316 * i40e_init_module is the first routine called when the driver is 10317 * loaded. All it does is register with the PCI subsystem. 10318 **/ 10319 static int __init i40e_init_module(void) 10320 { 10321 pr_info("%s: %s - version %s\n", i40e_driver_name, 10322 i40e_driver_string, i40e_driver_version_str); 10323 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 10324 10325 i40e_dbg_init(); 10326 return pci_register_driver(&i40e_driver); 10327 } 10328 module_init(i40e_init_module); 10329 10330 /** 10331 * i40e_exit_module - Driver exit cleanup routine 10332 * 10333 * i40e_exit_module is called just before the driver is removed 10334 * from memory. 10335 **/ 10336 static void __exit i40e_exit_module(void) 10337 { 10338 pci_unregister_driver(&i40e_driver); 10339 i40e_dbg_exit(); 10340 } 10341 module_exit(i40e_exit_module); 10342