1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #include <linux/etherdevice.h> 28 #include <linux/of_net.h> 29 #include <linux/pci.h> 30 31 /* Local includes */ 32 #include "i40e.h" 33 #include "i40e_diag.h" 34 #if IS_ENABLED(CONFIG_VXLAN) 35 #include <net/vxlan.h> 36 #endif 37 #if IS_ENABLED(CONFIG_GENEVE) 38 #include <net/geneve.h> 39 #endif 40 41 const char i40e_driver_name[] = "i40e"; 42 static const char i40e_driver_string[] = 43 "Intel(R) Ethernet Connection XL710 Network Driver"; 44 45 #define DRV_KERN "-k" 46 47 #define DRV_VERSION_MAJOR 1 48 #define DRV_VERSION_MINOR 5 49 #define DRV_VERSION_BUILD 16 50 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 51 __stringify(DRV_VERSION_MINOR) "." \ 52 __stringify(DRV_VERSION_BUILD) DRV_KERN 53 const char i40e_driver_version_str[] = DRV_VERSION; 54 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 55 56 /* a bit of forward declarations */ 57 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 58 static void i40e_handle_reset_warning(struct i40e_pf *pf); 59 static int i40e_add_vsi(struct i40e_vsi *vsi); 60 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 61 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 62 static int i40e_setup_misc_vector(struct i40e_pf *pf); 63 static void i40e_determine_queue_usage(struct i40e_pf *pf); 64 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 65 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 66 u16 rss_table_size, u16 rss_size); 67 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 68 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 69 70 /* i40e_pci_tbl - PCI Device ID Table 71 * 72 * Last entry must be all 0s 73 * 74 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 75 * Class, Class Mask, private data (not used) } 76 */ 77 static const struct pci_device_id i40e_pci_tbl[] = { 78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, 87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0}, 89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0}, 90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, 91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, 92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, 93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0}, 94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_I_X722), 0}, 95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0}, 97 /* required last entry */ 98 {0, } 99 }; 100 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 101 102 #define I40E_MAX_VF_COUNT 128 103 static int debug = -1; 104 module_param(debug, int, 0); 105 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 106 107 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 108 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 109 MODULE_LICENSE("GPL"); 110 MODULE_VERSION(DRV_VERSION); 111 112 static struct workqueue_struct *i40e_wq; 113 114 /** 115 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 116 * @hw: pointer to the HW structure 117 * @mem: ptr to mem struct to fill out 118 * @size: size of memory requested 119 * @alignment: what to align the allocation to 120 **/ 121 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 122 u64 size, u32 alignment) 123 { 124 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 125 126 mem->size = ALIGN(size, alignment); 127 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 128 &mem->pa, GFP_KERNEL); 129 if (!mem->va) 130 return -ENOMEM; 131 132 return 0; 133 } 134 135 /** 136 * i40e_free_dma_mem_d - OS specific memory free for shared code 137 * @hw: pointer to the HW structure 138 * @mem: ptr to mem struct to free 139 **/ 140 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 141 { 142 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 143 144 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 145 mem->va = NULL; 146 mem->pa = 0; 147 mem->size = 0; 148 149 return 0; 150 } 151 152 /** 153 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 154 * @hw: pointer to the HW structure 155 * @mem: ptr to mem struct to fill out 156 * @size: size of memory requested 157 **/ 158 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 159 u32 size) 160 { 161 mem->size = size; 162 mem->va = kzalloc(size, GFP_KERNEL); 163 164 if (!mem->va) 165 return -ENOMEM; 166 167 return 0; 168 } 169 170 /** 171 * i40e_free_virt_mem_d - OS specific memory free for shared code 172 * @hw: pointer to the HW structure 173 * @mem: ptr to mem struct to free 174 **/ 175 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 176 { 177 /* it's ok to kfree a NULL pointer */ 178 kfree(mem->va); 179 mem->va = NULL; 180 mem->size = 0; 181 182 return 0; 183 } 184 185 /** 186 * i40e_get_lump - find a lump of free generic resource 187 * @pf: board private structure 188 * @pile: the pile of resource to search 189 * @needed: the number of items needed 190 * @id: an owner id to stick on the items assigned 191 * 192 * Returns the base item index of the lump, or negative for error 193 * 194 * The search_hint trick and lack of advanced fit-finding only work 195 * because we're highly likely to have all the same size lump requests. 196 * Linear search time and any fragmentation should be minimal. 197 **/ 198 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 199 u16 needed, u16 id) 200 { 201 int ret = -ENOMEM; 202 int i, j; 203 204 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 205 dev_info(&pf->pdev->dev, 206 "param err: pile=%p needed=%d id=0x%04x\n", 207 pile, needed, id); 208 return -EINVAL; 209 } 210 211 /* start the linear search with an imperfect hint */ 212 i = pile->search_hint; 213 while (i < pile->num_entries) { 214 /* skip already allocated entries */ 215 if (pile->list[i] & I40E_PILE_VALID_BIT) { 216 i++; 217 continue; 218 } 219 220 /* do we have enough in this lump? */ 221 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 222 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 223 break; 224 } 225 226 if (j == needed) { 227 /* there was enough, so assign it to the requestor */ 228 for (j = 0; j < needed; j++) 229 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 230 ret = i; 231 pile->search_hint = i + j; 232 break; 233 } 234 235 /* not enough, so skip over it and continue looking */ 236 i += j; 237 } 238 239 return ret; 240 } 241 242 /** 243 * i40e_put_lump - return a lump of generic resource 244 * @pile: the pile of resource to search 245 * @index: the base item index 246 * @id: the owner id of the items assigned 247 * 248 * Returns the count of items in the lump 249 **/ 250 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 251 { 252 int valid_id = (id | I40E_PILE_VALID_BIT); 253 int count = 0; 254 int i; 255 256 if (!pile || index >= pile->num_entries) 257 return -EINVAL; 258 259 for (i = index; 260 i < pile->num_entries && pile->list[i] == valid_id; 261 i++) { 262 pile->list[i] = 0; 263 count++; 264 } 265 266 if (count && index < pile->search_hint) 267 pile->search_hint = index; 268 269 return count; 270 } 271 272 /** 273 * i40e_find_vsi_from_id - searches for the vsi with the given id 274 * @pf - the pf structure to search for the vsi 275 * @id - id of the vsi it is searching for 276 **/ 277 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 278 { 279 int i; 280 281 for (i = 0; i < pf->num_alloc_vsi; i++) 282 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 283 return pf->vsi[i]; 284 285 return NULL; 286 } 287 288 /** 289 * i40e_service_event_schedule - Schedule the service task to wake up 290 * @pf: board private structure 291 * 292 * If not already scheduled, this puts the task into the work queue 293 **/ 294 void i40e_service_event_schedule(struct i40e_pf *pf) 295 { 296 if (!test_bit(__I40E_DOWN, &pf->state) && 297 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 298 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 299 queue_work(i40e_wq, &pf->service_task); 300 } 301 302 /** 303 * i40e_tx_timeout - Respond to a Tx Hang 304 * @netdev: network interface device structure 305 * 306 * If any port has noticed a Tx timeout, it is likely that the whole 307 * device is munged, not just the one netdev port, so go for the full 308 * reset. 309 **/ 310 #ifdef I40E_FCOE 311 void i40e_tx_timeout(struct net_device *netdev) 312 #else 313 static void i40e_tx_timeout(struct net_device *netdev) 314 #endif 315 { 316 struct i40e_netdev_priv *np = netdev_priv(netdev); 317 struct i40e_vsi *vsi = np->vsi; 318 struct i40e_pf *pf = vsi->back; 319 struct i40e_ring *tx_ring = NULL; 320 unsigned int i, hung_queue = 0; 321 u32 head, val; 322 323 pf->tx_timeout_count++; 324 325 /* find the stopped queue the same way the stack does */ 326 for (i = 0; i < netdev->num_tx_queues; i++) { 327 struct netdev_queue *q; 328 unsigned long trans_start; 329 330 q = netdev_get_tx_queue(netdev, i); 331 trans_start = q->trans_start; 332 if (netif_xmit_stopped(q) && 333 time_after(jiffies, 334 (trans_start + netdev->watchdog_timeo))) { 335 hung_queue = i; 336 break; 337 } 338 } 339 340 if (i == netdev->num_tx_queues) { 341 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n"); 342 } else { 343 /* now that we have an index, find the tx_ring struct */ 344 for (i = 0; i < vsi->num_queue_pairs; i++) { 345 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 346 if (hung_queue == 347 vsi->tx_rings[i]->queue_index) { 348 tx_ring = vsi->tx_rings[i]; 349 break; 350 } 351 } 352 } 353 } 354 355 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 356 pf->tx_timeout_recovery_level = 1; /* reset after some time */ 357 else if (time_before(jiffies, 358 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo))) 359 return; /* don't do any new action before the next timeout */ 360 361 if (tx_ring) { 362 head = i40e_get_head(tx_ring); 363 /* Read interrupt register */ 364 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 365 val = rd32(&pf->hw, 366 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 367 tx_ring->vsi->base_vector - 1)); 368 else 369 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 370 371 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n", 372 vsi->seid, hung_queue, tx_ring->next_to_clean, 373 head, tx_ring->next_to_use, 374 readl(tx_ring->tail), val); 375 } 376 377 pf->tx_timeout_last_recovery = jiffies; 378 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n", 379 pf->tx_timeout_recovery_level, hung_queue); 380 381 switch (pf->tx_timeout_recovery_level) { 382 case 1: 383 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 384 break; 385 case 2: 386 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 387 break; 388 case 3: 389 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 390 break; 391 default: 392 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 393 break; 394 } 395 396 i40e_service_event_schedule(pf); 397 pf->tx_timeout_recovery_level++; 398 } 399 400 /** 401 * i40e_get_vsi_stats_struct - Get System Network Statistics 402 * @vsi: the VSI we care about 403 * 404 * Returns the address of the device statistics structure. 405 * The statistics are actually updated from the service task. 406 **/ 407 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 408 { 409 return &vsi->net_stats; 410 } 411 412 /** 413 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 414 * @netdev: network interface device structure 415 * 416 * Returns the address of the device statistics structure. 417 * The statistics are actually updated from the service task. 418 **/ 419 #ifdef I40E_FCOE 420 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 421 struct net_device *netdev, 422 struct rtnl_link_stats64 *stats) 423 #else 424 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( 425 struct net_device *netdev, 426 struct rtnl_link_stats64 *stats) 427 #endif 428 { 429 struct i40e_netdev_priv *np = netdev_priv(netdev); 430 struct i40e_ring *tx_ring, *rx_ring; 431 struct i40e_vsi *vsi = np->vsi; 432 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 433 int i; 434 435 if (test_bit(__I40E_DOWN, &vsi->state)) 436 return stats; 437 438 if (!vsi->tx_rings) 439 return stats; 440 441 rcu_read_lock(); 442 for (i = 0; i < vsi->num_queue_pairs; i++) { 443 u64 bytes, packets; 444 unsigned int start; 445 446 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 447 if (!tx_ring) 448 continue; 449 450 do { 451 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 452 packets = tx_ring->stats.packets; 453 bytes = tx_ring->stats.bytes; 454 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 455 456 stats->tx_packets += packets; 457 stats->tx_bytes += bytes; 458 rx_ring = &tx_ring[1]; 459 460 do { 461 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 462 packets = rx_ring->stats.packets; 463 bytes = rx_ring->stats.bytes; 464 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 465 466 stats->rx_packets += packets; 467 stats->rx_bytes += bytes; 468 } 469 rcu_read_unlock(); 470 471 /* following stats updated by i40e_watchdog_subtask() */ 472 stats->multicast = vsi_stats->multicast; 473 stats->tx_errors = vsi_stats->tx_errors; 474 stats->tx_dropped = vsi_stats->tx_dropped; 475 stats->rx_errors = vsi_stats->rx_errors; 476 stats->rx_dropped = vsi_stats->rx_dropped; 477 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 478 stats->rx_length_errors = vsi_stats->rx_length_errors; 479 480 return stats; 481 } 482 483 /** 484 * i40e_vsi_reset_stats - Resets all stats of the given vsi 485 * @vsi: the VSI to have its stats reset 486 **/ 487 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 488 { 489 struct rtnl_link_stats64 *ns; 490 int i; 491 492 if (!vsi) 493 return; 494 495 ns = i40e_get_vsi_stats_struct(vsi); 496 memset(ns, 0, sizeof(*ns)); 497 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 498 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 499 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 500 if (vsi->rx_rings && vsi->rx_rings[0]) { 501 for (i = 0; i < vsi->num_queue_pairs; i++) { 502 memset(&vsi->rx_rings[i]->stats, 0, 503 sizeof(vsi->rx_rings[i]->stats)); 504 memset(&vsi->rx_rings[i]->rx_stats, 0, 505 sizeof(vsi->rx_rings[i]->rx_stats)); 506 memset(&vsi->tx_rings[i]->stats, 0, 507 sizeof(vsi->tx_rings[i]->stats)); 508 memset(&vsi->tx_rings[i]->tx_stats, 0, 509 sizeof(vsi->tx_rings[i]->tx_stats)); 510 } 511 } 512 vsi->stat_offsets_loaded = false; 513 } 514 515 /** 516 * i40e_pf_reset_stats - Reset all of the stats for the given PF 517 * @pf: the PF to be reset 518 **/ 519 void i40e_pf_reset_stats(struct i40e_pf *pf) 520 { 521 int i; 522 523 memset(&pf->stats, 0, sizeof(pf->stats)); 524 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 525 pf->stat_offsets_loaded = false; 526 527 for (i = 0; i < I40E_MAX_VEB; i++) { 528 if (pf->veb[i]) { 529 memset(&pf->veb[i]->stats, 0, 530 sizeof(pf->veb[i]->stats)); 531 memset(&pf->veb[i]->stats_offsets, 0, 532 sizeof(pf->veb[i]->stats_offsets)); 533 pf->veb[i]->stat_offsets_loaded = false; 534 } 535 } 536 } 537 538 /** 539 * i40e_stat_update48 - read and update a 48 bit stat from the chip 540 * @hw: ptr to the hardware info 541 * @hireg: the high 32 bit reg to read 542 * @loreg: the low 32 bit reg to read 543 * @offset_loaded: has the initial offset been loaded yet 544 * @offset: ptr to current offset value 545 * @stat: ptr to the stat 546 * 547 * Since the device stats are not reset at PFReset, they likely will not 548 * be zeroed when the driver starts. We'll save the first values read 549 * and use them as offsets to be subtracted from the raw values in order 550 * to report stats that count from zero. In the process, we also manage 551 * the potential roll-over. 552 **/ 553 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 554 bool offset_loaded, u64 *offset, u64 *stat) 555 { 556 u64 new_data; 557 558 if (hw->device_id == I40E_DEV_ID_QEMU) { 559 new_data = rd32(hw, loreg); 560 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 561 } else { 562 new_data = rd64(hw, loreg); 563 } 564 if (!offset_loaded) 565 *offset = new_data; 566 if (likely(new_data >= *offset)) 567 *stat = new_data - *offset; 568 else 569 *stat = (new_data + BIT_ULL(48)) - *offset; 570 *stat &= 0xFFFFFFFFFFFFULL; 571 } 572 573 /** 574 * i40e_stat_update32 - read and update a 32 bit stat from the chip 575 * @hw: ptr to the hardware info 576 * @reg: the hw reg to read 577 * @offset_loaded: has the initial offset been loaded yet 578 * @offset: ptr to current offset value 579 * @stat: ptr to the stat 580 **/ 581 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 582 bool offset_loaded, u64 *offset, u64 *stat) 583 { 584 u32 new_data; 585 586 new_data = rd32(hw, reg); 587 if (!offset_loaded) 588 *offset = new_data; 589 if (likely(new_data >= *offset)) 590 *stat = (u32)(new_data - *offset); 591 else 592 *stat = (u32)((new_data + BIT_ULL(32)) - *offset); 593 } 594 595 /** 596 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 597 * @vsi: the VSI to be updated 598 **/ 599 void i40e_update_eth_stats(struct i40e_vsi *vsi) 600 { 601 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 602 struct i40e_pf *pf = vsi->back; 603 struct i40e_hw *hw = &pf->hw; 604 struct i40e_eth_stats *oes; 605 struct i40e_eth_stats *es; /* device's eth stats */ 606 607 es = &vsi->eth_stats; 608 oes = &vsi->eth_stats_offsets; 609 610 /* Gather up the stats that the hw collects */ 611 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 612 vsi->stat_offsets_loaded, 613 &oes->tx_errors, &es->tx_errors); 614 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 615 vsi->stat_offsets_loaded, 616 &oes->rx_discards, &es->rx_discards); 617 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 618 vsi->stat_offsets_loaded, 619 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 621 vsi->stat_offsets_loaded, 622 &oes->tx_errors, &es->tx_errors); 623 624 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 625 I40E_GLV_GORCL(stat_idx), 626 vsi->stat_offsets_loaded, 627 &oes->rx_bytes, &es->rx_bytes); 628 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 629 I40E_GLV_UPRCL(stat_idx), 630 vsi->stat_offsets_loaded, 631 &oes->rx_unicast, &es->rx_unicast); 632 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 633 I40E_GLV_MPRCL(stat_idx), 634 vsi->stat_offsets_loaded, 635 &oes->rx_multicast, &es->rx_multicast); 636 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 637 I40E_GLV_BPRCL(stat_idx), 638 vsi->stat_offsets_loaded, 639 &oes->rx_broadcast, &es->rx_broadcast); 640 641 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 642 I40E_GLV_GOTCL(stat_idx), 643 vsi->stat_offsets_loaded, 644 &oes->tx_bytes, &es->tx_bytes); 645 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 646 I40E_GLV_UPTCL(stat_idx), 647 vsi->stat_offsets_loaded, 648 &oes->tx_unicast, &es->tx_unicast); 649 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 650 I40E_GLV_MPTCL(stat_idx), 651 vsi->stat_offsets_loaded, 652 &oes->tx_multicast, &es->tx_multicast); 653 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 654 I40E_GLV_BPTCL(stat_idx), 655 vsi->stat_offsets_loaded, 656 &oes->tx_broadcast, &es->tx_broadcast); 657 vsi->stat_offsets_loaded = true; 658 } 659 660 /** 661 * i40e_update_veb_stats - Update Switch component statistics 662 * @veb: the VEB being updated 663 **/ 664 static void i40e_update_veb_stats(struct i40e_veb *veb) 665 { 666 struct i40e_pf *pf = veb->pf; 667 struct i40e_hw *hw = &pf->hw; 668 struct i40e_eth_stats *oes; 669 struct i40e_eth_stats *es; /* device's eth stats */ 670 struct i40e_veb_tc_stats *veb_oes; 671 struct i40e_veb_tc_stats *veb_es; 672 int i, idx = 0; 673 674 idx = veb->stats_idx; 675 es = &veb->stats; 676 oes = &veb->stats_offsets; 677 veb_es = &veb->tc_stats; 678 veb_oes = &veb->tc_stats_offsets; 679 680 /* Gather up the stats that the hw collects */ 681 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 682 veb->stat_offsets_loaded, 683 &oes->tx_discards, &es->tx_discards); 684 if (hw->revision_id > 0) 685 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 686 veb->stat_offsets_loaded, 687 &oes->rx_unknown_protocol, 688 &es->rx_unknown_protocol); 689 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 690 veb->stat_offsets_loaded, 691 &oes->rx_bytes, &es->rx_bytes); 692 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 693 veb->stat_offsets_loaded, 694 &oes->rx_unicast, &es->rx_unicast); 695 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 696 veb->stat_offsets_loaded, 697 &oes->rx_multicast, &es->rx_multicast); 698 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 699 veb->stat_offsets_loaded, 700 &oes->rx_broadcast, &es->rx_broadcast); 701 702 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 703 veb->stat_offsets_loaded, 704 &oes->tx_bytes, &es->tx_bytes); 705 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 706 veb->stat_offsets_loaded, 707 &oes->tx_unicast, &es->tx_unicast); 708 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 709 veb->stat_offsets_loaded, 710 &oes->tx_multicast, &es->tx_multicast); 711 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 712 veb->stat_offsets_loaded, 713 &oes->tx_broadcast, &es->tx_broadcast); 714 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 715 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx), 716 I40E_GLVEBTC_RPCL(i, idx), 717 veb->stat_offsets_loaded, 718 &veb_oes->tc_rx_packets[i], 719 &veb_es->tc_rx_packets[i]); 720 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx), 721 I40E_GLVEBTC_RBCL(i, idx), 722 veb->stat_offsets_loaded, 723 &veb_oes->tc_rx_bytes[i], 724 &veb_es->tc_rx_bytes[i]); 725 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx), 726 I40E_GLVEBTC_TPCL(i, idx), 727 veb->stat_offsets_loaded, 728 &veb_oes->tc_tx_packets[i], 729 &veb_es->tc_tx_packets[i]); 730 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx), 731 I40E_GLVEBTC_TBCL(i, idx), 732 veb->stat_offsets_loaded, 733 &veb_oes->tc_tx_bytes[i], 734 &veb_es->tc_tx_bytes[i]); 735 } 736 veb->stat_offsets_loaded = true; 737 } 738 739 #ifdef I40E_FCOE 740 /** 741 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters. 742 * @vsi: the VSI that is capable of doing FCoE 743 **/ 744 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi) 745 { 746 struct i40e_pf *pf = vsi->back; 747 struct i40e_hw *hw = &pf->hw; 748 struct i40e_fcoe_stats *ofs; 749 struct i40e_fcoe_stats *fs; /* device's eth stats */ 750 int idx; 751 752 if (vsi->type != I40E_VSI_FCOE) 753 return; 754 755 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET; 756 fs = &vsi->fcoe_stats; 757 ofs = &vsi->fcoe_stats_offsets; 758 759 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx), 760 vsi->fcoe_stat_offsets_loaded, 761 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets); 762 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx), 763 vsi->fcoe_stat_offsets_loaded, 764 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords); 765 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx), 766 vsi->fcoe_stat_offsets_loaded, 767 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped); 768 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx), 769 vsi->fcoe_stat_offsets_loaded, 770 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets); 771 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx), 772 vsi->fcoe_stat_offsets_loaded, 773 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords); 774 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx), 775 vsi->fcoe_stat_offsets_loaded, 776 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc); 777 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx), 778 vsi->fcoe_stat_offsets_loaded, 779 &ofs->fcoe_last_error, &fs->fcoe_last_error); 780 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx), 781 vsi->fcoe_stat_offsets_loaded, 782 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count); 783 784 vsi->fcoe_stat_offsets_loaded = true; 785 } 786 787 #endif 788 /** 789 * i40e_update_vsi_stats - Update the vsi statistics counters. 790 * @vsi: the VSI to be updated 791 * 792 * There are a few instances where we store the same stat in a 793 * couple of different structs. This is partly because we have 794 * the netdev stats that need to be filled out, which is slightly 795 * different from the "eth_stats" defined by the chip and used in 796 * VF communications. We sort it out here. 797 **/ 798 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 799 { 800 struct i40e_pf *pf = vsi->back; 801 struct rtnl_link_stats64 *ons; 802 struct rtnl_link_stats64 *ns; /* netdev stats */ 803 struct i40e_eth_stats *oes; 804 struct i40e_eth_stats *es; /* device's eth stats */ 805 u32 tx_restart, tx_busy; 806 u64 tx_lost_interrupt; 807 struct i40e_ring *p; 808 u32 rx_page, rx_buf; 809 u64 bytes, packets; 810 unsigned int start; 811 u64 tx_linearize; 812 u64 tx_force_wb; 813 u64 rx_p, rx_b; 814 u64 tx_p, tx_b; 815 u16 q; 816 817 if (test_bit(__I40E_DOWN, &vsi->state) || 818 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 819 return; 820 821 ns = i40e_get_vsi_stats_struct(vsi); 822 ons = &vsi->net_stats_offsets; 823 es = &vsi->eth_stats; 824 oes = &vsi->eth_stats_offsets; 825 826 /* Gather up the netdev and vsi stats that the driver collects 827 * on the fly during packet processing 828 */ 829 rx_b = rx_p = 0; 830 tx_b = tx_p = 0; 831 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0; 832 tx_lost_interrupt = 0; 833 rx_page = 0; 834 rx_buf = 0; 835 rcu_read_lock(); 836 for (q = 0; q < vsi->num_queue_pairs; q++) { 837 /* locate Tx ring */ 838 p = ACCESS_ONCE(vsi->tx_rings[q]); 839 840 do { 841 start = u64_stats_fetch_begin_irq(&p->syncp); 842 packets = p->stats.packets; 843 bytes = p->stats.bytes; 844 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 845 tx_b += bytes; 846 tx_p += packets; 847 tx_restart += p->tx_stats.restart_queue; 848 tx_busy += p->tx_stats.tx_busy; 849 tx_linearize += p->tx_stats.tx_linearize; 850 tx_force_wb += p->tx_stats.tx_force_wb; 851 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt; 852 853 /* Rx queue is part of the same block as Tx queue */ 854 p = &p[1]; 855 do { 856 start = u64_stats_fetch_begin_irq(&p->syncp); 857 packets = p->stats.packets; 858 bytes = p->stats.bytes; 859 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 860 rx_b += bytes; 861 rx_p += packets; 862 rx_buf += p->rx_stats.alloc_buff_failed; 863 rx_page += p->rx_stats.alloc_page_failed; 864 } 865 rcu_read_unlock(); 866 vsi->tx_restart = tx_restart; 867 vsi->tx_busy = tx_busy; 868 vsi->tx_linearize = tx_linearize; 869 vsi->tx_force_wb = tx_force_wb; 870 vsi->tx_lost_interrupt = tx_lost_interrupt; 871 vsi->rx_page_failed = rx_page; 872 vsi->rx_buf_failed = rx_buf; 873 874 ns->rx_packets = rx_p; 875 ns->rx_bytes = rx_b; 876 ns->tx_packets = tx_p; 877 ns->tx_bytes = tx_b; 878 879 /* update netdev stats from eth stats */ 880 i40e_update_eth_stats(vsi); 881 ons->tx_errors = oes->tx_errors; 882 ns->tx_errors = es->tx_errors; 883 ons->multicast = oes->rx_multicast; 884 ns->multicast = es->rx_multicast; 885 ons->rx_dropped = oes->rx_discards; 886 ns->rx_dropped = es->rx_discards; 887 ons->tx_dropped = oes->tx_discards; 888 ns->tx_dropped = es->tx_discards; 889 890 /* pull in a couple PF stats if this is the main vsi */ 891 if (vsi == pf->vsi[pf->lan_vsi]) { 892 ns->rx_crc_errors = pf->stats.crc_errors; 893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 894 ns->rx_length_errors = pf->stats.rx_length_errors; 895 } 896 } 897 898 /** 899 * i40e_update_pf_stats - Update the PF statistics counters. 900 * @pf: the PF to be updated 901 **/ 902 static void i40e_update_pf_stats(struct i40e_pf *pf) 903 { 904 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 905 struct i40e_hw_port_stats *nsd = &pf->stats; 906 struct i40e_hw *hw = &pf->hw; 907 u32 val; 908 int i; 909 910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 911 I40E_GLPRT_GORCL(hw->port), 912 pf->stat_offsets_loaded, 913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 915 I40E_GLPRT_GOTCL(hw->port), 916 pf->stat_offsets_loaded, 917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 919 pf->stat_offsets_loaded, 920 &osd->eth.rx_discards, 921 &nsd->eth.rx_discards); 922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 923 I40E_GLPRT_UPRCL(hw->port), 924 pf->stat_offsets_loaded, 925 &osd->eth.rx_unicast, 926 &nsd->eth.rx_unicast); 927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 928 I40E_GLPRT_MPRCL(hw->port), 929 pf->stat_offsets_loaded, 930 &osd->eth.rx_multicast, 931 &nsd->eth.rx_multicast); 932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 933 I40E_GLPRT_BPRCL(hw->port), 934 pf->stat_offsets_loaded, 935 &osd->eth.rx_broadcast, 936 &nsd->eth.rx_broadcast); 937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 938 I40E_GLPRT_UPTCL(hw->port), 939 pf->stat_offsets_loaded, 940 &osd->eth.tx_unicast, 941 &nsd->eth.tx_unicast); 942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 943 I40E_GLPRT_MPTCL(hw->port), 944 pf->stat_offsets_loaded, 945 &osd->eth.tx_multicast, 946 &nsd->eth.tx_multicast); 947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 948 I40E_GLPRT_BPTCL(hw->port), 949 pf->stat_offsets_loaded, 950 &osd->eth.tx_broadcast, 951 &nsd->eth.tx_broadcast); 952 953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 954 pf->stat_offsets_loaded, 955 &osd->tx_dropped_link_down, 956 &nsd->tx_dropped_link_down); 957 958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 959 pf->stat_offsets_loaded, 960 &osd->crc_errors, &nsd->crc_errors); 961 962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 963 pf->stat_offsets_loaded, 964 &osd->illegal_bytes, &nsd->illegal_bytes); 965 966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 967 pf->stat_offsets_loaded, 968 &osd->mac_local_faults, 969 &nsd->mac_local_faults); 970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 971 pf->stat_offsets_loaded, 972 &osd->mac_remote_faults, 973 &nsd->mac_remote_faults); 974 975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 976 pf->stat_offsets_loaded, 977 &osd->rx_length_errors, 978 &nsd->rx_length_errors); 979 980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 981 pf->stat_offsets_loaded, 982 &osd->link_xon_rx, &nsd->link_xon_rx); 983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 984 pf->stat_offsets_loaded, 985 &osd->link_xon_tx, &nsd->link_xon_tx); 986 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 987 pf->stat_offsets_loaded, 988 &osd->link_xoff_rx, &nsd->link_xoff_rx); 989 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 990 pf->stat_offsets_loaded, 991 &osd->link_xoff_tx, &nsd->link_xoff_tx); 992 993 for (i = 0; i < 8; i++) { 994 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 995 pf->stat_offsets_loaded, 996 &osd->priority_xoff_rx[i], 997 &nsd->priority_xoff_rx[i]); 998 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 999 pf->stat_offsets_loaded, 1000 &osd->priority_xon_rx[i], 1001 &nsd->priority_xon_rx[i]); 1002 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 1003 pf->stat_offsets_loaded, 1004 &osd->priority_xon_tx[i], 1005 &nsd->priority_xon_tx[i]); 1006 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 1007 pf->stat_offsets_loaded, 1008 &osd->priority_xoff_tx[i], 1009 &nsd->priority_xoff_tx[i]); 1010 i40e_stat_update32(hw, 1011 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 1012 pf->stat_offsets_loaded, 1013 &osd->priority_xon_2_xoff[i], 1014 &nsd->priority_xon_2_xoff[i]); 1015 } 1016 1017 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 1018 I40E_GLPRT_PRC64L(hw->port), 1019 pf->stat_offsets_loaded, 1020 &osd->rx_size_64, &nsd->rx_size_64); 1021 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 1022 I40E_GLPRT_PRC127L(hw->port), 1023 pf->stat_offsets_loaded, 1024 &osd->rx_size_127, &nsd->rx_size_127); 1025 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 1026 I40E_GLPRT_PRC255L(hw->port), 1027 pf->stat_offsets_loaded, 1028 &osd->rx_size_255, &nsd->rx_size_255); 1029 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 1030 I40E_GLPRT_PRC511L(hw->port), 1031 pf->stat_offsets_loaded, 1032 &osd->rx_size_511, &nsd->rx_size_511); 1033 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1034 I40E_GLPRT_PRC1023L(hw->port), 1035 pf->stat_offsets_loaded, 1036 &osd->rx_size_1023, &nsd->rx_size_1023); 1037 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1038 I40E_GLPRT_PRC1522L(hw->port), 1039 pf->stat_offsets_loaded, 1040 &osd->rx_size_1522, &nsd->rx_size_1522); 1041 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1042 I40E_GLPRT_PRC9522L(hw->port), 1043 pf->stat_offsets_loaded, 1044 &osd->rx_size_big, &nsd->rx_size_big); 1045 1046 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1047 I40E_GLPRT_PTC64L(hw->port), 1048 pf->stat_offsets_loaded, 1049 &osd->tx_size_64, &nsd->tx_size_64); 1050 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1051 I40E_GLPRT_PTC127L(hw->port), 1052 pf->stat_offsets_loaded, 1053 &osd->tx_size_127, &nsd->tx_size_127); 1054 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1055 I40E_GLPRT_PTC255L(hw->port), 1056 pf->stat_offsets_loaded, 1057 &osd->tx_size_255, &nsd->tx_size_255); 1058 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1059 I40E_GLPRT_PTC511L(hw->port), 1060 pf->stat_offsets_loaded, 1061 &osd->tx_size_511, &nsd->tx_size_511); 1062 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1063 I40E_GLPRT_PTC1023L(hw->port), 1064 pf->stat_offsets_loaded, 1065 &osd->tx_size_1023, &nsd->tx_size_1023); 1066 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1067 I40E_GLPRT_PTC1522L(hw->port), 1068 pf->stat_offsets_loaded, 1069 &osd->tx_size_1522, &nsd->tx_size_1522); 1070 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1071 I40E_GLPRT_PTC9522L(hw->port), 1072 pf->stat_offsets_loaded, 1073 &osd->tx_size_big, &nsd->tx_size_big); 1074 1075 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1076 pf->stat_offsets_loaded, 1077 &osd->rx_undersize, &nsd->rx_undersize); 1078 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1079 pf->stat_offsets_loaded, 1080 &osd->rx_fragments, &nsd->rx_fragments); 1081 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1082 pf->stat_offsets_loaded, 1083 &osd->rx_oversize, &nsd->rx_oversize); 1084 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1085 pf->stat_offsets_loaded, 1086 &osd->rx_jabber, &nsd->rx_jabber); 1087 1088 /* FDIR stats */ 1089 i40e_stat_update32(hw, 1090 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)), 1091 pf->stat_offsets_loaded, 1092 &osd->fd_atr_match, &nsd->fd_atr_match); 1093 i40e_stat_update32(hw, 1094 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)), 1095 pf->stat_offsets_loaded, 1096 &osd->fd_sb_match, &nsd->fd_sb_match); 1097 i40e_stat_update32(hw, 1098 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)), 1099 pf->stat_offsets_loaded, 1100 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match); 1101 1102 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1103 nsd->tx_lpi_status = 1104 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1105 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1106 nsd->rx_lpi_status = 1107 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1108 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1109 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1110 pf->stat_offsets_loaded, 1111 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1112 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1113 pf->stat_offsets_loaded, 1114 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1115 1116 if (pf->flags & I40E_FLAG_FD_SB_ENABLED && 1117 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) 1118 nsd->fd_sb_status = true; 1119 else 1120 nsd->fd_sb_status = false; 1121 1122 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && 1123 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 1124 nsd->fd_atr_status = true; 1125 else 1126 nsd->fd_atr_status = false; 1127 1128 pf->stat_offsets_loaded = true; 1129 } 1130 1131 /** 1132 * i40e_update_stats - Update the various statistics counters. 1133 * @vsi: the VSI to be updated 1134 * 1135 * Update the various stats for this VSI and its related entities. 1136 **/ 1137 void i40e_update_stats(struct i40e_vsi *vsi) 1138 { 1139 struct i40e_pf *pf = vsi->back; 1140 1141 if (vsi == pf->vsi[pf->lan_vsi]) 1142 i40e_update_pf_stats(pf); 1143 1144 i40e_update_vsi_stats(vsi); 1145 #ifdef I40E_FCOE 1146 i40e_update_fcoe_stats(vsi); 1147 #endif 1148 } 1149 1150 /** 1151 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1152 * @vsi: the VSI to be searched 1153 * @macaddr: the MAC address 1154 * @vlan: the vlan 1155 * @is_vf: make sure its a VF filter, else doesn't matter 1156 * @is_netdev: make sure its a netdev filter, else doesn't matter 1157 * 1158 * Returns ptr to the filter object or NULL 1159 **/ 1160 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1161 u8 *macaddr, s16 vlan, 1162 bool is_vf, bool is_netdev) 1163 { 1164 struct i40e_mac_filter *f; 1165 1166 if (!vsi || !macaddr) 1167 return NULL; 1168 1169 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1170 if ((ether_addr_equal(macaddr, f->macaddr)) && 1171 (vlan == f->vlan) && 1172 (!is_vf || f->is_vf) && 1173 (!is_netdev || f->is_netdev)) 1174 return f; 1175 } 1176 return NULL; 1177 } 1178 1179 /** 1180 * i40e_find_mac - Find a mac addr in the macvlan filters list 1181 * @vsi: the VSI to be searched 1182 * @macaddr: the MAC address we are searching for 1183 * @is_vf: make sure its a VF filter, else doesn't matter 1184 * @is_netdev: make sure its a netdev filter, else doesn't matter 1185 * 1186 * Returns the first filter with the provided MAC address or NULL if 1187 * MAC address was not found 1188 **/ 1189 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, 1190 bool is_vf, bool is_netdev) 1191 { 1192 struct i40e_mac_filter *f; 1193 1194 if (!vsi || !macaddr) 1195 return NULL; 1196 1197 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1198 if ((ether_addr_equal(macaddr, f->macaddr)) && 1199 (!is_vf || f->is_vf) && 1200 (!is_netdev || f->is_netdev)) 1201 return f; 1202 } 1203 return NULL; 1204 } 1205 1206 /** 1207 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1208 * @vsi: the VSI to be searched 1209 * 1210 * Returns true if VSI is in vlan mode or false otherwise 1211 **/ 1212 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1213 { 1214 struct i40e_mac_filter *f; 1215 1216 /* Only -1 for all the filters denotes not in vlan mode 1217 * so we have to go through all the list in order to make sure 1218 */ 1219 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1220 if (f->vlan >= 0 || vsi->info.pvid) 1221 return true; 1222 } 1223 1224 return false; 1225 } 1226 1227 /** 1228 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans 1229 * @vsi: the VSI to be searched 1230 * @macaddr: the mac address to be filtered 1231 * @is_vf: true if it is a VF 1232 * @is_netdev: true if it is a netdev 1233 * 1234 * Goes through all the macvlan filters and adds a 1235 * macvlan filter for each unique vlan that already exists 1236 * 1237 * Returns first filter found on success, else NULL 1238 **/ 1239 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1240 bool is_vf, bool is_netdev) 1241 { 1242 struct i40e_mac_filter *f; 1243 1244 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1245 if (vsi->info.pvid) 1246 f->vlan = le16_to_cpu(vsi->info.pvid); 1247 if (!i40e_find_filter(vsi, macaddr, f->vlan, 1248 is_vf, is_netdev)) { 1249 if (!i40e_add_filter(vsi, macaddr, f->vlan, 1250 is_vf, is_netdev)) 1251 return NULL; 1252 } 1253 } 1254 1255 return list_first_entry_or_null(&vsi->mac_filter_list, 1256 struct i40e_mac_filter, list); 1257 } 1258 1259 /** 1260 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS 1261 * @vsi: the VSI to be searched 1262 * @macaddr: the mac address to be removed 1263 * @is_vf: true if it is a VF 1264 * @is_netdev: true if it is a netdev 1265 * 1266 * Removes a given MAC address from a VSI, regardless of VLAN 1267 * 1268 * Returns 0 for success, or error 1269 **/ 1270 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr, 1271 bool is_vf, bool is_netdev) 1272 { 1273 struct i40e_mac_filter *f = NULL; 1274 int changed = 0; 1275 1276 WARN(!spin_is_locked(&vsi->mac_filter_list_lock), 1277 "Missing mac_filter_list_lock\n"); 1278 list_for_each_entry(f, &vsi->mac_filter_list, list) { 1279 if ((ether_addr_equal(macaddr, f->macaddr)) && 1280 (is_vf == f->is_vf) && 1281 (is_netdev == f->is_netdev)) { 1282 f->counter--; 1283 f->changed = true; 1284 changed = 1; 1285 } 1286 } 1287 if (changed) { 1288 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1289 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1290 return 0; 1291 } 1292 return -ENOENT; 1293 } 1294 1295 /** 1296 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1297 * @vsi: the PF Main VSI - inappropriate for any other VSI 1298 * @macaddr: the MAC address 1299 * 1300 * Some older firmware configurations set up a default promiscuous VLAN 1301 * filter that needs to be removed. 1302 **/ 1303 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1304 { 1305 struct i40e_aqc_remove_macvlan_element_data element; 1306 struct i40e_pf *pf = vsi->back; 1307 i40e_status ret; 1308 1309 /* Only appropriate for the PF main VSI */ 1310 if (vsi->type != I40E_VSI_MAIN) 1311 return -EINVAL; 1312 1313 memset(&element, 0, sizeof(element)); 1314 ether_addr_copy(element.mac_addr, macaddr); 1315 element.vlan_tag = 0; 1316 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1317 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1318 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1319 if (ret) 1320 return -ENOENT; 1321 1322 return 0; 1323 } 1324 1325 /** 1326 * i40e_add_filter - Add a mac/vlan filter to the VSI 1327 * @vsi: the VSI to be searched 1328 * @macaddr: the MAC address 1329 * @vlan: the vlan 1330 * @is_vf: make sure its a VF filter, else doesn't matter 1331 * @is_netdev: make sure its a netdev filter, else doesn't matter 1332 * 1333 * Returns ptr to the filter object or NULL when no memory available. 1334 * 1335 * NOTE: This function is expected to be called with mac_filter_list_lock 1336 * being held. 1337 **/ 1338 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1339 u8 *macaddr, s16 vlan, 1340 bool is_vf, bool is_netdev) 1341 { 1342 struct i40e_mac_filter *f; 1343 1344 if (!vsi || !macaddr) 1345 return NULL; 1346 1347 /* Do not allow broadcast filter to be added since broadcast filter 1348 * is added as part of add VSI for any newly created VSI except 1349 * FDIR VSI 1350 */ 1351 if (is_broadcast_ether_addr(macaddr)) 1352 return NULL; 1353 1354 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1355 if (!f) { 1356 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1357 if (!f) 1358 goto add_filter_out; 1359 1360 ether_addr_copy(f->macaddr, macaddr); 1361 f->vlan = vlan; 1362 f->changed = true; 1363 1364 INIT_LIST_HEAD(&f->list); 1365 list_add_tail(&f->list, &vsi->mac_filter_list); 1366 } 1367 1368 /* increment counter and add a new flag if needed */ 1369 if (is_vf) { 1370 if (!f->is_vf) { 1371 f->is_vf = true; 1372 f->counter++; 1373 } 1374 } else if (is_netdev) { 1375 if (!f->is_netdev) { 1376 f->is_netdev = true; 1377 f->counter++; 1378 } 1379 } else { 1380 f->counter++; 1381 } 1382 1383 /* changed tells sync_filters_subtask to 1384 * push the filter down to the firmware 1385 */ 1386 if (f->changed) { 1387 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1388 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1389 } 1390 1391 add_filter_out: 1392 return f; 1393 } 1394 1395 /** 1396 * i40e_del_filter - Remove a mac/vlan filter from the VSI 1397 * @vsi: the VSI to be searched 1398 * @macaddr: the MAC address 1399 * @vlan: the vlan 1400 * @is_vf: make sure it's a VF filter, else doesn't matter 1401 * @is_netdev: make sure it's a netdev filter, else doesn't matter 1402 * 1403 * NOTE: This function is expected to be called with mac_filter_list_lock 1404 * being held. 1405 **/ 1406 void i40e_del_filter(struct i40e_vsi *vsi, 1407 u8 *macaddr, s16 vlan, 1408 bool is_vf, bool is_netdev) 1409 { 1410 struct i40e_mac_filter *f; 1411 1412 if (!vsi || !macaddr) 1413 return; 1414 1415 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); 1416 if (!f || f->counter == 0) 1417 return; 1418 1419 if (is_vf) { 1420 if (f->is_vf) { 1421 f->is_vf = false; 1422 f->counter--; 1423 } 1424 } else if (is_netdev) { 1425 if (f->is_netdev) { 1426 f->is_netdev = false; 1427 f->counter--; 1428 } 1429 } else { 1430 /* make sure we don't remove a filter in use by VF or netdev */ 1431 int min_f = 0; 1432 1433 min_f += (f->is_vf ? 1 : 0); 1434 min_f += (f->is_netdev ? 1 : 0); 1435 1436 if (f->counter > min_f) 1437 f->counter--; 1438 } 1439 1440 /* counter == 0 tells sync_filters_subtask to 1441 * remove the filter from the firmware's list 1442 */ 1443 if (f->counter == 0) { 1444 f->changed = true; 1445 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1446 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1447 } 1448 } 1449 1450 /** 1451 * i40e_set_mac - NDO callback to set mac address 1452 * @netdev: network interface device structure 1453 * @p: pointer to an address structure 1454 * 1455 * Returns 0 on success, negative on failure 1456 **/ 1457 #ifdef I40E_FCOE 1458 int i40e_set_mac(struct net_device *netdev, void *p) 1459 #else 1460 static int i40e_set_mac(struct net_device *netdev, void *p) 1461 #endif 1462 { 1463 struct i40e_netdev_priv *np = netdev_priv(netdev); 1464 struct i40e_vsi *vsi = np->vsi; 1465 struct i40e_pf *pf = vsi->back; 1466 struct i40e_hw *hw = &pf->hw; 1467 struct sockaddr *addr = p; 1468 struct i40e_mac_filter *f; 1469 1470 if (!is_valid_ether_addr(addr->sa_data)) 1471 return -EADDRNOTAVAIL; 1472 1473 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1474 netdev_info(netdev, "already using mac address %pM\n", 1475 addr->sa_data); 1476 return 0; 1477 } 1478 1479 if (test_bit(__I40E_DOWN, &vsi->back->state) || 1480 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 1481 return -EADDRNOTAVAIL; 1482 1483 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1484 netdev_info(netdev, "returning to hw mac address %pM\n", 1485 hw->mac.addr); 1486 else 1487 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1488 1489 if (vsi->type == I40E_VSI_MAIN) { 1490 i40e_status ret; 1491 1492 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1493 I40E_AQC_WRITE_TYPE_LAA_WOL, 1494 addr->sa_data, NULL); 1495 if (ret) { 1496 netdev_info(netdev, 1497 "Addr change for Main VSI failed: %d\n", 1498 ret); 1499 return -EADDRNOTAVAIL; 1500 } 1501 } 1502 1503 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) { 1504 struct i40e_aqc_remove_macvlan_element_data element; 1505 1506 memset(&element, 0, sizeof(element)); 1507 ether_addr_copy(element.mac_addr, netdev->dev_addr); 1508 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1509 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1510 } else { 1511 spin_lock_bh(&vsi->mac_filter_list_lock); 1512 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 1513 false, false); 1514 spin_unlock_bh(&vsi->mac_filter_list_lock); 1515 } 1516 1517 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) { 1518 struct i40e_aqc_add_macvlan_element_data element; 1519 1520 memset(&element, 0, sizeof(element)); 1521 ether_addr_copy(element.mac_addr, hw->mac.addr); 1522 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 1523 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1524 } else { 1525 spin_lock_bh(&vsi->mac_filter_list_lock); 1526 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, 1527 false, false); 1528 if (f) 1529 f->is_laa = true; 1530 spin_unlock_bh(&vsi->mac_filter_list_lock); 1531 } 1532 1533 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1534 1535 /* schedule our worker thread which will take care of 1536 * applying the new filter changes 1537 */ 1538 i40e_service_event_schedule(vsi->back); 1539 return 0; 1540 } 1541 1542 /** 1543 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1544 * @vsi: the VSI being setup 1545 * @ctxt: VSI context structure 1546 * @enabled_tc: Enabled TCs bitmap 1547 * @is_add: True if called before Add VSI 1548 * 1549 * Setup VSI queue mapping for enabled traffic classes. 1550 **/ 1551 #ifdef I40E_FCOE 1552 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1553 struct i40e_vsi_context *ctxt, 1554 u8 enabled_tc, 1555 bool is_add) 1556 #else 1557 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1558 struct i40e_vsi_context *ctxt, 1559 u8 enabled_tc, 1560 bool is_add) 1561 #endif 1562 { 1563 struct i40e_pf *pf = vsi->back; 1564 u16 sections = 0; 1565 u8 netdev_tc = 0; 1566 u16 numtc = 0; 1567 u16 qcount; 1568 u8 offset; 1569 u16 qmap; 1570 int i; 1571 u16 num_tc_qps = 0; 1572 1573 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1574 offset = 0; 1575 1576 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1577 /* Find numtc from enabled TC bitmap */ 1578 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1579 if (enabled_tc & BIT(i)) /* TC is enabled */ 1580 numtc++; 1581 } 1582 if (!numtc) { 1583 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1584 numtc = 1; 1585 } 1586 } else { 1587 /* At least TC0 is enabled in case of non-DCB case */ 1588 numtc = 1; 1589 } 1590 1591 vsi->tc_config.numtc = numtc; 1592 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1593 /* Number of queues per enabled TC */ 1594 /* In MFP case we can have a much lower count of MSIx 1595 * vectors available and so we need to lower the used 1596 * q count. 1597 */ 1598 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1599 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix); 1600 else 1601 qcount = vsi->alloc_queue_pairs; 1602 num_tc_qps = qcount / numtc; 1603 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf)); 1604 1605 /* Setup queue offset/count for all TCs for given VSI */ 1606 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1607 /* See if the given TC is enabled for the given VSI */ 1608 if (vsi->tc_config.enabled_tc & BIT(i)) { 1609 /* TC is enabled */ 1610 int pow, num_qps; 1611 1612 switch (vsi->type) { 1613 case I40E_VSI_MAIN: 1614 qcount = min_t(int, pf->alloc_rss_size, 1615 num_tc_qps); 1616 break; 1617 #ifdef I40E_FCOE 1618 case I40E_VSI_FCOE: 1619 qcount = num_tc_qps; 1620 break; 1621 #endif 1622 case I40E_VSI_FDIR: 1623 case I40E_VSI_SRIOV: 1624 case I40E_VSI_VMDQ2: 1625 default: 1626 qcount = num_tc_qps; 1627 WARN_ON(i != 0); 1628 break; 1629 } 1630 vsi->tc_config.tc_info[i].qoffset = offset; 1631 vsi->tc_config.tc_info[i].qcount = qcount; 1632 1633 /* find the next higher power-of-2 of num queue pairs */ 1634 num_qps = qcount; 1635 pow = 0; 1636 while (num_qps && (BIT_ULL(pow) < qcount)) { 1637 pow++; 1638 num_qps >>= 1; 1639 } 1640 1641 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1642 qmap = 1643 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1644 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1645 1646 offset += qcount; 1647 } else { 1648 /* TC is not enabled so set the offset to 1649 * default queue and allocate one queue 1650 * for the given TC. 1651 */ 1652 vsi->tc_config.tc_info[i].qoffset = 0; 1653 vsi->tc_config.tc_info[i].qcount = 1; 1654 vsi->tc_config.tc_info[i].netdev_tc = 0; 1655 1656 qmap = 0; 1657 } 1658 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1659 } 1660 1661 /* Set actual Tx/Rx queue pairs */ 1662 vsi->num_queue_pairs = offset; 1663 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1664 if (vsi->req_queue_pairs > 0) 1665 vsi->num_queue_pairs = vsi->req_queue_pairs; 1666 else if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1667 vsi->num_queue_pairs = pf->num_lan_msix; 1668 } 1669 1670 /* Scheduler section valid can only be set for ADD VSI */ 1671 if (is_add) { 1672 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1673 1674 ctxt->info.up_enable_bits = enabled_tc; 1675 } 1676 if (vsi->type == I40E_VSI_SRIOV) { 1677 ctxt->info.mapping_flags |= 1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1679 for (i = 0; i < vsi->num_queue_pairs; i++) 1680 ctxt->info.queue_mapping[i] = 1681 cpu_to_le16(vsi->base_queue + i); 1682 } else { 1683 ctxt->info.mapping_flags |= 1684 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1685 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1686 } 1687 ctxt->info.valid_sections |= cpu_to_le16(sections); 1688 } 1689 1690 /** 1691 * i40e_set_rx_mode - NDO callback to set the netdev filters 1692 * @netdev: network interface device structure 1693 **/ 1694 #ifdef I40E_FCOE 1695 void i40e_set_rx_mode(struct net_device *netdev) 1696 #else 1697 static void i40e_set_rx_mode(struct net_device *netdev) 1698 #endif 1699 { 1700 struct i40e_netdev_priv *np = netdev_priv(netdev); 1701 struct i40e_mac_filter *f, *ftmp; 1702 struct i40e_vsi *vsi = np->vsi; 1703 struct netdev_hw_addr *uca; 1704 struct netdev_hw_addr *mca; 1705 struct netdev_hw_addr *ha; 1706 1707 spin_lock_bh(&vsi->mac_filter_list_lock); 1708 1709 /* add addr if not already in the filter list */ 1710 netdev_for_each_uc_addr(uca, netdev) { 1711 if (!i40e_find_mac(vsi, uca->addr, false, true)) { 1712 if (i40e_is_vsi_in_vlan(vsi)) 1713 i40e_put_mac_in_vlan(vsi, uca->addr, 1714 false, true); 1715 else 1716 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, 1717 false, true); 1718 } 1719 } 1720 1721 netdev_for_each_mc_addr(mca, netdev) { 1722 if (!i40e_find_mac(vsi, mca->addr, false, true)) { 1723 if (i40e_is_vsi_in_vlan(vsi)) 1724 i40e_put_mac_in_vlan(vsi, mca->addr, 1725 false, true); 1726 else 1727 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, 1728 false, true); 1729 } 1730 } 1731 1732 /* remove filter if not in netdev list */ 1733 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1734 1735 if (!f->is_netdev) 1736 continue; 1737 1738 netdev_for_each_mc_addr(mca, netdev) 1739 if (ether_addr_equal(mca->addr, f->macaddr)) 1740 goto bottom_of_search_loop; 1741 1742 netdev_for_each_uc_addr(uca, netdev) 1743 if (ether_addr_equal(uca->addr, f->macaddr)) 1744 goto bottom_of_search_loop; 1745 1746 for_each_dev_addr(netdev, ha) 1747 if (ether_addr_equal(ha->addr, f->macaddr)) 1748 goto bottom_of_search_loop; 1749 1750 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */ 1751 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true); 1752 1753 bottom_of_search_loop: 1754 continue; 1755 } 1756 spin_unlock_bh(&vsi->mac_filter_list_lock); 1757 1758 /* check for other flag changes */ 1759 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1761 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1762 } 1763 1764 /* schedule our worker thread which will take care of 1765 * applying the new filter changes 1766 */ 1767 i40e_service_event_schedule(vsi->back); 1768 } 1769 1770 /** 1771 * i40e_mac_filter_entry_clone - Clones a MAC filter entry 1772 * @src: source MAC filter entry to be clones 1773 * 1774 * Returns the pointer to newly cloned MAC filter entry or NULL 1775 * in case of error 1776 **/ 1777 static struct i40e_mac_filter *i40e_mac_filter_entry_clone( 1778 struct i40e_mac_filter *src) 1779 { 1780 struct i40e_mac_filter *f; 1781 1782 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1783 if (!f) 1784 return NULL; 1785 *f = *src; 1786 1787 INIT_LIST_HEAD(&f->list); 1788 1789 return f; 1790 } 1791 1792 /** 1793 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries 1794 * @vsi: pointer to vsi struct 1795 * @from: Pointer to list which contains MAC filter entries - changes to 1796 * those entries needs to be undone. 1797 * 1798 * MAC filter entries from list were slated to be removed from device. 1799 **/ 1800 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi, 1801 struct list_head *from) 1802 { 1803 struct i40e_mac_filter *f, *ftmp; 1804 1805 list_for_each_entry_safe(f, ftmp, from, list) { 1806 f->changed = true; 1807 /* Move the element back into MAC filter list*/ 1808 list_move_tail(&f->list, &vsi->mac_filter_list); 1809 } 1810 } 1811 1812 /** 1813 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries 1814 * @vsi: pointer to vsi struct 1815 * 1816 * MAC filter entries from list were slated to be added from device. 1817 **/ 1818 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi) 1819 { 1820 struct i40e_mac_filter *f, *ftmp; 1821 1822 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1823 if (!f->changed && f->counter) 1824 f->changed = true; 1825 } 1826 } 1827 1828 /** 1829 * i40e_cleanup_add_list - Deletes the element from add list and release 1830 * memory 1831 * @add_list: Pointer to list which contains MAC filter entries 1832 **/ 1833 static void i40e_cleanup_add_list(struct list_head *add_list) 1834 { 1835 struct i40e_mac_filter *f, *ftmp; 1836 1837 list_for_each_entry_safe(f, ftmp, add_list, list) { 1838 list_del(&f->list); 1839 kfree(f); 1840 } 1841 } 1842 1843 /** 1844 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 1845 * @vsi: ptr to the VSI 1846 * 1847 * Push any outstanding VSI filter changes through the AdminQ. 1848 * 1849 * Returns 0 or error value 1850 **/ 1851 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 1852 { 1853 struct list_head tmp_del_list, tmp_add_list; 1854 struct i40e_mac_filter *f, *ftmp, *fclone; 1855 bool promisc_forced_on = false; 1856 bool add_happened = false; 1857 int filter_list_len = 0; 1858 u32 changed_flags = 0; 1859 i40e_status aq_ret = 0; 1860 bool err_cond = false; 1861 int retval = 0; 1862 struct i40e_pf *pf; 1863 int num_add = 0; 1864 int num_del = 0; 1865 int aq_err = 0; 1866 u16 cmd_flags; 1867 1868 /* empty array typed pointers, kcalloc later */ 1869 struct i40e_aqc_add_macvlan_element_data *add_list; 1870 struct i40e_aqc_remove_macvlan_element_data *del_list; 1871 1872 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) 1873 usleep_range(1000, 2000); 1874 pf = vsi->back; 1875 1876 if (vsi->netdev) { 1877 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 1878 vsi->current_netdev_flags = vsi->netdev->flags; 1879 } 1880 1881 INIT_LIST_HEAD(&tmp_del_list); 1882 INIT_LIST_HEAD(&tmp_add_list); 1883 1884 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 1885 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 1886 1887 spin_lock_bh(&vsi->mac_filter_list_lock); 1888 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1889 if (!f->changed) 1890 continue; 1891 1892 if (f->counter != 0) 1893 continue; 1894 f->changed = false; 1895 1896 /* Move the element into temporary del_list */ 1897 list_move_tail(&f->list, &tmp_del_list); 1898 } 1899 1900 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 1901 if (!f->changed) 1902 continue; 1903 1904 if (f->counter == 0) 1905 continue; 1906 f->changed = false; 1907 1908 /* Clone MAC filter entry and add into temporary list */ 1909 fclone = i40e_mac_filter_entry_clone(f); 1910 if (!fclone) { 1911 err_cond = true; 1912 break; 1913 } 1914 list_add_tail(&fclone->list, &tmp_add_list); 1915 } 1916 1917 /* if failed to clone MAC filter entry - undo */ 1918 if (err_cond) { 1919 i40e_undo_del_filter_entries(vsi, &tmp_del_list); 1920 i40e_undo_add_filter_entries(vsi); 1921 } 1922 spin_unlock_bh(&vsi->mac_filter_list_lock); 1923 1924 if (err_cond) { 1925 i40e_cleanup_add_list(&tmp_add_list); 1926 retval = -ENOMEM; 1927 goto out; 1928 } 1929 } 1930 1931 /* Now process 'del_list' outside the lock */ 1932 if (!list_empty(&tmp_del_list)) { 1933 int del_list_size; 1934 1935 filter_list_len = pf->hw.aq.asq_buf_size / 1936 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1937 del_list_size = filter_list_len * 1938 sizeof(struct i40e_aqc_remove_macvlan_element_data); 1939 del_list = kzalloc(del_list_size, GFP_ATOMIC); 1940 if (!del_list) { 1941 i40e_cleanup_add_list(&tmp_add_list); 1942 1943 /* Undo VSI's MAC filter entry element updates */ 1944 spin_lock_bh(&vsi->mac_filter_list_lock); 1945 i40e_undo_del_filter_entries(vsi, &tmp_del_list); 1946 i40e_undo_add_filter_entries(vsi); 1947 spin_unlock_bh(&vsi->mac_filter_list_lock); 1948 retval = -ENOMEM; 1949 goto out; 1950 } 1951 1952 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) { 1953 cmd_flags = 0; 1954 1955 /* add to delete list */ 1956 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 1957 del_list[num_del].vlan_tag = 1958 cpu_to_le16((u16)(f->vlan == 1959 I40E_VLAN_ANY ? 0 : f->vlan)); 1960 1961 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1962 del_list[num_del].flags = cmd_flags; 1963 num_del++; 1964 1965 /* flush a full buffer */ 1966 if (num_del == filter_list_len) { 1967 aq_ret = i40e_aq_remove_macvlan(&pf->hw, 1968 vsi->seid, 1969 del_list, 1970 num_del, 1971 NULL); 1972 aq_err = pf->hw.aq.asq_last_status; 1973 num_del = 0; 1974 memset(del_list, 0, del_list_size); 1975 1976 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) { 1977 retval = -EIO; 1978 dev_err(&pf->pdev->dev, 1979 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n", 1980 i40e_stat_str(&pf->hw, aq_ret), 1981 i40e_aq_str(&pf->hw, aq_err)); 1982 } 1983 } 1984 /* Release memory for MAC filter entries which were 1985 * synced up with HW. 1986 */ 1987 list_del(&f->list); 1988 kfree(f); 1989 } 1990 1991 if (num_del) { 1992 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, 1993 del_list, num_del, 1994 NULL); 1995 aq_err = pf->hw.aq.asq_last_status; 1996 num_del = 0; 1997 1998 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) 1999 dev_info(&pf->pdev->dev, 2000 "ignoring delete macvlan error, err %s aq_err %s\n", 2001 i40e_stat_str(&pf->hw, aq_ret), 2002 i40e_aq_str(&pf->hw, aq_err)); 2003 } 2004 2005 kfree(del_list); 2006 del_list = NULL; 2007 } 2008 2009 if (!list_empty(&tmp_add_list)) { 2010 int add_list_size; 2011 2012 /* do all the adds now */ 2013 filter_list_len = pf->hw.aq.asq_buf_size / 2014 sizeof(struct i40e_aqc_add_macvlan_element_data), 2015 add_list_size = filter_list_len * 2016 sizeof(struct i40e_aqc_add_macvlan_element_data); 2017 add_list = kzalloc(add_list_size, GFP_ATOMIC); 2018 if (!add_list) { 2019 /* Purge element from temporary lists */ 2020 i40e_cleanup_add_list(&tmp_add_list); 2021 2022 /* Undo add filter entries from VSI MAC filter list */ 2023 spin_lock_bh(&vsi->mac_filter_list_lock); 2024 i40e_undo_add_filter_entries(vsi); 2025 spin_unlock_bh(&vsi->mac_filter_list_lock); 2026 retval = -ENOMEM; 2027 goto out; 2028 } 2029 2030 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) { 2031 2032 add_happened = true; 2033 cmd_flags = 0; 2034 2035 /* add to add array */ 2036 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); 2037 add_list[num_add].vlan_tag = 2038 cpu_to_le16( 2039 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 2040 add_list[num_add].queue_number = 0; 2041 2042 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 2043 add_list[num_add].flags = cpu_to_le16(cmd_flags); 2044 num_add++; 2045 2046 /* flush a full buffer */ 2047 if (num_add == filter_list_len) { 2048 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 2049 add_list, num_add, 2050 NULL); 2051 aq_err = pf->hw.aq.asq_last_status; 2052 num_add = 0; 2053 2054 if (aq_ret) 2055 break; 2056 memset(add_list, 0, add_list_size); 2057 } 2058 /* Entries from tmp_add_list were cloned from MAC 2059 * filter list, hence clean those cloned entries 2060 */ 2061 list_del(&f->list); 2062 kfree(f); 2063 } 2064 2065 if (num_add) { 2066 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, 2067 add_list, num_add, NULL); 2068 aq_err = pf->hw.aq.asq_last_status; 2069 num_add = 0; 2070 } 2071 kfree(add_list); 2072 add_list = NULL; 2073 2074 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) { 2075 retval = i40e_aq_rc_to_posix(aq_ret, aq_err); 2076 dev_info(&pf->pdev->dev, 2077 "add filter failed, err %s aq_err %s\n", 2078 i40e_stat_str(&pf->hw, aq_ret), 2079 i40e_aq_str(&pf->hw, aq_err)); 2080 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && 2081 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 2082 &vsi->state)) { 2083 promisc_forced_on = true; 2084 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, 2085 &vsi->state); 2086 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); 2087 } 2088 } 2089 } 2090 2091 /* if the VF is not trusted do not do promisc */ 2092 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) { 2093 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state); 2094 goto out; 2095 } 2096 2097 /* check for changes in promiscuous modes */ 2098 if (changed_flags & IFF_ALLMULTI) { 2099 bool cur_multipromisc; 2100 2101 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 2102 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 2103 vsi->seid, 2104 cur_multipromisc, 2105 NULL); 2106 if (aq_ret) { 2107 retval = i40e_aq_rc_to_posix(aq_ret, 2108 pf->hw.aq.asq_last_status); 2109 dev_info(&pf->pdev->dev, 2110 "set multi promisc failed, err %s aq_err %s\n", 2111 i40e_stat_str(&pf->hw, aq_ret), 2112 i40e_aq_str(&pf->hw, 2113 pf->hw.aq.asq_last_status)); 2114 } 2115 } 2116 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { 2117 bool cur_promisc; 2118 2119 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 2120 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, 2121 &vsi->state)); 2122 if ((vsi->type == I40E_VSI_MAIN) && 2123 (pf->lan_veb != I40E_NO_VEB) && 2124 !(pf->flags & I40E_FLAG_MFP_ENABLED)) { 2125 /* set defport ON for Main VSI instead of true promisc 2126 * this way we will get all unicast/multicast and VLAN 2127 * promisc behavior but will not get VF or VMDq traffic 2128 * replicated on the Main VSI. 2129 */ 2130 if (pf->cur_promisc != cur_promisc) { 2131 pf->cur_promisc = cur_promisc; 2132 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 2133 } 2134 } else { 2135 aq_ret = i40e_aq_set_vsi_unicast_promiscuous( 2136 &vsi->back->hw, 2137 vsi->seid, 2138 cur_promisc, NULL, 2139 true); 2140 if (aq_ret) { 2141 retval = 2142 i40e_aq_rc_to_posix(aq_ret, 2143 pf->hw.aq.asq_last_status); 2144 dev_info(&pf->pdev->dev, 2145 "set unicast promisc failed, err %d, aq_err %d\n", 2146 aq_ret, pf->hw.aq.asq_last_status); 2147 } 2148 aq_ret = i40e_aq_set_vsi_multicast_promiscuous( 2149 &vsi->back->hw, 2150 vsi->seid, 2151 cur_promisc, NULL); 2152 if (aq_ret) { 2153 retval = 2154 i40e_aq_rc_to_posix(aq_ret, 2155 pf->hw.aq.asq_last_status); 2156 dev_info(&pf->pdev->dev, 2157 "set multicast promisc failed, err %d, aq_err %d\n", 2158 aq_ret, pf->hw.aq.asq_last_status); 2159 } 2160 } 2161 } 2162 out: 2163 /* if something went wrong then set the changed flag so we try again */ 2164 if (retval) 2165 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2166 2167 clear_bit(__I40E_CONFIG_BUSY, &vsi->state); 2168 return retval; 2169 } 2170 2171 /** 2172 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 2173 * @pf: board private structure 2174 **/ 2175 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 2176 { 2177 int v; 2178 2179 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 2180 return; 2181 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 2182 2183 for (v = 0; v < pf->num_alloc_vsi; v++) { 2184 if (pf->vsi[v] && 2185 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { 2186 int ret = i40e_sync_vsi_filters(pf->vsi[v]); 2187 2188 if (ret) { 2189 /* come back and try again later */ 2190 pf->flags |= I40E_FLAG_FILTER_SYNC; 2191 break; 2192 } 2193 } 2194 } 2195 } 2196 2197 /** 2198 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 2199 * @netdev: network interface device structure 2200 * @new_mtu: new value for maximum frame size 2201 * 2202 * Returns 0 on success, negative on failure 2203 **/ 2204 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 2205 { 2206 struct i40e_netdev_priv *np = netdev_priv(netdev); 2207 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 2208 struct i40e_vsi *vsi = np->vsi; 2209 2210 /* MTU < 68 is an error and causes problems on some kernels */ 2211 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) 2212 return -EINVAL; 2213 2214 netdev_info(netdev, "changing MTU from %d to %d\n", 2215 netdev->mtu, new_mtu); 2216 netdev->mtu = new_mtu; 2217 if (netif_running(netdev)) 2218 i40e_vsi_reinit_locked(vsi); 2219 i40e_notify_client_of_l2_param_changes(vsi); 2220 return 0; 2221 } 2222 2223 /** 2224 * i40e_ioctl - Access the hwtstamp interface 2225 * @netdev: network interface device structure 2226 * @ifr: interface request data 2227 * @cmd: ioctl command 2228 **/ 2229 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2230 { 2231 struct i40e_netdev_priv *np = netdev_priv(netdev); 2232 struct i40e_pf *pf = np->vsi->back; 2233 2234 switch (cmd) { 2235 case SIOCGHWTSTAMP: 2236 return i40e_ptp_get_ts_config(pf, ifr); 2237 case SIOCSHWTSTAMP: 2238 return i40e_ptp_set_ts_config(pf, ifr); 2239 default: 2240 return -EOPNOTSUPP; 2241 } 2242 } 2243 2244 /** 2245 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 2246 * @vsi: the vsi being adjusted 2247 **/ 2248 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 2249 { 2250 struct i40e_vsi_context ctxt; 2251 i40e_status ret; 2252 2253 if ((vsi->info.valid_sections & 2254 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2255 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 2256 return; /* already enabled */ 2257 2258 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2259 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2260 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 2261 2262 ctxt.seid = vsi->seid; 2263 ctxt.info = vsi->info; 2264 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2265 if (ret) { 2266 dev_info(&vsi->back->pdev->dev, 2267 "update vlan stripping failed, err %s aq_err %s\n", 2268 i40e_stat_str(&vsi->back->hw, ret), 2269 i40e_aq_str(&vsi->back->hw, 2270 vsi->back->hw.aq.asq_last_status)); 2271 } 2272 } 2273 2274 /** 2275 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2276 * @vsi: the vsi being adjusted 2277 **/ 2278 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2279 { 2280 struct i40e_vsi_context ctxt; 2281 i40e_status ret; 2282 2283 if ((vsi->info.valid_sections & 2284 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2285 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2286 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2287 return; /* already disabled */ 2288 2289 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2290 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2291 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2292 2293 ctxt.seid = vsi->seid; 2294 ctxt.info = vsi->info; 2295 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2296 if (ret) { 2297 dev_info(&vsi->back->pdev->dev, 2298 "update vlan stripping failed, err %s aq_err %s\n", 2299 i40e_stat_str(&vsi->back->hw, ret), 2300 i40e_aq_str(&vsi->back->hw, 2301 vsi->back->hw.aq.asq_last_status)); 2302 } 2303 } 2304 2305 /** 2306 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2307 * @netdev: network interface to be adjusted 2308 * @features: netdev features to test if VLAN offload is enabled or not 2309 **/ 2310 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2311 { 2312 struct i40e_netdev_priv *np = netdev_priv(netdev); 2313 struct i40e_vsi *vsi = np->vsi; 2314 2315 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2316 i40e_vlan_stripping_enable(vsi); 2317 else 2318 i40e_vlan_stripping_disable(vsi); 2319 } 2320 2321 /** 2322 * i40e_vsi_add_vlan - Add vsi membership for given vlan 2323 * @vsi: the vsi being configured 2324 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2325 **/ 2326 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) 2327 { 2328 struct i40e_mac_filter *f, *add_f; 2329 bool is_netdev, is_vf; 2330 2331 is_vf = (vsi->type == I40E_VSI_SRIOV); 2332 is_netdev = !!(vsi->netdev); 2333 2334 /* Locked once because all functions invoked below iterates list*/ 2335 spin_lock_bh(&vsi->mac_filter_list_lock); 2336 2337 if (is_netdev) { 2338 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, 2339 is_vf, is_netdev); 2340 if (!add_f) { 2341 dev_info(&vsi->back->pdev->dev, 2342 "Could not add vlan filter %d for %pM\n", 2343 vid, vsi->netdev->dev_addr); 2344 spin_unlock_bh(&vsi->mac_filter_list_lock); 2345 return -ENOMEM; 2346 } 2347 } 2348 2349 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2350 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2351 if (!add_f) { 2352 dev_info(&vsi->back->pdev->dev, 2353 "Could not add vlan filter %d for %pM\n", 2354 vid, f->macaddr); 2355 spin_unlock_bh(&vsi->mac_filter_list_lock); 2356 return -ENOMEM; 2357 } 2358 } 2359 2360 /* Now if we add a vlan tag, make sure to check if it is the first 2361 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" 2362 * with 0, so we now accept untagged and specified tagged traffic 2363 * (and not any taged and untagged) 2364 */ 2365 if (vid > 0) { 2366 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, 2367 I40E_VLAN_ANY, 2368 is_vf, is_netdev)) { 2369 i40e_del_filter(vsi, vsi->netdev->dev_addr, 2370 I40E_VLAN_ANY, is_vf, is_netdev); 2371 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, 2372 is_vf, is_netdev); 2373 if (!add_f) { 2374 dev_info(&vsi->back->pdev->dev, 2375 "Could not add filter 0 for %pM\n", 2376 vsi->netdev->dev_addr); 2377 spin_unlock_bh(&vsi->mac_filter_list_lock); 2378 return -ENOMEM; 2379 } 2380 } 2381 } 2382 2383 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ 2384 if (vid > 0 && !vsi->info.pvid) { 2385 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2386 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2387 is_vf, is_netdev)) 2388 continue; 2389 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2390 is_vf, is_netdev); 2391 add_f = i40e_add_filter(vsi, f->macaddr, 2392 0, is_vf, is_netdev); 2393 if (!add_f) { 2394 dev_info(&vsi->back->pdev->dev, 2395 "Could not add filter 0 for %pM\n", 2396 f->macaddr); 2397 spin_unlock_bh(&vsi->mac_filter_list_lock); 2398 return -ENOMEM; 2399 } 2400 } 2401 } 2402 2403 spin_unlock_bh(&vsi->mac_filter_list_lock); 2404 2405 /* schedule our worker thread which will take care of 2406 * applying the new filter changes 2407 */ 2408 i40e_service_event_schedule(vsi->back); 2409 return 0; 2410 } 2411 2412 /** 2413 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan 2414 * @vsi: the vsi being configured 2415 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2416 * 2417 * Return: 0 on success or negative otherwise 2418 **/ 2419 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) 2420 { 2421 struct net_device *netdev = vsi->netdev; 2422 struct i40e_mac_filter *f, *add_f; 2423 bool is_vf, is_netdev; 2424 int filter_count = 0; 2425 2426 is_vf = (vsi->type == I40E_VSI_SRIOV); 2427 is_netdev = !!(netdev); 2428 2429 /* Locked once because all functions invoked below iterates list */ 2430 spin_lock_bh(&vsi->mac_filter_list_lock); 2431 2432 if (is_netdev) 2433 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); 2434 2435 list_for_each_entry(f, &vsi->mac_filter_list, list) 2436 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); 2437 2438 /* go through all the filters for this VSI and if there is only 2439 * vid == 0 it means there are no other filters, so vid 0 must 2440 * be replaced with -1. This signifies that we should from now 2441 * on accept any traffic (with any tag present, or untagged) 2442 */ 2443 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2444 if (is_netdev) { 2445 if (f->vlan && 2446 ether_addr_equal(netdev->dev_addr, f->macaddr)) 2447 filter_count++; 2448 } 2449 2450 if (f->vlan) 2451 filter_count++; 2452 } 2453 2454 if (!filter_count && is_netdev) { 2455 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); 2456 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, 2457 is_vf, is_netdev); 2458 if (!f) { 2459 dev_info(&vsi->back->pdev->dev, 2460 "Could not add filter %d for %pM\n", 2461 I40E_VLAN_ANY, netdev->dev_addr); 2462 spin_unlock_bh(&vsi->mac_filter_list_lock); 2463 return -ENOMEM; 2464 } 2465 } 2466 2467 if (!filter_count) { 2468 list_for_each_entry(f, &vsi->mac_filter_list, list) { 2469 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); 2470 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, 2471 is_vf, is_netdev); 2472 if (!add_f) { 2473 dev_info(&vsi->back->pdev->dev, 2474 "Could not add filter %d for %pM\n", 2475 I40E_VLAN_ANY, f->macaddr); 2476 spin_unlock_bh(&vsi->mac_filter_list_lock); 2477 return -ENOMEM; 2478 } 2479 } 2480 } 2481 2482 spin_unlock_bh(&vsi->mac_filter_list_lock); 2483 2484 /* schedule our worker thread which will take care of 2485 * applying the new filter changes 2486 */ 2487 i40e_service_event_schedule(vsi->back); 2488 return 0; 2489 } 2490 2491 /** 2492 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2493 * @netdev: network interface to be adjusted 2494 * @vid: vlan id to be added 2495 * 2496 * net_device_ops implementation for adding vlan ids 2497 **/ 2498 #ifdef I40E_FCOE 2499 int i40e_vlan_rx_add_vid(struct net_device *netdev, 2500 __always_unused __be16 proto, u16 vid) 2501 #else 2502 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2503 __always_unused __be16 proto, u16 vid) 2504 #endif 2505 { 2506 struct i40e_netdev_priv *np = netdev_priv(netdev); 2507 struct i40e_vsi *vsi = np->vsi; 2508 int ret = 0; 2509 2510 if (vid > 4095) 2511 return -EINVAL; 2512 2513 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); 2514 2515 /* If the network stack called us with vid = 0 then 2516 * it is asking to receive priority tagged packets with 2517 * vlan id 0. Our HW receives them by default when configured 2518 * to receive untagged packets so there is no need to add an 2519 * extra filter for vlan 0 tagged packets. 2520 */ 2521 if (vid) 2522 ret = i40e_vsi_add_vlan(vsi, vid); 2523 2524 if (!ret && (vid < VLAN_N_VID)) 2525 set_bit(vid, vsi->active_vlans); 2526 2527 return ret; 2528 } 2529 2530 /** 2531 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2532 * @netdev: network interface to be adjusted 2533 * @vid: vlan id to be removed 2534 * 2535 * net_device_ops implementation for removing vlan ids 2536 **/ 2537 #ifdef I40E_FCOE 2538 int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2539 __always_unused __be16 proto, u16 vid) 2540 #else 2541 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2542 __always_unused __be16 proto, u16 vid) 2543 #endif 2544 { 2545 struct i40e_netdev_priv *np = netdev_priv(netdev); 2546 struct i40e_vsi *vsi = np->vsi; 2547 2548 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); 2549 2550 /* return code is ignored as there is nothing a user 2551 * can do about failure to remove and a log message was 2552 * already printed from the other function 2553 */ 2554 i40e_vsi_kill_vlan(vsi, vid); 2555 2556 clear_bit(vid, vsi->active_vlans); 2557 2558 return 0; 2559 } 2560 2561 /** 2562 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2563 * @vsi: the vsi being brought back up 2564 **/ 2565 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2566 { 2567 u16 vid; 2568 2569 if (!vsi->netdev) 2570 return; 2571 2572 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2573 2574 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2575 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2576 vid); 2577 } 2578 2579 /** 2580 * i40e_vsi_add_pvid - Add pvid for the VSI 2581 * @vsi: the vsi being adjusted 2582 * @vid: the vlan id to set as a PVID 2583 **/ 2584 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2585 { 2586 struct i40e_vsi_context ctxt; 2587 i40e_status ret; 2588 2589 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2590 vsi->info.pvid = cpu_to_le16(vid); 2591 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2592 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2593 I40E_AQ_VSI_PVLAN_EMOD_STR; 2594 2595 ctxt.seid = vsi->seid; 2596 ctxt.info = vsi->info; 2597 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2598 if (ret) { 2599 dev_info(&vsi->back->pdev->dev, 2600 "add pvid failed, err %s aq_err %s\n", 2601 i40e_stat_str(&vsi->back->hw, ret), 2602 i40e_aq_str(&vsi->back->hw, 2603 vsi->back->hw.aq.asq_last_status)); 2604 return -ENOENT; 2605 } 2606 2607 return 0; 2608 } 2609 2610 /** 2611 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2612 * @vsi: the vsi being adjusted 2613 * 2614 * Just use the vlan_rx_register() service to put it back to normal 2615 **/ 2616 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2617 { 2618 i40e_vlan_stripping_disable(vsi); 2619 2620 vsi->info.pvid = 0; 2621 } 2622 2623 /** 2624 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2625 * @vsi: ptr to the VSI 2626 * 2627 * If this function returns with an error, then it's possible one or 2628 * more of the rings is populated (while the rest are not). It is the 2629 * callers duty to clean those orphaned rings. 2630 * 2631 * Return 0 on success, negative on failure 2632 **/ 2633 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2634 { 2635 int i, err = 0; 2636 2637 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2638 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2639 2640 return err; 2641 } 2642 2643 /** 2644 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2645 * @vsi: ptr to the VSI 2646 * 2647 * Free VSI's transmit software resources 2648 **/ 2649 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2650 { 2651 int i; 2652 2653 if (!vsi->tx_rings) 2654 return; 2655 2656 for (i = 0; i < vsi->num_queue_pairs; i++) 2657 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2658 i40e_free_tx_resources(vsi->tx_rings[i]); 2659 } 2660 2661 /** 2662 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 2663 * @vsi: ptr to the VSI 2664 * 2665 * If this function returns with an error, then it's possible one or 2666 * more of the rings is populated (while the rest are not). It is the 2667 * callers duty to clean those orphaned rings. 2668 * 2669 * Return 0 on success, negative on failure 2670 **/ 2671 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 2672 { 2673 int i, err = 0; 2674 2675 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2676 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 2677 #ifdef I40E_FCOE 2678 i40e_fcoe_setup_ddp_resources(vsi); 2679 #endif 2680 return err; 2681 } 2682 2683 /** 2684 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 2685 * @vsi: ptr to the VSI 2686 * 2687 * Free all receive software resources 2688 **/ 2689 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 2690 { 2691 int i; 2692 2693 if (!vsi->rx_rings) 2694 return; 2695 2696 for (i = 0; i < vsi->num_queue_pairs; i++) 2697 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2698 i40e_free_rx_resources(vsi->rx_rings[i]); 2699 #ifdef I40E_FCOE 2700 i40e_fcoe_free_ddp_resources(vsi); 2701 #endif 2702 } 2703 2704 /** 2705 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 2706 * @ring: The Tx ring to configure 2707 * 2708 * This enables/disables XPS for a given Tx descriptor ring 2709 * based on the TCs enabled for the VSI that ring belongs to. 2710 **/ 2711 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 2712 { 2713 struct i40e_vsi *vsi = ring->vsi; 2714 cpumask_var_t mask; 2715 2716 if (!ring->q_vector || !ring->netdev) 2717 return; 2718 2719 /* Single TC mode enable XPS */ 2720 if (vsi->tc_config.numtc <= 1) { 2721 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) 2722 netif_set_xps_queue(ring->netdev, 2723 &ring->q_vector->affinity_mask, 2724 ring->queue_index); 2725 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) { 2726 /* Disable XPS to allow selection based on TC */ 2727 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits); 2728 netif_set_xps_queue(ring->netdev, mask, ring->queue_index); 2729 free_cpumask_var(mask); 2730 } 2731 2732 /* schedule our worker thread which will take care of 2733 * applying the new filter changes 2734 */ 2735 i40e_service_event_schedule(vsi->back); 2736 } 2737 2738 /** 2739 * i40e_configure_tx_ring - Configure a transmit ring context and rest 2740 * @ring: The Tx ring to configure 2741 * 2742 * Configure the Tx descriptor ring in the HMC context. 2743 **/ 2744 static int i40e_configure_tx_ring(struct i40e_ring *ring) 2745 { 2746 struct i40e_vsi *vsi = ring->vsi; 2747 u16 pf_q = vsi->base_queue + ring->queue_index; 2748 struct i40e_hw *hw = &vsi->back->hw; 2749 struct i40e_hmc_obj_txq tx_ctx; 2750 i40e_status err = 0; 2751 u32 qtx_ctl = 0; 2752 2753 /* some ATR related tx ring init */ 2754 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 2755 ring->atr_sample_rate = vsi->back->atr_sample_rate; 2756 ring->atr_count = 0; 2757 } else { 2758 ring->atr_sample_rate = 0; 2759 } 2760 2761 /* configure XPS */ 2762 i40e_config_xps_tx_ring(ring); 2763 2764 /* clear the context structure first */ 2765 memset(&tx_ctx, 0, sizeof(tx_ctx)); 2766 2767 tx_ctx.new_context = 1; 2768 tx_ctx.base = (ring->dma / 128); 2769 tx_ctx.qlen = ring->count; 2770 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 2771 I40E_FLAG_FD_ATR_ENABLED)); 2772 #ifdef I40E_FCOE 2773 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2774 #endif 2775 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 2776 /* FDIR VSI tx ring can still use RS bit and writebacks */ 2777 if (vsi->type != I40E_VSI_FDIR) 2778 tx_ctx.head_wb_ena = 1; 2779 tx_ctx.head_wb_addr = ring->dma + 2780 (ring->count * sizeof(struct i40e_tx_desc)); 2781 2782 /* As part of VSI creation/update, FW allocates certain 2783 * Tx arbitration queue sets for each TC enabled for 2784 * the VSI. The FW returns the handles to these queue 2785 * sets as part of the response buffer to Add VSI, 2786 * Update VSI, etc. AQ commands. It is expected that 2787 * these queue set handles be associated with the Tx 2788 * queues by the driver as part of the TX queue context 2789 * initialization. This has to be done regardless of 2790 * DCB as by default everything is mapped to TC0. 2791 */ 2792 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 2793 tx_ctx.rdylist_act = 0; 2794 2795 /* clear the context in the HMC */ 2796 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 2797 if (err) { 2798 dev_info(&vsi->back->pdev->dev, 2799 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 2800 ring->queue_index, pf_q, err); 2801 return -ENOMEM; 2802 } 2803 2804 /* set the context in the HMC */ 2805 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 2806 if (err) { 2807 dev_info(&vsi->back->pdev->dev, 2808 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 2809 ring->queue_index, pf_q, err); 2810 return -ENOMEM; 2811 } 2812 2813 /* Now associate this queue with this PCI function */ 2814 if (vsi->type == I40E_VSI_VMDQ2) { 2815 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 2816 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 2817 I40E_QTX_CTL_VFVM_INDX_MASK; 2818 } else { 2819 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 2820 } 2821 2822 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 2823 I40E_QTX_CTL_PF_INDX_MASK); 2824 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 2825 i40e_flush(hw); 2826 2827 /* cache tail off for easier writes later */ 2828 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 2829 2830 return 0; 2831 } 2832 2833 /** 2834 * i40e_configure_rx_ring - Configure a receive ring context 2835 * @ring: The Rx ring to configure 2836 * 2837 * Configure the Rx descriptor ring in the HMC context. 2838 **/ 2839 static int i40e_configure_rx_ring(struct i40e_ring *ring) 2840 { 2841 struct i40e_vsi *vsi = ring->vsi; 2842 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 2843 u16 pf_q = vsi->base_queue + ring->queue_index; 2844 struct i40e_hw *hw = &vsi->back->hw; 2845 struct i40e_hmc_obj_rxq rx_ctx; 2846 i40e_status err = 0; 2847 2848 ring->state = 0; 2849 2850 /* clear the context structure first */ 2851 memset(&rx_ctx, 0, sizeof(rx_ctx)); 2852 2853 ring->rx_buf_len = vsi->rx_buf_len; 2854 2855 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; 2856 2857 rx_ctx.base = (ring->dma / 128); 2858 rx_ctx.qlen = ring->count; 2859 2860 /* use 32 byte descriptors */ 2861 rx_ctx.dsize = 1; 2862 2863 /* descriptor type is always zero 2864 * rx_ctx.dtype = 0; 2865 */ 2866 rx_ctx.hsplit_0 = 0; 2867 2868 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len); 2869 if (hw->revision_id == 0) 2870 rx_ctx.lrxqthresh = 0; 2871 else 2872 rx_ctx.lrxqthresh = 2; 2873 rx_ctx.crcstrip = 1; 2874 rx_ctx.l2tsel = 1; 2875 /* this controls whether VLAN is stripped from inner headers */ 2876 rx_ctx.showiv = 0; 2877 #ifdef I40E_FCOE 2878 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2879 #endif 2880 /* set the prefena field to 1 because the manual says to */ 2881 rx_ctx.prefena = 1; 2882 2883 /* clear the context in the HMC */ 2884 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2885 if (err) { 2886 dev_info(&vsi->back->pdev->dev, 2887 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2888 ring->queue_index, pf_q, err); 2889 return -ENOMEM; 2890 } 2891 2892 /* set the context in the HMC */ 2893 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 2894 if (err) { 2895 dev_info(&vsi->back->pdev->dev, 2896 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 2897 ring->queue_index, pf_q, err); 2898 return -ENOMEM; 2899 } 2900 2901 /* cache tail for quicker writes, and clear the reg before use */ 2902 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 2903 writel(0, ring->tail); 2904 2905 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); 2906 2907 return 0; 2908 } 2909 2910 /** 2911 * i40e_vsi_configure_tx - Configure the VSI for Tx 2912 * @vsi: VSI structure describing this set of rings and resources 2913 * 2914 * Configure the Tx VSI for operation. 2915 **/ 2916 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 2917 { 2918 int err = 0; 2919 u16 i; 2920 2921 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 2922 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 2923 2924 return err; 2925 } 2926 2927 /** 2928 * i40e_vsi_configure_rx - Configure the VSI for Rx 2929 * @vsi: the VSI being configured 2930 * 2931 * Configure the Rx VSI for operation. 2932 **/ 2933 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 2934 { 2935 int err = 0; 2936 u16 i; 2937 2938 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) 2939 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN 2940 + ETH_FCS_LEN + VLAN_HLEN; 2941 else 2942 vsi->max_frame = I40E_RXBUFFER_2048; 2943 2944 vsi->rx_buf_len = I40E_RXBUFFER_2048; 2945 2946 #ifdef I40E_FCOE 2947 /* setup rx buffer for FCoE */ 2948 if ((vsi->type == I40E_VSI_FCOE) && 2949 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) { 2950 vsi->rx_buf_len = I40E_RXBUFFER_3072; 2951 vsi->max_frame = I40E_RXBUFFER_3072; 2952 } 2953 2954 #endif /* I40E_FCOE */ 2955 /* round up for the chip's needs */ 2956 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, 2957 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); 2958 2959 /* set up individual rings */ 2960 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2961 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 2962 2963 return err; 2964 } 2965 2966 /** 2967 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 2968 * @vsi: ptr to the VSI 2969 **/ 2970 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2971 { 2972 struct i40e_ring *tx_ring, *rx_ring; 2973 u16 qoffset, qcount; 2974 int i, n; 2975 2976 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 2977 /* Reset the TC information */ 2978 for (i = 0; i < vsi->num_queue_pairs; i++) { 2979 rx_ring = vsi->rx_rings[i]; 2980 tx_ring = vsi->tx_rings[i]; 2981 rx_ring->dcb_tc = 0; 2982 tx_ring->dcb_tc = 0; 2983 } 2984 } 2985 2986 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2987 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) 2988 continue; 2989 2990 qoffset = vsi->tc_config.tc_info[n].qoffset; 2991 qcount = vsi->tc_config.tc_info[n].qcount; 2992 for (i = qoffset; i < (qoffset + qcount); i++) { 2993 rx_ring = vsi->rx_rings[i]; 2994 tx_ring = vsi->tx_rings[i]; 2995 rx_ring->dcb_tc = n; 2996 tx_ring->dcb_tc = n; 2997 } 2998 } 2999 } 3000 3001 /** 3002 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 3003 * @vsi: ptr to the VSI 3004 **/ 3005 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 3006 { 3007 if (vsi->netdev) 3008 i40e_set_rx_mode(vsi->netdev); 3009 } 3010 3011 /** 3012 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 3013 * @vsi: Pointer to the targeted VSI 3014 * 3015 * This function replays the hlist on the hw where all the SB Flow Director 3016 * filters were saved. 3017 **/ 3018 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 3019 { 3020 struct i40e_fdir_filter *filter; 3021 struct i40e_pf *pf = vsi->back; 3022 struct hlist_node *node; 3023 3024 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3025 return; 3026 3027 hlist_for_each_entry_safe(filter, node, 3028 &pf->fdir_filter_list, fdir_node) { 3029 i40e_add_del_fdir(vsi, filter, true); 3030 } 3031 } 3032 3033 /** 3034 * i40e_vsi_configure - Set up the VSI for action 3035 * @vsi: the VSI being configured 3036 **/ 3037 static int i40e_vsi_configure(struct i40e_vsi *vsi) 3038 { 3039 int err; 3040 3041 i40e_set_vsi_rx_mode(vsi); 3042 i40e_restore_vlan(vsi); 3043 i40e_vsi_config_dcb_rings(vsi); 3044 err = i40e_vsi_configure_tx(vsi); 3045 if (!err) 3046 err = i40e_vsi_configure_rx(vsi); 3047 3048 return err; 3049 } 3050 3051 /** 3052 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 3053 * @vsi: the VSI being configured 3054 **/ 3055 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 3056 { 3057 struct i40e_pf *pf = vsi->back; 3058 struct i40e_hw *hw = &pf->hw; 3059 u16 vector; 3060 int i, q; 3061 u32 qp; 3062 3063 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 3064 * and PFINT_LNKLSTn registers, e.g.: 3065 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 3066 */ 3067 qp = vsi->base_queue; 3068 vector = vsi->base_vector; 3069 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 3070 struct i40e_q_vector *q_vector = vsi->q_vectors[i]; 3071 3072 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3073 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting); 3074 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3075 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 3076 q_vector->rx.itr); 3077 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting); 3078 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3079 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 3080 q_vector->tx.itr); 3081 wr32(hw, I40E_PFINT_RATEN(vector - 1), 3082 INTRL_USEC_TO_REG(vsi->int_rate_limit)); 3083 3084 /* Linked list for the queuepairs assigned to this vector */ 3085 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 3086 for (q = 0; q < q_vector->num_ringpairs; q++) { 3087 u32 val; 3088 3089 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3090 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3091 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 3092 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 3093 (I40E_QUEUE_TYPE_TX 3094 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 3095 3096 wr32(hw, I40E_QINT_RQCTL(qp), val); 3097 3098 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3099 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3100 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3101 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| 3102 (I40E_QUEUE_TYPE_RX 3103 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3104 3105 /* Terminate the linked list */ 3106 if (q == (q_vector->num_ringpairs - 1)) 3107 val |= (I40E_QUEUE_END_OF_LIST 3108 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3109 3110 wr32(hw, I40E_QINT_TQCTL(qp), val); 3111 qp++; 3112 } 3113 } 3114 3115 i40e_flush(hw); 3116 } 3117 3118 /** 3119 * i40e_enable_misc_int_causes - enable the non-queue interrupts 3120 * @hw: ptr to the hardware info 3121 **/ 3122 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 3123 { 3124 struct i40e_hw *hw = &pf->hw; 3125 u32 val; 3126 3127 /* clear things first */ 3128 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 3129 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 3130 3131 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 3132 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 3133 I40E_PFINT_ICR0_ENA_GRST_MASK | 3134 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 3135 I40E_PFINT_ICR0_ENA_GPIO_MASK | 3136 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 3137 I40E_PFINT_ICR0_ENA_VFLR_MASK | 3138 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3139 3140 if (pf->flags & I40E_FLAG_IWARP_ENABLED) 3141 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3142 3143 if (pf->flags & I40E_FLAG_PTP) 3144 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3145 3146 wr32(hw, I40E_PFINT_ICR0_ENA, val); 3147 3148 /* SW_ITR_IDX = 0, but don't change INTENA */ 3149 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 3150 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 3151 3152 /* OTHER_ITR_IDX = 0 */ 3153 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 3154 } 3155 3156 /** 3157 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 3158 * @vsi: the VSI being configured 3159 **/ 3160 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 3161 { 3162 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3163 struct i40e_pf *pf = vsi->back; 3164 struct i40e_hw *hw = &pf->hw; 3165 u32 val; 3166 3167 /* set the ITR configuration */ 3168 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3169 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting); 3170 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3171 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 3172 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting); 3173 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3174 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 3175 3176 i40e_enable_misc_int_causes(pf); 3177 3178 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 3179 wr32(hw, I40E_PFINT_LNKLST0, 0); 3180 3181 /* Associate the queue pair to the vector and enable the queue int */ 3182 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3183 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3184 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3185 3186 wr32(hw, I40E_QINT_RQCTL(0), val); 3187 3188 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3189 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3190 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3191 3192 wr32(hw, I40E_QINT_TQCTL(0), val); 3193 i40e_flush(hw); 3194 } 3195 3196 /** 3197 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 3198 * @pf: board private structure 3199 **/ 3200 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 3201 { 3202 struct i40e_hw *hw = &pf->hw; 3203 3204 wr32(hw, I40E_PFINT_DYN_CTL0, 3205 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 3206 i40e_flush(hw); 3207 } 3208 3209 /** 3210 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 3211 * @pf: board private structure 3212 * @clearpba: true when all pending interrupt events should be cleared 3213 **/ 3214 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba) 3215 { 3216 struct i40e_hw *hw = &pf->hw; 3217 u32 val; 3218 3219 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 3220 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) | 3221 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 3222 3223 wr32(hw, I40E_PFINT_DYN_CTL0, val); 3224 i40e_flush(hw); 3225 } 3226 3227 /** 3228 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 3229 * @irq: interrupt number 3230 * @data: pointer to a q_vector 3231 **/ 3232 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3233 { 3234 struct i40e_q_vector *q_vector = data; 3235 3236 if (!q_vector->tx.ring && !q_vector->rx.ring) 3237 return IRQ_HANDLED; 3238 3239 napi_schedule_irqoff(&q_vector->napi); 3240 3241 return IRQ_HANDLED; 3242 } 3243 3244 /** 3245 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3246 * @vsi: the VSI being configured 3247 * @basename: name for the vector 3248 * 3249 * Allocates MSI-X vectors and requests interrupts from the kernel. 3250 **/ 3251 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3252 { 3253 int q_vectors = vsi->num_q_vectors; 3254 struct i40e_pf *pf = vsi->back; 3255 int base = vsi->base_vector; 3256 int rx_int_idx = 0; 3257 int tx_int_idx = 0; 3258 int vector, err; 3259 3260 for (vector = 0; vector < q_vectors; vector++) { 3261 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3262 3263 if (q_vector->tx.ring && q_vector->rx.ring) { 3264 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3265 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3266 tx_int_idx++; 3267 } else if (q_vector->rx.ring) { 3268 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3269 "%s-%s-%d", basename, "rx", rx_int_idx++); 3270 } else if (q_vector->tx.ring) { 3271 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3272 "%s-%s-%d", basename, "tx", tx_int_idx++); 3273 } else { 3274 /* skip this unused q_vector */ 3275 continue; 3276 } 3277 err = request_irq(pf->msix_entries[base + vector].vector, 3278 vsi->irq_handler, 3279 0, 3280 q_vector->name, 3281 q_vector); 3282 if (err) { 3283 dev_info(&pf->pdev->dev, 3284 "MSIX request_irq failed, error: %d\n", err); 3285 goto free_queue_irqs; 3286 } 3287 /* assign the mask for this irq */ 3288 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3289 &q_vector->affinity_mask); 3290 } 3291 3292 vsi->irqs_ready = true; 3293 return 0; 3294 3295 free_queue_irqs: 3296 while (vector) { 3297 vector--; 3298 irq_set_affinity_hint(pf->msix_entries[base + vector].vector, 3299 NULL); 3300 free_irq(pf->msix_entries[base + vector].vector, 3301 &(vsi->q_vectors[vector])); 3302 } 3303 return err; 3304 } 3305 3306 /** 3307 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3308 * @vsi: the VSI being un-configured 3309 **/ 3310 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3311 { 3312 struct i40e_pf *pf = vsi->back; 3313 struct i40e_hw *hw = &pf->hw; 3314 int base = vsi->base_vector; 3315 int i; 3316 3317 for (i = 0; i < vsi->num_queue_pairs; i++) { 3318 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); 3319 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); 3320 } 3321 3322 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3323 for (i = vsi->base_vector; 3324 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3325 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3326 3327 i40e_flush(hw); 3328 for (i = 0; i < vsi->num_q_vectors; i++) 3329 synchronize_irq(pf->msix_entries[i + base].vector); 3330 } else { 3331 /* Legacy and MSI mode - this stops all interrupt handling */ 3332 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3333 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3334 i40e_flush(hw); 3335 synchronize_irq(pf->pdev->irq); 3336 } 3337 } 3338 3339 /** 3340 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3341 * @vsi: the VSI being configured 3342 **/ 3343 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3344 { 3345 struct i40e_pf *pf = vsi->back; 3346 int i; 3347 3348 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3349 for (i = 0; i < vsi->num_q_vectors; i++) 3350 i40e_irq_dynamic_enable(vsi, i); 3351 } else { 3352 i40e_irq_dynamic_enable_icr0(pf, true); 3353 } 3354 3355 i40e_flush(&pf->hw); 3356 return 0; 3357 } 3358 3359 /** 3360 * i40e_stop_misc_vector - Stop the vector that handles non-queue events 3361 * @pf: board private structure 3362 **/ 3363 static void i40e_stop_misc_vector(struct i40e_pf *pf) 3364 { 3365 /* Disable ICR 0 */ 3366 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3367 i40e_flush(&pf->hw); 3368 } 3369 3370 /** 3371 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3372 * @irq: interrupt number 3373 * @data: pointer to a q_vector 3374 * 3375 * This is the handler used for all MSI/Legacy interrupts, and deals 3376 * with both queue and non-queue interrupts. This is also used in 3377 * MSIX mode to handle the non-queue interrupts. 3378 **/ 3379 static irqreturn_t i40e_intr(int irq, void *data) 3380 { 3381 struct i40e_pf *pf = (struct i40e_pf *)data; 3382 struct i40e_hw *hw = &pf->hw; 3383 irqreturn_t ret = IRQ_NONE; 3384 u32 icr0, icr0_remaining; 3385 u32 val, ena_mask; 3386 3387 icr0 = rd32(hw, I40E_PFINT_ICR0); 3388 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3389 3390 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3391 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3392 goto enable_intr; 3393 3394 /* if interrupt but no bits showing, must be SWINT */ 3395 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3396 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3397 pf->sw_int_count++; 3398 3399 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 3400 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { 3401 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3402 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3403 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n"); 3404 } 3405 3406 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3407 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3408 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 3409 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3410 3411 /* We do not have a way to disarm Queue causes while leaving 3412 * interrupt enabled for all other causes, ideally 3413 * interrupt should be disabled while we are in NAPI but 3414 * this is not a performance path and napi_schedule() 3415 * can deal with rescheduling. 3416 */ 3417 if (!test_bit(__I40E_DOWN, &pf->state)) 3418 napi_schedule_irqoff(&q_vector->napi); 3419 } 3420 3421 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3422 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3423 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 3424 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n"); 3425 } 3426 3427 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3428 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3429 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 3430 } 3431 3432 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3433 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3434 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); 3435 } 3436 3437 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3438 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 3439 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 3440 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3441 val = rd32(hw, I40E_GLGEN_RSTAT); 3442 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3443 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3444 if (val == I40E_RESET_CORER) { 3445 pf->corer_count++; 3446 } else if (val == I40E_RESET_GLOBR) { 3447 pf->globr_count++; 3448 } else if (val == I40E_RESET_EMPR) { 3449 pf->empr_count++; 3450 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state); 3451 } 3452 } 3453 3454 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3455 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3456 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3457 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3458 rd32(hw, I40E_PFHMC_ERRORINFO), 3459 rd32(hw, I40E_PFHMC_ERRORDATA)); 3460 } 3461 3462 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3463 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3464 3465 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3466 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3467 i40e_ptp_tx_hwtstamp(pf); 3468 } 3469 } 3470 3471 /* If a critical error is pending we have no choice but to reset the 3472 * device. 3473 * Report and mask out any remaining unexpected interrupts. 3474 */ 3475 icr0_remaining = icr0 & ena_mask; 3476 if (icr0_remaining) { 3477 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3478 icr0_remaining); 3479 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3480 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3481 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3482 dev_info(&pf->pdev->dev, "device will be reset\n"); 3483 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 3484 i40e_service_event_schedule(pf); 3485 } 3486 ena_mask &= ~icr0_remaining; 3487 } 3488 ret = IRQ_HANDLED; 3489 3490 enable_intr: 3491 /* re-enable interrupt causes */ 3492 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3493 if (!test_bit(__I40E_DOWN, &pf->state)) { 3494 i40e_service_event_schedule(pf); 3495 i40e_irq_dynamic_enable_icr0(pf, false); 3496 } 3497 3498 return ret; 3499 } 3500 3501 /** 3502 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3503 * @tx_ring: tx ring to clean 3504 * @budget: how many cleans we're allowed 3505 * 3506 * Returns true if there's any budget left (e.g. the clean is finished) 3507 **/ 3508 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3509 { 3510 struct i40e_vsi *vsi = tx_ring->vsi; 3511 u16 i = tx_ring->next_to_clean; 3512 struct i40e_tx_buffer *tx_buf; 3513 struct i40e_tx_desc *tx_desc; 3514 3515 tx_buf = &tx_ring->tx_bi[i]; 3516 tx_desc = I40E_TX_DESC(tx_ring, i); 3517 i -= tx_ring->count; 3518 3519 do { 3520 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3521 3522 /* if next_to_watch is not set then there is no work pending */ 3523 if (!eop_desc) 3524 break; 3525 3526 /* prevent any other reads prior to eop_desc */ 3527 read_barrier_depends(); 3528 3529 /* if the descriptor isn't done, no work yet to do */ 3530 if (!(eop_desc->cmd_type_offset_bsz & 3531 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3532 break; 3533 3534 /* clear next_to_watch to prevent false hangs */ 3535 tx_buf->next_to_watch = NULL; 3536 3537 tx_desc->buffer_addr = 0; 3538 tx_desc->cmd_type_offset_bsz = 0; 3539 /* move past filter desc */ 3540 tx_buf++; 3541 tx_desc++; 3542 i++; 3543 if (unlikely(!i)) { 3544 i -= tx_ring->count; 3545 tx_buf = tx_ring->tx_bi; 3546 tx_desc = I40E_TX_DESC(tx_ring, 0); 3547 } 3548 /* unmap skb header data */ 3549 dma_unmap_single(tx_ring->dev, 3550 dma_unmap_addr(tx_buf, dma), 3551 dma_unmap_len(tx_buf, len), 3552 DMA_TO_DEVICE); 3553 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3554 kfree(tx_buf->raw_buf); 3555 3556 tx_buf->raw_buf = NULL; 3557 tx_buf->tx_flags = 0; 3558 tx_buf->next_to_watch = NULL; 3559 dma_unmap_len_set(tx_buf, len, 0); 3560 tx_desc->buffer_addr = 0; 3561 tx_desc->cmd_type_offset_bsz = 0; 3562 3563 /* move us past the eop_desc for start of next FD desc */ 3564 tx_buf++; 3565 tx_desc++; 3566 i++; 3567 if (unlikely(!i)) { 3568 i -= tx_ring->count; 3569 tx_buf = tx_ring->tx_bi; 3570 tx_desc = I40E_TX_DESC(tx_ring, 0); 3571 } 3572 3573 /* update budget accounting */ 3574 budget--; 3575 } while (likely(budget)); 3576 3577 i += tx_ring->count; 3578 tx_ring->next_to_clean = i; 3579 3580 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) 3581 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx); 3582 3583 return budget > 0; 3584 } 3585 3586 /** 3587 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 3588 * @irq: interrupt number 3589 * @data: pointer to a q_vector 3590 **/ 3591 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 3592 { 3593 struct i40e_q_vector *q_vector = data; 3594 struct i40e_vsi *vsi; 3595 3596 if (!q_vector->tx.ring) 3597 return IRQ_HANDLED; 3598 3599 vsi = q_vector->tx.ring->vsi; 3600 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 3601 3602 return IRQ_HANDLED; 3603 } 3604 3605 /** 3606 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 3607 * @vsi: the VSI being configured 3608 * @v_idx: vector index 3609 * @qp_idx: queue pair index 3610 **/ 3611 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 3612 { 3613 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 3614 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 3615 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 3616 3617 tx_ring->q_vector = q_vector; 3618 tx_ring->next = q_vector->tx.ring; 3619 q_vector->tx.ring = tx_ring; 3620 q_vector->tx.count++; 3621 3622 rx_ring->q_vector = q_vector; 3623 rx_ring->next = q_vector->rx.ring; 3624 q_vector->rx.ring = rx_ring; 3625 q_vector->rx.count++; 3626 } 3627 3628 /** 3629 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 3630 * @vsi: the VSI being configured 3631 * 3632 * This function maps descriptor rings to the queue-specific vectors 3633 * we were allotted through the MSI-X enabling code. Ideally, we'd have 3634 * one vector per queue pair, but on a constrained vector budget, we 3635 * group the queue pairs as "efficiently" as possible. 3636 **/ 3637 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 3638 { 3639 int qp_remaining = vsi->num_queue_pairs; 3640 int q_vectors = vsi->num_q_vectors; 3641 int num_ringpairs; 3642 int v_start = 0; 3643 int qp_idx = 0; 3644 3645 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 3646 * group them so there are multiple queues per vector. 3647 * It is also important to go through all the vectors available to be 3648 * sure that if we don't use all the vectors, that the remaining vectors 3649 * are cleared. This is especially important when decreasing the 3650 * number of queues in use. 3651 */ 3652 for (; v_start < q_vectors; v_start++) { 3653 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 3654 3655 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 3656 3657 q_vector->num_ringpairs = num_ringpairs; 3658 3659 q_vector->rx.count = 0; 3660 q_vector->tx.count = 0; 3661 q_vector->rx.ring = NULL; 3662 q_vector->tx.ring = NULL; 3663 3664 while (num_ringpairs--) { 3665 i40e_map_vector_to_qp(vsi, v_start, qp_idx); 3666 qp_idx++; 3667 qp_remaining--; 3668 } 3669 } 3670 } 3671 3672 /** 3673 * i40e_vsi_request_irq - Request IRQ from the OS 3674 * @vsi: the VSI being configured 3675 * @basename: name for the vector 3676 **/ 3677 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 3678 { 3679 struct i40e_pf *pf = vsi->back; 3680 int err; 3681 3682 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 3683 err = i40e_vsi_request_irq_msix(vsi, basename); 3684 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 3685 err = request_irq(pf->pdev->irq, i40e_intr, 0, 3686 pf->int_name, pf); 3687 else 3688 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 3689 pf->int_name, pf); 3690 3691 if (err) 3692 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 3693 3694 return err; 3695 } 3696 3697 #ifdef CONFIG_NET_POLL_CONTROLLER 3698 /** 3699 * i40e_netpoll - A Polling 'interrupt' handler 3700 * @netdev: network interface device structure 3701 * 3702 * This is used by netconsole to send skbs without having to re-enable 3703 * interrupts. It's not called while the normal interrupt routine is executing. 3704 **/ 3705 #ifdef I40E_FCOE 3706 void i40e_netpoll(struct net_device *netdev) 3707 #else 3708 static void i40e_netpoll(struct net_device *netdev) 3709 #endif 3710 { 3711 struct i40e_netdev_priv *np = netdev_priv(netdev); 3712 struct i40e_vsi *vsi = np->vsi; 3713 struct i40e_pf *pf = vsi->back; 3714 int i; 3715 3716 /* if interface is down do nothing */ 3717 if (test_bit(__I40E_DOWN, &vsi->state)) 3718 return; 3719 3720 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3721 for (i = 0; i < vsi->num_q_vectors; i++) 3722 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 3723 } else { 3724 i40e_intr(pf->pdev->irq, netdev); 3725 } 3726 } 3727 #endif 3728 3729 /** 3730 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 3731 * @pf: the PF being configured 3732 * @pf_q: the PF queue 3733 * @enable: enable or disable state of the queue 3734 * 3735 * This routine will wait for the given Tx queue of the PF to reach the 3736 * enabled or disabled state. 3737 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3738 * multiple retries; else will return 0 in case of success. 3739 **/ 3740 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3741 { 3742 int i; 3743 u32 tx_reg; 3744 3745 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3746 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 3747 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3748 break; 3749 3750 usleep_range(10, 20); 3751 } 3752 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3753 return -ETIMEDOUT; 3754 3755 return 0; 3756 } 3757 3758 /** 3759 * i40e_vsi_control_tx - Start or stop a VSI's rings 3760 * @vsi: the VSI being configured 3761 * @enable: start or stop the rings 3762 **/ 3763 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 3764 { 3765 struct i40e_pf *pf = vsi->back; 3766 struct i40e_hw *hw = &pf->hw; 3767 int i, j, pf_q, ret = 0; 3768 u32 tx_reg; 3769 3770 pf_q = vsi->base_queue; 3771 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3772 3773 /* warn the TX unit of coming changes */ 3774 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 3775 if (!enable) 3776 usleep_range(10, 20); 3777 3778 for (j = 0; j < 50; j++) { 3779 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3780 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3781 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 3782 break; 3783 usleep_range(1000, 2000); 3784 } 3785 /* Skip if the queue is already in the requested state */ 3786 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3787 continue; 3788 3789 /* turn on/off the queue */ 3790 if (enable) { 3791 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 3792 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3793 } else { 3794 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 3795 } 3796 3797 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 3798 /* No waiting for the Tx queue to disable */ 3799 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3800 continue; 3801 3802 /* wait for the change to finish */ 3803 ret = i40e_pf_txq_wait(pf, pf_q, enable); 3804 if (ret) { 3805 dev_info(&pf->pdev->dev, 3806 "VSI seid %d Tx ring %d %sable timeout\n", 3807 vsi->seid, pf_q, (enable ? "en" : "dis")); 3808 break; 3809 } 3810 } 3811 3812 if (hw->revision_id == 0) 3813 mdelay(50); 3814 return ret; 3815 } 3816 3817 /** 3818 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 3819 * @pf: the PF being configured 3820 * @pf_q: the PF queue 3821 * @enable: enable or disable state of the queue 3822 * 3823 * This routine will wait for the given Rx queue of the PF to reach the 3824 * enabled or disabled state. 3825 * Returns -ETIMEDOUT in case of failing to reach the requested state after 3826 * multiple retries; else will return 0 in case of success. 3827 **/ 3828 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 3829 { 3830 int i; 3831 u32 rx_reg; 3832 3833 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 3834 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 3835 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3836 break; 3837 3838 usleep_range(10, 20); 3839 } 3840 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 3841 return -ETIMEDOUT; 3842 3843 return 0; 3844 } 3845 3846 /** 3847 * i40e_vsi_control_rx - Start or stop a VSI's rings 3848 * @vsi: the VSI being configured 3849 * @enable: start or stop the rings 3850 **/ 3851 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 3852 { 3853 struct i40e_pf *pf = vsi->back; 3854 struct i40e_hw *hw = &pf->hw; 3855 int i, j, pf_q, ret = 0; 3856 u32 rx_reg; 3857 3858 pf_q = vsi->base_queue; 3859 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3860 for (j = 0; j < 50; j++) { 3861 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3862 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 3863 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 3864 break; 3865 usleep_range(1000, 2000); 3866 } 3867 3868 /* Skip if the queue is already in the requested state */ 3869 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3870 continue; 3871 3872 /* turn on/off the queue */ 3873 if (enable) 3874 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 3875 else 3876 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 3877 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 3878 /* No waiting for the Tx queue to disable */ 3879 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state)) 3880 continue; 3881 3882 /* wait for the change to finish */ 3883 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 3884 if (ret) { 3885 dev_info(&pf->pdev->dev, 3886 "VSI seid %d Rx ring %d %sable timeout\n", 3887 vsi->seid, pf_q, (enable ? "en" : "dis")); 3888 break; 3889 } 3890 } 3891 3892 return ret; 3893 } 3894 3895 /** 3896 * i40e_vsi_control_rings - Start or stop a VSI's rings 3897 * @vsi: the VSI being configured 3898 * @enable: start or stop the rings 3899 **/ 3900 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) 3901 { 3902 int ret = 0; 3903 3904 /* do rx first for enable and last for disable */ 3905 if (request) { 3906 ret = i40e_vsi_control_rx(vsi, request); 3907 if (ret) 3908 return ret; 3909 ret = i40e_vsi_control_tx(vsi, request); 3910 } else { 3911 /* Ignore return value, we need to shutdown whatever we can */ 3912 i40e_vsi_control_tx(vsi, request); 3913 i40e_vsi_control_rx(vsi, request); 3914 } 3915 3916 return ret; 3917 } 3918 3919 /** 3920 * i40e_vsi_free_irq - Free the irq association with the OS 3921 * @vsi: the VSI being configured 3922 **/ 3923 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 3924 { 3925 struct i40e_pf *pf = vsi->back; 3926 struct i40e_hw *hw = &pf->hw; 3927 int base = vsi->base_vector; 3928 u32 val, qp; 3929 int i; 3930 3931 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3932 if (!vsi->q_vectors) 3933 return; 3934 3935 if (!vsi->irqs_ready) 3936 return; 3937 3938 vsi->irqs_ready = false; 3939 for (i = 0; i < vsi->num_q_vectors; i++) { 3940 u16 vector = i + base; 3941 3942 /* free only the irqs that were actually requested */ 3943 if (!vsi->q_vectors[i] || 3944 !vsi->q_vectors[i]->num_ringpairs) 3945 continue; 3946 3947 /* clear the affinity_mask in the IRQ descriptor */ 3948 irq_set_affinity_hint(pf->msix_entries[vector].vector, 3949 NULL); 3950 free_irq(pf->msix_entries[vector].vector, 3951 vsi->q_vectors[i]); 3952 3953 /* Tear down the interrupt queue link list 3954 * 3955 * We know that they come in pairs and always 3956 * the Rx first, then the Tx. To clear the 3957 * link list, stick the EOL value into the 3958 * next_q field of the registers. 3959 */ 3960 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 3961 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 3962 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3963 val |= I40E_QUEUE_END_OF_LIST 3964 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 3965 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 3966 3967 while (qp != I40E_QUEUE_END_OF_LIST) { 3968 u32 next; 3969 3970 val = rd32(hw, I40E_QINT_RQCTL(qp)); 3971 3972 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 3973 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 3974 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3975 I40E_QINT_RQCTL_INTEVENT_MASK); 3976 3977 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 3978 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 3979 3980 wr32(hw, I40E_QINT_RQCTL(qp), val); 3981 3982 val = rd32(hw, I40E_QINT_TQCTL(qp)); 3983 3984 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 3985 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 3986 3987 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 3988 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 3989 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3990 I40E_QINT_TQCTL_INTEVENT_MASK); 3991 3992 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 3993 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 3994 3995 wr32(hw, I40E_QINT_TQCTL(qp), val); 3996 qp = next; 3997 } 3998 } 3999 } else { 4000 free_irq(pf->pdev->irq, pf); 4001 4002 val = rd32(hw, I40E_PFINT_LNKLST0); 4003 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4004 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4005 val |= I40E_QUEUE_END_OF_LIST 4006 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 4007 wr32(hw, I40E_PFINT_LNKLST0, val); 4008 4009 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4010 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4011 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4012 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4013 I40E_QINT_RQCTL_INTEVENT_MASK); 4014 4015 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4016 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4017 4018 wr32(hw, I40E_QINT_RQCTL(qp), val); 4019 4020 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4021 4022 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4023 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4024 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4025 I40E_QINT_TQCTL_INTEVENT_MASK); 4026 4027 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4028 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4029 4030 wr32(hw, I40E_QINT_TQCTL(qp), val); 4031 } 4032 } 4033 4034 /** 4035 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 4036 * @vsi: the VSI being configured 4037 * @v_idx: Index of vector to be freed 4038 * 4039 * This function frees the memory allocated to the q_vector. In addition if 4040 * NAPI is enabled it will delete any references to the NAPI struct prior 4041 * to freeing the q_vector. 4042 **/ 4043 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 4044 { 4045 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4046 struct i40e_ring *ring; 4047 4048 if (!q_vector) 4049 return; 4050 4051 /* disassociate q_vector from rings */ 4052 i40e_for_each_ring(ring, q_vector->tx) 4053 ring->q_vector = NULL; 4054 4055 i40e_for_each_ring(ring, q_vector->rx) 4056 ring->q_vector = NULL; 4057 4058 /* only VSI w/ an associated netdev is set up w/ NAPI */ 4059 if (vsi->netdev) 4060 netif_napi_del(&q_vector->napi); 4061 4062 vsi->q_vectors[v_idx] = NULL; 4063 4064 kfree_rcu(q_vector, rcu); 4065 } 4066 4067 /** 4068 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 4069 * @vsi: the VSI being un-configured 4070 * 4071 * This frees the memory allocated to the q_vectors and 4072 * deletes references to the NAPI struct. 4073 **/ 4074 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 4075 { 4076 int v_idx; 4077 4078 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 4079 i40e_free_q_vector(vsi, v_idx); 4080 } 4081 4082 /** 4083 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 4084 * @pf: board private structure 4085 **/ 4086 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 4087 { 4088 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 4089 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4090 pci_disable_msix(pf->pdev); 4091 kfree(pf->msix_entries); 4092 pf->msix_entries = NULL; 4093 kfree(pf->irq_pile); 4094 pf->irq_pile = NULL; 4095 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 4096 pci_disable_msi(pf->pdev); 4097 } 4098 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 4099 } 4100 4101 /** 4102 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 4103 * @pf: board private structure 4104 * 4105 * We go through and clear interrupt specific resources and reset the structure 4106 * to pre-load conditions 4107 **/ 4108 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 4109 { 4110 int i; 4111 4112 i40e_stop_misc_vector(pf); 4113 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) { 4114 synchronize_irq(pf->msix_entries[0].vector); 4115 free_irq(pf->msix_entries[0].vector, pf); 4116 } 4117 4118 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, 4119 I40E_IWARP_IRQ_PILE_ID); 4120 4121 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 4122 for (i = 0; i < pf->num_alloc_vsi; i++) 4123 if (pf->vsi[i]) 4124 i40e_vsi_free_q_vectors(pf->vsi[i]); 4125 i40e_reset_interrupt_capability(pf); 4126 } 4127 4128 /** 4129 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 4130 * @vsi: the VSI being configured 4131 **/ 4132 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 4133 { 4134 int q_idx; 4135 4136 if (!vsi->netdev) 4137 return; 4138 4139 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 4140 napi_enable(&vsi->q_vectors[q_idx]->napi); 4141 } 4142 4143 /** 4144 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 4145 * @vsi: the VSI being configured 4146 **/ 4147 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 4148 { 4149 int q_idx; 4150 4151 if (!vsi->netdev) 4152 return; 4153 4154 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) 4155 napi_disable(&vsi->q_vectors[q_idx]->napi); 4156 } 4157 4158 /** 4159 * i40e_vsi_close - Shut down a VSI 4160 * @vsi: the vsi to be quelled 4161 **/ 4162 static void i40e_vsi_close(struct i40e_vsi *vsi) 4163 { 4164 bool reset = false; 4165 4166 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 4167 i40e_down(vsi); 4168 i40e_vsi_free_irq(vsi); 4169 i40e_vsi_free_tx_resources(vsi); 4170 i40e_vsi_free_rx_resources(vsi); 4171 vsi->current_netdev_flags = 0; 4172 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 4173 reset = true; 4174 i40e_notify_client_of_netdev_close(vsi, reset); 4175 } 4176 4177 /** 4178 * i40e_quiesce_vsi - Pause a given VSI 4179 * @vsi: the VSI being paused 4180 **/ 4181 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 4182 { 4183 if (test_bit(__I40E_DOWN, &vsi->state)) 4184 return; 4185 4186 /* No need to disable FCoE VSI when Tx suspended */ 4187 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) && 4188 vsi->type == I40E_VSI_FCOE) { 4189 dev_dbg(&vsi->back->pdev->dev, 4190 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid); 4191 return; 4192 } 4193 4194 set_bit(__I40E_NEEDS_RESTART, &vsi->state); 4195 if (vsi->netdev && netif_running(vsi->netdev)) 4196 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 4197 else 4198 i40e_vsi_close(vsi); 4199 } 4200 4201 /** 4202 * i40e_unquiesce_vsi - Resume a given VSI 4203 * @vsi: the VSI being resumed 4204 **/ 4205 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 4206 { 4207 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) 4208 return; 4209 4210 clear_bit(__I40E_NEEDS_RESTART, &vsi->state); 4211 if (vsi->netdev && netif_running(vsi->netdev)) 4212 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 4213 else 4214 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 4215 } 4216 4217 /** 4218 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 4219 * @pf: the PF 4220 **/ 4221 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 4222 { 4223 int v; 4224 4225 for (v = 0; v < pf->num_alloc_vsi; v++) { 4226 if (pf->vsi[v]) 4227 i40e_quiesce_vsi(pf->vsi[v]); 4228 } 4229 } 4230 4231 /** 4232 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 4233 * @pf: the PF 4234 **/ 4235 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 4236 { 4237 int v; 4238 4239 for (v = 0; v < pf->num_alloc_vsi; v++) { 4240 if (pf->vsi[v]) 4241 i40e_unquiesce_vsi(pf->vsi[v]); 4242 } 4243 } 4244 4245 #ifdef CONFIG_I40E_DCB 4246 /** 4247 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled 4248 * @vsi: the VSI being configured 4249 * 4250 * This function waits for the given VSI's queues to be disabled. 4251 **/ 4252 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi) 4253 { 4254 struct i40e_pf *pf = vsi->back; 4255 int i, pf_q, ret; 4256 4257 pf_q = vsi->base_queue; 4258 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4259 /* Check and wait for the disable status of the queue */ 4260 ret = i40e_pf_txq_wait(pf, pf_q, false); 4261 if (ret) { 4262 dev_info(&pf->pdev->dev, 4263 "VSI seid %d Tx ring %d disable timeout\n", 4264 vsi->seid, pf_q); 4265 return ret; 4266 } 4267 } 4268 4269 pf_q = vsi->base_queue; 4270 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4271 /* Check and wait for the disable status of the queue */ 4272 ret = i40e_pf_rxq_wait(pf, pf_q, false); 4273 if (ret) { 4274 dev_info(&pf->pdev->dev, 4275 "VSI seid %d Rx ring %d disable timeout\n", 4276 vsi->seid, pf_q); 4277 return ret; 4278 } 4279 } 4280 4281 return 0; 4282 } 4283 4284 /** 4285 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled 4286 * @pf: the PF 4287 * 4288 * This function waits for the queues to be in disabled state for all the 4289 * VSIs that are managed by this PF. 4290 **/ 4291 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf) 4292 { 4293 int v, ret = 0; 4294 4295 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4296 /* No need to wait for FCoE VSI queues */ 4297 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) { 4298 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); 4299 if (ret) 4300 break; 4301 } 4302 } 4303 4304 return ret; 4305 } 4306 4307 #endif 4308 4309 /** 4310 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue 4311 * @q_idx: TX queue number 4312 * @vsi: Pointer to VSI struct 4313 * 4314 * This function checks specified queue for given VSI. Detects hung condition. 4315 * Sets hung bit since it is two step process. Before next run of service task 4316 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not, 4317 * hung condition remain unchanged and during subsequent run, this function 4318 * issues SW interrupt to recover from hung condition. 4319 **/ 4320 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi) 4321 { 4322 struct i40e_ring *tx_ring = NULL; 4323 struct i40e_pf *pf; 4324 u32 head, val, tx_pending_hw; 4325 int i; 4326 4327 pf = vsi->back; 4328 4329 /* now that we have an index, find the tx_ring struct */ 4330 for (i = 0; i < vsi->num_queue_pairs; i++) { 4331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 4332 if (q_idx == vsi->tx_rings[i]->queue_index) { 4333 tx_ring = vsi->tx_rings[i]; 4334 break; 4335 } 4336 } 4337 } 4338 4339 if (!tx_ring) 4340 return; 4341 4342 /* Read interrupt register */ 4343 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4344 val = rd32(&pf->hw, 4345 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 4346 tx_ring->vsi->base_vector - 1)); 4347 else 4348 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 4349 4350 head = i40e_get_head(tx_ring); 4351 4352 tx_pending_hw = i40e_get_tx_pending(tx_ring, false); 4353 4354 /* HW is done executing descriptors, updated HEAD write back, 4355 * but SW hasn't processed those descriptors. If interrupt is 4356 * not generated from this point ON, it could result into 4357 * dev_watchdog detecting timeout on those netdev_queue, 4358 * hence proactively trigger SW interrupt. 4359 */ 4360 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) { 4361 /* NAPI Poll didn't run and clear since it was set */ 4362 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT, 4363 &tx_ring->q_vector->hung_detected)) { 4364 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n", 4365 vsi->seid, q_idx, tx_pending_hw, 4366 tx_ring->next_to_clean, head, 4367 tx_ring->next_to_use, 4368 readl(tx_ring->tail)); 4369 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n", 4370 vsi->seid, q_idx, val); 4371 i40e_force_wb(vsi, tx_ring->q_vector); 4372 } else { 4373 /* First Chance - detected possible hung */ 4374 set_bit(I40E_Q_VECTOR_HUNG_DETECT, 4375 &tx_ring->q_vector->hung_detected); 4376 } 4377 } 4378 4379 /* This is the case where we have interrupts missing, 4380 * so the tx_pending in HW will most likely be 0, but we 4381 * will have tx_pending in SW since the WB happened but the 4382 * interrupt got lost. 4383 */ 4384 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) && 4385 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) { 4386 if (napi_reschedule(&tx_ring->q_vector->napi)) 4387 tx_ring->tx_stats.tx_lost_interrupt++; 4388 } 4389 } 4390 4391 /** 4392 * i40e_detect_recover_hung - Function to detect and recover hung_queues 4393 * @pf: pointer to PF struct 4394 * 4395 * LAN VSI has netdev and netdev has TX queues. This function is to check 4396 * each of those TX queues if they are hung, trigger recovery by issuing 4397 * SW interrupt. 4398 **/ 4399 static void i40e_detect_recover_hung(struct i40e_pf *pf) 4400 { 4401 struct net_device *netdev; 4402 struct i40e_vsi *vsi; 4403 int i; 4404 4405 /* Only for LAN VSI */ 4406 vsi = pf->vsi[pf->lan_vsi]; 4407 4408 if (!vsi) 4409 return; 4410 4411 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */ 4412 if (test_bit(__I40E_DOWN, &vsi->back->state) || 4413 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) 4414 return; 4415 4416 /* Make sure type is MAIN VSI */ 4417 if (vsi->type != I40E_VSI_MAIN) 4418 return; 4419 4420 netdev = vsi->netdev; 4421 if (!netdev) 4422 return; 4423 4424 /* Bail out if netif_carrier is not OK */ 4425 if (!netif_carrier_ok(netdev)) 4426 return; 4427 4428 /* Go thru' TX queues for netdev */ 4429 for (i = 0; i < netdev->num_tx_queues; i++) { 4430 struct netdev_queue *q; 4431 4432 q = netdev_get_tx_queue(netdev, i); 4433 if (q) 4434 i40e_detect_recover_hung_queue(i, vsi); 4435 } 4436 } 4437 4438 /** 4439 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4440 * @pf: pointer to PF 4441 * 4442 * Get TC map for ISCSI PF type that will include iSCSI TC 4443 * and LAN TC. 4444 **/ 4445 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4446 { 4447 struct i40e_dcb_app_priority_table app; 4448 struct i40e_hw *hw = &pf->hw; 4449 u8 enabled_tc = 1; /* TC0 is always enabled */ 4450 u8 tc, i; 4451 /* Get the iSCSI APP TLV */ 4452 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4453 4454 for (i = 0; i < dcbcfg->numapps; i++) { 4455 app = dcbcfg->app[i]; 4456 if (app.selector == I40E_APP_SEL_TCPIP && 4457 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4458 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4459 enabled_tc |= BIT(tc); 4460 break; 4461 } 4462 } 4463 4464 return enabled_tc; 4465 } 4466 4467 /** 4468 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4469 * @dcbcfg: the corresponding DCBx configuration structure 4470 * 4471 * Return the number of TCs from given DCBx configuration 4472 **/ 4473 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4474 { 4475 u8 num_tc = 0; 4476 int i; 4477 4478 /* Scan the ETS Config Priority Table to find 4479 * traffic class enabled for a given priority 4480 * and use the traffic class index to get the 4481 * number of traffic classes enabled 4482 */ 4483 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4484 if (dcbcfg->etscfg.prioritytable[i] > num_tc) 4485 num_tc = dcbcfg->etscfg.prioritytable[i]; 4486 } 4487 4488 /* Traffic class index starts from zero so 4489 * increment to return the actual count 4490 */ 4491 return num_tc + 1; 4492 } 4493 4494 /** 4495 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 4496 * @dcbcfg: the corresponding DCBx configuration structure 4497 * 4498 * Query the current DCB configuration and return the number of 4499 * traffic classes enabled from the given DCBX config 4500 **/ 4501 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 4502 { 4503 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 4504 u8 enabled_tc = 1; 4505 u8 i; 4506 4507 for (i = 0; i < num_tc; i++) 4508 enabled_tc |= BIT(i); 4509 4510 return enabled_tc; 4511 } 4512 4513 /** 4514 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 4515 * @pf: PF being queried 4516 * 4517 * Return number of traffic classes enabled for the given PF 4518 **/ 4519 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 4520 { 4521 struct i40e_hw *hw = &pf->hw; 4522 u8 i, enabled_tc; 4523 u8 num_tc = 0; 4524 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4525 4526 /* If DCB is not enabled then always in single TC */ 4527 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4528 return 1; 4529 4530 /* SFP mode will be enabled for all TCs on port */ 4531 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4532 return i40e_dcb_get_num_tc(dcbcfg); 4533 4534 /* MFP mode return count of enabled TCs for this PF */ 4535 if (pf->hw.func_caps.iscsi) 4536 enabled_tc = i40e_get_iscsi_tc_map(pf); 4537 else 4538 return 1; /* Only TC0 */ 4539 4540 /* At least have TC0 */ 4541 enabled_tc = (enabled_tc ? enabled_tc : 0x1); 4542 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4543 if (enabled_tc & BIT(i)) 4544 num_tc++; 4545 } 4546 return num_tc; 4547 } 4548 4549 /** 4550 * i40e_pf_get_default_tc - Get bitmap for first enabled TC 4551 * @pf: PF being queried 4552 * 4553 * Return a bitmap for first enabled traffic class for this PF. 4554 **/ 4555 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) 4556 { 4557 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; 4558 u8 i = 0; 4559 4560 if (!enabled_tc) 4561 return 0x1; /* TC0 */ 4562 4563 /* Find the first enabled TC */ 4564 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4565 if (enabled_tc & BIT(i)) 4566 break; 4567 } 4568 4569 return BIT(i); 4570 } 4571 4572 /** 4573 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 4574 * @pf: PF being queried 4575 * 4576 * Return a bitmap for enabled traffic classes for this PF. 4577 **/ 4578 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 4579 { 4580 /* If DCB is not enabled for this PF then just return default TC */ 4581 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 4582 return i40e_pf_get_default_tc(pf); 4583 4584 /* SFP mode we want PF to be enabled for all TCs */ 4585 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 4586 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 4587 4588 /* MFP enabled and iSCSI PF type */ 4589 if (pf->hw.func_caps.iscsi) 4590 return i40e_get_iscsi_tc_map(pf); 4591 else 4592 return i40e_pf_get_default_tc(pf); 4593 } 4594 4595 /** 4596 * i40e_vsi_get_bw_info - Query VSI BW Information 4597 * @vsi: the VSI being queried 4598 * 4599 * Returns 0 on success, negative value on failure 4600 **/ 4601 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 4602 { 4603 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 4604 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 4605 struct i40e_pf *pf = vsi->back; 4606 struct i40e_hw *hw = &pf->hw; 4607 i40e_status ret; 4608 u32 tc_bw_max; 4609 int i; 4610 4611 /* Get the VSI level BW configuration */ 4612 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 4613 if (ret) { 4614 dev_info(&pf->pdev->dev, 4615 "couldn't get PF vsi bw config, err %s aq_err %s\n", 4616 i40e_stat_str(&pf->hw, ret), 4617 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4618 return -EINVAL; 4619 } 4620 4621 /* Get the VSI level BW configuration per TC */ 4622 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 4623 NULL); 4624 if (ret) { 4625 dev_info(&pf->pdev->dev, 4626 "couldn't get PF vsi ets bw config, err %s aq_err %s\n", 4627 i40e_stat_str(&pf->hw, ret), 4628 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4629 return -EINVAL; 4630 } 4631 4632 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 4633 dev_info(&pf->pdev->dev, 4634 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 4635 bw_config.tc_valid_bits, 4636 bw_ets_config.tc_valid_bits); 4637 /* Still continuing */ 4638 } 4639 4640 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 4641 vsi->bw_max_quanta = bw_config.max_bw; 4642 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 4643 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 4644 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4645 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 4646 vsi->bw_ets_limit_credits[i] = 4647 le16_to_cpu(bw_ets_config.credits[i]); 4648 /* 3 bits out of 4 for each TC */ 4649 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 4650 } 4651 4652 return 0; 4653 } 4654 4655 /** 4656 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 4657 * @vsi: the VSI being configured 4658 * @enabled_tc: TC bitmap 4659 * @bw_credits: BW shared credits per TC 4660 * 4661 * Returns 0 on success, negative value on failure 4662 **/ 4663 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 4664 u8 *bw_share) 4665 { 4666 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 4667 i40e_status ret; 4668 int i; 4669 4670 bw_data.tc_valid_bits = enabled_tc; 4671 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4672 bw_data.tc_bw_credits[i] = bw_share[i]; 4673 4674 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 4675 NULL); 4676 if (ret) { 4677 dev_info(&vsi->back->pdev->dev, 4678 "AQ command Config VSI BW allocation per TC failed = %d\n", 4679 vsi->back->hw.aq.asq_last_status); 4680 return -EINVAL; 4681 } 4682 4683 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 4684 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 4685 4686 return 0; 4687 } 4688 4689 /** 4690 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 4691 * @vsi: the VSI being configured 4692 * @enabled_tc: TC map to be enabled 4693 * 4694 **/ 4695 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4696 { 4697 struct net_device *netdev = vsi->netdev; 4698 struct i40e_pf *pf = vsi->back; 4699 struct i40e_hw *hw = &pf->hw; 4700 u8 netdev_tc = 0; 4701 int i; 4702 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4703 4704 if (!netdev) 4705 return; 4706 4707 if (!enabled_tc) { 4708 netdev_reset_tc(netdev); 4709 return; 4710 } 4711 4712 /* Set up actual enabled TCs on the VSI */ 4713 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 4714 return; 4715 4716 /* set per TC queues for the VSI */ 4717 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4718 /* Only set TC queues for enabled tcs 4719 * 4720 * e.g. For a VSI that has TC0 and TC3 enabled the 4721 * enabled_tc bitmap would be 0x00001001; the driver 4722 * will set the numtc for netdev as 2 that will be 4723 * referenced by the netdev layer as TC 0 and 1. 4724 */ 4725 if (vsi->tc_config.enabled_tc & BIT(i)) 4726 netdev_set_tc_queue(netdev, 4727 vsi->tc_config.tc_info[i].netdev_tc, 4728 vsi->tc_config.tc_info[i].qcount, 4729 vsi->tc_config.tc_info[i].qoffset); 4730 } 4731 4732 /* Assign UP2TC map for the VSI */ 4733 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 4734 /* Get the actual TC# for the UP */ 4735 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 4736 /* Get the mapped netdev TC# for the UP */ 4737 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 4738 netdev_set_prio_tc_map(netdev, i, netdev_tc); 4739 } 4740 } 4741 4742 /** 4743 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 4744 * @vsi: the VSI being configured 4745 * @ctxt: the ctxt buffer returned from AQ VSI update param command 4746 **/ 4747 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 4748 struct i40e_vsi_context *ctxt) 4749 { 4750 /* copy just the sections touched not the entire info 4751 * since not all sections are valid as returned by 4752 * update vsi params 4753 */ 4754 vsi->info.mapping_flags = ctxt->info.mapping_flags; 4755 memcpy(&vsi->info.queue_mapping, 4756 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 4757 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 4758 sizeof(vsi->info.tc_mapping)); 4759 } 4760 4761 /** 4762 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 4763 * @vsi: VSI to be configured 4764 * @enabled_tc: TC bitmap 4765 * 4766 * This configures a particular VSI for TCs that are mapped to the 4767 * given TC bitmap. It uses default bandwidth share for TCs across 4768 * VSIs to configure TC for a particular VSI. 4769 * 4770 * NOTE: 4771 * It is expected that the VSI queues have been quisced before calling 4772 * this function. 4773 **/ 4774 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 4775 { 4776 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 4777 struct i40e_vsi_context ctxt; 4778 int ret = 0; 4779 int i; 4780 4781 /* Check if enabled_tc is same as existing or new TCs */ 4782 if (vsi->tc_config.enabled_tc == enabled_tc) 4783 return ret; 4784 4785 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 4786 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4787 if (enabled_tc & BIT(i)) 4788 bw_share[i] = 1; 4789 } 4790 4791 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 4792 if (ret) { 4793 dev_info(&vsi->back->pdev->dev, 4794 "Failed configuring TC map %d for VSI %d\n", 4795 enabled_tc, vsi->seid); 4796 goto out; 4797 } 4798 4799 /* Update Queue Pairs Mapping for currently enabled UPs */ 4800 ctxt.seid = vsi->seid; 4801 ctxt.pf_num = vsi->back->hw.pf_id; 4802 ctxt.vf_num = 0; 4803 ctxt.uplink_seid = vsi->uplink_seid; 4804 ctxt.info = vsi->info; 4805 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 4806 4807 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 4808 ctxt.info.valid_sections |= 4809 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 4810 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA; 4811 } 4812 4813 /* Update the VSI after updating the VSI queue-mapping information */ 4814 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 4815 if (ret) { 4816 dev_info(&vsi->back->pdev->dev, 4817 "Update vsi tc config failed, err %s aq_err %s\n", 4818 i40e_stat_str(&vsi->back->hw, ret), 4819 i40e_aq_str(&vsi->back->hw, 4820 vsi->back->hw.aq.asq_last_status)); 4821 goto out; 4822 } 4823 /* update the local VSI info with updated queue map */ 4824 i40e_vsi_update_queue_map(vsi, &ctxt); 4825 vsi->info.valid_sections = 0; 4826 4827 /* Update current VSI BW information */ 4828 ret = i40e_vsi_get_bw_info(vsi); 4829 if (ret) { 4830 dev_info(&vsi->back->pdev->dev, 4831 "Failed updating vsi bw info, err %s aq_err %s\n", 4832 i40e_stat_str(&vsi->back->hw, ret), 4833 i40e_aq_str(&vsi->back->hw, 4834 vsi->back->hw.aq.asq_last_status)); 4835 goto out; 4836 } 4837 4838 /* Update the netdev TC setup */ 4839 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 4840 out: 4841 return ret; 4842 } 4843 4844 /** 4845 * i40e_veb_config_tc - Configure TCs for given VEB 4846 * @veb: given VEB 4847 * @enabled_tc: TC bitmap 4848 * 4849 * Configures given TC bitmap for VEB (switching) element 4850 **/ 4851 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 4852 { 4853 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 4854 struct i40e_pf *pf = veb->pf; 4855 int ret = 0; 4856 int i; 4857 4858 /* No TCs or already enabled TCs just return */ 4859 if (!enabled_tc || veb->enabled_tc == enabled_tc) 4860 return ret; 4861 4862 bw_data.tc_valid_bits = enabled_tc; 4863 /* bw_data.absolute_credits is not set (relative) */ 4864 4865 /* Enable ETS TCs with equal BW Share for now */ 4866 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 4867 if (enabled_tc & BIT(i)) 4868 bw_data.tc_bw_share_credits[i] = 1; 4869 } 4870 4871 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 4872 &bw_data, NULL); 4873 if (ret) { 4874 dev_info(&pf->pdev->dev, 4875 "VEB bw config failed, err %s aq_err %s\n", 4876 i40e_stat_str(&pf->hw, ret), 4877 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4878 goto out; 4879 } 4880 4881 /* Update the BW information */ 4882 ret = i40e_veb_get_bw_info(veb); 4883 if (ret) { 4884 dev_info(&pf->pdev->dev, 4885 "Failed getting veb bw config, err %s aq_err %s\n", 4886 i40e_stat_str(&pf->hw, ret), 4887 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4888 } 4889 4890 out: 4891 return ret; 4892 } 4893 4894 #ifdef CONFIG_I40E_DCB 4895 /** 4896 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 4897 * @pf: PF struct 4898 * 4899 * Reconfigure VEB/VSIs on a given PF; it is assumed that 4900 * the caller would've quiesce all the VSIs before calling 4901 * this function 4902 **/ 4903 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 4904 { 4905 u8 tc_map = 0; 4906 int ret; 4907 u8 v; 4908 4909 /* Enable the TCs available on PF to all VEBs */ 4910 tc_map = i40e_pf_get_tc_map(pf); 4911 for (v = 0; v < I40E_MAX_VEB; v++) { 4912 if (!pf->veb[v]) 4913 continue; 4914 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 4915 if (ret) { 4916 dev_info(&pf->pdev->dev, 4917 "Failed configuring TC for VEB seid=%d\n", 4918 pf->veb[v]->seid); 4919 /* Will try to configure as many components */ 4920 } 4921 } 4922 4923 /* Update each VSI */ 4924 for (v = 0; v < pf->num_alloc_vsi; v++) { 4925 if (!pf->vsi[v]) 4926 continue; 4927 4928 /* - Enable all TCs for the LAN VSI 4929 #ifdef I40E_FCOE 4930 * - For FCoE VSI only enable the TC configured 4931 * as per the APP TLV 4932 #endif 4933 * - For all others keep them at TC0 for now 4934 */ 4935 if (v == pf->lan_vsi) 4936 tc_map = i40e_pf_get_tc_map(pf); 4937 else 4938 tc_map = i40e_pf_get_default_tc(pf); 4939 #ifdef I40E_FCOE 4940 if (pf->vsi[v]->type == I40E_VSI_FCOE) 4941 tc_map = i40e_get_fcoe_tc_map(pf); 4942 #endif /* #ifdef I40E_FCOE */ 4943 4944 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 4945 if (ret) { 4946 dev_info(&pf->pdev->dev, 4947 "Failed configuring TC for VSI seid=%d\n", 4948 pf->vsi[v]->seid); 4949 /* Will try to configure as many components */ 4950 } else { 4951 /* Re-configure VSI vectors based on updated TC map */ 4952 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 4953 if (pf->vsi[v]->netdev) 4954 i40e_dcbnl_set_all(pf->vsi[v]); 4955 } 4956 i40e_notify_client_of_l2_param_changes(pf->vsi[v]); 4957 } 4958 } 4959 4960 /** 4961 * i40e_resume_port_tx - Resume port Tx 4962 * @pf: PF struct 4963 * 4964 * Resume a port's Tx and issue a PF reset in case of failure to 4965 * resume. 4966 **/ 4967 static int i40e_resume_port_tx(struct i40e_pf *pf) 4968 { 4969 struct i40e_hw *hw = &pf->hw; 4970 int ret; 4971 4972 ret = i40e_aq_resume_port_tx(hw, NULL); 4973 if (ret) { 4974 dev_info(&pf->pdev->dev, 4975 "Resume Port Tx failed, err %s aq_err %s\n", 4976 i40e_stat_str(&pf->hw, ret), 4977 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 4978 /* Schedule PF reset to recover */ 4979 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 4980 i40e_service_event_schedule(pf); 4981 } 4982 4983 return ret; 4984 } 4985 4986 /** 4987 * i40e_init_pf_dcb - Initialize DCB configuration 4988 * @pf: PF being configured 4989 * 4990 * Query the current DCB configuration and cache it 4991 * in the hardware structure 4992 **/ 4993 static int i40e_init_pf_dcb(struct i40e_pf *pf) 4994 { 4995 struct i40e_hw *hw = &pf->hw; 4996 int err = 0; 4997 4998 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 4999 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT) 5000 goto out; 5001 5002 /* Get the initial DCB configuration */ 5003 err = i40e_init_dcb(hw); 5004 if (!err) { 5005 /* Device/Function is not DCBX capable */ 5006 if ((!hw->func_caps.dcb) || 5007 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 5008 dev_info(&pf->pdev->dev, 5009 "DCBX offload is not supported or is disabled for this PF.\n"); 5010 5011 if (pf->flags & I40E_FLAG_MFP_ENABLED) 5012 goto out; 5013 5014 } else { 5015 /* When status is not DISABLED then DCBX in FW */ 5016 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 5017 DCB_CAP_DCBX_VER_IEEE; 5018 5019 pf->flags |= I40E_FLAG_DCB_CAPABLE; 5020 /* Enable DCB tagging only when more than one TC */ 5021 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5022 pf->flags |= I40E_FLAG_DCB_ENABLED; 5023 dev_dbg(&pf->pdev->dev, 5024 "DCBX offload is supported for this PF.\n"); 5025 } 5026 } else { 5027 dev_info(&pf->pdev->dev, 5028 "Query for DCB configuration failed, err %s aq_err %s\n", 5029 i40e_stat_str(&pf->hw, err), 5030 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5031 } 5032 5033 out: 5034 return err; 5035 } 5036 #endif /* CONFIG_I40E_DCB */ 5037 #define SPEED_SIZE 14 5038 #define FC_SIZE 8 5039 /** 5040 * i40e_print_link_message - print link up or down 5041 * @vsi: the VSI for which link needs a message 5042 */ 5043 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 5044 { 5045 char *speed = "Unknown"; 5046 char *fc = "Unknown"; 5047 5048 if (vsi->current_isup == isup) 5049 return; 5050 vsi->current_isup = isup; 5051 if (!isup) { 5052 netdev_info(vsi->netdev, "NIC Link is Down\n"); 5053 return; 5054 } 5055 5056 /* Warn user if link speed on NPAR enabled partition is not at 5057 * least 10GB 5058 */ 5059 if (vsi->back->hw.func_caps.npar_enable && 5060 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 5061 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 5062 netdev_warn(vsi->netdev, 5063 "The partition detected link speed that is less than 10Gbps\n"); 5064 5065 switch (vsi->back->hw.phy.link_info.link_speed) { 5066 case I40E_LINK_SPEED_40GB: 5067 speed = "40 G"; 5068 break; 5069 case I40E_LINK_SPEED_20GB: 5070 speed = "20 G"; 5071 break; 5072 case I40E_LINK_SPEED_10GB: 5073 speed = "10 G"; 5074 break; 5075 case I40E_LINK_SPEED_1GB: 5076 speed = "1000 M"; 5077 break; 5078 case I40E_LINK_SPEED_100MB: 5079 speed = "100 M"; 5080 break; 5081 default: 5082 break; 5083 } 5084 5085 switch (vsi->back->hw.fc.current_mode) { 5086 case I40E_FC_FULL: 5087 fc = "RX/TX"; 5088 break; 5089 case I40E_FC_TX_PAUSE: 5090 fc = "TX"; 5091 break; 5092 case I40E_FC_RX_PAUSE: 5093 fc = "RX"; 5094 break; 5095 default: 5096 fc = "None"; 5097 break; 5098 } 5099 5100 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n", 5101 speed, fc); 5102 } 5103 5104 /** 5105 * i40e_up_complete - Finish the last steps of bringing up a connection 5106 * @vsi: the VSI being configured 5107 **/ 5108 static int i40e_up_complete(struct i40e_vsi *vsi) 5109 { 5110 struct i40e_pf *pf = vsi->back; 5111 int err; 5112 5113 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 5114 i40e_vsi_configure_msix(vsi); 5115 else 5116 i40e_configure_msi_and_legacy(vsi); 5117 5118 /* start rings */ 5119 err = i40e_vsi_control_rings(vsi, true); 5120 if (err) 5121 return err; 5122 5123 clear_bit(__I40E_DOWN, &vsi->state); 5124 i40e_napi_enable_all(vsi); 5125 i40e_vsi_enable_irq(vsi); 5126 5127 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 5128 (vsi->netdev)) { 5129 i40e_print_link_message(vsi, true); 5130 netif_tx_start_all_queues(vsi->netdev); 5131 netif_carrier_on(vsi->netdev); 5132 } else if (vsi->netdev) { 5133 i40e_print_link_message(vsi, false); 5134 /* need to check for qualified module here*/ 5135 if ((pf->hw.phy.link_info.link_info & 5136 I40E_AQ_MEDIA_AVAILABLE) && 5137 (!(pf->hw.phy.link_info.an_info & 5138 I40E_AQ_QUALIFIED_MODULE))) 5139 netdev_err(vsi->netdev, 5140 "the driver failed to link because an unqualified module was detected."); 5141 } 5142 5143 /* replay FDIR SB filters */ 5144 if (vsi->type == I40E_VSI_FDIR) { 5145 /* reset fd counters */ 5146 pf->fd_add_err = pf->fd_atr_cnt = 0; 5147 if (pf->fd_tcp_rule > 0) { 5148 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5149 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5150 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n"); 5151 pf->fd_tcp_rule = 0; 5152 } 5153 i40e_fdir_filter_restore(vsi); 5154 } 5155 5156 /* On the next run of the service_task, notify any clients of the new 5157 * opened netdev 5158 */ 5159 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; 5160 i40e_service_event_schedule(pf); 5161 5162 return 0; 5163 } 5164 5165 /** 5166 * i40e_vsi_reinit_locked - Reset the VSI 5167 * @vsi: the VSI being configured 5168 * 5169 * Rebuild the ring structs after some configuration 5170 * has changed, e.g. MTU size. 5171 **/ 5172 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 5173 { 5174 struct i40e_pf *pf = vsi->back; 5175 5176 WARN_ON(in_interrupt()); 5177 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 5178 usleep_range(1000, 2000); 5179 i40e_down(vsi); 5180 5181 /* Give a VF some time to respond to the reset. The 5182 * two second wait is based upon the watchdog cycle in 5183 * the VF driver. 5184 */ 5185 if (vsi->type == I40E_VSI_SRIOV) 5186 msleep(2000); 5187 i40e_up(vsi); 5188 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 5189 } 5190 5191 /** 5192 * i40e_up - Bring the connection back up after being down 5193 * @vsi: the VSI being configured 5194 **/ 5195 int i40e_up(struct i40e_vsi *vsi) 5196 { 5197 int err; 5198 5199 err = i40e_vsi_configure(vsi); 5200 if (!err) 5201 err = i40e_up_complete(vsi); 5202 5203 return err; 5204 } 5205 5206 /** 5207 * i40e_down - Shutdown the connection processing 5208 * @vsi: the VSI being stopped 5209 **/ 5210 void i40e_down(struct i40e_vsi *vsi) 5211 { 5212 int i; 5213 5214 /* It is assumed that the caller of this function 5215 * sets the vsi->state __I40E_DOWN bit. 5216 */ 5217 if (vsi->netdev) { 5218 netif_carrier_off(vsi->netdev); 5219 netif_tx_disable(vsi->netdev); 5220 } 5221 i40e_vsi_disable_irq(vsi); 5222 i40e_vsi_control_rings(vsi, false); 5223 i40e_napi_disable_all(vsi); 5224 5225 for (i = 0; i < vsi->num_queue_pairs; i++) { 5226 i40e_clean_tx_ring(vsi->tx_rings[i]); 5227 i40e_clean_rx_ring(vsi->rx_rings[i]); 5228 } 5229 } 5230 5231 /** 5232 * i40e_setup_tc - configure multiple traffic classes 5233 * @netdev: net device to configure 5234 * @tc: number of traffic classes to enable 5235 **/ 5236 static int i40e_setup_tc(struct net_device *netdev, u8 tc) 5237 { 5238 struct i40e_netdev_priv *np = netdev_priv(netdev); 5239 struct i40e_vsi *vsi = np->vsi; 5240 struct i40e_pf *pf = vsi->back; 5241 u8 enabled_tc = 0; 5242 int ret = -EINVAL; 5243 int i; 5244 5245 /* Check if DCB enabled to continue */ 5246 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 5247 netdev_info(netdev, "DCB is not enabled for adapter\n"); 5248 goto exit; 5249 } 5250 5251 /* Check if MFP enabled */ 5252 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 5253 netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); 5254 goto exit; 5255 } 5256 5257 /* Check whether tc count is within enabled limit */ 5258 if (tc > i40e_pf_get_num_tc(pf)) { 5259 netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); 5260 goto exit; 5261 } 5262 5263 /* Generate TC map for number of tc requested */ 5264 for (i = 0; i < tc; i++) 5265 enabled_tc |= BIT(i); 5266 5267 /* Requesting same TC configuration as already enabled */ 5268 if (enabled_tc == vsi->tc_config.enabled_tc) 5269 return 0; 5270 5271 /* Quiesce VSI queues */ 5272 i40e_quiesce_vsi(vsi); 5273 5274 /* Configure VSI for enabled TCs */ 5275 ret = i40e_vsi_config_tc(vsi, enabled_tc); 5276 if (ret) { 5277 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 5278 vsi->seid); 5279 goto exit; 5280 } 5281 5282 /* Unquiesce VSI */ 5283 i40e_unquiesce_vsi(vsi); 5284 5285 exit: 5286 return ret; 5287 } 5288 5289 #ifdef I40E_FCOE 5290 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto, 5291 struct tc_to_netdev *tc) 5292 #else 5293 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto, 5294 struct tc_to_netdev *tc) 5295 #endif 5296 { 5297 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO) 5298 return -EINVAL; 5299 return i40e_setup_tc(netdev, tc->tc); 5300 } 5301 5302 /** 5303 * i40e_open - Called when a network interface is made active 5304 * @netdev: network interface device structure 5305 * 5306 * The open entry point is called when a network interface is made 5307 * active by the system (IFF_UP). At this point all resources needed 5308 * for transmit and receive operations are allocated, the interrupt 5309 * handler is registered with the OS, the netdev watchdog subtask is 5310 * enabled, and the stack is notified that the interface is ready. 5311 * 5312 * Returns 0 on success, negative value on failure 5313 **/ 5314 int i40e_open(struct net_device *netdev) 5315 { 5316 struct i40e_netdev_priv *np = netdev_priv(netdev); 5317 struct i40e_vsi *vsi = np->vsi; 5318 struct i40e_pf *pf = vsi->back; 5319 int err; 5320 5321 /* disallow open during test or if eeprom is broken */ 5322 if (test_bit(__I40E_TESTING, &pf->state) || 5323 test_bit(__I40E_BAD_EEPROM, &pf->state)) 5324 return -EBUSY; 5325 5326 netif_carrier_off(netdev); 5327 5328 err = i40e_vsi_open(vsi); 5329 if (err) 5330 return err; 5331 5332 /* configure global TSO hardware offload settings */ 5333 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 5334 TCP_FLAG_FIN) >> 16); 5335 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 5336 TCP_FLAG_FIN | 5337 TCP_FLAG_CWR) >> 16); 5338 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 5339 5340 #ifdef CONFIG_I40E_VXLAN 5341 vxlan_get_rx_port(netdev); 5342 #endif 5343 #ifdef CONFIG_I40E_GENEVE 5344 if (pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE) 5345 geneve_get_rx_port(netdev); 5346 #endif 5347 5348 i40e_notify_client_of_netdev_open(vsi); 5349 5350 return 0; 5351 } 5352 5353 /** 5354 * i40e_vsi_open - 5355 * @vsi: the VSI to open 5356 * 5357 * Finish initialization of the VSI. 5358 * 5359 * Returns 0 on success, negative value on failure 5360 **/ 5361 int i40e_vsi_open(struct i40e_vsi *vsi) 5362 { 5363 struct i40e_pf *pf = vsi->back; 5364 char int_name[I40E_INT_NAME_STR_LEN]; 5365 int err; 5366 5367 /* allocate descriptors */ 5368 err = i40e_vsi_setup_tx_resources(vsi); 5369 if (err) 5370 goto err_setup_tx; 5371 err = i40e_vsi_setup_rx_resources(vsi); 5372 if (err) 5373 goto err_setup_rx; 5374 5375 err = i40e_vsi_configure(vsi); 5376 if (err) 5377 goto err_setup_rx; 5378 5379 if (vsi->netdev) { 5380 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 5381 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 5382 err = i40e_vsi_request_irq(vsi, int_name); 5383 if (err) 5384 goto err_setup_rx; 5385 5386 /* Notify the stack of the actual queue counts. */ 5387 err = netif_set_real_num_tx_queues(vsi->netdev, 5388 vsi->num_queue_pairs); 5389 if (err) 5390 goto err_set_queues; 5391 5392 err = netif_set_real_num_rx_queues(vsi->netdev, 5393 vsi->num_queue_pairs); 5394 if (err) 5395 goto err_set_queues; 5396 5397 } else if (vsi->type == I40E_VSI_FDIR) { 5398 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 5399 dev_driver_string(&pf->pdev->dev), 5400 dev_name(&pf->pdev->dev)); 5401 err = i40e_vsi_request_irq(vsi, int_name); 5402 5403 } else { 5404 err = -EINVAL; 5405 goto err_setup_rx; 5406 } 5407 5408 err = i40e_up_complete(vsi); 5409 if (err) 5410 goto err_up_complete; 5411 5412 return 0; 5413 5414 err_up_complete: 5415 i40e_down(vsi); 5416 err_set_queues: 5417 i40e_vsi_free_irq(vsi); 5418 err_setup_rx: 5419 i40e_vsi_free_rx_resources(vsi); 5420 err_setup_tx: 5421 i40e_vsi_free_tx_resources(vsi); 5422 if (vsi == pf->vsi[pf->lan_vsi]) 5423 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 5424 5425 return err; 5426 } 5427 5428 /** 5429 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 5430 * @pf: Pointer to PF 5431 * 5432 * This function destroys the hlist where all the Flow Director 5433 * filters were saved. 5434 **/ 5435 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 5436 { 5437 struct i40e_fdir_filter *filter; 5438 struct hlist_node *node2; 5439 5440 hlist_for_each_entry_safe(filter, node2, 5441 &pf->fdir_filter_list, fdir_node) { 5442 hlist_del(&filter->fdir_node); 5443 kfree(filter); 5444 } 5445 pf->fdir_pf_active_filters = 0; 5446 } 5447 5448 /** 5449 * i40e_close - Disables a network interface 5450 * @netdev: network interface device structure 5451 * 5452 * The close entry point is called when an interface is de-activated 5453 * by the OS. The hardware is still under the driver's control, but 5454 * this netdev interface is disabled. 5455 * 5456 * Returns 0, this is not allowed to fail 5457 **/ 5458 int i40e_close(struct net_device *netdev) 5459 { 5460 struct i40e_netdev_priv *np = netdev_priv(netdev); 5461 struct i40e_vsi *vsi = np->vsi; 5462 5463 i40e_vsi_close(vsi); 5464 5465 return 0; 5466 } 5467 5468 /** 5469 * i40e_do_reset - Start a PF or Core Reset sequence 5470 * @pf: board private structure 5471 * @reset_flags: which reset is requested 5472 * 5473 * The essential difference in resets is that the PF Reset 5474 * doesn't clear the packet buffers, doesn't reset the PE 5475 * firmware, and doesn't bother the other PFs on the chip. 5476 **/ 5477 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) 5478 { 5479 u32 val; 5480 5481 WARN_ON(in_interrupt()); 5482 5483 5484 /* do the biggest reset indicated */ 5485 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { 5486 5487 /* Request a Global Reset 5488 * 5489 * This will start the chip's countdown to the actual full 5490 * chip reset event, and a warning interrupt to be sent 5491 * to all PFs, including the requestor. Our handler 5492 * for the warning interrupt will deal with the shutdown 5493 * and recovery of the switch setup. 5494 */ 5495 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 5496 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5497 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 5498 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5499 5500 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { 5501 5502 /* Request a Core Reset 5503 * 5504 * Same as Global Reset, except does *not* include the MAC/PHY 5505 */ 5506 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 5507 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 5508 val |= I40E_GLGEN_RTRIG_CORER_MASK; 5509 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 5510 i40e_flush(&pf->hw); 5511 5512 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) { 5513 5514 /* Request a PF Reset 5515 * 5516 * Resets only the PF-specific registers 5517 * 5518 * This goes directly to the tear-down and rebuild of 5519 * the switch, since we need to do all the recovery as 5520 * for the Core Reset. 5521 */ 5522 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 5523 i40e_handle_reset_warning(pf); 5524 5525 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { 5526 int v; 5527 5528 /* Find the VSI(s) that requested a re-init */ 5529 dev_info(&pf->pdev->dev, 5530 "VSI reinit requested\n"); 5531 for (v = 0; v < pf->num_alloc_vsi; v++) { 5532 struct i40e_vsi *vsi = pf->vsi[v]; 5533 5534 if (vsi != NULL && 5535 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 5536 i40e_vsi_reinit_locked(pf->vsi[v]); 5537 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); 5538 } 5539 } 5540 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { 5541 int v; 5542 5543 /* Find the VSI(s) that needs to be brought down */ 5544 dev_info(&pf->pdev->dev, "VSI down requested\n"); 5545 for (v = 0; v < pf->num_alloc_vsi; v++) { 5546 struct i40e_vsi *vsi = pf->vsi[v]; 5547 5548 if (vsi != NULL && 5549 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { 5550 set_bit(__I40E_DOWN, &vsi->state); 5551 i40e_down(vsi); 5552 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); 5553 } 5554 } 5555 } else { 5556 dev_info(&pf->pdev->dev, 5557 "bad reset request 0x%08x\n", reset_flags); 5558 } 5559 } 5560 5561 #ifdef CONFIG_I40E_DCB 5562 /** 5563 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 5564 * @pf: board private structure 5565 * @old_cfg: current DCB config 5566 * @new_cfg: new DCB config 5567 **/ 5568 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 5569 struct i40e_dcbx_config *old_cfg, 5570 struct i40e_dcbx_config *new_cfg) 5571 { 5572 bool need_reconfig = false; 5573 5574 /* Check if ETS configuration has changed */ 5575 if (memcmp(&new_cfg->etscfg, 5576 &old_cfg->etscfg, 5577 sizeof(new_cfg->etscfg))) { 5578 /* If Priority Table has changed reconfig is needed */ 5579 if (memcmp(&new_cfg->etscfg.prioritytable, 5580 &old_cfg->etscfg.prioritytable, 5581 sizeof(new_cfg->etscfg.prioritytable))) { 5582 need_reconfig = true; 5583 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 5584 } 5585 5586 if (memcmp(&new_cfg->etscfg.tcbwtable, 5587 &old_cfg->etscfg.tcbwtable, 5588 sizeof(new_cfg->etscfg.tcbwtable))) 5589 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 5590 5591 if (memcmp(&new_cfg->etscfg.tsatable, 5592 &old_cfg->etscfg.tsatable, 5593 sizeof(new_cfg->etscfg.tsatable))) 5594 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 5595 } 5596 5597 /* Check if PFC configuration has changed */ 5598 if (memcmp(&new_cfg->pfc, 5599 &old_cfg->pfc, 5600 sizeof(new_cfg->pfc))) { 5601 need_reconfig = true; 5602 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 5603 } 5604 5605 /* Check if APP Table has changed */ 5606 if (memcmp(&new_cfg->app, 5607 &old_cfg->app, 5608 sizeof(new_cfg->app))) { 5609 need_reconfig = true; 5610 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 5611 } 5612 5613 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig); 5614 return need_reconfig; 5615 } 5616 5617 /** 5618 * i40e_handle_lldp_event - Handle LLDP Change MIB event 5619 * @pf: board private structure 5620 * @e: event info posted on ARQ 5621 **/ 5622 static int i40e_handle_lldp_event(struct i40e_pf *pf, 5623 struct i40e_arq_event_info *e) 5624 { 5625 struct i40e_aqc_lldp_get_mib *mib = 5626 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 5627 struct i40e_hw *hw = &pf->hw; 5628 struct i40e_dcbx_config tmp_dcbx_cfg; 5629 bool need_reconfig = false; 5630 int ret = 0; 5631 u8 type; 5632 5633 /* Not DCB capable or capability disabled */ 5634 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 5635 return ret; 5636 5637 /* Ignore if event is not for Nearest Bridge */ 5638 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 5639 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 5640 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type); 5641 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 5642 return ret; 5643 5644 /* Check MIB Type and return if event for Remote MIB update */ 5645 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 5646 dev_dbg(&pf->pdev->dev, 5647 "LLDP event mib type %s\n", type ? "remote" : "local"); 5648 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 5649 /* Update the remote cached instance and return */ 5650 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 5651 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 5652 &hw->remote_dcbx_config); 5653 goto exit; 5654 } 5655 5656 /* Store the old configuration */ 5657 tmp_dcbx_cfg = hw->local_dcbx_config; 5658 5659 /* Reset the old DCBx configuration data */ 5660 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 5661 /* Get updated DCBX data from firmware */ 5662 ret = i40e_get_dcb_config(&pf->hw); 5663 if (ret) { 5664 dev_info(&pf->pdev->dev, 5665 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", 5666 i40e_stat_str(&pf->hw, ret), 5667 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5668 goto exit; 5669 } 5670 5671 /* No change detected in DCBX configs */ 5672 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 5673 sizeof(tmp_dcbx_cfg))) { 5674 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 5675 goto exit; 5676 } 5677 5678 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 5679 &hw->local_dcbx_config); 5680 5681 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 5682 5683 if (!need_reconfig) 5684 goto exit; 5685 5686 /* Enable DCB tagging only when more than one TC */ 5687 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 5688 pf->flags |= I40E_FLAG_DCB_ENABLED; 5689 else 5690 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 5691 5692 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5693 /* Reconfiguration needed quiesce all VSIs */ 5694 i40e_pf_quiesce_all_vsi(pf); 5695 5696 /* Changes in configuration update VEB/VSI */ 5697 i40e_dcb_reconfigure(pf); 5698 5699 ret = i40e_resume_port_tx(pf); 5700 5701 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state); 5702 /* In case of error no point in resuming VSIs */ 5703 if (ret) 5704 goto exit; 5705 5706 /* Wait for the PF's queues to be disabled */ 5707 ret = i40e_pf_wait_queues_disabled(pf); 5708 if (ret) { 5709 /* Schedule PF reset to recover */ 5710 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 5711 i40e_service_event_schedule(pf); 5712 } else { 5713 i40e_pf_unquiesce_all_vsi(pf); 5714 } 5715 5716 exit: 5717 return ret; 5718 } 5719 #endif /* CONFIG_I40E_DCB */ 5720 5721 /** 5722 * i40e_do_reset_safe - Protected reset path for userland calls. 5723 * @pf: board private structure 5724 * @reset_flags: which reset is requested 5725 * 5726 **/ 5727 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 5728 { 5729 rtnl_lock(); 5730 i40e_do_reset(pf, reset_flags); 5731 rtnl_unlock(); 5732 } 5733 5734 /** 5735 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 5736 * @pf: board private structure 5737 * @e: event info posted on ARQ 5738 * 5739 * Handler for LAN Queue Overflow Event generated by the firmware for PF 5740 * and VF queues 5741 **/ 5742 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 5743 struct i40e_arq_event_info *e) 5744 { 5745 struct i40e_aqc_lan_overflow *data = 5746 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 5747 u32 queue = le32_to_cpu(data->prtdcb_rupto); 5748 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 5749 struct i40e_hw *hw = &pf->hw; 5750 struct i40e_vf *vf; 5751 u16 vf_id; 5752 5753 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 5754 queue, qtx_ctl); 5755 5756 /* Queue belongs to VF, find the VF and issue VF reset */ 5757 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 5758 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 5759 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 5760 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 5761 vf_id -= hw->func_caps.vf_base_id; 5762 vf = &pf->vf[vf_id]; 5763 i40e_vc_notify_vf_reset(vf); 5764 /* Allow VF to process pending reset notification */ 5765 msleep(20); 5766 i40e_reset_vf(vf, false); 5767 } 5768 } 5769 5770 /** 5771 * i40e_service_event_complete - Finish up the service event 5772 * @pf: board private structure 5773 **/ 5774 static void i40e_service_event_complete(struct i40e_pf *pf) 5775 { 5776 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); 5777 5778 /* flush memory to make sure state is correct before next watchog */ 5779 smp_mb__before_atomic(); 5780 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 5781 } 5782 5783 /** 5784 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 5785 * @pf: board private structure 5786 **/ 5787 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 5788 { 5789 u32 val, fcnt_prog; 5790 5791 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5792 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 5793 return fcnt_prog; 5794 } 5795 5796 /** 5797 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 5798 * @pf: board private structure 5799 **/ 5800 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 5801 { 5802 u32 val, fcnt_prog; 5803 5804 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 5805 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 5806 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 5807 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 5808 return fcnt_prog; 5809 } 5810 5811 /** 5812 * i40e_get_global_fd_count - Get total FD filters programmed on device 5813 * @pf: board private structure 5814 **/ 5815 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 5816 { 5817 u32 val, fcnt_prog; 5818 5819 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 5820 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 5821 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 5822 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 5823 return fcnt_prog; 5824 } 5825 5826 /** 5827 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 5828 * @pf: board private structure 5829 **/ 5830 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 5831 { 5832 struct i40e_fdir_filter *filter; 5833 u32 fcnt_prog, fcnt_avail; 5834 struct hlist_node *node; 5835 5836 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5837 return; 5838 5839 /* Check if, FD SB or ATR was auto disabled and if there is enough room 5840 * to re-enable 5841 */ 5842 fcnt_prog = i40e_get_global_fd_count(pf); 5843 fcnt_avail = pf->fdir_pf_filter_count; 5844 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 5845 (pf->fd_add_err == 0) || 5846 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 5847 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 5848 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 5849 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 5850 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5851 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 5852 } 5853 } 5854 /* Wait for some more space to be available to turn on ATR */ 5855 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { 5856 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 5857 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5858 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5859 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5860 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); 5861 } 5862 } 5863 5864 /* if hw had a problem adding a filter, delete it */ 5865 if (pf->fd_inv > 0) { 5866 hlist_for_each_entry_safe(filter, node, 5867 &pf->fdir_filter_list, fdir_node) { 5868 if (filter->fd_id == pf->fd_inv) { 5869 hlist_del(&filter->fdir_node); 5870 kfree(filter); 5871 pf->fdir_pf_active_filters--; 5872 } 5873 } 5874 } 5875 } 5876 5877 #define I40E_MIN_FD_FLUSH_INTERVAL 10 5878 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 5879 /** 5880 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 5881 * @pf: board private structure 5882 **/ 5883 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 5884 { 5885 unsigned long min_flush_time; 5886 int flush_wait_retry = 50; 5887 bool disable_atr = false; 5888 int fd_room; 5889 int reg; 5890 5891 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5892 return; 5893 5894 if (!time_after(jiffies, pf->fd_flush_timestamp + 5895 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) 5896 return; 5897 5898 /* If the flush is happening too quick and we have mostly SB rules we 5899 * should not re-enable ATR for some time. 5900 */ 5901 min_flush_time = pf->fd_flush_timestamp + 5902 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 5903 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 5904 5905 if (!(time_after(jiffies, min_flush_time)) && 5906 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 5907 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5908 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 5909 disable_atr = true; 5910 } 5911 5912 pf->fd_flush_timestamp = jiffies; 5913 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 5914 /* flush all filters */ 5915 wr32(&pf->hw, I40E_PFQF_CTL_1, 5916 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 5917 i40e_flush(&pf->hw); 5918 pf->fd_flush_cnt++; 5919 pf->fd_add_err = 0; 5920 do { 5921 /* Check FD flush status every 5-6msec */ 5922 usleep_range(5000, 6000); 5923 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 5924 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 5925 break; 5926 } while (flush_wait_retry--); 5927 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 5928 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 5929 } else { 5930 /* replay sideband filters */ 5931 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 5932 if (!disable_atr) 5933 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 5934 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 5935 if (I40E_DEBUG_FD & pf->hw.debug_mask) 5936 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 5937 } 5938 5939 } 5940 5941 /** 5942 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 5943 * @pf: board private structure 5944 **/ 5945 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 5946 { 5947 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 5948 } 5949 5950 /* We can see up to 256 filter programming desc in transit if the filters are 5951 * being applied really fast; before we see the first 5952 * filter miss error on Rx queue 0. Accumulating enough error messages before 5953 * reacting will make sure we don't cause flush too often. 5954 */ 5955 #define I40E_MAX_FD_PROGRAM_ERROR 256 5956 5957 /** 5958 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 5959 * @pf: board private structure 5960 **/ 5961 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 5962 { 5963 5964 /* if interface is down do nothing */ 5965 if (test_bit(__I40E_DOWN, &pf->state)) 5966 return; 5967 5968 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))) 5969 return; 5970 5971 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 5972 i40e_fdir_flush_and_replay(pf); 5973 5974 i40e_fdir_check_and_reenable(pf); 5975 5976 } 5977 5978 /** 5979 * i40e_vsi_link_event - notify VSI of a link event 5980 * @vsi: vsi to be notified 5981 * @link_up: link up or down 5982 **/ 5983 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 5984 { 5985 if (!vsi || test_bit(__I40E_DOWN, &vsi->state)) 5986 return; 5987 5988 switch (vsi->type) { 5989 case I40E_VSI_MAIN: 5990 #ifdef I40E_FCOE 5991 case I40E_VSI_FCOE: 5992 #endif 5993 if (!vsi->netdev || !vsi->netdev_registered) 5994 break; 5995 5996 if (link_up) { 5997 netif_carrier_on(vsi->netdev); 5998 netif_tx_wake_all_queues(vsi->netdev); 5999 } else { 6000 netif_carrier_off(vsi->netdev); 6001 netif_tx_stop_all_queues(vsi->netdev); 6002 } 6003 break; 6004 6005 case I40E_VSI_SRIOV: 6006 case I40E_VSI_VMDQ2: 6007 case I40E_VSI_CTRL: 6008 case I40E_VSI_IWARP: 6009 case I40E_VSI_MIRROR: 6010 default: 6011 /* there is no notification for other VSIs */ 6012 break; 6013 } 6014 } 6015 6016 /** 6017 * i40e_veb_link_event - notify elements on the veb of a link event 6018 * @veb: veb to be notified 6019 * @link_up: link up or down 6020 **/ 6021 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 6022 { 6023 struct i40e_pf *pf; 6024 int i; 6025 6026 if (!veb || !veb->pf) 6027 return; 6028 pf = veb->pf; 6029 6030 /* depth first... */ 6031 for (i = 0; i < I40E_MAX_VEB; i++) 6032 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 6033 i40e_veb_link_event(pf->veb[i], link_up); 6034 6035 /* ... now the local VSIs */ 6036 for (i = 0; i < pf->num_alloc_vsi; i++) 6037 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 6038 i40e_vsi_link_event(pf->vsi[i], link_up); 6039 } 6040 6041 /** 6042 * i40e_link_event - Update netif_carrier status 6043 * @pf: board private structure 6044 **/ 6045 static void i40e_link_event(struct i40e_pf *pf) 6046 { 6047 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6048 u8 new_link_speed, old_link_speed; 6049 i40e_status status; 6050 bool new_link, old_link; 6051 6052 /* save off old link status information */ 6053 pf->hw.phy.link_info_old = pf->hw.phy.link_info; 6054 6055 /* set this to force the get_link_status call to refresh state */ 6056 pf->hw.phy.get_link_info = true; 6057 6058 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 6059 6060 status = i40e_get_link_status(&pf->hw, &new_link); 6061 if (status) { 6062 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n", 6063 status); 6064 return; 6065 } 6066 6067 old_link_speed = pf->hw.phy.link_info_old.link_speed; 6068 new_link_speed = pf->hw.phy.link_info.link_speed; 6069 6070 if (new_link == old_link && 6071 new_link_speed == old_link_speed && 6072 (test_bit(__I40E_DOWN, &vsi->state) || 6073 new_link == netif_carrier_ok(vsi->netdev))) 6074 return; 6075 6076 if (!test_bit(__I40E_DOWN, &vsi->state)) 6077 i40e_print_link_message(vsi, new_link); 6078 6079 /* Notify the base of the switch tree connected to 6080 * the link. Floating VEBs are not notified. 6081 */ 6082 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 6083 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 6084 else 6085 i40e_vsi_link_event(vsi, new_link); 6086 6087 if (pf->vf) 6088 i40e_vc_notify_link_state(pf); 6089 6090 if (pf->flags & I40E_FLAG_PTP) 6091 i40e_ptp_set_increment(pf); 6092 } 6093 6094 /** 6095 * i40e_watchdog_subtask - periodic checks not using event driven response 6096 * @pf: board private structure 6097 **/ 6098 static void i40e_watchdog_subtask(struct i40e_pf *pf) 6099 { 6100 int i; 6101 6102 /* if interface is down do nothing */ 6103 if (test_bit(__I40E_DOWN, &pf->state) || 6104 test_bit(__I40E_CONFIG_BUSY, &pf->state)) 6105 return; 6106 6107 /* make sure we don't do these things too often */ 6108 if (time_before(jiffies, (pf->service_timer_previous + 6109 pf->service_timer_period))) 6110 return; 6111 pf->service_timer_previous = jiffies; 6112 6113 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) 6114 i40e_link_event(pf); 6115 6116 /* Update the stats for active netdevs so the network stack 6117 * can look at updated numbers whenever it cares to 6118 */ 6119 for (i = 0; i < pf->num_alloc_vsi; i++) 6120 if (pf->vsi[i] && pf->vsi[i]->netdev) 6121 i40e_update_stats(pf->vsi[i]); 6122 6123 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) { 6124 /* Update the stats for the active switching components */ 6125 for (i = 0; i < I40E_MAX_VEB; i++) 6126 if (pf->veb[i]) 6127 i40e_update_veb_stats(pf->veb[i]); 6128 } 6129 6130 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); 6131 } 6132 6133 /** 6134 * i40e_reset_subtask - Set up for resetting the device and driver 6135 * @pf: board private structure 6136 **/ 6137 static void i40e_reset_subtask(struct i40e_pf *pf) 6138 { 6139 u32 reset_flags = 0; 6140 6141 rtnl_lock(); 6142 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { 6143 reset_flags |= BIT(__I40E_REINIT_REQUESTED); 6144 clear_bit(__I40E_REINIT_REQUESTED, &pf->state); 6145 } 6146 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { 6147 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED); 6148 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 6149 } 6150 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { 6151 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED); 6152 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); 6153 } 6154 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { 6155 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); 6156 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); 6157 } 6158 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { 6159 reset_flags |= BIT(__I40E_DOWN_REQUESTED); 6160 clear_bit(__I40E_DOWN_REQUESTED, &pf->state); 6161 } 6162 6163 /* If there's a recovery already waiting, it takes 6164 * precedence before starting a new reset sequence. 6165 */ 6166 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { 6167 i40e_handle_reset_warning(pf); 6168 goto unlock; 6169 } 6170 6171 /* If we're already down or resetting, just bail */ 6172 if (reset_flags && 6173 !test_bit(__I40E_DOWN, &pf->state) && 6174 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) 6175 i40e_do_reset(pf, reset_flags); 6176 6177 unlock: 6178 rtnl_unlock(); 6179 } 6180 6181 /** 6182 * i40e_handle_link_event - Handle link event 6183 * @pf: board private structure 6184 * @e: event info posted on ARQ 6185 **/ 6186 static void i40e_handle_link_event(struct i40e_pf *pf, 6187 struct i40e_arq_event_info *e) 6188 { 6189 struct i40e_aqc_get_link_status *status = 6190 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 6191 6192 /* Do a new status request to re-enable LSE reporting 6193 * and load new status information into the hw struct 6194 * This completely ignores any state information 6195 * in the ARQ event info, instead choosing to always 6196 * issue the AQ update link status command. 6197 */ 6198 i40e_link_event(pf); 6199 6200 /* check for unqualified module, if link is down */ 6201 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 6202 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 6203 (!(status->link_info & I40E_AQ_LINK_UP))) 6204 dev_err(&pf->pdev->dev, 6205 "The driver failed to link because an unqualified module was detected.\n"); 6206 } 6207 6208 /** 6209 * i40e_clean_adminq_subtask - Clean the AdminQ rings 6210 * @pf: board private structure 6211 **/ 6212 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 6213 { 6214 struct i40e_arq_event_info event; 6215 struct i40e_hw *hw = &pf->hw; 6216 u16 pending, i = 0; 6217 i40e_status ret; 6218 u16 opcode; 6219 u32 oldval; 6220 u32 val; 6221 6222 /* Do not run clean AQ when PF reset fails */ 6223 if (test_bit(__I40E_RESET_FAILED, &pf->state)) 6224 return; 6225 6226 /* check for error indications */ 6227 val = rd32(&pf->hw, pf->hw.aq.arq.len); 6228 oldval = val; 6229 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 6230 if (hw->debug_mask & I40E_DEBUG_AQ) 6231 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 6232 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 6233 } 6234 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 6235 if (hw->debug_mask & I40E_DEBUG_AQ) 6236 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 6237 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 6238 pf->arq_overflows++; 6239 } 6240 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 6241 if (hw->debug_mask & I40E_DEBUG_AQ) 6242 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 6243 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 6244 } 6245 if (oldval != val) 6246 wr32(&pf->hw, pf->hw.aq.arq.len, val); 6247 6248 val = rd32(&pf->hw, pf->hw.aq.asq.len); 6249 oldval = val; 6250 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 6251 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6252 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 6253 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 6254 } 6255 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 6256 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6257 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 6258 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 6259 } 6260 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 6261 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 6262 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 6263 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 6264 } 6265 if (oldval != val) 6266 wr32(&pf->hw, pf->hw.aq.asq.len, val); 6267 6268 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 6269 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 6270 if (!event.msg_buf) 6271 return; 6272 6273 do { 6274 ret = i40e_clean_arq_element(hw, &event, &pending); 6275 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 6276 break; 6277 else if (ret) { 6278 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 6279 break; 6280 } 6281 6282 opcode = le16_to_cpu(event.desc.opcode); 6283 switch (opcode) { 6284 6285 case i40e_aqc_opc_get_link_status: 6286 i40e_handle_link_event(pf, &event); 6287 break; 6288 case i40e_aqc_opc_send_msg_to_pf: 6289 ret = i40e_vc_process_vf_msg(pf, 6290 le16_to_cpu(event.desc.retval), 6291 le32_to_cpu(event.desc.cookie_high), 6292 le32_to_cpu(event.desc.cookie_low), 6293 event.msg_buf, 6294 event.msg_len); 6295 break; 6296 case i40e_aqc_opc_lldp_update_mib: 6297 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 6298 #ifdef CONFIG_I40E_DCB 6299 rtnl_lock(); 6300 ret = i40e_handle_lldp_event(pf, &event); 6301 rtnl_unlock(); 6302 #endif /* CONFIG_I40E_DCB */ 6303 break; 6304 case i40e_aqc_opc_event_lan_overflow: 6305 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 6306 i40e_handle_lan_overflow_event(pf, &event); 6307 break; 6308 case i40e_aqc_opc_send_msg_to_peer: 6309 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 6310 break; 6311 case i40e_aqc_opc_nvm_erase: 6312 case i40e_aqc_opc_nvm_update: 6313 case i40e_aqc_opc_oem_post_update: 6314 i40e_debug(&pf->hw, I40E_DEBUG_NVM, 6315 "ARQ NVM operation 0x%04x completed\n", 6316 opcode); 6317 break; 6318 default: 6319 dev_info(&pf->pdev->dev, 6320 "ARQ: Unknown event 0x%04x ignored\n", 6321 opcode); 6322 break; 6323 } 6324 } while (pending && (i++ < pf->adminq_work_limit)); 6325 6326 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); 6327 /* re-enable Admin queue interrupt cause */ 6328 val = rd32(hw, I40E_PFINT_ICR0_ENA); 6329 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 6330 wr32(hw, I40E_PFINT_ICR0_ENA, val); 6331 i40e_flush(hw); 6332 6333 kfree(event.msg_buf); 6334 } 6335 6336 /** 6337 * i40e_verify_eeprom - make sure eeprom is good to use 6338 * @pf: board private structure 6339 **/ 6340 static void i40e_verify_eeprom(struct i40e_pf *pf) 6341 { 6342 int err; 6343 6344 err = i40e_diag_eeprom_test(&pf->hw); 6345 if (err) { 6346 /* retry in case of garbage read */ 6347 err = i40e_diag_eeprom_test(&pf->hw); 6348 if (err) { 6349 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 6350 err); 6351 set_bit(__I40E_BAD_EEPROM, &pf->state); 6352 } 6353 } 6354 6355 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { 6356 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 6357 clear_bit(__I40E_BAD_EEPROM, &pf->state); 6358 } 6359 } 6360 6361 /** 6362 * i40e_enable_pf_switch_lb 6363 * @pf: pointer to the PF structure 6364 * 6365 * enable switch loop back or die - no point in a return value 6366 **/ 6367 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 6368 { 6369 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6370 struct i40e_vsi_context ctxt; 6371 int ret; 6372 6373 ctxt.seid = pf->main_vsi_seid; 6374 ctxt.pf_num = pf->hw.pf_id; 6375 ctxt.vf_num = 0; 6376 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6377 if (ret) { 6378 dev_info(&pf->pdev->dev, 6379 "couldn't get PF vsi config, err %s aq_err %s\n", 6380 i40e_stat_str(&pf->hw, ret), 6381 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6382 return; 6383 } 6384 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6385 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6386 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6387 6388 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6389 if (ret) { 6390 dev_info(&pf->pdev->dev, 6391 "update vsi switch failed, err %s aq_err %s\n", 6392 i40e_stat_str(&pf->hw, ret), 6393 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6394 } 6395 } 6396 6397 /** 6398 * i40e_disable_pf_switch_lb 6399 * @pf: pointer to the PF structure 6400 * 6401 * disable switch loop back or die - no point in a return value 6402 **/ 6403 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 6404 { 6405 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 6406 struct i40e_vsi_context ctxt; 6407 int ret; 6408 6409 ctxt.seid = pf->main_vsi_seid; 6410 ctxt.pf_num = pf->hw.pf_id; 6411 ctxt.vf_num = 0; 6412 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 6413 if (ret) { 6414 dev_info(&pf->pdev->dev, 6415 "couldn't get PF vsi config, err %s aq_err %s\n", 6416 i40e_stat_str(&pf->hw, ret), 6417 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6418 return; 6419 } 6420 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 6421 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 6422 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 6423 6424 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 6425 if (ret) { 6426 dev_info(&pf->pdev->dev, 6427 "update vsi switch failed, err %s aq_err %s\n", 6428 i40e_stat_str(&pf->hw, ret), 6429 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6430 } 6431 } 6432 6433 /** 6434 * i40e_config_bridge_mode - Configure the HW bridge mode 6435 * @veb: pointer to the bridge instance 6436 * 6437 * Configure the loop back mode for the LAN VSI that is downlink to the 6438 * specified HW bridge instance. It is expected this function is called 6439 * when a new HW bridge is instantiated. 6440 **/ 6441 static void i40e_config_bridge_mode(struct i40e_veb *veb) 6442 { 6443 struct i40e_pf *pf = veb->pf; 6444 6445 if (pf->hw.debug_mask & I40E_DEBUG_LAN) 6446 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 6447 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 6448 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 6449 i40e_disable_pf_switch_lb(pf); 6450 else 6451 i40e_enable_pf_switch_lb(pf); 6452 } 6453 6454 /** 6455 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 6456 * @veb: pointer to the VEB instance 6457 * 6458 * This is a recursive function that first builds the attached VSIs then 6459 * recurses in to build the next layer of VEB. We track the connections 6460 * through our own index numbers because the seid's from the HW could 6461 * change across the reset. 6462 **/ 6463 static int i40e_reconstitute_veb(struct i40e_veb *veb) 6464 { 6465 struct i40e_vsi *ctl_vsi = NULL; 6466 struct i40e_pf *pf = veb->pf; 6467 int v, veb_idx; 6468 int ret; 6469 6470 /* build VSI that owns this VEB, temporarily attached to base VEB */ 6471 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 6472 if (pf->vsi[v] && 6473 pf->vsi[v]->veb_idx == veb->idx && 6474 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 6475 ctl_vsi = pf->vsi[v]; 6476 break; 6477 } 6478 } 6479 if (!ctl_vsi) { 6480 dev_info(&pf->pdev->dev, 6481 "missing owner VSI for veb_idx %d\n", veb->idx); 6482 ret = -ENOENT; 6483 goto end_reconstitute; 6484 } 6485 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 6486 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 6487 ret = i40e_add_vsi(ctl_vsi); 6488 if (ret) { 6489 dev_info(&pf->pdev->dev, 6490 "rebuild of veb_idx %d owner VSI failed: %d\n", 6491 veb->idx, ret); 6492 goto end_reconstitute; 6493 } 6494 i40e_vsi_reset_stats(ctl_vsi); 6495 6496 /* create the VEB in the switch and move the VSI onto the VEB */ 6497 ret = i40e_add_veb(veb, ctl_vsi); 6498 if (ret) 6499 goto end_reconstitute; 6500 6501 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 6502 veb->bridge_mode = BRIDGE_MODE_VEB; 6503 else 6504 veb->bridge_mode = BRIDGE_MODE_VEPA; 6505 i40e_config_bridge_mode(veb); 6506 6507 /* create the remaining VSIs attached to this VEB */ 6508 for (v = 0; v < pf->num_alloc_vsi; v++) { 6509 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 6510 continue; 6511 6512 if (pf->vsi[v]->veb_idx == veb->idx) { 6513 struct i40e_vsi *vsi = pf->vsi[v]; 6514 6515 vsi->uplink_seid = veb->seid; 6516 ret = i40e_add_vsi(vsi); 6517 if (ret) { 6518 dev_info(&pf->pdev->dev, 6519 "rebuild of vsi_idx %d failed: %d\n", 6520 v, ret); 6521 goto end_reconstitute; 6522 } 6523 i40e_vsi_reset_stats(vsi); 6524 } 6525 } 6526 6527 /* create any VEBs attached to this VEB - RECURSION */ 6528 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 6529 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 6530 pf->veb[veb_idx]->uplink_seid = veb->seid; 6531 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 6532 if (ret) 6533 break; 6534 } 6535 } 6536 6537 end_reconstitute: 6538 return ret; 6539 } 6540 6541 /** 6542 * i40e_get_capabilities - get info about the HW 6543 * @pf: the PF struct 6544 **/ 6545 static int i40e_get_capabilities(struct i40e_pf *pf) 6546 { 6547 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 6548 u16 data_size; 6549 int buf_len; 6550 int err; 6551 6552 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 6553 do { 6554 cap_buf = kzalloc(buf_len, GFP_KERNEL); 6555 if (!cap_buf) 6556 return -ENOMEM; 6557 6558 /* this loads the data into the hw struct for us */ 6559 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 6560 &data_size, 6561 i40e_aqc_opc_list_func_capabilities, 6562 NULL); 6563 /* data loaded, buffer no longer needed */ 6564 kfree(cap_buf); 6565 6566 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 6567 /* retry with a larger buffer */ 6568 buf_len = data_size; 6569 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 6570 dev_info(&pf->pdev->dev, 6571 "capability discovery failed, err %s aq_err %s\n", 6572 i40e_stat_str(&pf->hw, err), 6573 i40e_aq_str(&pf->hw, 6574 pf->hw.aq.asq_last_status)); 6575 return -ENODEV; 6576 } 6577 } while (err); 6578 6579 if (pf->hw.debug_mask & I40E_DEBUG_USER) 6580 dev_info(&pf->pdev->dev, 6581 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 6582 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 6583 pf->hw.func_caps.num_msix_vectors, 6584 pf->hw.func_caps.num_msix_vectors_vf, 6585 pf->hw.func_caps.fd_filters_guaranteed, 6586 pf->hw.func_caps.fd_filters_best_effort, 6587 pf->hw.func_caps.num_tx_qp, 6588 pf->hw.func_caps.num_vsis); 6589 6590 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 6591 + pf->hw.func_caps.num_vfs) 6592 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 6593 dev_info(&pf->pdev->dev, 6594 "got num_vsis %d, setting num_vsis to %d\n", 6595 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 6596 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 6597 } 6598 6599 return 0; 6600 } 6601 6602 static int i40e_vsi_clear(struct i40e_vsi *vsi); 6603 6604 /** 6605 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 6606 * @pf: board private structure 6607 **/ 6608 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 6609 { 6610 struct i40e_vsi *vsi; 6611 int i; 6612 6613 /* quick workaround for an NVM issue that leaves a critical register 6614 * uninitialized 6615 */ 6616 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 6617 static const u32 hkey[] = { 6618 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 6619 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 6620 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 6621 0x95b3a76d}; 6622 6623 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 6624 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 6625 } 6626 6627 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 6628 return; 6629 6630 /* find existing VSI and see if it needs configuring */ 6631 vsi = NULL; 6632 for (i = 0; i < pf->num_alloc_vsi; i++) { 6633 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6634 vsi = pf->vsi[i]; 6635 break; 6636 } 6637 } 6638 6639 /* create a new VSI if none exists */ 6640 if (!vsi) { 6641 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 6642 pf->vsi[pf->lan_vsi]->seid, 0); 6643 if (!vsi) { 6644 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 6645 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 6646 return; 6647 } 6648 } 6649 6650 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 6651 } 6652 6653 /** 6654 * i40e_fdir_teardown - release the Flow Director resources 6655 * @pf: board private structure 6656 **/ 6657 static void i40e_fdir_teardown(struct i40e_pf *pf) 6658 { 6659 int i; 6660 6661 i40e_fdir_filter_exit(pf); 6662 for (i = 0; i < pf->num_alloc_vsi; i++) { 6663 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 6664 i40e_vsi_release(pf->vsi[i]); 6665 break; 6666 } 6667 } 6668 } 6669 6670 /** 6671 * i40e_prep_for_reset - prep for the core to reset 6672 * @pf: board private structure 6673 * 6674 * Close up the VFs and other things in prep for PF Reset. 6675 **/ 6676 static void i40e_prep_for_reset(struct i40e_pf *pf) 6677 { 6678 struct i40e_hw *hw = &pf->hw; 6679 i40e_status ret = 0; 6680 u32 v; 6681 6682 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 6683 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) 6684 return; 6685 if (i40e_check_asq_alive(&pf->hw)) 6686 i40e_vc_notify_reset(pf); 6687 6688 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 6689 6690 /* quiesce the VSIs and their queues that are not already DOWN */ 6691 i40e_pf_quiesce_all_vsi(pf); 6692 6693 for (v = 0; v < pf->num_alloc_vsi; v++) { 6694 if (pf->vsi[v]) 6695 pf->vsi[v]->seid = 0; 6696 } 6697 6698 i40e_shutdown_adminq(&pf->hw); 6699 6700 /* call shutdown HMC */ 6701 if (hw->hmc.hmc_obj) { 6702 ret = i40e_shutdown_lan_hmc(hw); 6703 if (ret) 6704 dev_warn(&pf->pdev->dev, 6705 "shutdown_lan_hmc failed: %d\n", ret); 6706 } 6707 } 6708 6709 /** 6710 * i40e_send_version - update firmware with driver version 6711 * @pf: PF struct 6712 */ 6713 static void i40e_send_version(struct i40e_pf *pf) 6714 { 6715 struct i40e_driver_version dv; 6716 6717 dv.major_version = DRV_VERSION_MAJOR; 6718 dv.minor_version = DRV_VERSION_MINOR; 6719 dv.build_version = DRV_VERSION_BUILD; 6720 dv.subbuild_version = 0; 6721 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 6722 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 6723 } 6724 6725 /** 6726 * i40e_reset_and_rebuild - reset and rebuild using a saved config 6727 * @pf: board private structure 6728 * @reinit: if the Main VSI needs to re-initialized. 6729 **/ 6730 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 6731 { 6732 struct i40e_hw *hw = &pf->hw; 6733 u8 set_fc_aq_fail = 0; 6734 i40e_status ret; 6735 u32 val; 6736 u32 v; 6737 6738 /* Now we wait for GRST to settle out. 6739 * We don't have to delete the VEBs or VSIs from the hw switch 6740 * because the reset will make them disappear. 6741 */ 6742 ret = i40e_pf_reset(hw); 6743 if (ret) { 6744 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 6745 set_bit(__I40E_RESET_FAILED, &pf->state); 6746 goto clear_recovery; 6747 } 6748 pf->pfr_count++; 6749 6750 if (test_bit(__I40E_DOWN, &pf->state)) 6751 goto clear_recovery; 6752 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 6753 6754 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 6755 ret = i40e_init_adminq(&pf->hw); 6756 if (ret) { 6757 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", 6758 i40e_stat_str(&pf->hw, ret), 6759 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6760 goto clear_recovery; 6761 } 6762 6763 /* re-verify the eeprom if we just had an EMP reset */ 6764 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state)) 6765 i40e_verify_eeprom(pf); 6766 6767 i40e_clear_pxe_mode(hw); 6768 ret = i40e_get_capabilities(pf); 6769 if (ret) 6770 goto end_core_reset; 6771 6772 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 6773 hw->func_caps.num_rx_qp, 6774 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 6775 if (ret) { 6776 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 6777 goto end_core_reset; 6778 } 6779 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 6780 if (ret) { 6781 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 6782 goto end_core_reset; 6783 } 6784 6785 #ifdef CONFIG_I40E_DCB 6786 ret = i40e_init_pf_dcb(pf); 6787 if (ret) { 6788 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 6789 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 6790 /* Continue without DCB enabled */ 6791 } 6792 #endif /* CONFIG_I40E_DCB */ 6793 #ifdef I40E_FCOE 6794 i40e_init_pf_fcoe(pf); 6795 6796 #endif 6797 /* do basic switch setup */ 6798 ret = i40e_setup_pf_switch(pf, reinit); 6799 if (ret) 6800 goto end_core_reset; 6801 6802 /* The driver only wants link up/down and module qualification 6803 * reports from firmware. Note the negative logic. 6804 */ 6805 ret = i40e_aq_set_phy_int_mask(&pf->hw, 6806 ~(I40E_AQ_EVENT_LINK_UPDOWN | 6807 I40E_AQ_EVENT_MEDIA_NA | 6808 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 6809 if (ret) 6810 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 6811 i40e_stat_str(&pf->hw, ret), 6812 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6813 6814 /* make sure our flow control settings are restored */ 6815 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 6816 if (ret) 6817 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n", 6818 i40e_stat_str(&pf->hw, ret), 6819 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6820 6821 /* Rebuild the VSIs and VEBs that existed before reset. 6822 * They are still in our local switch element arrays, so only 6823 * need to rebuild the switch model in the HW. 6824 * 6825 * If there were VEBs but the reconstitution failed, we'll try 6826 * try to recover minimal use by getting the basic PF VSI working. 6827 */ 6828 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { 6829 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 6830 /* find the one VEB connected to the MAC, and find orphans */ 6831 for (v = 0; v < I40E_MAX_VEB; v++) { 6832 if (!pf->veb[v]) 6833 continue; 6834 6835 if (pf->veb[v]->uplink_seid == pf->mac_seid || 6836 pf->veb[v]->uplink_seid == 0) { 6837 ret = i40e_reconstitute_veb(pf->veb[v]); 6838 6839 if (!ret) 6840 continue; 6841 6842 /* If Main VEB failed, we're in deep doodoo, 6843 * so give up rebuilding the switch and set up 6844 * for minimal rebuild of PF VSI. 6845 * If orphan failed, we'll report the error 6846 * but try to keep going. 6847 */ 6848 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 6849 dev_info(&pf->pdev->dev, 6850 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 6851 ret); 6852 pf->vsi[pf->lan_vsi]->uplink_seid 6853 = pf->mac_seid; 6854 break; 6855 } else if (pf->veb[v]->uplink_seid == 0) { 6856 dev_info(&pf->pdev->dev, 6857 "rebuild of orphan VEB failed: %d\n", 6858 ret); 6859 } 6860 } 6861 } 6862 } 6863 6864 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { 6865 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 6866 /* no VEB, so rebuild only the Main VSI */ 6867 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); 6868 if (ret) { 6869 dev_info(&pf->pdev->dev, 6870 "rebuild of Main VSI failed: %d\n", ret); 6871 goto end_core_reset; 6872 } 6873 } 6874 6875 /* Reconfigure hardware for allowing smaller MSS in the case 6876 * of TSO, so that we avoid the MDD being fired and causing 6877 * a reset in the case of small MSS+TSO. 6878 */ 6879 #define I40E_REG_MSS 0x000E64DC 6880 #define I40E_REG_MSS_MIN_MASK 0x3FF0000 6881 #define I40E_64BYTE_MSS 0x400000 6882 val = rd32(hw, I40E_REG_MSS); 6883 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 6884 val &= ~I40E_REG_MSS_MIN_MASK; 6885 val |= I40E_64BYTE_MSS; 6886 wr32(hw, I40E_REG_MSS, val); 6887 } 6888 6889 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { 6890 msleep(75); 6891 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6892 if (ret) 6893 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 6894 i40e_stat_str(&pf->hw, ret), 6895 i40e_aq_str(&pf->hw, 6896 pf->hw.aq.asq_last_status)); 6897 } 6898 /* reinit the misc interrupt */ 6899 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6900 ret = i40e_setup_misc_vector(pf); 6901 6902 /* Add a filter to drop all Flow control frames from any VSI from being 6903 * transmitted. By doing so we stop a malicious VF from sending out 6904 * PAUSE or PFC frames and potentially controlling traffic for other 6905 * PF/VF VSIs. 6906 * The FW can still send Flow control frames if enabled. 6907 */ 6908 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 6909 pf->main_vsi_seid); 6910 6911 /* restart the VSIs that were rebuilt and running before the reset */ 6912 i40e_pf_unquiesce_all_vsi(pf); 6913 6914 if (pf->num_alloc_vfs) { 6915 for (v = 0; v < pf->num_alloc_vfs; v++) 6916 i40e_reset_vf(&pf->vf[v], true); 6917 } 6918 6919 /* tell the firmware that we're starting */ 6920 i40e_send_version(pf); 6921 6922 end_core_reset: 6923 clear_bit(__I40E_RESET_FAILED, &pf->state); 6924 clear_recovery: 6925 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 6926 } 6927 6928 /** 6929 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 6930 * @pf: board private structure 6931 * 6932 * Close up the VFs and other things in prep for a Core Reset, 6933 * then get ready to rebuild the world. 6934 **/ 6935 static void i40e_handle_reset_warning(struct i40e_pf *pf) 6936 { 6937 i40e_prep_for_reset(pf); 6938 i40e_reset_and_rebuild(pf, false); 6939 } 6940 6941 /** 6942 * i40e_handle_mdd_event 6943 * @pf: pointer to the PF structure 6944 * 6945 * Called from the MDD irq handler to identify possibly malicious vfs 6946 **/ 6947 static void i40e_handle_mdd_event(struct i40e_pf *pf) 6948 { 6949 struct i40e_hw *hw = &pf->hw; 6950 bool mdd_detected = false; 6951 bool pf_mdd_detected = false; 6952 struct i40e_vf *vf; 6953 u32 reg; 6954 int i; 6955 6956 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) 6957 return; 6958 6959 /* find what triggered the MDD event */ 6960 reg = rd32(hw, I40E_GL_MDET_TX); 6961 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 6962 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 6963 I40E_GL_MDET_TX_PF_NUM_SHIFT; 6964 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 6965 I40E_GL_MDET_TX_VF_NUM_SHIFT; 6966 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 6967 I40E_GL_MDET_TX_EVENT_SHIFT; 6968 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 6969 I40E_GL_MDET_TX_QUEUE_SHIFT) - 6970 pf->hw.func_caps.base_queue; 6971 if (netif_msg_tx_err(pf)) 6972 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 6973 event, queue, pf_num, vf_num); 6974 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 6975 mdd_detected = true; 6976 } 6977 reg = rd32(hw, I40E_GL_MDET_RX); 6978 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 6979 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 6980 I40E_GL_MDET_RX_FUNCTION_SHIFT; 6981 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 6982 I40E_GL_MDET_RX_EVENT_SHIFT; 6983 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 6984 I40E_GL_MDET_RX_QUEUE_SHIFT) - 6985 pf->hw.func_caps.base_queue; 6986 if (netif_msg_rx_err(pf)) 6987 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 6988 event, queue, func); 6989 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 6990 mdd_detected = true; 6991 } 6992 6993 if (mdd_detected) { 6994 reg = rd32(hw, I40E_PF_MDET_TX); 6995 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 6996 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 6997 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 6998 pf_mdd_detected = true; 6999 } 7000 reg = rd32(hw, I40E_PF_MDET_RX); 7001 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 7002 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 7003 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 7004 pf_mdd_detected = true; 7005 } 7006 /* Queue belongs to the PF, initiate a reset */ 7007 if (pf_mdd_detected) { 7008 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); 7009 i40e_service_event_schedule(pf); 7010 } 7011 } 7012 7013 /* see if one of the VFs needs its hand slapped */ 7014 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 7015 vf = &(pf->vf[i]); 7016 reg = rd32(hw, I40E_VP_MDET_TX(i)); 7017 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 7018 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 7019 vf->num_mdd_events++; 7020 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 7021 i); 7022 } 7023 7024 reg = rd32(hw, I40E_VP_MDET_RX(i)); 7025 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 7026 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 7027 vf->num_mdd_events++; 7028 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 7029 i); 7030 } 7031 7032 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 7033 dev_info(&pf->pdev->dev, 7034 "Too many MDD events on VF %d, disabled\n", i); 7035 dev_info(&pf->pdev->dev, 7036 "Use PF Control I/F to re-enable the VF\n"); 7037 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); 7038 } 7039 } 7040 7041 /* re-enable mdd interrupt cause */ 7042 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); 7043 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 7044 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 7045 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 7046 i40e_flush(hw); 7047 } 7048 7049 /** 7050 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW 7051 * @pf: board private structure 7052 **/ 7053 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf) 7054 { 7055 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE) 7056 struct i40e_hw *hw = &pf->hw; 7057 i40e_status ret; 7058 __be16 port; 7059 int i; 7060 7061 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC)) 7062 return; 7063 7064 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC; 7065 7066 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 7067 if (pf->pending_udp_bitmap & BIT_ULL(i)) { 7068 pf->pending_udp_bitmap &= ~BIT_ULL(i); 7069 port = pf->udp_ports[i].index; 7070 if (port) 7071 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port), 7072 pf->udp_ports[i].type, 7073 NULL, NULL); 7074 else 7075 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 7076 7077 if (ret) { 7078 dev_dbg(&pf->pdev->dev, 7079 "%s %s port %d, index %d failed, err %s aq_err %s\n", 7080 pf->udp_ports[i].type ? "vxlan" : "geneve", 7081 port ? "add" : "delete", 7082 ntohs(port), i, 7083 i40e_stat_str(&pf->hw, ret), 7084 i40e_aq_str(&pf->hw, 7085 pf->hw.aq.asq_last_status)); 7086 pf->udp_ports[i].index = 0; 7087 } 7088 } 7089 } 7090 #endif 7091 } 7092 7093 /** 7094 * i40e_service_task - Run the driver's async subtasks 7095 * @work: pointer to work_struct containing our data 7096 **/ 7097 static void i40e_service_task(struct work_struct *work) 7098 { 7099 struct i40e_pf *pf = container_of(work, 7100 struct i40e_pf, 7101 service_task); 7102 unsigned long start_time = jiffies; 7103 7104 /* don't bother with service tasks if a reset is in progress */ 7105 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7106 i40e_service_event_complete(pf); 7107 return; 7108 } 7109 7110 i40e_detect_recover_hung(pf); 7111 i40e_sync_filters_subtask(pf); 7112 i40e_reset_subtask(pf); 7113 i40e_handle_mdd_event(pf); 7114 i40e_vc_process_vflr_event(pf); 7115 i40e_watchdog_subtask(pf); 7116 i40e_fdir_reinit_subtask(pf); 7117 i40e_client_subtask(pf); 7118 i40e_sync_filters_subtask(pf); 7119 i40e_sync_udp_filters_subtask(pf); 7120 i40e_clean_adminq_subtask(pf); 7121 7122 i40e_service_event_complete(pf); 7123 7124 /* If the tasks have taken longer than one timer cycle or there 7125 * is more work to be done, reschedule the service task now 7126 * rather than wait for the timer to tick again. 7127 */ 7128 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 7129 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || 7130 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || 7131 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) 7132 i40e_service_event_schedule(pf); 7133 } 7134 7135 /** 7136 * i40e_service_timer - timer callback 7137 * @data: pointer to PF struct 7138 **/ 7139 static void i40e_service_timer(unsigned long data) 7140 { 7141 struct i40e_pf *pf = (struct i40e_pf *)data; 7142 7143 mod_timer(&pf->service_timer, 7144 round_jiffies(jiffies + pf->service_timer_period)); 7145 i40e_service_event_schedule(pf); 7146 } 7147 7148 /** 7149 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 7150 * @vsi: the VSI being configured 7151 **/ 7152 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 7153 { 7154 struct i40e_pf *pf = vsi->back; 7155 7156 switch (vsi->type) { 7157 case I40E_VSI_MAIN: 7158 vsi->alloc_queue_pairs = pf->num_lan_qps; 7159 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7160 I40E_REQ_DESCRIPTOR_MULTIPLE); 7161 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7162 vsi->num_q_vectors = pf->num_lan_msix; 7163 else 7164 vsi->num_q_vectors = 1; 7165 7166 break; 7167 7168 case I40E_VSI_FDIR: 7169 vsi->alloc_queue_pairs = 1; 7170 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 7171 I40E_REQ_DESCRIPTOR_MULTIPLE); 7172 vsi->num_q_vectors = 1; 7173 break; 7174 7175 case I40E_VSI_VMDQ2: 7176 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 7177 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7178 I40E_REQ_DESCRIPTOR_MULTIPLE); 7179 vsi->num_q_vectors = pf->num_vmdq_msix; 7180 break; 7181 7182 case I40E_VSI_SRIOV: 7183 vsi->alloc_queue_pairs = pf->num_vf_qps; 7184 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7185 I40E_REQ_DESCRIPTOR_MULTIPLE); 7186 break; 7187 7188 #ifdef I40E_FCOE 7189 case I40E_VSI_FCOE: 7190 vsi->alloc_queue_pairs = pf->num_fcoe_qps; 7191 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 7192 I40E_REQ_DESCRIPTOR_MULTIPLE); 7193 vsi->num_q_vectors = pf->num_fcoe_msix; 7194 break; 7195 7196 #endif /* I40E_FCOE */ 7197 default: 7198 WARN_ON(1); 7199 return -ENODATA; 7200 } 7201 7202 return 0; 7203 } 7204 7205 /** 7206 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 7207 * @type: VSI pointer 7208 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 7209 * 7210 * On error: returns error code (negative) 7211 * On success: returns 0 7212 **/ 7213 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 7214 { 7215 int size; 7216 int ret = 0; 7217 7218 /* allocate memory for both Tx and Rx ring pointers */ 7219 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; 7220 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 7221 if (!vsi->tx_rings) 7222 return -ENOMEM; 7223 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; 7224 7225 if (alloc_qvectors) { 7226 /* allocate memory for q_vector pointers */ 7227 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 7228 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 7229 if (!vsi->q_vectors) { 7230 ret = -ENOMEM; 7231 goto err_vectors; 7232 } 7233 } 7234 return ret; 7235 7236 err_vectors: 7237 kfree(vsi->tx_rings); 7238 return ret; 7239 } 7240 7241 /** 7242 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 7243 * @pf: board private structure 7244 * @type: type of VSI 7245 * 7246 * On error: returns error code (negative) 7247 * On success: returns vsi index in PF (positive) 7248 **/ 7249 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 7250 { 7251 int ret = -ENODEV; 7252 struct i40e_vsi *vsi; 7253 int vsi_idx; 7254 int i; 7255 7256 /* Need to protect the allocation of the VSIs at the PF level */ 7257 mutex_lock(&pf->switch_mutex); 7258 7259 /* VSI list may be fragmented if VSI creation/destruction has 7260 * been happening. We can afford to do a quick scan to look 7261 * for any free VSIs in the list. 7262 * 7263 * find next empty vsi slot, looping back around if necessary 7264 */ 7265 i = pf->next_vsi; 7266 while (i < pf->num_alloc_vsi && pf->vsi[i]) 7267 i++; 7268 if (i >= pf->num_alloc_vsi) { 7269 i = 0; 7270 while (i < pf->next_vsi && pf->vsi[i]) 7271 i++; 7272 } 7273 7274 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 7275 vsi_idx = i; /* Found one! */ 7276 } else { 7277 ret = -ENODEV; 7278 goto unlock_pf; /* out of VSI slots! */ 7279 } 7280 pf->next_vsi = ++i; 7281 7282 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 7283 if (!vsi) { 7284 ret = -ENOMEM; 7285 goto unlock_pf; 7286 } 7287 vsi->type = type; 7288 vsi->back = pf; 7289 set_bit(__I40E_DOWN, &vsi->state); 7290 vsi->flags = 0; 7291 vsi->idx = vsi_idx; 7292 vsi->int_rate_limit = 0; 7293 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 7294 pf->rss_table_size : 64; 7295 vsi->netdev_registered = false; 7296 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 7297 INIT_LIST_HEAD(&vsi->mac_filter_list); 7298 vsi->irqs_ready = false; 7299 7300 ret = i40e_set_num_rings_in_vsi(vsi); 7301 if (ret) 7302 goto err_rings; 7303 7304 ret = i40e_vsi_alloc_arrays(vsi, true); 7305 if (ret) 7306 goto err_rings; 7307 7308 /* Setup default MSIX irq handler for VSI */ 7309 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 7310 7311 /* Initialize VSI lock */ 7312 spin_lock_init(&vsi->mac_filter_list_lock); 7313 pf->vsi[vsi_idx] = vsi; 7314 ret = vsi_idx; 7315 goto unlock_pf; 7316 7317 err_rings: 7318 pf->next_vsi = i - 1; 7319 kfree(vsi); 7320 unlock_pf: 7321 mutex_unlock(&pf->switch_mutex); 7322 return ret; 7323 } 7324 7325 /** 7326 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 7327 * @type: VSI pointer 7328 * @free_qvectors: a bool to specify if q_vectors need to be freed. 7329 * 7330 * On error: returns error code (negative) 7331 * On success: returns 0 7332 **/ 7333 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 7334 { 7335 /* free the ring and vector containers */ 7336 if (free_qvectors) { 7337 kfree(vsi->q_vectors); 7338 vsi->q_vectors = NULL; 7339 } 7340 kfree(vsi->tx_rings); 7341 vsi->tx_rings = NULL; 7342 vsi->rx_rings = NULL; 7343 } 7344 7345 /** 7346 * i40e_clear_rss_config_user - clear the user configured RSS hash keys 7347 * and lookup table 7348 * @vsi: Pointer to VSI structure 7349 */ 7350 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi) 7351 { 7352 if (!vsi) 7353 return; 7354 7355 kfree(vsi->rss_hkey_user); 7356 vsi->rss_hkey_user = NULL; 7357 7358 kfree(vsi->rss_lut_user); 7359 vsi->rss_lut_user = NULL; 7360 } 7361 7362 /** 7363 * i40e_vsi_clear - Deallocate the VSI provided 7364 * @vsi: the VSI being un-configured 7365 **/ 7366 static int i40e_vsi_clear(struct i40e_vsi *vsi) 7367 { 7368 struct i40e_pf *pf; 7369 7370 if (!vsi) 7371 return 0; 7372 7373 if (!vsi->back) 7374 goto free_vsi; 7375 pf = vsi->back; 7376 7377 mutex_lock(&pf->switch_mutex); 7378 if (!pf->vsi[vsi->idx]) { 7379 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 7380 vsi->idx, vsi->idx, vsi, vsi->type); 7381 goto unlock_vsi; 7382 } 7383 7384 if (pf->vsi[vsi->idx] != vsi) { 7385 dev_err(&pf->pdev->dev, 7386 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 7387 pf->vsi[vsi->idx]->idx, 7388 pf->vsi[vsi->idx], 7389 pf->vsi[vsi->idx]->type, 7390 vsi->idx, vsi, vsi->type); 7391 goto unlock_vsi; 7392 } 7393 7394 /* updates the PF for this cleared vsi */ 7395 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 7396 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 7397 7398 i40e_vsi_free_arrays(vsi, true); 7399 i40e_clear_rss_config_user(vsi); 7400 7401 pf->vsi[vsi->idx] = NULL; 7402 if (vsi->idx < pf->next_vsi) 7403 pf->next_vsi = vsi->idx; 7404 7405 unlock_vsi: 7406 mutex_unlock(&pf->switch_mutex); 7407 free_vsi: 7408 kfree(vsi); 7409 7410 return 0; 7411 } 7412 7413 /** 7414 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 7415 * @vsi: the VSI being cleaned 7416 **/ 7417 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 7418 { 7419 int i; 7420 7421 if (vsi->tx_rings && vsi->tx_rings[0]) { 7422 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7423 kfree_rcu(vsi->tx_rings[i], rcu); 7424 vsi->tx_rings[i] = NULL; 7425 vsi->rx_rings[i] = NULL; 7426 } 7427 } 7428 } 7429 7430 /** 7431 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 7432 * @vsi: the VSI being configured 7433 **/ 7434 static int i40e_alloc_rings(struct i40e_vsi *vsi) 7435 { 7436 struct i40e_ring *tx_ring, *rx_ring; 7437 struct i40e_pf *pf = vsi->back; 7438 int i; 7439 7440 /* Set basic values in the rings to be used later during open() */ 7441 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 7442 /* allocate space for both Tx and Rx in one shot */ 7443 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 7444 if (!tx_ring) 7445 goto err_out; 7446 7447 tx_ring->queue_index = i; 7448 tx_ring->reg_idx = vsi->base_queue + i; 7449 tx_ring->ring_active = false; 7450 tx_ring->vsi = vsi; 7451 tx_ring->netdev = vsi->netdev; 7452 tx_ring->dev = &pf->pdev->dev; 7453 tx_ring->count = vsi->num_desc; 7454 tx_ring->size = 0; 7455 tx_ring->dcb_tc = 0; 7456 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) 7457 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 7458 tx_ring->tx_itr_setting = pf->tx_itr_default; 7459 vsi->tx_rings[i] = tx_ring; 7460 7461 rx_ring = &tx_ring[1]; 7462 rx_ring->queue_index = i; 7463 rx_ring->reg_idx = vsi->base_queue + i; 7464 rx_ring->ring_active = false; 7465 rx_ring->vsi = vsi; 7466 rx_ring->netdev = vsi->netdev; 7467 rx_ring->dev = &pf->pdev->dev; 7468 rx_ring->count = vsi->num_desc; 7469 rx_ring->size = 0; 7470 rx_ring->dcb_tc = 0; 7471 rx_ring->rx_itr_setting = pf->rx_itr_default; 7472 vsi->rx_rings[i] = rx_ring; 7473 } 7474 7475 return 0; 7476 7477 err_out: 7478 i40e_vsi_clear_rings(vsi); 7479 return -ENOMEM; 7480 } 7481 7482 /** 7483 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 7484 * @pf: board private structure 7485 * @vectors: the number of MSI-X vectors to request 7486 * 7487 * Returns the number of vectors reserved, or error 7488 **/ 7489 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 7490 { 7491 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 7492 I40E_MIN_MSIX, vectors); 7493 if (vectors < 0) { 7494 dev_info(&pf->pdev->dev, 7495 "MSI-X vector reservation failed: %d\n", vectors); 7496 vectors = 0; 7497 } 7498 7499 return vectors; 7500 } 7501 7502 /** 7503 * i40e_init_msix - Setup the MSIX capability 7504 * @pf: board private structure 7505 * 7506 * Work with the OS to set up the MSIX vectors needed. 7507 * 7508 * Returns the number of vectors reserved or negative on failure 7509 **/ 7510 static int i40e_init_msix(struct i40e_pf *pf) 7511 { 7512 struct i40e_hw *hw = &pf->hw; 7513 int vectors_left; 7514 int v_budget, i; 7515 int v_actual; 7516 int iwarp_requested = 0; 7517 7518 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 7519 return -ENODEV; 7520 7521 /* The number of vectors we'll request will be comprised of: 7522 * - Add 1 for "other" cause for Admin Queue events, etc. 7523 * - The number of LAN queue pairs 7524 * - Queues being used for RSS. 7525 * We don't need as many as max_rss_size vectors. 7526 * use rss_size instead in the calculation since that 7527 * is governed by number of cpus in the system. 7528 * - assumes symmetric Tx/Rx pairing 7529 * - The number of VMDq pairs 7530 * - The CPU count within the NUMA node if iWARP is enabled 7531 #ifdef I40E_FCOE 7532 * - The number of FCOE qps. 7533 #endif 7534 * Once we count this up, try the request. 7535 * 7536 * If we can't get what we want, we'll simplify to nearly nothing 7537 * and try again. If that still fails, we punt. 7538 */ 7539 vectors_left = hw->func_caps.num_msix_vectors; 7540 v_budget = 0; 7541 7542 /* reserve one vector for miscellaneous handler */ 7543 if (vectors_left) { 7544 v_budget++; 7545 vectors_left--; 7546 } 7547 7548 /* reserve vectors for the main PF traffic queues */ 7549 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left); 7550 vectors_left -= pf->num_lan_msix; 7551 v_budget += pf->num_lan_msix; 7552 7553 /* reserve one vector for sideband flow director */ 7554 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 7555 if (vectors_left) { 7556 v_budget++; 7557 vectors_left--; 7558 } else { 7559 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7560 } 7561 } 7562 7563 #ifdef I40E_FCOE 7564 /* can we reserve enough for FCoE? */ 7565 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7566 if (!vectors_left) 7567 pf->num_fcoe_msix = 0; 7568 else if (vectors_left >= pf->num_fcoe_qps) 7569 pf->num_fcoe_msix = pf->num_fcoe_qps; 7570 else 7571 pf->num_fcoe_msix = 1; 7572 v_budget += pf->num_fcoe_msix; 7573 vectors_left -= pf->num_fcoe_msix; 7574 } 7575 7576 #endif 7577 /* can we reserve enough for iWARP? */ 7578 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7579 if (!vectors_left) 7580 pf->num_iwarp_msix = 0; 7581 else if (vectors_left < pf->num_iwarp_msix) 7582 pf->num_iwarp_msix = 1; 7583 v_budget += pf->num_iwarp_msix; 7584 vectors_left -= pf->num_iwarp_msix; 7585 } 7586 7587 /* any vectors left over go for VMDq support */ 7588 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 7589 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 7590 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 7591 7592 /* if we're short on vectors for what's desired, we limit 7593 * the queues per vmdq. If this is still more than are 7594 * available, the user will need to change the number of 7595 * queues/vectors used by the PF later with the ethtool 7596 * channels command 7597 */ 7598 if (vmdq_vecs < vmdq_vecs_wanted) 7599 pf->num_vmdq_qps = 1; 7600 pf->num_vmdq_msix = pf->num_vmdq_qps; 7601 7602 v_budget += vmdq_vecs; 7603 vectors_left -= vmdq_vecs; 7604 } 7605 7606 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 7607 GFP_KERNEL); 7608 if (!pf->msix_entries) 7609 return -ENOMEM; 7610 7611 for (i = 0; i < v_budget; i++) 7612 pf->msix_entries[i].entry = i; 7613 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 7614 7615 if (v_actual != v_budget) { 7616 /* If we have limited resources, we will start with no vectors 7617 * for the special features and then allocate vectors to some 7618 * of these features based on the policy and at the end disable 7619 * the features that did not get any vectors. 7620 */ 7621 iwarp_requested = pf->num_iwarp_msix; 7622 pf->num_iwarp_msix = 0; 7623 #ifdef I40E_FCOE 7624 pf->num_fcoe_qps = 0; 7625 pf->num_fcoe_msix = 0; 7626 #endif 7627 pf->num_vmdq_msix = 0; 7628 } 7629 7630 if (v_actual < I40E_MIN_MSIX) { 7631 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 7632 kfree(pf->msix_entries); 7633 pf->msix_entries = NULL; 7634 return -ENODEV; 7635 7636 } else if (v_actual == I40E_MIN_MSIX) { 7637 /* Adjust for minimal MSIX use */ 7638 pf->num_vmdq_vsis = 0; 7639 pf->num_vmdq_qps = 0; 7640 pf->num_lan_qps = 1; 7641 pf->num_lan_msix = 1; 7642 7643 } else if (v_actual != v_budget) { 7644 int vec; 7645 7646 /* reserve the misc vector */ 7647 vec = v_actual - 1; 7648 7649 /* Scale vector usage down */ 7650 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 7651 pf->num_vmdq_vsis = 1; 7652 pf->num_vmdq_qps = 1; 7653 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 7654 7655 /* partition out the remaining vectors */ 7656 switch (vec) { 7657 case 2: 7658 pf->num_lan_msix = 1; 7659 break; 7660 case 3: 7661 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7662 pf->num_lan_msix = 1; 7663 pf->num_iwarp_msix = 1; 7664 } else { 7665 pf->num_lan_msix = 2; 7666 } 7667 #ifdef I40E_FCOE 7668 /* give one vector to FCoE */ 7669 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7670 pf->num_lan_msix = 1; 7671 pf->num_fcoe_msix = 1; 7672 } 7673 #endif 7674 break; 7675 default: 7676 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 7677 pf->num_iwarp_msix = min_t(int, (vec / 3), 7678 iwarp_requested); 7679 pf->num_vmdq_vsis = min_t(int, (vec / 3), 7680 I40E_DEFAULT_NUM_VMDQ_VSI); 7681 } else { 7682 pf->num_vmdq_vsis = min_t(int, (vec / 2), 7683 I40E_DEFAULT_NUM_VMDQ_VSI); 7684 } 7685 pf->num_lan_msix = min_t(int, 7686 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)), 7687 pf->num_lan_msix); 7688 #ifdef I40E_FCOE 7689 /* give one vector to FCoE */ 7690 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 7691 pf->num_fcoe_msix = 1; 7692 vec--; 7693 } 7694 #endif 7695 break; 7696 } 7697 } 7698 7699 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 7700 (pf->num_vmdq_msix == 0)) { 7701 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 7702 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 7703 } 7704 7705 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 7706 (pf->num_iwarp_msix == 0)) { 7707 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n"); 7708 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 7709 } 7710 #ifdef I40E_FCOE 7711 7712 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) { 7713 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n"); 7714 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 7715 } 7716 #endif 7717 return v_actual; 7718 } 7719 7720 /** 7721 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 7722 * @vsi: the VSI being configured 7723 * @v_idx: index of the vector in the vsi struct 7724 * @cpu: cpu to be used on affinity_mask 7725 * 7726 * We allocate one q_vector. If allocation fails we return -ENOMEM. 7727 **/ 7728 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu) 7729 { 7730 struct i40e_q_vector *q_vector; 7731 7732 /* allocate q_vector */ 7733 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 7734 if (!q_vector) 7735 return -ENOMEM; 7736 7737 q_vector->vsi = vsi; 7738 q_vector->v_idx = v_idx; 7739 cpumask_set_cpu(cpu, &q_vector->affinity_mask); 7740 7741 if (vsi->netdev) 7742 netif_napi_add(vsi->netdev, &q_vector->napi, 7743 i40e_napi_poll, NAPI_POLL_WEIGHT); 7744 7745 q_vector->rx.latency_range = I40E_LOW_LATENCY; 7746 q_vector->tx.latency_range = I40E_LOW_LATENCY; 7747 7748 /* tie q_vector and vsi together */ 7749 vsi->q_vectors[v_idx] = q_vector; 7750 7751 return 0; 7752 } 7753 7754 /** 7755 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 7756 * @vsi: the VSI being configured 7757 * 7758 * We allocate one q_vector per queue interrupt. If allocation fails we 7759 * return -ENOMEM. 7760 **/ 7761 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 7762 { 7763 struct i40e_pf *pf = vsi->back; 7764 int err, v_idx, num_q_vectors, current_cpu; 7765 7766 /* if not MSIX, give the one vector only to the LAN VSI */ 7767 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 7768 num_q_vectors = vsi->num_q_vectors; 7769 else if (vsi == pf->vsi[pf->lan_vsi]) 7770 num_q_vectors = 1; 7771 else 7772 return -EINVAL; 7773 7774 current_cpu = cpumask_first(cpu_online_mask); 7775 7776 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 7777 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu); 7778 if (err) 7779 goto err_out; 7780 current_cpu = cpumask_next(current_cpu, cpu_online_mask); 7781 if (unlikely(current_cpu >= nr_cpu_ids)) 7782 current_cpu = cpumask_first(cpu_online_mask); 7783 } 7784 7785 return 0; 7786 7787 err_out: 7788 while (v_idx--) 7789 i40e_free_q_vector(vsi, v_idx); 7790 7791 return err; 7792 } 7793 7794 /** 7795 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 7796 * @pf: board private structure to initialize 7797 **/ 7798 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 7799 { 7800 int vectors = 0; 7801 ssize_t size; 7802 7803 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 7804 vectors = i40e_init_msix(pf); 7805 if (vectors < 0) { 7806 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 7807 I40E_FLAG_IWARP_ENABLED | 7808 #ifdef I40E_FCOE 7809 I40E_FLAG_FCOE_ENABLED | 7810 #endif 7811 I40E_FLAG_RSS_ENABLED | 7812 I40E_FLAG_DCB_CAPABLE | 7813 I40E_FLAG_SRIOV_ENABLED | 7814 I40E_FLAG_FD_SB_ENABLED | 7815 I40E_FLAG_FD_ATR_ENABLED | 7816 I40E_FLAG_VMDQ_ENABLED); 7817 7818 /* rework the queue expectations without MSIX */ 7819 i40e_determine_queue_usage(pf); 7820 } 7821 } 7822 7823 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 7824 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 7825 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 7826 vectors = pci_enable_msi(pf->pdev); 7827 if (vectors < 0) { 7828 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 7829 vectors); 7830 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 7831 } 7832 vectors = 1; /* one MSI or Legacy vector */ 7833 } 7834 7835 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 7836 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 7837 7838 /* set up vector assignment tracking */ 7839 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 7840 pf->irq_pile = kzalloc(size, GFP_KERNEL); 7841 if (!pf->irq_pile) { 7842 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 7843 return -ENOMEM; 7844 } 7845 pf->irq_pile->num_entries = vectors; 7846 pf->irq_pile->search_hint = 0; 7847 7848 /* track first vector for misc interrupts, ignore return */ 7849 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 7850 7851 return 0; 7852 } 7853 7854 /** 7855 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 7856 * @pf: board private structure 7857 * 7858 * This sets up the handler for MSIX 0, which is used to manage the 7859 * non-queue interrupts, e.g. AdminQ and errors. This is not used 7860 * when in MSI or Legacy interrupt mode. 7861 **/ 7862 static int i40e_setup_misc_vector(struct i40e_pf *pf) 7863 { 7864 struct i40e_hw *hw = &pf->hw; 7865 int err = 0; 7866 7867 /* Only request the irq if this is the first time through, and 7868 * not when we're rebuilding after a Reset 7869 */ 7870 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { 7871 err = request_irq(pf->msix_entries[0].vector, 7872 i40e_intr, 0, pf->int_name, pf); 7873 if (err) { 7874 dev_info(&pf->pdev->dev, 7875 "request_irq for %s failed: %d\n", 7876 pf->int_name, err); 7877 return -EFAULT; 7878 } 7879 } 7880 7881 i40e_enable_misc_int_causes(pf); 7882 7883 /* associate no queues to the misc vector */ 7884 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 7885 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 7886 7887 i40e_flush(hw); 7888 7889 i40e_irq_dynamic_enable_icr0(pf, true); 7890 7891 return err; 7892 } 7893 7894 /** 7895 * i40e_config_rss_aq - Prepare for RSS using AQ commands 7896 * @vsi: vsi structure 7897 * @seed: RSS hash seed 7898 **/ 7899 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 7900 u8 *lut, u16 lut_size) 7901 { 7902 struct i40e_aqc_get_set_rss_key_data rss_key; 7903 struct i40e_pf *pf = vsi->back; 7904 struct i40e_hw *hw = &pf->hw; 7905 bool pf_lut = false; 7906 u8 *rss_lut; 7907 int ret, i; 7908 7909 memset(&rss_key, 0, sizeof(rss_key)); 7910 memcpy(&rss_key, seed, sizeof(rss_key)); 7911 7912 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL); 7913 if (!rss_lut) 7914 return -ENOMEM; 7915 7916 /* Populate the LUT with max no. of queues in round robin fashion */ 7917 for (i = 0; i < vsi->rss_table_size; i++) 7918 rss_lut[i] = i % vsi->rss_size; 7919 7920 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key); 7921 if (ret) { 7922 dev_info(&pf->pdev->dev, 7923 "Cannot set RSS key, err %s aq_err %s\n", 7924 i40e_stat_str(&pf->hw, ret), 7925 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7926 goto config_rss_aq_out; 7927 } 7928 7929 if (vsi->type == I40E_VSI_MAIN) 7930 pf_lut = true; 7931 7932 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut, 7933 vsi->rss_table_size); 7934 if (ret) 7935 dev_info(&pf->pdev->dev, 7936 "Cannot set RSS lut, err %s aq_err %s\n", 7937 i40e_stat_str(&pf->hw, ret), 7938 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7939 7940 config_rss_aq_out: 7941 kfree(rss_lut); 7942 return ret; 7943 } 7944 7945 /** 7946 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used 7947 * @vsi: VSI structure 7948 **/ 7949 static int i40e_vsi_config_rss(struct i40e_vsi *vsi) 7950 { 7951 u8 seed[I40E_HKEY_ARRAY_SIZE]; 7952 struct i40e_pf *pf = vsi->back; 7953 u8 *lut; 7954 int ret; 7955 7956 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) 7957 return 0; 7958 7959 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 7960 if (!lut) 7961 return -ENOMEM; 7962 7963 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 7964 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 7965 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs); 7966 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size); 7967 kfree(lut); 7968 7969 return ret; 7970 } 7971 7972 /** 7973 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands 7974 * @vsi: Pointer to vsi structure 7975 * @seed: Buffter to store the hash keys 7976 * @lut: Buffer to store the lookup table entries 7977 * @lut_size: Size of buffer to store the lookup table entries 7978 * 7979 * Return 0 on success, negative on failure 7980 */ 7981 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 7982 u8 *lut, u16 lut_size) 7983 { 7984 struct i40e_pf *pf = vsi->back; 7985 struct i40e_hw *hw = &pf->hw; 7986 int ret = 0; 7987 7988 if (seed) { 7989 ret = i40e_aq_get_rss_key(hw, vsi->id, 7990 (struct i40e_aqc_get_set_rss_key_data *)seed); 7991 if (ret) { 7992 dev_info(&pf->pdev->dev, 7993 "Cannot get RSS key, err %s aq_err %s\n", 7994 i40e_stat_str(&pf->hw, ret), 7995 i40e_aq_str(&pf->hw, 7996 pf->hw.aq.asq_last_status)); 7997 return ret; 7998 } 7999 } 8000 8001 if (lut) { 8002 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; 8003 8004 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 8005 if (ret) { 8006 dev_info(&pf->pdev->dev, 8007 "Cannot get RSS lut, err %s aq_err %s\n", 8008 i40e_stat_str(&pf->hw, ret), 8009 i40e_aq_str(&pf->hw, 8010 pf->hw.aq.asq_last_status)); 8011 return ret; 8012 } 8013 } 8014 8015 return ret; 8016 } 8017 8018 /** 8019 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers 8020 * @vsi: Pointer to vsi structure 8021 * @seed: RSS hash seed 8022 * @lut: Lookup table 8023 * @lut_size: Lookup table size 8024 * 8025 * Returns 0 on success, negative on failure 8026 **/ 8027 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed, 8028 const u8 *lut, u16 lut_size) 8029 { 8030 struct i40e_pf *pf = vsi->back; 8031 struct i40e_hw *hw = &pf->hw; 8032 u16 vf_id = vsi->vf_id; 8033 u8 i; 8034 8035 /* Fill out hash function seed */ 8036 if (seed) { 8037 u32 *seed_dw = (u32 *)seed; 8038 8039 if (vsi->type == I40E_VSI_MAIN) { 8040 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 8041 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i), 8042 seed_dw[i]); 8043 } else if (vsi->type == I40E_VSI_SRIOV) { 8044 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++) 8045 i40e_write_rx_ctl(hw, 8046 I40E_VFQF_HKEY1(i, vf_id), 8047 seed_dw[i]); 8048 } else { 8049 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n"); 8050 } 8051 } 8052 8053 if (lut) { 8054 u32 *lut_dw = (u32 *)lut; 8055 8056 if (vsi->type == I40E_VSI_MAIN) { 8057 if (lut_size != I40E_HLUT_ARRAY_SIZE) 8058 return -EINVAL; 8059 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 8060 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]); 8061 } else if (vsi->type == I40E_VSI_SRIOV) { 8062 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE) 8063 return -EINVAL; 8064 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 8065 i40e_write_rx_ctl(hw, 8066 I40E_VFQF_HLUT1(i, vf_id), 8067 lut_dw[i]); 8068 } else { 8069 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 8070 } 8071 } 8072 i40e_flush(hw); 8073 8074 return 0; 8075 } 8076 8077 /** 8078 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers 8079 * @vsi: Pointer to VSI structure 8080 * @seed: Buffer to store the keys 8081 * @lut: Buffer to store the lookup table entries 8082 * @lut_size: Size of buffer to store the lookup table entries 8083 * 8084 * Returns 0 on success, negative on failure 8085 */ 8086 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed, 8087 u8 *lut, u16 lut_size) 8088 { 8089 struct i40e_pf *pf = vsi->back; 8090 struct i40e_hw *hw = &pf->hw; 8091 u16 i; 8092 8093 if (seed) { 8094 u32 *seed_dw = (u32 *)seed; 8095 8096 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 8097 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i)); 8098 } 8099 if (lut) { 8100 u32 *lut_dw = (u32 *)lut; 8101 8102 if (lut_size != I40E_HLUT_ARRAY_SIZE) 8103 return -EINVAL; 8104 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 8105 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i)); 8106 } 8107 8108 return 0; 8109 } 8110 8111 /** 8112 * i40e_config_rss - Configure RSS keys and lut 8113 * @vsi: Pointer to VSI structure 8114 * @seed: RSS hash seed 8115 * @lut: Lookup table 8116 * @lut_size: Lookup table size 8117 * 8118 * Returns 0 on success, negative on failure 8119 */ 8120 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 8121 { 8122 struct i40e_pf *pf = vsi->back; 8123 8124 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) 8125 return i40e_config_rss_aq(vsi, seed, lut, lut_size); 8126 else 8127 return i40e_config_rss_reg(vsi, seed, lut, lut_size); 8128 } 8129 8130 /** 8131 * i40e_get_rss - Get RSS keys and lut 8132 * @vsi: Pointer to VSI structure 8133 * @seed: Buffer to store the keys 8134 * @lut: Buffer to store the lookup table entries 8135 * lut_size: Size of buffer to store the lookup table entries 8136 * 8137 * Returns 0 on success, negative on failure 8138 */ 8139 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 8140 { 8141 struct i40e_pf *pf = vsi->back; 8142 8143 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) 8144 return i40e_get_rss_aq(vsi, seed, lut, lut_size); 8145 else 8146 return i40e_get_rss_reg(vsi, seed, lut, lut_size); 8147 } 8148 8149 /** 8150 * i40e_fill_rss_lut - Fill the RSS lookup table with default values 8151 * @pf: Pointer to board private structure 8152 * @lut: Lookup table 8153 * @rss_table_size: Lookup table size 8154 * @rss_size: Range of queue number for hashing 8155 */ 8156 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 8157 u16 rss_table_size, u16 rss_size) 8158 { 8159 u16 i; 8160 8161 for (i = 0; i < rss_table_size; i++) 8162 lut[i] = i % rss_size; 8163 } 8164 8165 /** 8166 * i40e_pf_config_rss - Prepare for RSS if used 8167 * @pf: board private structure 8168 **/ 8169 static int i40e_pf_config_rss(struct i40e_pf *pf) 8170 { 8171 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 8172 u8 seed[I40E_HKEY_ARRAY_SIZE]; 8173 u8 *lut; 8174 struct i40e_hw *hw = &pf->hw; 8175 u32 reg_val; 8176 u64 hena; 8177 int ret; 8178 8179 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 8180 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 8181 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 8182 hena |= i40e_pf_get_default_rss_hena(pf); 8183 8184 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 8185 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 8186 8187 /* Determine the RSS table size based on the hardware capabilities */ 8188 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0); 8189 reg_val = (pf->rss_table_size == 512) ? 8190 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) : 8191 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512); 8192 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val); 8193 8194 /* Determine the RSS size of the VSI */ 8195 if (!vsi->rss_size) 8196 vsi->rss_size = min_t(int, pf->alloc_rss_size, 8197 vsi->num_queue_pairs); 8198 8199 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 8200 if (!lut) 8201 return -ENOMEM; 8202 8203 /* Use user configured lut if there is one, otherwise use default */ 8204 if (vsi->rss_lut_user) 8205 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 8206 else 8207 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 8208 8209 /* Use user configured hash key if there is one, otherwise 8210 * use default. 8211 */ 8212 if (vsi->rss_hkey_user) 8213 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 8214 else 8215 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 8216 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 8217 kfree(lut); 8218 8219 return ret; 8220 } 8221 8222 /** 8223 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 8224 * @pf: board private structure 8225 * @queue_count: the requested queue count for rss. 8226 * 8227 * returns 0 if rss is not enabled, if enabled returns the final rss queue 8228 * count which may be different from the requested queue count. 8229 **/ 8230 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 8231 { 8232 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 8233 int new_rss_size; 8234 8235 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 8236 return 0; 8237 8238 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 8239 8240 if (queue_count != vsi->num_queue_pairs) { 8241 vsi->req_queue_pairs = queue_count; 8242 i40e_prep_for_reset(pf); 8243 8244 pf->alloc_rss_size = new_rss_size; 8245 8246 i40e_reset_and_rebuild(pf, true); 8247 8248 /* Discard the user configured hash keys and lut, if less 8249 * queues are enabled. 8250 */ 8251 if (queue_count < vsi->rss_size) { 8252 i40e_clear_rss_config_user(vsi); 8253 dev_dbg(&pf->pdev->dev, 8254 "discard user configured hash keys and lut\n"); 8255 } 8256 8257 /* Reset vsi->rss_size, as number of enabled queues changed */ 8258 vsi->rss_size = min_t(int, pf->alloc_rss_size, 8259 vsi->num_queue_pairs); 8260 8261 i40e_pf_config_rss(pf); 8262 } 8263 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n", 8264 pf->alloc_rss_size, pf->rss_size_max); 8265 return pf->alloc_rss_size; 8266 } 8267 8268 /** 8269 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition 8270 * @pf: board private structure 8271 **/ 8272 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf) 8273 { 8274 i40e_status status; 8275 bool min_valid, max_valid; 8276 u32 max_bw, min_bw; 8277 8278 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 8279 &min_valid, &max_valid); 8280 8281 if (!status) { 8282 if (min_valid) 8283 pf->npar_min_bw = min_bw; 8284 if (max_valid) 8285 pf->npar_max_bw = max_bw; 8286 } 8287 8288 return status; 8289 } 8290 8291 /** 8292 * i40e_set_npar_bw_setting - Set BW settings for this PF partition 8293 * @pf: board private structure 8294 **/ 8295 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf) 8296 { 8297 struct i40e_aqc_configure_partition_bw_data bw_data; 8298 i40e_status status; 8299 8300 /* Set the valid bit for this PF */ 8301 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); 8302 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK; 8303 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK; 8304 8305 /* Set the new bandwidths */ 8306 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 8307 8308 return status; 8309 } 8310 8311 /** 8312 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition 8313 * @pf: board private structure 8314 **/ 8315 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf) 8316 { 8317 /* Commit temporary BW setting to permanent NVM image */ 8318 enum i40e_admin_queue_err last_aq_status; 8319 i40e_status ret; 8320 u16 nvm_word; 8321 8322 if (pf->hw.partition_id != 1) { 8323 dev_info(&pf->pdev->dev, 8324 "Commit BW only works on partition 1! This is partition %d", 8325 pf->hw.partition_id); 8326 ret = I40E_NOT_SUPPORTED; 8327 goto bw_commit_out; 8328 } 8329 8330 /* Acquire NVM for read access */ 8331 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 8332 last_aq_status = pf->hw.aq.asq_last_status; 8333 if (ret) { 8334 dev_info(&pf->pdev->dev, 8335 "Cannot acquire NVM for read access, err %s aq_err %s\n", 8336 i40e_stat_str(&pf->hw, ret), 8337 i40e_aq_str(&pf->hw, last_aq_status)); 8338 goto bw_commit_out; 8339 } 8340 8341 /* Read word 0x10 of NVM - SW compatibility word 1 */ 8342 ret = i40e_aq_read_nvm(&pf->hw, 8343 I40E_SR_NVM_CONTROL_WORD, 8344 0x10, sizeof(nvm_word), &nvm_word, 8345 false, NULL); 8346 /* Save off last admin queue command status before releasing 8347 * the NVM 8348 */ 8349 last_aq_status = pf->hw.aq.asq_last_status; 8350 i40e_release_nvm(&pf->hw); 8351 if (ret) { 8352 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", 8353 i40e_stat_str(&pf->hw, ret), 8354 i40e_aq_str(&pf->hw, last_aq_status)); 8355 goto bw_commit_out; 8356 } 8357 8358 /* Wait a bit for NVM release to complete */ 8359 msleep(50); 8360 8361 /* Acquire NVM for write access */ 8362 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 8363 last_aq_status = pf->hw.aq.asq_last_status; 8364 if (ret) { 8365 dev_info(&pf->pdev->dev, 8366 "Cannot acquire NVM for write access, err %s aq_err %s\n", 8367 i40e_stat_str(&pf->hw, ret), 8368 i40e_aq_str(&pf->hw, last_aq_status)); 8369 goto bw_commit_out; 8370 } 8371 /* Write it back out unchanged to initiate update NVM, 8372 * which will force a write of the shadow (alt) RAM to 8373 * the NVM - thus storing the bandwidth values permanently. 8374 */ 8375 ret = i40e_aq_update_nvm(&pf->hw, 8376 I40E_SR_NVM_CONTROL_WORD, 8377 0x10, sizeof(nvm_word), 8378 &nvm_word, true, NULL); 8379 /* Save off last admin queue command status before releasing 8380 * the NVM 8381 */ 8382 last_aq_status = pf->hw.aq.asq_last_status; 8383 i40e_release_nvm(&pf->hw); 8384 if (ret) 8385 dev_info(&pf->pdev->dev, 8386 "BW settings NOT SAVED, err %s aq_err %s\n", 8387 i40e_stat_str(&pf->hw, ret), 8388 i40e_aq_str(&pf->hw, last_aq_status)); 8389 bw_commit_out: 8390 8391 return ret; 8392 } 8393 8394 /** 8395 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 8396 * @pf: board private structure to initialize 8397 * 8398 * i40e_sw_init initializes the Adapter private data structure. 8399 * Fields are initialized based on PCI device information and 8400 * OS network device settings (MTU size). 8401 **/ 8402 static int i40e_sw_init(struct i40e_pf *pf) 8403 { 8404 int err = 0; 8405 int size; 8406 8407 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, 8408 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); 8409 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { 8410 if (I40E_DEBUG_USER & debug) 8411 pf->hw.debug_mask = debug; 8412 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), 8413 I40E_DEFAULT_MSG_ENABLE); 8414 } 8415 8416 /* Set default capability flags */ 8417 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 8418 I40E_FLAG_MSI_ENABLED | 8419 I40E_FLAG_MSIX_ENABLED; 8420 8421 /* Set default ITR */ 8422 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; 8423 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; 8424 8425 /* Depending on PF configurations, it is possible that the RSS 8426 * maximum might end up larger than the available queues 8427 */ 8428 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); 8429 pf->alloc_rss_size = 1; 8430 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 8431 pf->rss_size_max = min_t(int, pf->rss_size_max, 8432 pf->hw.func_caps.num_tx_qp); 8433 if (pf->hw.func_caps.rss) { 8434 pf->flags |= I40E_FLAG_RSS_ENABLED; 8435 pf->alloc_rss_size = min_t(int, pf->rss_size_max, 8436 num_online_cpus()); 8437 } 8438 8439 /* MFP mode enabled */ 8440 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { 8441 pf->flags |= I40E_FLAG_MFP_ENABLED; 8442 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 8443 if (i40e_get_npar_bw_setting(pf)) 8444 dev_warn(&pf->pdev->dev, 8445 "Could not get NPAR bw settings\n"); 8446 else 8447 dev_info(&pf->pdev->dev, 8448 "Min BW = %8.8x, Max BW = %8.8x\n", 8449 pf->npar_min_bw, pf->npar_max_bw); 8450 } 8451 8452 /* FW/NVM is not yet fixed in this regard */ 8453 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 8454 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 8455 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 8456 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 8457 if (pf->flags & I40E_FLAG_MFP_ENABLED && 8458 pf->hw.num_partitions > 1) 8459 dev_info(&pf->pdev->dev, 8460 "Flow Director Sideband mode Disabled in MFP mode\n"); 8461 else 8462 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8463 pf->fdir_pf_filter_count = 8464 pf->hw.func_caps.fd_filters_guaranteed; 8465 pf->hw.fdir_shared_filter_count = 8466 pf->hw.func_caps.fd_filters_best_effort; 8467 } 8468 8469 if (i40e_is_mac_710(&pf->hw) && 8470 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 8471 (pf->hw.aq.fw_maj_ver < 4))) { 8472 pf->flags |= I40E_FLAG_RESTART_AUTONEG; 8473 /* No DCB support for FW < v4.33 */ 8474 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT; 8475 } 8476 8477 /* Disable FW LLDP if FW < v4.3 */ 8478 if (i40e_is_mac_710(&pf->hw) && 8479 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 8480 (pf->hw.aq.fw_maj_ver < 4))) 8481 pf->flags |= I40E_FLAG_STOP_FW_LLDP; 8482 8483 /* Use the FW Set LLDP MIB API if FW > v4.40 */ 8484 if (i40e_is_mac_710(&pf->hw) && 8485 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) || 8486 (pf->hw.aq.fw_maj_ver >= 5))) 8487 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB; 8488 8489 if (pf->hw.func_caps.vmdq) { 8490 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 8491 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 8492 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf); 8493 } 8494 8495 if (pf->hw.func_caps.iwarp) { 8496 pf->flags |= I40E_FLAG_IWARP_ENABLED; 8497 /* IWARP needs one extra vector for CQP just like MISC.*/ 8498 pf->num_iwarp_msix = (int)num_online_cpus() + 1; 8499 } 8500 8501 #ifdef I40E_FCOE 8502 i40e_init_pf_fcoe(pf); 8503 8504 #endif /* I40E_FCOE */ 8505 #ifdef CONFIG_PCI_IOV 8506 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 8507 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 8508 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 8509 pf->num_req_vfs = min_t(int, 8510 pf->hw.func_caps.num_vfs, 8511 I40E_MAX_VF_COUNT); 8512 } 8513 #endif /* CONFIG_PCI_IOV */ 8514 if (pf->hw.mac.type == I40E_MAC_X722) { 8515 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE | 8516 I40E_FLAG_128_QP_RSS_CAPABLE | 8517 I40E_FLAG_HW_ATR_EVICT_CAPABLE | 8518 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE | 8519 I40E_FLAG_WB_ON_ITR_CAPABLE | 8520 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE | 8521 I40E_FLAG_NO_PCI_LINK_CHECK | 8522 I40E_FLAG_100M_SGMII_CAPABLE | 8523 I40E_FLAG_USE_SET_LLDP_MIB | 8524 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; 8525 } else if ((pf->hw.aq.api_maj_ver > 1) || 8526 ((pf->hw.aq.api_maj_ver == 1) && 8527 (pf->hw.aq.api_min_ver > 4))) { 8528 /* Supported in FW API version higher than 1.4 */ 8529 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; 8530 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; 8531 } else { 8532 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; 8533 } 8534 8535 pf->eeprom_version = 0xDEAD; 8536 pf->lan_veb = I40E_NO_VEB; 8537 pf->lan_vsi = I40E_NO_VSI; 8538 8539 /* By default FW has this off for performance reasons */ 8540 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; 8541 8542 /* set up queue assignment tracking */ 8543 size = sizeof(struct i40e_lump_tracking) 8544 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 8545 pf->qp_pile = kzalloc(size, GFP_KERNEL); 8546 if (!pf->qp_pile) { 8547 err = -ENOMEM; 8548 goto sw_init_done; 8549 } 8550 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 8551 pf->qp_pile->search_hint = 0; 8552 8553 pf->tx_timeout_recovery_level = 1; 8554 8555 mutex_init(&pf->switch_mutex); 8556 8557 /* If NPAR is enabled nudge the Tx scheduler */ 8558 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf))) 8559 i40e_set_npar_bw_setting(pf); 8560 8561 sw_init_done: 8562 return err; 8563 } 8564 8565 /** 8566 * i40e_set_ntuple - set the ntuple feature flag and take action 8567 * @pf: board private structure to initialize 8568 * @features: the feature set that the stack is suggesting 8569 * 8570 * returns a bool to indicate if reset needs to happen 8571 **/ 8572 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 8573 { 8574 bool need_reset = false; 8575 8576 /* Check if Flow Director n-tuple support was enabled or disabled. If 8577 * the state changed, we need to reset. 8578 */ 8579 if (features & NETIF_F_NTUPLE) { 8580 /* Enable filters and mark for reset */ 8581 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 8582 need_reset = true; 8583 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 8584 } else { 8585 /* turn off filters, mark for reset and clear SW filter list */ 8586 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 8587 need_reset = true; 8588 i40e_fdir_filter_exit(pf); 8589 } 8590 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8591 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; 8592 /* reset fd counters */ 8593 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0; 8594 pf->fdir_pf_active_filters = 0; 8595 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 8596 if (I40E_DEBUG_FD & pf->hw.debug_mask) 8597 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 8598 /* if ATR was auto disabled it can be re-enabled. */ 8599 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 8600 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) 8601 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; 8602 } 8603 return need_reset; 8604 } 8605 8606 /** 8607 * i40e_set_features - set the netdev feature flags 8608 * @netdev: ptr to the netdev being adjusted 8609 * @features: the feature set that the stack is suggesting 8610 **/ 8611 static int i40e_set_features(struct net_device *netdev, 8612 netdev_features_t features) 8613 { 8614 struct i40e_netdev_priv *np = netdev_priv(netdev); 8615 struct i40e_vsi *vsi = np->vsi; 8616 struct i40e_pf *pf = vsi->back; 8617 bool need_reset; 8618 8619 if (features & NETIF_F_HW_VLAN_CTAG_RX) 8620 i40e_vlan_stripping_enable(vsi); 8621 else 8622 i40e_vlan_stripping_disable(vsi); 8623 8624 need_reset = i40e_set_ntuple(pf, features); 8625 8626 if (need_reset) 8627 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 8628 8629 return 0; 8630 } 8631 8632 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE) 8633 /** 8634 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port 8635 * @pf: board private structure 8636 * @port: The UDP port to look up 8637 * 8638 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 8639 **/ 8640 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port) 8641 { 8642 u8 i; 8643 8644 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 8645 if (pf->udp_ports[i].index == port) 8646 return i; 8647 } 8648 8649 return i; 8650 } 8651 8652 #endif 8653 8654 #if IS_ENABLED(CONFIG_VXLAN) 8655 /** 8656 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up 8657 * @netdev: This physical port's netdev 8658 * @sa_family: Socket Family that VXLAN is notifying us about 8659 * @port: New UDP port number that VXLAN started listening to 8660 **/ 8661 static void i40e_add_vxlan_port(struct net_device *netdev, 8662 sa_family_t sa_family, __be16 port) 8663 { 8664 struct i40e_netdev_priv *np = netdev_priv(netdev); 8665 struct i40e_vsi *vsi = np->vsi; 8666 struct i40e_pf *pf = vsi->back; 8667 u8 next_idx; 8668 u8 idx; 8669 8670 idx = i40e_get_udp_port_idx(pf, port); 8671 8672 /* Check if port already exists */ 8673 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8674 netdev_info(netdev, "vxlan port %d already offloaded\n", 8675 ntohs(port)); 8676 return; 8677 } 8678 8679 /* Now check if there is space to add the new port */ 8680 next_idx = i40e_get_udp_port_idx(pf, 0); 8681 8682 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8683 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n", 8684 ntohs(port)); 8685 return; 8686 } 8687 8688 /* New port: add it and mark its index in the bitmap */ 8689 pf->udp_ports[next_idx].index = port; 8690 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN; 8691 pf->pending_udp_bitmap |= BIT_ULL(next_idx); 8692 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 8693 } 8694 8695 /** 8696 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away 8697 * @netdev: This physical port's netdev 8698 * @sa_family: Socket Family that VXLAN is notifying us about 8699 * @port: UDP port number that VXLAN stopped listening to 8700 **/ 8701 static void i40e_del_vxlan_port(struct net_device *netdev, 8702 sa_family_t sa_family, __be16 port) 8703 { 8704 struct i40e_netdev_priv *np = netdev_priv(netdev); 8705 struct i40e_vsi *vsi = np->vsi; 8706 struct i40e_pf *pf = vsi->back; 8707 u8 idx; 8708 8709 idx = i40e_get_udp_port_idx(pf, port); 8710 8711 /* Check if port already exists */ 8712 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8713 /* if port exists, set it to 0 (mark for deletion) 8714 * and make it pending 8715 */ 8716 pf->udp_ports[idx].index = 0; 8717 pf->pending_udp_bitmap |= BIT_ULL(idx); 8718 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 8719 } else { 8720 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n", 8721 ntohs(port)); 8722 } 8723 } 8724 #endif 8725 8726 #if IS_ENABLED(CONFIG_GENEVE) 8727 /** 8728 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up 8729 * @netdev: This physical port's netdev 8730 * @sa_family: Socket Family that GENEVE is notifying us about 8731 * @port: New UDP port number that GENEVE started listening to 8732 **/ 8733 static void i40e_add_geneve_port(struct net_device *netdev, 8734 sa_family_t sa_family, __be16 port) 8735 { 8736 struct i40e_netdev_priv *np = netdev_priv(netdev); 8737 struct i40e_vsi *vsi = np->vsi; 8738 struct i40e_pf *pf = vsi->back; 8739 u8 next_idx; 8740 u8 idx; 8741 8742 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)) 8743 return; 8744 8745 idx = i40e_get_udp_port_idx(pf, port); 8746 8747 /* Check if port already exists */ 8748 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8749 netdev_info(netdev, "udp port %d already offloaded\n", 8750 ntohs(port)); 8751 return; 8752 } 8753 8754 /* Now check if there is space to add the new port */ 8755 next_idx = i40e_get_udp_port_idx(pf, 0); 8756 8757 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8758 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n", 8759 ntohs(port)); 8760 return; 8761 } 8762 8763 /* New port: add it and mark its index in the bitmap */ 8764 pf->udp_ports[next_idx].index = port; 8765 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE; 8766 pf->pending_udp_bitmap |= BIT_ULL(next_idx); 8767 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 8768 8769 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port)); 8770 } 8771 8772 /** 8773 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away 8774 * @netdev: This physical port's netdev 8775 * @sa_family: Socket Family that GENEVE is notifying us about 8776 * @port: UDP port number that GENEVE stopped listening to 8777 **/ 8778 static void i40e_del_geneve_port(struct net_device *netdev, 8779 sa_family_t sa_family, __be16 port) 8780 { 8781 struct i40e_netdev_priv *np = netdev_priv(netdev); 8782 struct i40e_vsi *vsi = np->vsi; 8783 struct i40e_pf *pf = vsi->back; 8784 u8 idx; 8785 8786 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)) 8787 return; 8788 8789 idx = i40e_get_udp_port_idx(pf, port); 8790 8791 /* Check if port already exists */ 8792 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 8793 /* if port exists, set it to 0 (mark for deletion) 8794 * and make it pending 8795 */ 8796 pf->udp_ports[idx].index = 0; 8797 pf->pending_udp_bitmap |= BIT_ULL(idx); 8798 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 8799 8800 dev_info(&pf->pdev->dev, "deleting geneve port %d\n", 8801 ntohs(port)); 8802 } else { 8803 netdev_warn(netdev, "geneve port %d was not found, not deleting\n", 8804 ntohs(port)); 8805 } 8806 } 8807 #endif 8808 8809 static int i40e_get_phys_port_id(struct net_device *netdev, 8810 struct netdev_phys_item_id *ppid) 8811 { 8812 struct i40e_netdev_priv *np = netdev_priv(netdev); 8813 struct i40e_pf *pf = np->vsi->back; 8814 struct i40e_hw *hw = &pf->hw; 8815 8816 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID)) 8817 return -EOPNOTSUPP; 8818 8819 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 8820 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 8821 8822 return 0; 8823 } 8824 8825 /** 8826 * i40e_ndo_fdb_add - add an entry to the hardware database 8827 * @ndm: the input from the stack 8828 * @tb: pointer to array of nladdr (unused) 8829 * @dev: the net device pointer 8830 * @addr: the MAC address entry being added 8831 * @flags: instructions from stack about fdb operation 8832 */ 8833 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 8834 struct net_device *dev, 8835 const unsigned char *addr, u16 vid, 8836 u16 flags) 8837 { 8838 struct i40e_netdev_priv *np = netdev_priv(dev); 8839 struct i40e_pf *pf = np->vsi->back; 8840 int err = 0; 8841 8842 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 8843 return -EOPNOTSUPP; 8844 8845 if (vid) { 8846 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 8847 return -EINVAL; 8848 } 8849 8850 /* Hardware does not support aging addresses so if a 8851 * ndm_state is given only allow permanent addresses 8852 */ 8853 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 8854 netdev_info(dev, "FDB only supports static addresses\n"); 8855 return -EINVAL; 8856 } 8857 8858 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 8859 err = dev_uc_add_excl(dev, addr); 8860 else if (is_multicast_ether_addr(addr)) 8861 err = dev_mc_add_excl(dev, addr); 8862 else 8863 err = -EINVAL; 8864 8865 /* Only return duplicate errors if NLM_F_EXCL is set */ 8866 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 8867 err = 0; 8868 8869 return err; 8870 } 8871 8872 /** 8873 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 8874 * @dev: the netdev being configured 8875 * @nlh: RTNL message 8876 * 8877 * Inserts a new hardware bridge if not already created and 8878 * enables the bridging mode requested (VEB or VEPA). If the 8879 * hardware bridge has already been inserted and the request 8880 * is to change the mode then that requires a PF reset to 8881 * allow rebuild of the components with required hardware 8882 * bridge mode enabled. 8883 **/ 8884 static int i40e_ndo_bridge_setlink(struct net_device *dev, 8885 struct nlmsghdr *nlh, 8886 u16 flags) 8887 { 8888 struct i40e_netdev_priv *np = netdev_priv(dev); 8889 struct i40e_vsi *vsi = np->vsi; 8890 struct i40e_pf *pf = vsi->back; 8891 struct i40e_veb *veb = NULL; 8892 struct nlattr *attr, *br_spec; 8893 int i, rem; 8894 8895 /* Only for PF VSI for now */ 8896 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8897 return -EOPNOTSUPP; 8898 8899 /* Find the HW bridge for PF VSI */ 8900 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8901 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8902 veb = pf->veb[i]; 8903 } 8904 8905 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 8906 8907 nla_for_each_nested(attr, br_spec, rem) { 8908 __u16 mode; 8909 8910 if (nla_type(attr) != IFLA_BRIDGE_MODE) 8911 continue; 8912 8913 mode = nla_get_u16(attr); 8914 if ((mode != BRIDGE_MODE_VEPA) && 8915 (mode != BRIDGE_MODE_VEB)) 8916 return -EINVAL; 8917 8918 /* Insert a new HW bridge */ 8919 if (!veb) { 8920 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 8921 vsi->tc_config.enabled_tc); 8922 if (veb) { 8923 veb->bridge_mode = mode; 8924 i40e_config_bridge_mode(veb); 8925 } else { 8926 /* No Bridge HW offload available */ 8927 return -ENOENT; 8928 } 8929 break; 8930 } else if (mode != veb->bridge_mode) { 8931 /* Existing HW bridge but different mode needs reset */ 8932 veb->bridge_mode = mode; 8933 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 8934 if (mode == BRIDGE_MODE_VEB) 8935 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 8936 else 8937 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 8938 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED)); 8939 break; 8940 } 8941 } 8942 8943 return 0; 8944 } 8945 8946 /** 8947 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 8948 * @skb: skb buff 8949 * @pid: process id 8950 * @seq: RTNL message seq # 8951 * @dev: the netdev being configured 8952 * @filter_mask: unused 8953 * @nlflags: netlink flags passed in 8954 * 8955 * Return the mode in which the hardware bridge is operating in 8956 * i.e VEB or VEPA. 8957 **/ 8958 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 8959 struct net_device *dev, 8960 u32 __always_unused filter_mask, 8961 int nlflags) 8962 { 8963 struct i40e_netdev_priv *np = netdev_priv(dev); 8964 struct i40e_vsi *vsi = np->vsi; 8965 struct i40e_pf *pf = vsi->back; 8966 struct i40e_veb *veb = NULL; 8967 int i; 8968 8969 /* Only for PF VSI for now */ 8970 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 8971 return -EOPNOTSUPP; 8972 8973 /* Find the HW bridge for the PF VSI */ 8974 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 8975 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 8976 veb = pf->veb[i]; 8977 } 8978 8979 if (!veb) 8980 return 0; 8981 8982 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 8983 nlflags, 0, 0, filter_mask, NULL); 8984 } 8985 8986 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes 8987 * inner mac plus all inner ethertypes. 8988 */ 8989 #define I40E_MAX_TUNNEL_HDR_LEN 128 8990 /** 8991 * i40e_features_check - Validate encapsulated packet conforms to limits 8992 * @skb: skb buff 8993 * @dev: This physical port's netdev 8994 * @features: Offload features that the stack believes apply 8995 **/ 8996 static netdev_features_t i40e_features_check(struct sk_buff *skb, 8997 struct net_device *dev, 8998 netdev_features_t features) 8999 { 9000 if (skb->encapsulation && 9001 ((skb_inner_network_header(skb) - skb_transport_header(skb)) > 9002 I40E_MAX_TUNNEL_HDR_LEN)) 9003 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 9004 9005 return features; 9006 } 9007 9008 static const struct net_device_ops i40e_netdev_ops = { 9009 .ndo_open = i40e_open, 9010 .ndo_stop = i40e_close, 9011 .ndo_start_xmit = i40e_lan_xmit_frame, 9012 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 9013 .ndo_set_rx_mode = i40e_set_rx_mode, 9014 .ndo_validate_addr = eth_validate_addr, 9015 .ndo_set_mac_address = i40e_set_mac, 9016 .ndo_change_mtu = i40e_change_mtu, 9017 .ndo_do_ioctl = i40e_ioctl, 9018 .ndo_tx_timeout = i40e_tx_timeout, 9019 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 9020 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 9021 #ifdef CONFIG_NET_POLL_CONTROLLER 9022 .ndo_poll_controller = i40e_netpoll, 9023 #endif 9024 .ndo_setup_tc = __i40e_setup_tc, 9025 #ifdef I40E_FCOE 9026 .ndo_fcoe_enable = i40e_fcoe_enable, 9027 .ndo_fcoe_disable = i40e_fcoe_disable, 9028 #endif 9029 .ndo_set_features = i40e_set_features, 9030 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 9031 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 9032 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 9033 .ndo_get_vf_config = i40e_ndo_get_vf_config, 9034 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 9035 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 9036 .ndo_set_vf_trust = i40e_ndo_set_vf_trust, 9037 #if IS_ENABLED(CONFIG_VXLAN) 9038 .ndo_add_vxlan_port = i40e_add_vxlan_port, 9039 .ndo_del_vxlan_port = i40e_del_vxlan_port, 9040 #endif 9041 #if IS_ENABLED(CONFIG_GENEVE) 9042 .ndo_add_geneve_port = i40e_add_geneve_port, 9043 .ndo_del_geneve_port = i40e_del_geneve_port, 9044 #endif 9045 .ndo_get_phys_port_id = i40e_get_phys_port_id, 9046 .ndo_fdb_add = i40e_ndo_fdb_add, 9047 .ndo_features_check = i40e_features_check, 9048 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 9049 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 9050 }; 9051 9052 /** 9053 * i40e_config_netdev - Setup the netdev flags 9054 * @vsi: the VSI being configured 9055 * 9056 * Returns 0 on success, negative value on failure 9057 **/ 9058 static int i40e_config_netdev(struct i40e_vsi *vsi) 9059 { 9060 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 9061 struct i40e_pf *pf = vsi->back; 9062 struct i40e_hw *hw = &pf->hw; 9063 struct i40e_netdev_priv *np; 9064 struct net_device *netdev; 9065 u8 mac_addr[ETH_ALEN]; 9066 int etherdev_size; 9067 9068 etherdev_size = sizeof(struct i40e_netdev_priv); 9069 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 9070 if (!netdev) 9071 return -ENOMEM; 9072 9073 vsi->netdev = netdev; 9074 np = netdev_priv(netdev); 9075 np->vsi = vsi; 9076 9077 netdev->hw_enc_features |= NETIF_F_SG | 9078 NETIF_F_IP_CSUM | 9079 NETIF_F_IPV6_CSUM | 9080 NETIF_F_HIGHDMA | 9081 NETIF_F_SOFT_FEATURES | 9082 NETIF_F_TSO | 9083 NETIF_F_TSO_ECN | 9084 NETIF_F_TSO6 | 9085 NETIF_F_GSO_GRE | 9086 NETIF_F_GSO_GRE_CSUM | 9087 NETIF_F_GSO_IPXIP4 | 9088 NETIF_F_GSO_IPXIP6 | 9089 NETIF_F_GSO_UDP_TUNNEL | 9090 NETIF_F_GSO_UDP_TUNNEL_CSUM | 9091 NETIF_F_GSO_PARTIAL | 9092 NETIF_F_SCTP_CRC | 9093 NETIF_F_RXHASH | 9094 NETIF_F_RXCSUM | 9095 0; 9096 9097 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)) 9098 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; 9099 9100 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; 9101 9102 /* record features VLANs can make use of */ 9103 netdev->vlan_features |= netdev->hw_enc_features | 9104 NETIF_F_TSO_MANGLEID; 9105 9106 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 9107 netdev->hw_features |= NETIF_F_NTUPLE; 9108 9109 netdev->hw_features |= netdev->hw_enc_features | 9110 NETIF_F_HW_VLAN_CTAG_TX | 9111 NETIF_F_HW_VLAN_CTAG_RX; 9112 9113 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER; 9114 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; 9115 9116 if (vsi->type == I40E_VSI_MAIN) { 9117 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 9118 ether_addr_copy(mac_addr, hw->mac.perm_addr); 9119 /* The following steps are necessary to prevent reception 9120 * of tagged packets - some older NVM configurations load a 9121 * default a MAC-VLAN filter that accepts any tagged packet 9122 * which must be replaced by a normal filter. 9123 */ 9124 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) { 9125 spin_lock_bh(&vsi->mac_filter_list_lock); 9126 i40e_add_filter(vsi, mac_addr, 9127 I40E_VLAN_ANY, false, true); 9128 spin_unlock_bh(&vsi->mac_filter_list_lock); 9129 } 9130 } else if ((pf->hw.aq.api_maj_ver > 1) || 9131 ((pf->hw.aq.api_maj_ver == 1) && 9132 (pf->hw.aq.api_min_ver > 4))) { 9133 /* Supported in FW API version higher than 1.4 */ 9134 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; 9135 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; 9136 } else { 9137 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 9138 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 9139 pf->vsi[pf->lan_vsi]->netdev->name); 9140 random_ether_addr(mac_addr); 9141 9142 spin_lock_bh(&vsi->mac_filter_list_lock); 9143 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); 9144 spin_unlock_bh(&vsi->mac_filter_list_lock); 9145 } 9146 9147 spin_lock_bh(&vsi->mac_filter_list_lock); 9148 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 9149 spin_unlock_bh(&vsi->mac_filter_list_lock); 9150 9151 ether_addr_copy(netdev->dev_addr, mac_addr); 9152 ether_addr_copy(netdev->perm_addr, mac_addr); 9153 9154 netdev->priv_flags |= IFF_UNICAST_FLT; 9155 netdev->priv_flags |= IFF_SUPP_NOFCS; 9156 /* Setup netdev TC information */ 9157 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 9158 9159 netdev->netdev_ops = &i40e_netdev_ops; 9160 netdev->watchdog_timeo = 5 * HZ; 9161 i40e_set_ethtool_ops(netdev); 9162 #ifdef I40E_FCOE 9163 i40e_fcoe_config_netdev(netdev, vsi); 9164 #endif 9165 9166 return 0; 9167 } 9168 9169 /** 9170 * i40e_vsi_delete - Delete a VSI from the switch 9171 * @vsi: the VSI being removed 9172 * 9173 * Returns 0 on success, negative value on failure 9174 **/ 9175 static void i40e_vsi_delete(struct i40e_vsi *vsi) 9176 { 9177 /* remove default VSI is not allowed */ 9178 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 9179 return; 9180 9181 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 9182 } 9183 9184 /** 9185 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 9186 * @vsi: the VSI being queried 9187 * 9188 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 9189 **/ 9190 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 9191 { 9192 struct i40e_veb *veb; 9193 struct i40e_pf *pf = vsi->back; 9194 9195 /* Uplink is not a bridge so default to VEB */ 9196 if (vsi->veb_idx == I40E_NO_VEB) 9197 return 1; 9198 9199 veb = pf->veb[vsi->veb_idx]; 9200 if (!veb) { 9201 dev_info(&pf->pdev->dev, 9202 "There is no veb associated with the bridge\n"); 9203 return -ENOENT; 9204 } 9205 9206 /* Uplink is a bridge in VEPA mode */ 9207 if (veb->bridge_mode & BRIDGE_MODE_VEPA) { 9208 return 0; 9209 } else { 9210 /* Uplink is a bridge in VEB mode */ 9211 return 1; 9212 } 9213 9214 /* VEPA is now default bridge, so return 0 */ 9215 return 0; 9216 } 9217 9218 /** 9219 * i40e_add_vsi - Add a VSI to the switch 9220 * @vsi: the VSI being configured 9221 * 9222 * This initializes a VSI context depending on the VSI type to be added and 9223 * passes it down to the add_vsi aq command. 9224 **/ 9225 static int i40e_add_vsi(struct i40e_vsi *vsi) 9226 { 9227 int ret = -ENODEV; 9228 i40e_status aq_ret = 0; 9229 u8 laa_macaddr[ETH_ALEN]; 9230 bool found_laa_mac_filter = false; 9231 struct i40e_pf *pf = vsi->back; 9232 struct i40e_hw *hw = &pf->hw; 9233 struct i40e_vsi_context ctxt; 9234 struct i40e_mac_filter *f, *ftmp; 9235 9236 u8 enabled_tc = 0x1; /* TC0 enabled */ 9237 int f_count = 0; 9238 9239 memset(&ctxt, 0, sizeof(ctxt)); 9240 switch (vsi->type) { 9241 case I40E_VSI_MAIN: 9242 /* The PF's main VSI is already setup as part of the 9243 * device initialization, so we'll not bother with 9244 * the add_vsi call, but we will retrieve the current 9245 * VSI context. 9246 */ 9247 ctxt.seid = pf->main_vsi_seid; 9248 ctxt.pf_num = pf->hw.pf_id; 9249 ctxt.vf_num = 0; 9250 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 9251 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9252 if (ret) { 9253 dev_info(&pf->pdev->dev, 9254 "couldn't get PF vsi config, err %s aq_err %s\n", 9255 i40e_stat_str(&pf->hw, ret), 9256 i40e_aq_str(&pf->hw, 9257 pf->hw.aq.asq_last_status)); 9258 return -ENOENT; 9259 } 9260 vsi->info = ctxt.info; 9261 vsi->info.valid_sections = 0; 9262 9263 vsi->seid = ctxt.seid; 9264 vsi->id = ctxt.vsi_number; 9265 9266 enabled_tc = i40e_pf_get_tc_map(pf); 9267 9268 /* MFP mode setup queue map and update VSI */ 9269 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 9270 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 9271 memset(&ctxt, 0, sizeof(ctxt)); 9272 ctxt.seid = pf->main_vsi_seid; 9273 ctxt.pf_num = pf->hw.pf_id; 9274 ctxt.vf_num = 0; 9275 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 9276 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 9277 if (ret) { 9278 dev_info(&pf->pdev->dev, 9279 "update vsi failed, err %s aq_err %s\n", 9280 i40e_stat_str(&pf->hw, ret), 9281 i40e_aq_str(&pf->hw, 9282 pf->hw.aq.asq_last_status)); 9283 ret = -ENOENT; 9284 goto err; 9285 } 9286 /* update the local VSI info queue map */ 9287 i40e_vsi_update_queue_map(vsi, &ctxt); 9288 vsi->info.valid_sections = 0; 9289 } else { 9290 /* Default/Main VSI is only enabled for TC0 9291 * reconfigure it to enable all TCs that are 9292 * available on the port in SFP mode. 9293 * For MFP case the iSCSI PF would use this 9294 * flow to enable LAN+iSCSI TC. 9295 */ 9296 ret = i40e_vsi_config_tc(vsi, enabled_tc); 9297 if (ret) { 9298 dev_info(&pf->pdev->dev, 9299 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", 9300 enabled_tc, 9301 i40e_stat_str(&pf->hw, ret), 9302 i40e_aq_str(&pf->hw, 9303 pf->hw.aq.asq_last_status)); 9304 ret = -ENOENT; 9305 } 9306 } 9307 break; 9308 9309 case I40E_VSI_FDIR: 9310 ctxt.pf_num = hw->pf_id; 9311 ctxt.vf_num = 0; 9312 ctxt.uplink_seid = vsi->uplink_seid; 9313 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9314 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 9315 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 9316 (i40e_is_vsi_uplink_mode_veb(vsi))) { 9317 ctxt.info.valid_sections |= 9318 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9319 ctxt.info.switch_id = 9320 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9321 } 9322 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9323 break; 9324 9325 case I40E_VSI_VMDQ2: 9326 ctxt.pf_num = hw->pf_id; 9327 ctxt.vf_num = 0; 9328 ctxt.uplink_seid = vsi->uplink_seid; 9329 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9330 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 9331 9332 /* This VSI is connected to VEB so the switch_id 9333 * should be set to zero by default. 9334 */ 9335 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 9336 ctxt.info.valid_sections |= 9337 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9338 ctxt.info.switch_id = 9339 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9340 } 9341 9342 /* Setup the VSI tx/rx queue map for TC0 only for now */ 9343 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9344 break; 9345 9346 case I40E_VSI_SRIOV: 9347 ctxt.pf_num = hw->pf_id; 9348 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 9349 ctxt.uplink_seid = vsi->uplink_seid; 9350 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 9351 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 9352 9353 /* This VSI is connected to VEB so the switch_id 9354 * should be set to zero by default. 9355 */ 9356 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 9357 ctxt.info.valid_sections |= 9358 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 9359 ctxt.info.switch_id = 9360 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 9361 } 9362 9363 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 9364 ctxt.info.valid_sections |= 9365 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 9366 ctxt.info.queueing_opt_flags |= 9367 (I40E_AQ_VSI_QUE_OPT_TCP_ENA | 9368 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI); 9369 } 9370 9371 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 9372 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 9373 if (pf->vf[vsi->vf_id].spoofchk) { 9374 ctxt.info.valid_sections |= 9375 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 9376 ctxt.info.sec_flags |= 9377 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 9378 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 9379 } 9380 /* Setup the VSI tx/rx queue map for TC0 only for now */ 9381 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 9382 break; 9383 9384 #ifdef I40E_FCOE 9385 case I40E_VSI_FCOE: 9386 ret = i40e_fcoe_vsi_init(vsi, &ctxt); 9387 if (ret) { 9388 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n"); 9389 return ret; 9390 } 9391 break; 9392 9393 #endif /* I40E_FCOE */ 9394 case I40E_VSI_IWARP: 9395 /* send down message to iWARP */ 9396 break; 9397 9398 default: 9399 return -ENODEV; 9400 } 9401 9402 if (vsi->type != I40E_VSI_MAIN) { 9403 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 9404 if (ret) { 9405 dev_info(&vsi->back->pdev->dev, 9406 "add vsi failed, err %s aq_err %s\n", 9407 i40e_stat_str(&pf->hw, ret), 9408 i40e_aq_str(&pf->hw, 9409 pf->hw.aq.asq_last_status)); 9410 ret = -ENOENT; 9411 goto err; 9412 } 9413 vsi->info = ctxt.info; 9414 vsi->info.valid_sections = 0; 9415 vsi->seid = ctxt.seid; 9416 vsi->id = ctxt.vsi_number; 9417 } 9418 /* Except FDIR VSI, for all othet VSI set the broadcast filter */ 9419 if (vsi->type != I40E_VSI_FDIR) { 9420 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL); 9421 if (aq_ret) { 9422 ret = i40e_aq_rc_to_posix(aq_ret, 9423 hw->aq.asq_last_status); 9424 dev_info(&pf->pdev->dev, 9425 "set brdcast promisc failed, err %s, aq_err %s\n", 9426 i40e_stat_str(hw, aq_ret), 9427 i40e_aq_str(hw, hw->aq.asq_last_status)); 9428 } 9429 } 9430 9431 spin_lock_bh(&vsi->mac_filter_list_lock); 9432 /* If macvlan filters already exist, force them to get loaded */ 9433 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { 9434 f->changed = true; 9435 f_count++; 9436 9437 /* Expected to have only one MAC filter entry for LAA in list */ 9438 if (f->is_laa && vsi->type == I40E_VSI_MAIN) { 9439 ether_addr_copy(laa_macaddr, f->macaddr); 9440 found_laa_mac_filter = true; 9441 } 9442 } 9443 spin_unlock_bh(&vsi->mac_filter_list_lock); 9444 9445 if (found_laa_mac_filter) { 9446 struct i40e_aqc_remove_macvlan_element_data element; 9447 9448 memset(&element, 0, sizeof(element)); 9449 ether_addr_copy(element.mac_addr, laa_macaddr); 9450 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 9451 ret = i40e_aq_remove_macvlan(hw, vsi->seid, 9452 &element, 1, NULL); 9453 if (ret) { 9454 /* some older FW has a different default */ 9455 element.flags |= 9456 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 9457 i40e_aq_remove_macvlan(hw, vsi->seid, 9458 &element, 1, NULL); 9459 } 9460 9461 i40e_aq_mac_address_write(hw, 9462 I40E_AQC_WRITE_TYPE_LAA_WOL, 9463 laa_macaddr, NULL); 9464 } 9465 9466 if (f_count) { 9467 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 9468 pf->flags |= I40E_FLAG_FILTER_SYNC; 9469 } 9470 9471 /* Update VSI BW information */ 9472 ret = i40e_vsi_get_bw_info(vsi); 9473 if (ret) { 9474 dev_info(&pf->pdev->dev, 9475 "couldn't get vsi bw info, err %s aq_err %s\n", 9476 i40e_stat_str(&pf->hw, ret), 9477 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 9478 /* VSI is already added so not tearing that up */ 9479 ret = 0; 9480 } 9481 9482 err: 9483 return ret; 9484 } 9485 9486 /** 9487 * i40e_vsi_release - Delete a VSI and free its resources 9488 * @vsi: the VSI being removed 9489 * 9490 * Returns 0 on success or < 0 on error 9491 **/ 9492 int i40e_vsi_release(struct i40e_vsi *vsi) 9493 { 9494 struct i40e_mac_filter *f, *ftmp; 9495 struct i40e_veb *veb = NULL; 9496 struct i40e_pf *pf; 9497 u16 uplink_seid; 9498 int i, n; 9499 9500 pf = vsi->back; 9501 9502 /* release of a VEB-owner or last VSI is not allowed */ 9503 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 9504 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 9505 vsi->seid, vsi->uplink_seid); 9506 return -ENODEV; 9507 } 9508 if (vsi == pf->vsi[pf->lan_vsi] && 9509 !test_bit(__I40E_DOWN, &pf->state)) { 9510 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 9511 return -ENODEV; 9512 } 9513 9514 uplink_seid = vsi->uplink_seid; 9515 if (vsi->type != I40E_VSI_SRIOV) { 9516 if (vsi->netdev_registered) { 9517 vsi->netdev_registered = false; 9518 if (vsi->netdev) { 9519 /* results in a call to i40e_close() */ 9520 unregister_netdev(vsi->netdev); 9521 } 9522 } else { 9523 i40e_vsi_close(vsi); 9524 } 9525 i40e_vsi_disable_irq(vsi); 9526 } 9527 9528 spin_lock_bh(&vsi->mac_filter_list_lock); 9529 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) 9530 i40e_del_filter(vsi, f->macaddr, f->vlan, 9531 f->is_vf, f->is_netdev); 9532 spin_unlock_bh(&vsi->mac_filter_list_lock); 9533 9534 i40e_sync_vsi_filters(vsi); 9535 9536 i40e_vsi_delete(vsi); 9537 i40e_vsi_free_q_vectors(vsi); 9538 if (vsi->netdev) { 9539 free_netdev(vsi->netdev); 9540 vsi->netdev = NULL; 9541 } 9542 i40e_vsi_clear_rings(vsi); 9543 i40e_vsi_clear(vsi); 9544 9545 /* If this was the last thing on the VEB, except for the 9546 * controlling VSI, remove the VEB, which puts the controlling 9547 * VSI onto the next level down in the switch. 9548 * 9549 * Well, okay, there's one more exception here: don't remove 9550 * the orphan VEBs yet. We'll wait for an explicit remove request 9551 * from up the network stack. 9552 */ 9553 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 9554 if (pf->vsi[i] && 9555 pf->vsi[i]->uplink_seid == uplink_seid && 9556 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 9557 n++; /* count the VSIs */ 9558 } 9559 } 9560 for (i = 0; i < I40E_MAX_VEB; i++) { 9561 if (!pf->veb[i]) 9562 continue; 9563 if (pf->veb[i]->uplink_seid == uplink_seid) 9564 n++; /* count the VEBs */ 9565 if (pf->veb[i]->seid == uplink_seid) 9566 veb = pf->veb[i]; 9567 } 9568 if (n == 0 && veb && veb->uplink_seid != 0) 9569 i40e_veb_release(veb); 9570 9571 return 0; 9572 } 9573 9574 /** 9575 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 9576 * @vsi: ptr to the VSI 9577 * 9578 * This should only be called after i40e_vsi_mem_alloc() which allocates the 9579 * corresponding SW VSI structure and initializes num_queue_pairs for the 9580 * newly allocated VSI. 9581 * 9582 * Returns 0 on success or negative on failure 9583 **/ 9584 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 9585 { 9586 int ret = -ENOENT; 9587 struct i40e_pf *pf = vsi->back; 9588 9589 if (vsi->q_vectors[0]) { 9590 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 9591 vsi->seid); 9592 return -EEXIST; 9593 } 9594 9595 if (vsi->base_vector) { 9596 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 9597 vsi->seid, vsi->base_vector); 9598 return -EEXIST; 9599 } 9600 9601 ret = i40e_vsi_alloc_q_vectors(vsi); 9602 if (ret) { 9603 dev_info(&pf->pdev->dev, 9604 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 9605 vsi->num_q_vectors, vsi->seid, ret); 9606 vsi->num_q_vectors = 0; 9607 goto vector_setup_out; 9608 } 9609 9610 /* In Legacy mode, we do not have to get any other vector since we 9611 * piggyback on the misc/ICR0 for queue interrupts. 9612 */ 9613 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 9614 return ret; 9615 if (vsi->num_q_vectors) 9616 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 9617 vsi->num_q_vectors, vsi->idx); 9618 if (vsi->base_vector < 0) { 9619 dev_info(&pf->pdev->dev, 9620 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 9621 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 9622 i40e_vsi_free_q_vectors(vsi); 9623 ret = -ENOENT; 9624 goto vector_setup_out; 9625 } 9626 9627 vector_setup_out: 9628 return ret; 9629 } 9630 9631 /** 9632 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 9633 * @vsi: pointer to the vsi. 9634 * 9635 * This re-allocates a vsi's queue resources. 9636 * 9637 * Returns pointer to the successfully allocated and configured VSI sw struct 9638 * on success, otherwise returns NULL on failure. 9639 **/ 9640 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 9641 { 9642 struct i40e_pf *pf; 9643 u8 enabled_tc; 9644 int ret; 9645 9646 if (!vsi) 9647 return NULL; 9648 9649 pf = vsi->back; 9650 9651 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 9652 i40e_vsi_clear_rings(vsi); 9653 9654 i40e_vsi_free_arrays(vsi, false); 9655 i40e_set_num_rings_in_vsi(vsi); 9656 ret = i40e_vsi_alloc_arrays(vsi, false); 9657 if (ret) 9658 goto err_vsi; 9659 9660 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); 9661 if (ret < 0) { 9662 dev_info(&pf->pdev->dev, 9663 "failed to get tracking for %d queues for VSI %d err %d\n", 9664 vsi->alloc_queue_pairs, vsi->seid, ret); 9665 goto err_vsi; 9666 } 9667 vsi->base_queue = ret; 9668 9669 /* Update the FW view of the VSI. Force a reset of TC and queue 9670 * layout configurations. 9671 */ 9672 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 9673 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 9674 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 9675 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 9676 9677 /* assign it some queues */ 9678 ret = i40e_alloc_rings(vsi); 9679 if (ret) 9680 goto err_rings; 9681 9682 /* map all of the rings to the q_vectors */ 9683 i40e_vsi_map_rings_to_vectors(vsi); 9684 return vsi; 9685 9686 err_rings: 9687 i40e_vsi_free_q_vectors(vsi); 9688 if (vsi->netdev_registered) { 9689 vsi->netdev_registered = false; 9690 unregister_netdev(vsi->netdev); 9691 free_netdev(vsi->netdev); 9692 vsi->netdev = NULL; 9693 } 9694 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 9695 err_vsi: 9696 i40e_vsi_clear(vsi); 9697 return NULL; 9698 } 9699 9700 /** 9701 * i40e_macaddr_init - explicitly write the mac address filters. 9702 * 9703 * @vsi: pointer to the vsi. 9704 * @macaddr: the MAC address 9705 * 9706 * This is needed when the macaddr has been obtained by other 9707 * means than the default, e.g., from Open Firmware or IDPROM. 9708 * Returns 0 on success, negative on failure 9709 **/ 9710 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr) 9711 { 9712 int ret; 9713 struct i40e_aqc_add_macvlan_element_data element; 9714 9715 ret = i40e_aq_mac_address_write(&vsi->back->hw, 9716 I40E_AQC_WRITE_TYPE_LAA_WOL, 9717 macaddr, NULL); 9718 if (ret) { 9719 dev_info(&vsi->back->pdev->dev, 9720 "Addr change for VSI failed: %d\n", ret); 9721 return -EADDRNOTAVAIL; 9722 } 9723 9724 memset(&element, 0, sizeof(element)); 9725 ether_addr_copy(element.mac_addr, macaddr); 9726 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH); 9727 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL); 9728 if (ret) { 9729 dev_info(&vsi->back->pdev->dev, 9730 "add filter failed err %s aq_err %s\n", 9731 i40e_stat_str(&vsi->back->hw, ret), 9732 i40e_aq_str(&vsi->back->hw, 9733 vsi->back->hw.aq.asq_last_status)); 9734 } 9735 return ret; 9736 } 9737 9738 /** 9739 * i40e_vsi_setup - Set up a VSI by a given type 9740 * @pf: board private structure 9741 * @type: VSI type 9742 * @uplink_seid: the switch element to link to 9743 * @param1: usage depends upon VSI type. For VF types, indicates VF id 9744 * 9745 * This allocates the sw VSI structure and its queue resources, then add a VSI 9746 * to the identified VEB. 9747 * 9748 * Returns pointer to the successfully allocated and configure VSI sw struct on 9749 * success, otherwise returns NULL on failure. 9750 **/ 9751 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 9752 u16 uplink_seid, u32 param1) 9753 { 9754 struct i40e_vsi *vsi = NULL; 9755 struct i40e_veb *veb = NULL; 9756 int ret, i; 9757 int v_idx; 9758 9759 /* The requested uplink_seid must be either 9760 * - the PF's port seid 9761 * no VEB is needed because this is the PF 9762 * or this is a Flow Director special case VSI 9763 * - seid of an existing VEB 9764 * - seid of a VSI that owns an existing VEB 9765 * - seid of a VSI that doesn't own a VEB 9766 * a new VEB is created and the VSI becomes the owner 9767 * - seid of the PF VSI, which is what creates the first VEB 9768 * this is a special case of the previous 9769 * 9770 * Find which uplink_seid we were given and create a new VEB if needed 9771 */ 9772 for (i = 0; i < I40E_MAX_VEB; i++) { 9773 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 9774 veb = pf->veb[i]; 9775 break; 9776 } 9777 } 9778 9779 if (!veb && uplink_seid != pf->mac_seid) { 9780 9781 for (i = 0; i < pf->num_alloc_vsi; i++) { 9782 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 9783 vsi = pf->vsi[i]; 9784 break; 9785 } 9786 } 9787 if (!vsi) { 9788 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 9789 uplink_seid); 9790 return NULL; 9791 } 9792 9793 if (vsi->uplink_seid == pf->mac_seid) 9794 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 9795 vsi->tc_config.enabled_tc); 9796 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 9797 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 9798 vsi->tc_config.enabled_tc); 9799 if (veb) { 9800 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 9801 dev_info(&vsi->back->pdev->dev, 9802 "New VSI creation error, uplink seid of LAN VSI expected.\n"); 9803 return NULL; 9804 } 9805 /* We come up by default in VEPA mode if SRIOV is not 9806 * already enabled, in which case we can't force VEPA 9807 * mode. 9808 */ 9809 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 9810 veb->bridge_mode = BRIDGE_MODE_VEPA; 9811 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 9812 } 9813 i40e_config_bridge_mode(veb); 9814 } 9815 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 9816 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 9817 veb = pf->veb[i]; 9818 } 9819 if (!veb) { 9820 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 9821 return NULL; 9822 } 9823 9824 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 9825 uplink_seid = veb->seid; 9826 } 9827 9828 /* get vsi sw struct */ 9829 v_idx = i40e_vsi_mem_alloc(pf, type); 9830 if (v_idx < 0) 9831 goto err_alloc; 9832 vsi = pf->vsi[v_idx]; 9833 if (!vsi) 9834 goto err_alloc; 9835 vsi->type = type; 9836 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 9837 9838 if (type == I40E_VSI_MAIN) 9839 pf->lan_vsi = v_idx; 9840 else if (type == I40E_VSI_SRIOV) 9841 vsi->vf_id = param1; 9842 /* assign it some queues */ 9843 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, 9844 vsi->idx); 9845 if (ret < 0) { 9846 dev_info(&pf->pdev->dev, 9847 "failed to get tracking for %d queues for VSI %d err=%d\n", 9848 vsi->alloc_queue_pairs, vsi->seid, ret); 9849 goto err_vsi; 9850 } 9851 vsi->base_queue = ret; 9852 9853 /* get a VSI from the hardware */ 9854 vsi->uplink_seid = uplink_seid; 9855 ret = i40e_add_vsi(vsi); 9856 if (ret) 9857 goto err_vsi; 9858 9859 switch (vsi->type) { 9860 /* setup the netdev if needed */ 9861 case I40E_VSI_MAIN: 9862 /* Apply relevant filters if a platform-specific mac 9863 * address was selected. 9864 */ 9865 if (!!(pf->flags & I40E_FLAG_PF_MAC)) { 9866 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr); 9867 if (ret) { 9868 dev_warn(&pf->pdev->dev, 9869 "could not set up macaddr; err %d\n", 9870 ret); 9871 } 9872 } 9873 case I40E_VSI_VMDQ2: 9874 case I40E_VSI_FCOE: 9875 ret = i40e_config_netdev(vsi); 9876 if (ret) 9877 goto err_netdev; 9878 ret = register_netdev(vsi->netdev); 9879 if (ret) 9880 goto err_netdev; 9881 vsi->netdev_registered = true; 9882 netif_carrier_off(vsi->netdev); 9883 #ifdef CONFIG_I40E_DCB 9884 /* Setup DCB netlink interface */ 9885 i40e_dcbnl_setup(vsi); 9886 #endif /* CONFIG_I40E_DCB */ 9887 /* fall through */ 9888 9889 case I40E_VSI_FDIR: 9890 /* set up vectors and rings if needed */ 9891 ret = i40e_vsi_setup_vectors(vsi); 9892 if (ret) 9893 goto err_msix; 9894 9895 ret = i40e_alloc_rings(vsi); 9896 if (ret) 9897 goto err_rings; 9898 9899 /* map all of the rings to the q_vectors */ 9900 i40e_vsi_map_rings_to_vectors(vsi); 9901 9902 i40e_vsi_reset_stats(vsi); 9903 break; 9904 9905 default: 9906 /* no netdev or rings for the other VSI types */ 9907 break; 9908 } 9909 9910 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) && 9911 (vsi->type == I40E_VSI_VMDQ2)) { 9912 ret = i40e_vsi_config_rss(vsi); 9913 } 9914 return vsi; 9915 9916 err_rings: 9917 i40e_vsi_free_q_vectors(vsi); 9918 err_msix: 9919 if (vsi->netdev_registered) { 9920 vsi->netdev_registered = false; 9921 unregister_netdev(vsi->netdev); 9922 free_netdev(vsi->netdev); 9923 vsi->netdev = NULL; 9924 } 9925 err_netdev: 9926 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 9927 err_vsi: 9928 i40e_vsi_clear(vsi); 9929 err_alloc: 9930 return NULL; 9931 } 9932 9933 /** 9934 * i40e_veb_get_bw_info - Query VEB BW information 9935 * @veb: the veb to query 9936 * 9937 * Query the Tx scheduler BW configuration data for given VEB 9938 **/ 9939 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 9940 { 9941 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 9942 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 9943 struct i40e_pf *pf = veb->pf; 9944 struct i40e_hw *hw = &pf->hw; 9945 u32 tc_bw_max; 9946 int ret = 0; 9947 int i; 9948 9949 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 9950 &bw_data, NULL); 9951 if (ret) { 9952 dev_info(&pf->pdev->dev, 9953 "query veb bw config failed, err %s aq_err %s\n", 9954 i40e_stat_str(&pf->hw, ret), 9955 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 9956 goto out; 9957 } 9958 9959 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 9960 &ets_data, NULL); 9961 if (ret) { 9962 dev_info(&pf->pdev->dev, 9963 "query veb bw ets config failed, err %s aq_err %s\n", 9964 i40e_stat_str(&pf->hw, ret), 9965 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 9966 goto out; 9967 } 9968 9969 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 9970 veb->bw_max_quanta = ets_data.tc_bw_max; 9971 veb->is_abs_credits = bw_data.absolute_credits_enable; 9972 veb->enabled_tc = ets_data.tc_valid_bits; 9973 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 9974 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 9975 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 9976 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 9977 veb->bw_tc_limit_credits[i] = 9978 le16_to_cpu(bw_data.tc_bw_limits[i]); 9979 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 9980 } 9981 9982 out: 9983 return ret; 9984 } 9985 9986 /** 9987 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 9988 * @pf: board private structure 9989 * 9990 * On error: returns error code (negative) 9991 * On success: returns vsi index in PF (positive) 9992 **/ 9993 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 9994 { 9995 int ret = -ENOENT; 9996 struct i40e_veb *veb; 9997 int i; 9998 9999 /* Need to protect the allocation of switch elements at the PF level */ 10000 mutex_lock(&pf->switch_mutex); 10001 10002 /* VEB list may be fragmented if VEB creation/destruction has 10003 * been happening. We can afford to do a quick scan to look 10004 * for any free slots in the list. 10005 * 10006 * find next empty veb slot, looping back around if necessary 10007 */ 10008 i = 0; 10009 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 10010 i++; 10011 if (i >= I40E_MAX_VEB) { 10012 ret = -ENOMEM; 10013 goto err_alloc_veb; /* out of VEB slots! */ 10014 } 10015 10016 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 10017 if (!veb) { 10018 ret = -ENOMEM; 10019 goto err_alloc_veb; 10020 } 10021 veb->pf = pf; 10022 veb->idx = i; 10023 veb->enabled_tc = 1; 10024 10025 pf->veb[i] = veb; 10026 ret = i; 10027 err_alloc_veb: 10028 mutex_unlock(&pf->switch_mutex); 10029 return ret; 10030 } 10031 10032 /** 10033 * i40e_switch_branch_release - Delete a branch of the switch tree 10034 * @branch: where to start deleting 10035 * 10036 * This uses recursion to find the tips of the branch to be 10037 * removed, deleting until we get back to and can delete this VEB. 10038 **/ 10039 static void i40e_switch_branch_release(struct i40e_veb *branch) 10040 { 10041 struct i40e_pf *pf = branch->pf; 10042 u16 branch_seid = branch->seid; 10043 u16 veb_idx = branch->idx; 10044 int i; 10045 10046 /* release any VEBs on this VEB - RECURSION */ 10047 for (i = 0; i < I40E_MAX_VEB; i++) { 10048 if (!pf->veb[i]) 10049 continue; 10050 if (pf->veb[i]->uplink_seid == branch->seid) 10051 i40e_switch_branch_release(pf->veb[i]); 10052 } 10053 10054 /* Release the VSIs on this VEB, but not the owner VSI. 10055 * 10056 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 10057 * the VEB itself, so don't use (*branch) after this loop. 10058 */ 10059 for (i = 0; i < pf->num_alloc_vsi; i++) { 10060 if (!pf->vsi[i]) 10061 continue; 10062 if (pf->vsi[i]->uplink_seid == branch_seid && 10063 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 10064 i40e_vsi_release(pf->vsi[i]); 10065 } 10066 } 10067 10068 /* There's one corner case where the VEB might not have been 10069 * removed, so double check it here and remove it if needed. 10070 * This case happens if the veb was created from the debugfs 10071 * commands and no VSIs were added to it. 10072 */ 10073 if (pf->veb[veb_idx]) 10074 i40e_veb_release(pf->veb[veb_idx]); 10075 } 10076 10077 /** 10078 * i40e_veb_clear - remove veb struct 10079 * @veb: the veb to remove 10080 **/ 10081 static void i40e_veb_clear(struct i40e_veb *veb) 10082 { 10083 if (!veb) 10084 return; 10085 10086 if (veb->pf) { 10087 struct i40e_pf *pf = veb->pf; 10088 10089 mutex_lock(&pf->switch_mutex); 10090 if (pf->veb[veb->idx] == veb) 10091 pf->veb[veb->idx] = NULL; 10092 mutex_unlock(&pf->switch_mutex); 10093 } 10094 10095 kfree(veb); 10096 } 10097 10098 /** 10099 * i40e_veb_release - Delete a VEB and free its resources 10100 * @veb: the VEB being removed 10101 **/ 10102 void i40e_veb_release(struct i40e_veb *veb) 10103 { 10104 struct i40e_vsi *vsi = NULL; 10105 struct i40e_pf *pf; 10106 int i, n = 0; 10107 10108 pf = veb->pf; 10109 10110 /* find the remaining VSI and check for extras */ 10111 for (i = 0; i < pf->num_alloc_vsi; i++) { 10112 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 10113 n++; 10114 vsi = pf->vsi[i]; 10115 } 10116 } 10117 if (n != 1) { 10118 dev_info(&pf->pdev->dev, 10119 "can't remove VEB %d with %d VSIs left\n", 10120 veb->seid, n); 10121 return; 10122 } 10123 10124 /* move the remaining VSI to uplink veb */ 10125 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 10126 if (veb->uplink_seid) { 10127 vsi->uplink_seid = veb->uplink_seid; 10128 if (veb->uplink_seid == pf->mac_seid) 10129 vsi->veb_idx = I40E_NO_VEB; 10130 else 10131 vsi->veb_idx = veb->veb_idx; 10132 } else { 10133 /* floating VEB */ 10134 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 10135 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 10136 } 10137 10138 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 10139 i40e_veb_clear(veb); 10140 } 10141 10142 /** 10143 * i40e_add_veb - create the VEB in the switch 10144 * @veb: the VEB to be instantiated 10145 * @vsi: the controlling VSI 10146 **/ 10147 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 10148 { 10149 struct i40e_pf *pf = veb->pf; 10150 bool is_default = veb->pf->cur_promisc; 10151 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED); 10152 int ret; 10153 10154 /* get a VEB from the hardware */ 10155 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, 10156 veb->enabled_tc, is_default, 10157 &veb->seid, enable_stats, NULL); 10158 if (ret) { 10159 dev_info(&pf->pdev->dev, 10160 "couldn't add VEB, err %s aq_err %s\n", 10161 i40e_stat_str(&pf->hw, ret), 10162 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10163 return -EPERM; 10164 } 10165 10166 /* get statistics counter */ 10167 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, 10168 &veb->stats_idx, NULL, NULL, NULL); 10169 if (ret) { 10170 dev_info(&pf->pdev->dev, 10171 "couldn't get VEB statistics idx, err %s aq_err %s\n", 10172 i40e_stat_str(&pf->hw, ret), 10173 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10174 return -EPERM; 10175 } 10176 ret = i40e_veb_get_bw_info(veb); 10177 if (ret) { 10178 dev_info(&pf->pdev->dev, 10179 "couldn't get VEB bw info, err %s aq_err %s\n", 10180 i40e_stat_str(&pf->hw, ret), 10181 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10182 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 10183 return -ENOENT; 10184 } 10185 10186 vsi->uplink_seid = veb->seid; 10187 vsi->veb_idx = veb->idx; 10188 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 10189 10190 return 0; 10191 } 10192 10193 /** 10194 * i40e_veb_setup - Set up a VEB 10195 * @pf: board private structure 10196 * @flags: VEB setup flags 10197 * @uplink_seid: the switch element to link to 10198 * @vsi_seid: the initial VSI seid 10199 * @enabled_tc: Enabled TC bit-map 10200 * 10201 * This allocates the sw VEB structure and links it into the switch 10202 * It is possible and legal for this to be a duplicate of an already 10203 * existing VEB. It is also possible for both uplink and vsi seids 10204 * to be zero, in order to create a floating VEB. 10205 * 10206 * Returns pointer to the successfully allocated VEB sw struct on 10207 * success, otherwise returns NULL on failure. 10208 **/ 10209 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 10210 u16 uplink_seid, u16 vsi_seid, 10211 u8 enabled_tc) 10212 { 10213 struct i40e_veb *veb, *uplink_veb = NULL; 10214 int vsi_idx, veb_idx; 10215 int ret; 10216 10217 /* if one seid is 0, the other must be 0 to create a floating relay */ 10218 if ((uplink_seid == 0 || vsi_seid == 0) && 10219 (uplink_seid + vsi_seid != 0)) { 10220 dev_info(&pf->pdev->dev, 10221 "one, not both seid's are 0: uplink=%d vsi=%d\n", 10222 uplink_seid, vsi_seid); 10223 return NULL; 10224 } 10225 10226 /* make sure there is such a vsi and uplink */ 10227 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 10228 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 10229 break; 10230 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 10231 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 10232 vsi_seid); 10233 return NULL; 10234 } 10235 10236 if (uplink_seid && uplink_seid != pf->mac_seid) { 10237 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 10238 if (pf->veb[veb_idx] && 10239 pf->veb[veb_idx]->seid == uplink_seid) { 10240 uplink_veb = pf->veb[veb_idx]; 10241 break; 10242 } 10243 } 10244 if (!uplink_veb) { 10245 dev_info(&pf->pdev->dev, 10246 "uplink seid %d not found\n", uplink_seid); 10247 return NULL; 10248 } 10249 } 10250 10251 /* get veb sw struct */ 10252 veb_idx = i40e_veb_mem_alloc(pf); 10253 if (veb_idx < 0) 10254 goto err_alloc; 10255 veb = pf->veb[veb_idx]; 10256 veb->flags = flags; 10257 veb->uplink_seid = uplink_seid; 10258 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 10259 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 10260 10261 /* create the VEB in the switch */ 10262 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 10263 if (ret) 10264 goto err_veb; 10265 if (vsi_idx == pf->lan_vsi) 10266 pf->lan_veb = veb->idx; 10267 10268 return veb; 10269 10270 err_veb: 10271 i40e_veb_clear(veb); 10272 err_alloc: 10273 return NULL; 10274 } 10275 10276 /** 10277 * i40e_setup_pf_switch_element - set PF vars based on switch type 10278 * @pf: board private structure 10279 * @ele: element we are building info from 10280 * @num_reported: total number of elements 10281 * @printconfig: should we print the contents 10282 * 10283 * helper function to assist in extracting a few useful SEID values. 10284 **/ 10285 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 10286 struct i40e_aqc_switch_config_element_resp *ele, 10287 u16 num_reported, bool printconfig) 10288 { 10289 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 10290 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 10291 u8 element_type = ele->element_type; 10292 u16 seid = le16_to_cpu(ele->seid); 10293 10294 if (printconfig) 10295 dev_info(&pf->pdev->dev, 10296 "type=%d seid=%d uplink=%d downlink=%d\n", 10297 element_type, seid, uplink_seid, downlink_seid); 10298 10299 switch (element_type) { 10300 case I40E_SWITCH_ELEMENT_TYPE_MAC: 10301 pf->mac_seid = seid; 10302 break; 10303 case I40E_SWITCH_ELEMENT_TYPE_VEB: 10304 /* Main VEB? */ 10305 if (uplink_seid != pf->mac_seid) 10306 break; 10307 if (pf->lan_veb == I40E_NO_VEB) { 10308 int v; 10309 10310 /* find existing or else empty VEB */ 10311 for (v = 0; v < I40E_MAX_VEB; v++) { 10312 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 10313 pf->lan_veb = v; 10314 break; 10315 } 10316 } 10317 if (pf->lan_veb == I40E_NO_VEB) { 10318 v = i40e_veb_mem_alloc(pf); 10319 if (v < 0) 10320 break; 10321 pf->lan_veb = v; 10322 } 10323 } 10324 10325 pf->veb[pf->lan_veb]->seid = seid; 10326 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 10327 pf->veb[pf->lan_veb]->pf = pf; 10328 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 10329 break; 10330 case I40E_SWITCH_ELEMENT_TYPE_VSI: 10331 if (num_reported != 1) 10332 break; 10333 /* This is immediately after a reset so we can assume this is 10334 * the PF's VSI 10335 */ 10336 pf->mac_seid = uplink_seid; 10337 pf->pf_seid = downlink_seid; 10338 pf->main_vsi_seid = seid; 10339 if (printconfig) 10340 dev_info(&pf->pdev->dev, 10341 "pf_seid=%d main_vsi_seid=%d\n", 10342 pf->pf_seid, pf->main_vsi_seid); 10343 break; 10344 case I40E_SWITCH_ELEMENT_TYPE_PF: 10345 case I40E_SWITCH_ELEMENT_TYPE_VF: 10346 case I40E_SWITCH_ELEMENT_TYPE_EMP: 10347 case I40E_SWITCH_ELEMENT_TYPE_BMC: 10348 case I40E_SWITCH_ELEMENT_TYPE_PE: 10349 case I40E_SWITCH_ELEMENT_TYPE_PA: 10350 /* ignore these for now */ 10351 break; 10352 default: 10353 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 10354 element_type, seid); 10355 break; 10356 } 10357 } 10358 10359 /** 10360 * i40e_fetch_switch_configuration - Get switch config from firmware 10361 * @pf: board private structure 10362 * @printconfig: should we print the contents 10363 * 10364 * Get the current switch configuration from the device and 10365 * extract a few useful SEID values. 10366 **/ 10367 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 10368 { 10369 struct i40e_aqc_get_switch_config_resp *sw_config; 10370 u16 next_seid = 0; 10371 int ret = 0; 10372 u8 *aq_buf; 10373 int i; 10374 10375 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 10376 if (!aq_buf) 10377 return -ENOMEM; 10378 10379 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 10380 do { 10381 u16 num_reported, num_total; 10382 10383 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 10384 I40E_AQ_LARGE_BUF, 10385 &next_seid, NULL); 10386 if (ret) { 10387 dev_info(&pf->pdev->dev, 10388 "get switch config failed err %s aq_err %s\n", 10389 i40e_stat_str(&pf->hw, ret), 10390 i40e_aq_str(&pf->hw, 10391 pf->hw.aq.asq_last_status)); 10392 kfree(aq_buf); 10393 return -ENOENT; 10394 } 10395 10396 num_reported = le16_to_cpu(sw_config->header.num_reported); 10397 num_total = le16_to_cpu(sw_config->header.num_total); 10398 10399 if (printconfig) 10400 dev_info(&pf->pdev->dev, 10401 "header: %d reported %d total\n", 10402 num_reported, num_total); 10403 10404 for (i = 0; i < num_reported; i++) { 10405 struct i40e_aqc_switch_config_element_resp *ele = 10406 &sw_config->element[i]; 10407 10408 i40e_setup_pf_switch_element(pf, ele, num_reported, 10409 printconfig); 10410 } 10411 } while (next_seid != 0); 10412 10413 kfree(aq_buf); 10414 return ret; 10415 } 10416 10417 /** 10418 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 10419 * @pf: board private structure 10420 * @reinit: if the Main VSI needs to re-initialized. 10421 * 10422 * Returns 0 on success, negative value on failure 10423 **/ 10424 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 10425 { 10426 u16 flags = 0; 10427 int ret; 10428 10429 /* find out what's out there already */ 10430 ret = i40e_fetch_switch_configuration(pf, false); 10431 if (ret) { 10432 dev_info(&pf->pdev->dev, 10433 "couldn't fetch switch config, err %s aq_err %s\n", 10434 i40e_stat_str(&pf->hw, ret), 10435 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 10436 return ret; 10437 } 10438 i40e_pf_reset_stats(pf); 10439 10440 /* set the switch config bit for the whole device to 10441 * support limited promisc or true promisc 10442 * when user requests promisc. The default is limited 10443 * promisc. 10444 */ 10445 10446 if ((pf->hw.pf_id == 0) && 10447 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 10448 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 10449 10450 if (pf->hw.pf_id == 0) { 10451 u16 valid_flags; 10452 10453 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 10454 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 10455 NULL); 10456 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 10457 dev_info(&pf->pdev->dev, 10458 "couldn't set switch config bits, err %s aq_err %s\n", 10459 i40e_stat_str(&pf->hw, ret), 10460 i40e_aq_str(&pf->hw, 10461 pf->hw.aq.asq_last_status)); 10462 /* not a fatal problem, just keep going */ 10463 } 10464 } 10465 10466 /* first time setup */ 10467 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 10468 struct i40e_vsi *vsi = NULL; 10469 u16 uplink_seid; 10470 10471 /* Set up the PF VSI associated with the PF's main VSI 10472 * that is already in the HW switch 10473 */ 10474 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 10475 uplink_seid = pf->veb[pf->lan_veb]->seid; 10476 else 10477 uplink_seid = pf->mac_seid; 10478 if (pf->lan_vsi == I40E_NO_VSI) 10479 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 10480 else if (reinit) 10481 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 10482 if (!vsi) { 10483 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 10484 i40e_fdir_teardown(pf); 10485 return -EAGAIN; 10486 } 10487 } else { 10488 /* force a reset of TC and queue layout configurations */ 10489 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 10490 10491 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 10492 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 10493 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 10494 } 10495 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 10496 10497 i40e_fdir_sb_setup(pf); 10498 10499 /* Setup static PF queue filter control settings */ 10500 ret = i40e_setup_pf_filter_control(pf); 10501 if (ret) { 10502 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 10503 ret); 10504 /* Failure here should not stop continuing other steps */ 10505 } 10506 10507 /* enable RSS in the HW, even for only one queue, as the stack can use 10508 * the hash 10509 */ 10510 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 10511 i40e_pf_config_rss(pf); 10512 10513 /* fill in link information and enable LSE reporting */ 10514 i40e_update_link_info(&pf->hw); 10515 i40e_link_event(pf); 10516 10517 /* Initialize user-specific link properties */ 10518 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 10519 I40E_AQ_AN_COMPLETED) ? true : false); 10520 10521 i40e_ptp_init(pf); 10522 10523 return ret; 10524 } 10525 10526 /** 10527 * i40e_determine_queue_usage - Work out queue distribution 10528 * @pf: board private structure 10529 **/ 10530 static void i40e_determine_queue_usage(struct i40e_pf *pf) 10531 { 10532 int queues_left; 10533 10534 pf->num_lan_qps = 0; 10535 #ifdef I40E_FCOE 10536 pf->num_fcoe_qps = 0; 10537 #endif 10538 10539 /* Find the max queues to be put into basic use. We'll always be 10540 * using TC0, whether or not DCB is running, and TC0 will get the 10541 * big RSS set. 10542 */ 10543 queues_left = pf->hw.func_caps.num_tx_qp; 10544 10545 if ((queues_left == 1) || 10546 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 10547 /* one qp for PF, no queues for anything else */ 10548 queues_left = 0; 10549 pf->alloc_rss_size = pf->num_lan_qps = 1; 10550 10551 /* make sure all the fancies are disabled */ 10552 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 10553 I40E_FLAG_IWARP_ENABLED | 10554 #ifdef I40E_FCOE 10555 I40E_FLAG_FCOE_ENABLED | 10556 #endif 10557 I40E_FLAG_FD_SB_ENABLED | 10558 I40E_FLAG_FD_ATR_ENABLED | 10559 I40E_FLAG_DCB_CAPABLE | 10560 I40E_FLAG_SRIOV_ENABLED | 10561 I40E_FLAG_VMDQ_ENABLED); 10562 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 10563 I40E_FLAG_FD_SB_ENABLED | 10564 I40E_FLAG_FD_ATR_ENABLED | 10565 I40E_FLAG_DCB_CAPABLE))) { 10566 /* one qp for PF */ 10567 pf->alloc_rss_size = pf->num_lan_qps = 1; 10568 queues_left -= pf->num_lan_qps; 10569 10570 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 10571 I40E_FLAG_IWARP_ENABLED | 10572 #ifdef I40E_FCOE 10573 I40E_FLAG_FCOE_ENABLED | 10574 #endif 10575 I40E_FLAG_FD_SB_ENABLED | 10576 I40E_FLAG_FD_ATR_ENABLED | 10577 I40E_FLAG_DCB_ENABLED | 10578 I40E_FLAG_VMDQ_ENABLED); 10579 } else { 10580 /* Not enough queues for all TCs */ 10581 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 10582 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 10583 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 10584 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 10585 } 10586 pf->num_lan_qps = max_t(int, pf->rss_size_max, 10587 num_online_cpus()); 10588 pf->num_lan_qps = min_t(int, pf->num_lan_qps, 10589 pf->hw.func_caps.num_tx_qp); 10590 10591 queues_left -= pf->num_lan_qps; 10592 } 10593 10594 #ifdef I40E_FCOE 10595 if (pf->flags & I40E_FLAG_FCOE_ENABLED) { 10596 if (I40E_DEFAULT_FCOE <= queues_left) { 10597 pf->num_fcoe_qps = I40E_DEFAULT_FCOE; 10598 } else if (I40E_MINIMUM_FCOE <= queues_left) { 10599 pf->num_fcoe_qps = I40E_MINIMUM_FCOE; 10600 } else { 10601 pf->num_fcoe_qps = 0; 10602 pf->flags &= ~I40E_FLAG_FCOE_ENABLED; 10603 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n"); 10604 } 10605 10606 queues_left -= pf->num_fcoe_qps; 10607 } 10608 10609 #endif 10610 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 10611 if (queues_left > 1) { 10612 queues_left -= 1; /* save 1 queue for FD */ 10613 } else { 10614 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 10615 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 10616 } 10617 } 10618 10619 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 10620 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 10621 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 10622 (queues_left / pf->num_vf_qps)); 10623 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 10624 } 10625 10626 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 10627 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 10628 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 10629 (queues_left / pf->num_vmdq_qps)); 10630 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 10631 } 10632 10633 pf->queues_left = queues_left; 10634 dev_dbg(&pf->pdev->dev, 10635 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n", 10636 pf->hw.func_caps.num_tx_qp, 10637 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED), 10638 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs, 10639 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps, 10640 queues_left); 10641 #ifdef I40E_FCOE 10642 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps); 10643 #endif 10644 } 10645 10646 /** 10647 * i40e_setup_pf_filter_control - Setup PF static filter control 10648 * @pf: PF to be setup 10649 * 10650 * i40e_setup_pf_filter_control sets up a PF's initial filter control 10651 * settings. If PE/FCoE are enabled then it will also set the per PF 10652 * based filter sizes required for them. It also enables Flow director, 10653 * ethertype and macvlan type filter settings for the pf. 10654 * 10655 * Returns 0 on success, negative on failure 10656 **/ 10657 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 10658 { 10659 struct i40e_filter_control_settings *settings = &pf->filter_settings; 10660 10661 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 10662 10663 /* Flow Director is enabled */ 10664 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 10665 settings->enable_fdir = true; 10666 10667 /* Ethtype and MACVLAN filters enabled for PF */ 10668 settings->enable_ethtype = true; 10669 settings->enable_macvlan = true; 10670 10671 if (i40e_set_filter_control(&pf->hw, settings)) 10672 return -ENOENT; 10673 10674 return 0; 10675 } 10676 10677 #define INFO_STRING_LEN 255 10678 #define REMAIN(__x) (INFO_STRING_LEN - (__x)) 10679 static void i40e_print_features(struct i40e_pf *pf) 10680 { 10681 struct i40e_hw *hw = &pf->hw; 10682 char *buf; 10683 int i; 10684 10685 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL); 10686 if (!buf) 10687 return; 10688 10689 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id); 10690 #ifdef CONFIG_PCI_IOV 10691 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs); 10692 #endif 10693 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d", 10694 pf->hw.func_caps.num_vsis, 10695 pf->vsi[pf->lan_vsi]->num_queue_pairs); 10696 if (pf->flags & I40E_FLAG_RSS_ENABLED) 10697 i += snprintf(&buf[i], REMAIN(i), " RSS"); 10698 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 10699 i += snprintf(&buf[i], REMAIN(i), " FD_ATR"); 10700 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 10701 i += snprintf(&buf[i], REMAIN(i), " FD_SB"); 10702 i += snprintf(&buf[i], REMAIN(i), " NTUPLE"); 10703 } 10704 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 10705 i += snprintf(&buf[i], REMAIN(i), " DCB"); 10706 #if IS_ENABLED(CONFIG_VXLAN) 10707 i += snprintf(&buf[i], REMAIN(i), " VxLAN"); 10708 #endif 10709 #if IS_ENABLED(CONFIG_GENEVE) 10710 i += snprintf(&buf[i], REMAIN(i), " Geneve"); 10711 #endif 10712 if (pf->flags & I40E_FLAG_PTP) 10713 i += snprintf(&buf[i], REMAIN(i), " PTP"); 10714 #ifdef I40E_FCOE 10715 if (pf->flags & I40E_FLAG_FCOE_ENABLED) 10716 i += snprintf(&buf[i], REMAIN(i), " FCOE"); 10717 #endif 10718 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 10719 i += snprintf(&buf[i], REMAIN(i), " VEB"); 10720 else 10721 i += snprintf(&buf[i], REMAIN(i), " VEPA"); 10722 10723 dev_info(&pf->pdev->dev, "%s\n", buf); 10724 kfree(buf); 10725 WARN_ON(i > INFO_STRING_LEN); 10726 } 10727 10728 /** 10729 * i40e_get_platform_mac_addr - get platform-specific MAC address 10730 * 10731 * @pdev: PCI device information struct 10732 * @pf: board private structure 10733 * 10734 * Look up the MAC address in Open Firmware on systems that support it, 10735 * and use IDPROM on SPARC if no OF address is found. On return, the 10736 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value 10737 * has been selected. 10738 **/ 10739 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf) 10740 { 10741 pf->flags &= ~I40E_FLAG_PF_MAC; 10742 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr)) 10743 pf->flags |= I40E_FLAG_PF_MAC; 10744 } 10745 10746 /** 10747 * i40e_probe - Device initialization routine 10748 * @pdev: PCI device information struct 10749 * @ent: entry in i40e_pci_tbl 10750 * 10751 * i40e_probe initializes a PF identified by a pci_dev structure. 10752 * The OS initialization, configuring of the PF private structure, 10753 * and a hardware reset occur. 10754 * 10755 * Returns 0 on success, negative on failure 10756 **/ 10757 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 10758 { 10759 struct i40e_aq_get_phy_abilities_resp abilities; 10760 struct i40e_pf *pf; 10761 struct i40e_hw *hw; 10762 static u16 pfs_found; 10763 u16 wol_nvm_bits; 10764 u16 link_status; 10765 int err; 10766 u32 val; 10767 u32 i; 10768 u8 set_fc_aq_fail; 10769 10770 err = pci_enable_device_mem(pdev); 10771 if (err) 10772 return err; 10773 10774 /* set up for high or low dma */ 10775 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 10776 if (err) { 10777 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 10778 if (err) { 10779 dev_err(&pdev->dev, 10780 "DMA configuration failed: 0x%x\n", err); 10781 goto err_dma; 10782 } 10783 } 10784 10785 /* set up pci connections */ 10786 err = pci_request_selected_regions(pdev, pci_select_bars(pdev, 10787 IORESOURCE_MEM), i40e_driver_name); 10788 if (err) { 10789 dev_info(&pdev->dev, 10790 "pci_request_selected_regions failed %d\n", err); 10791 goto err_pci_reg; 10792 } 10793 10794 pci_enable_pcie_error_reporting(pdev); 10795 pci_set_master(pdev); 10796 10797 /* Now that we have a PCI connection, we need to do the 10798 * low level device setup. This is primarily setting up 10799 * the Admin Queue structures and then querying for the 10800 * device's current profile information. 10801 */ 10802 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 10803 if (!pf) { 10804 err = -ENOMEM; 10805 goto err_pf_alloc; 10806 } 10807 pf->next_vsi = 0; 10808 pf->pdev = pdev; 10809 set_bit(__I40E_DOWN, &pf->state); 10810 10811 hw = &pf->hw; 10812 hw->back = pf; 10813 10814 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), 10815 I40E_MAX_CSR_SPACE); 10816 10817 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len); 10818 if (!hw->hw_addr) { 10819 err = -EIO; 10820 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 10821 (unsigned int)pci_resource_start(pdev, 0), 10822 pf->ioremap_len, err); 10823 goto err_ioremap; 10824 } 10825 hw->vendor_id = pdev->vendor; 10826 hw->device_id = pdev->device; 10827 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 10828 hw->subsystem_vendor_id = pdev->subsystem_vendor; 10829 hw->subsystem_device_id = pdev->subsystem_device; 10830 hw->bus.device = PCI_SLOT(pdev->devfn); 10831 hw->bus.func = PCI_FUNC(pdev->devfn); 10832 pf->instance = pfs_found; 10833 10834 /* set up the locks for the AQ, do this only once in probe 10835 * and destroy them only once in remove 10836 */ 10837 mutex_init(&hw->aq.asq_mutex); 10838 mutex_init(&hw->aq.arq_mutex); 10839 10840 if (debug != -1) { 10841 pf->msg_enable = pf->hw.debug_mask; 10842 pf->msg_enable = debug; 10843 } 10844 10845 /* do a special CORER for clearing PXE mode once at init */ 10846 if (hw->revision_id == 0 && 10847 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 10848 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 10849 i40e_flush(hw); 10850 msleep(200); 10851 pf->corer_count++; 10852 10853 i40e_clear_pxe_mode(hw); 10854 } 10855 10856 /* Reset here to make sure all is clean and to define PF 'n' */ 10857 i40e_clear_hw(hw); 10858 err = i40e_pf_reset(hw); 10859 if (err) { 10860 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 10861 goto err_pf_reset; 10862 } 10863 pf->pfr_count++; 10864 10865 hw->aq.num_arq_entries = I40E_AQ_LEN; 10866 hw->aq.num_asq_entries = I40E_AQ_LEN; 10867 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 10868 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 10869 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 10870 10871 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 10872 "%s-%s:misc", 10873 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 10874 10875 err = i40e_init_shared_code(hw); 10876 if (err) { 10877 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 10878 err); 10879 goto err_pf_reset; 10880 } 10881 10882 /* set up a default setting for link flow control */ 10883 pf->hw.fc.requested_mode = I40E_FC_NONE; 10884 10885 err = i40e_init_adminq(hw); 10886 if (err) { 10887 if (err == I40E_ERR_FIRMWARE_API_VERSION) 10888 dev_info(&pdev->dev, 10889 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 10890 else 10891 dev_info(&pdev->dev, 10892 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n"); 10893 10894 goto err_pf_reset; 10895 } 10896 10897 /* provide nvm, fw, api versions */ 10898 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n", 10899 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, 10900 hw->aq.api_maj_ver, hw->aq.api_min_ver, 10901 i40e_nvm_version_str(hw)); 10902 10903 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 10904 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) 10905 dev_info(&pdev->dev, 10906 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 10907 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 10908 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) 10909 dev_info(&pdev->dev, 10910 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 10911 10912 i40e_verify_eeprom(pf); 10913 10914 /* Rev 0 hardware was never productized */ 10915 if (hw->revision_id < 1) 10916 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 10917 10918 i40e_clear_pxe_mode(hw); 10919 err = i40e_get_capabilities(pf); 10920 if (err) 10921 goto err_adminq_setup; 10922 10923 err = i40e_sw_init(pf); 10924 if (err) { 10925 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 10926 goto err_sw_init; 10927 } 10928 10929 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 10930 hw->func_caps.num_rx_qp, 10931 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); 10932 if (err) { 10933 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 10934 goto err_init_lan_hmc; 10935 } 10936 10937 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 10938 if (err) { 10939 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 10940 err = -ENOENT; 10941 goto err_configure_lan_hmc; 10942 } 10943 10944 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 10945 * Ignore error return codes because if it was already disabled via 10946 * hardware settings this will fail 10947 */ 10948 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) { 10949 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 10950 i40e_aq_stop_lldp(hw, true, NULL); 10951 } 10952 10953 i40e_get_mac_addr(hw, hw->mac.addr); 10954 /* allow a platform config to override the HW addr */ 10955 i40e_get_platform_mac_addr(pdev, pf); 10956 if (!is_valid_ether_addr(hw->mac.addr)) { 10957 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 10958 err = -EIO; 10959 goto err_mac_addr; 10960 } 10961 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 10962 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 10963 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 10964 if (is_valid_ether_addr(hw->mac.port_addr)) 10965 pf->flags |= I40E_FLAG_PORT_ID_VALID; 10966 #ifdef I40E_FCOE 10967 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr); 10968 if (err) 10969 dev_info(&pdev->dev, 10970 "(non-fatal) SAN MAC retrieval failed: %d\n", err); 10971 if (!is_valid_ether_addr(hw->mac.san_addr)) { 10972 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n", 10973 hw->mac.san_addr); 10974 ether_addr_copy(hw->mac.san_addr, hw->mac.addr); 10975 } 10976 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr); 10977 #endif /* I40E_FCOE */ 10978 10979 pci_set_drvdata(pdev, pf); 10980 pci_save_state(pdev); 10981 #ifdef CONFIG_I40E_DCB 10982 err = i40e_init_pf_dcb(pf); 10983 if (err) { 10984 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 10985 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 10986 /* Continue without DCB enabled */ 10987 } 10988 #endif /* CONFIG_I40E_DCB */ 10989 10990 /* set up periodic task facility */ 10991 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); 10992 pf->service_timer_period = HZ; 10993 10994 INIT_WORK(&pf->service_task, i40e_service_task); 10995 clear_bit(__I40E_SERVICE_SCHED, &pf->state); 10996 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; 10997 10998 /* NVM bit on means WoL disabled for the port */ 10999 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 11000 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1) 11001 pf->wol_en = false; 11002 else 11003 pf->wol_en = true; 11004 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 11005 11006 /* set up the main switch operations */ 11007 i40e_determine_queue_usage(pf); 11008 err = i40e_init_interrupt_scheme(pf); 11009 if (err) 11010 goto err_switch_setup; 11011 11012 /* The number of VSIs reported by the FW is the minimum guaranteed 11013 * to us; HW supports far more and we share the remaining pool with 11014 * the other PFs. We allocate space for more than the guarantee with 11015 * the understanding that we might not get them all later. 11016 */ 11017 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 11018 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 11019 else 11020 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 11021 11022 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 11023 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), 11024 GFP_KERNEL); 11025 if (!pf->vsi) { 11026 err = -ENOMEM; 11027 goto err_switch_setup; 11028 } 11029 11030 #ifdef CONFIG_PCI_IOV 11031 /* prep for VF support */ 11032 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 11033 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 11034 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 11035 if (pci_num_vf(pdev)) 11036 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 11037 } 11038 #endif 11039 err = i40e_setup_pf_switch(pf, false); 11040 if (err) { 11041 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 11042 goto err_vsis; 11043 } 11044 11045 /* Make sure flow control is set according to current settings */ 11046 err = i40e_set_fc(hw, &set_fc_aq_fail, true); 11047 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET) 11048 dev_dbg(&pf->pdev->dev, 11049 "Set fc with err %s aq_err %s on get_phy_cap\n", 11050 i40e_stat_str(hw, err), 11051 i40e_aq_str(hw, hw->aq.asq_last_status)); 11052 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET) 11053 dev_dbg(&pf->pdev->dev, 11054 "Set fc with err %s aq_err %s on set_phy_config\n", 11055 i40e_stat_str(hw, err), 11056 i40e_aq_str(hw, hw->aq.asq_last_status)); 11057 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE) 11058 dev_dbg(&pf->pdev->dev, 11059 "Set fc with err %s aq_err %s on get_link_info\n", 11060 i40e_stat_str(hw, err), 11061 i40e_aq_str(hw, hw->aq.asq_last_status)); 11062 11063 /* if FDIR VSI was set up, start it now */ 11064 for (i = 0; i < pf->num_alloc_vsi; i++) { 11065 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 11066 i40e_vsi_open(pf->vsi[i]); 11067 break; 11068 } 11069 } 11070 11071 /* The driver only wants link up/down and module qualification 11072 * reports from firmware. Note the negative logic. 11073 */ 11074 err = i40e_aq_set_phy_int_mask(&pf->hw, 11075 ~(I40E_AQ_EVENT_LINK_UPDOWN | 11076 I40E_AQ_EVENT_MEDIA_NA | 11077 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 11078 if (err) 11079 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 11080 i40e_stat_str(&pf->hw, err), 11081 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11082 11083 /* Reconfigure hardware for allowing smaller MSS in the case 11084 * of TSO, so that we avoid the MDD being fired and causing 11085 * a reset in the case of small MSS+TSO. 11086 */ 11087 val = rd32(hw, I40E_REG_MSS); 11088 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 11089 val &= ~I40E_REG_MSS_MIN_MASK; 11090 val |= I40E_64BYTE_MSS; 11091 wr32(hw, I40E_REG_MSS, val); 11092 } 11093 11094 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) { 11095 msleep(75); 11096 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 11097 if (err) 11098 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 11099 i40e_stat_str(&pf->hw, err), 11100 i40e_aq_str(&pf->hw, 11101 pf->hw.aq.asq_last_status)); 11102 } 11103 /* The main driver is (mostly) up and happy. We need to set this state 11104 * before setting up the misc vector or we get a race and the vector 11105 * ends up disabled forever. 11106 */ 11107 clear_bit(__I40E_DOWN, &pf->state); 11108 11109 /* In case of MSIX we are going to setup the misc vector right here 11110 * to handle admin queue events etc. In case of legacy and MSI 11111 * the misc functionality and queue processing is combined in 11112 * the same vector and that gets setup at open. 11113 */ 11114 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 11115 err = i40e_setup_misc_vector(pf); 11116 if (err) { 11117 dev_info(&pdev->dev, 11118 "setup of misc vector failed: %d\n", err); 11119 goto err_vsis; 11120 } 11121 } 11122 11123 #ifdef CONFIG_PCI_IOV 11124 /* prep for VF support */ 11125 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 11126 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 11127 !test_bit(__I40E_BAD_EEPROM, &pf->state)) { 11128 /* disable link interrupts for VFs */ 11129 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 11130 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 11131 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 11132 i40e_flush(hw); 11133 11134 if (pci_num_vf(pdev)) { 11135 dev_info(&pdev->dev, 11136 "Active VFs found, allocating resources.\n"); 11137 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 11138 if (err) 11139 dev_info(&pdev->dev, 11140 "Error %d allocating resources for existing VFs\n", 11141 err); 11142 } 11143 } 11144 #endif /* CONFIG_PCI_IOV */ 11145 11146 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 11147 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile, 11148 pf->num_iwarp_msix, 11149 I40E_IWARP_IRQ_PILE_ID); 11150 if (pf->iwarp_base_vector < 0) { 11151 dev_info(&pdev->dev, 11152 "failed to get tracking for %d vectors for IWARP err=%d\n", 11153 pf->num_iwarp_msix, pf->iwarp_base_vector); 11154 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 11155 } 11156 } 11157 11158 i40e_dbg_pf_init(pf); 11159 11160 /* tell the firmware that we're starting */ 11161 i40e_send_version(pf); 11162 11163 /* since everything's happy, start the service_task timer */ 11164 mod_timer(&pf->service_timer, 11165 round_jiffies(jiffies + pf->service_timer_period)); 11166 11167 /* add this PF to client device list and launch a client service task */ 11168 err = i40e_lan_add_device(pf); 11169 if (err) 11170 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n", 11171 err); 11172 11173 #ifdef I40E_FCOE 11174 /* create FCoE interface */ 11175 i40e_fcoe_vsi_setup(pf); 11176 11177 #endif 11178 #define PCI_SPEED_SIZE 8 11179 #define PCI_WIDTH_SIZE 8 11180 /* Devices on the IOSF bus do not have this information 11181 * and will report PCI Gen 1 x 1 by default so don't bother 11182 * checking them. 11183 */ 11184 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) { 11185 char speed[PCI_SPEED_SIZE] = "Unknown"; 11186 char width[PCI_WIDTH_SIZE] = "Unknown"; 11187 11188 /* Get the negotiated link width and speed from PCI config 11189 * space 11190 */ 11191 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, 11192 &link_status); 11193 11194 i40e_set_pci_config_data(hw, link_status); 11195 11196 switch (hw->bus.speed) { 11197 case i40e_bus_speed_8000: 11198 strncpy(speed, "8.0", PCI_SPEED_SIZE); break; 11199 case i40e_bus_speed_5000: 11200 strncpy(speed, "5.0", PCI_SPEED_SIZE); break; 11201 case i40e_bus_speed_2500: 11202 strncpy(speed, "2.5", PCI_SPEED_SIZE); break; 11203 default: 11204 break; 11205 } 11206 switch (hw->bus.width) { 11207 case i40e_bus_width_pcie_x8: 11208 strncpy(width, "8", PCI_WIDTH_SIZE); break; 11209 case i40e_bus_width_pcie_x4: 11210 strncpy(width, "4", PCI_WIDTH_SIZE); break; 11211 case i40e_bus_width_pcie_x2: 11212 strncpy(width, "2", PCI_WIDTH_SIZE); break; 11213 case i40e_bus_width_pcie_x1: 11214 strncpy(width, "1", PCI_WIDTH_SIZE); break; 11215 default: 11216 break; 11217 } 11218 11219 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n", 11220 speed, width); 11221 11222 if (hw->bus.width < i40e_bus_width_pcie_x8 || 11223 hw->bus.speed < i40e_bus_speed_8000) { 11224 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 11225 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 11226 } 11227 } 11228 11229 /* get the requested speeds from the fw */ 11230 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 11231 if (err) 11232 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n", 11233 i40e_stat_str(&pf->hw, err), 11234 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11235 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 11236 11237 /* get the supported phy types from the fw */ 11238 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL); 11239 if (err) 11240 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n", 11241 i40e_stat_str(&pf->hw, err), 11242 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11243 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type); 11244 11245 /* Add a filter to drop all Flow control frames from any VSI from being 11246 * transmitted. By doing so we stop a malicious VF from sending out 11247 * PAUSE or PFC frames and potentially controlling traffic for other 11248 * PF/VF VSIs. 11249 * The FW can still send Flow control frames if enabled. 11250 */ 11251 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 11252 pf->main_vsi_seid); 11253 11254 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) || 11255 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4)) 11256 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY; 11257 11258 /* print a string summarizing features */ 11259 i40e_print_features(pf); 11260 11261 return 0; 11262 11263 /* Unwind what we've done if something failed in the setup */ 11264 err_vsis: 11265 set_bit(__I40E_DOWN, &pf->state); 11266 i40e_clear_interrupt_scheme(pf); 11267 kfree(pf->vsi); 11268 err_switch_setup: 11269 i40e_reset_interrupt_capability(pf); 11270 del_timer_sync(&pf->service_timer); 11271 err_mac_addr: 11272 err_configure_lan_hmc: 11273 (void)i40e_shutdown_lan_hmc(hw); 11274 err_init_lan_hmc: 11275 kfree(pf->qp_pile); 11276 err_sw_init: 11277 err_adminq_setup: 11278 err_pf_reset: 11279 iounmap(hw->hw_addr); 11280 err_ioremap: 11281 kfree(pf); 11282 err_pf_alloc: 11283 pci_disable_pcie_error_reporting(pdev); 11284 pci_release_selected_regions(pdev, 11285 pci_select_bars(pdev, IORESOURCE_MEM)); 11286 err_pci_reg: 11287 err_dma: 11288 pci_disable_device(pdev); 11289 return err; 11290 } 11291 11292 /** 11293 * i40e_remove - Device removal routine 11294 * @pdev: PCI device information struct 11295 * 11296 * i40e_remove is called by the PCI subsystem to alert the driver 11297 * that is should release a PCI device. This could be caused by a 11298 * Hot-Plug event, or because the driver is going to be removed from 11299 * memory. 11300 **/ 11301 static void i40e_remove(struct pci_dev *pdev) 11302 { 11303 struct i40e_pf *pf = pci_get_drvdata(pdev); 11304 struct i40e_hw *hw = &pf->hw; 11305 i40e_status ret_code; 11306 int i; 11307 11308 i40e_dbg_pf_exit(pf); 11309 11310 i40e_ptp_stop(pf); 11311 11312 /* Disable RSS in hw */ 11313 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); 11314 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); 11315 11316 /* no more scheduling of any task */ 11317 set_bit(__I40E_SUSPENDED, &pf->state); 11318 set_bit(__I40E_DOWN, &pf->state); 11319 if (pf->service_timer.data) 11320 del_timer_sync(&pf->service_timer); 11321 if (pf->service_task.func) 11322 cancel_work_sync(&pf->service_task); 11323 11324 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 11325 i40e_free_vfs(pf); 11326 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 11327 } 11328 11329 i40e_fdir_teardown(pf); 11330 11331 /* If there is a switch structure or any orphans, remove them. 11332 * This will leave only the PF's VSI remaining. 11333 */ 11334 for (i = 0; i < I40E_MAX_VEB; i++) { 11335 if (!pf->veb[i]) 11336 continue; 11337 11338 if (pf->veb[i]->uplink_seid == pf->mac_seid || 11339 pf->veb[i]->uplink_seid == 0) 11340 i40e_switch_branch_release(pf->veb[i]); 11341 } 11342 11343 /* Now we can shutdown the PF's VSI, just before we kill 11344 * adminq and hmc. 11345 */ 11346 if (pf->vsi[pf->lan_vsi]) 11347 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 11348 11349 /* remove attached clients */ 11350 ret_code = i40e_lan_del_device(pf); 11351 if (ret_code) { 11352 dev_warn(&pdev->dev, "Failed to delete client device: %d\n", 11353 ret_code); 11354 } 11355 11356 /* shutdown and destroy the HMC */ 11357 if (hw->hmc.hmc_obj) { 11358 ret_code = i40e_shutdown_lan_hmc(hw); 11359 if (ret_code) 11360 dev_warn(&pdev->dev, 11361 "Failed to destroy the HMC resources: %d\n", 11362 ret_code); 11363 } 11364 11365 /* shutdown the adminq */ 11366 ret_code = i40e_shutdown_adminq(hw); 11367 if (ret_code) 11368 dev_warn(&pdev->dev, 11369 "Failed to destroy the Admin Queue resources: %d\n", 11370 ret_code); 11371 11372 /* destroy the locks only once, here */ 11373 mutex_destroy(&hw->aq.arq_mutex); 11374 mutex_destroy(&hw->aq.asq_mutex); 11375 11376 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 11377 i40e_clear_interrupt_scheme(pf); 11378 for (i = 0; i < pf->num_alloc_vsi; i++) { 11379 if (pf->vsi[i]) { 11380 i40e_vsi_clear_rings(pf->vsi[i]); 11381 i40e_vsi_clear(pf->vsi[i]); 11382 pf->vsi[i] = NULL; 11383 } 11384 } 11385 11386 for (i = 0; i < I40E_MAX_VEB; i++) { 11387 kfree(pf->veb[i]); 11388 pf->veb[i] = NULL; 11389 } 11390 11391 kfree(pf->qp_pile); 11392 kfree(pf->vsi); 11393 11394 iounmap(hw->hw_addr); 11395 kfree(pf); 11396 pci_release_selected_regions(pdev, 11397 pci_select_bars(pdev, IORESOURCE_MEM)); 11398 11399 pci_disable_pcie_error_reporting(pdev); 11400 pci_disable_device(pdev); 11401 } 11402 11403 /** 11404 * i40e_pci_error_detected - warning that something funky happened in PCI land 11405 * @pdev: PCI device information struct 11406 * 11407 * Called to warn that something happened and the error handling steps 11408 * are in progress. Allows the driver to quiesce things, be ready for 11409 * remediation. 11410 **/ 11411 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 11412 enum pci_channel_state error) 11413 { 11414 struct i40e_pf *pf = pci_get_drvdata(pdev); 11415 11416 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 11417 11418 /* shutdown all operations */ 11419 if (!test_bit(__I40E_SUSPENDED, &pf->state)) { 11420 rtnl_lock(); 11421 i40e_prep_for_reset(pf); 11422 rtnl_unlock(); 11423 } 11424 11425 /* Request a slot reset */ 11426 return PCI_ERS_RESULT_NEED_RESET; 11427 } 11428 11429 /** 11430 * i40e_pci_error_slot_reset - a PCI slot reset just happened 11431 * @pdev: PCI device information struct 11432 * 11433 * Called to find if the driver can work with the device now that 11434 * the pci slot has been reset. If a basic connection seems good 11435 * (registers are readable and have sane content) then return a 11436 * happy little PCI_ERS_RESULT_xxx. 11437 **/ 11438 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 11439 { 11440 struct i40e_pf *pf = pci_get_drvdata(pdev); 11441 pci_ers_result_t result; 11442 int err; 11443 u32 reg; 11444 11445 dev_dbg(&pdev->dev, "%s\n", __func__); 11446 if (pci_enable_device_mem(pdev)) { 11447 dev_info(&pdev->dev, 11448 "Cannot re-enable PCI device after reset.\n"); 11449 result = PCI_ERS_RESULT_DISCONNECT; 11450 } else { 11451 pci_set_master(pdev); 11452 pci_restore_state(pdev); 11453 pci_save_state(pdev); 11454 pci_wake_from_d3(pdev, false); 11455 11456 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 11457 if (reg == 0) 11458 result = PCI_ERS_RESULT_RECOVERED; 11459 else 11460 result = PCI_ERS_RESULT_DISCONNECT; 11461 } 11462 11463 err = pci_cleanup_aer_uncorrect_error_status(pdev); 11464 if (err) { 11465 dev_info(&pdev->dev, 11466 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 11467 err); 11468 /* non-fatal, continue */ 11469 } 11470 11471 return result; 11472 } 11473 11474 /** 11475 * i40e_pci_error_resume - restart operations after PCI error recovery 11476 * @pdev: PCI device information struct 11477 * 11478 * Called to allow the driver to bring things back up after PCI error 11479 * and/or reset recovery has finished. 11480 **/ 11481 static void i40e_pci_error_resume(struct pci_dev *pdev) 11482 { 11483 struct i40e_pf *pf = pci_get_drvdata(pdev); 11484 11485 dev_dbg(&pdev->dev, "%s\n", __func__); 11486 if (test_bit(__I40E_SUSPENDED, &pf->state)) 11487 return; 11488 11489 rtnl_lock(); 11490 i40e_handle_reset_warning(pf); 11491 rtnl_unlock(); 11492 } 11493 11494 /** 11495 * i40e_shutdown - PCI callback for shutting down 11496 * @pdev: PCI device information struct 11497 **/ 11498 static void i40e_shutdown(struct pci_dev *pdev) 11499 { 11500 struct i40e_pf *pf = pci_get_drvdata(pdev); 11501 struct i40e_hw *hw = &pf->hw; 11502 11503 set_bit(__I40E_SUSPENDED, &pf->state); 11504 set_bit(__I40E_DOWN, &pf->state); 11505 rtnl_lock(); 11506 i40e_prep_for_reset(pf); 11507 rtnl_unlock(); 11508 11509 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11510 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11511 11512 del_timer_sync(&pf->service_timer); 11513 cancel_work_sync(&pf->service_task); 11514 i40e_fdir_teardown(pf); 11515 11516 rtnl_lock(); 11517 i40e_prep_for_reset(pf); 11518 rtnl_unlock(); 11519 11520 wr32(hw, I40E_PFPM_APM, 11521 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11522 wr32(hw, I40E_PFPM_WUFC, 11523 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11524 11525 i40e_clear_interrupt_scheme(pf); 11526 11527 if (system_state == SYSTEM_POWER_OFF) { 11528 pci_wake_from_d3(pdev, pf->wol_en); 11529 pci_set_power_state(pdev, PCI_D3hot); 11530 } 11531 } 11532 11533 #ifdef CONFIG_PM 11534 /** 11535 * i40e_suspend - PCI callback for moving to D3 11536 * @pdev: PCI device information struct 11537 **/ 11538 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) 11539 { 11540 struct i40e_pf *pf = pci_get_drvdata(pdev); 11541 struct i40e_hw *hw = &pf->hw; 11542 11543 set_bit(__I40E_SUSPENDED, &pf->state); 11544 set_bit(__I40E_DOWN, &pf->state); 11545 11546 rtnl_lock(); 11547 i40e_prep_for_reset(pf); 11548 rtnl_unlock(); 11549 11550 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 11551 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 11552 11553 pci_wake_from_d3(pdev, pf->wol_en); 11554 pci_set_power_state(pdev, PCI_D3hot); 11555 11556 return 0; 11557 } 11558 11559 /** 11560 * i40e_resume - PCI callback for waking up from D3 11561 * @pdev: PCI device information struct 11562 **/ 11563 static int i40e_resume(struct pci_dev *pdev) 11564 { 11565 struct i40e_pf *pf = pci_get_drvdata(pdev); 11566 u32 err; 11567 11568 pci_set_power_state(pdev, PCI_D0); 11569 pci_restore_state(pdev); 11570 /* pci_restore_state() clears dev->state_saves, so 11571 * call pci_save_state() again to restore it. 11572 */ 11573 pci_save_state(pdev); 11574 11575 err = pci_enable_device_mem(pdev); 11576 if (err) { 11577 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); 11578 return err; 11579 } 11580 pci_set_master(pdev); 11581 11582 /* no wakeup events while running */ 11583 pci_wake_from_d3(pdev, false); 11584 11585 /* handling the reset will rebuild the device state */ 11586 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { 11587 clear_bit(__I40E_DOWN, &pf->state); 11588 rtnl_lock(); 11589 i40e_reset_and_rebuild(pf, false); 11590 rtnl_unlock(); 11591 } 11592 11593 return 0; 11594 } 11595 11596 #endif 11597 static const struct pci_error_handlers i40e_err_handler = { 11598 .error_detected = i40e_pci_error_detected, 11599 .slot_reset = i40e_pci_error_slot_reset, 11600 .resume = i40e_pci_error_resume, 11601 }; 11602 11603 static struct pci_driver i40e_driver = { 11604 .name = i40e_driver_name, 11605 .id_table = i40e_pci_tbl, 11606 .probe = i40e_probe, 11607 .remove = i40e_remove, 11608 #ifdef CONFIG_PM 11609 .suspend = i40e_suspend, 11610 .resume = i40e_resume, 11611 #endif 11612 .shutdown = i40e_shutdown, 11613 .err_handler = &i40e_err_handler, 11614 .sriov_configure = i40e_pci_sriov_configure, 11615 }; 11616 11617 /** 11618 * i40e_init_module - Driver registration routine 11619 * 11620 * i40e_init_module is the first routine called when the driver is 11621 * loaded. All it does is register with the PCI subsystem. 11622 **/ 11623 static int __init i40e_init_module(void) 11624 { 11625 pr_info("%s: %s - version %s\n", i40e_driver_name, 11626 i40e_driver_string, i40e_driver_version_str); 11627 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 11628 11629 /* we will see if single thread per module is enough for now, 11630 * it can't be any worse than using the system workqueue which 11631 * was already single threaded 11632 */ 11633 i40e_wq = create_singlethread_workqueue(i40e_driver_name); 11634 if (!i40e_wq) { 11635 pr_err("%s: Failed to create workqueue\n", i40e_driver_name); 11636 return -ENOMEM; 11637 } 11638 11639 i40e_dbg_init(); 11640 return pci_register_driver(&i40e_driver); 11641 } 11642 module_init(i40e_init_module); 11643 11644 /** 11645 * i40e_exit_module - Driver exit cleanup routine 11646 * 11647 * i40e_exit_module is called just before the driver is removed 11648 * from memory. 11649 **/ 11650 static void __exit i40e_exit_module(void) 11651 { 11652 pci_unregister_driver(&i40e_driver); 11653 destroy_workqueue(i40e_wq); 11654 i40e_dbg_exit(); 11655 } 11656 module_exit(i40e_exit_module); 11657