1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2014 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #include "i40e_osdep.h" 28 #include "i40e_register.h" 29 #include "i40e_type.h" 30 #include "i40e_hmc.h" 31 #include "i40e_lan_hmc.h" 32 #include "i40e_prototype.h" 33 34 /* lan specific interface functions */ 35 36 /** 37 * i40e_align_l2obj_base - aligns base object pointer to 512 bytes 38 * @offset: base address offset needing alignment 39 * 40 * Aligns the layer 2 function private memory so it's 512-byte aligned. 41 **/ 42 static u64 i40e_align_l2obj_base(u64 offset) 43 { 44 u64 aligned_offset = offset; 45 46 if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0) 47 aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT - 48 (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT)); 49 50 return aligned_offset; 51 } 52 53 /** 54 * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size 55 * @txq_num: number of Tx queues needing backing context 56 * @rxq_num: number of Rx queues needing backing context 57 * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context 58 * @fcoe_filt_num: number of FCoE filters needing backing context 59 * 60 * Calculates the maximum amount of memory for the function required, based 61 * on the number of resources it must provide context for. 62 **/ 63 static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 64 u32 fcoe_cntx_num, u32 fcoe_filt_num) 65 { 66 u64 fpm_size = 0; 67 68 fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ; 69 fpm_size = i40e_align_l2obj_base(fpm_size); 70 71 fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ); 72 fpm_size = i40e_align_l2obj_base(fpm_size); 73 74 fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX); 75 fpm_size = i40e_align_l2obj_base(fpm_size); 76 77 fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT); 78 fpm_size = i40e_align_l2obj_base(fpm_size); 79 80 return fpm_size; 81 } 82 83 /** 84 * i40e_init_lan_hmc - initialize i40e_hmc_info struct 85 * @hw: pointer to the HW structure 86 * @txq_num: number of Tx queues needing backing context 87 * @rxq_num: number of Rx queues needing backing context 88 * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context 89 * @fcoe_filt_num: number of FCoE filters needing backing context 90 * 91 * This function will be called once per physical function initialization. 92 * It will fill out the i40e_hmc_obj_info structure for LAN objects based on 93 * the driver's provided input, as well as information from the HMC itself 94 * loaded from NVRAM. 95 * 96 * Assumptions: 97 * - HMC Resource Profile has been selected before calling this function. 98 **/ 99 i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 100 u32 rxq_num, u32 fcoe_cntx_num, 101 u32 fcoe_filt_num) 102 { 103 struct i40e_hmc_obj_info *obj, *full_obj; 104 i40e_status ret_code = 0; 105 u64 l2fpm_size; 106 u32 size_exp; 107 108 hw->hmc.signature = I40E_HMC_INFO_SIGNATURE; 109 hw->hmc.hmc_fn_id = hw->pf_id; 110 111 /* allocate memory for hmc_obj */ 112 ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem, 113 sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX); 114 if (ret_code) 115 goto init_lan_hmc_out; 116 hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *) 117 hw->hmc.hmc_obj_virt_mem.va; 118 119 /* The full object will be used to create the LAN HMC SD */ 120 full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL]; 121 full_obj->max_cnt = 0; 122 full_obj->cnt = 0; 123 full_obj->base = 0; 124 full_obj->size = 0; 125 126 /* Tx queue context information */ 127 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX]; 128 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); 129 obj->cnt = txq_num; 130 obj->base = 0; 131 size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); 132 obj->size = (u64)1 << size_exp; 133 134 /* validate values requested by driver don't exceed HMC capacity */ 135 if (txq_num > obj->max_cnt) { 136 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 137 hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 138 txq_num, obj->max_cnt, ret_code); 139 goto init_lan_hmc_out; 140 } 141 142 /* aggregate values into the full LAN object for later */ 143 full_obj->max_cnt += obj->max_cnt; 144 full_obj->cnt += obj->cnt; 145 146 /* Rx queue context information */ 147 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX]; 148 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); 149 obj->cnt = rxq_num; 150 obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base + 151 (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt * 152 hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size); 153 obj->base = i40e_align_l2obj_base(obj->base); 154 size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); 155 obj->size = (u64)1 << size_exp; 156 157 /* validate values requested by driver don't exceed HMC capacity */ 158 if (rxq_num > obj->max_cnt) { 159 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 160 hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 161 rxq_num, obj->max_cnt, ret_code); 162 goto init_lan_hmc_out; 163 } 164 165 /* aggregate values into the full LAN object for later */ 166 full_obj->max_cnt += obj->max_cnt; 167 full_obj->cnt += obj->cnt; 168 169 /* FCoE context information */ 170 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX]; 171 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX); 172 obj->cnt = fcoe_cntx_num; 173 obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base + 174 (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt * 175 hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size); 176 obj->base = i40e_align_l2obj_base(obj->base); 177 size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); 178 obj->size = (u64)1 << size_exp; 179 180 /* validate values requested by driver don't exceed HMC capacity */ 181 if (fcoe_cntx_num > obj->max_cnt) { 182 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 183 hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 184 fcoe_cntx_num, obj->max_cnt, ret_code); 185 goto init_lan_hmc_out; 186 } 187 188 /* aggregate values into the full LAN object for later */ 189 full_obj->max_cnt += obj->max_cnt; 190 full_obj->cnt += obj->cnt; 191 192 /* FCoE filter information */ 193 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT]; 194 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX); 195 obj->cnt = fcoe_filt_num; 196 obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base + 197 (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt * 198 hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size); 199 obj->base = i40e_align_l2obj_base(obj->base); 200 size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); 201 obj->size = (u64)1 << size_exp; 202 203 /* validate values requested by driver don't exceed HMC capacity */ 204 if (fcoe_filt_num > obj->max_cnt) { 205 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 206 hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 207 fcoe_filt_num, obj->max_cnt, ret_code); 208 goto init_lan_hmc_out; 209 } 210 211 /* aggregate values into the full LAN object for later */ 212 full_obj->max_cnt += obj->max_cnt; 213 full_obj->cnt += obj->cnt; 214 215 hw->hmc.first_sd_index = 0; 216 hw->hmc.sd_table.ref_cnt = 0; 217 l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num, 218 fcoe_filt_num); 219 if (NULL == hw->hmc.sd_table.sd_entry) { 220 hw->hmc.sd_table.sd_cnt = (u32) 221 (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) / 222 I40E_HMC_DIRECT_BP_SIZE; 223 224 /* allocate the sd_entry members in the sd_table */ 225 ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr, 226 (sizeof(struct i40e_hmc_sd_entry) * 227 hw->hmc.sd_table.sd_cnt)); 228 if (ret_code) 229 goto init_lan_hmc_out; 230 hw->hmc.sd_table.sd_entry = 231 (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va; 232 } 233 /* store in the LAN full object for later */ 234 full_obj->size = l2fpm_size; 235 236 init_lan_hmc_out: 237 return ret_code; 238 } 239 240 /** 241 * i40e_remove_pd_page - Remove a page from the page descriptor table 242 * @hw: pointer to the HW structure 243 * @hmc_info: pointer to the HMC configuration information structure 244 * @idx: segment descriptor index to find the relevant page descriptor 245 * 246 * This function: 247 * 1. Marks the entry in pd table (for paged address mode) invalid 248 * 2. write to register PMPDINV to invalidate the backing page in FV cache 249 * 3. Decrement the ref count for pd_entry 250 * assumptions: 251 * 1. caller can deallocate the memory used by pd after this function 252 * returns. 253 **/ 254 static i40e_status i40e_remove_pd_page(struct i40e_hw *hw, 255 struct i40e_hmc_info *hmc_info, 256 u32 idx) 257 { 258 i40e_status ret_code = 0; 259 260 if (!i40e_prep_remove_pd_page(hmc_info, idx)) 261 ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true); 262 263 return ret_code; 264 } 265 266 /** 267 * i40e_remove_sd_bp - remove a backing page from a segment descriptor 268 * @hw: pointer to our HW structure 269 * @hmc_info: pointer to the HMC configuration information structure 270 * @idx: the page index 271 * 272 * This function: 273 * 1. Marks the entry in sd table (for direct address mode) invalid 274 * 2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set 275 * to 0) and PMSDDATAHIGH to invalidate the sd page 276 * 3. Decrement the ref count for the sd_entry 277 * assumptions: 278 * 1. caller can deallocate the memory used by backing storage after this 279 * function returns. 280 **/ 281 static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw, 282 struct i40e_hmc_info *hmc_info, 283 u32 idx) 284 { 285 i40e_status ret_code = 0; 286 287 if (!i40e_prep_remove_sd_bp(hmc_info, idx)) 288 ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true); 289 290 return ret_code; 291 } 292 293 /** 294 * i40e_create_lan_hmc_object - allocate backing store for hmc objects 295 * @hw: pointer to the HW structure 296 * @info: pointer to i40e_hmc_create_obj_info struct 297 * 298 * This will allocate memory for PDs and backing pages and populate 299 * the sd and pd entries. 300 **/ 301 static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw, 302 struct i40e_hmc_lan_create_obj_info *info) 303 { 304 i40e_status ret_code = 0; 305 struct i40e_hmc_sd_entry *sd_entry; 306 u32 pd_idx1 = 0, pd_lmt1 = 0; 307 u32 pd_idx = 0, pd_lmt = 0; 308 bool pd_error = false; 309 u32 sd_idx, sd_lmt; 310 u64 sd_size; 311 u32 i, j; 312 313 if (NULL == info) { 314 ret_code = I40E_ERR_BAD_PTR; 315 hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n"); 316 goto exit; 317 } 318 if (NULL == info->hmc_info) { 319 ret_code = I40E_ERR_BAD_PTR; 320 hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n"); 321 goto exit; 322 } 323 if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) { 324 ret_code = I40E_ERR_BAD_PTR; 325 hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n"); 326 goto exit; 327 } 328 329 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 330 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 331 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", 332 ret_code); 333 goto exit; 334 } 335 if ((info->start_idx + info->count) > 336 info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 337 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 338 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", 339 ret_code); 340 goto exit; 341 } 342 343 /* find sd index and limit */ 344 I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 345 info->start_idx, info->count, 346 &sd_idx, &sd_lmt); 347 if (sd_idx >= info->hmc_info->sd_table.sd_cnt || 348 sd_lmt > info->hmc_info->sd_table.sd_cnt) { 349 ret_code = I40E_ERR_INVALID_SD_INDEX; 350 goto exit; 351 } 352 /* find pd index */ 353 I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 354 info->start_idx, info->count, &pd_idx, 355 &pd_lmt); 356 357 /* This is to cover for cases where you may not want to have an SD with 358 * the full 2M memory but something smaller. By not filling out any 359 * size, the function will default the SD size to be 2M. 360 */ 361 if (info->direct_mode_sz == 0) 362 sd_size = I40E_HMC_DIRECT_BP_SIZE; 363 else 364 sd_size = info->direct_mode_sz; 365 366 /* check if all the sds are valid. If not, allocate a page and 367 * initialize it. 368 */ 369 for (j = sd_idx; j < sd_lmt; j++) { 370 /* update the sd table entry */ 371 ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j, 372 info->entry_type, 373 sd_size); 374 if (ret_code) 375 goto exit_sd_error; 376 sd_entry = &info->hmc_info->sd_table.sd_entry[j]; 377 if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) { 378 /* check if all the pds in this sd are valid. If not, 379 * allocate a page and initialize it. 380 */ 381 382 /* find pd_idx and pd_lmt in this sd */ 383 pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT)); 384 pd_lmt1 = min(pd_lmt, 385 ((j + 1) * I40E_HMC_MAX_BP_COUNT)); 386 for (i = pd_idx1; i < pd_lmt1; i++) { 387 /* update the pd table entry */ 388 ret_code = i40e_add_pd_table_entry(hw, 389 info->hmc_info, 390 i); 391 if (ret_code) { 392 pd_error = true; 393 break; 394 } 395 } 396 if (pd_error) { 397 /* remove the backing pages from pd_idx1 to i */ 398 while (i && (i > pd_idx1)) { 399 i40e_remove_pd_bp(hw, info->hmc_info, 400 (i - 1), true); 401 i--; 402 } 403 } 404 } 405 if (!sd_entry->valid) { 406 sd_entry->valid = true; 407 switch (sd_entry->entry_type) { 408 case I40E_SD_TYPE_PAGED: 409 I40E_SET_PF_SD_ENTRY(hw, 410 sd_entry->u.pd_table.pd_page_addr.pa, 411 j, sd_entry->entry_type); 412 break; 413 case I40E_SD_TYPE_DIRECT: 414 I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa, 415 j, sd_entry->entry_type); 416 break; 417 default: 418 ret_code = I40E_ERR_INVALID_SD_TYPE; 419 goto exit; 420 break; 421 } 422 } 423 } 424 goto exit; 425 426 exit_sd_error: 427 /* cleanup for sd entries from j to sd_idx */ 428 while (j && (j > sd_idx)) { 429 sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1]; 430 switch (sd_entry->entry_type) { 431 case I40E_SD_TYPE_PAGED: 432 pd_idx1 = max(pd_idx, 433 ((j - 1) * I40E_HMC_MAX_BP_COUNT)); 434 pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT)); 435 for (i = pd_idx1; i < pd_lmt1; i++) { 436 i40e_remove_pd_bp( 437 hw, 438 info->hmc_info, 439 i, 440 true); 441 } 442 i40e_remove_pd_page(hw, info->hmc_info, (j - 1)); 443 break; 444 case I40E_SD_TYPE_DIRECT: 445 i40e_remove_sd_bp(hw, info->hmc_info, (j - 1)); 446 break; 447 default: 448 ret_code = I40E_ERR_INVALID_SD_TYPE; 449 break; 450 } 451 j--; 452 } 453 exit: 454 return ret_code; 455 } 456 457 /** 458 * i40e_configure_lan_hmc - prepare the HMC backing store 459 * @hw: pointer to the hw structure 460 * @model: the model for the layout of the SD/PD tables 461 * 462 * - This function will be called once per physical function initialization. 463 * - This function will be called after i40e_init_lan_hmc() and before 464 * any LAN/FCoE HMC objects can be created. 465 **/ 466 i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw, 467 enum i40e_hmc_model model) 468 { 469 struct i40e_hmc_lan_create_obj_info info; 470 i40e_status ret_code = 0; 471 u8 hmc_fn_id = hw->hmc.hmc_fn_id; 472 struct i40e_hmc_obj_info *obj; 473 474 /* Initialize part of the create object info struct */ 475 info.hmc_info = &hw->hmc; 476 info.rsrc_type = I40E_HMC_LAN_FULL; 477 info.start_idx = 0; 478 info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size; 479 480 /* Build the SD entry for the LAN objects */ 481 switch (model) { 482 case I40E_HMC_MODEL_DIRECT_PREFERRED: 483 case I40E_HMC_MODEL_DIRECT_ONLY: 484 info.entry_type = I40E_SD_TYPE_DIRECT; 485 /* Make one big object, a single SD */ 486 info.count = 1; 487 ret_code = i40e_create_lan_hmc_object(hw, &info); 488 if (ret_code && (model == I40E_HMC_MODEL_DIRECT_PREFERRED)) 489 goto try_type_paged; 490 else if (ret_code) 491 goto configure_lan_hmc_out; 492 /* else clause falls through the break */ 493 break; 494 case I40E_HMC_MODEL_PAGED_ONLY: 495 try_type_paged: 496 info.entry_type = I40E_SD_TYPE_PAGED; 497 /* Make one big object in the PD table */ 498 info.count = 1; 499 ret_code = i40e_create_lan_hmc_object(hw, &info); 500 if (ret_code) 501 goto configure_lan_hmc_out; 502 break; 503 default: 504 /* unsupported type */ 505 ret_code = I40E_ERR_INVALID_SD_TYPE; 506 hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n", 507 ret_code); 508 goto configure_lan_hmc_out; 509 break; 510 } 511 512 /* Configure and program the FPM registers so objects can be created */ 513 514 /* Tx contexts */ 515 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX]; 516 wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id), 517 (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512)); 518 wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt); 519 520 /* Rx contexts */ 521 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX]; 522 wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id), 523 (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512)); 524 wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt); 525 526 /* FCoE contexts */ 527 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX]; 528 wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id), 529 (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512)); 530 wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt); 531 532 /* FCoE filters */ 533 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT]; 534 wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id), 535 (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512)); 536 wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt); 537 538 configure_lan_hmc_out: 539 return ret_code; 540 } 541 542 /** 543 * i40e_delete_hmc_object - remove hmc objects 544 * @hw: pointer to the HW structure 545 * @info: pointer to i40e_hmc_delete_obj_info struct 546 * 547 * This will de-populate the SDs and PDs. It frees 548 * the memory for PDS and backing storage. After this function is returned, 549 * caller should deallocate memory allocated previously for 550 * book-keeping information about PDs and backing storage. 551 **/ 552 static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw, 553 struct i40e_hmc_lan_delete_obj_info *info) 554 { 555 i40e_status ret_code = 0; 556 struct i40e_hmc_pd_table *pd_table; 557 u32 pd_idx, pd_lmt, rel_pd_idx; 558 u32 sd_idx, sd_lmt; 559 u32 i, j; 560 561 if (NULL == info) { 562 ret_code = I40E_ERR_BAD_PTR; 563 hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n"); 564 goto exit; 565 } 566 if (NULL == info->hmc_info) { 567 ret_code = I40E_ERR_BAD_PTR; 568 hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n"); 569 goto exit; 570 } 571 if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) { 572 ret_code = I40E_ERR_BAD_PTR; 573 hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n"); 574 goto exit; 575 } 576 577 if (NULL == info->hmc_info->sd_table.sd_entry) { 578 ret_code = I40E_ERR_BAD_PTR; 579 hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n"); 580 goto exit; 581 } 582 583 if (NULL == info->hmc_info->hmc_obj) { 584 ret_code = I40E_ERR_BAD_PTR; 585 hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n"); 586 goto exit; 587 } 588 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 589 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 590 hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n", 591 ret_code); 592 goto exit; 593 } 594 595 if ((info->start_idx + info->count) > 596 info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 597 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 598 hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n", 599 ret_code); 600 goto exit; 601 } 602 603 I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 604 info->start_idx, info->count, &pd_idx, 605 &pd_lmt); 606 607 for (j = pd_idx; j < pd_lmt; j++) { 608 sd_idx = j / I40E_HMC_PD_CNT_IN_SD; 609 610 if (I40E_SD_TYPE_PAGED != 611 info->hmc_info->sd_table.sd_entry[sd_idx].entry_type) 612 continue; 613 614 rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD; 615 616 pd_table = 617 &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; 618 if (pd_table->pd_entry[rel_pd_idx].valid) { 619 ret_code = i40e_remove_pd_bp(hw, info->hmc_info, 620 j, true); 621 if (ret_code) 622 goto exit; 623 } 624 } 625 626 /* find sd index and limit */ 627 I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 628 info->start_idx, info->count, 629 &sd_idx, &sd_lmt); 630 if (sd_idx >= info->hmc_info->sd_table.sd_cnt || 631 sd_lmt > info->hmc_info->sd_table.sd_cnt) { 632 ret_code = I40E_ERR_INVALID_SD_INDEX; 633 goto exit; 634 } 635 636 for (i = sd_idx; i < sd_lmt; i++) { 637 if (!info->hmc_info->sd_table.sd_entry[i].valid) 638 continue; 639 switch (info->hmc_info->sd_table.sd_entry[i].entry_type) { 640 case I40E_SD_TYPE_DIRECT: 641 ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i); 642 if (ret_code) 643 goto exit; 644 break; 645 case I40E_SD_TYPE_PAGED: 646 ret_code = i40e_remove_pd_page(hw, info->hmc_info, i); 647 if (ret_code) 648 goto exit; 649 break; 650 default: 651 break; 652 } 653 } 654 exit: 655 return ret_code; 656 } 657 658 /** 659 * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory 660 * @hw: pointer to the hw structure 661 * 662 * This must be called by drivers as they are shutting down and being 663 * removed from the OS. 664 **/ 665 i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw) 666 { 667 struct i40e_hmc_lan_delete_obj_info info; 668 i40e_status ret_code; 669 670 info.hmc_info = &hw->hmc; 671 info.rsrc_type = I40E_HMC_LAN_FULL; 672 info.start_idx = 0; 673 info.count = 1; 674 675 /* delete the object */ 676 ret_code = i40e_delete_lan_hmc_object(hw, &info); 677 678 /* free the SD table entry for LAN */ 679 i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr); 680 hw->hmc.sd_table.sd_cnt = 0; 681 hw->hmc.sd_table.sd_entry = NULL; 682 683 /* free memory used for hmc_obj */ 684 i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem); 685 hw->hmc.hmc_obj = NULL; 686 687 return ret_code; 688 } 689 690 #define I40E_HMC_STORE(_struct, _ele) \ 691 offsetof(struct _struct, _ele), \ 692 FIELD_SIZEOF(struct _struct, _ele) 693 694 struct i40e_context_ele { 695 u16 offset; 696 u16 size_of; 697 u16 width; 698 u16 lsb; 699 }; 700 701 /* LAN Tx Queue Context */ 702 static struct i40e_context_ele i40e_hmc_txq_ce_info[] = { 703 /* Field Width LSB */ 704 {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 }, 705 {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 }, 706 {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 }, 707 {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 }, 708 {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 }, 709 {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 }, 710 {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 }, 711 {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 }, 712 /* line 1 */ 713 {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 }, 714 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 }, 715 {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 }, 716 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 }, 717 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 }, 718 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 }, 719 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 }, 720 /* line 7 */ 721 {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) }, 722 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) }, 723 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) }, 724 { 0 } 725 }; 726 727 /* LAN Rx Queue Context */ 728 static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = { 729 /* Field Width LSB */ 730 { I40E_HMC_STORE(i40e_hmc_obj_rxq, head), 13, 0 }, 731 { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid), 8, 13 }, 732 { I40E_HMC_STORE(i40e_hmc_obj_rxq, base), 57, 32 }, 733 { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen), 13, 89 }, 734 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff), 7, 102 }, 735 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff), 5, 109 }, 736 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype), 2, 114 }, 737 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize), 1, 116 }, 738 { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip), 1, 117 }, 739 { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena), 1, 118 }, 740 { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel), 1, 119 }, 741 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0), 4, 120 }, 742 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1), 2, 124 }, 743 { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv), 1, 127 }, 744 { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax), 14, 174 }, 745 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1, 193 }, 746 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1, 194 }, 747 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 }, 748 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 }, 749 { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 }, 750 { 0 } 751 }; 752 753 /** 754 * i40e_clear_hmc_context - zero out the HMC context bits 755 * @hw: the hardware struct 756 * @context_bytes: pointer to the context bit array (DMA memory) 757 * @hmc_type: the type of HMC resource 758 **/ 759 static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw, 760 u8 *context_bytes, 761 enum i40e_hmc_lan_rsrc_type hmc_type) 762 { 763 /* clean the bit array */ 764 memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size); 765 766 return 0; 767 } 768 769 /** 770 * i40e_set_hmc_context - replace HMC context bits 771 * @context_bytes: pointer to the context bit array 772 * @ce_info: a description of the struct to be filled 773 * @dest: the struct to be filled 774 **/ 775 static i40e_status i40e_set_hmc_context(u8 *context_bytes, 776 struct i40e_context_ele *ce_info, 777 u8 *dest) 778 { 779 u16 shift_width; 780 u64 bitfield; 781 u8 hi_byte; 782 u8 hi_mask; 783 u64 t_bits; 784 u64 mask; 785 u8 *p; 786 int f; 787 788 for (f = 0; ce_info[f].width != 0; f++) { 789 /* clear out the field */ 790 bitfield = 0; 791 792 /* copy from the next struct field */ 793 p = dest + ce_info[f].offset; 794 switch (ce_info[f].size_of) { 795 case 1: 796 bitfield = *p; 797 break; 798 case 2: 799 bitfield = cpu_to_le16(*(u16 *)p); 800 break; 801 case 4: 802 bitfield = cpu_to_le32(*(u32 *)p); 803 break; 804 case 8: 805 bitfield = cpu_to_le64(*(u64 *)p); 806 break; 807 } 808 809 /* prepare the bits and mask */ 810 shift_width = ce_info[f].lsb % 8; 811 mask = ((u64)1 << ce_info[f].width) - 1; 812 813 /* save upper bytes for special case */ 814 hi_mask = (u8)((mask >> 56) & 0xff); 815 hi_byte = (u8)((bitfield >> 56) & 0xff); 816 817 /* shift to correct alignment */ 818 mask <<= shift_width; 819 bitfield <<= shift_width; 820 821 /* get the current bits from the target bit string */ 822 p = context_bytes + (ce_info[f].lsb / 8); 823 memcpy(&t_bits, p, sizeof(u64)); 824 825 t_bits &= ~mask; /* get the bits not changing */ 826 t_bits |= bitfield; /* add in the new bits */ 827 828 /* put it all back */ 829 memcpy(p, &t_bits, sizeof(u64)); 830 831 /* deal with the special case if needed 832 * example: 62 bit field that starts in bit 5 of first byte 833 * will overlap 3 bits into byte 9 834 */ 835 if ((shift_width + ce_info[f].width) > 64) { 836 u8 byte; 837 838 hi_mask >>= (8 - shift_width); 839 hi_byte >>= (8 - shift_width); 840 byte = p[8] & ~hi_mask; /* get the bits not changing */ 841 byte |= hi_byte; /* add in the new bits */ 842 p[8] = byte; /* put it back */ 843 } 844 } 845 846 return 0; 847 } 848 849 /** 850 * i40e_hmc_get_object_va - retrieves an object's virtual address 851 * @hmc_info: pointer to i40e_hmc_info struct 852 * @object_base: pointer to u64 to get the va 853 * @rsrc_type: the hmc resource type 854 * @obj_idx: hmc object index 855 * 856 * This function retrieves the object's virtual address from the object 857 * base pointer. This function is used for LAN Queue contexts. 858 **/ 859 static 860 i40e_status i40e_hmc_get_object_va(struct i40e_hmc_info *hmc_info, 861 u8 **object_base, 862 enum i40e_hmc_lan_rsrc_type rsrc_type, 863 u32 obj_idx) 864 { 865 u32 obj_offset_in_sd, obj_offset_in_pd; 866 i40e_status ret_code = 0; 867 struct i40e_hmc_sd_entry *sd_entry; 868 struct i40e_hmc_pd_entry *pd_entry; 869 u32 pd_idx, pd_lmt, rel_pd_idx; 870 u64 obj_offset_in_fpm; 871 u32 sd_idx, sd_lmt; 872 873 if (NULL == hmc_info) { 874 ret_code = I40E_ERR_BAD_PTR; 875 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n"); 876 goto exit; 877 } 878 if (NULL == hmc_info->hmc_obj) { 879 ret_code = I40E_ERR_BAD_PTR; 880 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n"); 881 goto exit; 882 } 883 if (NULL == object_base) { 884 ret_code = I40E_ERR_BAD_PTR; 885 hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n"); 886 goto exit; 887 } 888 if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) { 889 ret_code = I40E_ERR_BAD_PTR; 890 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n"); 891 goto exit; 892 } 893 if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) { 894 hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n", 895 ret_code); 896 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 897 goto exit; 898 } 899 /* find sd index and limit */ 900 I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1, 901 &sd_idx, &sd_lmt); 902 903 sd_entry = &hmc_info->sd_table.sd_entry[sd_idx]; 904 obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base + 905 hmc_info->hmc_obj[rsrc_type].size * obj_idx; 906 907 if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) { 908 I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1, 909 &pd_idx, &pd_lmt); 910 rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD; 911 pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx]; 912 obj_offset_in_pd = (u32)(obj_offset_in_fpm % 913 I40E_HMC_PAGED_BP_SIZE); 914 *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd; 915 } else { 916 obj_offset_in_sd = (u32)(obj_offset_in_fpm % 917 I40E_HMC_DIRECT_BP_SIZE); 918 *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd; 919 } 920 exit: 921 return ret_code; 922 } 923 924 /** 925 * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue 926 * @hw: the hardware struct 927 * @queue: the queue we care about 928 **/ 929 i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 930 u16 queue) 931 { 932 i40e_status err; 933 u8 *context_bytes; 934 935 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 936 I40E_HMC_LAN_TX, queue); 937 if (err < 0) 938 return err; 939 940 return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX); 941 } 942 943 /** 944 * i40e_set_lan_tx_queue_context - set the HMC context for the queue 945 * @hw: the hardware struct 946 * @queue: the queue we care about 947 * @s: the struct to be filled 948 **/ 949 i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 950 u16 queue, 951 struct i40e_hmc_obj_txq *s) 952 { 953 i40e_status err; 954 u8 *context_bytes; 955 956 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 957 I40E_HMC_LAN_TX, queue); 958 if (err < 0) 959 return err; 960 961 return i40e_set_hmc_context(context_bytes, 962 i40e_hmc_txq_ce_info, (u8 *)s); 963 } 964 965 /** 966 * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue 967 * @hw: the hardware struct 968 * @queue: the queue we care about 969 **/ 970 i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 971 u16 queue) 972 { 973 i40e_status err; 974 u8 *context_bytes; 975 976 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 977 I40E_HMC_LAN_RX, queue); 978 if (err < 0) 979 return err; 980 981 return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX); 982 } 983 984 /** 985 * i40e_set_lan_rx_queue_context - set the HMC context for the queue 986 * @hw: the hardware struct 987 * @queue: the queue we care about 988 * @s: the struct to be filled 989 **/ 990 i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 991 u16 queue, 992 struct i40e_hmc_obj_rxq *s) 993 { 994 i40e_status err; 995 u8 *context_bytes; 996 997 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 998 I40E_HMC_LAN_RX, queue); 999 if (err < 0) 1000 return err; 1001 1002 return i40e_set_hmc_context(context_bytes, 1003 i40e_hmc_rxq_ce_info, (u8 *)s); 1004 } 1005