1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2014 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #include "i40e_osdep.h" 28 #include "i40e_register.h" 29 #include "i40e_type.h" 30 #include "i40e_hmc.h" 31 #include "i40e_lan_hmc.h" 32 #include "i40e_prototype.h" 33 34 /* lan specific interface functions */ 35 36 /** 37 * i40e_align_l2obj_base - aligns base object pointer to 512 bytes 38 * @offset: base address offset needing alignment 39 * 40 * Aligns the layer 2 function private memory so it's 512-byte aligned. 41 **/ 42 static u64 i40e_align_l2obj_base(u64 offset) 43 { 44 u64 aligned_offset = offset; 45 46 if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0) 47 aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT - 48 (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT)); 49 50 return aligned_offset; 51 } 52 53 /** 54 * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size 55 * @txq_num: number of Tx queues needing backing context 56 * @rxq_num: number of Rx queues needing backing context 57 * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context 58 * @fcoe_filt_num: number of FCoE filters needing backing context 59 * 60 * Calculates the maximum amount of memory for the function required, based 61 * on the number of resources it must provide context for. 62 **/ 63 static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 64 u32 fcoe_cntx_num, u32 fcoe_filt_num) 65 { 66 u64 fpm_size = 0; 67 68 fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ; 69 fpm_size = i40e_align_l2obj_base(fpm_size); 70 71 fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ); 72 fpm_size = i40e_align_l2obj_base(fpm_size); 73 74 fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX); 75 fpm_size = i40e_align_l2obj_base(fpm_size); 76 77 fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT); 78 fpm_size = i40e_align_l2obj_base(fpm_size); 79 80 return fpm_size; 81 } 82 83 /** 84 * i40e_init_lan_hmc - initialize i40e_hmc_info struct 85 * @hw: pointer to the HW structure 86 * @txq_num: number of Tx queues needing backing context 87 * @rxq_num: number of Rx queues needing backing context 88 * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context 89 * @fcoe_filt_num: number of FCoE filters needing backing context 90 * 91 * This function will be called once per physical function initialization. 92 * It will fill out the i40e_hmc_obj_info structure for LAN objects based on 93 * the driver's provided input, as well as information from the HMC itself 94 * loaded from NVRAM. 95 * 96 * Assumptions: 97 * - HMC Resource Profile has been selected before calling this function. 98 **/ 99 i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 100 u32 rxq_num, u32 fcoe_cntx_num, 101 u32 fcoe_filt_num) 102 { 103 struct i40e_hmc_obj_info *obj, *full_obj; 104 i40e_status ret_code = 0; 105 u64 l2fpm_size; 106 u32 size_exp; 107 108 hw->hmc.signature = I40E_HMC_INFO_SIGNATURE; 109 hw->hmc.hmc_fn_id = hw->pf_id; 110 111 /* allocate memory for hmc_obj */ 112 ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem, 113 sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX); 114 if (ret_code) 115 goto init_lan_hmc_out; 116 hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *) 117 hw->hmc.hmc_obj_virt_mem.va; 118 119 /* The full object will be used to create the LAN HMC SD */ 120 full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL]; 121 full_obj->max_cnt = 0; 122 full_obj->cnt = 0; 123 full_obj->base = 0; 124 full_obj->size = 0; 125 126 /* Tx queue context information */ 127 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX]; 128 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); 129 obj->cnt = txq_num; 130 obj->base = 0; 131 size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); 132 obj->size = (u64)1 << size_exp; 133 134 /* validate values requested by driver don't exceed HMC capacity */ 135 if (txq_num > obj->max_cnt) { 136 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 137 hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 138 txq_num, obj->max_cnt, ret_code); 139 goto init_lan_hmc_out; 140 } 141 142 /* aggregate values into the full LAN object for later */ 143 full_obj->max_cnt += obj->max_cnt; 144 full_obj->cnt += obj->cnt; 145 146 /* Rx queue context information */ 147 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX]; 148 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); 149 obj->cnt = rxq_num; 150 obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base + 151 (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt * 152 hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size); 153 obj->base = i40e_align_l2obj_base(obj->base); 154 size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); 155 obj->size = (u64)1 << size_exp; 156 157 /* validate values requested by driver don't exceed HMC capacity */ 158 if (rxq_num > obj->max_cnt) { 159 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 160 hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 161 rxq_num, obj->max_cnt, ret_code); 162 goto init_lan_hmc_out; 163 } 164 165 /* aggregate values into the full LAN object for later */ 166 full_obj->max_cnt += obj->max_cnt; 167 full_obj->cnt += obj->cnt; 168 169 /* FCoE context information */ 170 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX]; 171 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX); 172 obj->cnt = fcoe_cntx_num; 173 obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base + 174 (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt * 175 hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size); 176 obj->base = i40e_align_l2obj_base(obj->base); 177 size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); 178 obj->size = (u64)1 << size_exp; 179 180 /* validate values requested by driver don't exceed HMC capacity */ 181 if (fcoe_cntx_num > obj->max_cnt) { 182 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 183 hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 184 fcoe_cntx_num, obj->max_cnt, ret_code); 185 goto init_lan_hmc_out; 186 } 187 188 /* aggregate values into the full LAN object for later */ 189 full_obj->max_cnt += obj->max_cnt; 190 full_obj->cnt += obj->cnt; 191 192 /* FCoE filter information */ 193 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT]; 194 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX); 195 obj->cnt = fcoe_filt_num; 196 obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base + 197 (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt * 198 hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size); 199 obj->base = i40e_align_l2obj_base(obj->base); 200 size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); 201 obj->size = (u64)1 << size_exp; 202 203 /* validate values requested by driver don't exceed HMC capacity */ 204 if (fcoe_filt_num > obj->max_cnt) { 205 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 206 hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n", 207 fcoe_filt_num, obj->max_cnt, ret_code); 208 goto init_lan_hmc_out; 209 } 210 211 /* aggregate values into the full LAN object for later */ 212 full_obj->max_cnt += obj->max_cnt; 213 full_obj->cnt += obj->cnt; 214 215 hw->hmc.first_sd_index = 0; 216 hw->hmc.sd_table.ref_cnt = 0; 217 l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num, 218 fcoe_filt_num); 219 if (NULL == hw->hmc.sd_table.sd_entry) { 220 hw->hmc.sd_table.sd_cnt = (u32) 221 (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) / 222 I40E_HMC_DIRECT_BP_SIZE; 223 224 /* allocate the sd_entry members in the sd_table */ 225 ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr, 226 (sizeof(struct i40e_hmc_sd_entry) * 227 hw->hmc.sd_table.sd_cnt)); 228 if (ret_code) 229 goto init_lan_hmc_out; 230 hw->hmc.sd_table.sd_entry = 231 (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va; 232 } 233 /* store in the LAN full object for later */ 234 full_obj->size = l2fpm_size; 235 236 init_lan_hmc_out: 237 return ret_code; 238 } 239 240 /** 241 * i40e_remove_pd_page - Remove a page from the page descriptor table 242 * @hw: pointer to the HW structure 243 * @hmc_info: pointer to the HMC configuration information structure 244 * @idx: segment descriptor index to find the relevant page descriptor 245 * 246 * This function: 247 * 1. Marks the entry in pd table (for paged address mode) invalid 248 * 2. write to register PMPDINV to invalidate the backing page in FV cache 249 * 3. Decrement the ref count for pd_entry 250 * assumptions: 251 * 1. caller can deallocate the memory used by pd after this function 252 * returns. 253 **/ 254 static i40e_status i40e_remove_pd_page(struct i40e_hw *hw, 255 struct i40e_hmc_info *hmc_info, 256 u32 idx) 257 { 258 i40e_status ret_code = 0; 259 260 if (!i40e_prep_remove_pd_page(hmc_info, idx)) 261 ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true); 262 263 return ret_code; 264 } 265 266 /** 267 * i40e_remove_sd_bp - remove a backing page from a segment descriptor 268 * @hw: pointer to our HW structure 269 * @hmc_info: pointer to the HMC configuration information structure 270 * @idx: the page index 271 * 272 * This function: 273 * 1. Marks the entry in sd table (for direct address mode) invalid 274 * 2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set 275 * to 0) and PMSDDATAHIGH to invalidate the sd page 276 * 3. Decrement the ref count for the sd_entry 277 * assumptions: 278 * 1. caller can deallocate the memory used by backing storage after this 279 * function returns. 280 **/ 281 static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw, 282 struct i40e_hmc_info *hmc_info, 283 u32 idx) 284 { 285 i40e_status ret_code = 0; 286 287 if (!i40e_prep_remove_sd_bp(hmc_info, idx)) 288 ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true); 289 290 return ret_code; 291 } 292 293 /** 294 * i40e_create_lan_hmc_object - allocate backing store for hmc objects 295 * @hw: pointer to the HW structure 296 * @info: pointer to i40e_hmc_create_obj_info struct 297 * 298 * This will allocate memory for PDs and backing pages and populate 299 * the sd and pd entries. 300 **/ 301 static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw, 302 struct i40e_hmc_lan_create_obj_info *info) 303 { 304 i40e_status ret_code = 0; 305 struct i40e_hmc_sd_entry *sd_entry; 306 u32 pd_idx1 = 0, pd_lmt1 = 0; 307 u32 pd_idx = 0, pd_lmt = 0; 308 bool pd_error = false; 309 u32 sd_idx, sd_lmt; 310 u64 sd_size; 311 u32 i, j; 312 313 if (NULL == info) { 314 ret_code = I40E_ERR_BAD_PTR; 315 hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n"); 316 goto exit; 317 } 318 if (NULL == info->hmc_info) { 319 ret_code = I40E_ERR_BAD_PTR; 320 hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n"); 321 goto exit; 322 } 323 if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) { 324 ret_code = I40E_ERR_BAD_PTR; 325 hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n"); 326 goto exit; 327 } 328 329 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 330 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 331 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", 332 ret_code); 333 goto exit; 334 } 335 if ((info->start_idx + info->count) > 336 info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 337 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 338 hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n", 339 ret_code); 340 goto exit; 341 } 342 343 /* find sd index and limit */ 344 I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 345 info->start_idx, info->count, 346 &sd_idx, &sd_lmt); 347 if (sd_idx >= info->hmc_info->sd_table.sd_cnt || 348 sd_lmt > info->hmc_info->sd_table.sd_cnt) { 349 ret_code = I40E_ERR_INVALID_SD_INDEX; 350 goto exit; 351 } 352 /* find pd index */ 353 I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 354 info->start_idx, info->count, &pd_idx, 355 &pd_lmt); 356 357 /* This is to cover for cases where you may not want to have an SD with 358 * the full 2M memory but something smaller. By not filling out any 359 * size, the function will default the SD size to be 2M. 360 */ 361 if (info->direct_mode_sz == 0) 362 sd_size = I40E_HMC_DIRECT_BP_SIZE; 363 else 364 sd_size = info->direct_mode_sz; 365 366 /* check if all the sds are valid. If not, allocate a page and 367 * initialize it. 368 */ 369 for (j = sd_idx; j < sd_lmt; j++) { 370 /* update the sd table entry */ 371 ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j, 372 info->entry_type, 373 sd_size); 374 if (ret_code) 375 goto exit_sd_error; 376 sd_entry = &info->hmc_info->sd_table.sd_entry[j]; 377 if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) { 378 /* check if all the pds in this sd are valid. If not, 379 * allocate a page and initialize it. 380 */ 381 382 /* find pd_idx and pd_lmt in this sd */ 383 pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT)); 384 pd_lmt1 = min(pd_lmt, 385 ((j + 1) * I40E_HMC_MAX_BP_COUNT)); 386 for (i = pd_idx1; i < pd_lmt1; i++) { 387 /* update the pd table entry */ 388 ret_code = i40e_add_pd_table_entry(hw, 389 info->hmc_info, 390 i); 391 if (ret_code) { 392 pd_error = true; 393 break; 394 } 395 } 396 if (pd_error) { 397 /* remove the backing pages from pd_idx1 to i */ 398 while (i && (i > pd_idx1)) { 399 i40e_remove_pd_bp(hw, info->hmc_info, 400 (i - 1)); 401 i--; 402 } 403 } 404 } 405 if (!sd_entry->valid) { 406 sd_entry->valid = true; 407 switch (sd_entry->entry_type) { 408 case I40E_SD_TYPE_PAGED: 409 I40E_SET_PF_SD_ENTRY(hw, 410 sd_entry->u.pd_table.pd_page_addr.pa, 411 j, sd_entry->entry_type); 412 break; 413 case I40E_SD_TYPE_DIRECT: 414 I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa, 415 j, sd_entry->entry_type); 416 break; 417 default: 418 ret_code = I40E_ERR_INVALID_SD_TYPE; 419 goto exit; 420 break; 421 } 422 } 423 } 424 goto exit; 425 426 exit_sd_error: 427 /* cleanup for sd entries from j to sd_idx */ 428 while (j && (j > sd_idx)) { 429 sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1]; 430 switch (sd_entry->entry_type) { 431 case I40E_SD_TYPE_PAGED: 432 pd_idx1 = max(pd_idx, 433 ((j - 1) * I40E_HMC_MAX_BP_COUNT)); 434 pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT)); 435 for (i = pd_idx1; i < pd_lmt1; i++) { 436 i40e_remove_pd_bp(hw, info->hmc_info, i); 437 } 438 i40e_remove_pd_page(hw, info->hmc_info, (j - 1)); 439 break; 440 case I40E_SD_TYPE_DIRECT: 441 i40e_remove_sd_bp(hw, info->hmc_info, (j - 1)); 442 break; 443 default: 444 ret_code = I40E_ERR_INVALID_SD_TYPE; 445 break; 446 } 447 j--; 448 } 449 exit: 450 return ret_code; 451 } 452 453 /** 454 * i40e_configure_lan_hmc - prepare the HMC backing store 455 * @hw: pointer to the hw structure 456 * @model: the model for the layout of the SD/PD tables 457 * 458 * - This function will be called once per physical function initialization. 459 * - This function will be called after i40e_init_lan_hmc() and before 460 * any LAN/FCoE HMC objects can be created. 461 **/ 462 i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw, 463 enum i40e_hmc_model model) 464 { 465 struct i40e_hmc_lan_create_obj_info info; 466 i40e_status ret_code = 0; 467 u8 hmc_fn_id = hw->hmc.hmc_fn_id; 468 struct i40e_hmc_obj_info *obj; 469 470 /* Initialize part of the create object info struct */ 471 info.hmc_info = &hw->hmc; 472 info.rsrc_type = I40E_HMC_LAN_FULL; 473 info.start_idx = 0; 474 info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size; 475 476 /* Build the SD entry for the LAN objects */ 477 switch (model) { 478 case I40E_HMC_MODEL_DIRECT_PREFERRED: 479 case I40E_HMC_MODEL_DIRECT_ONLY: 480 info.entry_type = I40E_SD_TYPE_DIRECT; 481 /* Make one big object, a single SD */ 482 info.count = 1; 483 ret_code = i40e_create_lan_hmc_object(hw, &info); 484 if (ret_code && (model == I40E_HMC_MODEL_DIRECT_PREFERRED)) 485 goto try_type_paged; 486 else if (ret_code) 487 goto configure_lan_hmc_out; 488 /* else clause falls through the break */ 489 break; 490 case I40E_HMC_MODEL_PAGED_ONLY: 491 try_type_paged: 492 info.entry_type = I40E_SD_TYPE_PAGED; 493 /* Make one big object in the PD table */ 494 info.count = 1; 495 ret_code = i40e_create_lan_hmc_object(hw, &info); 496 if (ret_code) 497 goto configure_lan_hmc_out; 498 break; 499 default: 500 /* unsupported type */ 501 ret_code = I40E_ERR_INVALID_SD_TYPE; 502 hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n", 503 ret_code); 504 goto configure_lan_hmc_out; 505 break; 506 } 507 508 /* Configure and program the FPM registers so objects can be created */ 509 510 /* Tx contexts */ 511 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX]; 512 wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id), 513 (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512)); 514 wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt); 515 516 /* Rx contexts */ 517 obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX]; 518 wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id), 519 (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512)); 520 wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt); 521 522 /* FCoE contexts */ 523 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX]; 524 wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id), 525 (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512)); 526 wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt); 527 528 /* FCoE filters */ 529 obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT]; 530 wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id), 531 (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512)); 532 wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt); 533 534 configure_lan_hmc_out: 535 return ret_code; 536 } 537 538 /** 539 * i40e_delete_hmc_object - remove hmc objects 540 * @hw: pointer to the HW structure 541 * @info: pointer to i40e_hmc_delete_obj_info struct 542 * 543 * This will de-populate the SDs and PDs. It frees 544 * the memory for PDS and backing storage. After this function is returned, 545 * caller should deallocate memory allocated previously for 546 * book-keeping information about PDs and backing storage. 547 **/ 548 static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw, 549 struct i40e_hmc_lan_delete_obj_info *info) 550 { 551 i40e_status ret_code = 0; 552 struct i40e_hmc_pd_table *pd_table; 553 u32 pd_idx, pd_lmt, rel_pd_idx; 554 u32 sd_idx, sd_lmt; 555 u32 i, j; 556 557 if (NULL == info) { 558 ret_code = I40E_ERR_BAD_PTR; 559 hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n"); 560 goto exit; 561 } 562 if (NULL == info->hmc_info) { 563 ret_code = I40E_ERR_BAD_PTR; 564 hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n"); 565 goto exit; 566 } 567 if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) { 568 ret_code = I40E_ERR_BAD_PTR; 569 hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n"); 570 goto exit; 571 } 572 573 if (NULL == info->hmc_info->sd_table.sd_entry) { 574 ret_code = I40E_ERR_BAD_PTR; 575 hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n"); 576 goto exit; 577 } 578 579 if (NULL == info->hmc_info->hmc_obj) { 580 ret_code = I40E_ERR_BAD_PTR; 581 hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n"); 582 goto exit; 583 } 584 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 585 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 586 hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n", 587 ret_code); 588 goto exit; 589 } 590 591 if ((info->start_idx + info->count) > 592 info->hmc_info->hmc_obj[info->rsrc_type].cnt) { 593 ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT; 594 hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n", 595 ret_code); 596 goto exit; 597 } 598 599 I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 600 info->start_idx, info->count, &pd_idx, 601 &pd_lmt); 602 603 for (j = pd_idx; j < pd_lmt; j++) { 604 sd_idx = j / I40E_HMC_PD_CNT_IN_SD; 605 606 if (I40E_SD_TYPE_PAGED != 607 info->hmc_info->sd_table.sd_entry[sd_idx].entry_type) 608 continue; 609 610 rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD; 611 612 pd_table = 613 &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; 614 if (pd_table->pd_entry[rel_pd_idx].valid) { 615 ret_code = i40e_remove_pd_bp(hw, info->hmc_info, j); 616 if (ret_code) 617 goto exit; 618 } 619 } 620 621 /* find sd index and limit */ 622 I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type, 623 info->start_idx, info->count, 624 &sd_idx, &sd_lmt); 625 if (sd_idx >= info->hmc_info->sd_table.sd_cnt || 626 sd_lmt > info->hmc_info->sd_table.sd_cnt) { 627 ret_code = I40E_ERR_INVALID_SD_INDEX; 628 goto exit; 629 } 630 631 for (i = sd_idx; i < sd_lmt; i++) { 632 if (!info->hmc_info->sd_table.sd_entry[i].valid) 633 continue; 634 switch (info->hmc_info->sd_table.sd_entry[i].entry_type) { 635 case I40E_SD_TYPE_DIRECT: 636 ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i); 637 if (ret_code) 638 goto exit; 639 break; 640 case I40E_SD_TYPE_PAGED: 641 ret_code = i40e_remove_pd_page(hw, info->hmc_info, i); 642 if (ret_code) 643 goto exit; 644 break; 645 default: 646 break; 647 } 648 } 649 exit: 650 return ret_code; 651 } 652 653 /** 654 * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory 655 * @hw: pointer to the hw structure 656 * 657 * This must be called by drivers as they are shutting down and being 658 * removed from the OS. 659 **/ 660 i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw) 661 { 662 struct i40e_hmc_lan_delete_obj_info info; 663 i40e_status ret_code; 664 665 info.hmc_info = &hw->hmc; 666 info.rsrc_type = I40E_HMC_LAN_FULL; 667 info.start_idx = 0; 668 info.count = 1; 669 670 /* delete the object */ 671 ret_code = i40e_delete_lan_hmc_object(hw, &info); 672 673 /* free the SD table entry for LAN */ 674 i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr); 675 hw->hmc.sd_table.sd_cnt = 0; 676 hw->hmc.sd_table.sd_entry = NULL; 677 678 /* free memory used for hmc_obj */ 679 i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem); 680 hw->hmc.hmc_obj = NULL; 681 682 return ret_code; 683 } 684 685 #define I40E_HMC_STORE(_struct, _ele) \ 686 offsetof(struct _struct, _ele), \ 687 FIELD_SIZEOF(struct _struct, _ele) 688 689 struct i40e_context_ele { 690 u16 offset; 691 u16 size_of; 692 u16 width; 693 u16 lsb; 694 }; 695 696 /* LAN Tx Queue Context */ 697 static struct i40e_context_ele i40e_hmc_txq_ce_info[] = { 698 /* Field Width LSB */ 699 {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 }, 700 {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 }, 701 {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 }, 702 {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 }, 703 {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 }, 704 {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 }, 705 {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 }, 706 {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 }, 707 /* line 1 */ 708 {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 }, 709 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 }, 710 {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 }, 711 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 }, 712 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 }, 713 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 }, 714 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 }, 715 /* line 7 */ 716 {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) }, 717 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) }, 718 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) }, 719 { 0 } 720 }; 721 722 /* LAN Rx Queue Context */ 723 static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = { 724 /* Field Width LSB */ 725 { I40E_HMC_STORE(i40e_hmc_obj_rxq, head), 13, 0 }, 726 { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid), 8, 13 }, 727 { I40E_HMC_STORE(i40e_hmc_obj_rxq, base), 57, 32 }, 728 { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen), 13, 89 }, 729 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff), 7, 102 }, 730 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff), 5, 109 }, 731 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype), 2, 114 }, 732 { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize), 1, 116 }, 733 { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip), 1, 117 }, 734 { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena), 1, 118 }, 735 { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel), 1, 119 }, 736 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0), 4, 120 }, 737 { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1), 2, 124 }, 738 { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv), 1, 127 }, 739 { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax), 14, 174 }, 740 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1, 193 }, 741 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1, 194 }, 742 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 }, 743 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 }, 744 { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 }, 745 { I40E_HMC_STORE(i40e_hmc_obj_rxq, prefena), 1, 201 }, 746 { 0 } 747 }; 748 749 /** 750 * i40e_clear_hmc_context - zero out the HMC context bits 751 * @hw: the hardware struct 752 * @context_bytes: pointer to the context bit array (DMA memory) 753 * @hmc_type: the type of HMC resource 754 **/ 755 static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw, 756 u8 *context_bytes, 757 enum i40e_hmc_lan_rsrc_type hmc_type) 758 { 759 /* clean the bit array */ 760 memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size); 761 762 return 0; 763 } 764 765 /** 766 * i40e_set_hmc_context - replace HMC context bits 767 * @context_bytes: pointer to the context bit array 768 * @ce_info: a description of the struct to be filled 769 * @dest: the struct to be filled 770 **/ 771 static i40e_status i40e_set_hmc_context(u8 *context_bytes, 772 struct i40e_context_ele *ce_info, 773 u8 *dest) 774 { 775 u16 shift_width; 776 u64 bitfield; 777 u8 hi_byte; 778 u8 hi_mask; 779 u64 t_bits; 780 u64 mask; 781 u8 *p; 782 int f; 783 784 for (f = 0; ce_info[f].width != 0; f++) { 785 /* clear out the field */ 786 bitfield = 0; 787 788 /* copy from the next struct field */ 789 p = dest + ce_info[f].offset; 790 switch (ce_info[f].size_of) { 791 case 1: 792 bitfield = *p; 793 break; 794 case 2: 795 bitfield = cpu_to_le16(*(u16 *)p); 796 break; 797 case 4: 798 bitfield = cpu_to_le32(*(u32 *)p); 799 break; 800 case 8: 801 bitfield = cpu_to_le64(*(u64 *)p); 802 break; 803 } 804 805 /* prepare the bits and mask */ 806 shift_width = ce_info[f].lsb % 8; 807 mask = ((u64)1 << ce_info[f].width) - 1; 808 809 /* save upper bytes for special case */ 810 hi_mask = (u8)((mask >> 56) & 0xff); 811 hi_byte = (u8)((bitfield >> 56) & 0xff); 812 813 /* shift to correct alignment */ 814 mask <<= shift_width; 815 bitfield <<= shift_width; 816 817 /* get the current bits from the target bit string */ 818 p = context_bytes + (ce_info[f].lsb / 8); 819 memcpy(&t_bits, p, sizeof(u64)); 820 821 t_bits &= ~mask; /* get the bits not changing */ 822 t_bits |= bitfield; /* add in the new bits */ 823 824 /* put it all back */ 825 memcpy(p, &t_bits, sizeof(u64)); 826 827 /* deal with the special case if needed 828 * example: 62 bit field that starts in bit 5 of first byte 829 * will overlap 3 bits into byte 9 830 */ 831 if ((shift_width + ce_info[f].width) > 64) { 832 u8 byte; 833 834 hi_mask >>= (8 - shift_width); 835 hi_byte >>= (8 - shift_width); 836 byte = p[8] & ~hi_mask; /* get the bits not changing */ 837 byte |= hi_byte; /* add in the new bits */ 838 p[8] = byte; /* put it back */ 839 } 840 } 841 842 return 0; 843 } 844 845 /** 846 * i40e_hmc_get_object_va - retrieves an object's virtual address 847 * @hmc_info: pointer to i40e_hmc_info struct 848 * @object_base: pointer to u64 to get the va 849 * @rsrc_type: the hmc resource type 850 * @obj_idx: hmc object index 851 * 852 * This function retrieves the object's virtual address from the object 853 * base pointer. This function is used for LAN Queue contexts. 854 **/ 855 static 856 i40e_status i40e_hmc_get_object_va(struct i40e_hmc_info *hmc_info, 857 u8 **object_base, 858 enum i40e_hmc_lan_rsrc_type rsrc_type, 859 u32 obj_idx) 860 { 861 u32 obj_offset_in_sd, obj_offset_in_pd; 862 i40e_status ret_code = 0; 863 struct i40e_hmc_sd_entry *sd_entry; 864 struct i40e_hmc_pd_entry *pd_entry; 865 u32 pd_idx, pd_lmt, rel_pd_idx; 866 u64 obj_offset_in_fpm; 867 u32 sd_idx, sd_lmt; 868 869 if (NULL == hmc_info) { 870 ret_code = I40E_ERR_BAD_PTR; 871 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n"); 872 goto exit; 873 } 874 if (NULL == hmc_info->hmc_obj) { 875 ret_code = I40E_ERR_BAD_PTR; 876 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n"); 877 goto exit; 878 } 879 if (NULL == object_base) { 880 ret_code = I40E_ERR_BAD_PTR; 881 hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n"); 882 goto exit; 883 } 884 if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) { 885 ret_code = I40E_ERR_BAD_PTR; 886 hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n"); 887 goto exit; 888 } 889 if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) { 890 hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n", 891 ret_code); 892 ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX; 893 goto exit; 894 } 895 /* find sd index and limit */ 896 I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1, 897 &sd_idx, &sd_lmt); 898 899 sd_entry = &hmc_info->sd_table.sd_entry[sd_idx]; 900 obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base + 901 hmc_info->hmc_obj[rsrc_type].size * obj_idx; 902 903 if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) { 904 I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1, 905 &pd_idx, &pd_lmt); 906 rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD; 907 pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx]; 908 obj_offset_in_pd = (u32)(obj_offset_in_fpm % 909 I40E_HMC_PAGED_BP_SIZE); 910 *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd; 911 } else { 912 obj_offset_in_sd = (u32)(obj_offset_in_fpm % 913 I40E_HMC_DIRECT_BP_SIZE); 914 *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd; 915 } 916 exit: 917 return ret_code; 918 } 919 920 /** 921 * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue 922 * @hw: the hardware struct 923 * @queue: the queue we care about 924 **/ 925 i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 926 u16 queue) 927 { 928 i40e_status err; 929 u8 *context_bytes; 930 931 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 932 I40E_HMC_LAN_TX, queue); 933 if (err < 0) 934 return err; 935 936 return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX); 937 } 938 939 /** 940 * i40e_set_lan_tx_queue_context - set the HMC context for the queue 941 * @hw: the hardware struct 942 * @queue: the queue we care about 943 * @s: the struct to be filled 944 **/ 945 i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 946 u16 queue, 947 struct i40e_hmc_obj_txq *s) 948 { 949 i40e_status err; 950 u8 *context_bytes; 951 952 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 953 I40E_HMC_LAN_TX, queue); 954 if (err < 0) 955 return err; 956 957 return i40e_set_hmc_context(context_bytes, 958 i40e_hmc_txq_ce_info, (u8 *)s); 959 } 960 961 /** 962 * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue 963 * @hw: the hardware struct 964 * @queue: the queue we care about 965 **/ 966 i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 967 u16 queue) 968 { 969 i40e_status err; 970 u8 *context_bytes; 971 972 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 973 I40E_HMC_LAN_RX, queue); 974 if (err < 0) 975 return err; 976 977 return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX); 978 } 979 980 /** 981 * i40e_set_lan_rx_queue_context - set the HMC context for the queue 982 * @hw: the hardware struct 983 * @queue: the queue we care about 984 * @s: the struct to be filled 985 **/ 986 i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 987 u16 queue, 988 struct i40e_hmc_obj_rxq *s) 989 { 990 i40e_status err; 991 u8 *context_bytes; 992 993 err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes, 994 I40E_HMC_LAN_RX, queue); 995 if (err < 0) 996 return err; 997 998 return i40e_set_hmc_context(context_bytes, 999 i40e_hmc_rxq_ce_info, (u8 *)s); 1000 } 1001