1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 #ifndef _I40E_HMC_H_ 5 #define _I40E_HMC_H_ 6 7 #define I40E_HMC_MAX_BP_COUNT 512 8 9 /* forward-declare the HW struct for the compiler */ 10 struct i40e_hw; 11 12 #define I40E_HMC_INFO_SIGNATURE 0x484D5347 /* HMSG */ 13 #define I40E_HMC_PD_CNT_IN_SD 512 14 #define I40E_HMC_DIRECT_BP_SIZE 0x200000 /* 2M */ 15 #define I40E_HMC_PAGED_BP_SIZE 4096 16 #define I40E_HMC_PD_BP_BUF_ALIGNMENT 4096 17 #define I40E_FIRST_VF_FPM_ID 16 18 19 struct i40e_hmc_obj_info { 20 u64 base; /* base addr in FPM */ 21 u32 max_cnt; /* max count available for this hmc func */ 22 u32 cnt; /* count of objects driver actually wants to create */ 23 u64 size; /* size in bytes of one object */ 24 }; 25 26 enum i40e_sd_entry_type { 27 I40E_SD_TYPE_INVALID = 0, 28 I40E_SD_TYPE_PAGED = 1, 29 I40E_SD_TYPE_DIRECT = 2 30 }; 31 32 struct i40e_hmc_bp { 33 enum i40e_sd_entry_type entry_type; 34 struct i40e_dma_mem addr; /* populate to be used by hw */ 35 u32 sd_pd_index; 36 u32 ref_cnt; 37 }; 38 39 struct i40e_hmc_pd_entry { 40 struct i40e_hmc_bp bp; 41 u32 sd_index; 42 bool rsrc_pg; 43 bool valid; 44 }; 45 46 struct i40e_hmc_pd_table { 47 struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */ 48 struct i40e_hmc_pd_entry *pd_entry; /* [512] for sw book keeping */ 49 struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */ 50 51 u32 ref_cnt; 52 u32 sd_index; 53 }; 54 55 struct i40e_hmc_sd_entry { 56 enum i40e_sd_entry_type entry_type; 57 bool valid; 58 59 union { 60 struct i40e_hmc_pd_table pd_table; 61 struct i40e_hmc_bp bp; 62 } u; 63 }; 64 65 struct i40e_hmc_sd_table { 66 struct i40e_virt_mem addr; /* used to track sd_entry allocations */ 67 u32 sd_cnt; 68 u32 ref_cnt; 69 struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */ 70 }; 71 72 struct i40e_hmc_info { 73 u32 signature; 74 /* equals to pci func num for PF and dynamically allocated for VFs */ 75 u8 hmc_fn_id; 76 u16 first_sd_index; /* index of the first available SD */ 77 78 /* hmc objects */ 79 struct i40e_hmc_obj_info *hmc_obj; 80 struct i40e_virt_mem hmc_obj_virt_mem; 81 struct i40e_hmc_sd_table sd_table; 82 }; 83 84 #define I40E_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++) 85 #define I40E_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++) 86 #define I40E_INC_BP_REFCNT(bp) ((bp)->ref_cnt++) 87 88 #define I40E_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--) 89 #define I40E_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--) 90 #define I40E_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--) 91 92 /** 93 * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware 94 * @hw: pointer to our hw struct 95 * @pa: pointer to physical address 96 * @sd_index: segment descriptor index 97 * @type: if sd entry is direct or paged 98 **/ 99 #define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \ 100 { \ 101 u32 val1, val2, val3; \ 102 val1 = (u32)(upper_32_bits(pa)); \ 103 val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \ 104 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ 105 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ 106 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \ 107 BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \ 108 val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ 109 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ 110 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 111 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 112 } 113 114 /** 115 * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware 116 * @hw: pointer to our hw struct 117 * @sd_index: segment descriptor index 118 * @type: if sd entry is direct or paged 119 **/ 120 #define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \ 121 { \ 122 u32 val2, val3; \ 123 val2 = (I40E_HMC_MAX_BP_COUNT << \ 124 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ 125 ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ 126 I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \ 127 val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ 128 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ 129 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 130 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 131 } 132 133 /** 134 * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware 135 * @hw: pointer to our hw struct 136 * @sd_idx: segment descriptor index 137 * @pd_idx: page descriptor index 138 **/ 139 #define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \ 140 wr32((hw), I40E_PFHMC_PDINV, \ 141 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \ 142 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT))) 143 144 /** 145 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit 146 * @hmc_info: pointer to the HMC configuration information structure 147 * @type: type of HMC resources we're searching 148 * @index: starting index for the object 149 * @cnt: number of objects we're trying to create 150 * @sd_idx: pointer to return index of the segment descriptor in question 151 * @sd_limit: pointer to return the maximum number of segment descriptors 152 * 153 * This function calculates the segment descriptor index and index limit 154 * for the resource defined by i40e_hmc_rsrc_type. 155 **/ 156 #define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\ 157 { \ 158 u64 fpm_addr, fpm_limit; \ 159 fpm_addr = (hmc_info)->hmc_obj[(type)].base + \ 160 (hmc_info)->hmc_obj[(type)].size * (index); \ 161 fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\ 162 *(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \ 163 *(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \ 164 /* add one more to the limit to correct our range */ \ 165 *(sd_limit) += 1; \ 166 } 167 168 /** 169 * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit 170 * @hmc_info: pointer to the HMC configuration information struct 171 * @type: HMC resource type we're examining 172 * @idx: starting index for the object 173 * @cnt: number of objects we're trying to create 174 * @pd_index: pointer to return page descriptor index 175 * @pd_limit: pointer to return page descriptor index limit 176 * 177 * Calculates the page descriptor index and index limit for the resource 178 * defined by i40e_hmc_rsrc_type. 179 **/ 180 #define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\ 181 { \ 182 u64 fpm_adr, fpm_limit; \ 183 fpm_adr = (hmc_info)->hmc_obj[(type)].base + \ 184 (hmc_info)->hmc_obj[(type)].size * (idx); \ 185 fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \ 186 *(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \ 187 *(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \ 188 /* add one more to the limit to correct our range */ \ 189 *(pd_limit) += 1; \ 190 } 191 i40e_status i40e_add_sd_table_entry(struct i40e_hw *hw, 192 struct i40e_hmc_info *hmc_info, 193 u32 sd_index, 194 enum i40e_sd_entry_type type, 195 u64 direct_mode_sz); 196 197 i40e_status i40e_add_pd_table_entry(struct i40e_hw *hw, 198 struct i40e_hmc_info *hmc_info, 199 u32 pd_index, 200 struct i40e_dma_mem *rsrc_pg); 201 i40e_status i40e_remove_pd_bp(struct i40e_hw *hw, 202 struct i40e_hmc_info *hmc_info, 203 u32 idx); 204 i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info, 205 u32 idx); 206 i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw, 207 struct i40e_hmc_info *hmc_info, 208 u32 idx, bool is_pf); 209 i40e_status i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info, 210 u32 idx); 211 i40e_status i40e_remove_pd_page_new(struct i40e_hw *hw, 212 struct i40e_hmc_info *hmc_info, 213 u32 idx, bool is_pf); 214 215 #endif /* _I40E_HMC_H_ */ 216