1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*******************************************************************************
3  *
4  * Intel Ethernet Controller XL710 Family Linux Driver
5  * Copyright(c) 2013 - 2014 Intel Corporation.
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program.  If not, see <http://www.gnu.org/licenses/>.
18  *
19  * The full GNU General Public License is included in this distribution in
20  * the file called "COPYING".
21  *
22  * Contact Information:
23  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25  *
26  ******************************************************************************/
27 
28 #ifndef _I40E_HMC_H_
29 #define _I40E_HMC_H_
30 
31 #define I40E_HMC_MAX_BP_COUNT 512
32 
33 /* forward-declare the HW struct for the compiler */
34 struct i40e_hw;
35 
36 #define I40E_HMC_INFO_SIGNATURE		0x484D5347 /* HMSG */
37 #define I40E_HMC_PD_CNT_IN_SD		512
38 #define I40E_HMC_DIRECT_BP_SIZE		0x200000 /* 2M */
39 #define I40E_HMC_PAGED_BP_SIZE		4096
40 #define I40E_HMC_PD_BP_BUF_ALIGNMENT	4096
41 #define I40E_FIRST_VF_FPM_ID		16
42 
43 struct i40e_hmc_obj_info {
44 	u64 base;	/* base addr in FPM */
45 	u32 max_cnt;	/* max count available for this hmc func */
46 	u32 cnt;	/* count of objects driver actually wants to create */
47 	u64 size;	/* size in bytes of one object */
48 };
49 
50 enum i40e_sd_entry_type {
51 	I40E_SD_TYPE_INVALID = 0,
52 	I40E_SD_TYPE_PAGED   = 1,
53 	I40E_SD_TYPE_DIRECT  = 2
54 };
55 
56 struct i40e_hmc_bp {
57 	enum i40e_sd_entry_type entry_type;
58 	struct i40e_dma_mem addr; /* populate to be used by hw */
59 	u32 sd_pd_index;
60 	u32 ref_cnt;
61 };
62 
63 struct i40e_hmc_pd_entry {
64 	struct i40e_hmc_bp bp;
65 	u32 sd_index;
66 	bool rsrc_pg;
67 	bool valid;
68 };
69 
70 struct i40e_hmc_pd_table {
71 	struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
72 	struct i40e_hmc_pd_entry  *pd_entry; /* [512] for sw book keeping */
73 	struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
74 
75 	u32 ref_cnt;
76 	u32 sd_index;
77 };
78 
79 struct i40e_hmc_sd_entry {
80 	enum i40e_sd_entry_type entry_type;
81 	bool valid;
82 
83 	union {
84 		struct i40e_hmc_pd_table pd_table;
85 		struct i40e_hmc_bp bp;
86 	} u;
87 };
88 
89 struct i40e_hmc_sd_table {
90 	struct i40e_virt_mem addr; /* used to track sd_entry allocations */
91 	u32 sd_cnt;
92 	u32 ref_cnt;
93 	struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
94 };
95 
96 struct i40e_hmc_info {
97 	u32 signature;
98 	/* equals to pci func num for PF and dynamically allocated for VFs */
99 	u8 hmc_fn_id;
100 	u16 first_sd_index; /* index of the first available SD */
101 
102 	/* hmc objects */
103 	struct i40e_hmc_obj_info *hmc_obj;
104 	struct i40e_virt_mem hmc_obj_virt_mem;
105 	struct i40e_hmc_sd_table sd_table;
106 };
107 
108 #define I40E_INC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt++)
109 #define I40E_INC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt++)
110 #define I40E_INC_BP_REFCNT(bp)		((bp)->ref_cnt++)
111 
112 #define I40E_DEC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt--)
113 #define I40E_DEC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt--)
114 #define I40E_DEC_BP_REFCNT(bp)		((bp)->ref_cnt--)
115 
116 /**
117  * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
118  * @hw: pointer to our hw struct
119  * @pa: pointer to physical address
120  * @sd_index: segment descriptor index
121  * @type: if sd entry is direct or paged
122  **/
123 #define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type)			\
124 {									\
125 	u32 val1, val2, val3;						\
126 	val1 = (u32)(upper_32_bits(pa));				\
127 	val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT <<			\
128 		 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
129 		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
130 		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |			\
131 		BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT);		\
132 	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
133 	wr32((hw), I40E_PFHMC_SDDATAHIGH, val1);			\
134 	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
135 	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
136 }
137 
138 /**
139  * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
140  * @hw: pointer to our hw struct
141  * @sd_index: segment descriptor index
142  * @type: if sd entry is direct or paged
143  **/
144 #define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type)			\
145 {									\
146 	u32 val2, val3;							\
147 	val2 = (I40E_HMC_MAX_BP_COUNT <<				\
148 		I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
149 		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
150 		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);			\
151 	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
152 	wr32((hw), I40E_PFHMC_SDDATAHIGH, 0);				\
153 	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
154 	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
155 }
156 
157 /**
158  * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
159  * @hw: pointer to our hw struct
160  * @sd_idx: segment descriptor index
161  * @pd_idx: page descriptor index
162  **/
163 #define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)			\
164 	wr32((hw), I40E_PFHMC_PDINV,					\
165 	    (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) |		\
166 	     ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
167 
168 /**
169  * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
170  * @hmc_info: pointer to the HMC configuration information structure
171  * @type: type of HMC resources we're searching
172  * @index: starting index for the object
173  * @cnt: number of objects we're trying to create
174  * @sd_idx: pointer to return index of the segment descriptor in question
175  * @sd_limit: pointer to return the maximum number of segment descriptors
176  *
177  * This function calculates the segment descriptor index and index limit
178  * for the resource defined by i40e_hmc_rsrc_type.
179  **/
180 #define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
181 {									\
182 	u64 fpm_addr, fpm_limit;					\
183 	fpm_addr = (hmc_info)->hmc_obj[(type)].base +			\
184 		   (hmc_info)->hmc_obj[(type)].size * (index);		\
185 	fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
186 	*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE);		\
187 	*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE);	\
188 	/* add one more to the limit to correct our range */		\
189 	*(sd_limit) += 1;						\
190 }
191 
192 /**
193  * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
194  * @hmc_info: pointer to the HMC configuration information struct
195  * @type: HMC resource type we're examining
196  * @idx: starting index for the object
197  * @cnt: number of objects we're trying to create
198  * @pd_index: pointer to return page descriptor index
199  * @pd_limit: pointer to return page descriptor index limit
200  *
201  * Calculates the page descriptor index and index limit for the resource
202  * defined by i40e_hmc_rsrc_type.
203  **/
204 #define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
205 {									\
206 	u64 fpm_adr, fpm_limit;						\
207 	fpm_adr = (hmc_info)->hmc_obj[(type)].base +			\
208 		  (hmc_info)->hmc_obj[(type)].size * (idx);		\
209 	fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt);	\
210 	*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE);		\
211 	*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE);	\
212 	/* add one more to the limit to correct our range */		\
213 	*(pd_limit) += 1;						\
214 }
215 i40e_status i40e_add_sd_table_entry(struct i40e_hw *hw,
216 					      struct i40e_hmc_info *hmc_info,
217 					      u32 sd_index,
218 					      enum i40e_sd_entry_type type,
219 					      u64 direct_mode_sz);
220 
221 i40e_status i40e_add_pd_table_entry(struct i40e_hw *hw,
222 					      struct i40e_hmc_info *hmc_info,
223 					      u32 pd_index,
224 					      struct i40e_dma_mem *rsrc_pg);
225 i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
226 					struct i40e_hmc_info *hmc_info,
227 					u32 idx);
228 i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
229 					     u32 idx);
230 i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw,
231 					    struct i40e_hmc_info *hmc_info,
232 					    u32 idx, bool is_pf);
233 i40e_status i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
234 					       u32 idx);
235 i40e_status i40e_remove_pd_page_new(struct i40e_hw *hw,
236 					      struct i40e_hmc_info *hmc_info,
237 					      u32 idx, bool is_pf);
238 
239 #endif /* _I40E_HMC_H_ */
240