1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("priority_xon_rx", stats.priority_xon_rx), 130 I40E_PF_STAT("priority_xoff_rx", stats.priority_xoff_rx), 131 I40E_PF_STAT("priority_xon_tx", stats.priority_xon_tx), 132 I40E_PF_STAT("priority_xoff_tx", stats.priority_xoff_tx), 133 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 134 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 135 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 136 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 137 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 138 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 139 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 140 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 141 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 142 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 143 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 144 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 145 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 146 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 147 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 148 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 149 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 150 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 151 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 152 I40E_PF_STAT("arq_overflows", arq_overflows), 153 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 154 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 155 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 156 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 157 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 158 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 159 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 160 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 161 162 /* LPI stats */ 163 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 164 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 165 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 166 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 167 }; 168 169 #define I40E_QUEUE_STATS_LEN(n) \ 170 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 171 * 2 /* Tx and Rx together */ \ 172 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 173 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 174 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 175 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 176 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 177 I40E_MISC_STATS_LEN + \ 178 I40E_QUEUE_STATS_LEN((n))) 179 #define I40E_PFC_STATS_LEN ( \ 180 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 181 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 182 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 183 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 184 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 185 / sizeof(u64)) 186 #define I40E_VEB_TC_STATS_LEN ( \ 187 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 188 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 189 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 190 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 191 / sizeof(u64)) 192 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 193 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 194 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 195 I40E_PFC_STATS_LEN + \ 196 I40E_VSI_STATS_LEN((n))) 197 198 enum i40e_ethtool_test_id { 199 I40E_ETH_TEST_REG = 0, 200 I40E_ETH_TEST_EEPROM, 201 I40E_ETH_TEST_INTR, 202 I40E_ETH_TEST_LINK, 203 }; 204 205 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 206 "Register test (offline)", 207 "Eeprom test (offline)", 208 "Interrupt test (offline)", 209 "Link test (on/offline)" 210 }; 211 212 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 213 214 struct i40e_priv_flags { 215 char flag_string[ETH_GSTRING_LEN]; 216 u64 flag; 217 bool read_only; 218 }; 219 220 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 221 .flag_string = _name, \ 222 .flag = _flag, \ 223 .read_only = _read_only, \ 224 } 225 226 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 227 /* NOTE: MFP setting cannot be changed */ 228 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 229 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 230 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 231 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 232 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 233 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 234 I40E_PRIV_FLAG("disable-source-pruning", 235 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 236 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 237 }; 238 239 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 240 241 /* Private flags with a global effect, restricted to PF 0 */ 242 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 243 I40E_PRIV_FLAG("vf-true-promisc-support", 244 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 245 }; 246 247 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 248 249 /** 250 * i40e_partition_setting_complaint - generic complaint for MFP restriction 251 * @pf: the PF struct 252 **/ 253 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 254 { 255 dev_info(&pf->pdev->dev, 256 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 257 } 258 259 /** 260 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 261 * @pf: PF struct with phy_types 262 * @ks: ethtool link ksettings struct to fill out 263 * 264 **/ 265 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 266 struct ethtool_link_ksettings *ks) 267 { 268 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 269 u64 phy_types = pf->hw.phy.phy_types; 270 271 ethtool_link_ksettings_zero_link_mode(ks, supported); 272 ethtool_link_ksettings_zero_link_mode(ks, advertising); 273 274 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 275 ethtool_link_ksettings_add_link_mode(ks, supported, 276 1000baseT_Full); 277 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 278 ethtool_link_ksettings_add_link_mode(ks, advertising, 279 1000baseT_Full); 280 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 281 ethtool_link_ksettings_add_link_mode(ks, supported, 282 100baseT_Full); 283 ethtool_link_ksettings_add_link_mode(ks, advertising, 284 100baseT_Full); 285 } 286 } 287 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 288 phy_types & I40E_CAP_PHY_TYPE_XFI || 289 phy_types & I40E_CAP_PHY_TYPE_SFI || 290 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 291 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 292 ethtool_link_ksettings_add_link_mode(ks, supported, 293 10000baseT_Full); 294 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 295 ethtool_link_ksettings_add_link_mode(ks, advertising, 296 10000baseT_Full); 297 } 298 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 299 ethtool_link_ksettings_add_link_mode(ks, supported, 300 10000baseT_Full); 301 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 302 ethtool_link_ksettings_add_link_mode(ks, advertising, 303 10000baseT_Full); 304 } 305 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 306 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 307 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 308 ethtool_link_ksettings_add_link_mode(ks, supported, 309 40000baseCR4_Full); 310 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 311 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 312 ethtool_link_ksettings_add_link_mode(ks, supported, 313 40000baseCR4_Full); 314 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 315 ethtool_link_ksettings_add_link_mode(ks, advertising, 316 40000baseCR4_Full); 317 } 318 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 319 ethtool_link_ksettings_add_link_mode(ks, supported, 320 100baseT_Full); 321 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 322 ethtool_link_ksettings_add_link_mode(ks, advertising, 323 100baseT_Full); 324 } 325 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 326 ethtool_link_ksettings_add_link_mode(ks, supported, 327 1000baseT_Full); 328 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 329 ethtool_link_ksettings_add_link_mode(ks, advertising, 330 1000baseT_Full); 331 } 332 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 333 ethtool_link_ksettings_add_link_mode(ks, supported, 334 40000baseSR4_Full); 335 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 336 ethtool_link_ksettings_add_link_mode(ks, supported, 337 40000baseLR4_Full); 338 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 339 ethtool_link_ksettings_add_link_mode(ks, supported, 340 40000baseLR4_Full); 341 ethtool_link_ksettings_add_link_mode(ks, advertising, 342 40000baseLR4_Full); 343 } 344 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 345 ethtool_link_ksettings_add_link_mode(ks, supported, 346 20000baseKR2_Full); 347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 348 ethtool_link_ksettings_add_link_mode(ks, advertising, 349 20000baseKR2_Full); 350 } 351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 352 ethtool_link_ksettings_add_link_mode(ks, supported, 353 10000baseKX4_Full); 354 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 355 ethtool_link_ksettings_add_link_mode(ks, advertising, 356 10000baseKX4_Full); 357 } 358 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 359 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 360 ethtool_link_ksettings_add_link_mode(ks, supported, 361 10000baseKR_Full); 362 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 363 ethtool_link_ksettings_add_link_mode(ks, advertising, 364 10000baseKR_Full); 365 } 366 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 367 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 368 ethtool_link_ksettings_add_link_mode(ks, supported, 369 1000baseKX_Full); 370 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 371 ethtool_link_ksettings_add_link_mode(ks, advertising, 372 1000baseKX_Full); 373 } 374 /* need to add 25G PHY types */ 375 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 376 ethtool_link_ksettings_add_link_mode(ks, supported, 377 25000baseKR_Full); 378 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 379 ethtool_link_ksettings_add_link_mode(ks, advertising, 380 25000baseKR_Full); 381 } 382 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 383 ethtool_link_ksettings_add_link_mode(ks, supported, 384 25000baseCR_Full); 385 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 386 ethtool_link_ksettings_add_link_mode(ks, advertising, 387 25000baseCR_Full); 388 } 389 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 390 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 391 ethtool_link_ksettings_add_link_mode(ks, supported, 392 25000baseSR_Full); 393 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 394 ethtool_link_ksettings_add_link_mode(ks, advertising, 395 25000baseSR_Full); 396 } 397 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 398 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 399 ethtool_link_ksettings_add_link_mode(ks, supported, 400 25000baseCR_Full); 401 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 402 ethtool_link_ksettings_add_link_mode(ks, advertising, 403 25000baseCR_Full); 404 } 405 /* need to add new 10G PHY types */ 406 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 407 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 408 ethtool_link_ksettings_add_link_mode(ks, supported, 409 10000baseCR_Full); 410 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 411 ethtool_link_ksettings_add_link_mode(ks, advertising, 412 10000baseCR_Full); 413 } 414 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 415 ethtool_link_ksettings_add_link_mode(ks, supported, 416 10000baseSR_Full); 417 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 418 ethtool_link_ksettings_add_link_mode(ks, advertising, 419 10000baseSR_Full); 420 } 421 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 422 ethtool_link_ksettings_add_link_mode(ks, supported, 423 10000baseLR_Full); 424 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 425 ethtool_link_ksettings_add_link_mode(ks, advertising, 426 10000baseLR_Full); 427 } 428 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 429 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 430 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 431 ethtool_link_ksettings_add_link_mode(ks, supported, 432 1000baseX_Full); 433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 434 ethtool_link_ksettings_add_link_mode(ks, advertising, 435 1000baseX_Full); 436 } 437 /* Autoneg PHY types */ 438 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 439 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 440 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 441 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 442 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 443 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 444 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 445 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 446 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 447 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 448 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 449 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 450 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 451 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 452 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 453 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 454 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 455 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 456 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 457 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 458 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 459 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 460 ethtool_link_ksettings_add_link_mode(ks, supported, 461 Autoneg); 462 ethtool_link_ksettings_add_link_mode(ks, advertising, 463 Autoneg); 464 } 465 } 466 467 /** 468 * i40e_get_settings_link_up - Get the Link settings for when link is up 469 * @hw: hw structure 470 * @ks: ethtool ksettings to fill in 471 * @netdev: network interface device structure 472 * @pf: pointer to physical function struct 473 **/ 474 static void i40e_get_settings_link_up(struct i40e_hw *hw, 475 struct ethtool_link_ksettings *ks, 476 struct net_device *netdev, 477 struct i40e_pf *pf) 478 { 479 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 480 struct ethtool_link_ksettings cap_ksettings; 481 u32 link_speed = hw_link_info->link_speed; 482 483 /* Initialize supported and advertised settings based on phy settings */ 484 switch (hw_link_info->phy_type) { 485 case I40E_PHY_TYPE_40GBASE_CR4: 486 case I40E_PHY_TYPE_40GBASE_CR4_CU: 487 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 488 ethtool_link_ksettings_add_link_mode(ks, supported, 489 40000baseCR4_Full); 490 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 491 ethtool_link_ksettings_add_link_mode(ks, advertising, 492 40000baseCR4_Full); 493 break; 494 case I40E_PHY_TYPE_XLAUI: 495 case I40E_PHY_TYPE_XLPPI: 496 case I40E_PHY_TYPE_40GBASE_AOC: 497 ethtool_link_ksettings_add_link_mode(ks, supported, 498 40000baseCR4_Full); 499 break; 500 case I40E_PHY_TYPE_40GBASE_SR4: 501 ethtool_link_ksettings_add_link_mode(ks, supported, 502 40000baseSR4_Full); 503 break; 504 case I40E_PHY_TYPE_40GBASE_LR4: 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 40000baseLR4_Full); 507 break; 508 case I40E_PHY_TYPE_25GBASE_SR: 509 case I40E_PHY_TYPE_25GBASE_LR: 510 case I40E_PHY_TYPE_10GBASE_SR: 511 case I40E_PHY_TYPE_10GBASE_LR: 512 case I40E_PHY_TYPE_1000BASE_SX: 513 case I40E_PHY_TYPE_1000BASE_LX: 514 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 515 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 516 ethtool_link_ksettings_add_link_mode(ks, supported, 517 25000baseSR_Full); 518 ethtool_link_ksettings_add_link_mode(ks, advertising, 519 25000baseSR_Full); 520 ethtool_link_ksettings_add_link_mode(ks, supported, 521 10000baseSR_Full); 522 ethtool_link_ksettings_add_link_mode(ks, advertising, 523 10000baseSR_Full); 524 ethtool_link_ksettings_add_link_mode(ks, supported, 525 10000baseLR_Full); 526 ethtool_link_ksettings_add_link_mode(ks, advertising, 527 10000baseLR_Full); 528 ethtool_link_ksettings_add_link_mode(ks, supported, 529 1000baseX_Full); 530 ethtool_link_ksettings_add_link_mode(ks, advertising, 531 1000baseX_Full); 532 ethtool_link_ksettings_add_link_mode(ks, supported, 533 10000baseT_Full); 534 if (hw_link_info->module_type[2] & 535 I40E_MODULE_TYPE_1000BASE_SX || 536 hw_link_info->module_type[2] & 537 I40E_MODULE_TYPE_1000BASE_LX) { 538 ethtool_link_ksettings_add_link_mode(ks, supported, 539 1000baseT_Full); 540 if (hw_link_info->requested_speeds & 541 I40E_LINK_SPEED_1GB) 542 ethtool_link_ksettings_add_link_mode( 543 ks, advertising, 1000baseT_Full); 544 } 545 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 546 ethtool_link_ksettings_add_link_mode(ks, advertising, 547 10000baseT_Full); 548 break; 549 case I40E_PHY_TYPE_10GBASE_T: 550 case I40E_PHY_TYPE_1000BASE_T: 551 case I40E_PHY_TYPE_100BASE_TX: 552 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 553 ethtool_link_ksettings_add_link_mode(ks, supported, 554 10000baseT_Full); 555 ethtool_link_ksettings_add_link_mode(ks, supported, 556 1000baseT_Full); 557 ethtool_link_ksettings_add_link_mode(ks, supported, 558 100baseT_Full); 559 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 560 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 561 ethtool_link_ksettings_add_link_mode(ks, advertising, 562 10000baseT_Full); 563 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 564 ethtool_link_ksettings_add_link_mode(ks, advertising, 565 1000baseT_Full); 566 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 567 ethtool_link_ksettings_add_link_mode(ks, advertising, 568 100baseT_Full); 569 break; 570 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 571 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 572 ethtool_link_ksettings_add_link_mode(ks, supported, 573 1000baseT_Full); 574 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 575 ethtool_link_ksettings_add_link_mode(ks, advertising, 576 1000baseT_Full); 577 break; 578 case I40E_PHY_TYPE_10GBASE_CR1_CU: 579 case I40E_PHY_TYPE_10GBASE_CR1: 580 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 581 ethtool_link_ksettings_add_link_mode(ks, supported, 582 10000baseT_Full); 583 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 584 ethtool_link_ksettings_add_link_mode(ks, advertising, 585 10000baseT_Full); 586 break; 587 case I40E_PHY_TYPE_XAUI: 588 case I40E_PHY_TYPE_XFI: 589 case I40E_PHY_TYPE_SFI: 590 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 591 case I40E_PHY_TYPE_10GBASE_AOC: 592 ethtool_link_ksettings_add_link_mode(ks, supported, 593 10000baseT_Full); 594 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 595 ethtool_link_ksettings_add_link_mode(ks, advertising, 596 10000baseT_Full); 597 break; 598 case I40E_PHY_TYPE_SGMII: 599 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 600 ethtool_link_ksettings_add_link_mode(ks, supported, 601 1000baseT_Full); 602 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 603 ethtool_link_ksettings_add_link_mode(ks, advertising, 604 1000baseT_Full); 605 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 606 ethtool_link_ksettings_add_link_mode(ks, supported, 607 100baseT_Full); 608 if (hw_link_info->requested_speeds & 609 I40E_LINK_SPEED_100MB) 610 ethtool_link_ksettings_add_link_mode( 611 ks, advertising, 100baseT_Full); 612 } 613 break; 614 case I40E_PHY_TYPE_40GBASE_KR4: 615 case I40E_PHY_TYPE_25GBASE_KR: 616 case I40E_PHY_TYPE_20GBASE_KR2: 617 case I40E_PHY_TYPE_10GBASE_KR: 618 case I40E_PHY_TYPE_10GBASE_KX4: 619 case I40E_PHY_TYPE_1000BASE_KX: 620 ethtool_link_ksettings_add_link_mode(ks, supported, 621 40000baseKR4_Full); 622 ethtool_link_ksettings_add_link_mode(ks, supported, 623 25000baseKR_Full); 624 ethtool_link_ksettings_add_link_mode(ks, supported, 625 20000baseKR2_Full); 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 10000baseKR_Full); 628 ethtool_link_ksettings_add_link_mode(ks, supported, 629 10000baseKX4_Full); 630 ethtool_link_ksettings_add_link_mode(ks, supported, 631 1000baseKX_Full); 632 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 633 ethtool_link_ksettings_add_link_mode(ks, advertising, 634 40000baseKR4_Full); 635 ethtool_link_ksettings_add_link_mode(ks, advertising, 636 25000baseKR_Full); 637 ethtool_link_ksettings_add_link_mode(ks, advertising, 638 20000baseKR2_Full); 639 ethtool_link_ksettings_add_link_mode(ks, advertising, 640 10000baseKR_Full); 641 ethtool_link_ksettings_add_link_mode(ks, advertising, 642 10000baseKX4_Full); 643 ethtool_link_ksettings_add_link_mode(ks, advertising, 644 1000baseKX_Full); 645 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 646 break; 647 case I40E_PHY_TYPE_25GBASE_CR: 648 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 649 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 650 ethtool_link_ksettings_add_link_mode(ks, supported, 651 25000baseCR_Full); 652 ethtool_link_ksettings_add_link_mode(ks, advertising, 653 25000baseCR_Full); 654 break; 655 case I40E_PHY_TYPE_25GBASE_AOC: 656 case I40E_PHY_TYPE_25GBASE_ACC: 657 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 658 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 659 ethtool_link_ksettings_add_link_mode(ks, supported, 660 25000baseCR_Full); 661 662 ethtool_link_ksettings_add_link_mode(ks, advertising, 663 25000baseCR_Full); 664 ethtool_link_ksettings_add_link_mode(ks, supported, 665 10000baseCR_Full); 666 ethtool_link_ksettings_add_link_mode(ks, advertising, 667 10000baseCR_Full); 668 break; 669 default: 670 /* if we got here and link is up something bad is afoot */ 671 netdev_info(netdev, 672 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 673 hw_link_info->phy_type); 674 } 675 676 /* Now that we've worked out everything that could be supported by the 677 * current PHY type, get what is supported by the NVM and intersect 678 * them to get what is truly supported 679 */ 680 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 681 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 682 ethtool_intersect_link_masks(ks, &cap_ksettings); 683 684 /* Set speed and duplex */ 685 switch (link_speed) { 686 case I40E_LINK_SPEED_40GB: 687 ks->base.speed = SPEED_40000; 688 break; 689 case I40E_LINK_SPEED_25GB: 690 ks->base.speed = SPEED_25000; 691 break; 692 case I40E_LINK_SPEED_20GB: 693 ks->base.speed = SPEED_20000; 694 break; 695 case I40E_LINK_SPEED_10GB: 696 ks->base.speed = SPEED_10000; 697 break; 698 case I40E_LINK_SPEED_1GB: 699 ks->base.speed = SPEED_1000; 700 break; 701 case I40E_LINK_SPEED_100MB: 702 ks->base.speed = SPEED_100; 703 break; 704 default: 705 break; 706 } 707 ks->base.duplex = DUPLEX_FULL; 708 } 709 710 /** 711 * i40e_get_settings_link_down - Get the Link settings for when link is down 712 * @hw: hw structure 713 * @ks: ethtool ksettings to fill in 714 * @pf: pointer to physical function struct 715 * 716 * Reports link settings that can be determined when link is down 717 **/ 718 static void i40e_get_settings_link_down(struct i40e_hw *hw, 719 struct ethtool_link_ksettings *ks, 720 struct i40e_pf *pf) 721 { 722 /* link is down and the driver needs to fall back on 723 * supported phy types to figure out what info to display 724 */ 725 i40e_phy_type_to_ethtool(pf, ks); 726 727 /* With no link speed and duplex are unknown */ 728 ks->base.speed = SPEED_UNKNOWN; 729 ks->base.duplex = DUPLEX_UNKNOWN; 730 } 731 732 /** 733 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 734 * @netdev: network interface device structure 735 * @ks: ethtool ksettings 736 * 737 * Reports speed/duplex settings based on media_type 738 **/ 739 static int i40e_get_link_ksettings(struct net_device *netdev, 740 struct ethtool_link_ksettings *ks) 741 { 742 struct i40e_netdev_priv *np = netdev_priv(netdev); 743 struct i40e_pf *pf = np->vsi->back; 744 struct i40e_hw *hw = &pf->hw; 745 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 746 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 747 748 ethtool_link_ksettings_zero_link_mode(ks, supported); 749 ethtool_link_ksettings_zero_link_mode(ks, advertising); 750 751 if (link_up) 752 i40e_get_settings_link_up(hw, ks, netdev, pf); 753 else 754 i40e_get_settings_link_down(hw, ks, pf); 755 756 /* Now set the settings that don't rely on link being up/down */ 757 /* Set autoneg settings */ 758 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 759 AUTONEG_ENABLE : AUTONEG_DISABLE); 760 761 /* Set media type settings */ 762 switch (hw->phy.media_type) { 763 case I40E_MEDIA_TYPE_BACKPLANE: 764 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 765 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 766 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 767 ethtool_link_ksettings_add_link_mode(ks, advertising, 768 Backplane); 769 ks->base.port = PORT_NONE; 770 break; 771 case I40E_MEDIA_TYPE_BASET: 772 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 773 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 774 ks->base.port = PORT_TP; 775 break; 776 case I40E_MEDIA_TYPE_DA: 777 case I40E_MEDIA_TYPE_CX4: 778 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 779 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 780 ks->base.port = PORT_DA; 781 break; 782 case I40E_MEDIA_TYPE_FIBER: 783 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 784 ks->base.port = PORT_FIBRE; 785 break; 786 case I40E_MEDIA_TYPE_UNKNOWN: 787 default: 788 ks->base.port = PORT_OTHER; 789 break; 790 } 791 792 /* Set flow control settings */ 793 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 794 795 switch (hw->fc.requested_mode) { 796 case I40E_FC_FULL: 797 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 798 break; 799 case I40E_FC_TX_PAUSE: 800 ethtool_link_ksettings_add_link_mode(ks, advertising, 801 Asym_Pause); 802 break; 803 case I40E_FC_RX_PAUSE: 804 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 805 ethtool_link_ksettings_add_link_mode(ks, advertising, 806 Asym_Pause); 807 break; 808 default: 809 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 810 ethtool_link_ksettings_del_link_mode(ks, advertising, 811 Asym_Pause); 812 break; 813 } 814 815 return 0; 816 } 817 818 /** 819 * i40e_set_link_ksettings - Set Speed and Duplex 820 * @netdev: network interface device structure 821 * @ks: ethtool ksettings 822 * 823 * Set speed/duplex per media_types advertised/forced 824 **/ 825 static int i40e_set_link_ksettings(struct net_device *netdev, 826 const struct ethtool_link_ksettings *ks) 827 { 828 struct i40e_netdev_priv *np = netdev_priv(netdev); 829 struct i40e_aq_get_phy_abilities_resp abilities; 830 struct ethtool_link_ksettings safe_ks; 831 struct ethtool_link_ksettings copy_ks; 832 struct i40e_aq_set_phy_config config; 833 struct i40e_pf *pf = np->vsi->back; 834 struct i40e_vsi *vsi = np->vsi; 835 struct i40e_hw *hw = &pf->hw; 836 bool autoneg_changed = false; 837 i40e_status status = 0; 838 int timeout = 50; 839 int err = 0; 840 u8 autoneg; 841 842 /* Changing port settings is not supported if this isn't the 843 * port's controlling PF 844 */ 845 if (hw->partition_id != 1) { 846 i40e_partition_setting_complaint(pf); 847 return -EOPNOTSUPP; 848 } 849 if (vsi != pf->vsi[pf->lan_vsi]) 850 return -EOPNOTSUPP; 851 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 852 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 853 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 854 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 855 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 856 return -EOPNOTSUPP; 857 if (hw->device_id == I40E_DEV_ID_KX_B || 858 hw->device_id == I40E_DEV_ID_KX_C || 859 hw->device_id == I40E_DEV_ID_20G_KR2 || 860 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 861 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 862 return -EOPNOTSUPP; 863 } 864 865 /* copy the ksettings to copy_ks to avoid modifying the origin */ 866 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 867 868 /* save autoneg out of ksettings */ 869 autoneg = copy_ks.base.autoneg; 870 871 memset(&safe_ks, 0, sizeof(safe_ks)); 872 /* Get link modes supported by hardware and check against modes 873 * requested by the user. Return an error if unsupported mode was set. 874 */ 875 i40e_phy_type_to_ethtool(pf, &safe_ks); 876 if (!bitmap_subset(copy_ks.link_modes.advertising, 877 safe_ks.link_modes.supported, 878 __ETHTOOL_LINK_MODE_MASK_NBITS)) 879 return -EINVAL; 880 881 /* get our own copy of the bits to check against */ 882 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 883 safe_ks.base.cmd = copy_ks.base.cmd; 884 safe_ks.base.link_mode_masks_nwords = 885 copy_ks.base.link_mode_masks_nwords; 886 i40e_get_link_ksettings(netdev, &safe_ks); 887 888 /* set autoneg back to what it currently is */ 889 copy_ks.base.autoneg = safe_ks.base.autoneg; 890 891 /* If copy_ks.base and safe_ks.base are not the same now, then they are 892 * trying to set something that we do not support. 893 */ 894 if (memcmp(©_ks.base, &safe_ks.base, 895 sizeof(struct ethtool_link_settings))) 896 return -EOPNOTSUPP; 897 898 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 899 timeout--; 900 if (!timeout) 901 return -EBUSY; 902 usleep_range(1000, 2000); 903 } 904 905 /* Get the current phy config */ 906 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 907 NULL); 908 if (status) { 909 err = -EAGAIN; 910 goto done; 911 } 912 913 /* Copy abilities to config in case autoneg is not 914 * set below 915 */ 916 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 917 config.abilities = abilities.abilities; 918 919 /* Check autoneg */ 920 if (autoneg == AUTONEG_ENABLE) { 921 /* If autoneg was not already enabled */ 922 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 923 /* If autoneg is not supported, return error */ 924 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 925 supported, 926 Autoneg)) { 927 netdev_info(netdev, "Autoneg not supported on this phy\n"); 928 err = -EINVAL; 929 goto done; 930 } 931 /* Autoneg is allowed to change */ 932 config.abilities = abilities.abilities | 933 I40E_AQ_PHY_ENABLE_AN; 934 autoneg_changed = true; 935 } 936 } else { 937 /* If autoneg is currently enabled */ 938 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 939 /* If autoneg is supported 10GBASE_T is the only PHY 940 * that can disable it, so otherwise return error 941 */ 942 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 943 supported, 944 Autoneg) && 945 hw->phy.link_info.phy_type != 946 I40E_PHY_TYPE_10GBASE_T) { 947 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 948 err = -EINVAL; 949 goto done; 950 } 951 /* Autoneg is allowed to change */ 952 config.abilities = abilities.abilities & 953 ~I40E_AQ_PHY_ENABLE_AN; 954 autoneg_changed = true; 955 } 956 } 957 958 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 959 100baseT_Full)) 960 config.link_speed |= I40E_LINK_SPEED_100MB; 961 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 962 1000baseT_Full) || 963 ethtool_link_ksettings_test_link_mode(ks, advertising, 964 1000baseX_Full) || 965 ethtool_link_ksettings_test_link_mode(ks, advertising, 966 1000baseKX_Full)) 967 config.link_speed |= I40E_LINK_SPEED_1GB; 968 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 969 10000baseT_Full) || 970 ethtool_link_ksettings_test_link_mode(ks, advertising, 971 10000baseKX4_Full) || 972 ethtool_link_ksettings_test_link_mode(ks, advertising, 973 10000baseKR_Full) || 974 ethtool_link_ksettings_test_link_mode(ks, advertising, 975 10000baseCR_Full) || 976 ethtool_link_ksettings_test_link_mode(ks, advertising, 977 10000baseSR_Full)) 978 config.link_speed |= I40E_LINK_SPEED_10GB; 979 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 980 20000baseKR2_Full)) 981 config.link_speed |= I40E_LINK_SPEED_20GB; 982 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 983 25000baseCR_Full) || 984 ethtool_link_ksettings_test_link_mode(ks, advertising, 985 25000baseKR_Full) || 986 ethtool_link_ksettings_test_link_mode(ks, advertising, 987 25000baseSR_Full)) 988 config.link_speed |= I40E_LINK_SPEED_25GB; 989 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 990 40000baseKR4_Full) || 991 ethtool_link_ksettings_test_link_mode(ks, advertising, 992 40000baseCR4_Full) || 993 ethtool_link_ksettings_test_link_mode(ks, advertising, 994 40000baseSR4_Full) || 995 ethtool_link_ksettings_test_link_mode(ks, advertising, 996 40000baseLR4_Full)) 997 config.link_speed |= I40E_LINK_SPEED_40GB; 998 999 /* If speed didn't get set, set it to what it currently is. 1000 * This is needed because if advertise is 0 (as it is when autoneg 1001 * is disabled) then speed won't get set. 1002 */ 1003 if (!config.link_speed) 1004 config.link_speed = abilities.link_speed; 1005 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1006 /* copy over the rest of the abilities */ 1007 config.phy_type = abilities.phy_type; 1008 config.phy_type_ext = abilities.phy_type_ext; 1009 config.eee_capability = abilities.eee_capability; 1010 config.eeer = abilities.eeer_val; 1011 config.low_power_ctrl = abilities.d3_lpan; 1012 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1013 I40E_AQ_PHY_FEC_CONFIG_MASK; 1014 1015 /* save the requested speeds */ 1016 hw->phy.link_info.requested_speeds = config.link_speed; 1017 /* set link and auto negotiation so changes take effect */ 1018 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1019 /* If link is up put link down */ 1020 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1021 /* Tell the OS link is going down, the link will go 1022 * back up when fw says it is ready asynchronously 1023 */ 1024 i40e_print_link_message(vsi, false); 1025 netif_carrier_off(netdev); 1026 netif_tx_stop_all_queues(netdev); 1027 } 1028 1029 /* make the aq call */ 1030 status = i40e_aq_set_phy_config(hw, &config, NULL); 1031 if (status) { 1032 netdev_info(netdev, 1033 "Set phy config failed, err %s aq_err %s\n", 1034 i40e_stat_str(hw, status), 1035 i40e_aq_str(hw, hw->aq.asq_last_status)); 1036 err = -EAGAIN; 1037 goto done; 1038 } 1039 1040 status = i40e_update_link_info(hw); 1041 if (status) 1042 netdev_dbg(netdev, 1043 "Updating link info failed with err %s aq_err %s\n", 1044 i40e_stat_str(hw, status), 1045 i40e_aq_str(hw, hw->aq.asq_last_status)); 1046 1047 } else { 1048 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1049 } 1050 1051 done: 1052 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1053 1054 return err; 1055 } 1056 1057 static int i40e_nway_reset(struct net_device *netdev) 1058 { 1059 /* restart autonegotiation */ 1060 struct i40e_netdev_priv *np = netdev_priv(netdev); 1061 struct i40e_pf *pf = np->vsi->back; 1062 struct i40e_hw *hw = &pf->hw; 1063 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1064 i40e_status ret = 0; 1065 1066 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1067 if (ret) { 1068 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1069 i40e_stat_str(hw, ret), 1070 i40e_aq_str(hw, hw->aq.asq_last_status)); 1071 return -EIO; 1072 } 1073 1074 return 0; 1075 } 1076 1077 /** 1078 * i40e_get_pauseparam - Get Flow Control status 1079 * Return tx/rx-pause status 1080 **/ 1081 static void i40e_get_pauseparam(struct net_device *netdev, 1082 struct ethtool_pauseparam *pause) 1083 { 1084 struct i40e_netdev_priv *np = netdev_priv(netdev); 1085 struct i40e_pf *pf = np->vsi->back; 1086 struct i40e_hw *hw = &pf->hw; 1087 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1088 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1089 1090 pause->autoneg = 1091 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1092 AUTONEG_ENABLE : AUTONEG_DISABLE); 1093 1094 /* PFC enabled so report LFC as off */ 1095 if (dcbx_cfg->pfc.pfcenable) { 1096 pause->rx_pause = 0; 1097 pause->tx_pause = 0; 1098 return; 1099 } 1100 1101 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1102 pause->rx_pause = 1; 1103 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1104 pause->tx_pause = 1; 1105 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1106 pause->rx_pause = 1; 1107 pause->tx_pause = 1; 1108 } 1109 } 1110 1111 /** 1112 * i40e_set_pauseparam - Set Flow Control parameter 1113 * @netdev: network interface device structure 1114 * @pause: return tx/rx flow control status 1115 **/ 1116 static int i40e_set_pauseparam(struct net_device *netdev, 1117 struct ethtool_pauseparam *pause) 1118 { 1119 struct i40e_netdev_priv *np = netdev_priv(netdev); 1120 struct i40e_pf *pf = np->vsi->back; 1121 struct i40e_vsi *vsi = np->vsi; 1122 struct i40e_hw *hw = &pf->hw; 1123 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1124 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1125 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1126 i40e_status status; 1127 u8 aq_failures; 1128 int err = 0; 1129 1130 /* Changing the port's flow control is not supported if this isn't the 1131 * port's controlling PF 1132 */ 1133 if (hw->partition_id != 1) { 1134 i40e_partition_setting_complaint(pf); 1135 return -EOPNOTSUPP; 1136 } 1137 1138 if (vsi != pf->vsi[pf->lan_vsi]) 1139 return -EOPNOTSUPP; 1140 1141 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1142 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1143 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1144 return -EOPNOTSUPP; 1145 } 1146 1147 /* If we have link and don't have autoneg */ 1148 if (!test_bit(__I40E_DOWN, pf->state) && 1149 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1150 /* Send message that it might not necessarily work*/ 1151 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1152 } 1153 1154 if (dcbx_cfg->pfc.pfcenable) { 1155 netdev_info(netdev, 1156 "Priority flow control enabled. Cannot set link flow control.\n"); 1157 return -EOPNOTSUPP; 1158 } 1159 1160 if (pause->rx_pause && pause->tx_pause) 1161 hw->fc.requested_mode = I40E_FC_FULL; 1162 else if (pause->rx_pause && !pause->tx_pause) 1163 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1164 else if (!pause->rx_pause && pause->tx_pause) 1165 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1166 else if (!pause->rx_pause && !pause->tx_pause) 1167 hw->fc.requested_mode = I40E_FC_NONE; 1168 else 1169 return -EINVAL; 1170 1171 /* Tell the OS link is going down, the link will go back up when fw 1172 * says it is ready asynchronously 1173 */ 1174 i40e_print_link_message(vsi, false); 1175 netif_carrier_off(netdev); 1176 netif_tx_stop_all_queues(netdev); 1177 1178 /* Set the fc mode and only restart an if link is up*/ 1179 status = i40e_set_fc(hw, &aq_failures, link_up); 1180 1181 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1182 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1183 i40e_stat_str(hw, status), 1184 i40e_aq_str(hw, hw->aq.asq_last_status)); 1185 err = -EAGAIN; 1186 } 1187 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1188 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1189 i40e_stat_str(hw, status), 1190 i40e_aq_str(hw, hw->aq.asq_last_status)); 1191 err = -EAGAIN; 1192 } 1193 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1194 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1195 i40e_stat_str(hw, status), 1196 i40e_aq_str(hw, hw->aq.asq_last_status)); 1197 err = -EAGAIN; 1198 } 1199 1200 if (!test_bit(__I40E_DOWN, pf->state)) { 1201 /* Give it a little more time to try to come back */ 1202 msleep(75); 1203 if (!test_bit(__I40E_DOWN, pf->state)) 1204 return i40e_nway_reset(netdev); 1205 } 1206 1207 return err; 1208 } 1209 1210 static u32 i40e_get_msglevel(struct net_device *netdev) 1211 { 1212 struct i40e_netdev_priv *np = netdev_priv(netdev); 1213 struct i40e_pf *pf = np->vsi->back; 1214 u32 debug_mask = pf->hw.debug_mask; 1215 1216 if (debug_mask) 1217 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1218 1219 return pf->msg_enable; 1220 } 1221 1222 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1223 { 1224 struct i40e_netdev_priv *np = netdev_priv(netdev); 1225 struct i40e_pf *pf = np->vsi->back; 1226 1227 if (I40E_DEBUG_USER & data) 1228 pf->hw.debug_mask = data; 1229 else 1230 pf->msg_enable = data; 1231 } 1232 1233 static int i40e_get_regs_len(struct net_device *netdev) 1234 { 1235 int reg_count = 0; 1236 int i; 1237 1238 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1239 reg_count += i40e_reg_list[i].elements; 1240 1241 return reg_count * sizeof(u32); 1242 } 1243 1244 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1245 void *p) 1246 { 1247 struct i40e_netdev_priv *np = netdev_priv(netdev); 1248 struct i40e_pf *pf = np->vsi->back; 1249 struct i40e_hw *hw = &pf->hw; 1250 u32 *reg_buf = p; 1251 unsigned int i, j, ri; 1252 u32 reg; 1253 1254 /* Tell ethtool which driver-version-specific regs output we have. 1255 * 1256 * At some point, if we have ethtool doing special formatting of 1257 * this data, it will rely on this version number to know how to 1258 * interpret things. Hence, this needs to be updated if/when the 1259 * diags register table is changed. 1260 */ 1261 regs->version = 1; 1262 1263 /* loop through the diags reg table for what to print */ 1264 ri = 0; 1265 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1266 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1267 reg = i40e_reg_list[i].offset 1268 + (j * i40e_reg_list[i].stride); 1269 reg_buf[ri++] = rd32(hw, reg); 1270 } 1271 } 1272 1273 } 1274 1275 static int i40e_get_eeprom(struct net_device *netdev, 1276 struct ethtool_eeprom *eeprom, u8 *bytes) 1277 { 1278 struct i40e_netdev_priv *np = netdev_priv(netdev); 1279 struct i40e_hw *hw = &np->vsi->back->hw; 1280 struct i40e_pf *pf = np->vsi->back; 1281 int ret_val = 0, len, offset; 1282 u8 *eeprom_buff; 1283 u16 i, sectors; 1284 bool last; 1285 u32 magic; 1286 1287 #define I40E_NVM_SECTOR_SIZE 4096 1288 if (eeprom->len == 0) 1289 return -EINVAL; 1290 1291 /* check for NVMUpdate access method */ 1292 magic = hw->vendor_id | (hw->device_id << 16); 1293 if (eeprom->magic && eeprom->magic != magic) { 1294 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1295 int errno = 0; 1296 1297 /* make sure it is the right magic for NVMUpdate */ 1298 if ((eeprom->magic >> 16) != hw->device_id) 1299 errno = -EINVAL; 1300 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1301 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1302 errno = -EBUSY; 1303 else 1304 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1305 1306 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1307 dev_info(&pf->pdev->dev, 1308 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1309 ret_val, hw->aq.asq_last_status, errno, 1310 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1311 cmd->offset, cmd->data_size); 1312 1313 return errno; 1314 } 1315 1316 /* normal ethtool get_eeprom support */ 1317 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1318 1319 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1320 if (!eeprom_buff) 1321 return -ENOMEM; 1322 1323 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1324 if (ret_val) { 1325 dev_info(&pf->pdev->dev, 1326 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1327 ret_val, hw->aq.asq_last_status); 1328 goto free_buff; 1329 } 1330 1331 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1332 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1333 len = I40E_NVM_SECTOR_SIZE; 1334 last = false; 1335 for (i = 0; i < sectors; i++) { 1336 if (i == (sectors - 1)) { 1337 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1338 last = true; 1339 } 1340 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1341 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1342 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1343 last, NULL); 1344 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1345 dev_info(&pf->pdev->dev, 1346 "read NVM failed, invalid offset 0x%x\n", 1347 offset); 1348 break; 1349 } else if (ret_val && 1350 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1351 dev_info(&pf->pdev->dev, 1352 "read NVM failed, access, offset 0x%x\n", 1353 offset); 1354 break; 1355 } else if (ret_val) { 1356 dev_info(&pf->pdev->dev, 1357 "read NVM failed offset %d err=%d status=0x%x\n", 1358 offset, ret_val, hw->aq.asq_last_status); 1359 break; 1360 } 1361 } 1362 1363 i40e_release_nvm(hw); 1364 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1365 free_buff: 1366 kfree(eeprom_buff); 1367 return ret_val; 1368 } 1369 1370 static int i40e_get_eeprom_len(struct net_device *netdev) 1371 { 1372 struct i40e_netdev_priv *np = netdev_priv(netdev); 1373 struct i40e_hw *hw = &np->vsi->back->hw; 1374 u32 val; 1375 1376 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1377 if (hw->mac.type == I40E_MAC_X722) { 1378 val = X722_EEPROM_SCOPE_LIMIT + 1; 1379 return val; 1380 } 1381 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1382 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1383 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1384 /* register returns value in power of 2, 64Kbyte chunks. */ 1385 val = (64 * 1024) * BIT(val); 1386 return val; 1387 } 1388 1389 static int i40e_set_eeprom(struct net_device *netdev, 1390 struct ethtool_eeprom *eeprom, u8 *bytes) 1391 { 1392 struct i40e_netdev_priv *np = netdev_priv(netdev); 1393 struct i40e_hw *hw = &np->vsi->back->hw; 1394 struct i40e_pf *pf = np->vsi->back; 1395 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1396 int ret_val = 0; 1397 int errno = 0; 1398 u32 magic; 1399 1400 /* normal ethtool set_eeprom is not supported */ 1401 magic = hw->vendor_id | (hw->device_id << 16); 1402 if (eeprom->magic == magic) 1403 errno = -EOPNOTSUPP; 1404 /* check for NVMUpdate access method */ 1405 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1406 errno = -EINVAL; 1407 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1408 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1409 errno = -EBUSY; 1410 else 1411 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1412 1413 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1414 dev_info(&pf->pdev->dev, 1415 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1416 ret_val, hw->aq.asq_last_status, errno, 1417 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1418 cmd->offset, cmd->data_size); 1419 1420 return errno; 1421 } 1422 1423 static void i40e_get_drvinfo(struct net_device *netdev, 1424 struct ethtool_drvinfo *drvinfo) 1425 { 1426 struct i40e_netdev_priv *np = netdev_priv(netdev); 1427 struct i40e_vsi *vsi = np->vsi; 1428 struct i40e_pf *pf = vsi->back; 1429 1430 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1431 strlcpy(drvinfo->version, i40e_driver_version_str, 1432 sizeof(drvinfo->version)); 1433 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1434 sizeof(drvinfo->fw_version)); 1435 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1436 sizeof(drvinfo->bus_info)); 1437 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1438 if (pf->hw.pf_id == 0) 1439 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1440 } 1441 1442 static void i40e_get_ringparam(struct net_device *netdev, 1443 struct ethtool_ringparam *ring) 1444 { 1445 struct i40e_netdev_priv *np = netdev_priv(netdev); 1446 struct i40e_pf *pf = np->vsi->back; 1447 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1448 1449 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1450 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1451 ring->rx_mini_max_pending = 0; 1452 ring->rx_jumbo_max_pending = 0; 1453 ring->rx_pending = vsi->rx_rings[0]->count; 1454 ring->tx_pending = vsi->tx_rings[0]->count; 1455 ring->rx_mini_pending = 0; 1456 ring->rx_jumbo_pending = 0; 1457 } 1458 1459 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1460 { 1461 if (i40e_enabled_xdp_vsi(vsi)) { 1462 return index < vsi->num_queue_pairs || 1463 (index >= vsi->alloc_queue_pairs && 1464 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1465 } 1466 1467 return index < vsi->num_queue_pairs; 1468 } 1469 1470 static int i40e_set_ringparam(struct net_device *netdev, 1471 struct ethtool_ringparam *ring) 1472 { 1473 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1474 struct i40e_netdev_priv *np = netdev_priv(netdev); 1475 struct i40e_hw *hw = &np->vsi->back->hw; 1476 struct i40e_vsi *vsi = np->vsi; 1477 struct i40e_pf *pf = vsi->back; 1478 u32 new_rx_count, new_tx_count; 1479 u16 tx_alloc_queue_pairs; 1480 int timeout = 50; 1481 int i, err = 0; 1482 1483 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1484 return -EINVAL; 1485 1486 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1487 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1488 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1489 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1490 netdev_info(netdev, 1491 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1492 ring->tx_pending, ring->rx_pending, 1493 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1494 return -EINVAL; 1495 } 1496 1497 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1498 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1499 1500 /* if nothing to do return success */ 1501 if ((new_tx_count == vsi->tx_rings[0]->count) && 1502 (new_rx_count == vsi->rx_rings[0]->count)) 1503 return 0; 1504 1505 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1506 timeout--; 1507 if (!timeout) 1508 return -EBUSY; 1509 usleep_range(1000, 2000); 1510 } 1511 1512 if (!netif_running(vsi->netdev)) { 1513 /* simple case - set for the next time the netdev is started */ 1514 for (i = 0; i < vsi->num_queue_pairs; i++) { 1515 vsi->tx_rings[i]->count = new_tx_count; 1516 vsi->rx_rings[i]->count = new_rx_count; 1517 if (i40e_enabled_xdp_vsi(vsi)) 1518 vsi->xdp_rings[i]->count = new_tx_count; 1519 } 1520 goto done; 1521 } 1522 1523 /* We can't just free everything and then setup again, 1524 * because the ISRs in MSI-X mode get passed pointers 1525 * to the Tx and Rx ring structs. 1526 */ 1527 1528 /* alloc updated Tx and XDP Tx resources */ 1529 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1530 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1531 if (new_tx_count != vsi->tx_rings[0]->count) { 1532 netdev_info(netdev, 1533 "Changing Tx descriptor count from %d to %d.\n", 1534 vsi->tx_rings[0]->count, new_tx_count); 1535 tx_rings = kcalloc(tx_alloc_queue_pairs, 1536 sizeof(struct i40e_ring), GFP_KERNEL); 1537 if (!tx_rings) { 1538 err = -ENOMEM; 1539 goto done; 1540 } 1541 1542 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1543 if (!i40e_active_tx_ring_index(vsi, i)) 1544 continue; 1545 1546 tx_rings[i] = *vsi->tx_rings[i]; 1547 tx_rings[i].count = new_tx_count; 1548 /* the desc and bi pointers will be reallocated in the 1549 * setup call 1550 */ 1551 tx_rings[i].desc = NULL; 1552 tx_rings[i].rx_bi = NULL; 1553 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1554 if (err) { 1555 while (i) { 1556 i--; 1557 if (!i40e_active_tx_ring_index(vsi, i)) 1558 continue; 1559 i40e_free_tx_resources(&tx_rings[i]); 1560 } 1561 kfree(tx_rings); 1562 tx_rings = NULL; 1563 1564 goto done; 1565 } 1566 } 1567 } 1568 1569 /* alloc updated Rx resources */ 1570 if (new_rx_count != vsi->rx_rings[0]->count) { 1571 netdev_info(netdev, 1572 "Changing Rx descriptor count from %d to %d\n", 1573 vsi->rx_rings[0]->count, new_rx_count); 1574 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1575 sizeof(struct i40e_ring), GFP_KERNEL); 1576 if (!rx_rings) { 1577 err = -ENOMEM; 1578 goto free_tx; 1579 } 1580 1581 for (i = 0; i < vsi->num_queue_pairs; i++) { 1582 struct i40e_ring *ring; 1583 u16 unused; 1584 1585 /* clone ring and setup updated count */ 1586 rx_rings[i] = *vsi->rx_rings[i]; 1587 rx_rings[i].count = new_rx_count; 1588 /* the desc and bi pointers will be reallocated in the 1589 * setup call 1590 */ 1591 rx_rings[i].desc = NULL; 1592 rx_rings[i].rx_bi = NULL; 1593 /* Clear cloned XDP RX-queue info before setup call */ 1594 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1595 /* this is to allow wr32 to have something to write to 1596 * during early allocation of Rx buffers 1597 */ 1598 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1599 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1600 if (err) 1601 goto rx_unwind; 1602 1603 /* now allocate the Rx buffers to make sure the OS 1604 * has enough memory, any failure here means abort 1605 */ 1606 ring = &rx_rings[i]; 1607 unused = I40E_DESC_UNUSED(ring); 1608 err = i40e_alloc_rx_buffers(ring, unused); 1609 rx_unwind: 1610 if (err) { 1611 do { 1612 i40e_free_rx_resources(&rx_rings[i]); 1613 } while (i--); 1614 kfree(rx_rings); 1615 rx_rings = NULL; 1616 1617 goto free_tx; 1618 } 1619 } 1620 } 1621 1622 /* Bring interface down, copy in the new ring info, 1623 * then restore the interface 1624 */ 1625 i40e_down(vsi); 1626 1627 if (tx_rings) { 1628 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1629 if (i40e_active_tx_ring_index(vsi, i)) { 1630 i40e_free_tx_resources(vsi->tx_rings[i]); 1631 *vsi->tx_rings[i] = tx_rings[i]; 1632 } 1633 } 1634 kfree(tx_rings); 1635 tx_rings = NULL; 1636 } 1637 1638 if (rx_rings) { 1639 for (i = 0; i < vsi->num_queue_pairs; i++) { 1640 i40e_free_rx_resources(vsi->rx_rings[i]); 1641 /* get the real tail offset */ 1642 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1643 /* this is to fake out the allocation routine 1644 * into thinking it has to realloc everything 1645 * but the recycling logic will let us re-use 1646 * the buffers allocated above 1647 */ 1648 rx_rings[i].next_to_use = 0; 1649 rx_rings[i].next_to_clean = 0; 1650 rx_rings[i].next_to_alloc = 0; 1651 /* do a struct copy */ 1652 *vsi->rx_rings[i] = rx_rings[i]; 1653 } 1654 kfree(rx_rings); 1655 rx_rings = NULL; 1656 } 1657 1658 i40e_up(vsi); 1659 1660 free_tx: 1661 /* error cleanup if the Rx allocations failed after getting Tx */ 1662 if (tx_rings) { 1663 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1664 if (i40e_active_tx_ring_index(vsi, i)) 1665 i40e_free_tx_resources(vsi->tx_rings[i]); 1666 } 1667 kfree(tx_rings); 1668 tx_rings = NULL; 1669 } 1670 1671 done: 1672 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1673 1674 return err; 1675 } 1676 1677 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1678 { 1679 struct i40e_netdev_priv *np = netdev_priv(netdev); 1680 struct i40e_vsi *vsi = np->vsi; 1681 struct i40e_pf *pf = vsi->back; 1682 1683 switch (sset) { 1684 case ETH_SS_TEST: 1685 return I40E_TEST_LEN; 1686 case ETH_SS_STATS: 1687 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1688 int len = I40E_PF_STATS_LEN(netdev); 1689 1690 if ((pf->lan_veb != I40E_NO_VEB) && 1691 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1692 len += I40E_VEB_STATS_TOTAL; 1693 return len; 1694 } else { 1695 return I40E_VSI_STATS_LEN(netdev); 1696 } 1697 case ETH_SS_PRIV_FLAGS: 1698 return I40E_PRIV_FLAGS_STR_LEN + 1699 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1700 default: 1701 return -EOPNOTSUPP; 1702 } 1703 } 1704 1705 static void i40e_get_ethtool_stats(struct net_device *netdev, 1706 struct ethtool_stats *stats, u64 *data) 1707 { 1708 struct i40e_netdev_priv *np = netdev_priv(netdev); 1709 struct i40e_ring *tx_ring, *rx_ring; 1710 struct i40e_vsi *vsi = np->vsi; 1711 struct i40e_pf *pf = vsi->back; 1712 unsigned int j; 1713 int i = 0; 1714 char *p; 1715 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1716 unsigned int start; 1717 1718 i40e_update_stats(vsi); 1719 1720 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1721 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1722 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1723 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1724 } 1725 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1726 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1727 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1728 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1729 } 1730 rcu_read_lock(); 1731 for (j = 0; j < vsi->num_queue_pairs; j++) { 1732 tx_ring = READ_ONCE(vsi->tx_rings[j]); 1733 1734 if (!tx_ring) 1735 continue; 1736 1737 /* process Tx ring statistics */ 1738 do { 1739 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1740 data[i] = tx_ring->stats.packets; 1741 data[i + 1] = tx_ring->stats.bytes; 1742 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1743 i += 2; 1744 1745 /* Rx ring is the 2nd half of the queue pair */ 1746 rx_ring = &tx_ring[1]; 1747 do { 1748 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1749 data[i] = rx_ring->stats.packets; 1750 data[i + 1] = rx_ring->stats.bytes; 1751 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1752 i += 2; 1753 } 1754 rcu_read_unlock(); 1755 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1756 return; 1757 1758 if ((pf->lan_veb != I40E_NO_VEB) && 1759 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1760 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1761 1762 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1763 p = (char *)veb; 1764 p += i40e_gstrings_veb_stats[j].stat_offset; 1765 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1766 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1767 } 1768 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1769 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1770 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1771 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1772 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1773 } 1774 } 1775 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1776 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1777 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1778 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1779 } 1780 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1781 data[i++] = pf->stats.priority_xon_tx[j]; 1782 data[i++] = pf->stats.priority_xoff_tx[j]; 1783 } 1784 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1785 data[i++] = pf->stats.priority_xon_rx[j]; 1786 data[i++] = pf->stats.priority_xoff_rx[j]; 1787 } 1788 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1789 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1790 } 1791 1792 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1793 u8 *data) 1794 { 1795 struct i40e_netdev_priv *np = netdev_priv(netdev); 1796 struct i40e_vsi *vsi = np->vsi; 1797 struct i40e_pf *pf = vsi->back; 1798 char *p = (char *)data; 1799 unsigned int i; 1800 1801 switch (stringset) { 1802 case ETH_SS_TEST: 1803 memcpy(data, i40e_gstrings_test, 1804 I40E_TEST_LEN * ETH_GSTRING_LEN); 1805 break; 1806 case ETH_SS_STATS: 1807 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1808 snprintf(p, ETH_GSTRING_LEN, "%s", 1809 i40e_gstrings_net_stats[i].stat_string); 1810 p += ETH_GSTRING_LEN; 1811 } 1812 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1813 snprintf(p, ETH_GSTRING_LEN, "%s", 1814 i40e_gstrings_misc_stats[i].stat_string); 1815 p += ETH_GSTRING_LEN; 1816 } 1817 for (i = 0; i < vsi->num_queue_pairs; i++) { 1818 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1819 p += ETH_GSTRING_LEN; 1820 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1821 p += ETH_GSTRING_LEN; 1822 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1823 p += ETH_GSTRING_LEN; 1824 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1825 p += ETH_GSTRING_LEN; 1826 } 1827 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1828 return; 1829 1830 if ((pf->lan_veb != I40E_NO_VEB) && 1831 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1832 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1833 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1834 i40e_gstrings_veb_stats[i].stat_string); 1835 p += ETH_GSTRING_LEN; 1836 } 1837 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1838 snprintf(p, ETH_GSTRING_LEN, 1839 "veb.tc_%d_tx_packets", i); 1840 p += ETH_GSTRING_LEN; 1841 snprintf(p, ETH_GSTRING_LEN, 1842 "veb.tc_%d_tx_bytes", i); 1843 p += ETH_GSTRING_LEN; 1844 snprintf(p, ETH_GSTRING_LEN, 1845 "veb.tc_%d_rx_packets", i); 1846 p += ETH_GSTRING_LEN; 1847 snprintf(p, ETH_GSTRING_LEN, 1848 "veb.tc_%d_rx_bytes", i); 1849 p += ETH_GSTRING_LEN; 1850 } 1851 } 1852 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1853 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1854 i40e_gstrings_stats[i].stat_string); 1855 p += ETH_GSTRING_LEN; 1856 } 1857 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1858 snprintf(p, ETH_GSTRING_LEN, 1859 "port.tx_priority_%d_xon", i); 1860 p += ETH_GSTRING_LEN; 1861 snprintf(p, ETH_GSTRING_LEN, 1862 "port.tx_priority_%d_xoff", i); 1863 p += ETH_GSTRING_LEN; 1864 } 1865 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1866 snprintf(p, ETH_GSTRING_LEN, 1867 "port.rx_priority_%d_xon", i); 1868 p += ETH_GSTRING_LEN; 1869 snprintf(p, ETH_GSTRING_LEN, 1870 "port.rx_priority_%d_xoff", i); 1871 p += ETH_GSTRING_LEN; 1872 } 1873 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1874 snprintf(p, ETH_GSTRING_LEN, 1875 "port.rx_priority_%d_xon_2_xoff", i); 1876 p += ETH_GSTRING_LEN; 1877 } 1878 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1879 break; 1880 case ETH_SS_PRIV_FLAGS: 1881 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1882 snprintf(p, ETH_GSTRING_LEN, "%s", 1883 i40e_gstrings_priv_flags[i].flag_string); 1884 p += ETH_GSTRING_LEN; 1885 } 1886 if (pf->hw.pf_id != 0) 1887 break; 1888 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1889 snprintf(p, ETH_GSTRING_LEN, "%s", 1890 i40e_gl_gstrings_priv_flags[i].flag_string); 1891 p += ETH_GSTRING_LEN; 1892 } 1893 break; 1894 default: 1895 break; 1896 } 1897 } 1898 1899 static int i40e_get_ts_info(struct net_device *dev, 1900 struct ethtool_ts_info *info) 1901 { 1902 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1903 1904 /* only report HW timestamping if PTP is enabled */ 1905 if (!(pf->flags & I40E_FLAG_PTP)) 1906 return ethtool_op_get_ts_info(dev, info); 1907 1908 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1909 SOF_TIMESTAMPING_RX_SOFTWARE | 1910 SOF_TIMESTAMPING_SOFTWARE | 1911 SOF_TIMESTAMPING_TX_HARDWARE | 1912 SOF_TIMESTAMPING_RX_HARDWARE | 1913 SOF_TIMESTAMPING_RAW_HARDWARE; 1914 1915 if (pf->ptp_clock) 1916 info->phc_index = ptp_clock_index(pf->ptp_clock); 1917 else 1918 info->phc_index = -1; 1919 1920 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1921 1922 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1923 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1924 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1925 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1926 1927 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1928 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1929 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1930 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1931 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1932 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1933 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1934 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1935 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1936 1937 return 0; 1938 } 1939 1940 static int i40e_link_test(struct net_device *netdev, u64 *data) 1941 { 1942 struct i40e_netdev_priv *np = netdev_priv(netdev); 1943 struct i40e_pf *pf = np->vsi->back; 1944 i40e_status status; 1945 bool link_up = false; 1946 1947 netif_info(pf, hw, netdev, "link test\n"); 1948 status = i40e_get_link_status(&pf->hw, &link_up); 1949 if (status) { 1950 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1951 *data = 1; 1952 return *data; 1953 } 1954 1955 if (link_up) 1956 *data = 0; 1957 else 1958 *data = 1; 1959 1960 return *data; 1961 } 1962 1963 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1964 { 1965 struct i40e_netdev_priv *np = netdev_priv(netdev); 1966 struct i40e_pf *pf = np->vsi->back; 1967 1968 netif_info(pf, hw, netdev, "register test\n"); 1969 *data = i40e_diag_reg_test(&pf->hw); 1970 1971 return *data; 1972 } 1973 1974 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1975 { 1976 struct i40e_netdev_priv *np = netdev_priv(netdev); 1977 struct i40e_pf *pf = np->vsi->back; 1978 1979 netif_info(pf, hw, netdev, "eeprom test\n"); 1980 *data = i40e_diag_eeprom_test(&pf->hw); 1981 1982 /* forcebly clear the NVM Update state machine */ 1983 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1984 1985 return *data; 1986 } 1987 1988 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1989 { 1990 struct i40e_netdev_priv *np = netdev_priv(netdev); 1991 struct i40e_pf *pf = np->vsi->back; 1992 u16 swc_old = pf->sw_int_count; 1993 1994 netif_info(pf, hw, netdev, "interrupt test\n"); 1995 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1996 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1997 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1998 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1999 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2000 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2001 usleep_range(1000, 2000); 2002 *data = (swc_old == pf->sw_int_count); 2003 2004 return *data; 2005 } 2006 2007 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2008 { 2009 struct i40e_vf *vfs = pf->vf; 2010 int i; 2011 2012 for (i = 0; i < pf->num_alloc_vfs; i++) 2013 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2014 return true; 2015 return false; 2016 } 2017 2018 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2019 { 2020 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2021 } 2022 2023 static void i40e_diag_test(struct net_device *netdev, 2024 struct ethtool_test *eth_test, u64 *data) 2025 { 2026 struct i40e_netdev_priv *np = netdev_priv(netdev); 2027 bool if_running = netif_running(netdev); 2028 struct i40e_pf *pf = np->vsi->back; 2029 2030 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2031 /* Offline tests */ 2032 netif_info(pf, drv, netdev, "offline testing starting\n"); 2033 2034 set_bit(__I40E_TESTING, pf->state); 2035 2036 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2037 dev_warn(&pf->pdev->dev, 2038 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2039 data[I40E_ETH_TEST_REG] = 1; 2040 data[I40E_ETH_TEST_EEPROM] = 1; 2041 data[I40E_ETH_TEST_INTR] = 1; 2042 data[I40E_ETH_TEST_LINK] = 1; 2043 eth_test->flags |= ETH_TEST_FL_FAILED; 2044 clear_bit(__I40E_TESTING, pf->state); 2045 goto skip_ol_tests; 2046 } 2047 2048 /* If the device is online then take it offline */ 2049 if (if_running) 2050 /* indicate we're in test mode */ 2051 i40e_close(netdev); 2052 else 2053 /* This reset does not affect link - if it is 2054 * changed to a type of reset that does affect 2055 * link then the following link test would have 2056 * to be moved to before the reset 2057 */ 2058 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2059 2060 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2061 eth_test->flags |= ETH_TEST_FL_FAILED; 2062 2063 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2064 eth_test->flags |= ETH_TEST_FL_FAILED; 2065 2066 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2067 eth_test->flags |= ETH_TEST_FL_FAILED; 2068 2069 /* run reg test last, a reset is required after it */ 2070 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2071 eth_test->flags |= ETH_TEST_FL_FAILED; 2072 2073 clear_bit(__I40E_TESTING, pf->state); 2074 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2075 2076 if (if_running) 2077 i40e_open(netdev); 2078 } else { 2079 /* Online tests */ 2080 netif_info(pf, drv, netdev, "online testing starting\n"); 2081 2082 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2083 eth_test->flags |= ETH_TEST_FL_FAILED; 2084 2085 /* Offline only tests, not run in online; pass by default */ 2086 data[I40E_ETH_TEST_REG] = 0; 2087 data[I40E_ETH_TEST_EEPROM] = 0; 2088 data[I40E_ETH_TEST_INTR] = 0; 2089 } 2090 2091 skip_ol_tests: 2092 2093 netif_info(pf, drv, netdev, "testing finished\n"); 2094 } 2095 2096 static void i40e_get_wol(struct net_device *netdev, 2097 struct ethtool_wolinfo *wol) 2098 { 2099 struct i40e_netdev_priv *np = netdev_priv(netdev); 2100 struct i40e_pf *pf = np->vsi->back; 2101 struct i40e_hw *hw = &pf->hw; 2102 u16 wol_nvm_bits; 2103 2104 /* NVM bit on means WoL disabled for the port */ 2105 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2106 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2107 wol->supported = 0; 2108 wol->wolopts = 0; 2109 } else { 2110 wol->supported = WAKE_MAGIC; 2111 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2112 } 2113 } 2114 2115 /** 2116 * i40e_set_wol - set the WakeOnLAN configuration 2117 * @netdev: the netdev in question 2118 * @wol: the ethtool WoL setting data 2119 **/ 2120 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2121 { 2122 struct i40e_netdev_priv *np = netdev_priv(netdev); 2123 struct i40e_pf *pf = np->vsi->back; 2124 struct i40e_vsi *vsi = np->vsi; 2125 struct i40e_hw *hw = &pf->hw; 2126 u16 wol_nvm_bits; 2127 2128 /* WoL not supported if this isn't the controlling PF on the port */ 2129 if (hw->partition_id != 1) { 2130 i40e_partition_setting_complaint(pf); 2131 return -EOPNOTSUPP; 2132 } 2133 2134 if (vsi != pf->vsi[pf->lan_vsi]) 2135 return -EOPNOTSUPP; 2136 2137 /* NVM bit on means WoL disabled for the port */ 2138 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2139 if (BIT(hw->port) & wol_nvm_bits) 2140 return -EOPNOTSUPP; 2141 2142 /* only magic packet is supported */ 2143 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2144 return -EOPNOTSUPP; 2145 2146 /* is this a new value? */ 2147 if (pf->wol_en != !!wol->wolopts) { 2148 pf->wol_en = !!wol->wolopts; 2149 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2150 } 2151 2152 return 0; 2153 } 2154 2155 static int i40e_set_phys_id(struct net_device *netdev, 2156 enum ethtool_phys_id_state state) 2157 { 2158 struct i40e_netdev_priv *np = netdev_priv(netdev); 2159 i40e_status ret = 0; 2160 struct i40e_pf *pf = np->vsi->back; 2161 struct i40e_hw *hw = &pf->hw; 2162 int blink_freq = 2; 2163 u16 temp_status; 2164 2165 switch (state) { 2166 case ETHTOOL_ID_ACTIVE: 2167 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2168 pf->led_status = i40e_led_get(hw); 2169 } else { 2170 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2171 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2172 NULL); 2173 ret = i40e_led_get_phy(hw, &temp_status, 2174 &pf->phy_led_val); 2175 pf->led_status = temp_status; 2176 } 2177 return blink_freq; 2178 case ETHTOOL_ID_ON: 2179 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2180 i40e_led_set(hw, 0xf, false); 2181 else 2182 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2183 break; 2184 case ETHTOOL_ID_OFF: 2185 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2186 i40e_led_set(hw, 0x0, false); 2187 else 2188 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2189 break; 2190 case ETHTOOL_ID_INACTIVE: 2191 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2192 i40e_led_set(hw, pf->led_status, false); 2193 } else { 2194 ret = i40e_led_set_phy(hw, false, pf->led_status, 2195 (pf->phy_led_val | 2196 I40E_PHY_LED_MODE_ORIG)); 2197 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2198 i40e_aq_set_phy_debug(hw, 0, NULL); 2199 } 2200 break; 2201 default: 2202 break; 2203 } 2204 if (ret) 2205 return -ENOENT; 2206 else 2207 return 0; 2208 } 2209 2210 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2211 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2212 * 125us (8000 interrupts per second) == ITR(62) 2213 */ 2214 2215 /** 2216 * __i40e_get_coalesce - get per-queue coalesce settings 2217 * @netdev: the netdev to check 2218 * @ec: ethtool coalesce data structure 2219 * @queue: which queue to pick 2220 * 2221 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2222 * are per queue. If queue is <0 then we default to queue 0 as the 2223 * representative value. 2224 **/ 2225 static int __i40e_get_coalesce(struct net_device *netdev, 2226 struct ethtool_coalesce *ec, 2227 int queue) 2228 { 2229 struct i40e_netdev_priv *np = netdev_priv(netdev); 2230 struct i40e_ring *rx_ring, *tx_ring; 2231 struct i40e_vsi *vsi = np->vsi; 2232 2233 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2234 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2235 2236 /* rx and tx usecs has per queue value. If user doesn't specify the 2237 * queue, return queue 0's value to represent. 2238 */ 2239 if (queue < 0) 2240 queue = 0; 2241 else if (queue >= vsi->num_queue_pairs) 2242 return -EINVAL; 2243 2244 rx_ring = vsi->rx_rings[queue]; 2245 tx_ring = vsi->tx_rings[queue]; 2246 2247 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2248 ec->use_adaptive_rx_coalesce = 1; 2249 2250 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2251 ec->use_adaptive_tx_coalesce = 1; 2252 2253 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2254 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2255 2256 /* we use the _usecs_high to store/set the interrupt rate limit 2257 * that the hardware supports, that almost but not quite 2258 * fits the original intent of the ethtool variable, 2259 * the rx_coalesce_usecs_high limits total interrupts 2260 * per second from both tx/rx sources. 2261 */ 2262 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2263 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2264 2265 return 0; 2266 } 2267 2268 /** 2269 * i40e_get_coalesce - get a netdev's coalesce settings 2270 * @netdev: the netdev to check 2271 * @ec: ethtool coalesce data structure 2272 * 2273 * Gets the coalesce settings for a particular netdev. Note that if user has 2274 * modified per-queue settings, this only guarantees to represent queue 0. See 2275 * __i40e_get_coalesce for more details. 2276 **/ 2277 static int i40e_get_coalesce(struct net_device *netdev, 2278 struct ethtool_coalesce *ec) 2279 { 2280 return __i40e_get_coalesce(netdev, ec, -1); 2281 } 2282 2283 /** 2284 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2285 * @netdev: netdev structure 2286 * @ec: ethtool's coalesce settings 2287 * @queue: the particular queue to read 2288 * 2289 * Will read a specific queue's coalesce settings 2290 **/ 2291 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2292 struct ethtool_coalesce *ec) 2293 { 2294 return __i40e_get_coalesce(netdev, ec, queue); 2295 } 2296 2297 /** 2298 * i40e_set_itr_per_queue - set ITR values for specific queue 2299 * @vsi: the VSI to set values for 2300 * @ec: coalesce settings from ethtool 2301 * @queue: the queue to modify 2302 * 2303 * Change the ITR settings for a specific queue. 2304 **/ 2305 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2306 struct ethtool_coalesce *ec, 2307 int queue) 2308 { 2309 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2310 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2311 struct i40e_pf *pf = vsi->back; 2312 struct i40e_hw *hw = &pf->hw; 2313 struct i40e_q_vector *q_vector; 2314 u16 vector, intrl; 2315 2316 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2317 2318 rx_ring->rx_itr_setting = ec->rx_coalesce_usecs; 2319 tx_ring->tx_itr_setting = ec->tx_coalesce_usecs; 2320 2321 if (ec->use_adaptive_rx_coalesce) 2322 rx_ring->rx_itr_setting |= I40E_ITR_DYNAMIC; 2323 else 2324 rx_ring->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2325 2326 if (ec->use_adaptive_tx_coalesce) 2327 tx_ring->tx_itr_setting |= I40E_ITR_DYNAMIC; 2328 else 2329 tx_ring->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2330 2331 q_vector = rx_ring->q_vector; 2332 q_vector->rx.itr = ITR_TO_REG(rx_ring->rx_itr_setting); 2333 vector = vsi->base_vector + q_vector->v_idx; 2334 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2335 2336 q_vector = tx_ring->q_vector; 2337 q_vector->tx.itr = ITR_TO_REG(tx_ring->tx_itr_setting); 2338 vector = vsi->base_vector + q_vector->v_idx; 2339 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2340 2341 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2342 i40e_flush(hw); 2343 } 2344 2345 /** 2346 * __i40e_set_coalesce - set coalesce settings for particular queue 2347 * @netdev: the netdev to change 2348 * @ec: ethtool coalesce settings 2349 * @queue: the queue to change 2350 * 2351 * Sets the coalesce settings for a particular queue. 2352 **/ 2353 static int __i40e_set_coalesce(struct net_device *netdev, 2354 struct ethtool_coalesce *ec, 2355 int queue) 2356 { 2357 struct i40e_netdev_priv *np = netdev_priv(netdev); 2358 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2359 struct i40e_vsi *vsi = np->vsi; 2360 struct i40e_pf *pf = vsi->back; 2361 int i; 2362 2363 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2364 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2365 2366 if (queue < 0) { 2367 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting; 2368 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting; 2369 } else if (queue < vsi->num_queue_pairs) { 2370 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting; 2371 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting; 2372 } else { 2373 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2374 vsi->num_queue_pairs - 1); 2375 return -EINVAL; 2376 } 2377 2378 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2379 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2380 2381 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2382 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2383 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2384 return -EINVAL; 2385 } 2386 2387 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2388 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2389 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2390 return -EINVAL; 2391 } 2392 2393 if (ec->rx_coalesce_usecs != cur_rx_itr && 2394 ec->use_adaptive_rx_coalesce) { 2395 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2396 return -EINVAL; 2397 } 2398 2399 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2400 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2401 return -EINVAL; 2402 } 2403 2404 if (ec->tx_coalesce_usecs != cur_tx_itr && 2405 ec->use_adaptive_tx_coalesce) { 2406 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2407 return -EINVAL; 2408 } 2409 2410 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2411 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2412 return -EINVAL; 2413 } 2414 2415 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2416 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1; 2417 2418 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2419 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1; 2420 2421 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2422 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2423 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2424 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2425 vsi->int_rate_limit); 2426 } 2427 2428 /* rx and tx usecs has per queue value. If user doesn't specify the 2429 * queue, apply to all queues. 2430 */ 2431 if (queue < 0) { 2432 for (i = 0; i < vsi->num_queue_pairs; i++) 2433 i40e_set_itr_per_queue(vsi, ec, i); 2434 } else { 2435 i40e_set_itr_per_queue(vsi, ec, queue); 2436 } 2437 2438 return 0; 2439 } 2440 2441 /** 2442 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2443 * @netdev: the netdev to change 2444 * @ec: ethtool coalesce settings 2445 * 2446 * This will set each queue to the same coalesce settings. 2447 **/ 2448 static int i40e_set_coalesce(struct net_device *netdev, 2449 struct ethtool_coalesce *ec) 2450 { 2451 return __i40e_set_coalesce(netdev, ec, -1); 2452 } 2453 2454 /** 2455 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2456 * @netdev: the netdev to change 2457 * @ec: ethtool's coalesce settings 2458 * @queue: the queue to change 2459 * 2460 * Sets the specified queue's coalesce settings. 2461 **/ 2462 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2463 struct ethtool_coalesce *ec) 2464 { 2465 return __i40e_set_coalesce(netdev, ec, queue); 2466 } 2467 2468 /** 2469 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2470 * @pf: pointer to the physical function struct 2471 * @cmd: ethtool rxnfc command 2472 * 2473 * Returns Success if the flow is supported, else Invalid Input. 2474 **/ 2475 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2476 { 2477 struct i40e_hw *hw = &pf->hw; 2478 u8 flow_pctype = 0; 2479 u64 i_set = 0; 2480 2481 cmd->data = 0; 2482 2483 switch (cmd->flow_type) { 2484 case TCP_V4_FLOW: 2485 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2486 break; 2487 case UDP_V4_FLOW: 2488 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2489 break; 2490 case TCP_V6_FLOW: 2491 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2492 break; 2493 case UDP_V6_FLOW: 2494 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2495 break; 2496 case SCTP_V4_FLOW: 2497 case AH_ESP_V4_FLOW: 2498 case AH_V4_FLOW: 2499 case ESP_V4_FLOW: 2500 case IPV4_FLOW: 2501 case SCTP_V6_FLOW: 2502 case AH_ESP_V6_FLOW: 2503 case AH_V6_FLOW: 2504 case ESP_V6_FLOW: 2505 case IPV6_FLOW: 2506 /* Default is src/dest for IP, no matter the L4 hashing */ 2507 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2508 break; 2509 default: 2510 return -EINVAL; 2511 } 2512 2513 /* Read flow based hash input set register */ 2514 if (flow_pctype) { 2515 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2516 flow_pctype)) | 2517 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2518 flow_pctype)) << 32); 2519 } 2520 2521 /* Process bits of hash input set */ 2522 if (i_set) { 2523 if (i_set & I40E_L4_SRC_MASK) 2524 cmd->data |= RXH_L4_B_0_1; 2525 if (i_set & I40E_L4_DST_MASK) 2526 cmd->data |= RXH_L4_B_2_3; 2527 2528 if (cmd->flow_type == TCP_V4_FLOW || 2529 cmd->flow_type == UDP_V4_FLOW) { 2530 if (i_set & I40E_L3_SRC_MASK) 2531 cmd->data |= RXH_IP_SRC; 2532 if (i_set & I40E_L3_DST_MASK) 2533 cmd->data |= RXH_IP_DST; 2534 } else if (cmd->flow_type == TCP_V6_FLOW || 2535 cmd->flow_type == UDP_V6_FLOW) { 2536 if (i_set & I40E_L3_V6_SRC_MASK) 2537 cmd->data |= RXH_IP_SRC; 2538 if (i_set & I40E_L3_V6_DST_MASK) 2539 cmd->data |= RXH_IP_DST; 2540 } 2541 } 2542 2543 return 0; 2544 } 2545 2546 /** 2547 * i40e_check_mask - Check whether a mask field is set 2548 * @mask: the full mask value 2549 * @field; mask of the field to check 2550 * 2551 * If the given mask is fully set, return positive value. If the mask for the 2552 * field is fully unset, return zero. Otherwise return a negative error code. 2553 **/ 2554 static int i40e_check_mask(u64 mask, u64 field) 2555 { 2556 u64 value = mask & field; 2557 2558 if (value == field) 2559 return 1; 2560 else if (!value) 2561 return 0; 2562 else 2563 return -1; 2564 } 2565 2566 /** 2567 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2568 * @fsp: pointer to rx flow specification 2569 * @data: pointer to userdef data structure for storage 2570 * 2571 * Read the user-defined data and deconstruct the value into a structure. No 2572 * other code should read the user-defined data, so as to ensure that every 2573 * place consistently reads the value correctly. 2574 * 2575 * The user-defined field is a 64bit Big Endian format value, which we 2576 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2577 * be defined starting from the highest bits, while small bit field values 2578 * shall be defined starting from the lowest bits. 2579 * 2580 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2581 * and the filter should be rejected. The data structure will always be 2582 * modified even if FLOW_EXT is not set. 2583 * 2584 **/ 2585 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2586 struct i40e_rx_flow_userdef *data) 2587 { 2588 u64 value, mask; 2589 int valid; 2590 2591 /* Zero memory first so it's always consistent. */ 2592 memset(data, 0, sizeof(*data)); 2593 2594 if (!(fsp->flow_type & FLOW_EXT)) 2595 return 0; 2596 2597 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2598 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2599 2600 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2601 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2602 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2603 2604 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2605 if (valid < 0) { 2606 return -EINVAL; 2607 } else if (valid) { 2608 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2609 data->flex_offset = 2610 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2611 data->flex_filter = true; 2612 } 2613 2614 return 0; 2615 } 2616 2617 /** 2618 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2619 * @fsp: pointer to rx_flow specification 2620 * 2621 * Reads the userdef data structure and properly fills in the user defined 2622 * fields of the rx_flow_spec. 2623 **/ 2624 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2625 struct i40e_rx_flow_userdef *data) 2626 { 2627 u64 value = 0, mask = 0; 2628 2629 if (data->flex_filter) { 2630 value |= data->flex_word; 2631 value |= (u64)data->flex_offset << 16; 2632 mask |= I40E_USERDEF_FLEX_FILTER; 2633 } 2634 2635 if (value || mask) 2636 fsp->flow_type |= FLOW_EXT; 2637 2638 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2639 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2640 } 2641 2642 /** 2643 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2644 * @pf: Pointer to the physical function struct 2645 * @cmd: The command to get or set Rx flow classification rules 2646 * @rule_locs: Array of used rule locations 2647 * 2648 * This function populates both the total and actual rule count of 2649 * the ethtool flow classification command 2650 * 2651 * Returns 0 on success or -EMSGSIZE if entry not found 2652 **/ 2653 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2654 struct ethtool_rxnfc *cmd, 2655 u32 *rule_locs) 2656 { 2657 struct i40e_fdir_filter *rule; 2658 struct hlist_node *node2; 2659 int cnt = 0; 2660 2661 /* report total rule count */ 2662 cmd->data = i40e_get_fd_cnt_all(pf); 2663 2664 hlist_for_each_entry_safe(rule, node2, 2665 &pf->fdir_filter_list, fdir_node) { 2666 if (cnt == cmd->rule_cnt) 2667 return -EMSGSIZE; 2668 2669 rule_locs[cnt] = rule->fd_id; 2670 cnt++; 2671 } 2672 2673 cmd->rule_cnt = cnt; 2674 2675 return 0; 2676 } 2677 2678 /** 2679 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2680 * @pf: Pointer to the physical function struct 2681 * @cmd: The command to get or set Rx flow classification rules 2682 * 2683 * This function looks up a filter based on the Rx flow classification 2684 * command and fills the flow spec info for it if found 2685 * 2686 * Returns 0 on success or -EINVAL if filter not found 2687 **/ 2688 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2689 struct ethtool_rxnfc *cmd) 2690 { 2691 struct ethtool_rx_flow_spec *fsp = 2692 (struct ethtool_rx_flow_spec *)&cmd->fs; 2693 struct i40e_rx_flow_userdef userdef = {0}; 2694 struct i40e_fdir_filter *rule = NULL; 2695 struct hlist_node *node2; 2696 u64 input_set; 2697 u16 index; 2698 2699 hlist_for_each_entry_safe(rule, node2, 2700 &pf->fdir_filter_list, fdir_node) { 2701 if (fsp->location <= rule->fd_id) 2702 break; 2703 } 2704 2705 if (!rule || fsp->location != rule->fd_id) 2706 return -EINVAL; 2707 2708 fsp->flow_type = rule->flow_type; 2709 if (fsp->flow_type == IP_USER_FLOW) { 2710 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2711 fsp->h_u.usr_ip4_spec.proto = 0; 2712 fsp->m_u.usr_ip4_spec.proto = 0; 2713 } 2714 2715 /* Reverse the src and dest notion, since the HW views them from 2716 * Tx perspective where as the user expects it from Rx filter view. 2717 */ 2718 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2719 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2720 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2721 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2722 2723 switch (rule->flow_type) { 2724 case SCTP_V4_FLOW: 2725 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2726 break; 2727 case TCP_V4_FLOW: 2728 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2729 break; 2730 case UDP_V4_FLOW: 2731 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2732 break; 2733 case IP_USER_FLOW: 2734 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2735 break; 2736 default: 2737 /* If we have stored a filter with a flow type not listed here 2738 * it is almost certainly a driver bug. WARN(), and then 2739 * assign the input_set as if all fields are enabled to avoid 2740 * reading unassigned memory. 2741 */ 2742 WARN(1, "Missing input set index for flow_type %d\n", 2743 rule->flow_type); 2744 input_set = 0xFFFFFFFFFFFFFFFFULL; 2745 goto no_input_set; 2746 } 2747 2748 input_set = i40e_read_fd_input_set(pf, index); 2749 2750 no_input_set: 2751 if (input_set & I40E_L3_SRC_MASK) 2752 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2753 2754 if (input_set & I40E_L3_DST_MASK) 2755 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2756 2757 if (input_set & I40E_L4_SRC_MASK) 2758 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2759 2760 if (input_set & I40E_L4_DST_MASK) 2761 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 2762 2763 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2764 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2765 else 2766 fsp->ring_cookie = rule->q_index; 2767 2768 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2769 struct i40e_vsi *vsi; 2770 2771 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2772 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2773 /* VFs are zero-indexed by the driver, but ethtool 2774 * expects them to be one-indexed, so add one here 2775 */ 2776 u64 ring_vf = vsi->vf_id + 1; 2777 2778 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2779 fsp->ring_cookie |= ring_vf; 2780 } 2781 } 2782 2783 if (rule->flex_filter) { 2784 userdef.flex_filter = true; 2785 userdef.flex_word = be16_to_cpu(rule->flex_word); 2786 userdef.flex_offset = rule->flex_offset; 2787 } 2788 2789 i40e_fill_rx_flow_user_data(fsp, &userdef); 2790 2791 return 0; 2792 } 2793 2794 /** 2795 * i40e_get_rxnfc - command to get RX flow classification rules 2796 * @netdev: network interface device structure 2797 * @cmd: ethtool rxnfc command 2798 * 2799 * Returns Success if the command is supported. 2800 **/ 2801 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2802 u32 *rule_locs) 2803 { 2804 struct i40e_netdev_priv *np = netdev_priv(netdev); 2805 struct i40e_vsi *vsi = np->vsi; 2806 struct i40e_pf *pf = vsi->back; 2807 int ret = -EOPNOTSUPP; 2808 2809 switch (cmd->cmd) { 2810 case ETHTOOL_GRXRINGS: 2811 cmd->data = vsi->rss_size; 2812 ret = 0; 2813 break; 2814 case ETHTOOL_GRXFH: 2815 ret = i40e_get_rss_hash_opts(pf, cmd); 2816 break; 2817 case ETHTOOL_GRXCLSRLCNT: 2818 cmd->rule_cnt = pf->fdir_pf_active_filters; 2819 /* report total rule count */ 2820 cmd->data = i40e_get_fd_cnt_all(pf); 2821 ret = 0; 2822 break; 2823 case ETHTOOL_GRXCLSRULE: 2824 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2825 break; 2826 case ETHTOOL_GRXCLSRLALL: 2827 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2828 break; 2829 default: 2830 break; 2831 } 2832 2833 return ret; 2834 } 2835 2836 /** 2837 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2838 * @nfc: pointer to user request 2839 * @i_setc bits currently set 2840 * 2841 * Returns value of bits to be set per user request 2842 **/ 2843 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2844 { 2845 u64 i_set = i_setc; 2846 u64 src_l3 = 0, dst_l3 = 0; 2847 2848 if (nfc->data & RXH_L4_B_0_1) 2849 i_set |= I40E_L4_SRC_MASK; 2850 else 2851 i_set &= ~I40E_L4_SRC_MASK; 2852 if (nfc->data & RXH_L4_B_2_3) 2853 i_set |= I40E_L4_DST_MASK; 2854 else 2855 i_set &= ~I40E_L4_DST_MASK; 2856 2857 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2858 src_l3 = I40E_L3_V6_SRC_MASK; 2859 dst_l3 = I40E_L3_V6_DST_MASK; 2860 } else if (nfc->flow_type == TCP_V4_FLOW || 2861 nfc->flow_type == UDP_V4_FLOW) { 2862 src_l3 = I40E_L3_SRC_MASK; 2863 dst_l3 = I40E_L3_DST_MASK; 2864 } else { 2865 /* Any other flow type are not supported here */ 2866 return i_set; 2867 } 2868 2869 if (nfc->data & RXH_IP_SRC) 2870 i_set |= src_l3; 2871 else 2872 i_set &= ~src_l3; 2873 if (nfc->data & RXH_IP_DST) 2874 i_set |= dst_l3; 2875 else 2876 i_set &= ~dst_l3; 2877 2878 return i_set; 2879 } 2880 2881 /** 2882 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2883 * @pf: pointer to the physical function struct 2884 * @cmd: ethtool rxnfc command 2885 * 2886 * Returns Success if the flow input set is supported. 2887 **/ 2888 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2889 { 2890 struct i40e_hw *hw = &pf->hw; 2891 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2892 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2893 u8 flow_pctype = 0; 2894 u64 i_set, i_setc; 2895 2896 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2897 dev_err(&pf->pdev->dev, 2898 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2899 return -EOPNOTSUPP; 2900 } 2901 2902 /* RSS does not support anything other than hashing 2903 * to queues on src and dst IPs and ports 2904 */ 2905 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2906 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2907 return -EINVAL; 2908 2909 switch (nfc->flow_type) { 2910 case TCP_V4_FLOW: 2911 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2912 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2913 hena |= 2914 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2915 break; 2916 case TCP_V6_FLOW: 2917 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2918 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2919 hena |= 2920 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2921 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2922 hena |= 2923 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2924 break; 2925 case UDP_V4_FLOW: 2926 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2927 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2928 hena |= 2929 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2930 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2931 2932 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2933 break; 2934 case UDP_V6_FLOW: 2935 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2936 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2937 hena |= 2938 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2939 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2940 2941 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2942 break; 2943 case AH_ESP_V4_FLOW: 2944 case AH_V4_FLOW: 2945 case ESP_V4_FLOW: 2946 case SCTP_V4_FLOW: 2947 if ((nfc->data & RXH_L4_B_0_1) || 2948 (nfc->data & RXH_L4_B_2_3)) 2949 return -EINVAL; 2950 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2951 break; 2952 case AH_ESP_V6_FLOW: 2953 case AH_V6_FLOW: 2954 case ESP_V6_FLOW: 2955 case SCTP_V6_FLOW: 2956 if ((nfc->data & RXH_L4_B_0_1) || 2957 (nfc->data & RXH_L4_B_2_3)) 2958 return -EINVAL; 2959 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2960 break; 2961 case IPV4_FLOW: 2962 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2963 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2964 break; 2965 case IPV6_FLOW: 2966 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2967 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2968 break; 2969 default: 2970 return -EINVAL; 2971 } 2972 2973 if (flow_pctype) { 2974 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2975 flow_pctype)) | 2976 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2977 flow_pctype)) << 32); 2978 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2979 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2980 (u32)i_set); 2981 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2982 (u32)(i_set >> 32)); 2983 hena |= BIT_ULL(flow_pctype); 2984 } 2985 2986 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2987 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2988 i40e_flush(hw); 2989 2990 return 0; 2991 } 2992 2993 /** 2994 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2995 * @vsi: Pointer to the targeted VSI 2996 * @input: The filter to update or NULL to indicate deletion 2997 * @sw_idx: Software index to the filter 2998 * @cmd: The command to get or set Rx flow classification rules 2999 * 3000 * This function updates (or deletes) a Flow Director entry from 3001 * the hlist of the corresponding PF 3002 * 3003 * Returns 0 on success 3004 **/ 3005 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3006 struct i40e_fdir_filter *input, 3007 u16 sw_idx, 3008 struct ethtool_rxnfc *cmd) 3009 { 3010 struct i40e_fdir_filter *rule, *parent; 3011 struct i40e_pf *pf = vsi->back; 3012 struct hlist_node *node2; 3013 int err = -EINVAL; 3014 3015 parent = NULL; 3016 rule = NULL; 3017 3018 hlist_for_each_entry_safe(rule, node2, 3019 &pf->fdir_filter_list, fdir_node) { 3020 /* hash found, or no matching entry */ 3021 if (rule->fd_id >= sw_idx) 3022 break; 3023 parent = rule; 3024 } 3025 3026 /* if there is an old rule occupying our place remove it */ 3027 if (rule && (rule->fd_id == sw_idx)) { 3028 /* Remove this rule, since we're either deleting it, or 3029 * replacing it. 3030 */ 3031 err = i40e_add_del_fdir(vsi, rule, false); 3032 hlist_del(&rule->fdir_node); 3033 kfree(rule); 3034 pf->fdir_pf_active_filters--; 3035 } 3036 3037 /* If we weren't given an input, this is a delete, so just return the 3038 * error code indicating if there was an entry at the requested slot 3039 */ 3040 if (!input) 3041 return err; 3042 3043 /* Otherwise, install the new rule as requested */ 3044 INIT_HLIST_NODE(&input->fdir_node); 3045 3046 /* add filter to the list */ 3047 if (parent) 3048 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3049 else 3050 hlist_add_head(&input->fdir_node, 3051 &pf->fdir_filter_list); 3052 3053 /* update counts */ 3054 pf->fdir_pf_active_filters++; 3055 3056 return 0; 3057 } 3058 3059 /** 3060 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3061 * @pf: pointer to PF structure 3062 * 3063 * This function searches the list of filters and determines which FLX_PIT 3064 * entries are still required. It will prune any entries which are no longer 3065 * in use after the deletion. 3066 **/ 3067 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3068 { 3069 struct i40e_flex_pit *entry, *tmp; 3070 struct i40e_fdir_filter *rule; 3071 3072 /* First, we'll check the l3 table */ 3073 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3074 bool found = false; 3075 3076 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3077 if (rule->flow_type != IP_USER_FLOW) 3078 continue; 3079 if (rule->flex_filter && 3080 rule->flex_offset == entry->src_offset) { 3081 found = true; 3082 break; 3083 } 3084 } 3085 3086 /* If we didn't find the filter, then we can prune this entry 3087 * from the list. 3088 */ 3089 if (!found) { 3090 list_del(&entry->list); 3091 kfree(entry); 3092 } 3093 } 3094 3095 /* Followed by the L4 table */ 3096 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3097 bool found = false; 3098 3099 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3100 /* Skip this filter if it's L3, since we already 3101 * checked those in the above loop 3102 */ 3103 if (rule->flow_type == IP_USER_FLOW) 3104 continue; 3105 if (rule->flex_filter && 3106 rule->flex_offset == entry->src_offset) { 3107 found = true; 3108 break; 3109 } 3110 } 3111 3112 /* If we didn't find the filter, then we can prune this entry 3113 * from the list. 3114 */ 3115 if (!found) { 3116 list_del(&entry->list); 3117 kfree(entry); 3118 } 3119 } 3120 } 3121 3122 /** 3123 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3124 * @vsi: Pointer to the targeted VSI 3125 * @cmd: The command to get or set Rx flow classification rules 3126 * 3127 * The function removes a Flow Director filter entry from the 3128 * hlist of the corresponding PF 3129 * 3130 * Returns 0 on success 3131 */ 3132 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3133 struct ethtool_rxnfc *cmd) 3134 { 3135 struct ethtool_rx_flow_spec *fsp = 3136 (struct ethtool_rx_flow_spec *)&cmd->fs; 3137 struct i40e_pf *pf = vsi->back; 3138 int ret = 0; 3139 3140 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3141 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3142 return -EBUSY; 3143 3144 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3145 return -EBUSY; 3146 3147 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3148 3149 i40e_prune_flex_pit_list(pf); 3150 3151 i40e_fdir_check_and_reenable(pf); 3152 return ret; 3153 } 3154 3155 /** 3156 * i40e_unused_pit_index - Find an unused PIT index for given list 3157 * @pf: the PF data structure 3158 * 3159 * Find the first unused flexible PIT index entry. We search both the L3 and 3160 * L4 flexible PIT lists so that the returned index is unique and unused by 3161 * either currently programmed L3 or L4 filters. We use a bit field as storage 3162 * to track which indexes are already used. 3163 **/ 3164 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3165 { 3166 unsigned long available_index = 0xFF; 3167 struct i40e_flex_pit *entry; 3168 3169 /* We need to make sure that the new index isn't in use by either L3 3170 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3171 * L4 to use the same index. 3172 */ 3173 3174 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3175 clear_bit(entry->pit_index, &available_index); 3176 3177 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3178 clear_bit(entry->pit_index, &available_index); 3179 3180 return find_first_bit(&available_index, 8); 3181 } 3182 3183 /** 3184 * i40e_find_flex_offset - Find an existing flex src_offset 3185 * @flex_pit_list: L3 or L4 flex PIT list 3186 * @src_offset: new src_offset to find 3187 * 3188 * Searches the flex_pit_list for an existing offset. If no offset is 3189 * currently programmed, then this will return an ERR_PTR if there is no space 3190 * to add a new offset, otherwise it returns NULL. 3191 **/ 3192 static 3193 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3194 u16 src_offset) 3195 { 3196 struct i40e_flex_pit *entry; 3197 int size = 0; 3198 3199 /* Search for the src_offset first. If we find a matching entry 3200 * already programmed, we can simply re-use it. 3201 */ 3202 list_for_each_entry(entry, flex_pit_list, list) { 3203 size++; 3204 if (entry->src_offset == src_offset) 3205 return entry; 3206 } 3207 3208 /* If we haven't found an entry yet, then the provided src offset has 3209 * not yet been programmed. We will program the src offset later on, 3210 * but we need to indicate whether there is enough space to do so 3211 * here. We'll make use of ERR_PTR for this purpose. 3212 */ 3213 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3214 return ERR_PTR(-ENOSPC); 3215 3216 return NULL; 3217 } 3218 3219 /** 3220 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3221 * @flex_pit_list: L3 or L4 flex PIT list 3222 * @src_offset: new src_offset to add 3223 * @pit_index: the PIT index to program 3224 * 3225 * This function programs the new src_offset to the list. It is expected that 3226 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3227 * that this offset is not programmed, and that the list has enough space to 3228 * store another offset. 3229 * 3230 * Returns 0 on success, and negative value on error. 3231 **/ 3232 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3233 u16 src_offset, 3234 u8 pit_index) 3235 { 3236 struct i40e_flex_pit *new_pit, *entry; 3237 3238 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3239 if (!new_pit) 3240 return -ENOMEM; 3241 3242 new_pit->src_offset = src_offset; 3243 new_pit->pit_index = pit_index; 3244 3245 /* We need to insert this item such that the list is sorted by 3246 * src_offset in ascending order. 3247 */ 3248 list_for_each_entry(entry, flex_pit_list, list) { 3249 if (new_pit->src_offset < entry->src_offset) { 3250 list_add_tail(&new_pit->list, &entry->list); 3251 return 0; 3252 } 3253 3254 /* If we found an entry with our offset already programmed we 3255 * can simply return here, after freeing the memory. However, 3256 * if the pit_index does not match we need to report an error. 3257 */ 3258 if (new_pit->src_offset == entry->src_offset) { 3259 int err = 0; 3260 3261 /* If the PIT index is not the same we can't re-use 3262 * the entry, so we must report an error. 3263 */ 3264 if (new_pit->pit_index != entry->pit_index) 3265 err = -EINVAL; 3266 3267 kfree(new_pit); 3268 return err; 3269 } 3270 } 3271 3272 /* If we reached here, then we haven't yet added the item. This means 3273 * that we should add the item at the end of the list. 3274 */ 3275 list_add_tail(&new_pit->list, flex_pit_list); 3276 return 0; 3277 } 3278 3279 /** 3280 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3281 * @pf: Pointer to the PF structure 3282 * @flex_pit_list: list of flexible src offsets in use 3283 * #flex_pit_start: index to first entry for this section of the table 3284 * 3285 * In order to handle flexible data, the hardware uses a table of values 3286 * called the FLX_PIT table. This table is used to indicate which sections of 3287 * the input correspond to what PIT index values. Unfortunately, hardware is 3288 * very restrictive about programming this table. Entries must be ordered by 3289 * src_offset in ascending order, without duplicates. Additionally, unused 3290 * entries must be set to the unused index value, and must have valid size and 3291 * length according to the src_offset ordering. 3292 * 3293 * This function will reprogram the FLX_PIT register from a book-keeping 3294 * structure that we guarantee is already ordered correctly, and has no more 3295 * than 3 entries. 3296 * 3297 * To make things easier, we only support flexible values of one word length, 3298 * rather than allowing variable length flexible values. 3299 **/ 3300 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3301 struct list_head *flex_pit_list, 3302 int flex_pit_start) 3303 { 3304 struct i40e_flex_pit *entry = NULL; 3305 u16 last_offset = 0; 3306 int i = 0, j = 0; 3307 3308 /* First, loop over the list of flex PIT entries, and reprogram the 3309 * registers. 3310 */ 3311 list_for_each_entry(entry, flex_pit_list, list) { 3312 /* We have to be careful when programming values for the 3313 * largest SRC_OFFSET value. It is possible that adding 3314 * additional empty values at the end would overflow the space 3315 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3316 * we check here and add the empty values prior to adding the 3317 * largest value. 3318 * 3319 * To determine this, we will use a loop from i+1 to 3, which 3320 * will determine whether the unused entries would have valid 3321 * SRC_OFFSET. Note that there cannot be extra entries past 3322 * this value, because the only valid values would have been 3323 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3324 * have been added to the list in the first place. 3325 */ 3326 for (j = i + 1; j < 3; j++) { 3327 u16 offset = entry->src_offset + j; 3328 int index = flex_pit_start + i; 3329 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3330 1, 3331 offset - 3); 3332 3333 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3334 i40e_write_rx_ctl(&pf->hw, 3335 I40E_PRTQF_FLX_PIT(index), 3336 value); 3337 i++; 3338 } 3339 } 3340 3341 /* Now, we can program the actual value into the table */ 3342 i40e_write_rx_ctl(&pf->hw, 3343 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3344 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3345 1, 3346 entry->src_offset)); 3347 i++; 3348 } 3349 3350 /* In order to program the last entries in the table, we need to 3351 * determine the valid offset. If the list is empty, we'll just start 3352 * with 0. Otherwise, we'll start with the last item offset and add 1. 3353 * This ensures that all entries have valid sizes. If we don't do this 3354 * correctly, the hardware will disable flexible field parsing. 3355 */ 3356 if (!list_empty(flex_pit_list)) 3357 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3358 3359 for (; i < 3; i++, last_offset++) { 3360 i40e_write_rx_ctl(&pf->hw, 3361 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3362 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3363 1, 3364 last_offset)); 3365 } 3366 } 3367 3368 /** 3369 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3370 * @pf: pointer to the PF structure 3371 * 3372 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3373 * internal helper function for implementation details. 3374 **/ 3375 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3376 { 3377 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3378 I40E_FLEX_PIT_IDX_START_L3); 3379 3380 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3381 I40E_FLEX_PIT_IDX_START_L4); 3382 3383 /* We also need to program the L3 and L4 GLQF ORT register */ 3384 i40e_write_rx_ctl(&pf->hw, 3385 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3386 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3387 3, 1)); 3388 3389 i40e_write_rx_ctl(&pf->hw, 3390 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3391 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3392 3, 1)); 3393 } 3394 3395 /** 3396 * i40e_flow_str - Converts a flow_type into a human readable string 3397 * @flow_type: the flow type from a flow specification 3398 * 3399 * Currently only flow types we support are included here, and the string 3400 * value attempts to match what ethtool would use to configure this flow type. 3401 **/ 3402 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3403 { 3404 switch (fsp->flow_type & ~FLOW_EXT) { 3405 case TCP_V4_FLOW: 3406 return "tcp4"; 3407 case UDP_V4_FLOW: 3408 return "udp4"; 3409 case SCTP_V4_FLOW: 3410 return "sctp4"; 3411 case IP_USER_FLOW: 3412 return "ip4"; 3413 default: 3414 return "unknown"; 3415 } 3416 } 3417 3418 /** 3419 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3420 * @pit_index: PIT index to convert 3421 * 3422 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3423 * of range. 3424 **/ 3425 static u64 i40e_pit_index_to_mask(int pit_index) 3426 { 3427 switch (pit_index) { 3428 case 0: 3429 return I40E_FLEX_50_MASK; 3430 case 1: 3431 return I40E_FLEX_51_MASK; 3432 case 2: 3433 return I40E_FLEX_52_MASK; 3434 case 3: 3435 return I40E_FLEX_53_MASK; 3436 case 4: 3437 return I40E_FLEX_54_MASK; 3438 case 5: 3439 return I40E_FLEX_55_MASK; 3440 case 6: 3441 return I40E_FLEX_56_MASK; 3442 case 7: 3443 return I40E_FLEX_57_MASK; 3444 default: 3445 return 0; 3446 } 3447 } 3448 3449 /** 3450 * i40e_print_input_set - Show changes between two input sets 3451 * @vsi: the vsi being configured 3452 * @old: the old input set 3453 * @new: the new input set 3454 * 3455 * Print the difference between old and new input sets by showing which series 3456 * of words are toggled on or off. Only displays the bits we actually support 3457 * changing. 3458 **/ 3459 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3460 { 3461 struct i40e_pf *pf = vsi->back; 3462 bool old_value, new_value; 3463 int i; 3464 3465 old_value = !!(old & I40E_L3_SRC_MASK); 3466 new_value = !!(new & I40E_L3_SRC_MASK); 3467 if (old_value != new_value) 3468 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3469 old_value ? "ON" : "OFF", 3470 new_value ? "ON" : "OFF"); 3471 3472 old_value = !!(old & I40E_L3_DST_MASK); 3473 new_value = !!(new & I40E_L3_DST_MASK); 3474 if (old_value != new_value) 3475 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3476 old_value ? "ON" : "OFF", 3477 new_value ? "ON" : "OFF"); 3478 3479 old_value = !!(old & I40E_L4_SRC_MASK); 3480 new_value = !!(new & I40E_L4_SRC_MASK); 3481 if (old_value != new_value) 3482 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3483 old_value ? "ON" : "OFF", 3484 new_value ? "ON" : "OFF"); 3485 3486 old_value = !!(old & I40E_L4_DST_MASK); 3487 new_value = !!(new & I40E_L4_DST_MASK); 3488 if (old_value != new_value) 3489 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3490 old_value ? "ON" : "OFF", 3491 new_value ? "ON" : "OFF"); 3492 3493 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3494 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3495 if (old_value != new_value) 3496 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3497 old_value ? "ON" : "OFF", 3498 new_value ? "ON" : "OFF"); 3499 3500 /* Show change of flexible filter entries */ 3501 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3502 u64 flex_mask = i40e_pit_index_to_mask(i); 3503 3504 old_value = !!(old & flex_mask); 3505 new_value = !!(new & flex_mask); 3506 if (old_value != new_value) 3507 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3508 i, 3509 old_value ? "ON" : "OFF", 3510 new_value ? "ON" : "OFF"); 3511 } 3512 3513 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3514 old); 3515 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3516 new); 3517 } 3518 3519 /** 3520 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3521 * @vsi: pointer to the targeted VSI 3522 * @fsp: pointer to Rx flow specification 3523 * @userdef: userdefined data from flow specification 3524 * 3525 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3526 * for partial matches exists with a few limitations. First, hardware only 3527 * supports masking by word boundary (2 bytes) and not per individual bit. 3528 * Second, hardware is limited to using one mask for a flow type and cannot 3529 * use a separate mask for each filter. 3530 * 3531 * To support these limitations, if we already have a configured filter for 3532 * the specified type, this function enforces that new filters of the type 3533 * match the configured input set. Otherwise, if we do not have a filter of 3534 * the specified type, we allow the input set to be updated to match the 3535 * desired filter. 3536 * 3537 * To help ensure that administrators understand why filters weren't displayed 3538 * as supported, we print a diagnostic message displaying how the input set 3539 * would change and warning to delete the preexisting filters if required. 3540 * 3541 * Returns 0 on successful input set match, and a negative return code on 3542 * failure. 3543 **/ 3544 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3545 struct ethtool_rx_flow_spec *fsp, 3546 struct i40e_rx_flow_userdef *userdef) 3547 { 3548 struct i40e_pf *pf = vsi->back; 3549 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3550 struct ethtool_usrip4_spec *usr_ip4_spec; 3551 u64 current_mask, new_mask; 3552 bool new_flex_offset = false; 3553 bool flex_l3 = false; 3554 u16 *fdir_filter_count; 3555 u16 index, src_offset = 0; 3556 u8 pit_index = 0; 3557 int err; 3558 3559 switch (fsp->flow_type & ~FLOW_EXT) { 3560 case SCTP_V4_FLOW: 3561 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3562 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3563 break; 3564 case TCP_V4_FLOW: 3565 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3566 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3567 break; 3568 case UDP_V4_FLOW: 3569 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3570 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3571 break; 3572 case IP_USER_FLOW: 3573 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3574 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3575 flex_l3 = true; 3576 break; 3577 default: 3578 return -EOPNOTSUPP; 3579 } 3580 3581 /* Read the current input set from register memory. */ 3582 current_mask = i40e_read_fd_input_set(pf, index); 3583 new_mask = current_mask; 3584 3585 /* Determine, if any, the required changes to the input set in order 3586 * to support the provided mask. 3587 * 3588 * Hardware only supports masking at word (2 byte) granularity and does 3589 * not support full bitwise masking. This implementation simplifies 3590 * even further and only supports fully enabled or fully disabled 3591 * masks for each field, even though we could split the ip4src and 3592 * ip4dst fields. 3593 */ 3594 switch (fsp->flow_type & ~FLOW_EXT) { 3595 case SCTP_V4_FLOW: 3596 new_mask &= ~I40E_VERIFY_TAG_MASK; 3597 /* Fall through */ 3598 case TCP_V4_FLOW: 3599 case UDP_V4_FLOW: 3600 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3601 3602 /* IPv4 source address */ 3603 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3604 new_mask |= I40E_L3_SRC_MASK; 3605 else if (!tcp_ip4_spec->ip4src) 3606 new_mask &= ~I40E_L3_SRC_MASK; 3607 else 3608 return -EOPNOTSUPP; 3609 3610 /* IPv4 destination address */ 3611 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3612 new_mask |= I40E_L3_DST_MASK; 3613 else if (!tcp_ip4_spec->ip4dst) 3614 new_mask &= ~I40E_L3_DST_MASK; 3615 else 3616 return -EOPNOTSUPP; 3617 3618 /* L4 source port */ 3619 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3620 new_mask |= I40E_L4_SRC_MASK; 3621 else if (!tcp_ip4_spec->psrc) 3622 new_mask &= ~I40E_L4_SRC_MASK; 3623 else 3624 return -EOPNOTSUPP; 3625 3626 /* L4 destination port */ 3627 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3628 new_mask |= I40E_L4_DST_MASK; 3629 else if (!tcp_ip4_spec->pdst) 3630 new_mask &= ~I40E_L4_DST_MASK; 3631 else 3632 return -EOPNOTSUPP; 3633 3634 /* Filtering on Type of Service is not supported. */ 3635 if (tcp_ip4_spec->tos) 3636 return -EOPNOTSUPP; 3637 3638 break; 3639 case IP_USER_FLOW: 3640 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3641 3642 /* IPv4 source address */ 3643 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3644 new_mask |= I40E_L3_SRC_MASK; 3645 else if (!usr_ip4_spec->ip4src) 3646 new_mask &= ~I40E_L3_SRC_MASK; 3647 else 3648 return -EOPNOTSUPP; 3649 3650 /* IPv4 destination address */ 3651 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3652 new_mask |= I40E_L3_DST_MASK; 3653 else if (!usr_ip4_spec->ip4dst) 3654 new_mask &= ~I40E_L3_DST_MASK; 3655 else 3656 return -EOPNOTSUPP; 3657 3658 /* First 4 bytes of L4 header */ 3659 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3660 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3661 else if (!usr_ip4_spec->l4_4_bytes) 3662 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3663 else 3664 return -EOPNOTSUPP; 3665 3666 /* Filtering on Type of Service is not supported. */ 3667 if (usr_ip4_spec->tos) 3668 return -EOPNOTSUPP; 3669 3670 /* Filtering on IP version is not supported */ 3671 if (usr_ip4_spec->ip_ver) 3672 return -EINVAL; 3673 3674 /* Filtering on L4 protocol is not supported */ 3675 if (usr_ip4_spec->proto) 3676 return -EINVAL; 3677 3678 break; 3679 default: 3680 return -EOPNOTSUPP; 3681 } 3682 3683 /* First, clear all flexible filter entries */ 3684 new_mask &= ~I40E_FLEX_INPUT_MASK; 3685 3686 /* If we have a flexible filter, try to add this offset to the correct 3687 * flexible filter PIT list. Once finished, we can update the mask. 3688 * If the src_offset changed, we will get a new mask value which will 3689 * trigger an input set change. 3690 */ 3691 if (userdef->flex_filter) { 3692 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3693 3694 /* Flexible offset must be even, since the flexible payload 3695 * must be aligned on 2-byte boundary. 3696 */ 3697 if (userdef->flex_offset & 0x1) { 3698 dev_warn(&pf->pdev->dev, 3699 "Flexible data offset must be 2-byte aligned\n"); 3700 return -EINVAL; 3701 } 3702 3703 src_offset = userdef->flex_offset >> 1; 3704 3705 /* FLX_PIT source offset value is only so large */ 3706 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3707 dev_warn(&pf->pdev->dev, 3708 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3709 return -EINVAL; 3710 } 3711 3712 /* See if this offset has already been programmed. If we get 3713 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3714 * if we get a NULL pointer, this means we will need to add 3715 * the offset. 3716 */ 3717 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3718 src_offset); 3719 if (IS_ERR(flex_pit)) 3720 return PTR_ERR(flex_pit); 3721 3722 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3723 * packet types, and thus we need to program both L3 and L4 3724 * flexible values. These must have identical flexible index, 3725 * as otherwise we can't correctly program the input set. So 3726 * we'll find both an L3 and L4 index and make sure they are 3727 * the same. 3728 */ 3729 if (flex_l3) { 3730 l3_flex_pit = 3731 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3732 src_offset); 3733 if (IS_ERR(l3_flex_pit)) 3734 return PTR_ERR(l3_flex_pit); 3735 3736 if (flex_pit) { 3737 /* If we already had a matching L4 entry, we 3738 * need to make sure that the L3 entry we 3739 * obtained uses the same index. 3740 */ 3741 if (l3_flex_pit) { 3742 if (l3_flex_pit->pit_index != 3743 flex_pit->pit_index) { 3744 return -EINVAL; 3745 } 3746 } else { 3747 new_flex_offset = true; 3748 } 3749 } else { 3750 flex_pit = l3_flex_pit; 3751 } 3752 } 3753 3754 /* If we didn't find an existing flex offset, we need to 3755 * program a new one. However, we don't immediately program it 3756 * here because we will wait to program until after we check 3757 * that it is safe to change the input set. 3758 */ 3759 if (!flex_pit) { 3760 new_flex_offset = true; 3761 pit_index = i40e_unused_pit_index(pf); 3762 } else { 3763 pit_index = flex_pit->pit_index; 3764 } 3765 3766 /* Update the mask with the new offset */ 3767 new_mask |= i40e_pit_index_to_mask(pit_index); 3768 } 3769 3770 /* If the mask and flexible filter offsets for this filter match the 3771 * currently programmed values we don't need any input set change, so 3772 * this filter is safe to install. 3773 */ 3774 if (new_mask == current_mask && !new_flex_offset) 3775 return 0; 3776 3777 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3778 i40e_flow_str(fsp)); 3779 i40e_print_input_set(vsi, current_mask, new_mask); 3780 if (new_flex_offset) { 3781 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3782 pit_index, src_offset); 3783 } 3784 3785 /* Hardware input sets are global across multiple ports, so even the 3786 * main port cannot change them when in MFP mode as this would impact 3787 * any filters on the other ports. 3788 */ 3789 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3790 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3791 return -EOPNOTSUPP; 3792 } 3793 3794 /* This filter requires us to update the input set. However, hardware 3795 * only supports one input set per flow type, and does not support 3796 * separate masks for each filter. This means that we can only support 3797 * a single mask for all filters of a specific type. 3798 * 3799 * If we have preexisting filters, they obviously depend on the 3800 * current programmed input set. Display a diagnostic message in this 3801 * case explaining why the filter could not be accepted. 3802 */ 3803 if (*fdir_filter_count) { 3804 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3805 i40e_flow_str(fsp), 3806 *fdir_filter_count); 3807 return -EOPNOTSUPP; 3808 } 3809 3810 i40e_write_fd_input_set(pf, index, new_mask); 3811 3812 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 3813 * frames. If we're programming the input set for IPv4/Other, we also 3814 * need to program the IPv4/Fragmented input set. Since we don't have 3815 * separate support, we'll always assume and enforce that the two flow 3816 * types must have matching input sets. 3817 */ 3818 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 3819 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 3820 new_mask); 3821 3822 /* Add the new offset and update table, if necessary */ 3823 if (new_flex_offset) { 3824 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3825 pit_index); 3826 if (err) 3827 return err; 3828 3829 if (flex_l3) { 3830 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3831 src_offset, 3832 pit_index); 3833 if (err) 3834 return err; 3835 } 3836 3837 i40e_reprogram_flex_pit(pf); 3838 } 3839 3840 return 0; 3841 } 3842 3843 /** 3844 * i40e_match_fdir_filter - Return true of two filters match 3845 * @a: pointer to filter struct 3846 * @b: pointer to filter struct 3847 * 3848 * Returns true if the two filters match exactly the same criteria. I.e. they 3849 * match the same flow type and have the same parameters. We don't need to 3850 * check any input-set since all filters of the same flow type must use the 3851 * same input set. 3852 **/ 3853 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 3854 struct i40e_fdir_filter *b) 3855 { 3856 /* The filters do not much if any of these criteria differ. */ 3857 if (a->dst_ip != b->dst_ip || 3858 a->src_ip != b->src_ip || 3859 a->dst_port != b->dst_port || 3860 a->src_port != b->src_port || 3861 a->flow_type != b->flow_type || 3862 a->ip4_proto != b->ip4_proto) 3863 return false; 3864 3865 return true; 3866 } 3867 3868 /** 3869 * i40e_disallow_matching_filters - Check that new filters differ 3870 * @vsi: pointer to the targeted VSI 3871 * @input: new filter to check 3872 * 3873 * Due to hardware limitations, it is not possible for two filters that match 3874 * similar criteria to be programmed at the same time. This is true for a few 3875 * reasons: 3876 * 3877 * (a) all filters matching a particular flow type must use the same input 3878 * set, that is they must match the same criteria. 3879 * (b) different flow types will never match the same packet, as the flow type 3880 * is decided by hardware before checking which rules apply. 3881 * (c) hardware has no way to distinguish which order filters apply in. 3882 * 3883 * Due to this, we can't really support using the location data to order 3884 * filters in the hardware parsing. It is technically possible for the user to 3885 * request two filters matching the same criteria but which select different 3886 * queues. In this case, rather than keep both filters in the list, we reject 3887 * the 2nd filter when the user requests adding it. 3888 * 3889 * This avoids needing to track location for programming the filter to 3890 * hardware, and ensures that we avoid some strange scenarios involving 3891 * deleting filters which match the same criteria. 3892 **/ 3893 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 3894 struct i40e_fdir_filter *input) 3895 { 3896 struct i40e_pf *pf = vsi->back; 3897 struct i40e_fdir_filter *rule; 3898 struct hlist_node *node2; 3899 3900 /* Loop through every filter, and check that it doesn't match */ 3901 hlist_for_each_entry_safe(rule, node2, 3902 &pf->fdir_filter_list, fdir_node) { 3903 /* Don't check the filters match if they share the same fd_id, 3904 * since the new filter is actually just updating the target 3905 * of the old filter. 3906 */ 3907 if (rule->fd_id == input->fd_id) 3908 continue; 3909 3910 /* If any filters match, then print a warning message to the 3911 * kernel message buffer and bail out. 3912 */ 3913 if (i40e_match_fdir_filter(rule, input)) { 3914 dev_warn(&pf->pdev->dev, 3915 "Existing user defined filter %d already matches this flow.\n", 3916 rule->fd_id); 3917 return -EINVAL; 3918 } 3919 } 3920 3921 return 0; 3922 } 3923 3924 /** 3925 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3926 * @vsi: pointer to the targeted VSI 3927 * @cmd: command to get or set RX flow classification rules 3928 * 3929 * Add Flow Director filters for a specific flow spec based on their 3930 * protocol. Returns 0 if the filters were successfully added. 3931 **/ 3932 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3933 struct ethtool_rxnfc *cmd) 3934 { 3935 struct i40e_rx_flow_userdef userdef; 3936 struct ethtool_rx_flow_spec *fsp; 3937 struct i40e_fdir_filter *input; 3938 u16 dest_vsi = 0, q_index = 0; 3939 struct i40e_pf *pf; 3940 int ret = -EINVAL; 3941 u8 dest_ctl; 3942 3943 if (!vsi) 3944 return -EINVAL; 3945 pf = vsi->back; 3946 3947 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3948 return -EOPNOTSUPP; 3949 3950 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3951 return -ENOSPC; 3952 3953 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3954 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3955 return -EBUSY; 3956 3957 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3958 return -EBUSY; 3959 3960 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3961 3962 /* Parse the user-defined field */ 3963 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3964 return -EINVAL; 3965 3966 /* Extended MAC field is not supported */ 3967 if (fsp->flow_type & FLOW_MAC_EXT) 3968 return -EINVAL; 3969 3970 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3971 if (ret) 3972 return ret; 3973 3974 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3975 pf->hw.func_caps.fd_filters_guaranteed)) { 3976 return -EINVAL; 3977 } 3978 3979 /* ring_cookie is either the drop index, or is a mask of the queue 3980 * index and VF id we wish to target. 3981 */ 3982 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3983 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3984 } else { 3985 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3986 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3987 3988 if (!vf) { 3989 if (ring >= vsi->num_queue_pairs) 3990 return -EINVAL; 3991 dest_vsi = vsi->id; 3992 } else { 3993 /* VFs are zero-indexed, so we subtract one here */ 3994 vf--; 3995 3996 if (vf >= pf->num_alloc_vfs) 3997 return -EINVAL; 3998 if (ring >= pf->vf[vf].num_queue_pairs) 3999 return -EINVAL; 4000 dest_vsi = pf->vf[vf].lan_vsi_id; 4001 } 4002 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4003 q_index = ring; 4004 } 4005 4006 input = kzalloc(sizeof(*input), GFP_KERNEL); 4007 4008 if (!input) 4009 return -ENOMEM; 4010 4011 input->fd_id = fsp->location; 4012 input->q_index = q_index; 4013 input->dest_vsi = dest_vsi; 4014 input->dest_ctl = dest_ctl; 4015 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4016 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4017 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4018 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4019 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4020 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4021 4022 /* Reverse the src and dest notion, since the HW expects them to be from 4023 * Tx perspective where as the input from user is from Rx filter view. 4024 */ 4025 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4026 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4027 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4028 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4029 4030 if (userdef.flex_filter) { 4031 input->flex_filter = true; 4032 input->flex_word = cpu_to_be16(userdef.flex_word); 4033 input->flex_offset = userdef.flex_offset; 4034 } 4035 4036 /* Avoid programming two filters with identical match criteria. */ 4037 ret = i40e_disallow_matching_filters(vsi, input); 4038 if (ret) 4039 goto free_filter_memory; 4040 4041 /* Add the input filter to the fdir_input_list, possibly replacing 4042 * a previous filter. Do not free the input structure after adding it 4043 * to the list as this would cause a use-after-free bug. 4044 */ 4045 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4046 ret = i40e_add_del_fdir(vsi, input, true); 4047 if (ret) 4048 goto remove_sw_rule; 4049 return 0; 4050 4051 remove_sw_rule: 4052 hlist_del(&input->fdir_node); 4053 pf->fdir_pf_active_filters--; 4054 free_filter_memory: 4055 kfree(input); 4056 return ret; 4057 } 4058 4059 /** 4060 * i40e_set_rxnfc - command to set RX flow classification rules 4061 * @netdev: network interface device structure 4062 * @cmd: ethtool rxnfc command 4063 * 4064 * Returns Success if the command is supported. 4065 **/ 4066 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4067 { 4068 struct i40e_netdev_priv *np = netdev_priv(netdev); 4069 struct i40e_vsi *vsi = np->vsi; 4070 struct i40e_pf *pf = vsi->back; 4071 int ret = -EOPNOTSUPP; 4072 4073 switch (cmd->cmd) { 4074 case ETHTOOL_SRXFH: 4075 ret = i40e_set_rss_hash_opt(pf, cmd); 4076 break; 4077 case ETHTOOL_SRXCLSRLINS: 4078 ret = i40e_add_fdir_ethtool(vsi, cmd); 4079 break; 4080 case ETHTOOL_SRXCLSRLDEL: 4081 ret = i40e_del_fdir_entry(vsi, cmd); 4082 break; 4083 default: 4084 break; 4085 } 4086 4087 return ret; 4088 } 4089 4090 /** 4091 * i40e_max_channels - get Max number of combined channels supported 4092 * @vsi: vsi pointer 4093 **/ 4094 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4095 { 4096 /* TODO: This code assumes DCB and FD is disabled for now. */ 4097 return vsi->alloc_queue_pairs; 4098 } 4099 4100 /** 4101 * i40e_get_channels - Get the current channels enabled and max supported etc. 4102 * @netdev: network interface device structure 4103 * @ch: ethtool channels structure 4104 * 4105 * We don't support separate tx and rx queues as channels. The other count 4106 * represents how many queues are being used for control. max_combined counts 4107 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4108 * q_vectors since we support a lot more queue pairs than q_vectors. 4109 **/ 4110 static void i40e_get_channels(struct net_device *dev, 4111 struct ethtool_channels *ch) 4112 { 4113 struct i40e_netdev_priv *np = netdev_priv(dev); 4114 struct i40e_vsi *vsi = np->vsi; 4115 struct i40e_pf *pf = vsi->back; 4116 4117 /* report maximum channels */ 4118 ch->max_combined = i40e_max_channels(vsi); 4119 4120 /* report info for other vector */ 4121 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4122 ch->max_other = ch->other_count; 4123 4124 /* Note: This code assumes DCB is disabled for now. */ 4125 ch->combined_count = vsi->num_queue_pairs; 4126 } 4127 4128 /** 4129 * i40e_set_channels - Set the new channels count. 4130 * @netdev: network interface device structure 4131 * @ch: ethtool channels structure 4132 * 4133 * The new channels count may not be the same as requested by the user 4134 * since it gets rounded down to a power of 2 value. 4135 **/ 4136 static int i40e_set_channels(struct net_device *dev, 4137 struct ethtool_channels *ch) 4138 { 4139 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4140 struct i40e_netdev_priv *np = netdev_priv(dev); 4141 unsigned int count = ch->combined_count; 4142 struct i40e_vsi *vsi = np->vsi; 4143 struct i40e_pf *pf = vsi->back; 4144 struct i40e_fdir_filter *rule; 4145 struct hlist_node *node2; 4146 int new_count; 4147 int err = 0; 4148 4149 /* We do not support setting channels for any other VSI at present */ 4150 if (vsi->type != I40E_VSI_MAIN) 4151 return -EINVAL; 4152 4153 /* We do not support setting channels via ethtool when TCs are 4154 * configured through mqprio 4155 */ 4156 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4157 return -EINVAL; 4158 4159 /* verify they are not requesting separate vectors */ 4160 if (!count || ch->rx_count || ch->tx_count) 4161 return -EINVAL; 4162 4163 /* verify other_count has not changed */ 4164 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4165 return -EINVAL; 4166 4167 /* verify the number of channels does not exceed hardware limits */ 4168 if (count > i40e_max_channels(vsi)) 4169 return -EINVAL; 4170 4171 /* verify that the number of channels does not invalidate any current 4172 * flow director rules 4173 */ 4174 hlist_for_each_entry_safe(rule, node2, 4175 &pf->fdir_filter_list, fdir_node) { 4176 if (rule->dest_ctl != drop && count <= rule->q_index) { 4177 dev_warn(&pf->pdev->dev, 4178 "Existing user defined filter %d assigns flow to queue %d\n", 4179 rule->fd_id, rule->q_index); 4180 err = -EINVAL; 4181 } 4182 } 4183 4184 if (err) { 4185 dev_err(&pf->pdev->dev, 4186 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4187 count); 4188 return err; 4189 } 4190 4191 /* update feature limits from largest to smallest supported values */ 4192 /* TODO: Flow director limit, DCB etc */ 4193 4194 /* use rss_reconfig to rebuild with new queue count and update traffic 4195 * class queue mapping 4196 */ 4197 new_count = i40e_reconfig_rss_queues(pf, count); 4198 if (new_count > 0) 4199 return 0; 4200 else 4201 return -EINVAL; 4202 } 4203 4204 /** 4205 * i40e_get_rxfh_key_size - get the RSS hash key size 4206 * @netdev: network interface device structure 4207 * 4208 * Returns the table size. 4209 **/ 4210 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4211 { 4212 return I40E_HKEY_ARRAY_SIZE; 4213 } 4214 4215 /** 4216 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4217 * @netdev: network interface device structure 4218 * 4219 * Returns the table size. 4220 **/ 4221 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4222 { 4223 return I40E_HLUT_ARRAY_SIZE; 4224 } 4225 4226 /** 4227 * i40e_get_rxfh - get the rx flow hash indirection table 4228 * @netdev: network interface device structure 4229 * @indir: indirection table 4230 * @key: hash key 4231 * @hfunc: hash function 4232 * 4233 * Reads the indirection table directly from the hardware. Returns 0 on 4234 * success. 4235 **/ 4236 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4237 u8 *hfunc) 4238 { 4239 struct i40e_netdev_priv *np = netdev_priv(netdev); 4240 struct i40e_vsi *vsi = np->vsi; 4241 u8 *lut, *seed = NULL; 4242 int ret; 4243 u16 i; 4244 4245 if (hfunc) 4246 *hfunc = ETH_RSS_HASH_TOP; 4247 4248 if (!indir) 4249 return 0; 4250 4251 seed = key; 4252 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4253 if (!lut) 4254 return -ENOMEM; 4255 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4256 if (ret) 4257 goto out; 4258 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4259 indir[i] = (u32)(lut[i]); 4260 4261 out: 4262 kfree(lut); 4263 4264 return ret; 4265 } 4266 4267 /** 4268 * i40e_set_rxfh - set the rx flow hash indirection table 4269 * @netdev: network interface device structure 4270 * @indir: indirection table 4271 * @key: hash key 4272 * 4273 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4274 * returns 0 after programming the table. 4275 **/ 4276 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4277 const u8 *key, const u8 hfunc) 4278 { 4279 struct i40e_netdev_priv *np = netdev_priv(netdev); 4280 struct i40e_vsi *vsi = np->vsi; 4281 struct i40e_pf *pf = vsi->back; 4282 u8 *seed = NULL; 4283 u16 i; 4284 4285 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4286 return -EOPNOTSUPP; 4287 4288 if (key) { 4289 if (!vsi->rss_hkey_user) { 4290 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4291 GFP_KERNEL); 4292 if (!vsi->rss_hkey_user) 4293 return -ENOMEM; 4294 } 4295 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4296 seed = vsi->rss_hkey_user; 4297 } 4298 if (!vsi->rss_lut_user) { 4299 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4300 if (!vsi->rss_lut_user) 4301 return -ENOMEM; 4302 } 4303 4304 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4305 if (indir) 4306 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4307 vsi->rss_lut_user[i] = (u8)(indir[i]); 4308 else 4309 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4310 vsi->rss_size); 4311 4312 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4313 I40E_HLUT_ARRAY_SIZE); 4314 } 4315 4316 /** 4317 * i40e_get_priv_flags - report device private flags 4318 * @dev: network interface device structure 4319 * 4320 * The get string set count and the string set should be matched for each 4321 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4322 * array. 4323 * 4324 * Returns a u32 bitmap of flags. 4325 **/ 4326 static u32 i40e_get_priv_flags(struct net_device *dev) 4327 { 4328 struct i40e_netdev_priv *np = netdev_priv(dev); 4329 struct i40e_vsi *vsi = np->vsi; 4330 struct i40e_pf *pf = vsi->back; 4331 u32 i, j, ret_flags = 0; 4332 4333 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4334 const struct i40e_priv_flags *priv_flags; 4335 4336 priv_flags = &i40e_gstrings_priv_flags[i]; 4337 4338 if (priv_flags->flag & pf->flags) 4339 ret_flags |= BIT(i); 4340 } 4341 4342 if (pf->hw.pf_id != 0) 4343 return ret_flags; 4344 4345 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4346 const struct i40e_priv_flags *priv_flags; 4347 4348 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4349 4350 if (priv_flags->flag & pf->flags) 4351 ret_flags |= BIT(i + j); 4352 } 4353 4354 return ret_flags; 4355 } 4356 4357 /** 4358 * i40e_set_priv_flags - set private flags 4359 * @dev: network interface device structure 4360 * @flags: bit flags to be set 4361 **/ 4362 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4363 { 4364 struct i40e_netdev_priv *np = netdev_priv(dev); 4365 struct i40e_vsi *vsi = np->vsi; 4366 struct i40e_pf *pf = vsi->back; 4367 u64 orig_flags, new_flags, changed_flags; 4368 u32 i, j; 4369 4370 orig_flags = READ_ONCE(pf->flags); 4371 new_flags = orig_flags; 4372 4373 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4374 const struct i40e_priv_flags *priv_flags; 4375 4376 priv_flags = &i40e_gstrings_priv_flags[i]; 4377 4378 if (flags & BIT(i)) 4379 new_flags |= priv_flags->flag; 4380 else 4381 new_flags &= ~(priv_flags->flag); 4382 4383 /* If this is a read-only flag, it can't be changed */ 4384 if (priv_flags->read_only && 4385 ((orig_flags ^ new_flags) & ~BIT(i))) 4386 return -EOPNOTSUPP; 4387 } 4388 4389 if (pf->hw.pf_id != 0) 4390 goto flags_complete; 4391 4392 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4393 const struct i40e_priv_flags *priv_flags; 4394 4395 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4396 4397 if (flags & BIT(i + j)) 4398 new_flags |= priv_flags->flag; 4399 else 4400 new_flags &= ~(priv_flags->flag); 4401 4402 /* If this is a read-only flag, it can't be changed */ 4403 if (priv_flags->read_only && 4404 ((orig_flags ^ new_flags) & ~BIT(i))) 4405 return -EOPNOTSUPP; 4406 } 4407 4408 flags_complete: 4409 /* Before we finalize any flag changes, we need to perform some 4410 * checks to ensure that the changes are supported and safe. 4411 */ 4412 4413 /* ATR eviction is not supported on all devices */ 4414 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4415 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4416 return -EOPNOTSUPP; 4417 4418 /* Disable FW LLDP not supported if NPAR active or if FW 4419 * API version < 1.7 4420 */ 4421 if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4422 if (pf->hw.func_caps.npar_enable) { 4423 dev_warn(&pf->pdev->dev, 4424 "Unable to stop FW LLDP if NPAR active\n"); 4425 return -EOPNOTSUPP; 4426 } 4427 4428 if (pf->hw.aq.api_maj_ver < 1 || 4429 (pf->hw.aq.api_maj_ver == 1 && 4430 pf->hw.aq.api_min_ver < 7)) { 4431 dev_warn(&pf->pdev->dev, 4432 "FW ver does not support stopping FW LLDP\n"); 4433 return -EOPNOTSUPP; 4434 } 4435 } 4436 4437 /* Compare and exchange the new flags into place. If we failed, that 4438 * is if cmpxchg returns anything but the old value, this means that 4439 * something else has modified the flags variable since we copied it 4440 * originally. We'll just punt with an error and log something in the 4441 * message buffer. 4442 */ 4443 if (cmpxchg64(&pf->flags, orig_flags, new_flags) != orig_flags) { 4444 dev_warn(&pf->pdev->dev, 4445 "Unable to update pf->flags as it was modified by another thread...\n"); 4446 return -EAGAIN; 4447 } 4448 4449 changed_flags = orig_flags ^ new_flags; 4450 4451 /* Process any additional changes needed as a result of flag changes. 4452 * The changed_flags value reflects the list of bits that were 4453 * changed in the code above. 4454 */ 4455 4456 /* Flush current ATR settings if ATR was disabled */ 4457 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4458 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4459 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4460 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4461 } 4462 4463 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4464 u16 sw_flags = 0, valid_flags = 0; 4465 int ret; 4466 4467 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4468 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4469 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4470 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4471 0, NULL); 4472 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4473 dev_info(&pf->pdev->dev, 4474 "couldn't set switch config bits, err %s aq_err %s\n", 4475 i40e_stat_str(&pf->hw, ret), 4476 i40e_aq_str(&pf->hw, 4477 pf->hw.aq.asq_last_status)); 4478 /* not a fatal problem, just keep going */ 4479 } 4480 } 4481 4482 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4483 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4484 struct i40e_dcbx_config *dcbcfg; 4485 int i; 4486 4487 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4488 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4489 /* reset local_dcbx_config to default */ 4490 dcbcfg = &pf->hw.local_dcbx_config; 4491 dcbcfg->etscfg.willing = 1; 4492 dcbcfg->etscfg.maxtcs = 0; 4493 dcbcfg->etscfg.tcbwtable[0] = 100; 4494 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4495 dcbcfg->etscfg.tcbwtable[i] = 0; 4496 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4497 dcbcfg->etscfg.prioritytable[i] = 0; 4498 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4499 dcbcfg->pfc.willing = 1; 4500 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4501 } else { 4502 i40e_aq_start_lldp(&pf->hw, NULL); 4503 } 4504 } 4505 4506 /* Issue reset to cause things to take effect, as additional bits 4507 * are added we will need to create a mask of bits requiring reset 4508 */ 4509 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4510 I40E_FLAG_LEGACY_RX | 4511 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4512 I40E_FLAG_DISABLE_FW_LLDP)) 4513 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4514 4515 return 0; 4516 } 4517 4518 /** 4519 * i40e_get_module_info - get (Q)SFP+ module type info 4520 * @netdev: network interface device structure 4521 * @modinfo: module EEPROM size and layout information structure 4522 **/ 4523 static int i40e_get_module_info(struct net_device *netdev, 4524 struct ethtool_modinfo *modinfo) 4525 { 4526 struct i40e_netdev_priv *np = netdev_priv(netdev); 4527 struct i40e_vsi *vsi = np->vsi; 4528 struct i40e_pf *pf = vsi->back; 4529 struct i40e_hw *hw = &pf->hw; 4530 u32 sff8472_comp = 0; 4531 u32 sff8472_swap = 0; 4532 u32 sff8636_rev = 0; 4533 i40e_status status; 4534 u32 type = 0; 4535 4536 /* Check if firmware supports reading module EEPROM. */ 4537 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4538 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4539 return -EINVAL; 4540 } 4541 4542 status = i40e_update_link_info(hw); 4543 if (status) 4544 return -EIO; 4545 4546 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4547 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4548 return -EINVAL; 4549 } 4550 4551 type = hw->phy.link_info.module_type[0]; 4552 4553 switch (type) { 4554 case I40E_MODULE_TYPE_SFP: 4555 status = i40e_aq_get_phy_register(hw, 4556 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4557 I40E_I2C_EEPROM_DEV_ADDR, 4558 I40E_MODULE_SFF_8472_COMP, 4559 &sff8472_comp, NULL); 4560 if (status) 4561 return -EIO; 4562 4563 status = i40e_aq_get_phy_register(hw, 4564 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4565 I40E_I2C_EEPROM_DEV_ADDR, 4566 I40E_MODULE_SFF_8472_SWAP, 4567 &sff8472_swap, NULL); 4568 if (status) 4569 return -EIO; 4570 4571 /* Check if the module requires address swap to access 4572 * the other EEPROM memory page. 4573 */ 4574 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4575 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4576 modinfo->type = ETH_MODULE_SFF_8079; 4577 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4578 } else if (sff8472_comp == 0x00) { 4579 /* Module is not SFF-8472 compliant */ 4580 modinfo->type = ETH_MODULE_SFF_8079; 4581 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4582 } else { 4583 modinfo->type = ETH_MODULE_SFF_8472; 4584 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4585 } 4586 break; 4587 case I40E_MODULE_TYPE_QSFP_PLUS: 4588 /* Read from memory page 0. */ 4589 status = i40e_aq_get_phy_register(hw, 4590 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4591 0, 4592 I40E_MODULE_REVISION_ADDR, 4593 &sff8636_rev, NULL); 4594 if (status) 4595 return -EIO; 4596 /* Determine revision compliance byte */ 4597 if (sff8636_rev > 0x02) { 4598 /* Module is SFF-8636 compliant */ 4599 modinfo->type = ETH_MODULE_SFF_8636; 4600 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4601 } else { 4602 modinfo->type = ETH_MODULE_SFF_8436; 4603 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4604 } 4605 break; 4606 case I40E_MODULE_TYPE_QSFP28: 4607 modinfo->type = ETH_MODULE_SFF_8636; 4608 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4609 break; 4610 default: 4611 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4612 return -EINVAL; 4613 } 4614 return 0; 4615 } 4616 4617 /** 4618 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4619 * @netdev: network interface device structure 4620 * @ee: EEPROM dump request structure 4621 * @data: buffer to be filled with EEPROM contents 4622 **/ 4623 static int i40e_get_module_eeprom(struct net_device *netdev, 4624 struct ethtool_eeprom *ee, 4625 u8 *data) 4626 { 4627 struct i40e_netdev_priv *np = netdev_priv(netdev); 4628 struct i40e_vsi *vsi = np->vsi; 4629 struct i40e_pf *pf = vsi->back; 4630 struct i40e_hw *hw = &pf->hw; 4631 bool is_sfp = false; 4632 i40e_status status; 4633 u32 value = 0; 4634 int i; 4635 4636 if (!ee || !ee->len || !data) 4637 return -EINVAL; 4638 4639 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4640 is_sfp = true; 4641 4642 for (i = 0; i < ee->len; i++) { 4643 u32 offset = i + ee->offset; 4644 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4645 4646 /* Check if we need to access the other memory page */ 4647 if (is_sfp) { 4648 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4649 offset -= ETH_MODULE_SFF_8079_LEN; 4650 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4651 } 4652 } else { 4653 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4654 /* Compute memory page number and offset. */ 4655 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4656 addr++; 4657 } 4658 } 4659 4660 status = i40e_aq_get_phy_register(hw, 4661 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4662 addr, offset, &value, NULL); 4663 if (status) 4664 return -EIO; 4665 data[i] = value; 4666 } 4667 return 0; 4668 } 4669 4670 static const struct ethtool_ops i40e_ethtool_ops = { 4671 .get_drvinfo = i40e_get_drvinfo, 4672 .get_regs_len = i40e_get_regs_len, 4673 .get_regs = i40e_get_regs, 4674 .nway_reset = i40e_nway_reset, 4675 .get_link = ethtool_op_get_link, 4676 .get_wol = i40e_get_wol, 4677 .set_wol = i40e_set_wol, 4678 .set_eeprom = i40e_set_eeprom, 4679 .get_eeprom_len = i40e_get_eeprom_len, 4680 .get_eeprom = i40e_get_eeprom, 4681 .get_ringparam = i40e_get_ringparam, 4682 .set_ringparam = i40e_set_ringparam, 4683 .get_pauseparam = i40e_get_pauseparam, 4684 .set_pauseparam = i40e_set_pauseparam, 4685 .get_msglevel = i40e_get_msglevel, 4686 .set_msglevel = i40e_set_msglevel, 4687 .get_rxnfc = i40e_get_rxnfc, 4688 .set_rxnfc = i40e_set_rxnfc, 4689 .self_test = i40e_diag_test, 4690 .get_strings = i40e_get_strings, 4691 .set_phys_id = i40e_set_phys_id, 4692 .get_sset_count = i40e_get_sset_count, 4693 .get_ethtool_stats = i40e_get_ethtool_stats, 4694 .get_coalesce = i40e_get_coalesce, 4695 .set_coalesce = i40e_set_coalesce, 4696 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4697 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4698 .get_rxfh = i40e_get_rxfh, 4699 .set_rxfh = i40e_set_rxfh, 4700 .get_channels = i40e_get_channels, 4701 .set_channels = i40e_set_channels, 4702 .get_module_info = i40e_get_module_info, 4703 .get_module_eeprom = i40e_get_module_eeprom, 4704 .get_ts_info = i40e_get_ts_info, 4705 .get_priv_flags = i40e_get_priv_flags, 4706 .set_priv_flags = i40e_set_priv_flags, 4707 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4708 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4709 .get_link_ksettings = i40e_get_link_ksettings, 4710 .set_link_ksettings = i40e_set_link_ksettings, 4711 }; 4712 4713 void i40e_set_ethtool_ops(struct net_device *netdev) 4714 { 4715 netdev->ethtool_ops = &i40e_ethtool_ops; 4716 } 4717