1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = sizeof_field(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("total-port-shutdown", 432 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1), 433 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 434 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 435 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 436 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 437 I40E_PRIV_FLAG("link-down-on-close", 438 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 439 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 440 I40E_PRIV_FLAG("disable-source-pruning", 441 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 442 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 443 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 444 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 445 }; 446 447 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 448 449 /* Private flags with a global effect, restricted to PF 0 */ 450 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 451 I40E_PRIV_FLAG("vf-true-promisc-support", 452 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 453 }; 454 455 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 456 457 /** 458 * i40e_partition_setting_complaint - generic complaint for MFP restriction 459 * @pf: the PF struct 460 **/ 461 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 462 { 463 dev_info(&pf->pdev->dev, 464 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 465 } 466 467 /** 468 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 469 * @pf: PF struct with phy_types 470 * @ks: ethtool link ksettings struct to fill out 471 * 472 **/ 473 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 474 struct ethtool_link_ksettings *ks) 475 { 476 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 477 u64 phy_types = pf->hw.phy.phy_types; 478 479 ethtool_link_ksettings_zero_link_mode(ks, supported); 480 ethtool_link_ksettings_zero_link_mode(ks, advertising); 481 482 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 483 ethtool_link_ksettings_add_link_mode(ks, supported, 484 1000baseT_Full); 485 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 486 ethtool_link_ksettings_add_link_mode(ks, advertising, 487 1000baseT_Full); 488 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 489 ethtool_link_ksettings_add_link_mode(ks, supported, 490 100baseT_Full); 491 ethtool_link_ksettings_add_link_mode(ks, advertising, 492 100baseT_Full); 493 } 494 } 495 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 496 phy_types & I40E_CAP_PHY_TYPE_XFI || 497 phy_types & I40E_CAP_PHY_TYPE_SFI || 498 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 499 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 500 ethtool_link_ksettings_add_link_mode(ks, supported, 501 10000baseT_Full); 502 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 503 ethtool_link_ksettings_add_link_mode(ks, advertising, 504 10000baseT_Full); 505 } 506 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 507 ethtool_link_ksettings_add_link_mode(ks, supported, 508 10000baseT_Full); 509 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 510 ethtool_link_ksettings_add_link_mode(ks, advertising, 511 10000baseT_Full); 512 } 513 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) { 514 ethtool_link_ksettings_add_link_mode(ks, supported, 515 2500baseT_Full); 516 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 517 ethtool_link_ksettings_add_link_mode(ks, advertising, 518 2500baseT_Full); 519 } 520 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) { 521 ethtool_link_ksettings_add_link_mode(ks, supported, 522 5000baseT_Full); 523 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 524 ethtool_link_ksettings_add_link_mode(ks, advertising, 525 5000baseT_Full); 526 } 527 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 528 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 529 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 530 ethtool_link_ksettings_add_link_mode(ks, supported, 531 40000baseCR4_Full); 532 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 533 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 534 ethtool_link_ksettings_add_link_mode(ks, supported, 535 40000baseCR4_Full); 536 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 537 ethtool_link_ksettings_add_link_mode(ks, advertising, 538 40000baseCR4_Full); 539 } 540 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 541 ethtool_link_ksettings_add_link_mode(ks, supported, 542 100baseT_Full); 543 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 544 ethtool_link_ksettings_add_link_mode(ks, advertising, 545 100baseT_Full); 546 } 547 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 548 ethtool_link_ksettings_add_link_mode(ks, supported, 549 1000baseT_Full); 550 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 551 ethtool_link_ksettings_add_link_mode(ks, advertising, 552 1000baseT_Full); 553 } 554 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) { 555 ethtool_link_ksettings_add_link_mode(ks, supported, 556 40000baseSR4_Full); 557 ethtool_link_ksettings_add_link_mode(ks, advertising, 558 40000baseSR4_Full); 559 } 560 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) { 561 ethtool_link_ksettings_add_link_mode(ks, supported, 562 40000baseLR4_Full); 563 ethtool_link_ksettings_add_link_mode(ks, advertising, 564 40000baseLR4_Full); 565 } 566 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 567 ethtool_link_ksettings_add_link_mode(ks, supported, 568 40000baseKR4_Full); 569 ethtool_link_ksettings_add_link_mode(ks, advertising, 570 40000baseKR4_Full); 571 } 572 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 573 ethtool_link_ksettings_add_link_mode(ks, supported, 574 20000baseKR2_Full); 575 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 576 ethtool_link_ksettings_add_link_mode(ks, advertising, 577 20000baseKR2_Full); 578 } 579 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 580 ethtool_link_ksettings_add_link_mode(ks, supported, 581 10000baseKX4_Full); 582 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 583 ethtool_link_ksettings_add_link_mode(ks, advertising, 584 10000baseKX4_Full); 585 } 586 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 587 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 588 ethtool_link_ksettings_add_link_mode(ks, supported, 589 10000baseKR_Full); 590 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 591 ethtool_link_ksettings_add_link_mode(ks, advertising, 592 10000baseKR_Full); 593 } 594 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 595 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 596 ethtool_link_ksettings_add_link_mode(ks, supported, 597 1000baseKX_Full); 598 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 599 ethtool_link_ksettings_add_link_mode(ks, advertising, 600 1000baseKX_Full); 601 } 602 /* need to add 25G PHY types */ 603 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 604 ethtool_link_ksettings_add_link_mode(ks, supported, 605 25000baseKR_Full); 606 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 607 ethtool_link_ksettings_add_link_mode(ks, advertising, 608 25000baseKR_Full); 609 } 610 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 611 ethtool_link_ksettings_add_link_mode(ks, supported, 612 25000baseCR_Full); 613 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 614 ethtool_link_ksettings_add_link_mode(ks, advertising, 615 25000baseCR_Full); 616 } 617 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 618 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 619 ethtool_link_ksettings_add_link_mode(ks, supported, 620 25000baseSR_Full); 621 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 622 ethtool_link_ksettings_add_link_mode(ks, advertising, 623 25000baseSR_Full); 624 } 625 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 626 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 627 ethtool_link_ksettings_add_link_mode(ks, supported, 628 25000baseCR_Full); 629 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 630 ethtool_link_ksettings_add_link_mode(ks, advertising, 631 25000baseCR_Full); 632 } 633 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 634 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 635 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 636 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 637 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 638 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 639 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 640 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 641 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 642 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 643 ethtool_link_ksettings_add_link_mode(ks, advertising, 644 FEC_NONE); 645 ethtool_link_ksettings_add_link_mode(ks, advertising, 646 FEC_RS); 647 ethtool_link_ksettings_add_link_mode(ks, advertising, 648 FEC_BASER); 649 } 650 } 651 /* need to add new 10G PHY types */ 652 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 653 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 654 ethtool_link_ksettings_add_link_mode(ks, supported, 655 10000baseCR_Full); 656 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 657 ethtool_link_ksettings_add_link_mode(ks, advertising, 658 10000baseCR_Full); 659 } 660 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 661 ethtool_link_ksettings_add_link_mode(ks, supported, 662 10000baseSR_Full); 663 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 664 ethtool_link_ksettings_add_link_mode(ks, advertising, 665 10000baseSR_Full); 666 } 667 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 668 ethtool_link_ksettings_add_link_mode(ks, supported, 669 10000baseLR_Full); 670 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 671 ethtool_link_ksettings_add_link_mode(ks, advertising, 672 10000baseLR_Full); 673 } 674 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 675 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 676 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 677 ethtool_link_ksettings_add_link_mode(ks, supported, 678 1000baseX_Full); 679 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 680 ethtool_link_ksettings_add_link_mode(ks, advertising, 681 1000baseX_Full); 682 } 683 /* Autoneg PHY types */ 684 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 685 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 686 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 687 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 688 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 689 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 690 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 691 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 692 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 693 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 694 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 695 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 696 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 697 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 698 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 699 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 700 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T || 701 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T || 702 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 703 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 704 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 705 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 706 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 707 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 708 ethtool_link_ksettings_add_link_mode(ks, supported, 709 Autoneg); 710 ethtool_link_ksettings_add_link_mode(ks, advertising, 711 Autoneg); 712 } 713 } 714 715 /** 716 * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask 717 * @req_fec_info: mask request FEC info 718 * @ks: ethtool ksettings to fill in 719 **/ 720 static void i40e_get_settings_link_up_fec(u8 req_fec_info, 721 struct ethtool_link_ksettings *ks) 722 { 723 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 724 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 725 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 726 727 if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) && 728 (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) { 729 ethtool_link_ksettings_add_link_mode(ks, advertising, 730 FEC_NONE); 731 ethtool_link_ksettings_add_link_mode(ks, advertising, 732 FEC_BASER); 733 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 734 } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) { 735 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 736 } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) { 737 ethtool_link_ksettings_add_link_mode(ks, advertising, 738 FEC_BASER); 739 } else { 740 ethtool_link_ksettings_add_link_mode(ks, advertising, 741 FEC_NONE); 742 } 743 } 744 745 /** 746 * i40e_get_settings_link_up - Get the Link settings for when link is up 747 * @hw: hw structure 748 * @ks: ethtool ksettings to fill in 749 * @netdev: network interface device structure 750 * @pf: pointer to physical function struct 751 **/ 752 static void i40e_get_settings_link_up(struct i40e_hw *hw, 753 struct ethtool_link_ksettings *ks, 754 struct net_device *netdev, 755 struct i40e_pf *pf) 756 { 757 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 758 struct ethtool_link_ksettings cap_ksettings; 759 u32 link_speed = hw_link_info->link_speed; 760 761 /* Initialize supported and advertised settings based on phy settings */ 762 switch (hw_link_info->phy_type) { 763 case I40E_PHY_TYPE_40GBASE_CR4: 764 case I40E_PHY_TYPE_40GBASE_CR4_CU: 765 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 766 ethtool_link_ksettings_add_link_mode(ks, supported, 767 40000baseCR4_Full); 768 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 769 ethtool_link_ksettings_add_link_mode(ks, advertising, 770 40000baseCR4_Full); 771 break; 772 case I40E_PHY_TYPE_XLAUI: 773 case I40E_PHY_TYPE_XLPPI: 774 case I40E_PHY_TYPE_40GBASE_AOC: 775 ethtool_link_ksettings_add_link_mode(ks, supported, 776 40000baseCR4_Full); 777 ethtool_link_ksettings_add_link_mode(ks, advertising, 778 40000baseCR4_Full); 779 break; 780 case I40E_PHY_TYPE_40GBASE_SR4: 781 ethtool_link_ksettings_add_link_mode(ks, supported, 782 40000baseSR4_Full); 783 ethtool_link_ksettings_add_link_mode(ks, advertising, 784 40000baseSR4_Full); 785 break; 786 case I40E_PHY_TYPE_40GBASE_LR4: 787 ethtool_link_ksettings_add_link_mode(ks, supported, 788 40000baseLR4_Full); 789 ethtool_link_ksettings_add_link_mode(ks, advertising, 790 40000baseLR4_Full); 791 break; 792 case I40E_PHY_TYPE_25GBASE_SR: 793 case I40E_PHY_TYPE_25GBASE_LR: 794 case I40E_PHY_TYPE_10GBASE_SR: 795 case I40E_PHY_TYPE_10GBASE_LR: 796 case I40E_PHY_TYPE_1000BASE_SX: 797 case I40E_PHY_TYPE_1000BASE_LX: 798 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 799 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 800 ethtool_link_ksettings_add_link_mode(ks, supported, 801 25000baseSR_Full); 802 ethtool_link_ksettings_add_link_mode(ks, advertising, 803 25000baseSR_Full); 804 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 805 ethtool_link_ksettings_add_link_mode(ks, supported, 806 10000baseSR_Full); 807 ethtool_link_ksettings_add_link_mode(ks, advertising, 808 10000baseSR_Full); 809 ethtool_link_ksettings_add_link_mode(ks, supported, 810 10000baseLR_Full); 811 ethtool_link_ksettings_add_link_mode(ks, advertising, 812 10000baseLR_Full); 813 ethtool_link_ksettings_add_link_mode(ks, supported, 814 1000baseX_Full); 815 ethtool_link_ksettings_add_link_mode(ks, advertising, 816 1000baseX_Full); 817 ethtool_link_ksettings_add_link_mode(ks, supported, 818 10000baseT_Full); 819 if (hw_link_info->module_type[2] & 820 I40E_MODULE_TYPE_1000BASE_SX || 821 hw_link_info->module_type[2] & 822 I40E_MODULE_TYPE_1000BASE_LX) { 823 ethtool_link_ksettings_add_link_mode(ks, supported, 824 1000baseT_Full); 825 if (hw_link_info->requested_speeds & 826 I40E_LINK_SPEED_1GB) 827 ethtool_link_ksettings_add_link_mode( 828 ks, advertising, 1000baseT_Full); 829 } 830 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 831 ethtool_link_ksettings_add_link_mode(ks, advertising, 832 10000baseT_Full); 833 break; 834 case I40E_PHY_TYPE_10GBASE_T: 835 case I40E_PHY_TYPE_5GBASE_T: 836 case I40E_PHY_TYPE_2_5GBASE_T: 837 case I40E_PHY_TYPE_1000BASE_T: 838 case I40E_PHY_TYPE_100BASE_TX: 839 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 840 ethtool_link_ksettings_add_link_mode(ks, supported, 841 10000baseT_Full); 842 ethtool_link_ksettings_add_link_mode(ks, supported, 843 5000baseT_Full); 844 ethtool_link_ksettings_add_link_mode(ks, supported, 845 2500baseT_Full); 846 ethtool_link_ksettings_add_link_mode(ks, supported, 847 1000baseT_Full); 848 ethtool_link_ksettings_add_link_mode(ks, supported, 849 100baseT_Full); 850 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 851 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 852 ethtool_link_ksettings_add_link_mode(ks, advertising, 853 10000baseT_Full); 854 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 855 ethtool_link_ksettings_add_link_mode(ks, advertising, 856 5000baseT_Full); 857 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 858 ethtool_link_ksettings_add_link_mode(ks, advertising, 859 2500baseT_Full); 860 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 861 ethtool_link_ksettings_add_link_mode(ks, advertising, 862 1000baseT_Full); 863 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 864 ethtool_link_ksettings_add_link_mode(ks, advertising, 865 100baseT_Full); 866 break; 867 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 868 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 869 ethtool_link_ksettings_add_link_mode(ks, supported, 870 1000baseT_Full); 871 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 872 ethtool_link_ksettings_add_link_mode(ks, advertising, 873 1000baseT_Full); 874 break; 875 case I40E_PHY_TYPE_10GBASE_CR1_CU: 876 case I40E_PHY_TYPE_10GBASE_CR1: 877 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 878 ethtool_link_ksettings_add_link_mode(ks, supported, 879 10000baseT_Full); 880 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 881 ethtool_link_ksettings_add_link_mode(ks, advertising, 882 10000baseT_Full); 883 break; 884 case I40E_PHY_TYPE_XAUI: 885 case I40E_PHY_TYPE_XFI: 886 case I40E_PHY_TYPE_SFI: 887 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 888 case I40E_PHY_TYPE_10GBASE_AOC: 889 ethtool_link_ksettings_add_link_mode(ks, supported, 890 10000baseT_Full); 891 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 892 ethtool_link_ksettings_add_link_mode(ks, advertising, 893 10000baseT_Full); 894 break; 895 case I40E_PHY_TYPE_SGMII: 896 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 897 ethtool_link_ksettings_add_link_mode(ks, supported, 898 1000baseT_Full); 899 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 900 ethtool_link_ksettings_add_link_mode(ks, advertising, 901 1000baseT_Full); 902 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 903 ethtool_link_ksettings_add_link_mode(ks, supported, 904 100baseT_Full); 905 if (hw_link_info->requested_speeds & 906 I40E_LINK_SPEED_100MB) 907 ethtool_link_ksettings_add_link_mode( 908 ks, advertising, 100baseT_Full); 909 } 910 break; 911 case I40E_PHY_TYPE_40GBASE_KR4: 912 case I40E_PHY_TYPE_25GBASE_KR: 913 case I40E_PHY_TYPE_20GBASE_KR2: 914 case I40E_PHY_TYPE_10GBASE_KR: 915 case I40E_PHY_TYPE_10GBASE_KX4: 916 case I40E_PHY_TYPE_1000BASE_KX: 917 ethtool_link_ksettings_add_link_mode(ks, supported, 918 40000baseKR4_Full); 919 ethtool_link_ksettings_add_link_mode(ks, supported, 920 25000baseKR_Full); 921 ethtool_link_ksettings_add_link_mode(ks, supported, 922 20000baseKR2_Full); 923 ethtool_link_ksettings_add_link_mode(ks, supported, 924 10000baseKR_Full); 925 ethtool_link_ksettings_add_link_mode(ks, supported, 926 10000baseKX4_Full); 927 ethtool_link_ksettings_add_link_mode(ks, supported, 928 1000baseKX_Full); 929 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 930 ethtool_link_ksettings_add_link_mode(ks, advertising, 931 40000baseKR4_Full); 932 ethtool_link_ksettings_add_link_mode(ks, advertising, 933 25000baseKR_Full); 934 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 935 ethtool_link_ksettings_add_link_mode(ks, advertising, 936 20000baseKR2_Full); 937 ethtool_link_ksettings_add_link_mode(ks, advertising, 938 10000baseKR_Full); 939 ethtool_link_ksettings_add_link_mode(ks, advertising, 940 10000baseKX4_Full); 941 ethtool_link_ksettings_add_link_mode(ks, advertising, 942 1000baseKX_Full); 943 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 944 break; 945 case I40E_PHY_TYPE_25GBASE_CR: 946 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 947 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 948 ethtool_link_ksettings_add_link_mode(ks, supported, 949 25000baseCR_Full); 950 ethtool_link_ksettings_add_link_mode(ks, advertising, 951 25000baseCR_Full); 952 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 953 954 break; 955 case I40E_PHY_TYPE_25GBASE_AOC: 956 case I40E_PHY_TYPE_25GBASE_ACC: 957 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 958 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 959 ethtool_link_ksettings_add_link_mode(ks, supported, 960 25000baseCR_Full); 961 ethtool_link_ksettings_add_link_mode(ks, advertising, 962 25000baseCR_Full); 963 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 964 965 ethtool_link_ksettings_add_link_mode(ks, supported, 966 10000baseCR_Full); 967 ethtool_link_ksettings_add_link_mode(ks, advertising, 968 10000baseCR_Full); 969 break; 970 default: 971 /* if we got here and link is up something bad is afoot */ 972 netdev_info(netdev, 973 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 974 hw_link_info->phy_type); 975 } 976 977 /* Now that we've worked out everything that could be supported by the 978 * current PHY type, get what is supported by the NVM and intersect 979 * them to get what is truly supported 980 */ 981 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 982 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 983 ethtool_intersect_link_masks(ks, &cap_ksettings); 984 985 /* Set speed and duplex */ 986 switch (link_speed) { 987 case I40E_LINK_SPEED_40GB: 988 ks->base.speed = SPEED_40000; 989 break; 990 case I40E_LINK_SPEED_25GB: 991 ks->base.speed = SPEED_25000; 992 break; 993 case I40E_LINK_SPEED_20GB: 994 ks->base.speed = SPEED_20000; 995 break; 996 case I40E_LINK_SPEED_10GB: 997 ks->base.speed = SPEED_10000; 998 break; 999 case I40E_LINK_SPEED_5GB: 1000 ks->base.speed = SPEED_5000; 1001 break; 1002 case I40E_LINK_SPEED_2_5GB: 1003 ks->base.speed = SPEED_2500; 1004 break; 1005 case I40E_LINK_SPEED_1GB: 1006 ks->base.speed = SPEED_1000; 1007 break; 1008 case I40E_LINK_SPEED_100MB: 1009 ks->base.speed = SPEED_100; 1010 break; 1011 default: 1012 ks->base.speed = SPEED_UNKNOWN; 1013 break; 1014 } 1015 ks->base.duplex = DUPLEX_FULL; 1016 } 1017 1018 /** 1019 * i40e_get_settings_link_down - Get the Link settings for when link is down 1020 * @hw: hw structure 1021 * @ks: ethtool ksettings to fill in 1022 * @pf: pointer to physical function struct 1023 * 1024 * Reports link settings that can be determined when link is down 1025 **/ 1026 static void i40e_get_settings_link_down(struct i40e_hw *hw, 1027 struct ethtool_link_ksettings *ks, 1028 struct i40e_pf *pf) 1029 { 1030 /* link is down and the driver needs to fall back on 1031 * supported phy types to figure out what info to display 1032 */ 1033 i40e_phy_type_to_ethtool(pf, ks); 1034 1035 /* With no link speed and duplex are unknown */ 1036 ks->base.speed = SPEED_UNKNOWN; 1037 ks->base.duplex = DUPLEX_UNKNOWN; 1038 } 1039 1040 /** 1041 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 1042 * @netdev: network interface device structure 1043 * @ks: ethtool ksettings 1044 * 1045 * Reports speed/duplex settings based on media_type 1046 **/ 1047 static int i40e_get_link_ksettings(struct net_device *netdev, 1048 struct ethtool_link_ksettings *ks) 1049 { 1050 struct i40e_netdev_priv *np = netdev_priv(netdev); 1051 struct i40e_pf *pf = np->vsi->back; 1052 struct i40e_hw *hw = &pf->hw; 1053 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1054 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1055 1056 ethtool_link_ksettings_zero_link_mode(ks, supported); 1057 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1058 1059 if (link_up) 1060 i40e_get_settings_link_up(hw, ks, netdev, pf); 1061 else 1062 i40e_get_settings_link_down(hw, ks, pf); 1063 1064 /* Now set the settings that don't rely on link being up/down */ 1065 /* Set autoneg settings */ 1066 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1067 AUTONEG_ENABLE : AUTONEG_DISABLE); 1068 1069 /* Set media type settings */ 1070 switch (hw->phy.media_type) { 1071 case I40E_MEDIA_TYPE_BACKPLANE: 1072 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1073 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1074 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1075 ethtool_link_ksettings_add_link_mode(ks, advertising, 1076 Backplane); 1077 ks->base.port = PORT_NONE; 1078 break; 1079 case I40E_MEDIA_TYPE_BASET: 1080 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1081 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1082 ks->base.port = PORT_TP; 1083 break; 1084 case I40E_MEDIA_TYPE_DA: 1085 case I40E_MEDIA_TYPE_CX4: 1086 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1087 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1088 ks->base.port = PORT_DA; 1089 break; 1090 case I40E_MEDIA_TYPE_FIBER: 1091 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1092 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1093 ks->base.port = PORT_FIBRE; 1094 break; 1095 case I40E_MEDIA_TYPE_UNKNOWN: 1096 default: 1097 ks->base.port = PORT_OTHER; 1098 break; 1099 } 1100 1101 /* Set flow control settings */ 1102 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1103 1104 switch (hw->fc.requested_mode) { 1105 case I40E_FC_FULL: 1106 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1107 break; 1108 case I40E_FC_TX_PAUSE: 1109 ethtool_link_ksettings_add_link_mode(ks, advertising, 1110 Asym_Pause); 1111 break; 1112 case I40E_FC_RX_PAUSE: 1113 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1114 ethtool_link_ksettings_add_link_mode(ks, advertising, 1115 Asym_Pause); 1116 break; 1117 default: 1118 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1119 ethtool_link_ksettings_del_link_mode(ks, advertising, 1120 Asym_Pause); 1121 break; 1122 } 1123 1124 return 0; 1125 } 1126 1127 /** 1128 * i40e_set_link_ksettings - Set Speed and Duplex 1129 * @netdev: network interface device structure 1130 * @ks: ethtool ksettings 1131 * 1132 * Set speed/duplex per media_types advertised/forced 1133 **/ 1134 static int i40e_set_link_ksettings(struct net_device *netdev, 1135 const struct ethtool_link_ksettings *ks) 1136 { 1137 struct i40e_netdev_priv *np = netdev_priv(netdev); 1138 struct i40e_aq_get_phy_abilities_resp abilities; 1139 struct ethtool_link_ksettings safe_ks; 1140 struct ethtool_link_ksettings copy_ks; 1141 struct i40e_aq_set_phy_config config; 1142 struct i40e_pf *pf = np->vsi->back; 1143 struct i40e_vsi *vsi = np->vsi; 1144 struct i40e_hw *hw = &pf->hw; 1145 bool autoneg_changed = false; 1146 i40e_status status = 0; 1147 int timeout = 50; 1148 int err = 0; 1149 u8 autoneg; 1150 1151 /* Changing port settings is not supported if this isn't the 1152 * port's controlling PF 1153 */ 1154 if (hw->partition_id != 1) { 1155 i40e_partition_setting_complaint(pf); 1156 return -EOPNOTSUPP; 1157 } 1158 if (vsi != pf->vsi[pf->lan_vsi]) 1159 return -EOPNOTSUPP; 1160 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1161 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1162 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1163 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1164 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1165 return -EOPNOTSUPP; 1166 if (hw->device_id == I40E_DEV_ID_KX_B || 1167 hw->device_id == I40E_DEV_ID_KX_C || 1168 hw->device_id == I40E_DEV_ID_20G_KR2 || 1169 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1170 hw->device_id == I40E_DEV_ID_25G_B || 1171 hw->device_id == I40E_DEV_ID_KX_X722) { 1172 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1173 return -EOPNOTSUPP; 1174 } 1175 1176 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1177 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1178 1179 /* save autoneg out of ksettings */ 1180 autoneg = copy_ks.base.autoneg; 1181 1182 /* get our own copy of the bits to check against */ 1183 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1184 safe_ks.base.cmd = copy_ks.base.cmd; 1185 safe_ks.base.link_mode_masks_nwords = 1186 copy_ks.base.link_mode_masks_nwords; 1187 i40e_get_link_ksettings(netdev, &safe_ks); 1188 1189 /* Get link modes supported by hardware and check against modes 1190 * requested by the user. Return an error if unsupported mode was set. 1191 */ 1192 if (!bitmap_subset(copy_ks.link_modes.advertising, 1193 safe_ks.link_modes.supported, 1194 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1195 return -EINVAL; 1196 1197 /* set autoneg back to what it currently is */ 1198 copy_ks.base.autoneg = safe_ks.base.autoneg; 1199 1200 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1201 * trying to set something that we do not support. 1202 */ 1203 if (memcmp(©_ks.base, &safe_ks.base, 1204 sizeof(struct ethtool_link_settings))) 1205 return -EOPNOTSUPP; 1206 1207 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1208 timeout--; 1209 if (!timeout) 1210 return -EBUSY; 1211 usleep_range(1000, 2000); 1212 } 1213 1214 /* Get the current phy config */ 1215 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1216 NULL); 1217 if (status) { 1218 err = -EAGAIN; 1219 goto done; 1220 } 1221 1222 /* Copy abilities to config in case autoneg is not 1223 * set below 1224 */ 1225 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1226 config.abilities = abilities.abilities; 1227 1228 /* Check autoneg */ 1229 if (autoneg == AUTONEG_ENABLE) { 1230 /* If autoneg was not already enabled */ 1231 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1232 /* If autoneg is not supported, return error */ 1233 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1234 supported, 1235 Autoneg)) { 1236 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1237 err = -EINVAL; 1238 goto done; 1239 } 1240 /* Autoneg is allowed to change */ 1241 config.abilities = abilities.abilities | 1242 I40E_AQ_PHY_ENABLE_AN; 1243 autoneg_changed = true; 1244 } 1245 } else { 1246 /* If autoneg is currently enabled */ 1247 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1248 /* If autoneg is supported 10GBASE_T is the only PHY 1249 * that can disable it, so otherwise return error 1250 */ 1251 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1252 supported, 1253 Autoneg) && 1254 hw->phy.link_info.phy_type != 1255 I40E_PHY_TYPE_10GBASE_T) { 1256 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1257 err = -EINVAL; 1258 goto done; 1259 } 1260 /* Autoneg is allowed to change */ 1261 config.abilities = abilities.abilities & 1262 ~I40E_AQ_PHY_ENABLE_AN; 1263 autoneg_changed = true; 1264 } 1265 } 1266 1267 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1268 100baseT_Full)) 1269 config.link_speed |= I40E_LINK_SPEED_100MB; 1270 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1271 1000baseT_Full) || 1272 ethtool_link_ksettings_test_link_mode(ks, advertising, 1273 1000baseX_Full) || 1274 ethtool_link_ksettings_test_link_mode(ks, advertising, 1275 1000baseKX_Full)) 1276 config.link_speed |= I40E_LINK_SPEED_1GB; 1277 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1278 10000baseT_Full) || 1279 ethtool_link_ksettings_test_link_mode(ks, advertising, 1280 10000baseKX4_Full) || 1281 ethtool_link_ksettings_test_link_mode(ks, advertising, 1282 10000baseKR_Full) || 1283 ethtool_link_ksettings_test_link_mode(ks, advertising, 1284 10000baseCR_Full) || 1285 ethtool_link_ksettings_test_link_mode(ks, advertising, 1286 10000baseSR_Full) || 1287 ethtool_link_ksettings_test_link_mode(ks, advertising, 1288 10000baseLR_Full)) 1289 config.link_speed |= I40E_LINK_SPEED_10GB; 1290 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1291 2500baseT_Full)) 1292 config.link_speed |= I40E_LINK_SPEED_2_5GB; 1293 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1294 5000baseT_Full)) 1295 config.link_speed |= I40E_LINK_SPEED_5GB; 1296 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1297 20000baseKR2_Full)) 1298 config.link_speed |= I40E_LINK_SPEED_20GB; 1299 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1300 25000baseCR_Full) || 1301 ethtool_link_ksettings_test_link_mode(ks, advertising, 1302 25000baseKR_Full) || 1303 ethtool_link_ksettings_test_link_mode(ks, advertising, 1304 25000baseSR_Full)) 1305 config.link_speed |= I40E_LINK_SPEED_25GB; 1306 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1307 40000baseKR4_Full) || 1308 ethtool_link_ksettings_test_link_mode(ks, advertising, 1309 40000baseCR4_Full) || 1310 ethtool_link_ksettings_test_link_mode(ks, advertising, 1311 40000baseSR4_Full) || 1312 ethtool_link_ksettings_test_link_mode(ks, advertising, 1313 40000baseLR4_Full)) 1314 config.link_speed |= I40E_LINK_SPEED_40GB; 1315 1316 /* If speed didn't get set, set it to what it currently is. 1317 * This is needed because if advertise is 0 (as it is when autoneg 1318 * is disabled) then speed won't get set. 1319 */ 1320 if (!config.link_speed) 1321 config.link_speed = abilities.link_speed; 1322 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1323 /* copy over the rest of the abilities */ 1324 config.phy_type = abilities.phy_type; 1325 config.phy_type_ext = abilities.phy_type_ext; 1326 config.eee_capability = abilities.eee_capability; 1327 config.eeer = abilities.eeer_val; 1328 config.low_power_ctrl = abilities.d3_lpan; 1329 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1330 I40E_AQ_PHY_FEC_CONFIG_MASK; 1331 1332 /* save the requested speeds */ 1333 hw->phy.link_info.requested_speeds = config.link_speed; 1334 /* set link and auto negotiation so changes take effect */ 1335 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1336 /* If link is up put link down */ 1337 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1338 /* Tell the OS link is going down, the link will go 1339 * back up when fw says it is ready asynchronously 1340 */ 1341 i40e_print_link_message(vsi, false); 1342 netif_carrier_off(netdev); 1343 netif_tx_stop_all_queues(netdev); 1344 } 1345 1346 /* make the aq call */ 1347 status = i40e_aq_set_phy_config(hw, &config, NULL); 1348 if (status) { 1349 netdev_info(netdev, 1350 "Set phy config failed, err %s aq_err %s\n", 1351 i40e_stat_str(hw, status), 1352 i40e_aq_str(hw, hw->aq.asq_last_status)); 1353 err = -EAGAIN; 1354 goto done; 1355 } 1356 1357 status = i40e_update_link_info(hw); 1358 if (status) 1359 netdev_dbg(netdev, 1360 "Updating link info failed with err %s aq_err %s\n", 1361 i40e_stat_str(hw, status), 1362 i40e_aq_str(hw, hw->aq.asq_last_status)); 1363 1364 } else { 1365 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1366 } 1367 1368 done: 1369 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1370 1371 return err; 1372 } 1373 1374 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1375 { 1376 struct i40e_netdev_priv *np = netdev_priv(netdev); 1377 struct i40e_aq_get_phy_abilities_resp abilities; 1378 struct i40e_pf *pf = np->vsi->back; 1379 struct i40e_hw *hw = &pf->hw; 1380 i40e_status status = 0; 1381 u32 flags = 0; 1382 int err = 0; 1383 1384 flags = READ_ONCE(pf->flags); 1385 i40e_set_fec_in_flags(fec_cfg, &flags); 1386 1387 /* Get the current phy config */ 1388 memset(&abilities, 0, sizeof(abilities)); 1389 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1390 NULL); 1391 if (status) { 1392 err = -EAGAIN; 1393 goto done; 1394 } 1395 1396 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1397 struct i40e_aq_set_phy_config config; 1398 1399 memset(&config, 0, sizeof(config)); 1400 config.phy_type = abilities.phy_type; 1401 config.abilities = abilities.abilities; 1402 config.phy_type_ext = abilities.phy_type_ext; 1403 config.link_speed = abilities.link_speed; 1404 config.eee_capability = abilities.eee_capability; 1405 config.eeer = abilities.eeer_val; 1406 config.low_power_ctrl = abilities.d3_lpan; 1407 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1408 status = i40e_aq_set_phy_config(hw, &config, NULL); 1409 if (status) { 1410 netdev_info(netdev, 1411 "Set phy config failed, err %s aq_err %s\n", 1412 i40e_stat_str(hw, status), 1413 i40e_aq_str(hw, hw->aq.asq_last_status)); 1414 err = -EAGAIN; 1415 goto done; 1416 } 1417 pf->flags = flags; 1418 status = i40e_update_link_info(hw); 1419 if (status) 1420 /* debug level message only due to relation to the link 1421 * itself rather than to the FEC settings 1422 * (e.g. no physical connection etc.) 1423 */ 1424 netdev_dbg(netdev, 1425 "Updating link info failed with err %s aq_err %s\n", 1426 i40e_stat_str(hw, status), 1427 i40e_aq_str(hw, hw->aq.asq_last_status)); 1428 } 1429 1430 done: 1431 return err; 1432 } 1433 1434 static int i40e_get_fec_param(struct net_device *netdev, 1435 struct ethtool_fecparam *fecparam) 1436 { 1437 struct i40e_netdev_priv *np = netdev_priv(netdev); 1438 struct i40e_aq_get_phy_abilities_resp abilities; 1439 struct i40e_pf *pf = np->vsi->back; 1440 struct i40e_hw *hw = &pf->hw; 1441 i40e_status status = 0; 1442 int err = 0; 1443 u8 fec_cfg; 1444 1445 /* Get the current phy config */ 1446 memset(&abilities, 0, sizeof(abilities)); 1447 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1448 NULL); 1449 if (status) { 1450 err = -EAGAIN; 1451 goto done; 1452 } 1453 1454 fecparam->fec = 0; 1455 fec_cfg = abilities.fec_cfg_curr_mod_ext_info; 1456 if (fec_cfg & I40E_AQ_SET_FEC_AUTO) 1457 fecparam->fec |= ETHTOOL_FEC_AUTO; 1458 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS | 1459 I40E_AQ_SET_FEC_ABILITY_RS)) 1460 fecparam->fec |= ETHTOOL_FEC_RS; 1461 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR | 1462 I40E_AQ_SET_FEC_ABILITY_KR)) 1463 fecparam->fec |= ETHTOOL_FEC_BASER; 1464 if (fec_cfg == 0) 1465 fecparam->fec |= ETHTOOL_FEC_OFF; 1466 1467 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1468 fecparam->active_fec = ETHTOOL_FEC_BASER; 1469 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1470 fecparam->active_fec = ETHTOOL_FEC_RS; 1471 else 1472 fecparam->active_fec = ETHTOOL_FEC_OFF; 1473 done: 1474 return err; 1475 } 1476 1477 static int i40e_set_fec_param(struct net_device *netdev, 1478 struct ethtool_fecparam *fecparam) 1479 { 1480 struct i40e_netdev_priv *np = netdev_priv(netdev); 1481 struct i40e_pf *pf = np->vsi->back; 1482 struct i40e_hw *hw = &pf->hw; 1483 u8 fec_cfg = 0; 1484 int err = 0; 1485 1486 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1487 hw->device_id != I40E_DEV_ID_25G_B) { 1488 err = -EPERM; 1489 goto done; 1490 } 1491 1492 switch (fecparam->fec) { 1493 case ETHTOOL_FEC_AUTO: 1494 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1495 break; 1496 case ETHTOOL_FEC_RS: 1497 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1498 I40E_AQ_SET_FEC_ABILITY_RS); 1499 break; 1500 case ETHTOOL_FEC_BASER: 1501 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1502 I40E_AQ_SET_FEC_ABILITY_KR); 1503 break; 1504 case ETHTOOL_FEC_OFF: 1505 case ETHTOOL_FEC_NONE: 1506 fec_cfg = 0; 1507 break; 1508 default: 1509 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1510 fecparam->fec); 1511 err = -EINVAL; 1512 goto done; 1513 } 1514 1515 err = i40e_set_fec_cfg(netdev, fec_cfg); 1516 1517 done: 1518 return err; 1519 } 1520 1521 static int i40e_nway_reset(struct net_device *netdev) 1522 { 1523 /* restart autonegotiation */ 1524 struct i40e_netdev_priv *np = netdev_priv(netdev); 1525 struct i40e_pf *pf = np->vsi->back; 1526 struct i40e_hw *hw = &pf->hw; 1527 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1528 i40e_status ret = 0; 1529 1530 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1531 if (ret) { 1532 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1533 i40e_stat_str(hw, ret), 1534 i40e_aq_str(hw, hw->aq.asq_last_status)); 1535 return -EIO; 1536 } 1537 1538 return 0; 1539 } 1540 1541 /** 1542 * i40e_get_pauseparam - Get Flow Control status 1543 * @netdev: netdevice structure 1544 * @pause: buffer to return pause parameters 1545 * 1546 * Return tx/rx-pause status 1547 **/ 1548 static void i40e_get_pauseparam(struct net_device *netdev, 1549 struct ethtool_pauseparam *pause) 1550 { 1551 struct i40e_netdev_priv *np = netdev_priv(netdev); 1552 struct i40e_pf *pf = np->vsi->back; 1553 struct i40e_hw *hw = &pf->hw; 1554 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1555 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1556 1557 pause->autoneg = 1558 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1559 AUTONEG_ENABLE : AUTONEG_DISABLE); 1560 1561 /* PFC enabled so report LFC as off */ 1562 if (dcbx_cfg->pfc.pfcenable) { 1563 pause->rx_pause = 0; 1564 pause->tx_pause = 0; 1565 return; 1566 } 1567 1568 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1569 pause->rx_pause = 1; 1570 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1571 pause->tx_pause = 1; 1572 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1573 pause->rx_pause = 1; 1574 pause->tx_pause = 1; 1575 } 1576 } 1577 1578 /** 1579 * i40e_set_pauseparam - Set Flow Control parameter 1580 * @netdev: network interface device structure 1581 * @pause: return tx/rx flow control status 1582 **/ 1583 static int i40e_set_pauseparam(struct net_device *netdev, 1584 struct ethtool_pauseparam *pause) 1585 { 1586 struct i40e_netdev_priv *np = netdev_priv(netdev); 1587 struct i40e_pf *pf = np->vsi->back; 1588 struct i40e_vsi *vsi = np->vsi; 1589 struct i40e_hw *hw = &pf->hw; 1590 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1591 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1592 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1593 i40e_status status; 1594 u8 aq_failures; 1595 int err = 0; 1596 u32 is_an; 1597 1598 /* Changing the port's flow control is not supported if this isn't the 1599 * port's controlling PF 1600 */ 1601 if (hw->partition_id != 1) { 1602 i40e_partition_setting_complaint(pf); 1603 return -EOPNOTSUPP; 1604 } 1605 1606 if (vsi != pf->vsi[pf->lan_vsi]) 1607 return -EOPNOTSUPP; 1608 1609 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1610 if (pause->autoneg != is_an) { 1611 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1612 return -EOPNOTSUPP; 1613 } 1614 1615 /* If we have link and don't have autoneg */ 1616 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1617 /* Send message that it might not necessarily work*/ 1618 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1619 } 1620 1621 if (dcbx_cfg->pfc.pfcenable) { 1622 netdev_info(netdev, 1623 "Priority flow control enabled. Cannot set link flow control.\n"); 1624 return -EOPNOTSUPP; 1625 } 1626 1627 if (pause->rx_pause && pause->tx_pause) 1628 hw->fc.requested_mode = I40E_FC_FULL; 1629 else if (pause->rx_pause && !pause->tx_pause) 1630 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1631 else if (!pause->rx_pause && pause->tx_pause) 1632 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1633 else if (!pause->rx_pause && !pause->tx_pause) 1634 hw->fc.requested_mode = I40E_FC_NONE; 1635 else 1636 return -EINVAL; 1637 1638 /* Tell the OS link is going down, the link will go back up when fw 1639 * says it is ready asynchronously 1640 */ 1641 i40e_print_link_message(vsi, false); 1642 netif_carrier_off(netdev); 1643 netif_tx_stop_all_queues(netdev); 1644 1645 /* Set the fc mode and only restart an if link is up*/ 1646 status = i40e_set_fc(hw, &aq_failures, link_up); 1647 1648 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1649 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1650 i40e_stat_str(hw, status), 1651 i40e_aq_str(hw, hw->aq.asq_last_status)); 1652 err = -EAGAIN; 1653 } 1654 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1655 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1656 i40e_stat_str(hw, status), 1657 i40e_aq_str(hw, hw->aq.asq_last_status)); 1658 err = -EAGAIN; 1659 } 1660 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1661 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1662 i40e_stat_str(hw, status), 1663 i40e_aq_str(hw, hw->aq.asq_last_status)); 1664 err = -EAGAIN; 1665 } 1666 1667 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1668 /* Give it a little more time to try to come back */ 1669 msleep(75); 1670 if (!test_bit(__I40E_DOWN, pf->state)) 1671 return i40e_nway_reset(netdev); 1672 } 1673 1674 return err; 1675 } 1676 1677 static u32 i40e_get_msglevel(struct net_device *netdev) 1678 { 1679 struct i40e_netdev_priv *np = netdev_priv(netdev); 1680 struct i40e_pf *pf = np->vsi->back; 1681 u32 debug_mask = pf->hw.debug_mask; 1682 1683 if (debug_mask) 1684 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1685 1686 return pf->msg_enable; 1687 } 1688 1689 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1690 { 1691 struct i40e_netdev_priv *np = netdev_priv(netdev); 1692 struct i40e_pf *pf = np->vsi->back; 1693 1694 if (I40E_DEBUG_USER & data) 1695 pf->hw.debug_mask = data; 1696 else 1697 pf->msg_enable = data; 1698 } 1699 1700 static int i40e_get_regs_len(struct net_device *netdev) 1701 { 1702 int reg_count = 0; 1703 int i; 1704 1705 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1706 reg_count += i40e_reg_list[i].elements; 1707 1708 return reg_count * sizeof(u32); 1709 } 1710 1711 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1712 void *p) 1713 { 1714 struct i40e_netdev_priv *np = netdev_priv(netdev); 1715 struct i40e_pf *pf = np->vsi->back; 1716 struct i40e_hw *hw = &pf->hw; 1717 u32 *reg_buf = p; 1718 unsigned int i, j, ri; 1719 u32 reg; 1720 1721 /* Tell ethtool which driver-version-specific regs output we have. 1722 * 1723 * At some point, if we have ethtool doing special formatting of 1724 * this data, it will rely on this version number to know how to 1725 * interpret things. Hence, this needs to be updated if/when the 1726 * diags register table is changed. 1727 */ 1728 regs->version = 1; 1729 1730 /* loop through the diags reg table for what to print */ 1731 ri = 0; 1732 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1733 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1734 reg = i40e_reg_list[i].offset 1735 + (j * i40e_reg_list[i].stride); 1736 reg_buf[ri++] = rd32(hw, reg); 1737 } 1738 } 1739 1740 } 1741 1742 static int i40e_get_eeprom(struct net_device *netdev, 1743 struct ethtool_eeprom *eeprom, u8 *bytes) 1744 { 1745 struct i40e_netdev_priv *np = netdev_priv(netdev); 1746 struct i40e_hw *hw = &np->vsi->back->hw; 1747 struct i40e_pf *pf = np->vsi->back; 1748 int ret_val = 0, len, offset; 1749 u8 *eeprom_buff; 1750 u16 i, sectors; 1751 bool last; 1752 u32 magic; 1753 1754 #define I40E_NVM_SECTOR_SIZE 4096 1755 if (eeprom->len == 0) 1756 return -EINVAL; 1757 1758 /* check for NVMUpdate access method */ 1759 magic = hw->vendor_id | (hw->device_id << 16); 1760 if (eeprom->magic && eeprom->magic != magic) { 1761 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1762 int errno = 0; 1763 1764 /* make sure it is the right magic for NVMUpdate */ 1765 if ((eeprom->magic >> 16) != hw->device_id) 1766 errno = -EINVAL; 1767 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1768 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1769 errno = -EBUSY; 1770 else 1771 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1772 1773 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1774 dev_info(&pf->pdev->dev, 1775 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1776 ret_val, hw->aq.asq_last_status, errno, 1777 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1778 cmd->offset, cmd->data_size); 1779 1780 return errno; 1781 } 1782 1783 /* normal ethtool get_eeprom support */ 1784 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1785 1786 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1787 if (!eeprom_buff) 1788 return -ENOMEM; 1789 1790 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1791 if (ret_val) { 1792 dev_info(&pf->pdev->dev, 1793 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1794 ret_val, hw->aq.asq_last_status); 1795 goto free_buff; 1796 } 1797 1798 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1799 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1800 len = I40E_NVM_SECTOR_SIZE; 1801 last = false; 1802 for (i = 0; i < sectors; i++) { 1803 if (i == (sectors - 1)) { 1804 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1805 last = true; 1806 } 1807 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1808 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1809 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1810 last, NULL); 1811 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1812 dev_info(&pf->pdev->dev, 1813 "read NVM failed, invalid offset 0x%x\n", 1814 offset); 1815 break; 1816 } else if (ret_val && 1817 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1818 dev_info(&pf->pdev->dev, 1819 "read NVM failed, access, offset 0x%x\n", 1820 offset); 1821 break; 1822 } else if (ret_val) { 1823 dev_info(&pf->pdev->dev, 1824 "read NVM failed offset %d err=%d status=0x%x\n", 1825 offset, ret_val, hw->aq.asq_last_status); 1826 break; 1827 } 1828 } 1829 1830 i40e_release_nvm(hw); 1831 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1832 free_buff: 1833 kfree(eeprom_buff); 1834 return ret_val; 1835 } 1836 1837 static int i40e_get_eeprom_len(struct net_device *netdev) 1838 { 1839 struct i40e_netdev_priv *np = netdev_priv(netdev); 1840 struct i40e_hw *hw = &np->vsi->back->hw; 1841 u32 val; 1842 1843 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1844 if (hw->mac.type == I40E_MAC_X722) { 1845 val = X722_EEPROM_SCOPE_LIMIT + 1; 1846 return val; 1847 } 1848 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1849 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1850 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1851 /* register returns value in power of 2, 64Kbyte chunks. */ 1852 val = (64 * 1024) * BIT(val); 1853 return val; 1854 } 1855 1856 static int i40e_set_eeprom(struct net_device *netdev, 1857 struct ethtool_eeprom *eeprom, u8 *bytes) 1858 { 1859 struct i40e_netdev_priv *np = netdev_priv(netdev); 1860 struct i40e_hw *hw = &np->vsi->back->hw; 1861 struct i40e_pf *pf = np->vsi->back; 1862 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1863 int ret_val = 0; 1864 int errno = 0; 1865 u32 magic; 1866 1867 /* normal ethtool set_eeprom is not supported */ 1868 magic = hw->vendor_id | (hw->device_id << 16); 1869 if (eeprom->magic == magic) 1870 errno = -EOPNOTSUPP; 1871 /* check for NVMUpdate access method */ 1872 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1873 errno = -EINVAL; 1874 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1875 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1876 errno = -EBUSY; 1877 else 1878 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1879 1880 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1881 dev_info(&pf->pdev->dev, 1882 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1883 ret_val, hw->aq.asq_last_status, errno, 1884 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1885 cmd->offset, cmd->data_size); 1886 1887 return errno; 1888 } 1889 1890 static void i40e_get_drvinfo(struct net_device *netdev, 1891 struct ethtool_drvinfo *drvinfo) 1892 { 1893 struct i40e_netdev_priv *np = netdev_priv(netdev); 1894 struct i40e_vsi *vsi = np->vsi; 1895 struct i40e_pf *pf = vsi->back; 1896 1897 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1898 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1899 sizeof(drvinfo->fw_version)); 1900 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1901 sizeof(drvinfo->bus_info)); 1902 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1903 if (pf->hw.pf_id == 0) 1904 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1905 } 1906 1907 static void i40e_get_ringparam(struct net_device *netdev, 1908 struct ethtool_ringparam *ring) 1909 { 1910 struct i40e_netdev_priv *np = netdev_priv(netdev); 1911 struct i40e_pf *pf = np->vsi->back; 1912 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1913 1914 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1915 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1916 ring->rx_mini_max_pending = 0; 1917 ring->rx_jumbo_max_pending = 0; 1918 ring->rx_pending = vsi->rx_rings[0]->count; 1919 ring->tx_pending = vsi->tx_rings[0]->count; 1920 ring->rx_mini_pending = 0; 1921 ring->rx_jumbo_pending = 0; 1922 } 1923 1924 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1925 { 1926 if (i40e_enabled_xdp_vsi(vsi)) { 1927 return index < vsi->num_queue_pairs || 1928 (index >= vsi->alloc_queue_pairs && 1929 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1930 } 1931 1932 return index < vsi->num_queue_pairs; 1933 } 1934 1935 static int i40e_set_ringparam(struct net_device *netdev, 1936 struct ethtool_ringparam *ring) 1937 { 1938 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1939 struct i40e_netdev_priv *np = netdev_priv(netdev); 1940 struct i40e_hw *hw = &np->vsi->back->hw; 1941 struct i40e_vsi *vsi = np->vsi; 1942 struct i40e_pf *pf = vsi->back; 1943 u32 new_rx_count, new_tx_count; 1944 u16 tx_alloc_queue_pairs; 1945 int timeout = 50; 1946 int i, err = 0; 1947 1948 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1949 return -EINVAL; 1950 1951 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1952 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1953 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1954 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1955 netdev_info(netdev, 1956 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1957 ring->tx_pending, ring->rx_pending, 1958 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1959 return -EINVAL; 1960 } 1961 1962 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1963 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1964 1965 /* if nothing to do return success */ 1966 if ((new_tx_count == vsi->tx_rings[0]->count) && 1967 (new_rx_count == vsi->rx_rings[0]->count)) 1968 return 0; 1969 1970 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1971 * disallow changing the number of descriptors -- regardless 1972 * if the netdev is running or not. 1973 */ 1974 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1975 return -EBUSY; 1976 1977 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1978 timeout--; 1979 if (!timeout) 1980 return -EBUSY; 1981 usleep_range(1000, 2000); 1982 } 1983 1984 if (!netif_running(vsi->netdev)) { 1985 /* simple case - set for the next time the netdev is started */ 1986 for (i = 0; i < vsi->num_queue_pairs; i++) { 1987 vsi->tx_rings[i]->count = new_tx_count; 1988 vsi->rx_rings[i]->count = new_rx_count; 1989 if (i40e_enabled_xdp_vsi(vsi)) 1990 vsi->xdp_rings[i]->count = new_tx_count; 1991 } 1992 vsi->num_tx_desc = new_tx_count; 1993 vsi->num_rx_desc = new_rx_count; 1994 goto done; 1995 } 1996 1997 /* We can't just free everything and then setup again, 1998 * because the ISRs in MSI-X mode get passed pointers 1999 * to the Tx and Rx ring structs. 2000 */ 2001 2002 /* alloc updated Tx and XDP Tx resources */ 2003 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 2004 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 2005 if (new_tx_count != vsi->tx_rings[0]->count) { 2006 netdev_info(netdev, 2007 "Changing Tx descriptor count from %d to %d.\n", 2008 vsi->tx_rings[0]->count, new_tx_count); 2009 tx_rings = kcalloc(tx_alloc_queue_pairs, 2010 sizeof(struct i40e_ring), GFP_KERNEL); 2011 if (!tx_rings) { 2012 err = -ENOMEM; 2013 goto done; 2014 } 2015 2016 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2017 if (!i40e_active_tx_ring_index(vsi, i)) 2018 continue; 2019 2020 tx_rings[i] = *vsi->tx_rings[i]; 2021 tx_rings[i].count = new_tx_count; 2022 /* the desc and bi pointers will be reallocated in the 2023 * setup call 2024 */ 2025 tx_rings[i].desc = NULL; 2026 tx_rings[i].rx_bi = NULL; 2027 err = i40e_setup_tx_descriptors(&tx_rings[i]); 2028 if (err) { 2029 while (i) { 2030 i--; 2031 if (!i40e_active_tx_ring_index(vsi, i)) 2032 continue; 2033 i40e_free_tx_resources(&tx_rings[i]); 2034 } 2035 kfree(tx_rings); 2036 tx_rings = NULL; 2037 2038 goto done; 2039 } 2040 } 2041 } 2042 2043 /* alloc updated Rx resources */ 2044 if (new_rx_count != vsi->rx_rings[0]->count) { 2045 netdev_info(netdev, 2046 "Changing Rx descriptor count from %d to %d\n", 2047 vsi->rx_rings[0]->count, new_rx_count); 2048 rx_rings = kcalloc(vsi->alloc_queue_pairs, 2049 sizeof(struct i40e_ring), GFP_KERNEL); 2050 if (!rx_rings) { 2051 err = -ENOMEM; 2052 goto free_tx; 2053 } 2054 2055 for (i = 0; i < vsi->num_queue_pairs; i++) { 2056 u16 unused; 2057 2058 /* clone ring and setup updated count */ 2059 rx_rings[i] = *vsi->rx_rings[i]; 2060 rx_rings[i].count = new_rx_count; 2061 /* the desc and bi pointers will be reallocated in the 2062 * setup call 2063 */ 2064 rx_rings[i].desc = NULL; 2065 rx_rings[i].rx_bi = NULL; 2066 /* Clear cloned XDP RX-queue info before setup call */ 2067 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2068 /* this is to allow wr32 to have something to write to 2069 * during early allocation of Rx buffers 2070 */ 2071 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2072 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2073 if (err) 2074 goto rx_unwind; 2075 err = i40e_alloc_rx_bi(&rx_rings[i]); 2076 if (err) 2077 goto rx_unwind; 2078 2079 /* now allocate the Rx buffers to make sure the OS 2080 * has enough memory, any failure here means abort 2081 */ 2082 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2083 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2084 rx_unwind: 2085 if (err) { 2086 do { 2087 i40e_free_rx_resources(&rx_rings[i]); 2088 } while (i--); 2089 kfree(rx_rings); 2090 rx_rings = NULL; 2091 2092 goto free_tx; 2093 } 2094 } 2095 } 2096 2097 /* Bring interface down, copy in the new ring info, 2098 * then restore the interface 2099 */ 2100 i40e_down(vsi); 2101 2102 if (tx_rings) { 2103 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2104 if (i40e_active_tx_ring_index(vsi, i)) { 2105 i40e_free_tx_resources(vsi->tx_rings[i]); 2106 *vsi->tx_rings[i] = tx_rings[i]; 2107 } 2108 } 2109 kfree(tx_rings); 2110 tx_rings = NULL; 2111 } 2112 2113 if (rx_rings) { 2114 for (i = 0; i < vsi->num_queue_pairs; i++) { 2115 i40e_free_rx_resources(vsi->rx_rings[i]); 2116 /* get the real tail offset */ 2117 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2118 /* this is to fake out the allocation routine 2119 * into thinking it has to realloc everything 2120 * but the recycling logic will let us re-use 2121 * the buffers allocated above 2122 */ 2123 rx_rings[i].next_to_use = 0; 2124 rx_rings[i].next_to_clean = 0; 2125 rx_rings[i].next_to_alloc = 0; 2126 /* do a struct copy */ 2127 *vsi->rx_rings[i] = rx_rings[i]; 2128 } 2129 kfree(rx_rings); 2130 rx_rings = NULL; 2131 } 2132 2133 vsi->num_tx_desc = new_tx_count; 2134 vsi->num_rx_desc = new_rx_count; 2135 i40e_up(vsi); 2136 2137 free_tx: 2138 /* error cleanup if the Rx allocations failed after getting Tx */ 2139 if (tx_rings) { 2140 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2141 if (i40e_active_tx_ring_index(vsi, i)) 2142 i40e_free_tx_resources(vsi->tx_rings[i]); 2143 } 2144 kfree(tx_rings); 2145 tx_rings = NULL; 2146 } 2147 2148 done: 2149 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2150 2151 return err; 2152 } 2153 2154 /** 2155 * i40e_get_stats_count - return the stats count for a device 2156 * @netdev: the netdev to return the count for 2157 * 2158 * Returns the total number of statistics for this netdev. Note that even 2159 * though this is a function, it is required that the count for a specific 2160 * netdev must never change. Basing the count on static values such as the 2161 * maximum number of queues or the device type is ok. However, the API for 2162 * obtaining stats is *not* safe against changes based on non-static 2163 * values such as the *current* number of queues, or runtime flags. 2164 * 2165 * If a statistic is not always enabled, return it as part of the count 2166 * anyways, always return its string, and report its value as zero. 2167 **/ 2168 static int i40e_get_stats_count(struct net_device *netdev) 2169 { 2170 struct i40e_netdev_priv *np = netdev_priv(netdev); 2171 struct i40e_vsi *vsi = np->vsi; 2172 struct i40e_pf *pf = vsi->back; 2173 int stats_len; 2174 2175 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 2176 stats_len = I40E_PF_STATS_LEN; 2177 else 2178 stats_len = I40E_VSI_STATS_LEN; 2179 2180 /* The number of stats reported for a given net_device must remain 2181 * constant throughout the life of that device. 2182 * 2183 * This is because the API for obtaining the size, strings, and stats 2184 * is spread out over three separate ethtool ioctls. There is no safe 2185 * way to lock the number of stats across these calls, so we must 2186 * assume that they will never change. 2187 * 2188 * Due to this, we report the maximum number of queues, even if not 2189 * every queue is currently configured. Since we always allocate 2190 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2191 * works because the num_tx_queues is set at device creation and never 2192 * changes. 2193 */ 2194 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2195 2196 return stats_len; 2197 } 2198 2199 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2200 { 2201 struct i40e_netdev_priv *np = netdev_priv(netdev); 2202 struct i40e_vsi *vsi = np->vsi; 2203 struct i40e_pf *pf = vsi->back; 2204 2205 switch (sset) { 2206 case ETH_SS_TEST: 2207 return I40E_TEST_LEN; 2208 case ETH_SS_STATS: 2209 return i40e_get_stats_count(netdev); 2210 case ETH_SS_PRIV_FLAGS: 2211 return I40E_PRIV_FLAGS_STR_LEN + 2212 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2213 default: 2214 return -EOPNOTSUPP; 2215 } 2216 } 2217 2218 /** 2219 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2220 * @pf: the PF device structure 2221 * @i: the priority value to copy 2222 * 2223 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2224 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2225 * of the PFC stats for the given priority. 2226 **/ 2227 static inline struct i40e_pfc_stats 2228 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2229 { 2230 #define I40E_GET_PFC_STAT(stat, priority) \ 2231 .stat = pf->stats.stat[priority] 2232 2233 struct i40e_pfc_stats pfc = { 2234 I40E_GET_PFC_STAT(priority_xon_rx, i), 2235 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2236 I40E_GET_PFC_STAT(priority_xon_tx, i), 2237 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2238 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2239 }; 2240 return pfc; 2241 } 2242 2243 /** 2244 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2245 * @netdev: the netdev to collect stats for 2246 * @stats: ethtool stats command structure 2247 * @data: ethtool supplied buffer 2248 * 2249 * Copy the stats values for this netdev into the buffer. Expects data to be 2250 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2251 * statistics must be copied in a static order, and the count must not change 2252 * for a given netdev. See i40e_get_stats_count for more details. 2253 * 2254 * If a statistic is not currently valid (such as a disabled queue), this 2255 * function reports its value as zero. 2256 **/ 2257 static void i40e_get_ethtool_stats(struct net_device *netdev, 2258 struct ethtool_stats *stats, u64 *data) 2259 { 2260 struct i40e_netdev_priv *np = netdev_priv(netdev); 2261 struct i40e_vsi *vsi = np->vsi; 2262 struct i40e_pf *pf = vsi->back; 2263 struct i40e_veb *veb = NULL; 2264 unsigned int i; 2265 bool veb_stats; 2266 u64 *p = data; 2267 2268 i40e_update_stats(vsi); 2269 2270 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2271 i40e_gstrings_net_stats); 2272 2273 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2274 2275 rcu_read_lock(); 2276 for (i = 0; i < netdev->num_tx_queues; i++) { 2277 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2278 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2279 } 2280 rcu_read_unlock(); 2281 2282 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2283 goto check_data_pointer; 2284 2285 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2286 (pf->lan_veb < I40E_MAX_VEB) && 2287 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2288 2289 if (veb_stats) { 2290 veb = pf->veb[pf->lan_veb]; 2291 i40e_update_veb_stats(veb); 2292 } 2293 2294 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2295 * we initialize stats to zero and update the data pointer 2296 * intelligently 2297 */ 2298 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2299 i40e_gstrings_veb_stats); 2300 2301 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2302 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2303 i40e_gstrings_veb_tc_stats); 2304 2305 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2306 2307 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2308 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2309 2310 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2311 } 2312 2313 check_data_pointer: 2314 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2315 "ethtool stats count mismatch!"); 2316 } 2317 2318 /** 2319 * i40e_get_stat_strings - copy stat strings into supplied buffer 2320 * @netdev: the netdev to collect strings for 2321 * @data: supplied buffer to copy strings into 2322 * 2323 * Copy the strings related to stats for this netdev. Expects data to be 2324 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2325 * strings must be copied in a static order and the total count must not 2326 * change for a given netdev. See i40e_get_stats_count for more details. 2327 **/ 2328 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2329 { 2330 struct i40e_netdev_priv *np = netdev_priv(netdev); 2331 struct i40e_vsi *vsi = np->vsi; 2332 struct i40e_pf *pf = vsi->back; 2333 unsigned int i; 2334 u8 *p = data; 2335 2336 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2337 2338 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2339 2340 for (i = 0; i < netdev->num_tx_queues; i++) { 2341 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2342 "tx", i); 2343 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2344 "rx", i); 2345 } 2346 2347 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2348 goto check_data_pointer; 2349 2350 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2351 2352 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2353 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2354 2355 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2356 2357 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2358 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2359 2360 check_data_pointer: 2361 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2362 "stat strings count mismatch!"); 2363 } 2364 2365 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2366 { 2367 struct i40e_netdev_priv *np = netdev_priv(netdev); 2368 struct i40e_vsi *vsi = np->vsi; 2369 struct i40e_pf *pf = vsi->back; 2370 char *p = (char *)data; 2371 unsigned int i; 2372 2373 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2374 snprintf(p, ETH_GSTRING_LEN, "%s", 2375 i40e_gstrings_priv_flags[i].flag_string); 2376 p += ETH_GSTRING_LEN; 2377 } 2378 if (pf->hw.pf_id != 0) 2379 return; 2380 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2381 snprintf(p, ETH_GSTRING_LEN, "%s", 2382 i40e_gl_gstrings_priv_flags[i].flag_string); 2383 p += ETH_GSTRING_LEN; 2384 } 2385 } 2386 2387 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2388 u8 *data) 2389 { 2390 switch (stringset) { 2391 case ETH_SS_TEST: 2392 memcpy(data, i40e_gstrings_test, 2393 I40E_TEST_LEN * ETH_GSTRING_LEN); 2394 break; 2395 case ETH_SS_STATS: 2396 i40e_get_stat_strings(netdev, data); 2397 break; 2398 case ETH_SS_PRIV_FLAGS: 2399 i40e_get_priv_flag_strings(netdev, data); 2400 break; 2401 default: 2402 break; 2403 } 2404 } 2405 2406 static int i40e_get_ts_info(struct net_device *dev, 2407 struct ethtool_ts_info *info) 2408 { 2409 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2410 2411 /* only report HW timestamping if PTP is enabled */ 2412 if (!(pf->flags & I40E_FLAG_PTP)) 2413 return ethtool_op_get_ts_info(dev, info); 2414 2415 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2416 SOF_TIMESTAMPING_RX_SOFTWARE | 2417 SOF_TIMESTAMPING_SOFTWARE | 2418 SOF_TIMESTAMPING_TX_HARDWARE | 2419 SOF_TIMESTAMPING_RX_HARDWARE | 2420 SOF_TIMESTAMPING_RAW_HARDWARE; 2421 2422 if (pf->ptp_clock) 2423 info->phc_index = ptp_clock_index(pf->ptp_clock); 2424 else 2425 info->phc_index = -1; 2426 2427 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2428 2429 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2430 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2431 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2432 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2433 2434 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2435 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2436 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2437 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2438 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2439 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2440 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2441 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2442 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2443 2444 return 0; 2445 } 2446 2447 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2448 { 2449 struct i40e_netdev_priv *np = netdev_priv(netdev); 2450 struct i40e_pf *pf = np->vsi->back; 2451 i40e_status status; 2452 bool link_up = false; 2453 2454 netif_info(pf, hw, netdev, "link test\n"); 2455 status = i40e_get_link_status(&pf->hw, &link_up); 2456 if (status) { 2457 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2458 *data = 1; 2459 return *data; 2460 } 2461 2462 if (link_up) 2463 *data = 0; 2464 else 2465 *data = 1; 2466 2467 return *data; 2468 } 2469 2470 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2471 { 2472 struct i40e_netdev_priv *np = netdev_priv(netdev); 2473 struct i40e_pf *pf = np->vsi->back; 2474 2475 netif_info(pf, hw, netdev, "register test\n"); 2476 *data = i40e_diag_reg_test(&pf->hw); 2477 2478 return *data; 2479 } 2480 2481 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2482 { 2483 struct i40e_netdev_priv *np = netdev_priv(netdev); 2484 struct i40e_pf *pf = np->vsi->back; 2485 2486 netif_info(pf, hw, netdev, "eeprom test\n"); 2487 *data = i40e_diag_eeprom_test(&pf->hw); 2488 2489 /* forcebly clear the NVM Update state machine */ 2490 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2491 2492 return *data; 2493 } 2494 2495 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2496 { 2497 struct i40e_netdev_priv *np = netdev_priv(netdev); 2498 struct i40e_pf *pf = np->vsi->back; 2499 u16 swc_old = pf->sw_int_count; 2500 2501 netif_info(pf, hw, netdev, "interrupt test\n"); 2502 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2503 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2504 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2505 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2506 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2507 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2508 usleep_range(1000, 2000); 2509 *data = (swc_old == pf->sw_int_count); 2510 2511 return *data; 2512 } 2513 2514 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2515 { 2516 struct i40e_vf *vfs = pf->vf; 2517 int i; 2518 2519 for (i = 0; i < pf->num_alloc_vfs; i++) 2520 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2521 return true; 2522 return false; 2523 } 2524 2525 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2526 { 2527 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2528 } 2529 2530 static void i40e_diag_test(struct net_device *netdev, 2531 struct ethtool_test *eth_test, u64 *data) 2532 { 2533 struct i40e_netdev_priv *np = netdev_priv(netdev); 2534 bool if_running = netif_running(netdev); 2535 struct i40e_pf *pf = np->vsi->back; 2536 2537 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2538 /* Offline tests */ 2539 netif_info(pf, drv, netdev, "offline testing starting\n"); 2540 2541 set_bit(__I40E_TESTING, pf->state); 2542 2543 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2544 dev_warn(&pf->pdev->dev, 2545 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2546 data[I40E_ETH_TEST_REG] = 1; 2547 data[I40E_ETH_TEST_EEPROM] = 1; 2548 data[I40E_ETH_TEST_INTR] = 1; 2549 data[I40E_ETH_TEST_LINK] = 1; 2550 eth_test->flags |= ETH_TEST_FL_FAILED; 2551 clear_bit(__I40E_TESTING, pf->state); 2552 goto skip_ol_tests; 2553 } 2554 2555 /* If the device is online then take it offline */ 2556 if (if_running) 2557 /* indicate we're in test mode */ 2558 i40e_close(netdev); 2559 else 2560 /* This reset does not affect link - if it is 2561 * changed to a type of reset that does affect 2562 * link then the following link test would have 2563 * to be moved to before the reset 2564 */ 2565 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2566 2567 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2568 eth_test->flags |= ETH_TEST_FL_FAILED; 2569 2570 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2571 eth_test->flags |= ETH_TEST_FL_FAILED; 2572 2573 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2574 eth_test->flags |= ETH_TEST_FL_FAILED; 2575 2576 /* run reg test last, a reset is required after it */ 2577 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2578 eth_test->flags |= ETH_TEST_FL_FAILED; 2579 2580 clear_bit(__I40E_TESTING, pf->state); 2581 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2582 2583 if (if_running) 2584 i40e_open(netdev); 2585 } else { 2586 /* Online tests */ 2587 netif_info(pf, drv, netdev, "online testing starting\n"); 2588 2589 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2590 eth_test->flags |= ETH_TEST_FL_FAILED; 2591 2592 /* Offline only tests, not run in online; pass by default */ 2593 data[I40E_ETH_TEST_REG] = 0; 2594 data[I40E_ETH_TEST_EEPROM] = 0; 2595 data[I40E_ETH_TEST_INTR] = 0; 2596 } 2597 2598 skip_ol_tests: 2599 2600 netif_info(pf, drv, netdev, "testing finished\n"); 2601 } 2602 2603 static void i40e_get_wol(struct net_device *netdev, 2604 struct ethtool_wolinfo *wol) 2605 { 2606 struct i40e_netdev_priv *np = netdev_priv(netdev); 2607 struct i40e_pf *pf = np->vsi->back; 2608 struct i40e_hw *hw = &pf->hw; 2609 u16 wol_nvm_bits; 2610 2611 /* NVM bit on means WoL disabled for the port */ 2612 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2613 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2614 wol->supported = 0; 2615 wol->wolopts = 0; 2616 } else { 2617 wol->supported = WAKE_MAGIC; 2618 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2619 } 2620 } 2621 2622 /** 2623 * i40e_set_wol - set the WakeOnLAN configuration 2624 * @netdev: the netdev in question 2625 * @wol: the ethtool WoL setting data 2626 **/ 2627 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2628 { 2629 struct i40e_netdev_priv *np = netdev_priv(netdev); 2630 struct i40e_pf *pf = np->vsi->back; 2631 struct i40e_vsi *vsi = np->vsi; 2632 struct i40e_hw *hw = &pf->hw; 2633 u16 wol_nvm_bits; 2634 2635 /* WoL not supported if this isn't the controlling PF on the port */ 2636 if (hw->partition_id != 1) { 2637 i40e_partition_setting_complaint(pf); 2638 return -EOPNOTSUPP; 2639 } 2640 2641 if (vsi != pf->vsi[pf->lan_vsi]) 2642 return -EOPNOTSUPP; 2643 2644 /* NVM bit on means WoL disabled for the port */ 2645 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2646 if (BIT(hw->port) & wol_nvm_bits) 2647 return -EOPNOTSUPP; 2648 2649 /* only magic packet is supported */ 2650 if (wol->wolopts & ~WAKE_MAGIC) 2651 return -EOPNOTSUPP; 2652 2653 /* is this a new value? */ 2654 if (pf->wol_en != !!wol->wolopts) { 2655 pf->wol_en = !!wol->wolopts; 2656 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2657 } 2658 2659 return 0; 2660 } 2661 2662 static int i40e_set_phys_id(struct net_device *netdev, 2663 enum ethtool_phys_id_state state) 2664 { 2665 struct i40e_netdev_priv *np = netdev_priv(netdev); 2666 i40e_status ret = 0; 2667 struct i40e_pf *pf = np->vsi->back; 2668 struct i40e_hw *hw = &pf->hw; 2669 int blink_freq = 2; 2670 u16 temp_status; 2671 2672 switch (state) { 2673 case ETHTOOL_ID_ACTIVE: 2674 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2675 pf->led_status = i40e_led_get(hw); 2676 } else { 2677 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2678 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2679 NULL); 2680 ret = i40e_led_get_phy(hw, &temp_status, 2681 &pf->phy_led_val); 2682 pf->led_status = temp_status; 2683 } 2684 return blink_freq; 2685 case ETHTOOL_ID_ON: 2686 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2687 i40e_led_set(hw, 0xf, false); 2688 else 2689 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2690 break; 2691 case ETHTOOL_ID_OFF: 2692 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2693 i40e_led_set(hw, 0x0, false); 2694 else 2695 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2696 break; 2697 case ETHTOOL_ID_INACTIVE: 2698 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2699 i40e_led_set(hw, pf->led_status, false); 2700 } else { 2701 ret = i40e_led_set_phy(hw, false, pf->led_status, 2702 (pf->phy_led_val | 2703 I40E_PHY_LED_MODE_ORIG)); 2704 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2705 i40e_aq_set_phy_debug(hw, 0, NULL); 2706 } 2707 break; 2708 default: 2709 break; 2710 } 2711 if (ret) 2712 return -ENOENT; 2713 else 2714 return 0; 2715 } 2716 2717 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2718 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2719 * 125us (8000 interrupts per second) == ITR(62) 2720 */ 2721 2722 /** 2723 * __i40e_get_coalesce - get per-queue coalesce settings 2724 * @netdev: the netdev to check 2725 * @ec: ethtool coalesce data structure 2726 * @queue: which queue to pick 2727 * 2728 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2729 * are per queue. If queue is <0 then we default to queue 0 as the 2730 * representative value. 2731 **/ 2732 static int __i40e_get_coalesce(struct net_device *netdev, 2733 struct ethtool_coalesce *ec, 2734 int queue) 2735 { 2736 struct i40e_netdev_priv *np = netdev_priv(netdev); 2737 struct i40e_ring *rx_ring, *tx_ring; 2738 struct i40e_vsi *vsi = np->vsi; 2739 2740 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2741 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2742 2743 /* rx and tx usecs has per queue value. If user doesn't specify the 2744 * queue, return queue 0's value to represent. 2745 */ 2746 if (queue < 0) 2747 queue = 0; 2748 else if (queue >= vsi->num_queue_pairs) 2749 return -EINVAL; 2750 2751 rx_ring = vsi->rx_rings[queue]; 2752 tx_ring = vsi->tx_rings[queue]; 2753 2754 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2755 ec->use_adaptive_rx_coalesce = 1; 2756 2757 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2758 ec->use_adaptive_tx_coalesce = 1; 2759 2760 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2761 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2762 2763 /* we use the _usecs_high to store/set the interrupt rate limit 2764 * that the hardware supports, that almost but not quite 2765 * fits the original intent of the ethtool variable, 2766 * the rx_coalesce_usecs_high limits total interrupts 2767 * per second from both tx/rx sources. 2768 */ 2769 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2770 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2771 2772 return 0; 2773 } 2774 2775 /** 2776 * i40e_get_coalesce - get a netdev's coalesce settings 2777 * @netdev: the netdev to check 2778 * @ec: ethtool coalesce data structure 2779 * 2780 * Gets the coalesce settings for a particular netdev. Note that if user has 2781 * modified per-queue settings, this only guarantees to represent queue 0. See 2782 * __i40e_get_coalesce for more details. 2783 **/ 2784 static int i40e_get_coalesce(struct net_device *netdev, 2785 struct ethtool_coalesce *ec) 2786 { 2787 return __i40e_get_coalesce(netdev, ec, -1); 2788 } 2789 2790 /** 2791 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2792 * @netdev: netdev structure 2793 * @ec: ethtool's coalesce settings 2794 * @queue: the particular queue to read 2795 * 2796 * Will read a specific queue's coalesce settings 2797 **/ 2798 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2799 struct ethtool_coalesce *ec) 2800 { 2801 return __i40e_get_coalesce(netdev, ec, queue); 2802 } 2803 2804 /** 2805 * i40e_set_itr_per_queue - set ITR values for specific queue 2806 * @vsi: the VSI to set values for 2807 * @ec: coalesce settings from ethtool 2808 * @queue: the queue to modify 2809 * 2810 * Change the ITR settings for a specific queue. 2811 **/ 2812 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2813 struct ethtool_coalesce *ec, 2814 int queue) 2815 { 2816 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2817 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2818 struct i40e_pf *pf = vsi->back; 2819 struct i40e_hw *hw = &pf->hw; 2820 struct i40e_q_vector *q_vector; 2821 u16 intrl; 2822 2823 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2824 2825 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2826 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2827 2828 if (ec->use_adaptive_rx_coalesce) 2829 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2830 else 2831 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2832 2833 if (ec->use_adaptive_tx_coalesce) 2834 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2835 else 2836 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2837 2838 q_vector = rx_ring->q_vector; 2839 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2840 2841 q_vector = tx_ring->q_vector; 2842 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2843 2844 /* The interrupt handler itself will take care of programming 2845 * the Tx and Rx ITR values based on the values we have entered 2846 * into the q_vector, no need to write the values now. 2847 */ 2848 2849 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2850 i40e_flush(hw); 2851 } 2852 2853 /** 2854 * __i40e_set_coalesce - set coalesce settings for particular queue 2855 * @netdev: the netdev to change 2856 * @ec: ethtool coalesce settings 2857 * @queue: the queue to change 2858 * 2859 * Sets the coalesce settings for a particular queue. 2860 **/ 2861 static int __i40e_set_coalesce(struct net_device *netdev, 2862 struct ethtool_coalesce *ec, 2863 int queue) 2864 { 2865 struct i40e_netdev_priv *np = netdev_priv(netdev); 2866 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2867 struct i40e_vsi *vsi = np->vsi; 2868 struct i40e_pf *pf = vsi->back; 2869 int i; 2870 2871 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2872 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2873 2874 if (queue < 0) { 2875 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2876 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2877 } else if (queue < vsi->num_queue_pairs) { 2878 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2879 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2880 } else { 2881 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2882 vsi->num_queue_pairs - 1); 2883 return -EINVAL; 2884 } 2885 2886 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2887 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2888 2889 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2890 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2891 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2892 return -EINVAL; 2893 } 2894 2895 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2896 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2897 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2898 return -EINVAL; 2899 } 2900 2901 if (ec->rx_coalesce_usecs != cur_rx_itr && 2902 ec->use_adaptive_rx_coalesce) { 2903 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2904 return -EINVAL; 2905 } 2906 2907 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2908 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2909 return -EINVAL; 2910 } 2911 2912 if (ec->tx_coalesce_usecs != cur_tx_itr && 2913 ec->use_adaptive_tx_coalesce) { 2914 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2915 return -EINVAL; 2916 } 2917 2918 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2919 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2920 return -EINVAL; 2921 } 2922 2923 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2924 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2925 2926 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2927 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2928 2929 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2930 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2931 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2932 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2933 vsi->int_rate_limit); 2934 } 2935 2936 /* rx and tx usecs has per queue value. If user doesn't specify the 2937 * queue, apply to all queues. 2938 */ 2939 if (queue < 0) { 2940 for (i = 0; i < vsi->num_queue_pairs; i++) 2941 i40e_set_itr_per_queue(vsi, ec, i); 2942 } else { 2943 i40e_set_itr_per_queue(vsi, ec, queue); 2944 } 2945 2946 return 0; 2947 } 2948 2949 /** 2950 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2951 * @netdev: the netdev to change 2952 * @ec: ethtool coalesce settings 2953 * 2954 * This will set each queue to the same coalesce settings. 2955 **/ 2956 static int i40e_set_coalesce(struct net_device *netdev, 2957 struct ethtool_coalesce *ec) 2958 { 2959 return __i40e_set_coalesce(netdev, ec, -1); 2960 } 2961 2962 /** 2963 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2964 * @netdev: the netdev to change 2965 * @ec: ethtool's coalesce settings 2966 * @queue: the queue to change 2967 * 2968 * Sets the specified queue's coalesce settings. 2969 **/ 2970 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2971 struct ethtool_coalesce *ec) 2972 { 2973 return __i40e_set_coalesce(netdev, ec, queue); 2974 } 2975 2976 /** 2977 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2978 * @pf: pointer to the physical function struct 2979 * @cmd: ethtool rxnfc command 2980 * 2981 * Returns Success if the flow is supported, else Invalid Input. 2982 **/ 2983 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2984 { 2985 struct i40e_hw *hw = &pf->hw; 2986 u8 flow_pctype = 0; 2987 u64 i_set = 0; 2988 2989 cmd->data = 0; 2990 2991 switch (cmd->flow_type) { 2992 case TCP_V4_FLOW: 2993 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2994 break; 2995 case UDP_V4_FLOW: 2996 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2997 break; 2998 case TCP_V6_FLOW: 2999 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3000 break; 3001 case UDP_V6_FLOW: 3002 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3003 break; 3004 case SCTP_V4_FLOW: 3005 case AH_ESP_V4_FLOW: 3006 case AH_V4_FLOW: 3007 case ESP_V4_FLOW: 3008 case IPV4_FLOW: 3009 case SCTP_V6_FLOW: 3010 case AH_ESP_V6_FLOW: 3011 case AH_V6_FLOW: 3012 case ESP_V6_FLOW: 3013 case IPV6_FLOW: 3014 /* Default is src/dest for IP, no matter the L4 hashing */ 3015 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 3016 break; 3017 default: 3018 return -EINVAL; 3019 } 3020 3021 /* Read flow based hash input set register */ 3022 if (flow_pctype) { 3023 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3024 flow_pctype)) | 3025 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3026 flow_pctype)) << 32); 3027 } 3028 3029 /* Process bits of hash input set */ 3030 if (i_set) { 3031 if (i_set & I40E_L4_SRC_MASK) 3032 cmd->data |= RXH_L4_B_0_1; 3033 if (i_set & I40E_L4_DST_MASK) 3034 cmd->data |= RXH_L4_B_2_3; 3035 3036 if (cmd->flow_type == TCP_V4_FLOW || 3037 cmd->flow_type == UDP_V4_FLOW) { 3038 if (i_set & I40E_L3_SRC_MASK) 3039 cmd->data |= RXH_IP_SRC; 3040 if (i_set & I40E_L3_DST_MASK) 3041 cmd->data |= RXH_IP_DST; 3042 } else if (cmd->flow_type == TCP_V6_FLOW || 3043 cmd->flow_type == UDP_V6_FLOW) { 3044 if (i_set & I40E_L3_V6_SRC_MASK) 3045 cmd->data |= RXH_IP_SRC; 3046 if (i_set & I40E_L3_V6_DST_MASK) 3047 cmd->data |= RXH_IP_DST; 3048 } 3049 } 3050 3051 return 0; 3052 } 3053 3054 /** 3055 * i40e_check_mask - Check whether a mask field is set 3056 * @mask: the full mask value 3057 * @field: mask of the field to check 3058 * 3059 * If the given mask is fully set, return positive value. If the mask for the 3060 * field is fully unset, return zero. Otherwise return a negative error code. 3061 **/ 3062 static int i40e_check_mask(u64 mask, u64 field) 3063 { 3064 u64 value = mask & field; 3065 3066 if (value == field) 3067 return 1; 3068 else if (!value) 3069 return 0; 3070 else 3071 return -1; 3072 } 3073 3074 /** 3075 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3076 * @fsp: pointer to rx flow specification 3077 * @data: pointer to userdef data structure for storage 3078 * 3079 * Read the user-defined data and deconstruct the value into a structure. No 3080 * other code should read the user-defined data, so as to ensure that every 3081 * place consistently reads the value correctly. 3082 * 3083 * The user-defined field is a 64bit Big Endian format value, which we 3084 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3085 * be defined starting from the highest bits, while small bit field values 3086 * shall be defined starting from the lowest bits. 3087 * 3088 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3089 * and the filter should be rejected. The data structure will always be 3090 * modified even if FLOW_EXT is not set. 3091 * 3092 **/ 3093 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3094 struct i40e_rx_flow_userdef *data) 3095 { 3096 u64 value, mask; 3097 int valid; 3098 3099 /* Zero memory first so it's always consistent. */ 3100 memset(data, 0, sizeof(*data)); 3101 3102 if (!(fsp->flow_type & FLOW_EXT)) 3103 return 0; 3104 3105 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3106 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3107 3108 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3109 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3110 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3111 3112 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3113 if (valid < 0) { 3114 return -EINVAL; 3115 } else if (valid) { 3116 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3117 data->flex_offset = 3118 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 3119 data->flex_filter = true; 3120 } 3121 3122 return 0; 3123 } 3124 3125 /** 3126 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3127 * @fsp: pointer to rx_flow specification 3128 * @data: pointer to return userdef data 3129 * 3130 * Reads the userdef data structure and properly fills in the user defined 3131 * fields of the rx_flow_spec. 3132 **/ 3133 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3134 struct i40e_rx_flow_userdef *data) 3135 { 3136 u64 value = 0, mask = 0; 3137 3138 if (data->flex_filter) { 3139 value |= data->flex_word; 3140 value |= (u64)data->flex_offset << 16; 3141 mask |= I40E_USERDEF_FLEX_FILTER; 3142 } 3143 3144 if (value || mask) 3145 fsp->flow_type |= FLOW_EXT; 3146 3147 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3148 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3149 } 3150 3151 /** 3152 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3153 * @pf: Pointer to the physical function struct 3154 * @cmd: The command to get or set Rx flow classification rules 3155 * @rule_locs: Array of used rule locations 3156 * 3157 * This function populates both the total and actual rule count of 3158 * the ethtool flow classification command 3159 * 3160 * Returns 0 on success or -EMSGSIZE if entry not found 3161 **/ 3162 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3163 struct ethtool_rxnfc *cmd, 3164 u32 *rule_locs) 3165 { 3166 struct i40e_fdir_filter *rule; 3167 struct hlist_node *node2; 3168 int cnt = 0; 3169 3170 /* report total rule count */ 3171 cmd->data = i40e_get_fd_cnt_all(pf); 3172 3173 hlist_for_each_entry_safe(rule, node2, 3174 &pf->fdir_filter_list, fdir_node) { 3175 if (cnt == cmd->rule_cnt) 3176 return -EMSGSIZE; 3177 3178 rule_locs[cnt] = rule->fd_id; 3179 cnt++; 3180 } 3181 3182 cmd->rule_cnt = cnt; 3183 3184 return 0; 3185 } 3186 3187 /** 3188 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3189 * @pf: Pointer to the physical function struct 3190 * @cmd: The command to get or set Rx flow classification rules 3191 * 3192 * This function looks up a filter based on the Rx flow classification 3193 * command and fills the flow spec info for it if found 3194 * 3195 * Returns 0 on success or -EINVAL if filter not found 3196 **/ 3197 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3198 struct ethtool_rxnfc *cmd) 3199 { 3200 struct ethtool_rx_flow_spec *fsp = 3201 (struct ethtool_rx_flow_spec *)&cmd->fs; 3202 struct i40e_rx_flow_userdef userdef = {0}; 3203 struct i40e_fdir_filter *rule = NULL; 3204 struct hlist_node *node2; 3205 u64 input_set; 3206 u16 index; 3207 3208 hlist_for_each_entry_safe(rule, node2, 3209 &pf->fdir_filter_list, fdir_node) { 3210 if (fsp->location <= rule->fd_id) 3211 break; 3212 } 3213 3214 if (!rule || fsp->location != rule->fd_id) 3215 return -EINVAL; 3216 3217 fsp->flow_type = rule->flow_type; 3218 if (fsp->flow_type == IP_USER_FLOW) { 3219 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3220 fsp->h_u.usr_ip4_spec.proto = 0; 3221 fsp->m_u.usr_ip4_spec.proto = 0; 3222 } 3223 3224 /* Reverse the src and dest notion, since the HW views them from 3225 * Tx perspective where as the user expects it from Rx filter view. 3226 */ 3227 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3228 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3229 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3230 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3231 3232 switch (rule->flow_type) { 3233 case SCTP_V4_FLOW: 3234 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3235 break; 3236 case TCP_V4_FLOW: 3237 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3238 break; 3239 case UDP_V4_FLOW: 3240 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3241 break; 3242 case IP_USER_FLOW: 3243 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3244 break; 3245 default: 3246 /* If we have stored a filter with a flow type not listed here 3247 * it is almost certainly a driver bug. WARN(), and then 3248 * assign the input_set as if all fields are enabled to avoid 3249 * reading unassigned memory. 3250 */ 3251 WARN(1, "Missing input set index for flow_type %d\n", 3252 rule->flow_type); 3253 input_set = 0xFFFFFFFFFFFFFFFFULL; 3254 goto no_input_set; 3255 } 3256 3257 input_set = i40e_read_fd_input_set(pf, index); 3258 3259 no_input_set: 3260 if (input_set & I40E_L3_SRC_MASK) 3261 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3262 3263 if (input_set & I40E_L3_DST_MASK) 3264 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3265 3266 if (input_set & I40E_L4_SRC_MASK) 3267 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3268 3269 if (input_set & I40E_L4_DST_MASK) 3270 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3271 3272 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3273 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3274 else 3275 fsp->ring_cookie = rule->q_index; 3276 3277 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3278 struct i40e_vsi *vsi; 3279 3280 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3281 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3282 /* VFs are zero-indexed by the driver, but ethtool 3283 * expects them to be one-indexed, so add one here 3284 */ 3285 u64 ring_vf = vsi->vf_id + 1; 3286 3287 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3288 fsp->ring_cookie |= ring_vf; 3289 } 3290 } 3291 3292 if (rule->flex_filter) { 3293 userdef.flex_filter = true; 3294 userdef.flex_word = be16_to_cpu(rule->flex_word); 3295 userdef.flex_offset = rule->flex_offset; 3296 } 3297 3298 i40e_fill_rx_flow_user_data(fsp, &userdef); 3299 3300 return 0; 3301 } 3302 3303 /** 3304 * i40e_get_rxnfc - command to get RX flow classification rules 3305 * @netdev: network interface device structure 3306 * @cmd: ethtool rxnfc command 3307 * @rule_locs: pointer to store rule data 3308 * 3309 * Returns Success if the command is supported. 3310 **/ 3311 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3312 u32 *rule_locs) 3313 { 3314 struct i40e_netdev_priv *np = netdev_priv(netdev); 3315 struct i40e_vsi *vsi = np->vsi; 3316 struct i40e_pf *pf = vsi->back; 3317 int ret = -EOPNOTSUPP; 3318 3319 switch (cmd->cmd) { 3320 case ETHTOOL_GRXRINGS: 3321 cmd->data = vsi->rss_size; 3322 ret = 0; 3323 break; 3324 case ETHTOOL_GRXFH: 3325 ret = i40e_get_rss_hash_opts(pf, cmd); 3326 break; 3327 case ETHTOOL_GRXCLSRLCNT: 3328 cmd->rule_cnt = pf->fdir_pf_active_filters; 3329 /* report total rule count */ 3330 cmd->data = i40e_get_fd_cnt_all(pf); 3331 ret = 0; 3332 break; 3333 case ETHTOOL_GRXCLSRULE: 3334 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3335 break; 3336 case ETHTOOL_GRXCLSRLALL: 3337 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3338 break; 3339 default: 3340 break; 3341 } 3342 3343 return ret; 3344 } 3345 3346 /** 3347 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3348 * @nfc: pointer to user request 3349 * @i_setc: bits currently set 3350 * 3351 * Returns value of bits to be set per user request 3352 **/ 3353 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3354 { 3355 u64 i_set = i_setc; 3356 u64 src_l3 = 0, dst_l3 = 0; 3357 3358 if (nfc->data & RXH_L4_B_0_1) 3359 i_set |= I40E_L4_SRC_MASK; 3360 else 3361 i_set &= ~I40E_L4_SRC_MASK; 3362 if (nfc->data & RXH_L4_B_2_3) 3363 i_set |= I40E_L4_DST_MASK; 3364 else 3365 i_set &= ~I40E_L4_DST_MASK; 3366 3367 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3368 src_l3 = I40E_L3_V6_SRC_MASK; 3369 dst_l3 = I40E_L3_V6_DST_MASK; 3370 } else if (nfc->flow_type == TCP_V4_FLOW || 3371 nfc->flow_type == UDP_V4_FLOW) { 3372 src_l3 = I40E_L3_SRC_MASK; 3373 dst_l3 = I40E_L3_DST_MASK; 3374 } else { 3375 /* Any other flow type are not supported here */ 3376 return i_set; 3377 } 3378 3379 if (nfc->data & RXH_IP_SRC) 3380 i_set |= src_l3; 3381 else 3382 i_set &= ~src_l3; 3383 if (nfc->data & RXH_IP_DST) 3384 i_set |= dst_l3; 3385 else 3386 i_set &= ~dst_l3; 3387 3388 return i_set; 3389 } 3390 3391 /** 3392 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3393 * @pf: pointer to the physical function struct 3394 * @nfc: ethtool rxnfc command 3395 * 3396 * Returns Success if the flow input set is supported. 3397 **/ 3398 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3399 { 3400 struct i40e_hw *hw = &pf->hw; 3401 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3402 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3403 u8 flow_pctype = 0; 3404 u64 i_set, i_setc; 3405 3406 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3407 dev_err(&pf->pdev->dev, 3408 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3409 return -EOPNOTSUPP; 3410 } 3411 3412 /* RSS does not support anything other than hashing 3413 * to queues on src and dst IPs and ports 3414 */ 3415 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3416 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3417 return -EINVAL; 3418 3419 switch (nfc->flow_type) { 3420 case TCP_V4_FLOW: 3421 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3422 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3423 hena |= 3424 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3425 break; 3426 case TCP_V6_FLOW: 3427 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3428 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3429 hena |= 3430 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3431 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3432 hena |= 3433 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3434 break; 3435 case UDP_V4_FLOW: 3436 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3437 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3438 hena |= 3439 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3440 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3441 3442 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3443 break; 3444 case UDP_V6_FLOW: 3445 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3446 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3447 hena |= 3448 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3449 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3450 3451 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3452 break; 3453 case AH_ESP_V4_FLOW: 3454 case AH_V4_FLOW: 3455 case ESP_V4_FLOW: 3456 case SCTP_V4_FLOW: 3457 if ((nfc->data & RXH_L4_B_0_1) || 3458 (nfc->data & RXH_L4_B_2_3)) 3459 return -EINVAL; 3460 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3461 break; 3462 case AH_ESP_V6_FLOW: 3463 case AH_V6_FLOW: 3464 case ESP_V6_FLOW: 3465 case SCTP_V6_FLOW: 3466 if ((nfc->data & RXH_L4_B_0_1) || 3467 (nfc->data & RXH_L4_B_2_3)) 3468 return -EINVAL; 3469 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3470 break; 3471 case IPV4_FLOW: 3472 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3473 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3474 break; 3475 case IPV6_FLOW: 3476 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3477 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3478 break; 3479 default: 3480 return -EINVAL; 3481 } 3482 3483 if (flow_pctype) { 3484 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3485 flow_pctype)) | 3486 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3487 flow_pctype)) << 32); 3488 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3489 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3490 (u32)i_set); 3491 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3492 (u32)(i_set >> 32)); 3493 hena |= BIT_ULL(flow_pctype); 3494 } 3495 3496 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3497 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3498 i40e_flush(hw); 3499 3500 return 0; 3501 } 3502 3503 /** 3504 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3505 * @vsi: Pointer to the targeted VSI 3506 * @input: The filter to update or NULL to indicate deletion 3507 * @sw_idx: Software index to the filter 3508 * @cmd: The command to get or set Rx flow classification rules 3509 * 3510 * This function updates (or deletes) a Flow Director entry from 3511 * the hlist of the corresponding PF 3512 * 3513 * Returns 0 on success 3514 **/ 3515 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3516 struct i40e_fdir_filter *input, 3517 u16 sw_idx, 3518 struct ethtool_rxnfc *cmd) 3519 { 3520 struct i40e_fdir_filter *rule, *parent; 3521 struct i40e_pf *pf = vsi->back; 3522 struct hlist_node *node2; 3523 int err = -EINVAL; 3524 3525 parent = NULL; 3526 rule = NULL; 3527 3528 hlist_for_each_entry_safe(rule, node2, 3529 &pf->fdir_filter_list, fdir_node) { 3530 /* hash found, or no matching entry */ 3531 if (rule->fd_id >= sw_idx) 3532 break; 3533 parent = rule; 3534 } 3535 3536 /* if there is an old rule occupying our place remove it */ 3537 if (rule && (rule->fd_id == sw_idx)) { 3538 /* Remove this rule, since we're either deleting it, or 3539 * replacing it. 3540 */ 3541 err = i40e_add_del_fdir(vsi, rule, false); 3542 hlist_del(&rule->fdir_node); 3543 kfree(rule); 3544 pf->fdir_pf_active_filters--; 3545 } 3546 3547 /* If we weren't given an input, this is a delete, so just return the 3548 * error code indicating if there was an entry at the requested slot 3549 */ 3550 if (!input) 3551 return err; 3552 3553 /* Otherwise, install the new rule as requested */ 3554 INIT_HLIST_NODE(&input->fdir_node); 3555 3556 /* add filter to the list */ 3557 if (parent) 3558 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3559 else 3560 hlist_add_head(&input->fdir_node, 3561 &pf->fdir_filter_list); 3562 3563 /* update counts */ 3564 pf->fdir_pf_active_filters++; 3565 3566 return 0; 3567 } 3568 3569 /** 3570 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3571 * @pf: pointer to PF structure 3572 * 3573 * This function searches the list of filters and determines which FLX_PIT 3574 * entries are still required. It will prune any entries which are no longer 3575 * in use after the deletion. 3576 **/ 3577 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3578 { 3579 struct i40e_flex_pit *entry, *tmp; 3580 struct i40e_fdir_filter *rule; 3581 3582 /* First, we'll check the l3 table */ 3583 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3584 bool found = false; 3585 3586 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3587 if (rule->flow_type != IP_USER_FLOW) 3588 continue; 3589 if (rule->flex_filter && 3590 rule->flex_offset == entry->src_offset) { 3591 found = true; 3592 break; 3593 } 3594 } 3595 3596 /* If we didn't find the filter, then we can prune this entry 3597 * from the list. 3598 */ 3599 if (!found) { 3600 list_del(&entry->list); 3601 kfree(entry); 3602 } 3603 } 3604 3605 /* Followed by the L4 table */ 3606 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3607 bool found = false; 3608 3609 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3610 /* Skip this filter if it's L3, since we already 3611 * checked those in the above loop 3612 */ 3613 if (rule->flow_type == IP_USER_FLOW) 3614 continue; 3615 if (rule->flex_filter && 3616 rule->flex_offset == entry->src_offset) { 3617 found = true; 3618 break; 3619 } 3620 } 3621 3622 /* If we didn't find the filter, then we can prune this entry 3623 * from the list. 3624 */ 3625 if (!found) { 3626 list_del(&entry->list); 3627 kfree(entry); 3628 } 3629 } 3630 } 3631 3632 /** 3633 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3634 * @vsi: Pointer to the targeted VSI 3635 * @cmd: The command to get or set Rx flow classification rules 3636 * 3637 * The function removes a Flow Director filter entry from the 3638 * hlist of the corresponding PF 3639 * 3640 * Returns 0 on success 3641 */ 3642 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3643 struct ethtool_rxnfc *cmd) 3644 { 3645 struct ethtool_rx_flow_spec *fsp = 3646 (struct ethtool_rx_flow_spec *)&cmd->fs; 3647 struct i40e_pf *pf = vsi->back; 3648 int ret = 0; 3649 3650 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3651 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3652 return -EBUSY; 3653 3654 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3655 return -EBUSY; 3656 3657 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3658 3659 i40e_prune_flex_pit_list(pf); 3660 3661 i40e_fdir_check_and_reenable(pf); 3662 return ret; 3663 } 3664 3665 /** 3666 * i40e_unused_pit_index - Find an unused PIT index for given list 3667 * @pf: the PF data structure 3668 * 3669 * Find the first unused flexible PIT index entry. We search both the L3 and 3670 * L4 flexible PIT lists so that the returned index is unique and unused by 3671 * either currently programmed L3 or L4 filters. We use a bit field as storage 3672 * to track which indexes are already used. 3673 **/ 3674 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3675 { 3676 unsigned long available_index = 0xFF; 3677 struct i40e_flex_pit *entry; 3678 3679 /* We need to make sure that the new index isn't in use by either L3 3680 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3681 * L4 to use the same index. 3682 */ 3683 3684 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3685 clear_bit(entry->pit_index, &available_index); 3686 3687 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3688 clear_bit(entry->pit_index, &available_index); 3689 3690 return find_first_bit(&available_index, 8); 3691 } 3692 3693 /** 3694 * i40e_find_flex_offset - Find an existing flex src_offset 3695 * @flex_pit_list: L3 or L4 flex PIT list 3696 * @src_offset: new src_offset to find 3697 * 3698 * Searches the flex_pit_list for an existing offset. If no offset is 3699 * currently programmed, then this will return an ERR_PTR if there is no space 3700 * to add a new offset, otherwise it returns NULL. 3701 **/ 3702 static 3703 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3704 u16 src_offset) 3705 { 3706 struct i40e_flex_pit *entry; 3707 int size = 0; 3708 3709 /* Search for the src_offset first. If we find a matching entry 3710 * already programmed, we can simply re-use it. 3711 */ 3712 list_for_each_entry(entry, flex_pit_list, list) { 3713 size++; 3714 if (entry->src_offset == src_offset) 3715 return entry; 3716 } 3717 3718 /* If we haven't found an entry yet, then the provided src offset has 3719 * not yet been programmed. We will program the src offset later on, 3720 * but we need to indicate whether there is enough space to do so 3721 * here. We'll make use of ERR_PTR for this purpose. 3722 */ 3723 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3724 return ERR_PTR(-ENOSPC); 3725 3726 return NULL; 3727 } 3728 3729 /** 3730 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3731 * @flex_pit_list: L3 or L4 flex PIT list 3732 * @src_offset: new src_offset to add 3733 * @pit_index: the PIT index to program 3734 * 3735 * This function programs the new src_offset to the list. It is expected that 3736 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3737 * that this offset is not programmed, and that the list has enough space to 3738 * store another offset. 3739 * 3740 * Returns 0 on success, and negative value on error. 3741 **/ 3742 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3743 u16 src_offset, 3744 u8 pit_index) 3745 { 3746 struct i40e_flex_pit *new_pit, *entry; 3747 3748 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3749 if (!new_pit) 3750 return -ENOMEM; 3751 3752 new_pit->src_offset = src_offset; 3753 new_pit->pit_index = pit_index; 3754 3755 /* We need to insert this item such that the list is sorted by 3756 * src_offset in ascending order. 3757 */ 3758 list_for_each_entry(entry, flex_pit_list, list) { 3759 if (new_pit->src_offset < entry->src_offset) { 3760 list_add_tail(&new_pit->list, &entry->list); 3761 return 0; 3762 } 3763 3764 /* If we found an entry with our offset already programmed we 3765 * can simply return here, after freeing the memory. However, 3766 * if the pit_index does not match we need to report an error. 3767 */ 3768 if (new_pit->src_offset == entry->src_offset) { 3769 int err = 0; 3770 3771 /* If the PIT index is not the same we can't re-use 3772 * the entry, so we must report an error. 3773 */ 3774 if (new_pit->pit_index != entry->pit_index) 3775 err = -EINVAL; 3776 3777 kfree(new_pit); 3778 return err; 3779 } 3780 } 3781 3782 /* If we reached here, then we haven't yet added the item. This means 3783 * that we should add the item at the end of the list. 3784 */ 3785 list_add_tail(&new_pit->list, flex_pit_list); 3786 return 0; 3787 } 3788 3789 /** 3790 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3791 * @pf: Pointer to the PF structure 3792 * @flex_pit_list: list of flexible src offsets in use 3793 * @flex_pit_start: index to first entry for this section of the table 3794 * 3795 * In order to handle flexible data, the hardware uses a table of values 3796 * called the FLX_PIT table. This table is used to indicate which sections of 3797 * the input correspond to what PIT index values. Unfortunately, hardware is 3798 * very restrictive about programming this table. Entries must be ordered by 3799 * src_offset in ascending order, without duplicates. Additionally, unused 3800 * entries must be set to the unused index value, and must have valid size and 3801 * length according to the src_offset ordering. 3802 * 3803 * This function will reprogram the FLX_PIT register from a book-keeping 3804 * structure that we guarantee is already ordered correctly, and has no more 3805 * than 3 entries. 3806 * 3807 * To make things easier, we only support flexible values of one word length, 3808 * rather than allowing variable length flexible values. 3809 **/ 3810 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3811 struct list_head *flex_pit_list, 3812 int flex_pit_start) 3813 { 3814 struct i40e_flex_pit *entry = NULL; 3815 u16 last_offset = 0; 3816 int i = 0, j = 0; 3817 3818 /* First, loop over the list of flex PIT entries, and reprogram the 3819 * registers. 3820 */ 3821 list_for_each_entry(entry, flex_pit_list, list) { 3822 /* We have to be careful when programming values for the 3823 * largest SRC_OFFSET value. It is possible that adding 3824 * additional empty values at the end would overflow the space 3825 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3826 * we check here and add the empty values prior to adding the 3827 * largest value. 3828 * 3829 * To determine this, we will use a loop from i+1 to 3, which 3830 * will determine whether the unused entries would have valid 3831 * SRC_OFFSET. Note that there cannot be extra entries past 3832 * this value, because the only valid values would have been 3833 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3834 * have been added to the list in the first place. 3835 */ 3836 for (j = i + 1; j < 3; j++) { 3837 u16 offset = entry->src_offset + j; 3838 int index = flex_pit_start + i; 3839 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3840 1, 3841 offset - 3); 3842 3843 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3844 i40e_write_rx_ctl(&pf->hw, 3845 I40E_PRTQF_FLX_PIT(index), 3846 value); 3847 i++; 3848 } 3849 } 3850 3851 /* Now, we can program the actual value into the table */ 3852 i40e_write_rx_ctl(&pf->hw, 3853 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3854 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3855 1, 3856 entry->src_offset)); 3857 i++; 3858 } 3859 3860 /* In order to program the last entries in the table, we need to 3861 * determine the valid offset. If the list is empty, we'll just start 3862 * with 0. Otherwise, we'll start with the last item offset and add 1. 3863 * This ensures that all entries have valid sizes. If we don't do this 3864 * correctly, the hardware will disable flexible field parsing. 3865 */ 3866 if (!list_empty(flex_pit_list)) 3867 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3868 3869 for (; i < 3; i++, last_offset++) { 3870 i40e_write_rx_ctl(&pf->hw, 3871 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3872 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3873 1, 3874 last_offset)); 3875 } 3876 } 3877 3878 /** 3879 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3880 * @pf: pointer to the PF structure 3881 * 3882 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3883 * internal helper function for implementation details. 3884 **/ 3885 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3886 { 3887 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3888 I40E_FLEX_PIT_IDX_START_L3); 3889 3890 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3891 I40E_FLEX_PIT_IDX_START_L4); 3892 3893 /* We also need to program the L3 and L4 GLQF ORT register */ 3894 i40e_write_rx_ctl(&pf->hw, 3895 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3896 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3897 3, 1)); 3898 3899 i40e_write_rx_ctl(&pf->hw, 3900 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3901 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3902 3, 1)); 3903 } 3904 3905 /** 3906 * i40e_flow_str - Converts a flow_type into a human readable string 3907 * @fsp: the flow specification 3908 * 3909 * Currently only flow types we support are included here, and the string 3910 * value attempts to match what ethtool would use to configure this flow type. 3911 **/ 3912 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3913 { 3914 switch (fsp->flow_type & ~FLOW_EXT) { 3915 case TCP_V4_FLOW: 3916 return "tcp4"; 3917 case UDP_V4_FLOW: 3918 return "udp4"; 3919 case SCTP_V4_FLOW: 3920 return "sctp4"; 3921 case IP_USER_FLOW: 3922 return "ip4"; 3923 default: 3924 return "unknown"; 3925 } 3926 } 3927 3928 /** 3929 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3930 * @pit_index: PIT index to convert 3931 * 3932 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3933 * of range. 3934 **/ 3935 static u64 i40e_pit_index_to_mask(int pit_index) 3936 { 3937 switch (pit_index) { 3938 case 0: 3939 return I40E_FLEX_50_MASK; 3940 case 1: 3941 return I40E_FLEX_51_MASK; 3942 case 2: 3943 return I40E_FLEX_52_MASK; 3944 case 3: 3945 return I40E_FLEX_53_MASK; 3946 case 4: 3947 return I40E_FLEX_54_MASK; 3948 case 5: 3949 return I40E_FLEX_55_MASK; 3950 case 6: 3951 return I40E_FLEX_56_MASK; 3952 case 7: 3953 return I40E_FLEX_57_MASK; 3954 default: 3955 return 0; 3956 } 3957 } 3958 3959 /** 3960 * i40e_print_input_set - Show changes between two input sets 3961 * @vsi: the vsi being configured 3962 * @old: the old input set 3963 * @new: the new input set 3964 * 3965 * Print the difference between old and new input sets by showing which series 3966 * of words are toggled on or off. Only displays the bits we actually support 3967 * changing. 3968 **/ 3969 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3970 { 3971 struct i40e_pf *pf = vsi->back; 3972 bool old_value, new_value; 3973 int i; 3974 3975 old_value = !!(old & I40E_L3_SRC_MASK); 3976 new_value = !!(new & I40E_L3_SRC_MASK); 3977 if (old_value != new_value) 3978 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3979 old_value ? "ON" : "OFF", 3980 new_value ? "ON" : "OFF"); 3981 3982 old_value = !!(old & I40E_L3_DST_MASK); 3983 new_value = !!(new & I40E_L3_DST_MASK); 3984 if (old_value != new_value) 3985 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3986 old_value ? "ON" : "OFF", 3987 new_value ? "ON" : "OFF"); 3988 3989 old_value = !!(old & I40E_L4_SRC_MASK); 3990 new_value = !!(new & I40E_L4_SRC_MASK); 3991 if (old_value != new_value) 3992 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3993 old_value ? "ON" : "OFF", 3994 new_value ? "ON" : "OFF"); 3995 3996 old_value = !!(old & I40E_L4_DST_MASK); 3997 new_value = !!(new & I40E_L4_DST_MASK); 3998 if (old_value != new_value) 3999 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 4000 old_value ? "ON" : "OFF", 4001 new_value ? "ON" : "OFF"); 4002 4003 old_value = !!(old & I40E_VERIFY_TAG_MASK); 4004 new_value = !!(new & I40E_VERIFY_TAG_MASK); 4005 if (old_value != new_value) 4006 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 4007 old_value ? "ON" : "OFF", 4008 new_value ? "ON" : "OFF"); 4009 4010 /* Show change of flexible filter entries */ 4011 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 4012 u64 flex_mask = i40e_pit_index_to_mask(i); 4013 4014 old_value = !!(old & flex_mask); 4015 new_value = !!(new & flex_mask); 4016 if (old_value != new_value) 4017 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 4018 i, 4019 old_value ? "ON" : "OFF", 4020 new_value ? "ON" : "OFF"); 4021 } 4022 4023 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 4024 old); 4025 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 4026 new); 4027 } 4028 4029 /** 4030 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 4031 * @vsi: pointer to the targeted VSI 4032 * @fsp: pointer to Rx flow specification 4033 * @userdef: userdefined data from flow specification 4034 * 4035 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 4036 * for partial matches exists with a few limitations. First, hardware only 4037 * supports masking by word boundary (2 bytes) and not per individual bit. 4038 * Second, hardware is limited to using one mask for a flow type and cannot 4039 * use a separate mask for each filter. 4040 * 4041 * To support these limitations, if we already have a configured filter for 4042 * the specified type, this function enforces that new filters of the type 4043 * match the configured input set. Otherwise, if we do not have a filter of 4044 * the specified type, we allow the input set to be updated to match the 4045 * desired filter. 4046 * 4047 * To help ensure that administrators understand why filters weren't displayed 4048 * as supported, we print a diagnostic message displaying how the input set 4049 * would change and warning to delete the preexisting filters if required. 4050 * 4051 * Returns 0 on successful input set match, and a negative return code on 4052 * failure. 4053 **/ 4054 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 4055 struct ethtool_rx_flow_spec *fsp, 4056 struct i40e_rx_flow_userdef *userdef) 4057 { 4058 struct i40e_pf *pf = vsi->back; 4059 struct ethtool_tcpip4_spec *tcp_ip4_spec; 4060 struct ethtool_usrip4_spec *usr_ip4_spec; 4061 u64 current_mask, new_mask; 4062 bool new_flex_offset = false; 4063 bool flex_l3 = false; 4064 u16 *fdir_filter_count; 4065 u16 index, src_offset = 0; 4066 u8 pit_index = 0; 4067 int err; 4068 4069 switch (fsp->flow_type & ~FLOW_EXT) { 4070 case SCTP_V4_FLOW: 4071 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 4072 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 4073 break; 4074 case TCP_V4_FLOW: 4075 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4076 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4077 break; 4078 case UDP_V4_FLOW: 4079 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4080 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4081 break; 4082 case IP_USER_FLOW: 4083 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4084 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4085 flex_l3 = true; 4086 break; 4087 default: 4088 return -EOPNOTSUPP; 4089 } 4090 4091 /* Read the current input set from register memory. */ 4092 current_mask = i40e_read_fd_input_set(pf, index); 4093 new_mask = current_mask; 4094 4095 /* Determine, if any, the required changes to the input set in order 4096 * to support the provided mask. 4097 * 4098 * Hardware only supports masking at word (2 byte) granularity and does 4099 * not support full bitwise masking. This implementation simplifies 4100 * even further and only supports fully enabled or fully disabled 4101 * masks for each field, even though we could split the ip4src and 4102 * ip4dst fields. 4103 */ 4104 switch (fsp->flow_type & ~FLOW_EXT) { 4105 case SCTP_V4_FLOW: 4106 new_mask &= ~I40E_VERIFY_TAG_MASK; 4107 fallthrough; 4108 case TCP_V4_FLOW: 4109 case UDP_V4_FLOW: 4110 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4111 4112 /* IPv4 source address */ 4113 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4114 new_mask |= I40E_L3_SRC_MASK; 4115 else if (!tcp_ip4_spec->ip4src) 4116 new_mask &= ~I40E_L3_SRC_MASK; 4117 else 4118 return -EOPNOTSUPP; 4119 4120 /* IPv4 destination address */ 4121 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4122 new_mask |= I40E_L3_DST_MASK; 4123 else if (!tcp_ip4_spec->ip4dst) 4124 new_mask &= ~I40E_L3_DST_MASK; 4125 else 4126 return -EOPNOTSUPP; 4127 4128 /* L4 source port */ 4129 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4130 new_mask |= I40E_L4_SRC_MASK; 4131 else if (!tcp_ip4_spec->psrc) 4132 new_mask &= ~I40E_L4_SRC_MASK; 4133 else 4134 return -EOPNOTSUPP; 4135 4136 /* L4 destination port */ 4137 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4138 new_mask |= I40E_L4_DST_MASK; 4139 else if (!tcp_ip4_spec->pdst) 4140 new_mask &= ~I40E_L4_DST_MASK; 4141 else 4142 return -EOPNOTSUPP; 4143 4144 /* Filtering on Type of Service is not supported. */ 4145 if (tcp_ip4_spec->tos) 4146 return -EOPNOTSUPP; 4147 4148 break; 4149 case IP_USER_FLOW: 4150 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4151 4152 /* IPv4 source address */ 4153 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4154 new_mask |= I40E_L3_SRC_MASK; 4155 else if (!usr_ip4_spec->ip4src) 4156 new_mask &= ~I40E_L3_SRC_MASK; 4157 else 4158 return -EOPNOTSUPP; 4159 4160 /* IPv4 destination address */ 4161 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4162 new_mask |= I40E_L3_DST_MASK; 4163 else if (!usr_ip4_spec->ip4dst) 4164 new_mask &= ~I40E_L3_DST_MASK; 4165 else 4166 return -EOPNOTSUPP; 4167 4168 /* First 4 bytes of L4 header */ 4169 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4170 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4171 else if (!usr_ip4_spec->l4_4_bytes) 4172 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4173 else 4174 return -EOPNOTSUPP; 4175 4176 /* Filtering on Type of Service is not supported. */ 4177 if (usr_ip4_spec->tos) 4178 return -EOPNOTSUPP; 4179 4180 /* Filtering on IP version is not supported */ 4181 if (usr_ip4_spec->ip_ver) 4182 return -EINVAL; 4183 4184 /* Filtering on L4 protocol is not supported */ 4185 if (usr_ip4_spec->proto) 4186 return -EINVAL; 4187 4188 break; 4189 default: 4190 return -EOPNOTSUPP; 4191 } 4192 4193 /* First, clear all flexible filter entries */ 4194 new_mask &= ~I40E_FLEX_INPUT_MASK; 4195 4196 /* If we have a flexible filter, try to add this offset to the correct 4197 * flexible filter PIT list. Once finished, we can update the mask. 4198 * If the src_offset changed, we will get a new mask value which will 4199 * trigger an input set change. 4200 */ 4201 if (userdef->flex_filter) { 4202 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4203 4204 /* Flexible offset must be even, since the flexible payload 4205 * must be aligned on 2-byte boundary. 4206 */ 4207 if (userdef->flex_offset & 0x1) { 4208 dev_warn(&pf->pdev->dev, 4209 "Flexible data offset must be 2-byte aligned\n"); 4210 return -EINVAL; 4211 } 4212 4213 src_offset = userdef->flex_offset >> 1; 4214 4215 /* FLX_PIT source offset value is only so large */ 4216 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4217 dev_warn(&pf->pdev->dev, 4218 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4219 return -EINVAL; 4220 } 4221 4222 /* See if this offset has already been programmed. If we get 4223 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4224 * if we get a NULL pointer, this means we will need to add 4225 * the offset. 4226 */ 4227 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4228 src_offset); 4229 if (IS_ERR(flex_pit)) 4230 return PTR_ERR(flex_pit); 4231 4232 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4233 * packet types, and thus we need to program both L3 and L4 4234 * flexible values. These must have identical flexible index, 4235 * as otherwise we can't correctly program the input set. So 4236 * we'll find both an L3 and L4 index and make sure they are 4237 * the same. 4238 */ 4239 if (flex_l3) { 4240 l3_flex_pit = 4241 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4242 src_offset); 4243 if (IS_ERR(l3_flex_pit)) 4244 return PTR_ERR(l3_flex_pit); 4245 4246 if (flex_pit) { 4247 /* If we already had a matching L4 entry, we 4248 * need to make sure that the L3 entry we 4249 * obtained uses the same index. 4250 */ 4251 if (l3_flex_pit) { 4252 if (l3_flex_pit->pit_index != 4253 flex_pit->pit_index) { 4254 return -EINVAL; 4255 } 4256 } else { 4257 new_flex_offset = true; 4258 } 4259 } else { 4260 flex_pit = l3_flex_pit; 4261 } 4262 } 4263 4264 /* If we didn't find an existing flex offset, we need to 4265 * program a new one. However, we don't immediately program it 4266 * here because we will wait to program until after we check 4267 * that it is safe to change the input set. 4268 */ 4269 if (!flex_pit) { 4270 new_flex_offset = true; 4271 pit_index = i40e_unused_pit_index(pf); 4272 } else { 4273 pit_index = flex_pit->pit_index; 4274 } 4275 4276 /* Update the mask with the new offset */ 4277 new_mask |= i40e_pit_index_to_mask(pit_index); 4278 } 4279 4280 /* If the mask and flexible filter offsets for this filter match the 4281 * currently programmed values we don't need any input set change, so 4282 * this filter is safe to install. 4283 */ 4284 if (new_mask == current_mask && !new_flex_offset) 4285 return 0; 4286 4287 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4288 i40e_flow_str(fsp)); 4289 i40e_print_input_set(vsi, current_mask, new_mask); 4290 if (new_flex_offset) { 4291 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4292 pit_index, src_offset); 4293 } 4294 4295 /* Hardware input sets are global across multiple ports, so even the 4296 * main port cannot change them when in MFP mode as this would impact 4297 * any filters on the other ports. 4298 */ 4299 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4300 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4301 return -EOPNOTSUPP; 4302 } 4303 4304 /* This filter requires us to update the input set. However, hardware 4305 * only supports one input set per flow type, and does not support 4306 * separate masks for each filter. This means that we can only support 4307 * a single mask for all filters of a specific type. 4308 * 4309 * If we have preexisting filters, they obviously depend on the 4310 * current programmed input set. Display a diagnostic message in this 4311 * case explaining why the filter could not be accepted. 4312 */ 4313 if (*fdir_filter_count) { 4314 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4315 i40e_flow_str(fsp), 4316 *fdir_filter_count); 4317 return -EOPNOTSUPP; 4318 } 4319 4320 i40e_write_fd_input_set(pf, index, new_mask); 4321 4322 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4323 * frames. If we're programming the input set for IPv4/Other, we also 4324 * need to program the IPv4/Fragmented input set. Since we don't have 4325 * separate support, we'll always assume and enforce that the two flow 4326 * types must have matching input sets. 4327 */ 4328 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4329 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4330 new_mask); 4331 4332 /* Add the new offset and update table, if necessary */ 4333 if (new_flex_offset) { 4334 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4335 pit_index); 4336 if (err) 4337 return err; 4338 4339 if (flex_l3) { 4340 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4341 src_offset, 4342 pit_index); 4343 if (err) 4344 return err; 4345 } 4346 4347 i40e_reprogram_flex_pit(pf); 4348 } 4349 4350 return 0; 4351 } 4352 4353 /** 4354 * i40e_match_fdir_filter - Return true of two filters match 4355 * @a: pointer to filter struct 4356 * @b: pointer to filter struct 4357 * 4358 * Returns true if the two filters match exactly the same criteria. I.e. they 4359 * match the same flow type and have the same parameters. We don't need to 4360 * check any input-set since all filters of the same flow type must use the 4361 * same input set. 4362 **/ 4363 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4364 struct i40e_fdir_filter *b) 4365 { 4366 /* The filters do not much if any of these criteria differ. */ 4367 if (a->dst_ip != b->dst_ip || 4368 a->src_ip != b->src_ip || 4369 a->dst_port != b->dst_port || 4370 a->src_port != b->src_port || 4371 a->flow_type != b->flow_type || 4372 a->ip4_proto != b->ip4_proto) 4373 return false; 4374 4375 return true; 4376 } 4377 4378 /** 4379 * i40e_disallow_matching_filters - Check that new filters differ 4380 * @vsi: pointer to the targeted VSI 4381 * @input: new filter to check 4382 * 4383 * Due to hardware limitations, it is not possible for two filters that match 4384 * similar criteria to be programmed at the same time. This is true for a few 4385 * reasons: 4386 * 4387 * (a) all filters matching a particular flow type must use the same input 4388 * set, that is they must match the same criteria. 4389 * (b) different flow types will never match the same packet, as the flow type 4390 * is decided by hardware before checking which rules apply. 4391 * (c) hardware has no way to distinguish which order filters apply in. 4392 * 4393 * Due to this, we can't really support using the location data to order 4394 * filters in the hardware parsing. It is technically possible for the user to 4395 * request two filters matching the same criteria but which select different 4396 * queues. In this case, rather than keep both filters in the list, we reject 4397 * the 2nd filter when the user requests adding it. 4398 * 4399 * This avoids needing to track location for programming the filter to 4400 * hardware, and ensures that we avoid some strange scenarios involving 4401 * deleting filters which match the same criteria. 4402 **/ 4403 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4404 struct i40e_fdir_filter *input) 4405 { 4406 struct i40e_pf *pf = vsi->back; 4407 struct i40e_fdir_filter *rule; 4408 struct hlist_node *node2; 4409 4410 /* Loop through every filter, and check that it doesn't match */ 4411 hlist_for_each_entry_safe(rule, node2, 4412 &pf->fdir_filter_list, fdir_node) { 4413 /* Don't check the filters match if they share the same fd_id, 4414 * since the new filter is actually just updating the target 4415 * of the old filter. 4416 */ 4417 if (rule->fd_id == input->fd_id) 4418 continue; 4419 4420 /* If any filters match, then print a warning message to the 4421 * kernel message buffer and bail out. 4422 */ 4423 if (i40e_match_fdir_filter(rule, input)) { 4424 dev_warn(&pf->pdev->dev, 4425 "Existing user defined filter %d already matches this flow.\n", 4426 rule->fd_id); 4427 return -EINVAL; 4428 } 4429 } 4430 4431 return 0; 4432 } 4433 4434 /** 4435 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4436 * @vsi: pointer to the targeted VSI 4437 * @cmd: command to get or set RX flow classification rules 4438 * 4439 * Add Flow Director filters for a specific flow spec based on their 4440 * protocol. Returns 0 if the filters were successfully added. 4441 **/ 4442 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4443 struct ethtool_rxnfc *cmd) 4444 { 4445 struct i40e_rx_flow_userdef userdef; 4446 struct ethtool_rx_flow_spec *fsp; 4447 struct i40e_fdir_filter *input; 4448 u16 dest_vsi = 0, q_index = 0; 4449 struct i40e_pf *pf; 4450 int ret = -EINVAL; 4451 u8 dest_ctl; 4452 4453 if (!vsi) 4454 return -EINVAL; 4455 pf = vsi->back; 4456 4457 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4458 return -EOPNOTSUPP; 4459 4460 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4461 return -ENOSPC; 4462 4463 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4464 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4465 return -EBUSY; 4466 4467 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4468 return -EBUSY; 4469 4470 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4471 4472 /* Parse the user-defined field */ 4473 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4474 return -EINVAL; 4475 4476 /* Extended MAC field is not supported */ 4477 if (fsp->flow_type & FLOW_MAC_EXT) 4478 return -EINVAL; 4479 4480 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4481 if (ret) 4482 return ret; 4483 4484 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4485 pf->hw.func_caps.fd_filters_guaranteed)) { 4486 return -EINVAL; 4487 } 4488 4489 /* ring_cookie is either the drop index, or is a mask of the queue 4490 * index and VF id we wish to target. 4491 */ 4492 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4493 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4494 } else { 4495 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4496 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4497 4498 if (!vf) { 4499 if (ring >= vsi->num_queue_pairs) 4500 return -EINVAL; 4501 dest_vsi = vsi->id; 4502 } else { 4503 /* VFs are zero-indexed, so we subtract one here */ 4504 vf--; 4505 4506 if (vf >= pf->num_alloc_vfs) 4507 return -EINVAL; 4508 if (ring >= pf->vf[vf].num_queue_pairs) 4509 return -EINVAL; 4510 dest_vsi = pf->vf[vf].lan_vsi_id; 4511 } 4512 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4513 q_index = ring; 4514 } 4515 4516 input = kzalloc(sizeof(*input), GFP_KERNEL); 4517 4518 if (!input) 4519 return -ENOMEM; 4520 4521 input->fd_id = fsp->location; 4522 input->q_index = q_index; 4523 input->dest_vsi = dest_vsi; 4524 input->dest_ctl = dest_ctl; 4525 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4526 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4527 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4528 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4529 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4530 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4531 4532 /* Reverse the src and dest notion, since the HW expects them to be from 4533 * Tx perspective where as the input from user is from Rx filter view. 4534 */ 4535 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4536 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4537 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4538 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4539 4540 if (userdef.flex_filter) { 4541 input->flex_filter = true; 4542 input->flex_word = cpu_to_be16(userdef.flex_word); 4543 input->flex_offset = userdef.flex_offset; 4544 } 4545 4546 /* Avoid programming two filters with identical match criteria. */ 4547 ret = i40e_disallow_matching_filters(vsi, input); 4548 if (ret) 4549 goto free_filter_memory; 4550 4551 /* Add the input filter to the fdir_input_list, possibly replacing 4552 * a previous filter. Do not free the input structure after adding it 4553 * to the list as this would cause a use-after-free bug. 4554 */ 4555 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4556 ret = i40e_add_del_fdir(vsi, input, true); 4557 if (ret) 4558 goto remove_sw_rule; 4559 return 0; 4560 4561 remove_sw_rule: 4562 hlist_del(&input->fdir_node); 4563 pf->fdir_pf_active_filters--; 4564 free_filter_memory: 4565 kfree(input); 4566 return ret; 4567 } 4568 4569 /** 4570 * i40e_set_rxnfc - command to set RX flow classification rules 4571 * @netdev: network interface device structure 4572 * @cmd: ethtool rxnfc command 4573 * 4574 * Returns Success if the command is supported. 4575 **/ 4576 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4577 { 4578 struct i40e_netdev_priv *np = netdev_priv(netdev); 4579 struct i40e_vsi *vsi = np->vsi; 4580 struct i40e_pf *pf = vsi->back; 4581 int ret = -EOPNOTSUPP; 4582 4583 switch (cmd->cmd) { 4584 case ETHTOOL_SRXFH: 4585 ret = i40e_set_rss_hash_opt(pf, cmd); 4586 break; 4587 case ETHTOOL_SRXCLSRLINS: 4588 ret = i40e_add_fdir_ethtool(vsi, cmd); 4589 break; 4590 case ETHTOOL_SRXCLSRLDEL: 4591 ret = i40e_del_fdir_entry(vsi, cmd); 4592 break; 4593 default: 4594 break; 4595 } 4596 4597 return ret; 4598 } 4599 4600 /** 4601 * i40e_max_channels - get Max number of combined channels supported 4602 * @vsi: vsi pointer 4603 **/ 4604 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4605 { 4606 /* TODO: This code assumes DCB and FD is disabled for now. */ 4607 return vsi->alloc_queue_pairs; 4608 } 4609 4610 /** 4611 * i40e_get_channels - Get the current channels enabled and max supported etc. 4612 * @dev: network interface device structure 4613 * @ch: ethtool channels structure 4614 * 4615 * We don't support separate tx and rx queues as channels. The other count 4616 * represents how many queues are being used for control. max_combined counts 4617 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4618 * q_vectors since we support a lot more queue pairs than q_vectors. 4619 **/ 4620 static void i40e_get_channels(struct net_device *dev, 4621 struct ethtool_channels *ch) 4622 { 4623 struct i40e_netdev_priv *np = netdev_priv(dev); 4624 struct i40e_vsi *vsi = np->vsi; 4625 struct i40e_pf *pf = vsi->back; 4626 4627 /* report maximum channels */ 4628 ch->max_combined = i40e_max_channels(vsi); 4629 4630 /* report info for other vector */ 4631 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4632 ch->max_other = ch->other_count; 4633 4634 /* Note: This code assumes DCB is disabled for now. */ 4635 ch->combined_count = vsi->num_queue_pairs; 4636 } 4637 4638 /** 4639 * i40e_set_channels - Set the new channels count. 4640 * @dev: network interface device structure 4641 * @ch: ethtool channels structure 4642 * 4643 * The new channels count may not be the same as requested by the user 4644 * since it gets rounded down to a power of 2 value. 4645 **/ 4646 static int i40e_set_channels(struct net_device *dev, 4647 struct ethtool_channels *ch) 4648 { 4649 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4650 struct i40e_netdev_priv *np = netdev_priv(dev); 4651 unsigned int count = ch->combined_count; 4652 struct i40e_vsi *vsi = np->vsi; 4653 struct i40e_pf *pf = vsi->back; 4654 struct i40e_fdir_filter *rule; 4655 struct hlist_node *node2; 4656 int new_count; 4657 int err = 0; 4658 4659 /* We do not support setting channels for any other VSI at present */ 4660 if (vsi->type != I40E_VSI_MAIN) 4661 return -EINVAL; 4662 4663 /* We do not support setting channels via ethtool when TCs are 4664 * configured through mqprio 4665 */ 4666 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4667 return -EINVAL; 4668 4669 /* verify they are not requesting separate vectors */ 4670 if (!count || ch->rx_count || ch->tx_count) 4671 return -EINVAL; 4672 4673 /* verify other_count has not changed */ 4674 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4675 return -EINVAL; 4676 4677 /* verify the number of channels does not exceed hardware limits */ 4678 if (count > i40e_max_channels(vsi)) 4679 return -EINVAL; 4680 4681 /* verify that the number of channels does not invalidate any current 4682 * flow director rules 4683 */ 4684 hlist_for_each_entry_safe(rule, node2, 4685 &pf->fdir_filter_list, fdir_node) { 4686 if (rule->dest_ctl != drop && count <= rule->q_index) { 4687 dev_warn(&pf->pdev->dev, 4688 "Existing user defined filter %d assigns flow to queue %d\n", 4689 rule->fd_id, rule->q_index); 4690 err = -EINVAL; 4691 } 4692 } 4693 4694 if (err) { 4695 dev_err(&pf->pdev->dev, 4696 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4697 count); 4698 return err; 4699 } 4700 4701 /* update feature limits from largest to smallest supported values */ 4702 /* TODO: Flow director limit, DCB etc */ 4703 4704 /* use rss_reconfig to rebuild with new queue count and update traffic 4705 * class queue mapping 4706 */ 4707 new_count = i40e_reconfig_rss_queues(pf, count); 4708 if (new_count > 0) 4709 return 0; 4710 else 4711 return -EINVAL; 4712 } 4713 4714 /** 4715 * i40e_get_rxfh_key_size - get the RSS hash key size 4716 * @netdev: network interface device structure 4717 * 4718 * Returns the table size. 4719 **/ 4720 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4721 { 4722 return I40E_HKEY_ARRAY_SIZE; 4723 } 4724 4725 /** 4726 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4727 * @netdev: network interface device structure 4728 * 4729 * Returns the table size. 4730 **/ 4731 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4732 { 4733 return I40E_HLUT_ARRAY_SIZE; 4734 } 4735 4736 /** 4737 * i40e_get_rxfh - get the rx flow hash indirection table 4738 * @netdev: network interface device structure 4739 * @indir: indirection table 4740 * @key: hash key 4741 * @hfunc: hash function 4742 * 4743 * Reads the indirection table directly from the hardware. Returns 0 on 4744 * success. 4745 **/ 4746 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4747 u8 *hfunc) 4748 { 4749 struct i40e_netdev_priv *np = netdev_priv(netdev); 4750 struct i40e_vsi *vsi = np->vsi; 4751 u8 *lut, *seed = NULL; 4752 int ret; 4753 u16 i; 4754 4755 if (hfunc) 4756 *hfunc = ETH_RSS_HASH_TOP; 4757 4758 if (!indir) 4759 return 0; 4760 4761 seed = key; 4762 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4763 if (!lut) 4764 return -ENOMEM; 4765 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4766 if (ret) 4767 goto out; 4768 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4769 indir[i] = (u32)(lut[i]); 4770 4771 out: 4772 kfree(lut); 4773 4774 return ret; 4775 } 4776 4777 /** 4778 * i40e_set_rxfh - set the rx flow hash indirection table 4779 * @netdev: network interface device structure 4780 * @indir: indirection table 4781 * @key: hash key 4782 * @hfunc: hash function to use 4783 * 4784 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4785 * returns 0 after programming the table. 4786 **/ 4787 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4788 const u8 *key, const u8 hfunc) 4789 { 4790 struct i40e_netdev_priv *np = netdev_priv(netdev); 4791 struct i40e_vsi *vsi = np->vsi; 4792 struct i40e_pf *pf = vsi->back; 4793 u8 *seed = NULL; 4794 u16 i; 4795 4796 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4797 return -EOPNOTSUPP; 4798 4799 if (key) { 4800 if (!vsi->rss_hkey_user) { 4801 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4802 GFP_KERNEL); 4803 if (!vsi->rss_hkey_user) 4804 return -ENOMEM; 4805 } 4806 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4807 seed = vsi->rss_hkey_user; 4808 } 4809 if (!vsi->rss_lut_user) { 4810 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4811 if (!vsi->rss_lut_user) 4812 return -ENOMEM; 4813 } 4814 4815 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4816 if (indir) 4817 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4818 vsi->rss_lut_user[i] = (u8)(indir[i]); 4819 else 4820 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4821 vsi->rss_size); 4822 4823 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4824 I40E_HLUT_ARRAY_SIZE); 4825 } 4826 4827 /** 4828 * i40e_get_priv_flags - report device private flags 4829 * @dev: network interface device structure 4830 * 4831 * The get string set count and the string set should be matched for each 4832 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4833 * array. 4834 * 4835 * Returns a u32 bitmap of flags. 4836 **/ 4837 static u32 i40e_get_priv_flags(struct net_device *dev) 4838 { 4839 struct i40e_netdev_priv *np = netdev_priv(dev); 4840 struct i40e_vsi *vsi = np->vsi; 4841 struct i40e_pf *pf = vsi->back; 4842 u32 i, j, ret_flags = 0; 4843 4844 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4845 const struct i40e_priv_flags *priv_flags; 4846 4847 priv_flags = &i40e_gstrings_priv_flags[i]; 4848 4849 if (priv_flags->flag & pf->flags) 4850 ret_flags |= BIT(i); 4851 } 4852 4853 if (pf->hw.pf_id != 0) 4854 return ret_flags; 4855 4856 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4857 const struct i40e_priv_flags *priv_flags; 4858 4859 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4860 4861 if (priv_flags->flag & pf->flags) 4862 ret_flags |= BIT(i + j); 4863 } 4864 4865 return ret_flags; 4866 } 4867 4868 /** 4869 * i40e_set_priv_flags - set private flags 4870 * @dev: network interface device structure 4871 * @flags: bit flags to be set 4872 **/ 4873 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4874 { 4875 struct i40e_netdev_priv *np = netdev_priv(dev); 4876 u64 orig_flags, new_flags, changed_flags; 4877 enum i40e_admin_queue_err adq_err; 4878 struct i40e_vsi *vsi = np->vsi; 4879 struct i40e_pf *pf = vsi->back; 4880 bool is_reset_needed; 4881 i40e_status status; 4882 u32 i, j; 4883 4884 orig_flags = READ_ONCE(pf->flags); 4885 new_flags = orig_flags; 4886 4887 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4888 const struct i40e_priv_flags *priv_flags; 4889 4890 priv_flags = &i40e_gstrings_priv_flags[i]; 4891 4892 if (flags & BIT(i)) 4893 new_flags |= priv_flags->flag; 4894 else 4895 new_flags &= ~(priv_flags->flag); 4896 4897 /* If this is a read-only flag, it can't be changed */ 4898 if (priv_flags->read_only && 4899 ((orig_flags ^ new_flags) & ~BIT(i))) 4900 return -EOPNOTSUPP; 4901 } 4902 4903 if (pf->hw.pf_id != 0) 4904 goto flags_complete; 4905 4906 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4907 const struct i40e_priv_flags *priv_flags; 4908 4909 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4910 4911 if (flags & BIT(i + j)) 4912 new_flags |= priv_flags->flag; 4913 else 4914 new_flags &= ~(priv_flags->flag); 4915 4916 /* If this is a read-only flag, it can't be changed */ 4917 if (priv_flags->read_only && 4918 ((orig_flags ^ new_flags) & ~BIT(i))) 4919 return -EOPNOTSUPP; 4920 } 4921 4922 flags_complete: 4923 changed_flags = orig_flags ^ new_flags; 4924 4925 is_reset_needed = !!(changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4926 I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED | 4927 I40E_FLAG_DISABLE_FW_LLDP)); 4928 4929 /* Before we finalize any flag changes, we need to perform some 4930 * checks to ensure that the changes are supported and safe. 4931 */ 4932 4933 /* ATR eviction is not supported on all devices */ 4934 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4935 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4936 return -EOPNOTSUPP; 4937 4938 /* If the driver detected FW LLDP was disabled on init, this flag could 4939 * be set, however we do not support _changing_ the flag: 4940 * - on XL710 if NPAR is enabled or FW API version < 1.7 4941 * - on X722 with FW API version < 1.6 4942 * There are situations where older FW versions/NPAR enabled PFs could 4943 * disable LLDP, however we _must_ not allow the user to enable/disable 4944 * LLDP with this flag on unsupported FW versions. 4945 */ 4946 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4947 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 4948 dev_warn(&pf->pdev->dev, 4949 "Device does not support changing FW LLDP\n"); 4950 return -EOPNOTSUPP; 4951 } 4952 } 4953 4954 if (((changed_flags & I40E_FLAG_RS_FEC) || 4955 (changed_flags & I40E_FLAG_BASE_R_FEC)) && 4956 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 4957 pf->hw.device_id != I40E_DEV_ID_25G_B) { 4958 dev_warn(&pf->pdev->dev, 4959 "Device does not support changing FEC configuration\n"); 4960 return -EOPNOTSUPP; 4961 } 4962 4963 /* Process any additional changes needed as a result of flag changes. 4964 * The changed_flags value reflects the list of bits that were 4965 * changed in the code above. 4966 */ 4967 4968 /* Flush current ATR settings if ATR was disabled */ 4969 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4970 !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) { 4971 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4972 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4973 } 4974 4975 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4976 u16 sw_flags = 0, valid_flags = 0; 4977 int ret; 4978 4979 if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4980 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4981 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4982 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4983 0, NULL); 4984 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4985 dev_info(&pf->pdev->dev, 4986 "couldn't set switch config bits, err %s aq_err %s\n", 4987 i40e_stat_str(&pf->hw, ret), 4988 i40e_aq_str(&pf->hw, 4989 pf->hw.aq.asq_last_status)); 4990 /* not a fatal problem, just keep going */ 4991 } 4992 } 4993 4994 if ((changed_flags & I40E_FLAG_RS_FEC) || 4995 (changed_flags & I40E_FLAG_BASE_R_FEC)) { 4996 u8 fec_cfg = 0; 4997 4998 if (new_flags & I40E_FLAG_RS_FEC && 4999 new_flags & I40E_FLAG_BASE_R_FEC) { 5000 fec_cfg = I40E_AQ_SET_FEC_AUTO; 5001 } else if (new_flags & I40E_FLAG_RS_FEC) { 5002 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 5003 I40E_AQ_SET_FEC_ABILITY_RS); 5004 } else if (new_flags & I40E_FLAG_BASE_R_FEC) { 5005 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 5006 I40E_AQ_SET_FEC_ABILITY_KR); 5007 } 5008 if (i40e_set_fec_cfg(dev, fec_cfg)) 5009 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 5010 } 5011 5012 if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 5013 (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) { 5014 dev_err(&pf->pdev->dev, 5015 "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n"); 5016 return -EOPNOTSUPP; 5017 } 5018 5019 if ((changed_flags & new_flags & 5020 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 5021 (new_flags & I40E_FLAG_MFP_ENABLED)) 5022 dev_warn(&pf->pdev->dev, 5023 "Turning on link-down-on-close flag may affect other partitions\n"); 5024 5025 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 5026 if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) { 5027 struct i40e_dcbx_config *dcbcfg; 5028 5029 i40e_aq_stop_lldp(&pf->hw, true, false, NULL); 5030 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 5031 /* reset local_dcbx_config to default */ 5032 dcbcfg = &pf->hw.local_dcbx_config; 5033 dcbcfg->etscfg.willing = 1; 5034 dcbcfg->etscfg.maxtcs = 0; 5035 dcbcfg->etscfg.tcbwtable[0] = 100; 5036 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 5037 dcbcfg->etscfg.tcbwtable[i] = 0; 5038 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 5039 dcbcfg->etscfg.prioritytable[i] = 0; 5040 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 5041 dcbcfg->pfc.willing = 1; 5042 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 5043 } else { 5044 status = i40e_aq_start_lldp(&pf->hw, false, NULL); 5045 if (status) { 5046 adq_err = pf->hw.aq.asq_last_status; 5047 switch (adq_err) { 5048 case I40E_AQ_RC_EEXIST: 5049 dev_warn(&pf->pdev->dev, 5050 "FW LLDP agent is already running\n"); 5051 is_reset_needed = false; 5052 break; 5053 case I40E_AQ_RC_EPERM: 5054 dev_warn(&pf->pdev->dev, 5055 "Device configuration forbids SW from starting the LLDP agent.\n"); 5056 return -EINVAL; 5057 default: 5058 dev_warn(&pf->pdev->dev, 5059 "Starting FW LLDP agent failed: error: %s, %s\n", 5060 i40e_stat_str(&pf->hw, 5061 status), 5062 i40e_aq_str(&pf->hw, 5063 adq_err)); 5064 return -EINVAL; 5065 } 5066 } 5067 } 5068 } 5069 5070 /* Now that we've checked to ensure that the new flags are valid, load 5071 * them into place. Since we only modify flags either (a) during 5072 * initialization or (b) while holding the RTNL lock, we don't need 5073 * anything fancy here. 5074 */ 5075 pf->flags = new_flags; 5076 5077 /* Issue reset to cause things to take effect, as additional bits 5078 * are added we will need to create a mask of bits requiring reset 5079 */ 5080 if (is_reset_needed) 5081 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 5082 5083 return 0; 5084 } 5085 5086 /** 5087 * i40e_get_module_info - get (Q)SFP+ module type info 5088 * @netdev: network interface device structure 5089 * @modinfo: module EEPROM size and layout information structure 5090 **/ 5091 static int i40e_get_module_info(struct net_device *netdev, 5092 struct ethtool_modinfo *modinfo) 5093 { 5094 struct i40e_netdev_priv *np = netdev_priv(netdev); 5095 struct i40e_vsi *vsi = np->vsi; 5096 struct i40e_pf *pf = vsi->back; 5097 struct i40e_hw *hw = &pf->hw; 5098 u32 sff8472_comp = 0; 5099 u32 sff8472_swap = 0; 5100 u32 sff8636_rev = 0; 5101 i40e_status status; 5102 u32 type = 0; 5103 5104 /* Check if firmware supports reading module EEPROM. */ 5105 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 5106 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5107 return -EINVAL; 5108 } 5109 5110 status = i40e_update_link_info(hw); 5111 if (status) 5112 return -EIO; 5113 5114 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5115 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5116 return -EINVAL; 5117 } 5118 5119 type = hw->phy.link_info.module_type[0]; 5120 5121 switch (type) { 5122 case I40E_MODULE_TYPE_SFP: 5123 status = i40e_aq_get_phy_register(hw, 5124 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5125 I40E_I2C_EEPROM_DEV_ADDR, true, 5126 I40E_MODULE_SFF_8472_COMP, 5127 &sff8472_comp, NULL); 5128 if (status) 5129 return -EIO; 5130 5131 status = i40e_aq_get_phy_register(hw, 5132 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5133 I40E_I2C_EEPROM_DEV_ADDR, true, 5134 I40E_MODULE_SFF_8472_SWAP, 5135 &sff8472_swap, NULL); 5136 if (status) 5137 return -EIO; 5138 5139 /* Check if the module requires address swap to access 5140 * the other EEPROM memory page. 5141 */ 5142 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5143 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5144 modinfo->type = ETH_MODULE_SFF_8079; 5145 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5146 } else if (sff8472_comp == 0x00) { 5147 /* Module is not SFF-8472 compliant */ 5148 modinfo->type = ETH_MODULE_SFF_8079; 5149 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5150 } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) { 5151 /* Module is SFF-8472 compliant but doesn't implement 5152 * Digital Diagnostic Monitoring (DDM). 5153 */ 5154 modinfo->type = ETH_MODULE_SFF_8079; 5155 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5156 } else { 5157 modinfo->type = ETH_MODULE_SFF_8472; 5158 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5159 } 5160 break; 5161 case I40E_MODULE_TYPE_QSFP_PLUS: 5162 /* Read from memory page 0. */ 5163 status = i40e_aq_get_phy_register(hw, 5164 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5165 0, true, 5166 I40E_MODULE_REVISION_ADDR, 5167 &sff8636_rev, NULL); 5168 if (status) 5169 return -EIO; 5170 /* Determine revision compliance byte */ 5171 if (sff8636_rev > 0x02) { 5172 /* Module is SFF-8636 compliant */ 5173 modinfo->type = ETH_MODULE_SFF_8636; 5174 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5175 } else { 5176 modinfo->type = ETH_MODULE_SFF_8436; 5177 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5178 } 5179 break; 5180 case I40E_MODULE_TYPE_QSFP28: 5181 modinfo->type = ETH_MODULE_SFF_8636; 5182 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5183 break; 5184 default: 5185 netdev_err(vsi->netdev, "Module type unrecognized\n"); 5186 return -EINVAL; 5187 } 5188 return 0; 5189 } 5190 5191 /** 5192 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5193 * @netdev: network interface device structure 5194 * @ee: EEPROM dump request structure 5195 * @data: buffer to be filled with EEPROM contents 5196 **/ 5197 static int i40e_get_module_eeprom(struct net_device *netdev, 5198 struct ethtool_eeprom *ee, 5199 u8 *data) 5200 { 5201 struct i40e_netdev_priv *np = netdev_priv(netdev); 5202 struct i40e_vsi *vsi = np->vsi; 5203 struct i40e_pf *pf = vsi->back; 5204 struct i40e_hw *hw = &pf->hw; 5205 bool is_sfp = false; 5206 i40e_status status; 5207 u32 value = 0; 5208 int i; 5209 5210 if (!ee || !ee->len || !data) 5211 return -EINVAL; 5212 5213 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5214 is_sfp = true; 5215 5216 for (i = 0; i < ee->len; i++) { 5217 u32 offset = i + ee->offset; 5218 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5219 5220 /* Check if we need to access the other memory page */ 5221 if (is_sfp) { 5222 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5223 offset -= ETH_MODULE_SFF_8079_LEN; 5224 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5225 } 5226 } else { 5227 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5228 /* Compute memory page number and offset. */ 5229 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5230 addr++; 5231 } 5232 } 5233 5234 status = i40e_aq_get_phy_register(hw, 5235 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5236 true, addr, offset, &value, NULL); 5237 if (status) 5238 return -EIO; 5239 data[i] = value; 5240 } 5241 return 0; 5242 } 5243 5244 static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata) 5245 { 5246 return -EOPNOTSUPP; 5247 } 5248 5249 static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata) 5250 { 5251 return -EOPNOTSUPP; 5252 } 5253 5254 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = { 5255 .get_drvinfo = i40e_get_drvinfo, 5256 .set_eeprom = i40e_set_eeprom, 5257 .get_eeprom_len = i40e_get_eeprom_len, 5258 .get_eeprom = i40e_get_eeprom, 5259 }; 5260 5261 static const struct ethtool_ops i40e_ethtool_ops = { 5262 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 5263 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 5264 ETHTOOL_COALESCE_USE_ADAPTIVE | 5265 ETHTOOL_COALESCE_RX_USECS_HIGH | 5266 ETHTOOL_COALESCE_TX_USECS_HIGH, 5267 .get_drvinfo = i40e_get_drvinfo, 5268 .get_regs_len = i40e_get_regs_len, 5269 .get_regs = i40e_get_regs, 5270 .nway_reset = i40e_nway_reset, 5271 .get_link = ethtool_op_get_link, 5272 .get_wol = i40e_get_wol, 5273 .set_wol = i40e_set_wol, 5274 .set_eeprom = i40e_set_eeprom, 5275 .get_eeprom_len = i40e_get_eeprom_len, 5276 .get_eeprom = i40e_get_eeprom, 5277 .get_ringparam = i40e_get_ringparam, 5278 .set_ringparam = i40e_set_ringparam, 5279 .get_pauseparam = i40e_get_pauseparam, 5280 .set_pauseparam = i40e_set_pauseparam, 5281 .get_msglevel = i40e_get_msglevel, 5282 .set_msglevel = i40e_set_msglevel, 5283 .get_rxnfc = i40e_get_rxnfc, 5284 .set_rxnfc = i40e_set_rxnfc, 5285 .self_test = i40e_diag_test, 5286 .get_strings = i40e_get_strings, 5287 .get_eee = i40e_get_eee, 5288 .set_eee = i40e_set_eee, 5289 .set_phys_id = i40e_set_phys_id, 5290 .get_sset_count = i40e_get_sset_count, 5291 .get_ethtool_stats = i40e_get_ethtool_stats, 5292 .get_coalesce = i40e_get_coalesce, 5293 .set_coalesce = i40e_set_coalesce, 5294 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5295 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5296 .get_rxfh = i40e_get_rxfh, 5297 .set_rxfh = i40e_set_rxfh, 5298 .get_channels = i40e_get_channels, 5299 .set_channels = i40e_set_channels, 5300 .get_module_info = i40e_get_module_info, 5301 .get_module_eeprom = i40e_get_module_eeprom, 5302 .get_ts_info = i40e_get_ts_info, 5303 .get_priv_flags = i40e_get_priv_flags, 5304 .set_priv_flags = i40e_set_priv_flags, 5305 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5306 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5307 .get_link_ksettings = i40e_get_link_ksettings, 5308 .set_link_ksettings = i40e_set_link_ksettings, 5309 .get_fecparam = i40e_get_fec_param, 5310 .set_fecparam = i40e_set_fec_param, 5311 .flash_device = i40e_ddp_flash, 5312 }; 5313 5314 void i40e_set_ethtool_ops(struct net_device *netdev) 5315 { 5316 struct i40e_netdev_priv *np = netdev_priv(netdev); 5317 struct i40e_pf *pf = np->vsi->back; 5318 5319 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) 5320 netdev->ethtool_ops = &i40e_ethtool_ops; 5321 else 5322 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops; 5323 } 5324