1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 130 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 131 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 132 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 135 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 136 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 137 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 138 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 139 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 142 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 143 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 144 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 145 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 146 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 148 I40E_PF_STAT("arq_overflows", arq_overflows), 149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 150 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 151 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 152 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 153 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 154 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 155 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 156 157 /* LPI stats */ 158 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 159 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 160 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 161 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 162 }; 163 164 #define I40E_QUEUE_STATS_LEN(n) \ 165 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 166 * 2 /* Tx and Rx together */ \ 167 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 168 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 169 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 170 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 171 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 172 I40E_MISC_STATS_LEN + \ 173 I40E_QUEUE_STATS_LEN((n))) 174 #define I40E_PFC_STATS_LEN ( \ 175 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 176 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 180 / sizeof(u64)) 181 #define I40E_VEB_TC_STATS_LEN ( \ 182 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 183 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 186 / sizeof(u64)) 187 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 188 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 189 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 190 I40E_PFC_STATS_LEN + \ 191 I40E_VSI_STATS_LEN((n))) 192 193 enum i40e_ethtool_test_id { 194 I40E_ETH_TEST_REG = 0, 195 I40E_ETH_TEST_EEPROM, 196 I40E_ETH_TEST_INTR, 197 I40E_ETH_TEST_LINK, 198 }; 199 200 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 201 "Register test (offline)", 202 "Eeprom test (offline)", 203 "Interrupt test (offline)", 204 "Link test (on/offline)" 205 }; 206 207 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 208 209 struct i40e_priv_flags { 210 char flag_string[ETH_GSTRING_LEN]; 211 u64 flag; 212 bool read_only; 213 }; 214 215 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 216 .flag_string = _name, \ 217 .flag = _flag, \ 218 .read_only = _read_only, \ 219 } 220 221 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 222 /* NOTE: MFP setting cannot be changed */ 223 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 224 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 225 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 226 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 227 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_CAPABLE, 0), 228 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 229 }; 230 231 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 232 233 /* Private flags with a global effect, restricted to PF 0 */ 234 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 235 I40E_PRIV_FLAG("vf-true-promisc-support", 236 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 237 }; 238 239 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 240 241 /** 242 * i40e_partition_setting_complaint - generic complaint for MFP restriction 243 * @pf: the PF struct 244 **/ 245 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 246 { 247 dev_info(&pf->pdev->dev, 248 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 249 } 250 251 /** 252 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 253 * @phy_types: PHY types to convert 254 * @supported: pointer to the ethtool supported variable to fill in 255 * @advertising: pointer to the ethtool advertising variable to fill in 256 * 257 **/ 258 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, 259 u32 *advertising) 260 { 261 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 262 u64 phy_types = pf->hw.phy.phy_types; 263 264 *supported = 0x0; 265 *advertising = 0x0; 266 267 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 268 *supported |= SUPPORTED_Autoneg | 269 SUPPORTED_1000baseT_Full; 270 *advertising |= ADVERTISED_Autoneg; 271 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 272 *advertising |= ADVERTISED_1000baseT_Full; 273 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 274 *supported |= SUPPORTED_100baseT_Full; 275 *advertising |= ADVERTISED_100baseT_Full; 276 } 277 } 278 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 279 phy_types & I40E_CAP_PHY_TYPE_XFI || 280 phy_types & I40E_CAP_PHY_TYPE_SFI || 281 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 282 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) 283 *supported |= SUPPORTED_10000baseT_Full; 284 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 285 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 287 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 289 *supported |= SUPPORTED_Autoneg | 290 SUPPORTED_10000baseT_Full; 291 *advertising |= ADVERTISED_Autoneg; 292 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 293 *advertising |= ADVERTISED_10000baseT_Full; 294 } 295 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 296 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 297 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 298 *supported |= SUPPORTED_40000baseCR4_Full; 299 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 300 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 301 *supported |= SUPPORTED_Autoneg | 302 SUPPORTED_40000baseCR4_Full; 303 *advertising |= ADVERTISED_Autoneg; 304 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 305 *advertising |= ADVERTISED_40000baseCR4_Full; 306 } 307 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 308 *supported |= SUPPORTED_Autoneg | 309 SUPPORTED_100baseT_Full; 310 *advertising |= ADVERTISED_Autoneg; 311 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 312 *advertising |= ADVERTISED_100baseT_Full; 313 } 314 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 315 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 316 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 317 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 318 *supported |= SUPPORTED_Autoneg | 319 SUPPORTED_1000baseT_Full; 320 *advertising |= ADVERTISED_Autoneg; 321 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 322 *advertising |= ADVERTISED_1000baseT_Full; 323 } 324 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 325 *supported |= SUPPORTED_40000baseSR4_Full; 326 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 327 *supported |= SUPPORTED_40000baseLR4_Full; 328 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 329 *supported |= SUPPORTED_40000baseKR4_Full | 330 SUPPORTED_Autoneg; 331 *advertising |= ADVERTISED_40000baseKR4_Full | 332 ADVERTISED_Autoneg; 333 } 334 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 335 *supported |= SUPPORTED_20000baseKR2_Full | 336 SUPPORTED_Autoneg; 337 *advertising |= ADVERTISED_Autoneg; 338 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 339 *advertising |= ADVERTISED_20000baseKR2_Full; 340 } 341 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) { 342 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 343 *supported |= SUPPORTED_10000baseKR_Full | 344 SUPPORTED_Autoneg; 345 *advertising |= ADVERTISED_Autoneg; 346 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 347 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 348 *advertising |= ADVERTISED_10000baseKR_Full; 349 } 350 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 351 *supported |= SUPPORTED_10000baseKX4_Full | 352 SUPPORTED_Autoneg; 353 *advertising |= ADVERTISED_Autoneg; 354 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 355 *advertising |= ADVERTISED_10000baseKX4_Full; 356 } 357 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) { 358 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 359 *supported |= SUPPORTED_1000baseKX_Full | 360 SUPPORTED_Autoneg; 361 *advertising |= ADVERTISED_Autoneg; 362 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 363 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 364 *advertising |= ADVERTISED_1000baseKX_Full; 365 } 366 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 367 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 368 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 369 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 370 *supported |= SUPPORTED_Autoneg; 371 *advertising |= ADVERTISED_Autoneg; 372 } 373 } 374 375 /** 376 * i40e_get_settings_link_up - Get the Link settings for when link is up 377 * @hw: hw structure 378 * @ecmd: ethtool command to fill in 379 * @netdev: network interface device structure 380 * 381 **/ 382 static void i40e_get_settings_link_up(struct i40e_hw *hw, 383 struct ethtool_link_ksettings *cmd, 384 struct net_device *netdev, 385 struct i40e_pf *pf) 386 { 387 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 388 u32 link_speed = hw_link_info->link_speed; 389 u32 e_advertising = 0x0; 390 u32 e_supported = 0x0; 391 u32 supported, advertising; 392 393 ethtool_convert_link_mode_to_legacy_u32(&supported, 394 cmd->link_modes.supported); 395 ethtool_convert_link_mode_to_legacy_u32(&advertising, 396 cmd->link_modes.advertising); 397 398 /* Initialize supported and advertised settings based on phy settings */ 399 switch (hw_link_info->phy_type) { 400 case I40E_PHY_TYPE_40GBASE_CR4: 401 case I40E_PHY_TYPE_40GBASE_CR4_CU: 402 supported = SUPPORTED_Autoneg | 403 SUPPORTED_40000baseCR4_Full; 404 advertising = ADVERTISED_Autoneg | 405 ADVERTISED_40000baseCR4_Full; 406 break; 407 case I40E_PHY_TYPE_XLAUI: 408 case I40E_PHY_TYPE_XLPPI: 409 case I40E_PHY_TYPE_40GBASE_AOC: 410 supported = SUPPORTED_40000baseCR4_Full; 411 break; 412 case I40E_PHY_TYPE_40GBASE_SR4: 413 supported = SUPPORTED_40000baseSR4_Full; 414 break; 415 case I40E_PHY_TYPE_40GBASE_LR4: 416 supported = SUPPORTED_40000baseLR4_Full; 417 break; 418 case I40E_PHY_TYPE_10GBASE_SR: 419 case I40E_PHY_TYPE_10GBASE_LR: 420 case I40E_PHY_TYPE_1000BASE_SX: 421 case I40E_PHY_TYPE_1000BASE_LX: 422 supported = SUPPORTED_10000baseT_Full; 423 if (hw_link_info->module_type[2] & 424 I40E_MODULE_TYPE_1000BASE_SX || 425 hw_link_info->module_type[2] & 426 I40E_MODULE_TYPE_1000BASE_LX) { 427 supported |= SUPPORTED_1000baseT_Full; 428 if (hw_link_info->requested_speeds & 429 I40E_LINK_SPEED_1GB) 430 advertising |= ADVERTISED_1000baseT_Full; 431 } 432 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 433 advertising |= ADVERTISED_10000baseT_Full; 434 break; 435 case I40E_PHY_TYPE_10GBASE_T: 436 case I40E_PHY_TYPE_1000BASE_T: 437 case I40E_PHY_TYPE_100BASE_TX: 438 supported = SUPPORTED_Autoneg | 439 SUPPORTED_10000baseT_Full | 440 SUPPORTED_1000baseT_Full | 441 SUPPORTED_100baseT_Full; 442 advertising = ADVERTISED_Autoneg; 443 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 444 advertising |= ADVERTISED_10000baseT_Full; 445 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 446 advertising |= ADVERTISED_1000baseT_Full; 447 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 448 advertising |= ADVERTISED_100baseT_Full; 449 break; 450 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 451 supported = SUPPORTED_Autoneg | 452 SUPPORTED_1000baseT_Full; 453 advertising = ADVERTISED_Autoneg | 454 ADVERTISED_1000baseT_Full; 455 break; 456 case I40E_PHY_TYPE_10GBASE_CR1_CU: 457 case I40E_PHY_TYPE_10GBASE_CR1: 458 supported = SUPPORTED_Autoneg | 459 SUPPORTED_10000baseT_Full; 460 advertising = ADVERTISED_Autoneg | 461 ADVERTISED_10000baseT_Full; 462 break; 463 case I40E_PHY_TYPE_XAUI: 464 case I40E_PHY_TYPE_XFI: 465 case I40E_PHY_TYPE_SFI: 466 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 467 case I40E_PHY_TYPE_10GBASE_AOC: 468 supported = SUPPORTED_10000baseT_Full; 469 advertising = SUPPORTED_10000baseT_Full; 470 break; 471 case I40E_PHY_TYPE_SGMII: 472 supported = SUPPORTED_Autoneg | 473 SUPPORTED_1000baseT_Full; 474 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 475 advertising |= ADVERTISED_1000baseT_Full; 476 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 477 supported |= SUPPORTED_100baseT_Full; 478 if (hw_link_info->requested_speeds & 479 I40E_LINK_SPEED_100MB) 480 advertising |= ADVERTISED_100baseT_Full; 481 } 482 break; 483 case I40E_PHY_TYPE_40GBASE_KR4: 484 case I40E_PHY_TYPE_20GBASE_KR2: 485 case I40E_PHY_TYPE_10GBASE_KR: 486 case I40E_PHY_TYPE_10GBASE_KX4: 487 case I40E_PHY_TYPE_1000BASE_KX: 488 supported |= SUPPORTED_40000baseKR4_Full | 489 SUPPORTED_20000baseKR2_Full | 490 SUPPORTED_10000baseKR_Full | 491 SUPPORTED_10000baseKX4_Full | 492 SUPPORTED_1000baseKX_Full | 493 SUPPORTED_Autoneg; 494 advertising |= ADVERTISED_40000baseKR4_Full | 495 ADVERTISED_20000baseKR2_Full | 496 ADVERTISED_10000baseKR_Full | 497 ADVERTISED_10000baseKX4_Full | 498 ADVERTISED_1000baseKX_Full | 499 ADVERTISED_Autoneg; 500 break; 501 case I40E_PHY_TYPE_25GBASE_KR: 502 case I40E_PHY_TYPE_25GBASE_CR: 503 case I40E_PHY_TYPE_25GBASE_SR: 504 case I40E_PHY_TYPE_25GBASE_LR: 505 supported = SUPPORTED_Autoneg; 506 advertising = ADVERTISED_Autoneg; 507 /* TODO: add speeds when ethtool is ready to support*/ 508 break; 509 default: 510 /* if we got here and link is up something bad is afoot */ 511 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 512 hw_link_info->phy_type); 513 } 514 515 /* Now that we've worked out everything that could be supported by the 516 * current PHY type, get what is supported by the NVM and them to 517 * get what is truly supported 518 */ 519 i40e_phy_type_to_ethtool(pf, &e_supported, 520 &e_advertising); 521 522 supported = supported & e_supported; 523 advertising = advertising & e_advertising; 524 525 /* Set speed and duplex */ 526 switch (link_speed) { 527 case I40E_LINK_SPEED_40GB: 528 cmd->base.speed = SPEED_40000; 529 break; 530 case I40E_LINK_SPEED_25GB: 531 #ifdef SPEED_25000 532 cmd->base.speed = SPEED_25000; 533 #else 534 netdev_info(netdev, 535 "Speed is 25G, display not supported by this version of ethtool.\n"); 536 #endif 537 break; 538 case I40E_LINK_SPEED_20GB: 539 cmd->base.speed = SPEED_20000; 540 break; 541 case I40E_LINK_SPEED_10GB: 542 cmd->base.speed = SPEED_10000; 543 break; 544 case I40E_LINK_SPEED_1GB: 545 cmd->base.speed = SPEED_1000; 546 break; 547 case I40E_LINK_SPEED_100MB: 548 cmd->base.speed = SPEED_100; 549 break; 550 default: 551 break; 552 } 553 cmd->base.duplex = DUPLEX_FULL; 554 555 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 556 supported); 557 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 558 advertising); 559 } 560 561 /** 562 * i40e_get_settings_link_down - Get the Link settings for when link is down 563 * @hw: hw structure 564 * @ecmd: ethtool command to fill in 565 * 566 * Reports link settings that can be determined when link is down 567 **/ 568 static void i40e_get_settings_link_down(struct i40e_hw *hw, 569 struct ethtool_link_ksettings *cmd, 570 struct i40e_pf *pf) 571 { 572 u32 supported, advertising; 573 574 /* link is down and the driver needs to fall back on 575 * supported phy types to figure out what info to display 576 */ 577 i40e_phy_type_to_ethtool(pf, &supported, &advertising); 578 579 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 580 supported); 581 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 582 advertising); 583 584 /* With no link speed and duplex are unknown */ 585 cmd->base.speed = SPEED_UNKNOWN; 586 cmd->base.duplex = DUPLEX_UNKNOWN; 587 } 588 589 /** 590 * i40e_get_settings - Get Link Speed and Duplex settings 591 * @netdev: network interface device structure 592 * @ecmd: ethtool command 593 * 594 * Reports speed/duplex settings based on media_type 595 **/ 596 static int i40e_get_link_ksettings(struct net_device *netdev, 597 struct ethtool_link_ksettings *cmd) 598 { 599 struct i40e_netdev_priv *np = netdev_priv(netdev); 600 struct i40e_pf *pf = np->vsi->back; 601 struct i40e_hw *hw = &pf->hw; 602 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 603 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 604 u32 advertising; 605 606 if (link_up) 607 i40e_get_settings_link_up(hw, cmd, netdev, pf); 608 else 609 i40e_get_settings_link_down(hw, cmd, pf); 610 611 /* Now set the settings that don't rely on link being up/down */ 612 /* Set autoneg settings */ 613 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 614 AUTONEG_ENABLE : AUTONEG_DISABLE); 615 616 switch (hw->phy.media_type) { 617 case I40E_MEDIA_TYPE_BACKPLANE: 618 ethtool_link_ksettings_add_link_mode(cmd, supported, 619 Autoneg); 620 ethtool_link_ksettings_add_link_mode(cmd, supported, 621 Backplane); 622 ethtool_link_ksettings_add_link_mode(cmd, advertising, 623 Autoneg); 624 ethtool_link_ksettings_add_link_mode(cmd, advertising, 625 Backplane); 626 cmd->base.port = PORT_NONE; 627 break; 628 case I40E_MEDIA_TYPE_BASET: 629 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 630 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 631 cmd->base.port = PORT_TP; 632 break; 633 case I40E_MEDIA_TYPE_DA: 634 case I40E_MEDIA_TYPE_CX4: 635 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 636 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 637 cmd->base.port = PORT_DA; 638 break; 639 case I40E_MEDIA_TYPE_FIBER: 640 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 641 cmd->base.port = PORT_FIBRE; 642 break; 643 case I40E_MEDIA_TYPE_UNKNOWN: 644 default: 645 cmd->base.port = PORT_OTHER; 646 break; 647 } 648 649 /* Set flow control settings */ 650 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 651 652 switch (hw->fc.requested_mode) { 653 case I40E_FC_FULL: 654 ethtool_link_ksettings_add_link_mode(cmd, advertising, 655 Pause); 656 break; 657 case I40E_FC_TX_PAUSE: 658 ethtool_link_ksettings_add_link_mode(cmd, advertising, 659 Asym_Pause); 660 break; 661 case I40E_FC_RX_PAUSE: 662 ethtool_link_ksettings_add_link_mode(cmd, advertising, 663 Pause); 664 ethtool_link_ksettings_add_link_mode(cmd, advertising, 665 Asym_Pause); 666 break; 667 default: 668 ethtool_convert_link_mode_to_legacy_u32( 669 &advertising, cmd->link_modes.advertising); 670 671 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause); 672 673 ethtool_convert_legacy_u32_to_link_mode( 674 cmd->link_modes.advertising, advertising); 675 break; 676 } 677 678 return 0; 679 } 680 681 /** 682 * i40e_set_settings - Set Speed and Duplex 683 * @netdev: network interface device structure 684 * @ecmd: ethtool command 685 * 686 * Set speed/duplex per media_types advertised/forced 687 **/ 688 static int i40e_set_link_ksettings(struct net_device *netdev, 689 const struct ethtool_link_ksettings *cmd) 690 { 691 struct i40e_netdev_priv *np = netdev_priv(netdev); 692 struct i40e_aq_get_phy_abilities_resp abilities; 693 struct i40e_aq_set_phy_config config; 694 struct i40e_pf *pf = np->vsi->back; 695 struct i40e_vsi *vsi = np->vsi; 696 struct i40e_hw *hw = &pf->hw; 697 struct ethtool_link_ksettings safe_cmd; 698 struct ethtool_link_ksettings copy_cmd; 699 i40e_status status = 0; 700 bool change = false; 701 int timeout = 50; 702 int err = 0; 703 u32 autoneg; 704 u32 advertise; 705 u32 tmp; 706 707 /* Changing port settings is not supported if this isn't the 708 * port's controlling PF 709 */ 710 if (hw->partition_id != 1) { 711 i40e_partition_setting_complaint(pf); 712 return -EOPNOTSUPP; 713 } 714 715 if (vsi != pf->vsi[pf->lan_vsi]) 716 return -EOPNOTSUPP; 717 718 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 719 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 720 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 721 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 722 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 723 return -EOPNOTSUPP; 724 725 if (hw->device_id == I40E_DEV_ID_KX_B || 726 hw->device_id == I40E_DEV_ID_KX_C || 727 hw->device_id == I40E_DEV_ID_20G_KR2 || 728 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 729 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 730 return -EOPNOTSUPP; 731 } 732 733 /* copy the cmd to copy_cmd to avoid modifying the origin */ 734 memcpy(©_cmd, cmd, sizeof(struct ethtool_link_ksettings)); 735 736 /* get our own copy of the bits to check against */ 737 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings)); 738 i40e_get_link_ksettings(netdev, &safe_cmd); 739 740 /* save autoneg and speed out of cmd */ 741 autoneg = cmd->base.autoneg; 742 ethtool_convert_link_mode_to_legacy_u32(&advertise, 743 cmd->link_modes.advertising); 744 745 /* set autoneg and speed back to what they currently are */ 746 copy_cmd.base.autoneg = safe_cmd.base.autoneg; 747 ethtool_convert_link_mode_to_legacy_u32( 748 &tmp, safe_cmd.link_modes.advertising); 749 ethtool_convert_legacy_u32_to_link_mode( 750 copy_cmd.link_modes.advertising, tmp); 751 752 copy_cmd.base.cmd = safe_cmd.base.cmd; 753 754 /* If copy_cmd and safe_cmd are not the same now, then they are 755 * trying to set something that we do not support 756 */ 757 if (memcmp(©_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings))) 758 return -EOPNOTSUPP; 759 760 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 761 timeout--; 762 if (!timeout) 763 return -EBUSY; 764 usleep_range(1000, 2000); 765 } 766 767 /* Get the current phy config */ 768 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 769 NULL); 770 if (status) { 771 err = -EAGAIN; 772 goto done; 773 } 774 775 /* Copy abilities to config in case autoneg is not 776 * set below 777 */ 778 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 779 config.abilities = abilities.abilities; 780 781 /* Check autoneg */ 782 if (autoneg == AUTONEG_ENABLE) { 783 /* If autoneg was not already enabled */ 784 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 785 /* If autoneg is not supported, return error */ 786 if (!ethtool_link_ksettings_test_link_mode( 787 &safe_cmd, supported, Autoneg)) { 788 netdev_info(netdev, "Autoneg not supported on this phy\n"); 789 err = -EINVAL; 790 goto done; 791 } 792 /* Autoneg is allowed to change */ 793 config.abilities = abilities.abilities | 794 I40E_AQ_PHY_ENABLE_AN; 795 change = true; 796 } 797 } else { 798 /* If autoneg is currently enabled */ 799 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 800 /* If autoneg is supported 10GBASE_T is the only PHY 801 * that can disable it, so otherwise return error 802 */ 803 if (ethtool_link_ksettings_test_link_mode( 804 &safe_cmd, supported, Autoneg) && 805 hw->phy.link_info.phy_type != 806 I40E_PHY_TYPE_10GBASE_T) { 807 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 808 err = -EINVAL; 809 goto done; 810 } 811 /* Autoneg is allowed to change */ 812 config.abilities = abilities.abilities & 813 ~I40E_AQ_PHY_ENABLE_AN; 814 change = true; 815 } 816 } 817 818 ethtool_convert_link_mode_to_legacy_u32(&tmp, 819 safe_cmd.link_modes.supported); 820 if (advertise & ~tmp) { 821 err = -EINVAL; 822 goto done; 823 } 824 825 if (advertise & ADVERTISED_100baseT_Full) 826 config.link_speed |= I40E_LINK_SPEED_100MB; 827 if (advertise & ADVERTISED_1000baseT_Full || 828 advertise & ADVERTISED_1000baseKX_Full) 829 config.link_speed |= I40E_LINK_SPEED_1GB; 830 if (advertise & ADVERTISED_10000baseT_Full || 831 advertise & ADVERTISED_10000baseKX4_Full || 832 advertise & ADVERTISED_10000baseKR_Full) 833 config.link_speed |= I40E_LINK_SPEED_10GB; 834 if (advertise & ADVERTISED_20000baseKR2_Full) 835 config.link_speed |= I40E_LINK_SPEED_20GB; 836 if (advertise & ADVERTISED_40000baseKR4_Full || 837 advertise & ADVERTISED_40000baseCR4_Full || 838 advertise & ADVERTISED_40000baseSR4_Full || 839 advertise & ADVERTISED_40000baseLR4_Full) 840 config.link_speed |= I40E_LINK_SPEED_40GB; 841 842 /* If speed didn't get set, set it to what it currently is. 843 * This is needed because if advertise is 0 (as it is when autoneg 844 * is disabled) then speed won't get set. 845 */ 846 if (!config.link_speed) 847 config.link_speed = abilities.link_speed; 848 849 if (change || (abilities.link_speed != config.link_speed)) { 850 /* copy over the rest of the abilities */ 851 config.phy_type = abilities.phy_type; 852 config.phy_type_ext = abilities.phy_type_ext; 853 config.eee_capability = abilities.eee_capability; 854 config.eeer = abilities.eeer_val; 855 config.low_power_ctrl = abilities.d3_lpan; 856 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 857 I40E_AQ_PHY_FEC_CONFIG_MASK; 858 859 /* save the requested speeds */ 860 hw->phy.link_info.requested_speeds = config.link_speed; 861 /* set link and auto negotiation so changes take effect */ 862 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 863 /* If link is up put link down */ 864 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 865 /* Tell the OS link is going down, the link will go 866 * back up when fw says it is ready asynchronously 867 */ 868 i40e_print_link_message(vsi, false); 869 netif_carrier_off(netdev); 870 netif_tx_stop_all_queues(netdev); 871 } 872 873 /* make the aq call */ 874 status = i40e_aq_set_phy_config(hw, &config, NULL); 875 if (status) { 876 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n", 877 i40e_stat_str(hw, status), 878 i40e_aq_str(hw, hw->aq.asq_last_status)); 879 err = -EAGAIN; 880 goto done; 881 } 882 883 status = i40e_update_link_info(hw); 884 if (status) 885 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n", 886 i40e_stat_str(hw, status), 887 i40e_aq_str(hw, hw->aq.asq_last_status)); 888 889 } else { 890 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 891 } 892 893 done: 894 clear_bit(__I40E_CONFIG_BUSY, pf->state); 895 896 return err; 897 } 898 899 static int i40e_nway_reset(struct net_device *netdev) 900 { 901 /* restart autonegotiation */ 902 struct i40e_netdev_priv *np = netdev_priv(netdev); 903 struct i40e_pf *pf = np->vsi->back; 904 struct i40e_hw *hw = &pf->hw; 905 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 906 i40e_status ret = 0; 907 908 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 909 if (ret) { 910 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 911 i40e_stat_str(hw, ret), 912 i40e_aq_str(hw, hw->aq.asq_last_status)); 913 return -EIO; 914 } 915 916 return 0; 917 } 918 919 /** 920 * i40e_get_pauseparam - Get Flow Control status 921 * Return tx/rx-pause status 922 **/ 923 static void i40e_get_pauseparam(struct net_device *netdev, 924 struct ethtool_pauseparam *pause) 925 { 926 struct i40e_netdev_priv *np = netdev_priv(netdev); 927 struct i40e_pf *pf = np->vsi->back; 928 struct i40e_hw *hw = &pf->hw; 929 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 930 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 931 932 pause->autoneg = 933 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 934 AUTONEG_ENABLE : AUTONEG_DISABLE); 935 936 /* PFC enabled so report LFC as off */ 937 if (dcbx_cfg->pfc.pfcenable) { 938 pause->rx_pause = 0; 939 pause->tx_pause = 0; 940 return; 941 } 942 943 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 944 pause->rx_pause = 1; 945 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 946 pause->tx_pause = 1; 947 } else if (hw->fc.current_mode == I40E_FC_FULL) { 948 pause->rx_pause = 1; 949 pause->tx_pause = 1; 950 } 951 } 952 953 /** 954 * i40e_set_pauseparam - Set Flow Control parameter 955 * @netdev: network interface device structure 956 * @pause: return tx/rx flow control status 957 **/ 958 static int i40e_set_pauseparam(struct net_device *netdev, 959 struct ethtool_pauseparam *pause) 960 { 961 struct i40e_netdev_priv *np = netdev_priv(netdev); 962 struct i40e_pf *pf = np->vsi->back; 963 struct i40e_vsi *vsi = np->vsi; 964 struct i40e_hw *hw = &pf->hw; 965 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 966 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 967 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 968 i40e_status status; 969 u8 aq_failures; 970 int err = 0; 971 972 /* Changing the port's flow control is not supported if this isn't the 973 * port's controlling PF 974 */ 975 if (hw->partition_id != 1) { 976 i40e_partition_setting_complaint(pf); 977 return -EOPNOTSUPP; 978 } 979 980 if (vsi != pf->vsi[pf->lan_vsi]) 981 return -EOPNOTSUPP; 982 983 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 984 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 985 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 986 return -EOPNOTSUPP; 987 } 988 989 /* If we have link and don't have autoneg */ 990 if (!test_bit(__I40E_DOWN, pf->state) && 991 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 992 /* Send message that it might not necessarily work*/ 993 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 994 } 995 996 if (dcbx_cfg->pfc.pfcenable) { 997 netdev_info(netdev, 998 "Priority flow control enabled. Cannot set link flow control.\n"); 999 return -EOPNOTSUPP; 1000 } 1001 1002 if (pause->rx_pause && pause->tx_pause) 1003 hw->fc.requested_mode = I40E_FC_FULL; 1004 else if (pause->rx_pause && !pause->tx_pause) 1005 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1006 else if (!pause->rx_pause && pause->tx_pause) 1007 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1008 else if (!pause->rx_pause && !pause->tx_pause) 1009 hw->fc.requested_mode = I40E_FC_NONE; 1010 else 1011 return -EINVAL; 1012 1013 /* Tell the OS link is going down, the link will go back up when fw 1014 * says it is ready asynchronously 1015 */ 1016 i40e_print_link_message(vsi, false); 1017 netif_carrier_off(netdev); 1018 netif_tx_stop_all_queues(netdev); 1019 1020 /* Set the fc mode and only restart an if link is up*/ 1021 status = i40e_set_fc(hw, &aq_failures, link_up); 1022 1023 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1024 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1025 i40e_stat_str(hw, status), 1026 i40e_aq_str(hw, hw->aq.asq_last_status)); 1027 err = -EAGAIN; 1028 } 1029 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1030 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1031 i40e_stat_str(hw, status), 1032 i40e_aq_str(hw, hw->aq.asq_last_status)); 1033 err = -EAGAIN; 1034 } 1035 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1036 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1037 i40e_stat_str(hw, status), 1038 i40e_aq_str(hw, hw->aq.asq_last_status)); 1039 err = -EAGAIN; 1040 } 1041 1042 if (!test_bit(__I40E_DOWN, pf->state)) { 1043 /* Give it a little more time to try to come back */ 1044 msleep(75); 1045 if (!test_bit(__I40E_DOWN, pf->state)) 1046 return i40e_nway_reset(netdev); 1047 } 1048 1049 return err; 1050 } 1051 1052 static u32 i40e_get_msglevel(struct net_device *netdev) 1053 { 1054 struct i40e_netdev_priv *np = netdev_priv(netdev); 1055 struct i40e_pf *pf = np->vsi->back; 1056 u32 debug_mask = pf->hw.debug_mask; 1057 1058 if (debug_mask) 1059 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1060 1061 return pf->msg_enable; 1062 } 1063 1064 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1065 { 1066 struct i40e_netdev_priv *np = netdev_priv(netdev); 1067 struct i40e_pf *pf = np->vsi->back; 1068 1069 if (I40E_DEBUG_USER & data) 1070 pf->hw.debug_mask = data; 1071 else 1072 pf->msg_enable = data; 1073 } 1074 1075 static int i40e_get_regs_len(struct net_device *netdev) 1076 { 1077 int reg_count = 0; 1078 int i; 1079 1080 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1081 reg_count += i40e_reg_list[i].elements; 1082 1083 return reg_count * sizeof(u32); 1084 } 1085 1086 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1087 void *p) 1088 { 1089 struct i40e_netdev_priv *np = netdev_priv(netdev); 1090 struct i40e_pf *pf = np->vsi->back; 1091 struct i40e_hw *hw = &pf->hw; 1092 u32 *reg_buf = p; 1093 int i, j, ri; 1094 u32 reg; 1095 1096 /* Tell ethtool which driver-version-specific regs output we have. 1097 * 1098 * At some point, if we have ethtool doing special formatting of 1099 * this data, it will rely on this version number to know how to 1100 * interpret things. Hence, this needs to be updated if/when the 1101 * diags register table is changed. 1102 */ 1103 regs->version = 1; 1104 1105 /* loop through the diags reg table for what to print */ 1106 ri = 0; 1107 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1108 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1109 reg = i40e_reg_list[i].offset 1110 + (j * i40e_reg_list[i].stride); 1111 reg_buf[ri++] = rd32(hw, reg); 1112 } 1113 } 1114 1115 } 1116 1117 static int i40e_get_eeprom(struct net_device *netdev, 1118 struct ethtool_eeprom *eeprom, u8 *bytes) 1119 { 1120 struct i40e_netdev_priv *np = netdev_priv(netdev); 1121 struct i40e_hw *hw = &np->vsi->back->hw; 1122 struct i40e_pf *pf = np->vsi->back; 1123 int ret_val = 0, len, offset; 1124 u8 *eeprom_buff; 1125 u16 i, sectors; 1126 bool last; 1127 u32 magic; 1128 1129 #define I40E_NVM_SECTOR_SIZE 4096 1130 if (eeprom->len == 0) 1131 return -EINVAL; 1132 1133 /* check for NVMUpdate access method */ 1134 magic = hw->vendor_id | (hw->device_id << 16); 1135 if (eeprom->magic && eeprom->magic != magic) { 1136 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1137 int errno = 0; 1138 1139 /* make sure it is the right magic for NVMUpdate */ 1140 if ((eeprom->magic >> 16) != hw->device_id) 1141 errno = -EINVAL; 1142 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1143 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1144 errno = -EBUSY; 1145 else 1146 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1147 1148 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1149 dev_info(&pf->pdev->dev, 1150 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1151 ret_val, hw->aq.asq_last_status, errno, 1152 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1153 cmd->offset, cmd->data_size); 1154 1155 return errno; 1156 } 1157 1158 /* normal ethtool get_eeprom support */ 1159 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1160 1161 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1162 if (!eeprom_buff) 1163 return -ENOMEM; 1164 1165 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1166 if (ret_val) { 1167 dev_info(&pf->pdev->dev, 1168 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1169 ret_val, hw->aq.asq_last_status); 1170 goto free_buff; 1171 } 1172 1173 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1174 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1175 len = I40E_NVM_SECTOR_SIZE; 1176 last = false; 1177 for (i = 0; i < sectors; i++) { 1178 if (i == (sectors - 1)) { 1179 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1180 last = true; 1181 } 1182 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1183 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1184 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1185 last, NULL); 1186 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1187 dev_info(&pf->pdev->dev, 1188 "read NVM failed, invalid offset 0x%x\n", 1189 offset); 1190 break; 1191 } else if (ret_val && 1192 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1193 dev_info(&pf->pdev->dev, 1194 "read NVM failed, access, offset 0x%x\n", 1195 offset); 1196 break; 1197 } else if (ret_val) { 1198 dev_info(&pf->pdev->dev, 1199 "read NVM failed offset %d err=%d status=0x%x\n", 1200 offset, ret_val, hw->aq.asq_last_status); 1201 break; 1202 } 1203 } 1204 1205 i40e_release_nvm(hw); 1206 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1207 free_buff: 1208 kfree(eeprom_buff); 1209 return ret_val; 1210 } 1211 1212 static int i40e_get_eeprom_len(struct net_device *netdev) 1213 { 1214 struct i40e_netdev_priv *np = netdev_priv(netdev); 1215 struct i40e_hw *hw = &np->vsi->back->hw; 1216 u32 val; 1217 1218 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1219 if (hw->mac.type == I40E_MAC_X722) { 1220 val = X722_EEPROM_SCOPE_LIMIT + 1; 1221 return val; 1222 } 1223 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1224 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1225 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1226 /* register returns value in power of 2, 64Kbyte chunks. */ 1227 val = (64 * 1024) * BIT(val); 1228 return val; 1229 } 1230 1231 static int i40e_set_eeprom(struct net_device *netdev, 1232 struct ethtool_eeprom *eeprom, u8 *bytes) 1233 { 1234 struct i40e_netdev_priv *np = netdev_priv(netdev); 1235 struct i40e_hw *hw = &np->vsi->back->hw; 1236 struct i40e_pf *pf = np->vsi->back; 1237 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1238 int ret_val = 0; 1239 int errno = 0; 1240 u32 magic; 1241 1242 /* normal ethtool set_eeprom is not supported */ 1243 magic = hw->vendor_id | (hw->device_id << 16); 1244 if (eeprom->magic == magic) 1245 errno = -EOPNOTSUPP; 1246 /* check for NVMUpdate access method */ 1247 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1248 errno = -EINVAL; 1249 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1250 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1251 errno = -EBUSY; 1252 else 1253 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1254 1255 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1256 dev_info(&pf->pdev->dev, 1257 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1258 ret_val, hw->aq.asq_last_status, errno, 1259 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1260 cmd->offset, cmd->data_size); 1261 1262 return errno; 1263 } 1264 1265 static void i40e_get_drvinfo(struct net_device *netdev, 1266 struct ethtool_drvinfo *drvinfo) 1267 { 1268 struct i40e_netdev_priv *np = netdev_priv(netdev); 1269 struct i40e_vsi *vsi = np->vsi; 1270 struct i40e_pf *pf = vsi->back; 1271 1272 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1273 strlcpy(drvinfo->version, i40e_driver_version_str, 1274 sizeof(drvinfo->version)); 1275 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1276 sizeof(drvinfo->fw_version)); 1277 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1278 sizeof(drvinfo->bus_info)); 1279 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1280 if (pf->hw.pf_id == 0) 1281 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1282 } 1283 1284 static void i40e_get_ringparam(struct net_device *netdev, 1285 struct ethtool_ringparam *ring) 1286 { 1287 struct i40e_netdev_priv *np = netdev_priv(netdev); 1288 struct i40e_pf *pf = np->vsi->back; 1289 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1290 1291 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1292 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1293 ring->rx_mini_max_pending = 0; 1294 ring->rx_jumbo_max_pending = 0; 1295 ring->rx_pending = vsi->rx_rings[0]->count; 1296 ring->tx_pending = vsi->tx_rings[0]->count; 1297 ring->rx_mini_pending = 0; 1298 ring->rx_jumbo_pending = 0; 1299 } 1300 1301 static int i40e_set_ringparam(struct net_device *netdev, 1302 struct ethtool_ringparam *ring) 1303 { 1304 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1305 struct i40e_netdev_priv *np = netdev_priv(netdev); 1306 struct i40e_hw *hw = &np->vsi->back->hw; 1307 struct i40e_vsi *vsi = np->vsi; 1308 struct i40e_pf *pf = vsi->back; 1309 u32 new_rx_count, new_tx_count; 1310 int timeout = 50; 1311 int i, err = 0; 1312 1313 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1314 return -EINVAL; 1315 1316 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1317 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1318 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1319 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1320 netdev_info(netdev, 1321 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1322 ring->tx_pending, ring->rx_pending, 1323 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1324 return -EINVAL; 1325 } 1326 1327 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1328 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1329 1330 /* if nothing to do return success */ 1331 if ((new_tx_count == vsi->tx_rings[0]->count) && 1332 (new_rx_count == vsi->rx_rings[0]->count)) 1333 return 0; 1334 1335 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1336 timeout--; 1337 if (!timeout) 1338 return -EBUSY; 1339 usleep_range(1000, 2000); 1340 } 1341 1342 if (!netif_running(vsi->netdev)) { 1343 /* simple case - set for the next time the netdev is started */ 1344 for (i = 0; i < vsi->num_queue_pairs; i++) { 1345 vsi->tx_rings[i]->count = new_tx_count; 1346 vsi->rx_rings[i]->count = new_rx_count; 1347 } 1348 goto done; 1349 } 1350 1351 /* We can't just free everything and then setup again, 1352 * because the ISRs in MSI-X mode get passed pointers 1353 * to the Tx and Rx ring structs. 1354 */ 1355 1356 /* alloc updated Tx resources */ 1357 if (new_tx_count != vsi->tx_rings[0]->count) { 1358 netdev_info(netdev, 1359 "Changing Tx descriptor count from %d to %d.\n", 1360 vsi->tx_rings[0]->count, new_tx_count); 1361 tx_rings = kcalloc(vsi->alloc_queue_pairs, 1362 sizeof(struct i40e_ring), GFP_KERNEL); 1363 if (!tx_rings) { 1364 err = -ENOMEM; 1365 goto done; 1366 } 1367 1368 for (i = 0; i < vsi->num_queue_pairs; i++) { 1369 /* clone ring and setup updated count */ 1370 tx_rings[i] = *vsi->tx_rings[i]; 1371 tx_rings[i].count = new_tx_count; 1372 /* the desc and bi pointers will be reallocated in the 1373 * setup call 1374 */ 1375 tx_rings[i].desc = NULL; 1376 tx_rings[i].rx_bi = NULL; 1377 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1378 if (err) { 1379 while (i) { 1380 i--; 1381 i40e_free_tx_resources(&tx_rings[i]); 1382 } 1383 kfree(tx_rings); 1384 tx_rings = NULL; 1385 1386 goto done; 1387 } 1388 } 1389 } 1390 1391 /* alloc updated Rx resources */ 1392 if (new_rx_count != vsi->rx_rings[0]->count) { 1393 netdev_info(netdev, 1394 "Changing Rx descriptor count from %d to %d\n", 1395 vsi->rx_rings[0]->count, new_rx_count); 1396 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1397 sizeof(struct i40e_ring), GFP_KERNEL); 1398 if (!rx_rings) { 1399 err = -ENOMEM; 1400 goto free_tx; 1401 } 1402 1403 for (i = 0; i < vsi->num_queue_pairs; i++) { 1404 struct i40e_ring *ring; 1405 u16 unused; 1406 1407 /* clone ring and setup updated count */ 1408 rx_rings[i] = *vsi->rx_rings[i]; 1409 rx_rings[i].count = new_rx_count; 1410 /* the desc and bi pointers will be reallocated in the 1411 * setup call 1412 */ 1413 rx_rings[i].desc = NULL; 1414 rx_rings[i].rx_bi = NULL; 1415 /* this is to allow wr32 to have something to write to 1416 * during early allocation of Rx buffers 1417 */ 1418 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1419 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1420 if (err) 1421 goto rx_unwind; 1422 1423 /* now allocate the Rx buffers to make sure the OS 1424 * has enough memory, any failure here means abort 1425 */ 1426 ring = &rx_rings[i]; 1427 unused = I40E_DESC_UNUSED(ring); 1428 err = i40e_alloc_rx_buffers(ring, unused); 1429 rx_unwind: 1430 if (err) { 1431 do { 1432 i40e_free_rx_resources(&rx_rings[i]); 1433 } while (i--); 1434 kfree(rx_rings); 1435 rx_rings = NULL; 1436 1437 goto free_tx; 1438 } 1439 } 1440 } 1441 1442 /* Bring interface down, copy in the new ring info, 1443 * then restore the interface 1444 */ 1445 i40e_down(vsi); 1446 1447 if (tx_rings) { 1448 for (i = 0; i < vsi->num_queue_pairs; i++) { 1449 i40e_free_tx_resources(vsi->tx_rings[i]); 1450 *vsi->tx_rings[i] = tx_rings[i]; 1451 } 1452 kfree(tx_rings); 1453 tx_rings = NULL; 1454 } 1455 1456 if (rx_rings) { 1457 for (i = 0; i < vsi->num_queue_pairs; i++) { 1458 i40e_free_rx_resources(vsi->rx_rings[i]); 1459 /* get the real tail offset */ 1460 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1461 /* this is to fake out the allocation routine 1462 * into thinking it has to realloc everything 1463 * but the recycling logic will let us re-use 1464 * the buffers allocated above 1465 */ 1466 rx_rings[i].next_to_use = 0; 1467 rx_rings[i].next_to_clean = 0; 1468 rx_rings[i].next_to_alloc = 0; 1469 /* do a struct copy */ 1470 *vsi->rx_rings[i] = rx_rings[i]; 1471 } 1472 kfree(rx_rings); 1473 rx_rings = NULL; 1474 } 1475 1476 i40e_up(vsi); 1477 1478 free_tx: 1479 /* error cleanup if the Rx allocations failed after getting Tx */ 1480 if (tx_rings) { 1481 for (i = 0; i < vsi->num_queue_pairs; i++) 1482 i40e_free_tx_resources(&tx_rings[i]); 1483 kfree(tx_rings); 1484 tx_rings = NULL; 1485 } 1486 1487 done: 1488 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1489 1490 return err; 1491 } 1492 1493 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1494 { 1495 struct i40e_netdev_priv *np = netdev_priv(netdev); 1496 struct i40e_vsi *vsi = np->vsi; 1497 struct i40e_pf *pf = vsi->back; 1498 1499 switch (sset) { 1500 case ETH_SS_TEST: 1501 return I40E_TEST_LEN; 1502 case ETH_SS_STATS: 1503 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1504 int len = I40E_PF_STATS_LEN(netdev); 1505 1506 if ((pf->lan_veb != I40E_NO_VEB) && 1507 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1508 len += I40E_VEB_STATS_TOTAL; 1509 return len; 1510 } else { 1511 return I40E_VSI_STATS_LEN(netdev); 1512 } 1513 case ETH_SS_PRIV_FLAGS: 1514 return I40E_PRIV_FLAGS_STR_LEN + 1515 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1516 default: 1517 return -EOPNOTSUPP; 1518 } 1519 } 1520 1521 static void i40e_get_ethtool_stats(struct net_device *netdev, 1522 struct ethtool_stats *stats, u64 *data) 1523 { 1524 struct i40e_netdev_priv *np = netdev_priv(netdev); 1525 struct i40e_ring *tx_ring, *rx_ring; 1526 struct i40e_vsi *vsi = np->vsi; 1527 struct i40e_pf *pf = vsi->back; 1528 int i = 0; 1529 char *p; 1530 int j; 1531 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1532 unsigned int start; 1533 1534 i40e_update_stats(vsi); 1535 1536 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1537 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1538 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1539 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1540 } 1541 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1542 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1543 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1544 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1545 } 1546 rcu_read_lock(); 1547 for (j = 0; j < vsi->num_queue_pairs; j++) { 1548 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); 1549 1550 if (!tx_ring) 1551 continue; 1552 1553 /* process Tx ring statistics */ 1554 do { 1555 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1556 data[i] = tx_ring->stats.packets; 1557 data[i + 1] = tx_ring->stats.bytes; 1558 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1559 i += 2; 1560 1561 /* Rx ring is the 2nd half of the queue pair */ 1562 rx_ring = &tx_ring[1]; 1563 do { 1564 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1565 data[i] = rx_ring->stats.packets; 1566 data[i + 1] = rx_ring->stats.bytes; 1567 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1568 i += 2; 1569 } 1570 rcu_read_unlock(); 1571 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1572 return; 1573 1574 if ((pf->lan_veb != I40E_NO_VEB) && 1575 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1576 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1577 1578 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1579 p = (char *)veb; 1580 p += i40e_gstrings_veb_stats[j].stat_offset; 1581 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1582 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1583 } 1584 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1585 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1586 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1587 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1588 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1589 } 1590 } 1591 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1592 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1593 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1594 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1595 } 1596 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1597 data[i++] = pf->stats.priority_xon_tx[j]; 1598 data[i++] = pf->stats.priority_xoff_tx[j]; 1599 } 1600 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1601 data[i++] = pf->stats.priority_xon_rx[j]; 1602 data[i++] = pf->stats.priority_xoff_rx[j]; 1603 } 1604 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1605 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1606 } 1607 1608 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1609 u8 *data) 1610 { 1611 struct i40e_netdev_priv *np = netdev_priv(netdev); 1612 struct i40e_vsi *vsi = np->vsi; 1613 struct i40e_pf *pf = vsi->back; 1614 char *p = (char *)data; 1615 int i; 1616 1617 switch (stringset) { 1618 case ETH_SS_TEST: 1619 memcpy(data, i40e_gstrings_test, 1620 I40E_TEST_LEN * ETH_GSTRING_LEN); 1621 break; 1622 case ETH_SS_STATS: 1623 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1624 snprintf(p, ETH_GSTRING_LEN, "%s", 1625 i40e_gstrings_net_stats[i].stat_string); 1626 p += ETH_GSTRING_LEN; 1627 } 1628 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1629 snprintf(p, ETH_GSTRING_LEN, "%s", 1630 i40e_gstrings_misc_stats[i].stat_string); 1631 p += ETH_GSTRING_LEN; 1632 } 1633 for (i = 0; i < vsi->num_queue_pairs; i++) { 1634 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1635 p += ETH_GSTRING_LEN; 1636 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1637 p += ETH_GSTRING_LEN; 1638 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1639 p += ETH_GSTRING_LEN; 1640 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1641 p += ETH_GSTRING_LEN; 1642 } 1643 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1644 return; 1645 1646 if ((pf->lan_veb != I40E_NO_VEB) && 1647 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1648 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1649 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1650 i40e_gstrings_veb_stats[i].stat_string); 1651 p += ETH_GSTRING_LEN; 1652 } 1653 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1654 snprintf(p, ETH_GSTRING_LEN, 1655 "veb.tc_%d_tx_packets", i); 1656 p += ETH_GSTRING_LEN; 1657 snprintf(p, ETH_GSTRING_LEN, 1658 "veb.tc_%d_tx_bytes", i); 1659 p += ETH_GSTRING_LEN; 1660 snprintf(p, ETH_GSTRING_LEN, 1661 "veb.tc_%d_rx_packets", i); 1662 p += ETH_GSTRING_LEN; 1663 snprintf(p, ETH_GSTRING_LEN, 1664 "veb.tc_%d_rx_bytes", i); 1665 p += ETH_GSTRING_LEN; 1666 } 1667 } 1668 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1669 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1670 i40e_gstrings_stats[i].stat_string); 1671 p += ETH_GSTRING_LEN; 1672 } 1673 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1674 snprintf(p, ETH_GSTRING_LEN, 1675 "port.tx_priority_%d_xon", i); 1676 p += ETH_GSTRING_LEN; 1677 snprintf(p, ETH_GSTRING_LEN, 1678 "port.tx_priority_%d_xoff", i); 1679 p += ETH_GSTRING_LEN; 1680 } 1681 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1682 snprintf(p, ETH_GSTRING_LEN, 1683 "port.rx_priority_%d_xon", i); 1684 p += ETH_GSTRING_LEN; 1685 snprintf(p, ETH_GSTRING_LEN, 1686 "port.rx_priority_%d_xoff", i); 1687 p += ETH_GSTRING_LEN; 1688 } 1689 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1690 snprintf(p, ETH_GSTRING_LEN, 1691 "port.rx_priority_%d_xon_2_xoff", i); 1692 p += ETH_GSTRING_LEN; 1693 } 1694 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1695 break; 1696 case ETH_SS_PRIV_FLAGS: 1697 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1698 snprintf(p, ETH_GSTRING_LEN, "%s", 1699 i40e_gstrings_priv_flags[i].flag_string); 1700 p += ETH_GSTRING_LEN; 1701 } 1702 if (pf->hw.pf_id != 0) 1703 break; 1704 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1705 snprintf(p, ETH_GSTRING_LEN, "%s", 1706 i40e_gl_gstrings_priv_flags[i].flag_string); 1707 p += ETH_GSTRING_LEN; 1708 } 1709 break; 1710 default: 1711 break; 1712 } 1713 } 1714 1715 static int i40e_get_ts_info(struct net_device *dev, 1716 struct ethtool_ts_info *info) 1717 { 1718 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1719 1720 /* only report HW timestamping if PTP is enabled */ 1721 if (!(pf->flags & I40E_FLAG_PTP)) 1722 return ethtool_op_get_ts_info(dev, info); 1723 1724 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1725 SOF_TIMESTAMPING_RX_SOFTWARE | 1726 SOF_TIMESTAMPING_SOFTWARE | 1727 SOF_TIMESTAMPING_TX_HARDWARE | 1728 SOF_TIMESTAMPING_RX_HARDWARE | 1729 SOF_TIMESTAMPING_RAW_HARDWARE; 1730 1731 if (pf->ptp_clock) 1732 info->phc_index = ptp_clock_index(pf->ptp_clock); 1733 else 1734 info->phc_index = -1; 1735 1736 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1737 1738 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1739 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1740 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1741 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1742 1743 if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE) 1744 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1745 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1746 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1747 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1748 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1749 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1750 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1751 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1752 1753 return 0; 1754 } 1755 1756 static int i40e_link_test(struct net_device *netdev, u64 *data) 1757 { 1758 struct i40e_netdev_priv *np = netdev_priv(netdev); 1759 struct i40e_pf *pf = np->vsi->back; 1760 i40e_status status; 1761 bool link_up = false; 1762 1763 netif_info(pf, hw, netdev, "link test\n"); 1764 status = i40e_get_link_status(&pf->hw, &link_up); 1765 if (status) { 1766 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1767 *data = 1; 1768 return *data; 1769 } 1770 1771 if (link_up) 1772 *data = 0; 1773 else 1774 *data = 1; 1775 1776 return *data; 1777 } 1778 1779 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1780 { 1781 struct i40e_netdev_priv *np = netdev_priv(netdev); 1782 struct i40e_pf *pf = np->vsi->back; 1783 1784 netif_info(pf, hw, netdev, "register test\n"); 1785 *data = i40e_diag_reg_test(&pf->hw); 1786 1787 return *data; 1788 } 1789 1790 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1791 { 1792 struct i40e_netdev_priv *np = netdev_priv(netdev); 1793 struct i40e_pf *pf = np->vsi->back; 1794 1795 netif_info(pf, hw, netdev, "eeprom test\n"); 1796 *data = i40e_diag_eeprom_test(&pf->hw); 1797 1798 /* forcebly clear the NVM Update state machine */ 1799 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1800 1801 return *data; 1802 } 1803 1804 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1805 { 1806 struct i40e_netdev_priv *np = netdev_priv(netdev); 1807 struct i40e_pf *pf = np->vsi->back; 1808 u16 swc_old = pf->sw_int_count; 1809 1810 netif_info(pf, hw, netdev, "interrupt test\n"); 1811 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1812 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1813 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1814 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1815 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1816 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1817 usleep_range(1000, 2000); 1818 *data = (swc_old == pf->sw_int_count); 1819 1820 return *data; 1821 } 1822 1823 static inline bool i40e_active_vfs(struct i40e_pf *pf) 1824 { 1825 struct i40e_vf *vfs = pf->vf; 1826 int i; 1827 1828 for (i = 0; i < pf->num_alloc_vfs; i++) 1829 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 1830 return true; 1831 return false; 1832 } 1833 1834 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 1835 { 1836 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 1837 } 1838 1839 static void i40e_diag_test(struct net_device *netdev, 1840 struct ethtool_test *eth_test, u64 *data) 1841 { 1842 struct i40e_netdev_priv *np = netdev_priv(netdev); 1843 bool if_running = netif_running(netdev); 1844 struct i40e_pf *pf = np->vsi->back; 1845 1846 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 1847 /* Offline tests */ 1848 netif_info(pf, drv, netdev, "offline testing starting\n"); 1849 1850 set_bit(__I40E_TESTING, pf->state); 1851 1852 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 1853 dev_warn(&pf->pdev->dev, 1854 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 1855 data[I40E_ETH_TEST_REG] = 1; 1856 data[I40E_ETH_TEST_EEPROM] = 1; 1857 data[I40E_ETH_TEST_INTR] = 1; 1858 data[I40E_ETH_TEST_LINK] = 1; 1859 eth_test->flags |= ETH_TEST_FL_FAILED; 1860 clear_bit(__I40E_TESTING, pf->state); 1861 goto skip_ol_tests; 1862 } 1863 1864 /* If the device is online then take it offline */ 1865 if (if_running) 1866 /* indicate we're in test mode */ 1867 i40e_close(netdev); 1868 else 1869 /* This reset does not affect link - if it is 1870 * changed to a type of reset that does affect 1871 * link then the following link test would have 1872 * to be moved to before the reset 1873 */ 1874 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1875 1876 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1877 eth_test->flags |= ETH_TEST_FL_FAILED; 1878 1879 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 1880 eth_test->flags |= ETH_TEST_FL_FAILED; 1881 1882 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 1883 eth_test->flags |= ETH_TEST_FL_FAILED; 1884 1885 /* run reg test last, a reset is required after it */ 1886 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 1887 eth_test->flags |= ETH_TEST_FL_FAILED; 1888 1889 clear_bit(__I40E_TESTING, pf->state); 1890 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1891 1892 if (if_running) 1893 i40e_open(netdev); 1894 } else { 1895 /* Online tests */ 1896 netif_info(pf, drv, netdev, "online testing starting\n"); 1897 1898 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1899 eth_test->flags |= ETH_TEST_FL_FAILED; 1900 1901 /* Offline only tests, not run in online; pass by default */ 1902 data[I40E_ETH_TEST_REG] = 0; 1903 data[I40E_ETH_TEST_EEPROM] = 0; 1904 data[I40E_ETH_TEST_INTR] = 0; 1905 } 1906 1907 skip_ol_tests: 1908 1909 netif_info(pf, drv, netdev, "testing finished\n"); 1910 } 1911 1912 static void i40e_get_wol(struct net_device *netdev, 1913 struct ethtool_wolinfo *wol) 1914 { 1915 struct i40e_netdev_priv *np = netdev_priv(netdev); 1916 struct i40e_pf *pf = np->vsi->back; 1917 struct i40e_hw *hw = &pf->hw; 1918 u16 wol_nvm_bits; 1919 1920 /* NVM bit on means WoL disabled for the port */ 1921 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1922 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 1923 wol->supported = 0; 1924 wol->wolopts = 0; 1925 } else { 1926 wol->supported = WAKE_MAGIC; 1927 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 1928 } 1929 } 1930 1931 /** 1932 * i40e_set_wol - set the WakeOnLAN configuration 1933 * @netdev: the netdev in question 1934 * @wol: the ethtool WoL setting data 1935 **/ 1936 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 1937 { 1938 struct i40e_netdev_priv *np = netdev_priv(netdev); 1939 struct i40e_pf *pf = np->vsi->back; 1940 struct i40e_vsi *vsi = np->vsi; 1941 struct i40e_hw *hw = &pf->hw; 1942 u16 wol_nvm_bits; 1943 1944 /* WoL not supported if this isn't the controlling PF on the port */ 1945 if (hw->partition_id != 1) { 1946 i40e_partition_setting_complaint(pf); 1947 return -EOPNOTSUPP; 1948 } 1949 1950 if (vsi != pf->vsi[pf->lan_vsi]) 1951 return -EOPNOTSUPP; 1952 1953 /* NVM bit on means WoL disabled for the port */ 1954 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1955 if (BIT(hw->port) & wol_nvm_bits) 1956 return -EOPNOTSUPP; 1957 1958 /* only magic packet is supported */ 1959 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 1960 return -EOPNOTSUPP; 1961 1962 /* is this a new value? */ 1963 if (pf->wol_en != !!wol->wolopts) { 1964 pf->wol_en = !!wol->wolopts; 1965 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 1966 } 1967 1968 return 0; 1969 } 1970 1971 static int i40e_set_phys_id(struct net_device *netdev, 1972 enum ethtool_phys_id_state state) 1973 { 1974 struct i40e_netdev_priv *np = netdev_priv(netdev); 1975 i40e_status ret = 0; 1976 struct i40e_pf *pf = np->vsi->back; 1977 struct i40e_hw *hw = &pf->hw; 1978 int blink_freq = 2; 1979 u16 temp_status; 1980 1981 switch (state) { 1982 case ETHTOOL_ID_ACTIVE: 1983 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 1984 pf->led_status = i40e_led_get(hw); 1985 } else { 1986 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL); 1987 ret = i40e_led_get_phy(hw, &temp_status, 1988 &pf->phy_led_val); 1989 pf->led_status = temp_status; 1990 } 1991 return blink_freq; 1992 case ETHTOOL_ID_ON: 1993 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 1994 i40e_led_set(hw, 0xf, false); 1995 else 1996 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 1997 break; 1998 case ETHTOOL_ID_OFF: 1999 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 2000 i40e_led_set(hw, 0x0, false); 2001 else 2002 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2003 break; 2004 case ETHTOOL_ID_INACTIVE: 2005 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 2006 i40e_led_set(hw, pf->led_status, false); 2007 } else { 2008 ret = i40e_led_set_phy(hw, false, pf->led_status, 2009 (pf->phy_led_val | 2010 I40E_PHY_LED_MODE_ORIG)); 2011 i40e_aq_set_phy_debug(hw, 0, NULL); 2012 } 2013 break; 2014 default: 2015 break; 2016 } 2017 if (ret) 2018 return -ENOENT; 2019 else 2020 return 0; 2021 } 2022 2023 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2024 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2025 * 125us (8000 interrupts per second) == ITR(62) 2026 */ 2027 2028 /** 2029 * __i40e_get_coalesce - get per-queue coalesce settings 2030 * @netdev: the netdev to check 2031 * @ec: ethtool coalesce data structure 2032 * @queue: which queue to pick 2033 * 2034 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2035 * are per queue. If queue is <0 then we default to queue 0 as the 2036 * representative value. 2037 **/ 2038 static int __i40e_get_coalesce(struct net_device *netdev, 2039 struct ethtool_coalesce *ec, 2040 int queue) 2041 { 2042 struct i40e_netdev_priv *np = netdev_priv(netdev); 2043 struct i40e_ring *rx_ring, *tx_ring; 2044 struct i40e_vsi *vsi = np->vsi; 2045 2046 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2047 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2048 2049 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2050 * return queue 0's value to represent. 2051 */ 2052 if (queue < 0) { 2053 queue = 0; 2054 } else if (queue >= vsi->num_queue_pairs) { 2055 return -EINVAL; 2056 } 2057 2058 rx_ring = vsi->rx_rings[queue]; 2059 tx_ring = vsi->tx_rings[queue]; 2060 2061 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2062 ec->use_adaptive_rx_coalesce = 1; 2063 2064 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2065 ec->use_adaptive_tx_coalesce = 1; 2066 2067 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2068 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2069 2070 2071 /* we use the _usecs_high to store/set the interrupt rate limit 2072 * that the hardware supports, that almost but not quite 2073 * fits the original intent of the ethtool variable, 2074 * the rx_coalesce_usecs_high limits total interrupts 2075 * per second from both tx/rx sources. 2076 */ 2077 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2078 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2079 2080 return 0; 2081 } 2082 2083 /** 2084 * i40e_get_coalesce - get a netdev's coalesce settings 2085 * @netdev: the netdev to check 2086 * @ec: ethtool coalesce data structure 2087 * 2088 * Gets the coalesce settings for a particular netdev. Note that if user has 2089 * modified per-queue settings, this only guarantees to represent queue 0. See 2090 * __i40e_get_coalesce for more details. 2091 **/ 2092 static int i40e_get_coalesce(struct net_device *netdev, 2093 struct ethtool_coalesce *ec) 2094 { 2095 return __i40e_get_coalesce(netdev, ec, -1); 2096 } 2097 2098 /** 2099 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2100 * @netdev: netdev structure 2101 * @ec: ethtool's coalesce settings 2102 * @queue: the particular queue to read 2103 * 2104 * Will read a specific queue's coalesce settings 2105 **/ 2106 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2107 struct ethtool_coalesce *ec) 2108 { 2109 return __i40e_get_coalesce(netdev, ec, queue); 2110 } 2111 2112 /** 2113 * i40e_set_itr_per_queue - set ITR values for specific queue 2114 * @vsi: the VSI to set values for 2115 * @ec: coalesce settings from ethtool 2116 * @queue: the queue to modify 2117 * 2118 * Change the ITR settings for a specific queue. 2119 **/ 2120 2121 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2122 struct ethtool_coalesce *ec, 2123 int queue) 2124 { 2125 struct i40e_pf *pf = vsi->back; 2126 struct i40e_hw *hw = &pf->hw; 2127 struct i40e_q_vector *q_vector; 2128 u16 vector, intrl; 2129 2130 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2131 2132 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; 2133 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; 2134 2135 if (ec->use_adaptive_rx_coalesce) 2136 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; 2137 else 2138 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2139 2140 if (ec->use_adaptive_tx_coalesce) 2141 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; 2142 else 2143 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2144 2145 q_vector = vsi->rx_rings[queue]->q_vector; 2146 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); 2147 vector = vsi->base_vector + q_vector->v_idx; 2148 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2149 2150 q_vector = vsi->tx_rings[queue]->q_vector; 2151 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); 2152 vector = vsi->base_vector + q_vector->v_idx; 2153 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2154 2155 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2156 i40e_flush(hw); 2157 } 2158 2159 /** 2160 * __i40e_set_coalesce - set coalesce settings for particular queue 2161 * @netdev: the netdev to change 2162 * @ec: ethtool coalesce settings 2163 * @queue: the queue to change 2164 * 2165 * Sets the coalesce settings for a particular queue. 2166 **/ 2167 static int __i40e_set_coalesce(struct net_device *netdev, 2168 struct ethtool_coalesce *ec, 2169 int queue) 2170 { 2171 struct i40e_netdev_priv *np = netdev_priv(netdev); 2172 struct i40e_vsi *vsi = np->vsi; 2173 struct i40e_pf *pf = vsi->back; 2174 u16 intrl_reg; 2175 int i; 2176 2177 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2178 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2179 2180 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2181 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2182 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2183 return -EINVAL; 2184 } 2185 2186 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2187 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2188 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2189 return -EINVAL; 2190 } 2191 2192 if (ec->rx_coalesce_usecs == 0) { 2193 if (ec->use_adaptive_rx_coalesce) 2194 netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n"); 2195 } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2196 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2197 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2198 return -EINVAL; 2199 } 2200 2201 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2202 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2203 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2204 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2205 vsi->int_rate_limit); 2206 } 2207 2208 if (ec->tx_coalesce_usecs == 0) { 2209 if (ec->use_adaptive_tx_coalesce) 2210 netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n"); 2211 } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2212 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2213 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2214 return -EINVAL; 2215 } 2216 2217 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2218 * apply to all queues. 2219 */ 2220 if (queue < 0) { 2221 for (i = 0; i < vsi->num_queue_pairs; i++) 2222 i40e_set_itr_per_queue(vsi, ec, i); 2223 } else if (queue < vsi->num_queue_pairs) { 2224 i40e_set_itr_per_queue(vsi, ec, queue); 2225 } else { 2226 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2227 vsi->num_queue_pairs - 1); 2228 return -EINVAL; 2229 } 2230 2231 return 0; 2232 } 2233 2234 /** 2235 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2236 * @netdev: the netdev to change 2237 * @ec: ethtool coalesce settings 2238 * 2239 * This will set each queue to the same coalesce settings. 2240 **/ 2241 static int i40e_set_coalesce(struct net_device *netdev, 2242 struct ethtool_coalesce *ec) 2243 { 2244 return __i40e_set_coalesce(netdev, ec, -1); 2245 } 2246 2247 /** 2248 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2249 * @netdev: the netdev to change 2250 * @ec: ethtool's coalesce settings 2251 * @queue: the queue to change 2252 * 2253 * Sets the specified queue's coalesce settings. 2254 **/ 2255 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2256 struct ethtool_coalesce *ec) 2257 { 2258 return __i40e_set_coalesce(netdev, ec, queue); 2259 } 2260 2261 /** 2262 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2263 * @pf: pointer to the physical function struct 2264 * @cmd: ethtool rxnfc command 2265 * 2266 * Returns Success if the flow is supported, else Invalid Input. 2267 **/ 2268 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2269 { 2270 struct i40e_hw *hw = &pf->hw; 2271 u8 flow_pctype = 0; 2272 u64 i_set = 0; 2273 2274 cmd->data = 0; 2275 2276 switch (cmd->flow_type) { 2277 case TCP_V4_FLOW: 2278 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2279 break; 2280 case UDP_V4_FLOW: 2281 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2282 break; 2283 case TCP_V6_FLOW: 2284 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2285 break; 2286 case UDP_V6_FLOW: 2287 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2288 break; 2289 case SCTP_V4_FLOW: 2290 case AH_ESP_V4_FLOW: 2291 case AH_V4_FLOW: 2292 case ESP_V4_FLOW: 2293 case IPV4_FLOW: 2294 case SCTP_V6_FLOW: 2295 case AH_ESP_V6_FLOW: 2296 case AH_V6_FLOW: 2297 case ESP_V6_FLOW: 2298 case IPV6_FLOW: 2299 /* Default is src/dest for IP, no matter the L4 hashing */ 2300 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2301 break; 2302 default: 2303 return -EINVAL; 2304 } 2305 2306 /* Read flow based hash input set register */ 2307 if (flow_pctype) { 2308 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2309 flow_pctype)) | 2310 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2311 flow_pctype)) << 32); 2312 } 2313 2314 /* Process bits of hash input set */ 2315 if (i_set) { 2316 if (i_set & I40E_L4_SRC_MASK) 2317 cmd->data |= RXH_L4_B_0_1; 2318 if (i_set & I40E_L4_DST_MASK) 2319 cmd->data |= RXH_L4_B_2_3; 2320 2321 if (cmd->flow_type == TCP_V4_FLOW || 2322 cmd->flow_type == UDP_V4_FLOW) { 2323 if (i_set & I40E_L3_SRC_MASK) 2324 cmd->data |= RXH_IP_SRC; 2325 if (i_set & I40E_L3_DST_MASK) 2326 cmd->data |= RXH_IP_DST; 2327 } else if (cmd->flow_type == TCP_V6_FLOW || 2328 cmd->flow_type == UDP_V6_FLOW) { 2329 if (i_set & I40E_L3_V6_SRC_MASK) 2330 cmd->data |= RXH_IP_SRC; 2331 if (i_set & I40E_L3_V6_DST_MASK) 2332 cmd->data |= RXH_IP_DST; 2333 } 2334 } 2335 2336 return 0; 2337 } 2338 2339 /** 2340 * i40e_check_mask - Check whether a mask field is set 2341 * @mask: the full mask value 2342 * @field; mask of the field to check 2343 * 2344 * If the given mask is fully set, return positive value. If the mask for the 2345 * field is fully unset, return zero. Otherwise return a negative error code. 2346 **/ 2347 static int i40e_check_mask(u64 mask, u64 field) 2348 { 2349 u64 value = mask & field; 2350 2351 if (value == field) 2352 return 1; 2353 else if (!value) 2354 return 0; 2355 else 2356 return -1; 2357 } 2358 2359 /** 2360 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2361 * @fsp: pointer to rx flow specification 2362 * @data: pointer to userdef data structure for storage 2363 * 2364 * Read the user-defined data and deconstruct the value into a structure. No 2365 * other code should read the user-defined data, so as to ensure that every 2366 * place consistently reads the value correctly. 2367 * 2368 * The user-defined field is a 64bit Big Endian format value, which we 2369 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2370 * be defined starting from the highest bits, while small bit field values 2371 * shall be defined starting from the lowest bits. 2372 * 2373 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2374 * and the filter should be rejected. The data structure will always be 2375 * modified even if FLOW_EXT is not set. 2376 * 2377 **/ 2378 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2379 struct i40e_rx_flow_userdef *data) 2380 { 2381 u64 value, mask; 2382 int valid; 2383 2384 /* Zero memory first so it's always consistent. */ 2385 memset(data, 0, sizeof(*data)); 2386 2387 if (!(fsp->flow_type & FLOW_EXT)) 2388 return 0; 2389 2390 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2391 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2392 2393 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2394 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2395 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2396 2397 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2398 if (valid < 0) { 2399 return -EINVAL; 2400 } else if (valid) { 2401 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2402 data->flex_offset = 2403 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2404 data->flex_filter = true; 2405 } 2406 2407 return 0; 2408 } 2409 2410 /** 2411 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2412 * @fsp: pointer to rx_flow specification 2413 * 2414 * Reads the userdef data structure and properly fills in the user defined 2415 * fields of the rx_flow_spec. 2416 **/ 2417 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2418 struct i40e_rx_flow_userdef *data) 2419 { 2420 u64 value = 0, mask = 0; 2421 2422 if (data->flex_filter) { 2423 value |= data->flex_word; 2424 value |= (u64)data->flex_offset << 16; 2425 mask |= I40E_USERDEF_FLEX_FILTER; 2426 } 2427 2428 if (value || mask) 2429 fsp->flow_type |= FLOW_EXT; 2430 2431 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2432 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2433 } 2434 2435 /** 2436 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2437 * @pf: Pointer to the physical function struct 2438 * @cmd: The command to get or set Rx flow classification rules 2439 * @rule_locs: Array of used rule locations 2440 * 2441 * This function populates both the total and actual rule count of 2442 * the ethtool flow classification command 2443 * 2444 * Returns 0 on success or -EMSGSIZE if entry not found 2445 **/ 2446 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2447 struct ethtool_rxnfc *cmd, 2448 u32 *rule_locs) 2449 { 2450 struct i40e_fdir_filter *rule; 2451 struct hlist_node *node2; 2452 int cnt = 0; 2453 2454 /* report total rule count */ 2455 cmd->data = i40e_get_fd_cnt_all(pf); 2456 2457 hlist_for_each_entry_safe(rule, node2, 2458 &pf->fdir_filter_list, fdir_node) { 2459 if (cnt == cmd->rule_cnt) 2460 return -EMSGSIZE; 2461 2462 rule_locs[cnt] = rule->fd_id; 2463 cnt++; 2464 } 2465 2466 cmd->rule_cnt = cnt; 2467 2468 return 0; 2469 } 2470 2471 /** 2472 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2473 * @pf: Pointer to the physical function struct 2474 * @cmd: The command to get or set Rx flow classification rules 2475 * 2476 * This function looks up a filter based on the Rx flow classification 2477 * command and fills the flow spec info for it if found 2478 * 2479 * Returns 0 on success or -EINVAL if filter not found 2480 **/ 2481 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2482 struct ethtool_rxnfc *cmd) 2483 { 2484 struct ethtool_rx_flow_spec *fsp = 2485 (struct ethtool_rx_flow_spec *)&cmd->fs; 2486 struct i40e_rx_flow_userdef userdef = {0}; 2487 struct i40e_fdir_filter *rule = NULL; 2488 struct hlist_node *node2; 2489 u64 input_set; 2490 u16 index; 2491 2492 hlist_for_each_entry_safe(rule, node2, 2493 &pf->fdir_filter_list, fdir_node) { 2494 if (fsp->location <= rule->fd_id) 2495 break; 2496 } 2497 2498 if (!rule || fsp->location != rule->fd_id) 2499 return -EINVAL; 2500 2501 fsp->flow_type = rule->flow_type; 2502 if (fsp->flow_type == IP_USER_FLOW) { 2503 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2504 fsp->h_u.usr_ip4_spec.proto = 0; 2505 fsp->m_u.usr_ip4_spec.proto = 0; 2506 } 2507 2508 /* Reverse the src and dest notion, since the HW views them from 2509 * Tx perspective where as the user expects it from Rx filter view. 2510 */ 2511 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2512 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2513 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2514 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2515 2516 switch (rule->flow_type) { 2517 case SCTP_V4_FLOW: 2518 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2519 break; 2520 case TCP_V4_FLOW: 2521 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2522 break; 2523 case UDP_V4_FLOW: 2524 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2525 break; 2526 case IP_USER_FLOW: 2527 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2528 break; 2529 default: 2530 /* If we have stored a filter with a flow type not listed here 2531 * it is almost certainly a driver bug. WARN(), and then 2532 * assign the input_set as if all fields are enabled to avoid 2533 * reading unassigned memory. 2534 */ 2535 WARN(1, "Missing input set index for flow_type %d\n", 2536 rule->flow_type); 2537 input_set = 0xFFFFFFFFFFFFFFFFULL; 2538 goto no_input_set; 2539 } 2540 2541 input_set = i40e_read_fd_input_set(pf, index); 2542 2543 no_input_set: 2544 if (input_set & I40E_L3_SRC_MASK) 2545 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF); 2546 2547 if (input_set & I40E_L3_DST_MASK) 2548 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF); 2549 2550 if (input_set & I40E_L4_SRC_MASK) 2551 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF); 2552 2553 if (input_set & I40E_L4_DST_MASK) 2554 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF); 2555 2556 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2557 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2558 else 2559 fsp->ring_cookie = rule->q_index; 2560 2561 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2562 struct i40e_vsi *vsi; 2563 2564 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2565 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2566 /* VFs are zero-indexed by the driver, but ethtool 2567 * expects them to be one-indexed, so add one here 2568 */ 2569 u64 ring_vf = vsi->vf_id + 1; 2570 2571 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2572 fsp->ring_cookie |= ring_vf; 2573 } 2574 } 2575 2576 if (rule->flex_filter) { 2577 userdef.flex_filter = true; 2578 userdef.flex_word = be16_to_cpu(rule->flex_word); 2579 userdef.flex_offset = rule->flex_offset; 2580 } 2581 2582 i40e_fill_rx_flow_user_data(fsp, &userdef); 2583 2584 return 0; 2585 } 2586 2587 /** 2588 * i40e_get_rxnfc - command to get RX flow classification rules 2589 * @netdev: network interface device structure 2590 * @cmd: ethtool rxnfc command 2591 * 2592 * Returns Success if the command is supported. 2593 **/ 2594 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2595 u32 *rule_locs) 2596 { 2597 struct i40e_netdev_priv *np = netdev_priv(netdev); 2598 struct i40e_vsi *vsi = np->vsi; 2599 struct i40e_pf *pf = vsi->back; 2600 int ret = -EOPNOTSUPP; 2601 2602 switch (cmd->cmd) { 2603 case ETHTOOL_GRXRINGS: 2604 cmd->data = vsi->num_queue_pairs; 2605 ret = 0; 2606 break; 2607 case ETHTOOL_GRXFH: 2608 ret = i40e_get_rss_hash_opts(pf, cmd); 2609 break; 2610 case ETHTOOL_GRXCLSRLCNT: 2611 cmd->rule_cnt = pf->fdir_pf_active_filters; 2612 /* report total rule count */ 2613 cmd->data = i40e_get_fd_cnt_all(pf); 2614 ret = 0; 2615 break; 2616 case ETHTOOL_GRXCLSRULE: 2617 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2618 break; 2619 case ETHTOOL_GRXCLSRLALL: 2620 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2621 break; 2622 default: 2623 break; 2624 } 2625 2626 return ret; 2627 } 2628 2629 /** 2630 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2631 * @nfc: pointer to user request 2632 * @i_setc bits currently set 2633 * 2634 * Returns value of bits to be set per user request 2635 **/ 2636 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2637 { 2638 u64 i_set = i_setc; 2639 u64 src_l3 = 0, dst_l3 = 0; 2640 2641 if (nfc->data & RXH_L4_B_0_1) 2642 i_set |= I40E_L4_SRC_MASK; 2643 else 2644 i_set &= ~I40E_L4_SRC_MASK; 2645 if (nfc->data & RXH_L4_B_2_3) 2646 i_set |= I40E_L4_DST_MASK; 2647 else 2648 i_set &= ~I40E_L4_DST_MASK; 2649 2650 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2651 src_l3 = I40E_L3_V6_SRC_MASK; 2652 dst_l3 = I40E_L3_V6_DST_MASK; 2653 } else if (nfc->flow_type == TCP_V4_FLOW || 2654 nfc->flow_type == UDP_V4_FLOW) { 2655 src_l3 = I40E_L3_SRC_MASK; 2656 dst_l3 = I40E_L3_DST_MASK; 2657 } else { 2658 /* Any other flow type are not supported here */ 2659 return i_set; 2660 } 2661 2662 if (nfc->data & RXH_IP_SRC) 2663 i_set |= src_l3; 2664 else 2665 i_set &= ~src_l3; 2666 if (nfc->data & RXH_IP_DST) 2667 i_set |= dst_l3; 2668 else 2669 i_set &= ~dst_l3; 2670 2671 return i_set; 2672 } 2673 2674 /** 2675 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2676 * @pf: pointer to the physical function struct 2677 * @cmd: ethtool rxnfc command 2678 * 2679 * Returns Success if the flow input set is supported. 2680 **/ 2681 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2682 { 2683 struct i40e_hw *hw = &pf->hw; 2684 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2685 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2686 u8 flow_pctype = 0; 2687 u64 i_set, i_setc; 2688 2689 /* RSS does not support anything other than hashing 2690 * to queues on src and dst IPs and ports 2691 */ 2692 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2693 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2694 return -EINVAL; 2695 2696 switch (nfc->flow_type) { 2697 case TCP_V4_FLOW: 2698 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2699 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2700 hena |= 2701 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2702 break; 2703 case TCP_V6_FLOW: 2704 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2705 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2706 hena |= 2707 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2708 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2709 hena |= 2710 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2711 break; 2712 case UDP_V4_FLOW: 2713 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2714 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2715 hena |= 2716 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2717 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2718 2719 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2720 break; 2721 case UDP_V6_FLOW: 2722 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2723 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2724 hena |= 2725 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2726 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2727 2728 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2729 break; 2730 case AH_ESP_V4_FLOW: 2731 case AH_V4_FLOW: 2732 case ESP_V4_FLOW: 2733 case SCTP_V4_FLOW: 2734 if ((nfc->data & RXH_L4_B_0_1) || 2735 (nfc->data & RXH_L4_B_2_3)) 2736 return -EINVAL; 2737 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2738 break; 2739 case AH_ESP_V6_FLOW: 2740 case AH_V6_FLOW: 2741 case ESP_V6_FLOW: 2742 case SCTP_V6_FLOW: 2743 if ((nfc->data & RXH_L4_B_0_1) || 2744 (nfc->data & RXH_L4_B_2_3)) 2745 return -EINVAL; 2746 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2747 break; 2748 case IPV4_FLOW: 2749 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2750 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2751 break; 2752 case IPV6_FLOW: 2753 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2754 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2755 break; 2756 default: 2757 return -EINVAL; 2758 } 2759 2760 if (flow_pctype) { 2761 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2762 flow_pctype)) | 2763 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2764 flow_pctype)) << 32); 2765 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2766 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2767 (u32)i_set); 2768 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2769 (u32)(i_set >> 32)); 2770 hena |= BIT_ULL(flow_pctype); 2771 } 2772 2773 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2774 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2775 i40e_flush(hw); 2776 2777 return 0; 2778 } 2779 2780 /** 2781 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2782 * @vsi: Pointer to the targeted VSI 2783 * @input: The filter to update or NULL to indicate deletion 2784 * @sw_idx: Software index to the filter 2785 * @cmd: The command to get or set Rx flow classification rules 2786 * 2787 * This function updates (or deletes) a Flow Director entry from 2788 * the hlist of the corresponding PF 2789 * 2790 * Returns 0 on success 2791 **/ 2792 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2793 struct i40e_fdir_filter *input, 2794 u16 sw_idx, 2795 struct ethtool_rxnfc *cmd) 2796 { 2797 struct i40e_fdir_filter *rule, *parent; 2798 struct i40e_pf *pf = vsi->back; 2799 struct hlist_node *node2; 2800 int err = -EINVAL; 2801 2802 parent = NULL; 2803 rule = NULL; 2804 2805 hlist_for_each_entry_safe(rule, node2, 2806 &pf->fdir_filter_list, fdir_node) { 2807 /* hash found, or no matching entry */ 2808 if (rule->fd_id >= sw_idx) 2809 break; 2810 parent = rule; 2811 } 2812 2813 /* if there is an old rule occupying our place remove it */ 2814 if (rule && (rule->fd_id == sw_idx)) { 2815 /* Remove this rule, since we're either deleting it, or 2816 * replacing it. 2817 */ 2818 err = i40e_add_del_fdir(vsi, rule, false); 2819 hlist_del(&rule->fdir_node); 2820 kfree(rule); 2821 pf->fdir_pf_active_filters--; 2822 } 2823 2824 /* If we weren't given an input, this is a delete, so just return the 2825 * error code indicating if there was an entry at the requested slot 2826 */ 2827 if (!input) 2828 return err; 2829 2830 /* Otherwise, install the new rule as requested */ 2831 INIT_HLIST_NODE(&input->fdir_node); 2832 2833 /* add filter to the list */ 2834 if (parent) 2835 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2836 else 2837 hlist_add_head(&input->fdir_node, 2838 &pf->fdir_filter_list); 2839 2840 /* update counts */ 2841 pf->fdir_pf_active_filters++; 2842 2843 return 0; 2844 } 2845 2846 /** 2847 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 2848 * @pf: pointer to PF structure 2849 * 2850 * This function searches the list of filters and determines which FLX_PIT 2851 * entries are still required. It will prune any entries which are no longer 2852 * in use after the deletion. 2853 **/ 2854 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 2855 { 2856 struct i40e_flex_pit *entry, *tmp; 2857 struct i40e_fdir_filter *rule; 2858 2859 /* First, we'll check the l3 table */ 2860 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 2861 bool found = false; 2862 2863 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2864 if (rule->flow_type != IP_USER_FLOW) 2865 continue; 2866 if (rule->flex_filter && 2867 rule->flex_offset == entry->src_offset) { 2868 found = true; 2869 break; 2870 } 2871 } 2872 2873 /* If we didn't find the filter, then we can prune this entry 2874 * from the list. 2875 */ 2876 if (!found) { 2877 list_del(&entry->list); 2878 kfree(entry); 2879 } 2880 } 2881 2882 /* Followed by the L4 table */ 2883 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 2884 bool found = false; 2885 2886 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2887 /* Skip this filter if it's L3, since we already 2888 * checked those in the above loop 2889 */ 2890 if (rule->flow_type == IP_USER_FLOW) 2891 continue; 2892 if (rule->flex_filter && 2893 rule->flex_offset == entry->src_offset) { 2894 found = true; 2895 break; 2896 } 2897 } 2898 2899 /* If we didn't find the filter, then we can prune this entry 2900 * from the list. 2901 */ 2902 if (!found) { 2903 list_del(&entry->list); 2904 kfree(entry); 2905 } 2906 } 2907 } 2908 2909 /** 2910 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 2911 * @vsi: Pointer to the targeted VSI 2912 * @cmd: The command to get or set Rx flow classification rules 2913 * 2914 * The function removes a Flow Director filter entry from the 2915 * hlist of the corresponding PF 2916 * 2917 * Returns 0 on success 2918 */ 2919 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 2920 struct ethtool_rxnfc *cmd) 2921 { 2922 struct ethtool_rx_flow_spec *fsp = 2923 (struct ethtool_rx_flow_spec *)&cmd->fs; 2924 struct i40e_pf *pf = vsi->back; 2925 int ret = 0; 2926 2927 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 2928 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 2929 return -EBUSY; 2930 2931 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 2932 return -EBUSY; 2933 2934 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 2935 2936 i40e_prune_flex_pit_list(pf); 2937 2938 i40e_fdir_check_and_reenable(pf); 2939 return ret; 2940 } 2941 2942 /** 2943 * i40e_unused_pit_index - Find an unused PIT index for given list 2944 * @pf: the PF data structure 2945 * 2946 * Find the first unused flexible PIT index entry. We search both the L3 and 2947 * L4 flexible PIT lists so that the returned index is unique and unused by 2948 * either currently programmed L3 or L4 filters. We use a bit field as storage 2949 * to track which indexes are already used. 2950 **/ 2951 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 2952 { 2953 unsigned long available_index = 0xFF; 2954 struct i40e_flex_pit *entry; 2955 2956 /* We need to make sure that the new index isn't in use by either L3 2957 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 2958 * L4 to use the same index. 2959 */ 2960 2961 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 2962 clear_bit(entry->pit_index, &available_index); 2963 2964 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 2965 clear_bit(entry->pit_index, &available_index); 2966 2967 return find_first_bit(&available_index, 8); 2968 } 2969 2970 /** 2971 * i40e_find_flex_offset - Find an existing flex src_offset 2972 * @flex_pit_list: L3 or L4 flex PIT list 2973 * @src_offset: new src_offset to find 2974 * 2975 * Searches the flex_pit_list for an existing offset. If no offset is 2976 * currently programmed, then this will return an ERR_PTR if there is no space 2977 * to add a new offset, otherwise it returns NULL. 2978 **/ 2979 static 2980 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 2981 u16 src_offset) 2982 { 2983 struct i40e_flex_pit *entry; 2984 int size = 0; 2985 2986 /* Search for the src_offset first. If we find a matching entry 2987 * already programmed, we can simply re-use it. 2988 */ 2989 list_for_each_entry(entry, flex_pit_list, list) { 2990 size++; 2991 if (entry->src_offset == src_offset) 2992 return entry; 2993 } 2994 2995 /* If we haven't found an entry yet, then the provided src offset has 2996 * not yet been programmed. We will program the src offset later on, 2997 * but we need to indicate whether there is enough space to do so 2998 * here. We'll make use of ERR_PTR for this purpose. 2999 */ 3000 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3001 return ERR_PTR(-ENOSPC); 3002 3003 return NULL; 3004 } 3005 3006 /** 3007 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3008 * @flex_pit_list: L3 or L4 flex PIT list 3009 * @src_offset: new src_offset to add 3010 * @pit_index: the PIT index to program 3011 * 3012 * This function programs the new src_offset to the list. It is expected that 3013 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3014 * that this offset is not programmed, and that the list has enough space to 3015 * store another offset. 3016 * 3017 * Returns 0 on success, and negative value on error. 3018 **/ 3019 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3020 u16 src_offset, 3021 u8 pit_index) 3022 { 3023 struct i40e_flex_pit *new_pit, *entry; 3024 3025 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3026 if (!new_pit) 3027 return -ENOMEM; 3028 3029 new_pit->src_offset = src_offset; 3030 new_pit->pit_index = pit_index; 3031 3032 /* We need to insert this item such that the list is sorted by 3033 * src_offset in ascending order. 3034 */ 3035 list_for_each_entry(entry, flex_pit_list, list) { 3036 if (new_pit->src_offset < entry->src_offset) { 3037 list_add_tail(&new_pit->list, &entry->list); 3038 return 0; 3039 } 3040 3041 /* If we found an entry with our offset already programmed we 3042 * can simply return here, after freeing the memory. However, 3043 * if the pit_index does not match we need to report an error. 3044 */ 3045 if (new_pit->src_offset == entry->src_offset) { 3046 int err = 0; 3047 3048 /* If the PIT index is not the same we can't re-use 3049 * the entry, so we must report an error. 3050 */ 3051 if (new_pit->pit_index != entry->pit_index) 3052 err = -EINVAL; 3053 3054 kfree(new_pit); 3055 return err; 3056 } 3057 } 3058 3059 /* If we reached here, then we haven't yet added the item. This means 3060 * that we should add the item at the end of the list. 3061 */ 3062 list_add_tail(&new_pit->list, flex_pit_list); 3063 return 0; 3064 } 3065 3066 /** 3067 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3068 * @pf: Pointer to the PF structure 3069 * @flex_pit_list: list of flexible src offsets in use 3070 * #flex_pit_start: index to first entry for this section of the table 3071 * 3072 * In order to handle flexible data, the hardware uses a table of values 3073 * called the FLX_PIT table. This table is used to indicate which sections of 3074 * the input correspond to what PIT index values. Unfortunately, hardware is 3075 * very restrictive about programming this table. Entries must be ordered by 3076 * src_offset in ascending order, without duplicates. Additionally, unused 3077 * entries must be set to the unused index value, and must have valid size and 3078 * length according to the src_offset ordering. 3079 * 3080 * This function will reprogram the FLX_PIT register from a book-keeping 3081 * structure that we guarantee is already ordered correctly, and has no more 3082 * than 3 entries. 3083 * 3084 * To make things easier, we only support flexible values of one word length, 3085 * rather than allowing variable length flexible values. 3086 **/ 3087 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3088 struct list_head *flex_pit_list, 3089 int flex_pit_start) 3090 { 3091 struct i40e_flex_pit *entry = NULL; 3092 u16 last_offset = 0; 3093 int i = 0, j = 0; 3094 3095 /* First, loop over the list of flex PIT entries, and reprogram the 3096 * registers. 3097 */ 3098 list_for_each_entry(entry, flex_pit_list, list) { 3099 /* We have to be careful when programming values for the 3100 * largest SRC_OFFSET value. It is possible that adding 3101 * additional empty values at the end would overflow the space 3102 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3103 * we check here and add the empty values prior to adding the 3104 * largest value. 3105 * 3106 * To determine this, we will use a loop from i+1 to 3, which 3107 * will determine whether the unused entries would have valid 3108 * SRC_OFFSET. Note that there cannot be extra entries past 3109 * this value, because the only valid values would have been 3110 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3111 * have been added to the list in the first place. 3112 */ 3113 for (j = i + 1; j < 3; j++) { 3114 u16 offset = entry->src_offset + j; 3115 int index = flex_pit_start + i; 3116 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3117 1, 3118 offset - 3); 3119 3120 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3121 i40e_write_rx_ctl(&pf->hw, 3122 I40E_PRTQF_FLX_PIT(index), 3123 value); 3124 i++; 3125 } 3126 } 3127 3128 /* Now, we can program the actual value into the table */ 3129 i40e_write_rx_ctl(&pf->hw, 3130 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3131 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3132 1, 3133 entry->src_offset)); 3134 i++; 3135 } 3136 3137 /* In order to program the last entries in the table, we need to 3138 * determine the valid offset. If the list is empty, we'll just start 3139 * with 0. Otherwise, we'll start with the last item offset and add 1. 3140 * This ensures that all entries have valid sizes. If we don't do this 3141 * correctly, the hardware will disable flexible field parsing. 3142 */ 3143 if (!list_empty(flex_pit_list)) 3144 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3145 3146 for (; i < 3; i++, last_offset++) { 3147 i40e_write_rx_ctl(&pf->hw, 3148 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3149 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3150 1, 3151 last_offset)); 3152 } 3153 } 3154 3155 /** 3156 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3157 * @pf: pointer to the PF structure 3158 * 3159 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3160 * internal helper function for implementation details. 3161 **/ 3162 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3163 { 3164 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3165 I40E_FLEX_PIT_IDX_START_L3); 3166 3167 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3168 I40E_FLEX_PIT_IDX_START_L4); 3169 3170 /* We also need to program the L3 and L4 GLQF ORT register */ 3171 i40e_write_rx_ctl(&pf->hw, 3172 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3173 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3174 3, 1)); 3175 3176 i40e_write_rx_ctl(&pf->hw, 3177 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3178 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3179 3, 1)); 3180 } 3181 3182 /** 3183 * i40e_flow_str - Converts a flow_type into a human readable string 3184 * @flow_type: the flow type from a flow specification 3185 * 3186 * Currently only flow types we support are included here, and the string 3187 * value attempts to match what ethtool would use to configure this flow type. 3188 **/ 3189 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3190 { 3191 switch (fsp->flow_type & ~FLOW_EXT) { 3192 case TCP_V4_FLOW: 3193 return "tcp4"; 3194 case UDP_V4_FLOW: 3195 return "udp4"; 3196 case SCTP_V4_FLOW: 3197 return "sctp4"; 3198 case IP_USER_FLOW: 3199 return "ip4"; 3200 default: 3201 return "unknown"; 3202 } 3203 } 3204 3205 /** 3206 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3207 * @pit_index: PIT index to convert 3208 * 3209 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3210 * of range. 3211 **/ 3212 static u64 i40e_pit_index_to_mask(int pit_index) 3213 { 3214 switch (pit_index) { 3215 case 0: 3216 return I40E_FLEX_50_MASK; 3217 case 1: 3218 return I40E_FLEX_51_MASK; 3219 case 2: 3220 return I40E_FLEX_52_MASK; 3221 case 3: 3222 return I40E_FLEX_53_MASK; 3223 case 4: 3224 return I40E_FLEX_54_MASK; 3225 case 5: 3226 return I40E_FLEX_55_MASK; 3227 case 6: 3228 return I40E_FLEX_56_MASK; 3229 case 7: 3230 return I40E_FLEX_57_MASK; 3231 default: 3232 return 0; 3233 } 3234 } 3235 3236 /** 3237 * i40e_print_input_set - Show changes between two input sets 3238 * @vsi: the vsi being configured 3239 * @old: the old input set 3240 * @new: the new input set 3241 * 3242 * Print the difference between old and new input sets by showing which series 3243 * of words are toggled on or off. Only displays the bits we actually support 3244 * changing. 3245 **/ 3246 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3247 { 3248 struct i40e_pf *pf = vsi->back; 3249 bool old_value, new_value; 3250 int i; 3251 3252 old_value = !!(old & I40E_L3_SRC_MASK); 3253 new_value = !!(new & I40E_L3_SRC_MASK); 3254 if (old_value != new_value) 3255 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3256 old_value ? "ON" : "OFF", 3257 new_value ? "ON" : "OFF"); 3258 3259 old_value = !!(old & I40E_L3_DST_MASK); 3260 new_value = !!(new & I40E_L3_DST_MASK); 3261 if (old_value != new_value) 3262 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3263 old_value ? "ON" : "OFF", 3264 new_value ? "ON" : "OFF"); 3265 3266 old_value = !!(old & I40E_L4_SRC_MASK); 3267 new_value = !!(new & I40E_L4_SRC_MASK); 3268 if (old_value != new_value) 3269 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3270 old_value ? "ON" : "OFF", 3271 new_value ? "ON" : "OFF"); 3272 3273 old_value = !!(old & I40E_L4_DST_MASK); 3274 new_value = !!(new & I40E_L4_DST_MASK); 3275 if (old_value != new_value) 3276 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3277 old_value ? "ON" : "OFF", 3278 new_value ? "ON" : "OFF"); 3279 3280 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3281 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3282 if (old_value != new_value) 3283 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3284 old_value ? "ON" : "OFF", 3285 new_value ? "ON" : "OFF"); 3286 3287 /* Show change of flexible filter entries */ 3288 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3289 u64 flex_mask = i40e_pit_index_to_mask(i); 3290 3291 old_value = !!(old & flex_mask); 3292 new_value = !!(new & flex_mask); 3293 if (old_value != new_value) 3294 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3295 i, 3296 old_value ? "ON" : "OFF", 3297 new_value ? "ON" : "OFF"); 3298 } 3299 3300 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3301 old); 3302 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3303 new); 3304 } 3305 3306 /** 3307 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3308 * @vsi: pointer to the targeted VSI 3309 * @fsp: pointer to Rx flow specification 3310 * @userdef: userdefined data from flow specification 3311 * 3312 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3313 * for partial matches exists with a few limitations. First, hardware only 3314 * supports masking by word boundary (2 bytes) and not per individual bit. 3315 * Second, hardware is limited to using one mask for a flow type and cannot 3316 * use a separate mask for each filter. 3317 * 3318 * To support these limitations, if we already have a configured filter for 3319 * the specified type, this function enforces that new filters of the type 3320 * match the configured input set. Otherwise, if we do not have a filter of 3321 * the specified type, we allow the input set to be updated to match the 3322 * desired filter. 3323 * 3324 * To help ensure that administrators understand why filters weren't displayed 3325 * as supported, we print a diagnostic message displaying how the input set 3326 * would change and warning to delete the preexisting filters if required. 3327 * 3328 * Returns 0 on successful input set match, and a negative return code on 3329 * failure. 3330 **/ 3331 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3332 struct ethtool_rx_flow_spec *fsp, 3333 struct i40e_rx_flow_userdef *userdef) 3334 { 3335 struct i40e_pf *pf = vsi->back; 3336 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3337 struct ethtool_usrip4_spec *usr_ip4_spec; 3338 u64 current_mask, new_mask; 3339 bool new_flex_offset = false; 3340 bool flex_l3 = false; 3341 u16 *fdir_filter_count; 3342 u16 index, src_offset = 0; 3343 u8 pit_index = 0; 3344 int err; 3345 3346 switch (fsp->flow_type & ~FLOW_EXT) { 3347 case SCTP_V4_FLOW: 3348 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3349 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3350 break; 3351 case TCP_V4_FLOW: 3352 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3353 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3354 break; 3355 case UDP_V4_FLOW: 3356 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3357 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3358 break; 3359 case IP_USER_FLOW: 3360 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3361 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3362 flex_l3 = true; 3363 break; 3364 default: 3365 return -EOPNOTSUPP; 3366 } 3367 3368 /* Read the current input set from register memory. */ 3369 current_mask = i40e_read_fd_input_set(pf, index); 3370 new_mask = current_mask; 3371 3372 /* Determine, if any, the required changes to the input set in order 3373 * to support the provided mask. 3374 * 3375 * Hardware only supports masking at word (2 byte) granularity and does 3376 * not support full bitwise masking. This implementation simplifies 3377 * even further and only supports fully enabled or fully disabled 3378 * masks for each field, even though we could split the ip4src and 3379 * ip4dst fields. 3380 */ 3381 switch (fsp->flow_type & ~FLOW_EXT) { 3382 case SCTP_V4_FLOW: 3383 new_mask &= ~I40E_VERIFY_TAG_MASK; 3384 /* Fall through */ 3385 case TCP_V4_FLOW: 3386 case UDP_V4_FLOW: 3387 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3388 3389 /* IPv4 source address */ 3390 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3391 new_mask |= I40E_L3_SRC_MASK; 3392 else if (!tcp_ip4_spec->ip4src) 3393 new_mask &= ~I40E_L3_SRC_MASK; 3394 else 3395 return -EOPNOTSUPP; 3396 3397 /* IPv4 destination address */ 3398 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3399 new_mask |= I40E_L3_DST_MASK; 3400 else if (!tcp_ip4_spec->ip4dst) 3401 new_mask &= ~I40E_L3_DST_MASK; 3402 else 3403 return -EOPNOTSUPP; 3404 3405 /* L4 source port */ 3406 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3407 new_mask |= I40E_L4_SRC_MASK; 3408 else if (!tcp_ip4_spec->psrc) 3409 new_mask &= ~I40E_L4_SRC_MASK; 3410 else 3411 return -EOPNOTSUPP; 3412 3413 /* L4 destination port */ 3414 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3415 new_mask |= I40E_L4_DST_MASK; 3416 else if (!tcp_ip4_spec->pdst) 3417 new_mask &= ~I40E_L4_DST_MASK; 3418 else 3419 return -EOPNOTSUPP; 3420 3421 /* Filtering on Type of Service is not supported. */ 3422 if (tcp_ip4_spec->tos) 3423 return -EOPNOTSUPP; 3424 3425 break; 3426 case IP_USER_FLOW: 3427 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3428 3429 /* IPv4 source address */ 3430 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3431 new_mask |= I40E_L3_SRC_MASK; 3432 else if (!usr_ip4_spec->ip4src) 3433 new_mask &= ~I40E_L3_SRC_MASK; 3434 else 3435 return -EOPNOTSUPP; 3436 3437 /* IPv4 destination address */ 3438 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3439 new_mask |= I40E_L3_DST_MASK; 3440 else if (!usr_ip4_spec->ip4dst) 3441 new_mask &= ~I40E_L3_DST_MASK; 3442 else 3443 return -EOPNOTSUPP; 3444 3445 /* First 4 bytes of L4 header */ 3446 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3447 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3448 else if (!usr_ip4_spec->l4_4_bytes) 3449 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3450 else 3451 return -EOPNOTSUPP; 3452 3453 /* Filtering on Type of Service is not supported. */ 3454 if (usr_ip4_spec->tos) 3455 return -EOPNOTSUPP; 3456 3457 /* Filtering on IP version is not supported */ 3458 if (usr_ip4_spec->ip_ver) 3459 return -EINVAL; 3460 3461 /* Filtering on L4 protocol is not supported */ 3462 if (usr_ip4_spec->proto) 3463 return -EINVAL; 3464 3465 break; 3466 default: 3467 return -EOPNOTSUPP; 3468 } 3469 3470 /* First, clear all flexible filter entries */ 3471 new_mask &= ~I40E_FLEX_INPUT_MASK; 3472 3473 /* If we have a flexible filter, try to add this offset to the correct 3474 * flexible filter PIT list. Once finished, we can update the mask. 3475 * If the src_offset changed, we will get a new mask value which will 3476 * trigger an input set change. 3477 */ 3478 if (userdef->flex_filter) { 3479 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3480 3481 /* Flexible offset must be even, since the flexible payload 3482 * must be aligned on 2-byte boundary. 3483 */ 3484 if (userdef->flex_offset & 0x1) { 3485 dev_warn(&pf->pdev->dev, 3486 "Flexible data offset must be 2-byte aligned\n"); 3487 return -EINVAL; 3488 } 3489 3490 src_offset = userdef->flex_offset >> 1; 3491 3492 /* FLX_PIT source offset value is only so large */ 3493 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3494 dev_warn(&pf->pdev->dev, 3495 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3496 return -EINVAL; 3497 } 3498 3499 /* See if this offset has already been programmed. If we get 3500 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3501 * if we get a NULL pointer, this means we will need to add 3502 * the offset. 3503 */ 3504 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3505 src_offset); 3506 if (IS_ERR(flex_pit)) 3507 return PTR_ERR(flex_pit); 3508 3509 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3510 * packet types, and thus we need to program both L3 and L4 3511 * flexible values. These must have identical flexible index, 3512 * as otherwise we can't correctly program the input set. So 3513 * we'll find both an L3 and L4 index and make sure they are 3514 * the same. 3515 */ 3516 if (flex_l3) { 3517 l3_flex_pit = 3518 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3519 src_offset); 3520 if (IS_ERR(l3_flex_pit)) 3521 return PTR_ERR(l3_flex_pit); 3522 3523 if (flex_pit) { 3524 /* If we already had a matching L4 entry, we 3525 * need to make sure that the L3 entry we 3526 * obtained uses the same index. 3527 */ 3528 if (l3_flex_pit) { 3529 if (l3_flex_pit->pit_index != 3530 flex_pit->pit_index) { 3531 return -EINVAL; 3532 } 3533 } else { 3534 new_flex_offset = true; 3535 } 3536 } else { 3537 flex_pit = l3_flex_pit; 3538 } 3539 } 3540 3541 /* If we didn't find an existing flex offset, we need to 3542 * program a new one. However, we don't immediately program it 3543 * here because we will wait to program until after we check 3544 * that it is safe to change the input set. 3545 */ 3546 if (!flex_pit) { 3547 new_flex_offset = true; 3548 pit_index = i40e_unused_pit_index(pf); 3549 } else { 3550 pit_index = flex_pit->pit_index; 3551 } 3552 3553 /* Update the mask with the new offset */ 3554 new_mask |= i40e_pit_index_to_mask(pit_index); 3555 } 3556 3557 /* If the mask and flexible filter offsets for this filter match the 3558 * currently programmed values we don't need any input set change, so 3559 * this filter is safe to install. 3560 */ 3561 if (new_mask == current_mask && !new_flex_offset) 3562 return 0; 3563 3564 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3565 i40e_flow_str(fsp)); 3566 i40e_print_input_set(vsi, current_mask, new_mask); 3567 if (new_flex_offset) { 3568 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3569 pit_index, src_offset); 3570 } 3571 3572 /* Hardware input sets are global across multiple ports, so even the 3573 * main port cannot change them when in MFP mode as this would impact 3574 * any filters on the other ports. 3575 */ 3576 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3577 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3578 return -EOPNOTSUPP; 3579 } 3580 3581 /* This filter requires us to update the input set. However, hardware 3582 * only supports one input set per flow type, and does not support 3583 * separate masks for each filter. This means that we can only support 3584 * a single mask for all filters of a specific type. 3585 * 3586 * If we have preexisting filters, they obviously depend on the 3587 * current programmed input set. Display a diagnostic message in this 3588 * case explaining why the filter could not be accepted. 3589 */ 3590 if (*fdir_filter_count) { 3591 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3592 i40e_flow_str(fsp), 3593 *fdir_filter_count); 3594 return -EOPNOTSUPP; 3595 } 3596 3597 i40e_write_fd_input_set(pf, index, new_mask); 3598 3599 /* Add the new offset and update table, if necessary */ 3600 if (new_flex_offset) { 3601 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3602 pit_index); 3603 if (err) 3604 return err; 3605 3606 if (flex_l3) { 3607 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3608 src_offset, 3609 pit_index); 3610 if (err) 3611 return err; 3612 } 3613 3614 i40e_reprogram_flex_pit(pf); 3615 } 3616 3617 return 0; 3618 } 3619 3620 /** 3621 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3622 * @vsi: pointer to the targeted VSI 3623 * @cmd: command to get or set RX flow classification rules 3624 * 3625 * Add Flow Director filters for a specific flow spec based on their 3626 * protocol. Returns 0 if the filters were successfully added. 3627 **/ 3628 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3629 struct ethtool_rxnfc *cmd) 3630 { 3631 struct i40e_rx_flow_userdef userdef; 3632 struct ethtool_rx_flow_spec *fsp; 3633 struct i40e_fdir_filter *input; 3634 u16 dest_vsi = 0, q_index = 0; 3635 struct i40e_pf *pf; 3636 int ret = -EINVAL; 3637 u8 dest_ctl; 3638 3639 if (!vsi) 3640 return -EINVAL; 3641 pf = vsi->back; 3642 3643 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3644 return -EOPNOTSUPP; 3645 3646 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3647 return -ENOSPC; 3648 3649 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3650 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3651 return -EBUSY; 3652 3653 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3654 return -EBUSY; 3655 3656 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3657 3658 /* Parse the user-defined field */ 3659 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3660 return -EINVAL; 3661 3662 /* Extended MAC field is not supported */ 3663 if (fsp->flow_type & FLOW_MAC_EXT) 3664 return -EINVAL; 3665 3666 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3667 if (ret) 3668 return ret; 3669 3670 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3671 pf->hw.func_caps.fd_filters_guaranteed)) { 3672 return -EINVAL; 3673 } 3674 3675 /* ring_cookie is either the drop index, or is a mask of the queue 3676 * index and VF id we wish to target. 3677 */ 3678 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3679 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3680 } else { 3681 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3682 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3683 3684 if (!vf) { 3685 if (ring >= vsi->num_queue_pairs) 3686 return -EINVAL; 3687 dest_vsi = vsi->id; 3688 } else { 3689 /* VFs are zero-indexed, so we subtract one here */ 3690 vf--; 3691 3692 if (vf >= pf->num_alloc_vfs) 3693 return -EINVAL; 3694 if (ring >= pf->vf[vf].num_queue_pairs) 3695 return -EINVAL; 3696 dest_vsi = pf->vf[vf].lan_vsi_id; 3697 } 3698 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3699 q_index = ring; 3700 } 3701 3702 input = kzalloc(sizeof(*input), GFP_KERNEL); 3703 3704 if (!input) 3705 return -ENOMEM; 3706 3707 input->fd_id = fsp->location; 3708 input->q_index = q_index; 3709 input->dest_vsi = dest_vsi; 3710 input->dest_ctl = dest_ctl; 3711 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 3712 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 3713 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3714 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3715 input->flow_type = fsp->flow_type & ~FLOW_EXT; 3716 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 3717 3718 /* Reverse the src and dest notion, since the HW expects them to be from 3719 * Tx perspective where as the input from user is from Rx filter view. 3720 */ 3721 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 3722 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 3723 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3724 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3725 3726 if (userdef.flex_filter) { 3727 input->flex_filter = true; 3728 input->flex_word = cpu_to_be16(userdef.flex_word); 3729 input->flex_offset = userdef.flex_offset; 3730 } 3731 3732 ret = i40e_add_del_fdir(vsi, input, true); 3733 if (ret) 3734 goto free_input; 3735 3736 /* Add the input filter to the fdir_input_list, possibly replacing 3737 * a previous filter. Do not free the input structure after adding it 3738 * to the list as this would cause a use-after-free bug. 3739 */ 3740 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 3741 3742 return 0; 3743 3744 free_input: 3745 kfree(input); 3746 return ret; 3747 } 3748 3749 /** 3750 * i40e_set_rxnfc - command to set RX flow classification rules 3751 * @netdev: network interface device structure 3752 * @cmd: ethtool rxnfc command 3753 * 3754 * Returns Success if the command is supported. 3755 **/ 3756 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 3757 { 3758 struct i40e_netdev_priv *np = netdev_priv(netdev); 3759 struct i40e_vsi *vsi = np->vsi; 3760 struct i40e_pf *pf = vsi->back; 3761 int ret = -EOPNOTSUPP; 3762 3763 switch (cmd->cmd) { 3764 case ETHTOOL_SRXFH: 3765 ret = i40e_set_rss_hash_opt(pf, cmd); 3766 break; 3767 case ETHTOOL_SRXCLSRLINS: 3768 ret = i40e_add_fdir_ethtool(vsi, cmd); 3769 break; 3770 case ETHTOOL_SRXCLSRLDEL: 3771 ret = i40e_del_fdir_entry(vsi, cmd); 3772 break; 3773 default: 3774 break; 3775 } 3776 3777 return ret; 3778 } 3779 3780 /** 3781 * i40e_max_channels - get Max number of combined channels supported 3782 * @vsi: vsi pointer 3783 **/ 3784 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 3785 { 3786 /* TODO: This code assumes DCB and FD is disabled for now. */ 3787 return vsi->alloc_queue_pairs; 3788 } 3789 3790 /** 3791 * i40e_get_channels - Get the current channels enabled and max supported etc. 3792 * @netdev: network interface device structure 3793 * @ch: ethtool channels structure 3794 * 3795 * We don't support separate tx and rx queues as channels. The other count 3796 * represents how many queues are being used for control. max_combined counts 3797 * how many queue pairs we can support. They may not be mapped 1 to 1 with 3798 * q_vectors since we support a lot more queue pairs than q_vectors. 3799 **/ 3800 static void i40e_get_channels(struct net_device *dev, 3801 struct ethtool_channels *ch) 3802 { 3803 struct i40e_netdev_priv *np = netdev_priv(dev); 3804 struct i40e_vsi *vsi = np->vsi; 3805 struct i40e_pf *pf = vsi->back; 3806 3807 /* report maximum channels */ 3808 ch->max_combined = i40e_max_channels(vsi); 3809 3810 /* report info for other vector */ 3811 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 3812 ch->max_other = ch->other_count; 3813 3814 /* Note: This code assumes DCB is disabled for now. */ 3815 ch->combined_count = vsi->num_queue_pairs; 3816 } 3817 3818 /** 3819 * i40e_set_channels - Set the new channels count. 3820 * @netdev: network interface device structure 3821 * @ch: ethtool channels structure 3822 * 3823 * The new channels count may not be the same as requested by the user 3824 * since it gets rounded down to a power of 2 value. 3825 **/ 3826 static int i40e_set_channels(struct net_device *dev, 3827 struct ethtool_channels *ch) 3828 { 3829 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3830 struct i40e_netdev_priv *np = netdev_priv(dev); 3831 unsigned int count = ch->combined_count; 3832 struct i40e_vsi *vsi = np->vsi; 3833 struct i40e_pf *pf = vsi->back; 3834 struct i40e_fdir_filter *rule; 3835 struct hlist_node *node2; 3836 int new_count; 3837 int err = 0; 3838 3839 /* We do not support setting channels for any other VSI at present */ 3840 if (vsi->type != I40E_VSI_MAIN) 3841 return -EINVAL; 3842 3843 /* verify they are not requesting separate vectors */ 3844 if (!count || ch->rx_count || ch->tx_count) 3845 return -EINVAL; 3846 3847 /* verify other_count has not changed */ 3848 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 3849 return -EINVAL; 3850 3851 /* verify the number of channels does not exceed hardware limits */ 3852 if (count > i40e_max_channels(vsi)) 3853 return -EINVAL; 3854 3855 /* verify that the number of channels does not invalidate any current 3856 * flow director rules 3857 */ 3858 hlist_for_each_entry_safe(rule, node2, 3859 &pf->fdir_filter_list, fdir_node) { 3860 if (rule->dest_ctl != drop && count <= rule->q_index) { 3861 dev_warn(&pf->pdev->dev, 3862 "Existing user defined filter %d assigns flow to queue %d\n", 3863 rule->fd_id, rule->q_index); 3864 err = -EINVAL; 3865 } 3866 } 3867 3868 if (err) { 3869 dev_err(&pf->pdev->dev, 3870 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 3871 count); 3872 return err; 3873 } 3874 3875 /* update feature limits from largest to smallest supported values */ 3876 /* TODO: Flow director limit, DCB etc */ 3877 3878 /* use rss_reconfig to rebuild with new queue count and update traffic 3879 * class queue mapping 3880 */ 3881 new_count = i40e_reconfig_rss_queues(pf, count); 3882 if (new_count > 0) 3883 return 0; 3884 else 3885 return -EINVAL; 3886 } 3887 3888 /** 3889 * i40e_get_rxfh_key_size - get the RSS hash key size 3890 * @netdev: network interface device structure 3891 * 3892 * Returns the table size. 3893 **/ 3894 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 3895 { 3896 return I40E_HKEY_ARRAY_SIZE; 3897 } 3898 3899 /** 3900 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 3901 * @netdev: network interface device structure 3902 * 3903 * Returns the table size. 3904 **/ 3905 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 3906 { 3907 return I40E_HLUT_ARRAY_SIZE; 3908 } 3909 3910 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 3911 u8 *hfunc) 3912 { 3913 struct i40e_netdev_priv *np = netdev_priv(netdev); 3914 struct i40e_vsi *vsi = np->vsi; 3915 u8 *lut, *seed = NULL; 3916 int ret; 3917 u16 i; 3918 3919 if (hfunc) 3920 *hfunc = ETH_RSS_HASH_TOP; 3921 3922 if (!indir) 3923 return 0; 3924 3925 seed = key; 3926 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3927 if (!lut) 3928 return -ENOMEM; 3929 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 3930 if (ret) 3931 goto out; 3932 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3933 indir[i] = (u32)(lut[i]); 3934 3935 out: 3936 kfree(lut); 3937 3938 return ret; 3939 } 3940 3941 /** 3942 * i40e_set_rxfh - set the rx flow hash indirection table 3943 * @netdev: network interface device structure 3944 * @indir: indirection table 3945 * @key: hash key 3946 * 3947 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 3948 * returns 0 after programming the table. 3949 **/ 3950 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 3951 const u8 *key, const u8 hfunc) 3952 { 3953 struct i40e_netdev_priv *np = netdev_priv(netdev); 3954 struct i40e_vsi *vsi = np->vsi; 3955 struct i40e_pf *pf = vsi->back; 3956 u8 *seed = NULL; 3957 u16 i; 3958 3959 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 3960 return -EOPNOTSUPP; 3961 3962 if (key) { 3963 if (!vsi->rss_hkey_user) { 3964 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 3965 GFP_KERNEL); 3966 if (!vsi->rss_hkey_user) 3967 return -ENOMEM; 3968 } 3969 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 3970 seed = vsi->rss_hkey_user; 3971 } 3972 if (!vsi->rss_lut_user) { 3973 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3974 if (!vsi->rss_lut_user) 3975 return -ENOMEM; 3976 } 3977 3978 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 3979 if (indir) 3980 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3981 vsi->rss_lut_user[i] = (u8)(indir[i]); 3982 else 3983 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 3984 vsi->rss_size); 3985 3986 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 3987 I40E_HLUT_ARRAY_SIZE); 3988 } 3989 3990 /** 3991 * i40e_get_priv_flags - report device private flags 3992 * @dev: network interface device structure 3993 * 3994 * The get string set count and the string set should be matched for each 3995 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 3996 * array. 3997 * 3998 * Returns a u32 bitmap of flags. 3999 **/ 4000 static u32 i40e_get_priv_flags(struct net_device *dev) 4001 { 4002 struct i40e_netdev_priv *np = netdev_priv(dev); 4003 struct i40e_vsi *vsi = np->vsi; 4004 struct i40e_pf *pf = vsi->back; 4005 u32 i, j, ret_flags = 0; 4006 4007 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4008 const struct i40e_priv_flags *priv_flags; 4009 4010 priv_flags = &i40e_gstrings_priv_flags[i]; 4011 4012 if (priv_flags->flag & pf->flags) 4013 ret_flags |= BIT(i); 4014 } 4015 4016 if (pf->hw.pf_id != 0) 4017 return ret_flags; 4018 4019 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4020 const struct i40e_priv_flags *priv_flags; 4021 4022 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4023 4024 if (priv_flags->flag & pf->flags) 4025 ret_flags |= BIT(i + j); 4026 } 4027 4028 return ret_flags; 4029 } 4030 4031 /** 4032 * i40e_set_priv_flags - set private flags 4033 * @dev: network interface device structure 4034 * @flags: bit flags to be set 4035 **/ 4036 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4037 { 4038 struct i40e_netdev_priv *np = netdev_priv(dev); 4039 struct i40e_vsi *vsi = np->vsi; 4040 struct i40e_pf *pf = vsi->back; 4041 u64 changed_flags; 4042 u32 i, j; 4043 4044 changed_flags = pf->flags; 4045 4046 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4047 const struct i40e_priv_flags *priv_flags; 4048 4049 priv_flags = &i40e_gstrings_priv_flags[i]; 4050 4051 if (priv_flags->read_only) 4052 continue; 4053 4054 if (flags & BIT(i)) 4055 pf->flags |= priv_flags->flag; 4056 else 4057 pf->flags &= ~(priv_flags->flag); 4058 } 4059 4060 if (pf->hw.pf_id != 0) 4061 goto flags_complete; 4062 4063 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4064 const struct i40e_priv_flags *priv_flags; 4065 4066 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4067 4068 if (priv_flags->read_only) 4069 continue; 4070 4071 if (flags & BIT(i + j)) 4072 pf->flags |= priv_flags->flag; 4073 else 4074 pf->flags &= ~(priv_flags->flag); 4075 } 4076 4077 flags_complete: 4078 /* check for flags that changed */ 4079 changed_flags ^= pf->flags; 4080 4081 /* Process any additional changes needed as a result of flag changes. 4082 * The changed_flags value reflects the list of bits that were 4083 * changed in the code above. 4084 */ 4085 4086 /* Flush current ATR settings if ATR was disabled */ 4087 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4088 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4089 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4090 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4091 } 4092 4093 /* Only allow ATR evict on hardware that is capable of handling it */ 4094 if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) 4095 pf->flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE; 4096 4097 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4098 u16 sw_flags = 0, valid_flags = 0; 4099 int ret; 4100 4101 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4102 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4103 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4104 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4105 NULL); 4106 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4107 dev_info(&pf->pdev->dev, 4108 "couldn't set switch config bits, err %s aq_err %s\n", 4109 i40e_stat_str(&pf->hw, ret), 4110 i40e_aq_str(&pf->hw, 4111 pf->hw.aq.asq_last_status)); 4112 /* not a fatal problem, just keep going */ 4113 } 4114 } 4115 4116 /* Issue reset to cause things to take effect, as additional bits 4117 * are added we will need to create a mask of bits requiring reset 4118 */ 4119 if ((changed_flags & I40E_FLAG_VEB_STATS_ENABLED) || 4120 ((changed_flags & I40E_FLAG_LEGACY_RX) && netif_running(dev))) 4121 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4122 4123 return 0; 4124 } 4125 4126 static const struct ethtool_ops i40e_ethtool_ops = { 4127 .get_drvinfo = i40e_get_drvinfo, 4128 .get_regs_len = i40e_get_regs_len, 4129 .get_regs = i40e_get_regs, 4130 .nway_reset = i40e_nway_reset, 4131 .get_link = ethtool_op_get_link, 4132 .get_wol = i40e_get_wol, 4133 .set_wol = i40e_set_wol, 4134 .set_eeprom = i40e_set_eeprom, 4135 .get_eeprom_len = i40e_get_eeprom_len, 4136 .get_eeprom = i40e_get_eeprom, 4137 .get_ringparam = i40e_get_ringparam, 4138 .set_ringparam = i40e_set_ringparam, 4139 .get_pauseparam = i40e_get_pauseparam, 4140 .set_pauseparam = i40e_set_pauseparam, 4141 .get_msglevel = i40e_get_msglevel, 4142 .set_msglevel = i40e_set_msglevel, 4143 .get_rxnfc = i40e_get_rxnfc, 4144 .set_rxnfc = i40e_set_rxnfc, 4145 .self_test = i40e_diag_test, 4146 .get_strings = i40e_get_strings, 4147 .set_phys_id = i40e_set_phys_id, 4148 .get_sset_count = i40e_get_sset_count, 4149 .get_ethtool_stats = i40e_get_ethtool_stats, 4150 .get_coalesce = i40e_get_coalesce, 4151 .set_coalesce = i40e_set_coalesce, 4152 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4153 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4154 .get_rxfh = i40e_get_rxfh, 4155 .set_rxfh = i40e_set_rxfh, 4156 .get_channels = i40e_get_channels, 4157 .set_channels = i40e_set_channels, 4158 .get_ts_info = i40e_get_ts_info, 4159 .get_priv_flags = i40e_get_priv_flags, 4160 .set_priv_flags = i40e_set_priv_flags, 4161 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4162 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4163 .get_link_ksettings = i40e_get_link_ksettings, 4164 .set_link_ksettings = i40e_set_link_ksettings, 4165 }; 4166 4167 void i40e_set_ethtool_ops(struct net_device *netdev) 4168 { 4169 netdev->ethtool_ops = &i40e_ethtool_ops; 4170 } 4171