1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 130 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 131 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 132 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 135 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 136 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 137 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 138 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 139 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 142 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 143 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 144 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 145 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 146 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 148 I40E_PF_STAT("arq_overflows", arq_overflows), 149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 150 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 157 158 /* LPI stats */ 159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 163 }; 164 165 #define I40E_QUEUE_STATS_LEN(n) \ 166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 167 * 2 /* Tx and Rx together */ \ 168 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 173 I40E_MISC_STATS_LEN + \ 174 I40E_QUEUE_STATS_LEN((n))) 175 #define I40E_PFC_STATS_LEN ( \ 176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 181 / sizeof(u64)) 182 #define I40E_VEB_TC_STATS_LEN ( \ 183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 187 / sizeof(u64)) 188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 191 I40E_PFC_STATS_LEN + \ 192 I40E_VSI_STATS_LEN((n))) 193 194 enum i40e_ethtool_test_id { 195 I40E_ETH_TEST_REG = 0, 196 I40E_ETH_TEST_EEPROM, 197 I40E_ETH_TEST_INTR, 198 I40E_ETH_TEST_LINK, 199 }; 200 201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 202 "Register test (offline)", 203 "Eeprom test (offline)", 204 "Interrupt test (offline)", 205 "Link test (on/offline)" 206 }; 207 208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 209 210 struct i40e_priv_flags { 211 char flag_string[ETH_GSTRING_LEN]; 212 u64 flag; 213 bool read_only; 214 }; 215 216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 217 .flag_string = _name, \ 218 .flag = _flag, \ 219 .read_only = _read_only, \ 220 } 221 222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 223 /* NOTE: MFP setting cannot be changed */ 224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 230 }; 231 232 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 233 234 /* Private flags with a global effect, restricted to PF 0 */ 235 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 236 I40E_PRIV_FLAG("vf-true-promisc-support", 237 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 238 }; 239 240 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 241 242 /** 243 * i40e_partition_setting_complaint - generic complaint for MFP restriction 244 * @pf: the PF struct 245 **/ 246 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 247 { 248 dev_info(&pf->pdev->dev, 249 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 250 } 251 252 /** 253 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 254 * @phy_types: PHY types to convert 255 * @supported: pointer to the ethtool supported variable to fill in 256 * @advertising: pointer to the ethtool advertising variable to fill in 257 * 258 **/ 259 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, 260 u32 *advertising) 261 { 262 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 263 u64 phy_types = pf->hw.phy.phy_types; 264 265 *supported = 0x0; 266 *advertising = 0x0; 267 268 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 269 *supported |= SUPPORTED_Autoneg | 270 SUPPORTED_1000baseT_Full; 271 *advertising |= ADVERTISED_Autoneg; 272 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 273 *advertising |= ADVERTISED_1000baseT_Full; 274 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 275 *supported |= SUPPORTED_100baseT_Full; 276 *advertising |= ADVERTISED_100baseT_Full; 277 } 278 } 279 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 280 phy_types & I40E_CAP_PHY_TYPE_XFI || 281 phy_types & I40E_CAP_PHY_TYPE_SFI || 282 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 283 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) 284 *supported |= SUPPORTED_10000baseT_Full; 285 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 287 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 290 *supported |= SUPPORTED_Autoneg | 291 SUPPORTED_10000baseT_Full; 292 *advertising |= ADVERTISED_Autoneg; 293 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 294 *advertising |= ADVERTISED_10000baseT_Full; 295 } 296 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 297 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 298 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 299 *supported |= SUPPORTED_40000baseCR4_Full; 300 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 301 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 302 *supported |= SUPPORTED_Autoneg | 303 SUPPORTED_40000baseCR4_Full; 304 *advertising |= ADVERTISED_Autoneg; 305 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 306 *advertising |= ADVERTISED_40000baseCR4_Full; 307 } 308 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 309 *supported |= SUPPORTED_Autoneg | 310 SUPPORTED_100baseT_Full; 311 *advertising |= ADVERTISED_Autoneg; 312 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 313 *advertising |= ADVERTISED_100baseT_Full; 314 } 315 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 316 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 317 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 318 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 319 *supported |= SUPPORTED_Autoneg | 320 SUPPORTED_1000baseT_Full; 321 *advertising |= ADVERTISED_Autoneg; 322 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 323 *advertising |= ADVERTISED_1000baseT_Full; 324 } 325 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 326 *supported |= SUPPORTED_40000baseSR4_Full; 327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 328 *supported |= SUPPORTED_40000baseLR4_Full; 329 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 330 *supported |= SUPPORTED_40000baseKR4_Full | 331 SUPPORTED_Autoneg; 332 *advertising |= ADVERTISED_40000baseKR4_Full | 333 ADVERTISED_Autoneg; 334 } 335 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 336 *supported |= SUPPORTED_20000baseKR2_Full | 337 SUPPORTED_Autoneg; 338 *advertising |= ADVERTISED_Autoneg; 339 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 340 *advertising |= ADVERTISED_20000baseKR2_Full; 341 } 342 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) { 343 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 344 *supported |= SUPPORTED_10000baseKR_Full | 345 SUPPORTED_Autoneg; 346 *advertising |= ADVERTISED_Autoneg; 347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 348 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 349 *advertising |= ADVERTISED_10000baseKR_Full; 350 } 351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 352 *supported |= SUPPORTED_10000baseKX4_Full | 353 SUPPORTED_Autoneg; 354 *advertising |= ADVERTISED_Autoneg; 355 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 356 *advertising |= ADVERTISED_10000baseKX4_Full; 357 } 358 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) { 359 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 360 *supported |= SUPPORTED_1000baseKX_Full | 361 SUPPORTED_Autoneg; 362 *advertising |= ADVERTISED_Autoneg; 363 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 364 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 365 *advertising |= ADVERTISED_1000baseKX_Full; 366 } 367 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 368 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 369 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 370 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 371 *supported |= SUPPORTED_Autoneg; 372 *advertising |= ADVERTISED_Autoneg; 373 } 374 } 375 376 /** 377 * i40e_get_settings_link_up - Get the Link settings for when link is up 378 * @hw: hw structure 379 * @ecmd: ethtool command to fill in 380 * @netdev: network interface device structure 381 * 382 **/ 383 static void i40e_get_settings_link_up(struct i40e_hw *hw, 384 struct ethtool_link_ksettings *cmd, 385 struct net_device *netdev, 386 struct i40e_pf *pf) 387 { 388 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 389 u32 link_speed = hw_link_info->link_speed; 390 u32 e_advertising = 0x0; 391 u32 e_supported = 0x0; 392 u32 supported, advertising; 393 394 ethtool_convert_link_mode_to_legacy_u32(&supported, 395 cmd->link_modes.supported); 396 ethtool_convert_link_mode_to_legacy_u32(&advertising, 397 cmd->link_modes.advertising); 398 399 /* Initialize supported and advertised settings based on phy settings */ 400 switch (hw_link_info->phy_type) { 401 case I40E_PHY_TYPE_40GBASE_CR4: 402 case I40E_PHY_TYPE_40GBASE_CR4_CU: 403 supported = SUPPORTED_Autoneg | 404 SUPPORTED_40000baseCR4_Full; 405 advertising = ADVERTISED_Autoneg | 406 ADVERTISED_40000baseCR4_Full; 407 break; 408 case I40E_PHY_TYPE_XLAUI: 409 case I40E_PHY_TYPE_XLPPI: 410 case I40E_PHY_TYPE_40GBASE_AOC: 411 supported = SUPPORTED_40000baseCR4_Full; 412 break; 413 case I40E_PHY_TYPE_40GBASE_SR4: 414 supported = SUPPORTED_40000baseSR4_Full; 415 break; 416 case I40E_PHY_TYPE_40GBASE_LR4: 417 supported = SUPPORTED_40000baseLR4_Full; 418 break; 419 case I40E_PHY_TYPE_10GBASE_SR: 420 case I40E_PHY_TYPE_10GBASE_LR: 421 case I40E_PHY_TYPE_1000BASE_SX: 422 case I40E_PHY_TYPE_1000BASE_LX: 423 supported = SUPPORTED_10000baseT_Full; 424 if (hw_link_info->module_type[2] & 425 I40E_MODULE_TYPE_1000BASE_SX || 426 hw_link_info->module_type[2] & 427 I40E_MODULE_TYPE_1000BASE_LX) { 428 supported |= SUPPORTED_1000baseT_Full; 429 if (hw_link_info->requested_speeds & 430 I40E_LINK_SPEED_1GB) 431 advertising |= ADVERTISED_1000baseT_Full; 432 } 433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 434 advertising |= ADVERTISED_10000baseT_Full; 435 break; 436 case I40E_PHY_TYPE_10GBASE_T: 437 case I40E_PHY_TYPE_1000BASE_T: 438 case I40E_PHY_TYPE_100BASE_TX: 439 supported = SUPPORTED_Autoneg | 440 SUPPORTED_10000baseT_Full | 441 SUPPORTED_1000baseT_Full | 442 SUPPORTED_100baseT_Full; 443 advertising = ADVERTISED_Autoneg; 444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 445 advertising |= ADVERTISED_10000baseT_Full; 446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 447 advertising |= ADVERTISED_1000baseT_Full; 448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 449 advertising |= ADVERTISED_100baseT_Full; 450 break; 451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 452 supported = SUPPORTED_Autoneg | 453 SUPPORTED_1000baseT_Full; 454 advertising = ADVERTISED_Autoneg | 455 ADVERTISED_1000baseT_Full; 456 break; 457 case I40E_PHY_TYPE_10GBASE_CR1_CU: 458 case I40E_PHY_TYPE_10GBASE_CR1: 459 supported = SUPPORTED_Autoneg | 460 SUPPORTED_10000baseT_Full; 461 advertising = ADVERTISED_Autoneg | 462 ADVERTISED_10000baseT_Full; 463 break; 464 case I40E_PHY_TYPE_XAUI: 465 case I40E_PHY_TYPE_XFI: 466 case I40E_PHY_TYPE_SFI: 467 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 468 case I40E_PHY_TYPE_10GBASE_AOC: 469 supported = SUPPORTED_10000baseT_Full; 470 advertising = SUPPORTED_10000baseT_Full; 471 break; 472 case I40E_PHY_TYPE_SGMII: 473 supported = SUPPORTED_Autoneg | 474 SUPPORTED_1000baseT_Full; 475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 476 advertising |= ADVERTISED_1000baseT_Full; 477 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 478 supported |= SUPPORTED_100baseT_Full; 479 if (hw_link_info->requested_speeds & 480 I40E_LINK_SPEED_100MB) 481 advertising |= ADVERTISED_100baseT_Full; 482 } 483 break; 484 case I40E_PHY_TYPE_40GBASE_KR4: 485 case I40E_PHY_TYPE_20GBASE_KR2: 486 case I40E_PHY_TYPE_10GBASE_KR: 487 case I40E_PHY_TYPE_10GBASE_KX4: 488 case I40E_PHY_TYPE_1000BASE_KX: 489 supported |= SUPPORTED_40000baseKR4_Full | 490 SUPPORTED_20000baseKR2_Full | 491 SUPPORTED_10000baseKR_Full | 492 SUPPORTED_10000baseKX4_Full | 493 SUPPORTED_1000baseKX_Full | 494 SUPPORTED_Autoneg; 495 advertising |= ADVERTISED_40000baseKR4_Full | 496 ADVERTISED_20000baseKR2_Full | 497 ADVERTISED_10000baseKR_Full | 498 ADVERTISED_10000baseKX4_Full | 499 ADVERTISED_1000baseKX_Full | 500 ADVERTISED_Autoneg; 501 break; 502 case I40E_PHY_TYPE_25GBASE_KR: 503 case I40E_PHY_TYPE_25GBASE_CR: 504 case I40E_PHY_TYPE_25GBASE_SR: 505 case I40E_PHY_TYPE_25GBASE_LR: 506 supported = SUPPORTED_Autoneg; 507 advertising = ADVERTISED_Autoneg; 508 /* TODO: add speeds when ethtool is ready to support*/ 509 break; 510 default: 511 /* if we got here and link is up something bad is afoot */ 512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 513 hw_link_info->phy_type); 514 } 515 516 /* Now that we've worked out everything that could be supported by the 517 * current PHY type, get what is supported by the NVM and them to 518 * get what is truly supported 519 */ 520 i40e_phy_type_to_ethtool(pf, &e_supported, 521 &e_advertising); 522 523 supported = supported & e_supported; 524 advertising = advertising & e_advertising; 525 526 /* Set speed and duplex */ 527 switch (link_speed) { 528 case I40E_LINK_SPEED_40GB: 529 cmd->base.speed = SPEED_40000; 530 break; 531 case I40E_LINK_SPEED_25GB: 532 #ifdef SPEED_25000 533 cmd->base.speed = SPEED_25000; 534 #else 535 netdev_info(netdev, 536 "Speed is 25G, display not supported by this version of ethtool.\n"); 537 #endif 538 break; 539 case I40E_LINK_SPEED_20GB: 540 cmd->base.speed = SPEED_20000; 541 break; 542 case I40E_LINK_SPEED_10GB: 543 cmd->base.speed = SPEED_10000; 544 break; 545 case I40E_LINK_SPEED_1GB: 546 cmd->base.speed = SPEED_1000; 547 break; 548 case I40E_LINK_SPEED_100MB: 549 cmd->base.speed = SPEED_100; 550 break; 551 default: 552 break; 553 } 554 cmd->base.duplex = DUPLEX_FULL; 555 556 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 557 supported); 558 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 559 advertising); 560 } 561 562 /** 563 * i40e_get_settings_link_down - Get the Link settings for when link is down 564 * @hw: hw structure 565 * @ecmd: ethtool command to fill in 566 * 567 * Reports link settings that can be determined when link is down 568 **/ 569 static void i40e_get_settings_link_down(struct i40e_hw *hw, 570 struct ethtool_link_ksettings *cmd, 571 struct i40e_pf *pf) 572 { 573 u32 supported, advertising; 574 575 /* link is down and the driver needs to fall back on 576 * supported phy types to figure out what info to display 577 */ 578 i40e_phy_type_to_ethtool(pf, &supported, &advertising); 579 580 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 581 supported); 582 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 583 advertising); 584 585 /* With no link speed and duplex are unknown */ 586 cmd->base.speed = SPEED_UNKNOWN; 587 cmd->base.duplex = DUPLEX_UNKNOWN; 588 } 589 590 /** 591 * i40e_get_settings - Get Link Speed and Duplex settings 592 * @netdev: network interface device structure 593 * @ecmd: ethtool command 594 * 595 * Reports speed/duplex settings based on media_type 596 **/ 597 static int i40e_get_link_ksettings(struct net_device *netdev, 598 struct ethtool_link_ksettings *cmd) 599 { 600 struct i40e_netdev_priv *np = netdev_priv(netdev); 601 struct i40e_pf *pf = np->vsi->back; 602 struct i40e_hw *hw = &pf->hw; 603 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 604 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 605 u32 advertising; 606 607 if (link_up) 608 i40e_get_settings_link_up(hw, cmd, netdev, pf); 609 else 610 i40e_get_settings_link_down(hw, cmd, pf); 611 612 /* Now set the settings that don't rely on link being up/down */ 613 /* Set autoneg settings */ 614 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 615 AUTONEG_ENABLE : AUTONEG_DISABLE); 616 617 switch (hw->phy.media_type) { 618 case I40E_MEDIA_TYPE_BACKPLANE: 619 ethtool_link_ksettings_add_link_mode(cmd, supported, 620 Autoneg); 621 ethtool_link_ksettings_add_link_mode(cmd, supported, 622 Backplane); 623 ethtool_link_ksettings_add_link_mode(cmd, advertising, 624 Autoneg); 625 ethtool_link_ksettings_add_link_mode(cmd, advertising, 626 Backplane); 627 cmd->base.port = PORT_NONE; 628 break; 629 case I40E_MEDIA_TYPE_BASET: 630 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 631 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 632 cmd->base.port = PORT_TP; 633 break; 634 case I40E_MEDIA_TYPE_DA: 635 case I40E_MEDIA_TYPE_CX4: 636 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 637 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 638 cmd->base.port = PORT_DA; 639 break; 640 case I40E_MEDIA_TYPE_FIBER: 641 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 642 cmd->base.port = PORT_FIBRE; 643 break; 644 case I40E_MEDIA_TYPE_UNKNOWN: 645 default: 646 cmd->base.port = PORT_OTHER; 647 break; 648 } 649 650 /* Set flow control settings */ 651 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 652 653 switch (hw->fc.requested_mode) { 654 case I40E_FC_FULL: 655 ethtool_link_ksettings_add_link_mode(cmd, advertising, 656 Pause); 657 break; 658 case I40E_FC_TX_PAUSE: 659 ethtool_link_ksettings_add_link_mode(cmd, advertising, 660 Asym_Pause); 661 break; 662 case I40E_FC_RX_PAUSE: 663 ethtool_link_ksettings_add_link_mode(cmd, advertising, 664 Pause); 665 ethtool_link_ksettings_add_link_mode(cmd, advertising, 666 Asym_Pause); 667 break; 668 default: 669 ethtool_convert_link_mode_to_legacy_u32( 670 &advertising, cmd->link_modes.advertising); 671 672 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause); 673 674 ethtool_convert_legacy_u32_to_link_mode( 675 cmd->link_modes.advertising, advertising); 676 break; 677 } 678 679 return 0; 680 } 681 682 /** 683 * i40e_set_settings - Set Speed and Duplex 684 * @netdev: network interface device structure 685 * @ecmd: ethtool command 686 * 687 * Set speed/duplex per media_types advertised/forced 688 **/ 689 static int i40e_set_link_ksettings(struct net_device *netdev, 690 const struct ethtool_link_ksettings *cmd) 691 { 692 struct i40e_netdev_priv *np = netdev_priv(netdev); 693 struct i40e_aq_get_phy_abilities_resp abilities; 694 struct i40e_aq_set_phy_config config; 695 struct i40e_pf *pf = np->vsi->back; 696 struct i40e_vsi *vsi = np->vsi; 697 struct i40e_hw *hw = &pf->hw; 698 struct ethtool_link_ksettings safe_cmd; 699 struct ethtool_link_ksettings copy_cmd; 700 i40e_status status = 0; 701 bool change = false; 702 int timeout = 50; 703 int err = 0; 704 u32 autoneg; 705 u32 advertise; 706 u32 tmp; 707 708 /* Changing port settings is not supported if this isn't the 709 * port's controlling PF 710 */ 711 if (hw->partition_id != 1) { 712 i40e_partition_setting_complaint(pf); 713 return -EOPNOTSUPP; 714 } 715 716 if (vsi != pf->vsi[pf->lan_vsi]) 717 return -EOPNOTSUPP; 718 719 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 720 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 721 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 722 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 723 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 724 return -EOPNOTSUPP; 725 726 if (hw->device_id == I40E_DEV_ID_KX_B || 727 hw->device_id == I40E_DEV_ID_KX_C || 728 hw->device_id == I40E_DEV_ID_20G_KR2 || 729 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 730 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 731 return -EOPNOTSUPP; 732 } 733 734 /* copy the cmd to copy_cmd to avoid modifying the origin */ 735 memcpy(©_cmd, cmd, sizeof(struct ethtool_link_ksettings)); 736 737 /* get our own copy of the bits to check against */ 738 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings)); 739 i40e_get_link_ksettings(netdev, &safe_cmd); 740 741 /* save autoneg and speed out of cmd */ 742 autoneg = cmd->base.autoneg; 743 ethtool_convert_link_mode_to_legacy_u32(&advertise, 744 cmd->link_modes.advertising); 745 746 /* set autoneg and speed back to what they currently are */ 747 copy_cmd.base.autoneg = safe_cmd.base.autoneg; 748 ethtool_convert_link_mode_to_legacy_u32( 749 &tmp, safe_cmd.link_modes.advertising); 750 ethtool_convert_legacy_u32_to_link_mode( 751 copy_cmd.link_modes.advertising, tmp); 752 753 copy_cmd.base.cmd = safe_cmd.base.cmd; 754 755 /* If copy_cmd and safe_cmd are not the same now, then they are 756 * trying to set something that we do not support 757 */ 758 if (memcmp(©_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings))) 759 return -EOPNOTSUPP; 760 761 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 762 timeout--; 763 if (!timeout) 764 return -EBUSY; 765 usleep_range(1000, 2000); 766 } 767 768 /* Get the current phy config */ 769 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 770 NULL); 771 if (status) { 772 err = -EAGAIN; 773 goto done; 774 } 775 776 /* Copy abilities to config in case autoneg is not 777 * set below 778 */ 779 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 780 config.abilities = abilities.abilities; 781 782 /* Check autoneg */ 783 if (autoneg == AUTONEG_ENABLE) { 784 /* If autoneg was not already enabled */ 785 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 786 /* If autoneg is not supported, return error */ 787 if (!ethtool_link_ksettings_test_link_mode( 788 &safe_cmd, supported, Autoneg)) { 789 netdev_info(netdev, "Autoneg not supported on this phy\n"); 790 err = -EINVAL; 791 goto done; 792 } 793 /* Autoneg is allowed to change */ 794 config.abilities = abilities.abilities | 795 I40E_AQ_PHY_ENABLE_AN; 796 change = true; 797 } 798 } else { 799 /* If autoneg is currently enabled */ 800 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 801 /* If autoneg is supported 10GBASE_T is the only PHY 802 * that can disable it, so otherwise return error 803 */ 804 if (ethtool_link_ksettings_test_link_mode( 805 &safe_cmd, supported, Autoneg) && 806 hw->phy.link_info.phy_type != 807 I40E_PHY_TYPE_10GBASE_T) { 808 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 809 err = -EINVAL; 810 goto done; 811 } 812 /* Autoneg is allowed to change */ 813 config.abilities = abilities.abilities & 814 ~I40E_AQ_PHY_ENABLE_AN; 815 change = true; 816 } 817 } 818 819 ethtool_convert_link_mode_to_legacy_u32(&tmp, 820 safe_cmd.link_modes.supported); 821 if (advertise & ~tmp) { 822 err = -EINVAL; 823 goto done; 824 } 825 826 if (advertise & ADVERTISED_100baseT_Full) 827 config.link_speed |= I40E_LINK_SPEED_100MB; 828 if (advertise & ADVERTISED_1000baseT_Full || 829 advertise & ADVERTISED_1000baseKX_Full) 830 config.link_speed |= I40E_LINK_SPEED_1GB; 831 if (advertise & ADVERTISED_10000baseT_Full || 832 advertise & ADVERTISED_10000baseKX4_Full || 833 advertise & ADVERTISED_10000baseKR_Full) 834 config.link_speed |= I40E_LINK_SPEED_10GB; 835 if (advertise & ADVERTISED_20000baseKR2_Full) 836 config.link_speed |= I40E_LINK_SPEED_20GB; 837 if (advertise & ADVERTISED_40000baseKR4_Full || 838 advertise & ADVERTISED_40000baseCR4_Full || 839 advertise & ADVERTISED_40000baseSR4_Full || 840 advertise & ADVERTISED_40000baseLR4_Full) 841 config.link_speed |= I40E_LINK_SPEED_40GB; 842 843 /* If speed didn't get set, set it to what it currently is. 844 * This is needed because if advertise is 0 (as it is when autoneg 845 * is disabled) then speed won't get set. 846 */ 847 if (!config.link_speed) 848 config.link_speed = abilities.link_speed; 849 850 if (change || (abilities.link_speed != config.link_speed)) { 851 /* copy over the rest of the abilities */ 852 config.phy_type = abilities.phy_type; 853 config.phy_type_ext = abilities.phy_type_ext; 854 config.eee_capability = abilities.eee_capability; 855 config.eeer = abilities.eeer_val; 856 config.low_power_ctrl = abilities.d3_lpan; 857 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 858 I40E_AQ_PHY_FEC_CONFIG_MASK; 859 860 /* save the requested speeds */ 861 hw->phy.link_info.requested_speeds = config.link_speed; 862 /* set link and auto negotiation so changes take effect */ 863 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 864 /* If link is up put link down */ 865 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 866 /* Tell the OS link is going down, the link will go 867 * back up when fw says it is ready asynchronously 868 */ 869 i40e_print_link_message(vsi, false); 870 netif_carrier_off(netdev); 871 netif_tx_stop_all_queues(netdev); 872 } 873 874 /* make the aq call */ 875 status = i40e_aq_set_phy_config(hw, &config, NULL); 876 if (status) { 877 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n", 878 i40e_stat_str(hw, status), 879 i40e_aq_str(hw, hw->aq.asq_last_status)); 880 err = -EAGAIN; 881 goto done; 882 } 883 884 status = i40e_update_link_info(hw); 885 if (status) 886 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n", 887 i40e_stat_str(hw, status), 888 i40e_aq_str(hw, hw->aq.asq_last_status)); 889 890 } else { 891 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 892 } 893 894 done: 895 clear_bit(__I40E_CONFIG_BUSY, pf->state); 896 897 return err; 898 } 899 900 static int i40e_nway_reset(struct net_device *netdev) 901 { 902 /* restart autonegotiation */ 903 struct i40e_netdev_priv *np = netdev_priv(netdev); 904 struct i40e_pf *pf = np->vsi->back; 905 struct i40e_hw *hw = &pf->hw; 906 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 907 i40e_status ret = 0; 908 909 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 910 if (ret) { 911 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 912 i40e_stat_str(hw, ret), 913 i40e_aq_str(hw, hw->aq.asq_last_status)); 914 return -EIO; 915 } 916 917 return 0; 918 } 919 920 /** 921 * i40e_get_pauseparam - Get Flow Control status 922 * Return tx/rx-pause status 923 **/ 924 static void i40e_get_pauseparam(struct net_device *netdev, 925 struct ethtool_pauseparam *pause) 926 { 927 struct i40e_netdev_priv *np = netdev_priv(netdev); 928 struct i40e_pf *pf = np->vsi->back; 929 struct i40e_hw *hw = &pf->hw; 930 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 931 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 932 933 pause->autoneg = 934 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 935 AUTONEG_ENABLE : AUTONEG_DISABLE); 936 937 /* PFC enabled so report LFC as off */ 938 if (dcbx_cfg->pfc.pfcenable) { 939 pause->rx_pause = 0; 940 pause->tx_pause = 0; 941 return; 942 } 943 944 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 945 pause->rx_pause = 1; 946 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 947 pause->tx_pause = 1; 948 } else if (hw->fc.current_mode == I40E_FC_FULL) { 949 pause->rx_pause = 1; 950 pause->tx_pause = 1; 951 } 952 } 953 954 /** 955 * i40e_set_pauseparam - Set Flow Control parameter 956 * @netdev: network interface device structure 957 * @pause: return tx/rx flow control status 958 **/ 959 static int i40e_set_pauseparam(struct net_device *netdev, 960 struct ethtool_pauseparam *pause) 961 { 962 struct i40e_netdev_priv *np = netdev_priv(netdev); 963 struct i40e_pf *pf = np->vsi->back; 964 struct i40e_vsi *vsi = np->vsi; 965 struct i40e_hw *hw = &pf->hw; 966 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 967 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 968 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 969 i40e_status status; 970 u8 aq_failures; 971 int err = 0; 972 973 /* Changing the port's flow control is not supported if this isn't the 974 * port's controlling PF 975 */ 976 if (hw->partition_id != 1) { 977 i40e_partition_setting_complaint(pf); 978 return -EOPNOTSUPP; 979 } 980 981 if (vsi != pf->vsi[pf->lan_vsi]) 982 return -EOPNOTSUPP; 983 984 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 985 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 986 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 987 return -EOPNOTSUPP; 988 } 989 990 /* If we have link and don't have autoneg */ 991 if (!test_bit(__I40E_DOWN, pf->state) && 992 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 993 /* Send message that it might not necessarily work*/ 994 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 995 } 996 997 if (dcbx_cfg->pfc.pfcenable) { 998 netdev_info(netdev, 999 "Priority flow control enabled. Cannot set link flow control.\n"); 1000 return -EOPNOTSUPP; 1001 } 1002 1003 if (pause->rx_pause && pause->tx_pause) 1004 hw->fc.requested_mode = I40E_FC_FULL; 1005 else if (pause->rx_pause && !pause->tx_pause) 1006 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1007 else if (!pause->rx_pause && pause->tx_pause) 1008 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1009 else if (!pause->rx_pause && !pause->tx_pause) 1010 hw->fc.requested_mode = I40E_FC_NONE; 1011 else 1012 return -EINVAL; 1013 1014 /* Tell the OS link is going down, the link will go back up when fw 1015 * says it is ready asynchronously 1016 */ 1017 i40e_print_link_message(vsi, false); 1018 netif_carrier_off(netdev); 1019 netif_tx_stop_all_queues(netdev); 1020 1021 /* Set the fc mode and only restart an if link is up*/ 1022 status = i40e_set_fc(hw, &aq_failures, link_up); 1023 1024 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1025 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1026 i40e_stat_str(hw, status), 1027 i40e_aq_str(hw, hw->aq.asq_last_status)); 1028 err = -EAGAIN; 1029 } 1030 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1031 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1032 i40e_stat_str(hw, status), 1033 i40e_aq_str(hw, hw->aq.asq_last_status)); 1034 err = -EAGAIN; 1035 } 1036 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1037 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1038 i40e_stat_str(hw, status), 1039 i40e_aq_str(hw, hw->aq.asq_last_status)); 1040 err = -EAGAIN; 1041 } 1042 1043 if (!test_bit(__I40E_DOWN, pf->state)) { 1044 /* Give it a little more time to try to come back */ 1045 msleep(75); 1046 if (!test_bit(__I40E_DOWN, pf->state)) 1047 return i40e_nway_reset(netdev); 1048 } 1049 1050 return err; 1051 } 1052 1053 static u32 i40e_get_msglevel(struct net_device *netdev) 1054 { 1055 struct i40e_netdev_priv *np = netdev_priv(netdev); 1056 struct i40e_pf *pf = np->vsi->back; 1057 u32 debug_mask = pf->hw.debug_mask; 1058 1059 if (debug_mask) 1060 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1061 1062 return pf->msg_enable; 1063 } 1064 1065 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1066 { 1067 struct i40e_netdev_priv *np = netdev_priv(netdev); 1068 struct i40e_pf *pf = np->vsi->back; 1069 1070 if (I40E_DEBUG_USER & data) 1071 pf->hw.debug_mask = data; 1072 else 1073 pf->msg_enable = data; 1074 } 1075 1076 static int i40e_get_regs_len(struct net_device *netdev) 1077 { 1078 int reg_count = 0; 1079 int i; 1080 1081 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1082 reg_count += i40e_reg_list[i].elements; 1083 1084 return reg_count * sizeof(u32); 1085 } 1086 1087 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1088 void *p) 1089 { 1090 struct i40e_netdev_priv *np = netdev_priv(netdev); 1091 struct i40e_pf *pf = np->vsi->back; 1092 struct i40e_hw *hw = &pf->hw; 1093 u32 *reg_buf = p; 1094 int i, j, ri; 1095 u32 reg; 1096 1097 /* Tell ethtool which driver-version-specific regs output we have. 1098 * 1099 * At some point, if we have ethtool doing special formatting of 1100 * this data, it will rely on this version number to know how to 1101 * interpret things. Hence, this needs to be updated if/when the 1102 * diags register table is changed. 1103 */ 1104 regs->version = 1; 1105 1106 /* loop through the diags reg table for what to print */ 1107 ri = 0; 1108 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1109 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1110 reg = i40e_reg_list[i].offset 1111 + (j * i40e_reg_list[i].stride); 1112 reg_buf[ri++] = rd32(hw, reg); 1113 } 1114 } 1115 1116 } 1117 1118 static int i40e_get_eeprom(struct net_device *netdev, 1119 struct ethtool_eeprom *eeprom, u8 *bytes) 1120 { 1121 struct i40e_netdev_priv *np = netdev_priv(netdev); 1122 struct i40e_hw *hw = &np->vsi->back->hw; 1123 struct i40e_pf *pf = np->vsi->back; 1124 int ret_val = 0, len, offset; 1125 u8 *eeprom_buff; 1126 u16 i, sectors; 1127 bool last; 1128 u32 magic; 1129 1130 #define I40E_NVM_SECTOR_SIZE 4096 1131 if (eeprom->len == 0) 1132 return -EINVAL; 1133 1134 /* check for NVMUpdate access method */ 1135 magic = hw->vendor_id | (hw->device_id << 16); 1136 if (eeprom->magic && eeprom->magic != magic) { 1137 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1138 int errno = 0; 1139 1140 /* make sure it is the right magic for NVMUpdate */ 1141 if ((eeprom->magic >> 16) != hw->device_id) 1142 errno = -EINVAL; 1143 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1144 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1145 errno = -EBUSY; 1146 else 1147 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1148 1149 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1150 dev_info(&pf->pdev->dev, 1151 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1152 ret_val, hw->aq.asq_last_status, errno, 1153 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1154 cmd->offset, cmd->data_size); 1155 1156 return errno; 1157 } 1158 1159 /* normal ethtool get_eeprom support */ 1160 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1161 1162 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1163 if (!eeprom_buff) 1164 return -ENOMEM; 1165 1166 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1167 if (ret_val) { 1168 dev_info(&pf->pdev->dev, 1169 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1170 ret_val, hw->aq.asq_last_status); 1171 goto free_buff; 1172 } 1173 1174 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1175 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1176 len = I40E_NVM_SECTOR_SIZE; 1177 last = false; 1178 for (i = 0; i < sectors; i++) { 1179 if (i == (sectors - 1)) { 1180 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1181 last = true; 1182 } 1183 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1184 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1185 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1186 last, NULL); 1187 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1188 dev_info(&pf->pdev->dev, 1189 "read NVM failed, invalid offset 0x%x\n", 1190 offset); 1191 break; 1192 } else if (ret_val && 1193 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1194 dev_info(&pf->pdev->dev, 1195 "read NVM failed, access, offset 0x%x\n", 1196 offset); 1197 break; 1198 } else if (ret_val) { 1199 dev_info(&pf->pdev->dev, 1200 "read NVM failed offset %d err=%d status=0x%x\n", 1201 offset, ret_val, hw->aq.asq_last_status); 1202 break; 1203 } 1204 } 1205 1206 i40e_release_nvm(hw); 1207 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1208 free_buff: 1209 kfree(eeprom_buff); 1210 return ret_val; 1211 } 1212 1213 static int i40e_get_eeprom_len(struct net_device *netdev) 1214 { 1215 struct i40e_netdev_priv *np = netdev_priv(netdev); 1216 struct i40e_hw *hw = &np->vsi->back->hw; 1217 u32 val; 1218 1219 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1220 if (hw->mac.type == I40E_MAC_X722) { 1221 val = X722_EEPROM_SCOPE_LIMIT + 1; 1222 return val; 1223 } 1224 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1225 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1226 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1227 /* register returns value in power of 2, 64Kbyte chunks. */ 1228 val = (64 * 1024) * BIT(val); 1229 return val; 1230 } 1231 1232 static int i40e_set_eeprom(struct net_device *netdev, 1233 struct ethtool_eeprom *eeprom, u8 *bytes) 1234 { 1235 struct i40e_netdev_priv *np = netdev_priv(netdev); 1236 struct i40e_hw *hw = &np->vsi->back->hw; 1237 struct i40e_pf *pf = np->vsi->back; 1238 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1239 int ret_val = 0; 1240 int errno = 0; 1241 u32 magic; 1242 1243 /* normal ethtool set_eeprom is not supported */ 1244 magic = hw->vendor_id | (hw->device_id << 16); 1245 if (eeprom->magic == magic) 1246 errno = -EOPNOTSUPP; 1247 /* check for NVMUpdate access method */ 1248 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1249 errno = -EINVAL; 1250 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1251 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1252 errno = -EBUSY; 1253 else 1254 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1255 1256 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1257 dev_info(&pf->pdev->dev, 1258 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1259 ret_val, hw->aq.asq_last_status, errno, 1260 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1261 cmd->offset, cmd->data_size); 1262 1263 return errno; 1264 } 1265 1266 static void i40e_get_drvinfo(struct net_device *netdev, 1267 struct ethtool_drvinfo *drvinfo) 1268 { 1269 struct i40e_netdev_priv *np = netdev_priv(netdev); 1270 struct i40e_vsi *vsi = np->vsi; 1271 struct i40e_pf *pf = vsi->back; 1272 1273 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1274 strlcpy(drvinfo->version, i40e_driver_version_str, 1275 sizeof(drvinfo->version)); 1276 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1277 sizeof(drvinfo->fw_version)); 1278 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1279 sizeof(drvinfo->bus_info)); 1280 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1281 if (pf->hw.pf_id == 0) 1282 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1283 } 1284 1285 static void i40e_get_ringparam(struct net_device *netdev, 1286 struct ethtool_ringparam *ring) 1287 { 1288 struct i40e_netdev_priv *np = netdev_priv(netdev); 1289 struct i40e_pf *pf = np->vsi->back; 1290 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1291 1292 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1293 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1294 ring->rx_mini_max_pending = 0; 1295 ring->rx_jumbo_max_pending = 0; 1296 ring->rx_pending = vsi->rx_rings[0]->count; 1297 ring->tx_pending = vsi->tx_rings[0]->count; 1298 ring->rx_mini_pending = 0; 1299 ring->rx_jumbo_pending = 0; 1300 } 1301 1302 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1303 { 1304 if (i40e_enabled_xdp_vsi(vsi)) { 1305 return index < vsi->num_queue_pairs || 1306 (index >= vsi->alloc_queue_pairs && 1307 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1308 } 1309 1310 return index < vsi->num_queue_pairs; 1311 } 1312 1313 static int i40e_set_ringparam(struct net_device *netdev, 1314 struct ethtool_ringparam *ring) 1315 { 1316 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1317 struct i40e_netdev_priv *np = netdev_priv(netdev); 1318 struct i40e_hw *hw = &np->vsi->back->hw; 1319 struct i40e_vsi *vsi = np->vsi; 1320 struct i40e_pf *pf = vsi->back; 1321 u32 new_rx_count, new_tx_count; 1322 u16 tx_alloc_queue_pairs; 1323 int timeout = 50; 1324 int i, err = 0; 1325 1326 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1327 return -EINVAL; 1328 1329 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1330 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1331 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1332 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1333 netdev_info(netdev, 1334 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1335 ring->tx_pending, ring->rx_pending, 1336 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1337 return -EINVAL; 1338 } 1339 1340 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1341 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1342 1343 /* if nothing to do return success */ 1344 if ((new_tx_count == vsi->tx_rings[0]->count) && 1345 (new_rx_count == vsi->rx_rings[0]->count)) 1346 return 0; 1347 1348 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1349 timeout--; 1350 if (!timeout) 1351 return -EBUSY; 1352 usleep_range(1000, 2000); 1353 } 1354 1355 if (!netif_running(vsi->netdev)) { 1356 /* simple case - set for the next time the netdev is started */ 1357 for (i = 0; i < vsi->num_queue_pairs; i++) { 1358 vsi->tx_rings[i]->count = new_tx_count; 1359 vsi->rx_rings[i]->count = new_rx_count; 1360 if (i40e_enabled_xdp_vsi(vsi)) 1361 vsi->xdp_rings[i]->count = new_tx_count; 1362 } 1363 goto done; 1364 } 1365 1366 /* We can't just free everything and then setup again, 1367 * because the ISRs in MSI-X mode get passed pointers 1368 * to the Tx and Rx ring structs. 1369 */ 1370 1371 /* alloc updated Tx and XDP Tx resources */ 1372 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1373 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1374 if (new_tx_count != vsi->tx_rings[0]->count) { 1375 netdev_info(netdev, 1376 "Changing Tx descriptor count from %d to %d.\n", 1377 vsi->tx_rings[0]->count, new_tx_count); 1378 tx_rings = kcalloc(tx_alloc_queue_pairs, 1379 sizeof(struct i40e_ring), GFP_KERNEL); 1380 if (!tx_rings) { 1381 err = -ENOMEM; 1382 goto done; 1383 } 1384 1385 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1386 if (!i40e_active_tx_ring_index(vsi, i)) 1387 continue; 1388 1389 tx_rings[i] = *vsi->tx_rings[i]; 1390 tx_rings[i].count = new_tx_count; 1391 /* the desc and bi pointers will be reallocated in the 1392 * setup call 1393 */ 1394 tx_rings[i].desc = NULL; 1395 tx_rings[i].rx_bi = NULL; 1396 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1397 if (err) { 1398 while (i) { 1399 i--; 1400 if (!i40e_active_tx_ring_index(vsi, i)) 1401 continue; 1402 i40e_free_tx_resources(&tx_rings[i]); 1403 } 1404 kfree(tx_rings); 1405 tx_rings = NULL; 1406 1407 goto done; 1408 } 1409 } 1410 } 1411 1412 /* alloc updated Rx resources */ 1413 if (new_rx_count != vsi->rx_rings[0]->count) { 1414 netdev_info(netdev, 1415 "Changing Rx descriptor count from %d to %d\n", 1416 vsi->rx_rings[0]->count, new_rx_count); 1417 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1418 sizeof(struct i40e_ring), GFP_KERNEL); 1419 if (!rx_rings) { 1420 err = -ENOMEM; 1421 goto free_tx; 1422 } 1423 1424 for (i = 0; i < vsi->num_queue_pairs; i++) { 1425 struct i40e_ring *ring; 1426 u16 unused; 1427 1428 /* clone ring and setup updated count */ 1429 rx_rings[i] = *vsi->rx_rings[i]; 1430 rx_rings[i].count = new_rx_count; 1431 /* the desc and bi pointers will be reallocated in the 1432 * setup call 1433 */ 1434 rx_rings[i].desc = NULL; 1435 rx_rings[i].rx_bi = NULL; 1436 /* this is to allow wr32 to have something to write to 1437 * during early allocation of Rx buffers 1438 */ 1439 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1440 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1441 if (err) 1442 goto rx_unwind; 1443 1444 /* now allocate the Rx buffers to make sure the OS 1445 * has enough memory, any failure here means abort 1446 */ 1447 ring = &rx_rings[i]; 1448 unused = I40E_DESC_UNUSED(ring); 1449 err = i40e_alloc_rx_buffers(ring, unused); 1450 rx_unwind: 1451 if (err) { 1452 do { 1453 i40e_free_rx_resources(&rx_rings[i]); 1454 } while (i--); 1455 kfree(rx_rings); 1456 rx_rings = NULL; 1457 1458 goto free_tx; 1459 } 1460 } 1461 } 1462 1463 /* Bring interface down, copy in the new ring info, 1464 * then restore the interface 1465 */ 1466 i40e_down(vsi); 1467 1468 if (tx_rings) { 1469 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1470 if (i40e_active_tx_ring_index(vsi, i)) { 1471 i40e_free_tx_resources(vsi->tx_rings[i]); 1472 *vsi->tx_rings[i] = tx_rings[i]; 1473 } 1474 } 1475 kfree(tx_rings); 1476 tx_rings = NULL; 1477 } 1478 1479 if (rx_rings) { 1480 for (i = 0; i < vsi->num_queue_pairs; i++) { 1481 i40e_free_rx_resources(vsi->rx_rings[i]); 1482 /* get the real tail offset */ 1483 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1484 /* this is to fake out the allocation routine 1485 * into thinking it has to realloc everything 1486 * but the recycling logic will let us re-use 1487 * the buffers allocated above 1488 */ 1489 rx_rings[i].next_to_use = 0; 1490 rx_rings[i].next_to_clean = 0; 1491 rx_rings[i].next_to_alloc = 0; 1492 /* do a struct copy */ 1493 *vsi->rx_rings[i] = rx_rings[i]; 1494 } 1495 kfree(rx_rings); 1496 rx_rings = NULL; 1497 } 1498 1499 i40e_up(vsi); 1500 1501 free_tx: 1502 /* error cleanup if the Rx allocations failed after getting Tx */ 1503 if (tx_rings) { 1504 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1505 if (i40e_active_tx_ring_index(vsi, i)) 1506 i40e_free_tx_resources(vsi->tx_rings[i]); 1507 } 1508 kfree(tx_rings); 1509 tx_rings = NULL; 1510 } 1511 1512 done: 1513 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1514 1515 return err; 1516 } 1517 1518 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1519 { 1520 struct i40e_netdev_priv *np = netdev_priv(netdev); 1521 struct i40e_vsi *vsi = np->vsi; 1522 struct i40e_pf *pf = vsi->back; 1523 1524 switch (sset) { 1525 case ETH_SS_TEST: 1526 return I40E_TEST_LEN; 1527 case ETH_SS_STATS: 1528 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1529 int len = I40E_PF_STATS_LEN(netdev); 1530 1531 if ((pf->lan_veb != I40E_NO_VEB) && 1532 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1533 len += I40E_VEB_STATS_TOTAL; 1534 return len; 1535 } else { 1536 return I40E_VSI_STATS_LEN(netdev); 1537 } 1538 case ETH_SS_PRIV_FLAGS: 1539 return I40E_PRIV_FLAGS_STR_LEN + 1540 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1541 default: 1542 return -EOPNOTSUPP; 1543 } 1544 } 1545 1546 static void i40e_get_ethtool_stats(struct net_device *netdev, 1547 struct ethtool_stats *stats, u64 *data) 1548 { 1549 struct i40e_netdev_priv *np = netdev_priv(netdev); 1550 struct i40e_ring *tx_ring, *rx_ring; 1551 struct i40e_vsi *vsi = np->vsi; 1552 struct i40e_pf *pf = vsi->back; 1553 int i = 0; 1554 char *p; 1555 int j; 1556 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1557 unsigned int start; 1558 1559 i40e_update_stats(vsi); 1560 1561 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1562 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1563 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1564 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1565 } 1566 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1567 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1568 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1569 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1570 } 1571 rcu_read_lock(); 1572 for (j = 0; j < vsi->num_queue_pairs; j++) { 1573 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); 1574 1575 if (!tx_ring) 1576 continue; 1577 1578 /* process Tx ring statistics */ 1579 do { 1580 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1581 data[i] = tx_ring->stats.packets; 1582 data[i + 1] = tx_ring->stats.bytes; 1583 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1584 i += 2; 1585 1586 /* Rx ring is the 2nd half of the queue pair */ 1587 rx_ring = &tx_ring[1]; 1588 do { 1589 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1590 data[i] = rx_ring->stats.packets; 1591 data[i + 1] = rx_ring->stats.bytes; 1592 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1593 i += 2; 1594 } 1595 rcu_read_unlock(); 1596 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1597 return; 1598 1599 if ((pf->lan_veb != I40E_NO_VEB) && 1600 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1601 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1602 1603 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1604 p = (char *)veb; 1605 p += i40e_gstrings_veb_stats[j].stat_offset; 1606 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1607 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1608 } 1609 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1610 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1611 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1612 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1613 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1614 } 1615 } 1616 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1617 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1618 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1619 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1620 } 1621 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1622 data[i++] = pf->stats.priority_xon_tx[j]; 1623 data[i++] = pf->stats.priority_xoff_tx[j]; 1624 } 1625 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1626 data[i++] = pf->stats.priority_xon_rx[j]; 1627 data[i++] = pf->stats.priority_xoff_rx[j]; 1628 } 1629 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1630 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1631 } 1632 1633 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1634 u8 *data) 1635 { 1636 struct i40e_netdev_priv *np = netdev_priv(netdev); 1637 struct i40e_vsi *vsi = np->vsi; 1638 struct i40e_pf *pf = vsi->back; 1639 char *p = (char *)data; 1640 int i; 1641 1642 switch (stringset) { 1643 case ETH_SS_TEST: 1644 memcpy(data, i40e_gstrings_test, 1645 I40E_TEST_LEN * ETH_GSTRING_LEN); 1646 break; 1647 case ETH_SS_STATS: 1648 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1649 snprintf(p, ETH_GSTRING_LEN, "%s", 1650 i40e_gstrings_net_stats[i].stat_string); 1651 p += ETH_GSTRING_LEN; 1652 } 1653 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1654 snprintf(p, ETH_GSTRING_LEN, "%s", 1655 i40e_gstrings_misc_stats[i].stat_string); 1656 p += ETH_GSTRING_LEN; 1657 } 1658 for (i = 0; i < vsi->num_queue_pairs; i++) { 1659 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1660 p += ETH_GSTRING_LEN; 1661 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1662 p += ETH_GSTRING_LEN; 1663 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1664 p += ETH_GSTRING_LEN; 1665 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1666 p += ETH_GSTRING_LEN; 1667 } 1668 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1669 return; 1670 1671 if ((pf->lan_veb != I40E_NO_VEB) && 1672 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1673 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1674 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1675 i40e_gstrings_veb_stats[i].stat_string); 1676 p += ETH_GSTRING_LEN; 1677 } 1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1679 snprintf(p, ETH_GSTRING_LEN, 1680 "veb.tc_%d_tx_packets", i); 1681 p += ETH_GSTRING_LEN; 1682 snprintf(p, ETH_GSTRING_LEN, 1683 "veb.tc_%d_tx_bytes", i); 1684 p += ETH_GSTRING_LEN; 1685 snprintf(p, ETH_GSTRING_LEN, 1686 "veb.tc_%d_rx_packets", i); 1687 p += ETH_GSTRING_LEN; 1688 snprintf(p, ETH_GSTRING_LEN, 1689 "veb.tc_%d_rx_bytes", i); 1690 p += ETH_GSTRING_LEN; 1691 } 1692 } 1693 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1694 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1695 i40e_gstrings_stats[i].stat_string); 1696 p += ETH_GSTRING_LEN; 1697 } 1698 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1699 snprintf(p, ETH_GSTRING_LEN, 1700 "port.tx_priority_%d_xon", i); 1701 p += ETH_GSTRING_LEN; 1702 snprintf(p, ETH_GSTRING_LEN, 1703 "port.tx_priority_%d_xoff", i); 1704 p += ETH_GSTRING_LEN; 1705 } 1706 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1707 snprintf(p, ETH_GSTRING_LEN, 1708 "port.rx_priority_%d_xon", i); 1709 p += ETH_GSTRING_LEN; 1710 snprintf(p, ETH_GSTRING_LEN, 1711 "port.rx_priority_%d_xoff", i); 1712 p += ETH_GSTRING_LEN; 1713 } 1714 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1715 snprintf(p, ETH_GSTRING_LEN, 1716 "port.rx_priority_%d_xon_2_xoff", i); 1717 p += ETH_GSTRING_LEN; 1718 } 1719 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1720 break; 1721 case ETH_SS_PRIV_FLAGS: 1722 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1723 snprintf(p, ETH_GSTRING_LEN, "%s", 1724 i40e_gstrings_priv_flags[i].flag_string); 1725 p += ETH_GSTRING_LEN; 1726 } 1727 if (pf->hw.pf_id != 0) 1728 break; 1729 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1730 snprintf(p, ETH_GSTRING_LEN, "%s", 1731 i40e_gl_gstrings_priv_flags[i].flag_string); 1732 p += ETH_GSTRING_LEN; 1733 } 1734 break; 1735 default: 1736 break; 1737 } 1738 } 1739 1740 static int i40e_get_ts_info(struct net_device *dev, 1741 struct ethtool_ts_info *info) 1742 { 1743 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1744 1745 /* only report HW timestamping if PTP is enabled */ 1746 if (!(pf->flags & I40E_FLAG_PTP)) 1747 return ethtool_op_get_ts_info(dev, info); 1748 1749 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1750 SOF_TIMESTAMPING_RX_SOFTWARE | 1751 SOF_TIMESTAMPING_SOFTWARE | 1752 SOF_TIMESTAMPING_TX_HARDWARE | 1753 SOF_TIMESTAMPING_RX_HARDWARE | 1754 SOF_TIMESTAMPING_RAW_HARDWARE; 1755 1756 if (pf->ptp_clock) 1757 info->phc_index = ptp_clock_index(pf->ptp_clock); 1758 else 1759 info->phc_index = -1; 1760 1761 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1762 1763 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1764 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1765 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1766 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1767 1768 if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE) 1769 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1770 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1771 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1772 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1773 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1774 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1775 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1776 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1777 1778 return 0; 1779 } 1780 1781 static int i40e_link_test(struct net_device *netdev, u64 *data) 1782 { 1783 struct i40e_netdev_priv *np = netdev_priv(netdev); 1784 struct i40e_pf *pf = np->vsi->back; 1785 i40e_status status; 1786 bool link_up = false; 1787 1788 netif_info(pf, hw, netdev, "link test\n"); 1789 status = i40e_get_link_status(&pf->hw, &link_up); 1790 if (status) { 1791 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1792 *data = 1; 1793 return *data; 1794 } 1795 1796 if (link_up) 1797 *data = 0; 1798 else 1799 *data = 1; 1800 1801 return *data; 1802 } 1803 1804 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1805 { 1806 struct i40e_netdev_priv *np = netdev_priv(netdev); 1807 struct i40e_pf *pf = np->vsi->back; 1808 1809 netif_info(pf, hw, netdev, "register test\n"); 1810 *data = i40e_diag_reg_test(&pf->hw); 1811 1812 return *data; 1813 } 1814 1815 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1816 { 1817 struct i40e_netdev_priv *np = netdev_priv(netdev); 1818 struct i40e_pf *pf = np->vsi->back; 1819 1820 netif_info(pf, hw, netdev, "eeprom test\n"); 1821 *data = i40e_diag_eeprom_test(&pf->hw); 1822 1823 /* forcebly clear the NVM Update state machine */ 1824 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1825 1826 return *data; 1827 } 1828 1829 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1830 { 1831 struct i40e_netdev_priv *np = netdev_priv(netdev); 1832 struct i40e_pf *pf = np->vsi->back; 1833 u16 swc_old = pf->sw_int_count; 1834 1835 netif_info(pf, hw, netdev, "interrupt test\n"); 1836 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1837 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1838 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1839 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1840 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1841 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1842 usleep_range(1000, 2000); 1843 *data = (swc_old == pf->sw_int_count); 1844 1845 return *data; 1846 } 1847 1848 static inline bool i40e_active_vfs(struct i40e_pf *pf) 1849 { 1850 struct i40e_vf *vfs = pf->vf; 1851 int i; 1852 1853 for (i = 0; i < pf->num_alloc_vfs; i++) 1854 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 1855 return true; 1856 return false; 1857 } 1858 1859 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 1860 { 1861 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 1862 } 1863 1864 static void i40e_diag_test(struct net_device *netdev, 1865 struct ethtool_test *eth_test, u64 *data) 1866 { 1867 struct i40e_netdev_priv *np = netdev_priv(netdev); 1868 bool if_running = netif_running(netdev); 1869 struct i40e_pf *pf = np->vsi->back; 1870 1871 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 1872 /* Offline tests */ 1873 netif_info(pf, drv, netdev, "offline testing starting\n"); 1874 1875 set_bit(__I40E_TESTING, pf->state); 1876 1877 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 1878 dev_warn(&pf->pdev->dev, 1879 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 1880 data[I40E_ETH_TEST_REG] = 1; 1881 data[I40E_ETH_TEST_EEPROM] = 1; 1882 data[I40E_ETH_TEST_INTR] = 1; 1883 data[I40E_ETH_TEST_LINK] = 1; 1884 eth_test->flags |= ETH_TEST_FL_FAILED; 1885 clear_bit(__I40E_TESTING, pf->state); 1886 goto skip_ol_tests; 1887 } 1888 1889 /* If the device is online then take it offline */ 1890 if (if_running) 1891 /* indicate we're in test mode */ 1892 i40e_close(netdev); 1893 else 1894 /* This reset does not affect link - if it is 1895 * changed to a type of reset that does affect 1896 * link then the following link test would have 1897 * to be moved to before the reset 1898 */ 1899 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1900 1901 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1902 eth_test->flags |= ETH_TEST_FL_FAILED; 1903 1904 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 1905 eth_test->flags |= ETH_TEST_FL_FAILED; 1906 1907 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 1908 eth_test->flags |= ETH_TEST_FL_FAILED; 1909 1910 /* run reg test last, a reset is required after it */ 1911 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 1912 eth_test->flags |= ETH_TEST_FL_FAILED; 1913 1914 clear_bit(__I40E_TESTING, pf->state); 1915 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1916 1917 if (if_running) 1918 i40e_open(netdev); 1919 } else { 1920 /* Online tests */ 1921 netif_info(pf, drv, netdev, "online testing starting\n"); 1922 1923 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1924 eth_test->flags |= ETH_TEST_FL_FAILED; 1925 1926 /* Offline only tests, not run in online; pass by default */ 1927 data[I40E_ETH_TEST_REG] = 0; 1928 data[I40E_ETH_TEST_EEPROM] = 0; 1929 data[I40E_ETH_TEST_INTR] = 0; 1930 } 1931 1932 skip_ol_tests: 1933 1934 netif_info(pf, drv, netdev, "testing finished\n"); 1935 } 1936 1937 static void i40e_get_wol(struct net_device *netdev, 1938 struct ethtool_wolinfo *wol) 1939 { 1940 struct i40e_netdev_priv *np = netdev_priv(netdev); 1941 struct i40e_pf *pf = np->vsi->back; 1942 struct i40e_hw *hw = &pf->hw; 1943 u16 wol_nvm_bits; 1944 1945 /* NVM bit on means WoL disabled for the port */ 1946 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1947 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 1948 wol->supported = 0; 1949 wol->wolopts = 0; 1950 } else { 1951 wol->supported = WAKE_MAGIC; 1952 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 1953 } 1954 } 1955 1956 /** 1957 * i40e_set_wol - set the WakeOnLAN configuration 1958 * @netdev: the netdev in question 1959 * @wol: the ethtool WoL setting data 1960 **/ 1961 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 1962 { 1963 struct i40e_netdev_priv *np = netdev_priv(netdev); 1964 struct i40e_pf *pf = np->vsi->back; 1965 struct i40e_vsi *vsi = np->vsi; 1966 struct i40e_hw *hw = &pf->hw; 1967 u16 wol_nvm_bits; 1968 1969 /* WoL not supported if this isn't the controlling PF on the port */ 1970 if (hw->partition_id != 1) { 1971 i40e_partition_setting_complaint(pf); 1972 return -EOPNOTSUPP; 1973 } 1974 1975 if (vsi != pf->vsi[pf->lan_vsi]) 1976 return -EOPNOTSUPP; 1977 1978 /* NVM bit on means WoL disabled for the port */ 1979 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1980 if (BIT(hw->port) & wol_nvm_bits) 1981 return -EOPNOTSUPP; 1982 1983 /* only magic packet is supported */ 1984 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 1985 return -EOPNOTSUPP; 1986 1987 /* is this a new value? */ 1988 if (pf->wol_en != !!wol->wolopts) { 1989 pf->wol_en = !!wol->wolopts; 1990 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 1991 } 1992 1993 return 0; 1994 } 1995 1996 static int i40e_set_phys_id(struct net_device *netdev, 1997 enum ethtool_phys_id_state state) 1998 { 1999 struct i40e_netdev_priv *np = netdev_priv(netdev); 2000 i40e_status ret = 0; 2001 struct i40e_pf *pf = np->vsi->back; 2002 struct i40e_hw *hw = &pf->hw; 2003 int blink_freq = 2; 2004 u16 temp_status; 2005 2006 switch (state) { 2007 case ETHTOOL_ID_ACTIVE: 2008 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 2009 pf->led_status = i40e_led_get(hw); 2010 } else { 2011 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL); 2012 ret = i40e_led_get_phy(hw, &temp_status, 2013 &pf->phy_led_val); 2014 pf->led_status = temp_status; 2015 } 2016 return blink_freq; 2017 case ETHTOOL_ID_ON: 2018 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 2019 i40e_led_set(hw, 0xf, false); 2020 else 2021 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2022 break; 2023 case ETHTOOL_ID_OFF: 2024 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 2025 i40e_led_set(hw, 0x0, false); 2026 else 2027 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2028 break; 2029 case ETHTOOL_ID_INACTIVE: 2030 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 2031 i40e_led_set(hw, pf->led_status, false); 2032 } else { 2033 ret = i40e_led_set_phy(hw, false, pf->led_status, 2034 (pf->phy_led_val | 2035 I40E_PHY_LED_MODE_ORIG)); 2036 i40e_aq_set_phy_debug(hw, 0, NULL); 2037 } 2038 break; 2039 default: 2040 break; 2041 } 2042 if (ret) 2043 return -ENOENT; 2044 else 2045 return 0; 2046 } 2047 2048 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2049 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2050 * 125us (8000 interrupts per second) == ITR(62) 2051 */ 2052 2053 /** 2054 * __i40e_get_coalesce - get per-queue coalesce settings 2055 * @netdev: the netdev to check 2056 * @ec: ethtool coalesce data structure 2057 * @queue: which queue to pick 2058 * 2059 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2060 * are per queue. If queue is <0 then we default to queue 0 as the 2061 * representative value. 2062 **/ 2063 static int __i40e_get_coalesce(struct net_device *netdev, 2064 struct ethtool_coalesce *ec, 2065 int queue) 2066 { 2067 struct i40e_netdev_priv *np = netdev_priv(netdev); 2068 struct i40e_ring *rx_ring, *tx_ring; 2069 struct i40e_vsi *vsi = np->vsi; 2070 2071 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2072 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2073 2074 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2075 * return queue 0's value to represent. 2076 */ 2077 if (queue < 0) { 2078 queue = 0; 2079 } else if (queue >= vsi->num_queue_pairs) { 2080 return -EINVAL; 2081 } 2082 2083 rx_ring = vsi->rx_rings[queue]; 2084 tx_ring = vsi->tx_rings[queue]; 2085 2086 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2087 ec->use_adaptive_rx_coalesce = 1; 2088 2089 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2090 ec->use_adaptive_tx_coalesce = 1; 2091 2092 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2093 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2094 2095 2096 /* we use the _usecs_high to store/set the interrupt rate limit 2097 * that the hardware supports, that almost but not quite 2098 * fits the original intent of the ethtool variable, 2099 * the rx_coalesce_usecs_high limits total interrupts 2100 * per second from both tx/rx sources. 2101 */ 2102 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2103 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2104 2105 return 0; 2106 } 2107 2108 /** 2109 * i40e_get_coalesce - get a netdev's coalesce settings 2110 * @netdev: the netdev to check 2111 * @ec: ethtool coalesce data structure 2112 * 2113 * Gets the coalesce settings for a particular netdev. Note that if user has 2114 * modified per-queue settings, this only guarantees to represent queue 0. See 2115 * __i40e_get_coalesce for more details. 2116 **/ 2117 static int i40e_get_coalesce(struct net_device *netdev, 2118 struct ethtool_coalesce *ec) 2119 { 2120 return __i40e_get_coalesce(netdev, ec, -1); 2121 } 2122 2123 /** 2124 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2125 * @netdev: netdev structure 2126 * @ec: ethtool's coalesce settings 2127 * @queue: the particular queue to read 2128 * 2129 * Will read a specific queue's coalesce settings 2130 **/ 2131 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2132 struct ethtool_coalesce *ec) 2133 { 2134 return __i40e_get_coalesce(netdev, ec, queue); 2135 } 2136 2137 /** 2138 * i40e_set_itr_per_queue - set ITR values for specific queue 2139 * @vsi: the VSI to set values for 2140 * @ec: coalesce settings from ethtool 2141 * @queue: the queue to modify 2142 * 2143 * Change the ITR settings for a specific queue. 2144 **/ 2145 2146 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2147 struct ethtool_coalesce *ec, 2148 int queue) 2149 { 2150 struct i40e_pf *pf = vsi->back; 2151 struct i40e_hw *hw = &pf->hw; 2152 struct i40e_q_vector *q_vector; 2153 u16 vector, intrl; 2154 2155 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2156 2157 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; 2158 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; 2159 2160 if (ec->use_adaptive_rx_coalesce) 2161 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; 2162 else 2163 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2164 2165 if (ec->use_adaptive_tx_coalesce) 2166 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; 2167 else 2168 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2169 2170 q_vector = vsi->rx_rings[queue]->q_vector; 2171 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); 2172 vector = vsi->base_vector + q_vector->v_idx; 2173 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2174 2175 q_vector = vsi->tx_rings[queue]->q_vector; 2176 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); 2177 vector = vsi->base_vector + q_vector->v_idx; 2178 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2179 2180 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2181 i40e_flush(hw); 2182 } 2183 2184 /** 2185 * __i40e_set_coalesce - set coalesce settings for particular queue 2186 * @netdev: the netdev to change 2187 * @ec: ethtool coalesce settings 2188 * @queue: the queue to change 2189 * 2190 * Sets the coalesce settings for a particular queue. 2191 **/ 2192 static int __i40e_set_coalesce(struct net_device *netdev, 2193 struct ethtool_coalesce *ec, 2194 int queue) 2195 { 2196 struct i40e_netdev_priv *np = netdev_priv(netdev); 2197 struct i40e_vsi *vsi = np->vsi; 2198 struct i40e_pf *pf = vsi->back; 2199 u16 intrl_reg; 2200 int i; 2201 2202 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2203 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2204 2205 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2206 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2207 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2208 return -EINVAL; 2209 } 2210 2211 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2212 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2213 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2214 return -EINVAL; 2215 } 2216 2217 if (ec->rx_coalesce_usecs == 0) { 2218 if (ec->use_adaptive_rx_coalesce) 2219 netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n"); 2220 } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2221 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2222 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2223 return -EINVAL; 2224 } 2225 2226 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2227 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2228 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2229 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2230 vsi->int_rate_limit); 2231 } 2232 2233 if (ec->tx_coalesce_usecs == 0) { 2234 if (ec->use_adaptive_tx_coalesce) 2235 netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n"); 2236 } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2237 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2238 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2239 return -EINVAL; 2240 } 2241 2242 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2243 * apply to all queues. 2244 */ 2245 if (queue < 0) { 2246 for (i = 0; i < vsi->num_queue_pairs; i++) 2247 i40e_set_itr_per_queue(vsi, ec, i); 2248 } else if (queue < vsi->num_queue_pairs) { 2249 i40e_set_itr_per_queue(vsi, ec, queue); 2250 } else { 2251 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2252 vsi->num_queue_pairs - 1); 2253 return -EINVAL; 2254 } 2255 2256 return 0; 2257 } 2258 2259 /** 2260 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2261 * @netdev: the netdev to change 2262 * @ec: ethtool coalesce settings 2263 * 2264 * This will set each queue to the same coalesce settings. 2265 **/ 2266 static int i40e_set_coalesce(struct net_device *netdev, 2267 struct ethtool_coalesce *ec) 2268 { 2269 return __i40e_set_coalesce(netdev, ec, -1); 2270 } 2271 2272 /** 2273 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2274 * @netdev: the netdev to change 2275 * @ec: ethtool's coalesce settings 2276 * @queue: the queue to change 2277 * 2278 * Sets the specified queue's coalesce settings. 2279 **/ 2280 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2281 struct ethtool_coalesce *ec) 2282 { 2283 return __i40e_set_coalesce(netdev, ec, queue); 2284 } 2285 2286 /** 2287 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2288 * @pf: pointer to the physical function struct 2289 * @cmd: ethtool rxnfc command 2290 * 2291 * Returns Success if the flow is supported, else Invalid Input. 2292 **/ 2293 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2294 { 2295 struct i40e_hw *hw = &pf->hw; 2296 u8 flow_pctype = 0; 2297 u64 i_set = 0; 2298 2299 cmd->data = 0; 2300 2301 switch (cmd->flow_type) { 2302 case TCP_V4_FLOW: 2303 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2304 break; 2305 case UDP_V4_FLOW: 2306 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2307 break; 2308 case TCP_V6_FLOW: 2309 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2310 break; 2311 case UDP_V6_FLOW: 2312 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2313 break; 2314 case SCTP_V4_FLOW: 2315 case AH_ESP_V4_FLOW: 2316 case AH_V4_FLOW: 2317 case ESP_V4_FLOW: 2318 case IPV4_FLOW: 2319 case SCTP_V6_FLOW: 2320 case AH_ESP_V6_FLOW: 2321 case AH_V6_FLOW: 2322 case ESP_V6_FLOW: 2323 case IPV6_FLOW: 2324 /* Default is src/dest for IP, no matter the L4 hashing */ 2325 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2326 break; 2327 default: 2328 return -EINVAL; 2329 } 2330 2331 /* Read flow based hash input set register */ 2332 if (flow_pctype) { 2333 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2334 flow_pctype)) | 2335 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2336 flow_pctype)) << 32); 2337 } 2338 2339 /* Process bits of hash input set */ 2340 if (i_set) { 2341 if (i_set & I40E_L4_SRC_MASK) 2342 cmd->data |= RXH_L4_B_0_1; 2343 if (i_set & I40E_L4_DST_MASK) 2344 cmd->data |= RXH_L4_B_2_3; 2345 2346 if (cmd->flow_type == TCP_V4_FLOW || 2347 cmd->flow_type == UDP_V4_FLOW) { 2348 if (i_set & I40E_L3_SRC_MASK) 2349 cmd->data |= RXH_IP_SRC; 2350 if (i_set & I40E_L3_DST_MASK) 2351 cmd->data |= RXH_IP_DST; 2352 } else if (cmd->flow_type == TCP_V6_FLOW || 2353 cmd->flow_type == UDP_V6_FLOW) { 2354 if (i_set & I40E_L3_V6_SRC_MASK) 2355 cmd->data |= RXH_IP_SRC; 2356 if (i_set & I40E_L3_V6_DST_MASK) 2357 cmd->data |= RXH_IP_DST; 2358 } 2359 } 2360 2361 return 0; 2362 } 2363 2364 /** 2365 * i40e_check_mask - Check whether a mask field is set 2366 * @mask: the full mask value 2367 * @field; mask of the field to check 2368 * 2369 * If the given mask is fully set, return positive value. If the mask for the 2370 * field is fully unset, return zero. Otherwise return a negative error code. 2371 **/ 2372 static int i40e_check_mask(u64 mask, u64 field) 2373 { 2374 u64 value = mask & field; 2375 2376 if (value == field) 2377 return 1; 2378 else if (!value) 2379 return 0; 2380 else 2381 return -1; 2382 } 2383 2384 /** 2385 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2386 * @fsp: pointer to rx flow specification 2387 * @data: pointer to userdef data structure for storage 2388 * 2389 * Read the user-defined data and deconstruct the value into a structure. No 2390 * other code should read the user-defined data, so as to ensure that every 2391 * place consistently reads the value correctly. 2392 * 2393 * The user-defined field is a 64bit Big Endian format value, which we 2394 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2395 * be defined starting from the highest bits, while small bit field values 2396 * shall be defined starting from the lowest bits. 2397 * 2398 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2399 * and the filter should be rejected. The data structure will always be 2400 * modified even if FLOW_EXT is not set. 2401 * 2402 **/ 2403 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2404 struct i40e_rx_flow_userdef *data) 2405 { 2406 u64 value, mask; 2407 int valid; 2408 2409 /* Zero memory first so it's always consistent. */ 2410 memset(data, 0, sizeof(*data)); 2411 2412 if (!(fsp->flow_type & FLOW_EXT)) 2413 return 0; 2414 2415 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2416 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2417 2418 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2419 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2420 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2421 2422 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2423 if (valid < 0) { 2424 return -EINVAL; 2425 } else if (valid) { 2426 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2427 data->flex_offset = 2428 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2429 data->flex_filter = true; 2430 } 2431 2432 return 0; 2433 } 2434 2435 /** 2436 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2437 * @fsp: pointer to rx_flow specification 2438 * 2439 * Reads the userdef data structure and properly fills in the user defined 2440 * fields of the rx_flow_spec. 2441 **/ 2442 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2443 struct i40e_rx_flow_userdef *data) 2444 { 2445 u64 value = 0, mask = 0; 2446 2447 if (data->flex_filter) { 2448 value |= data->flex_word; 2449 value |= (u64)data->flex_offset << 16; 2450 mask |= I40E_USERDEF_FLEX_FILTER; 2451 } 2452 2453 if (value || mask) 2454 fsp->flow_type |= FLOW_EXT; 2455 2456 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2457 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2458 } 2459 2460 /** 2461 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2462 * @pf: Pointer to the physical function struct 2463 * @cmd: The command to get or set Rx flow classification rules 2464 * @rule_locs: Array of used rule locations 2465 * 2466 * This function populates both the total and actual rule count of 2467 * the ethtool flow classification command 2468 * 2469 * Returns 0 on success or -EMSGSIZE if entry not found 2470 **/ 2471 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2472 struct ethtool_rxnfc *cmd, 2473 u32 *rule_locs) 2474 { 2475 struct i40e_fdir_filter *rule; 2476 struct hlist_node *node2; 2477 int cnt = 0; 2478 2479 /* report total rule count */ 2480 cmd->data = i40e_get_fd_cnt_all(pf); 2481 2482 hlist_for_each_entry_safe(rule, node2, 2483 &pf->fdir_filter_list, fdir_node) { 2484 if (cnt == cmd->rule_cnt) 2485 return -EMSGSIZE; 2486 2487 rule_locs[cnt] = rule->fd_id; 2488 cnt++; 2489 } 2490 2491 cmd->rule_cnt = cnt; 2492 2493 return 0; 2494 } 2495 2496 /** 2497 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2498 * @pf: Pointer to the physical function struct 2499 * @cmd: The command to get or set Rx flow classification rules 2500 * 2501 * This function looks up a filter based on the Rx flow classification 2502 * command and fills the flow spec info for it if found 2503 * 2504 * Returns 0 on success or -EINVAL if filter not found 2505 **/ 2506 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2507 struct ethtool_rxnfc *cmd) 2508 { 2509 struct ethtool_rx_flow_spec *fsp = 2510 (struct ethtool_rx_flow_spec *)&cmd->fs; 2511 struct i40e_rx_flow_userdef userdef = {0}; 2512 struct i40e_fdir_filter *rule = NULL; 2513 struct hlist_node *node2; 2514 u64 input_set; 2515 u16 index; 2516 2517 hlist_for_each_entry_safe(rule, node2, 2518 &pf->fdir_filter_list, fdir_node) { 2519 if (fsp->location <= rule->fd_id) 2520 break; 2521 } 2522 2523 if (!rule || fsp->location != rule->fd_id) 2524 return -EINVAL; 2525 2526 fsp->flow_type = rule->flow_type; 2527 if (fsp->flow_type == IP_USER_FLOW) { 2528 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2529 fsp->h_u.usr_ip4_spec.proto = 0; 2530 fsp->m_u.usr_ip4_spec.proto = 0; 2531 } 2532 2533 /* Reverse the src and dest notion, since the HW views them from 2534 * Tx perspective where as the user expects it from Rx filter view. 2535 */ 2536 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2537 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2538 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2539 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2540 2541 switch (rule->flow_type) { 2542 case SCTP_V4_FLOW: 2543 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2544 break; 2545 case TCP_V4_FLOW: 2546 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2547 break; 2548 case UDP_V4_FLOW: 2549 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2550 break; 2551 case IP_USER_FLOW: 2552 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2553 break; 2554 default: 2555 /* If we have stored a filter with a flow type not listed here 2556 * it is almost certainly a driver bug. WARN(), and then 2557 * assign the input_set as if all fields are enabled to avoid 2558 * reading unassigned memory. 2559 */ 2560 WARN(1, "Missing input set index for flow_type %d\n", 2561 rule->flow_type); 2562 input_set = 0xFFFFFFFFFFFFFFFFULL; 2563 goto no_input_set; 2564 } 2565 2566 input_set = i40e_read_fd_input_set(pf, index); 2567 2568 no_input_set: 2569 if (input_set & I40E_L3_SRC_MASK) 2570 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF); 2571 2572 if (input_set & I40E_L3_DST_MASK) 2573 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF); 2574 2575 if (input_set & I40E_L4_SRC_MASK) 2576 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF); 2577 2578 if (input_set & I40E_L4_DST_MASK) 2579 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF); 2580 2581 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2582 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2583 else 2584 fsp->ring_cookie = rule->q_index; 2585 2586 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2587 struct i40e_vsi *vsi; 2588 2589 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2590 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2591 /* VFs are zero-indexed by the driver, but ethtool 2592 * expects them to be one-indexed, so add one here 2593 */ 2594 u64 ring_vf = vsi->vf_id + 1; 2595 2596 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2597 fsp->ring_cookie |= ring_vf; 2598 } 2599 } 2600 2601 if (rule->flex_filter) { 2602 userdef.flex_filter = true; 2603 userdef.flex_word = be16_to_cpu(rule->flex_word); 2604 userdef.flex_offset = rule->flex_offset; 2605 } 2606 2607 i40e_fill_rx_flow_user_data(fsp, &userdef); 2608 2609 return 0; 2610 } 2611 2612 /** 2613 * i40e_get_rxnfc - command to get RX flow classification rules 2614 * @netdev: network interface device structure 2615 * @cmd: ethtool rxnfc command 2616 * 2617 * Returns Success if the command is supported. 2618 **/ 2619 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2620 u32 *rule_locs) 2621 { 2622 struct i40e_netdev_priv *np = netdev_priv(netdev); 2623 struct i40e_vsi *vsi = np->vsi; 2624 struct i40e_pf *pf = vsi->back; 2625 int ret = -EOPNOTSUPP; 2626 2627 switch (cmd->cmd) { 2628 case ETHTOOL_GRXRINGS: 2629 cmd->data = vsi->num_queue_pairs; 2630 ret = 0; 2631 break; 2632 case ETHTOOL_GRXFH: 2633 ret = i40e_get_rss_hash_opts(pf, cmd); 2634 break; 2635 case ETHTOOL_GRXCLSRLCNT: 2636 cmd->rule_cnt = pf->fdir_pf_active_filters; 2637 /* report total rule count */ 2638 cmd->data = i40e_get_fd_cnt_all(pf); 2639 ret = 0; 2640 break; 2641 case ETHTOOL_GRXCLSRULE: 2642 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2643 break; 2644 case ETHTOOL_GRXCLSRLALL: 2645 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2646 break; 2647 default: 2648 break; 2649 } 2650 2651 return ret; 2652 } 2653 2654 /** 2655 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2656 * @nfc: pointer to user request 2657 * @i_setc bits currently set 2658 * 2659 * Returns value of bits to be set per user request 2660 **/ 2661 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2662 { 2663 u64 i_set = i_setc; 2664 u64 src_l3 = 0, dst_l3 = 0; 2665 2666 if (nfc->data & RXH_L4_B_0_1) 2667 i_set |= I40E_L4_SRC_MASK; 2668 else 2669 i_set &= ~I40E_L4_SRC_MASK; 2670 if (nfc->data & RXH_L4_B_2_3) 2671 i_set |= I40E_L4_DST_MASK; 2672 else 2673 i_set &= ~I40E_L4_DST_MASK; 2674 2675 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2676 src_l3 = I40E_L3_V6_SRC_MASK; 2677 dst_l3 = I40E_L3_V6_DST_MASK; 2678 } else if (nfc->flow_type == TCP_V4_FLOW || 2679 nfc->flow_type == UDP_V4_FLOW) { 2680 src_l3 = I40E_L3_SRC_MASK; 2681 dst_l3 = I40E_L3_DST_MASK; 2682 } else { 2683 /* Any other flow type are not supported here */ 2684 return i_set; 2685 } 2686 2687 if (nfc->data & RXH_IP_SRC) 2688 i_set |= src_l3; 2689 else 2690 i_set &= ~src_l3; 2691 if (nfc->data & RXH_IP_DST) 2692 i_set |= dst_l3; 2693 else 2694 i_set &= ~dst_l3; 2695 2696 return i_set; 2697 } 2698 2699 /** 2700 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2701 * @pf: pointer to the physical function struct 2702 * @cmd: ethtool rxnfc command 2703 * 2704 * Returns Success if the flow input set is supported. 2705 **/ 2706 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2707 { 2708 struct i40e_hw *hw = &pf->hw; 2709 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2710 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2711 u8 flow_pctype = 0; 2712 u64 i_set, i_setc; 2713 2714 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2715 dev_err(&pf->pdev->dev, 2716 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2717 return -EOPNOTSUPP; 2718 } 2719 2720 /* RSS does not support anything other than hashing 2721 * to queues on src and dst IPs and ports 2722 */ 2723 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2724 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2725 return -EINVAL; 2726 2727 switch (nfc->flow_type) { 2728 case TCP_V4_FLOW: 2729 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2730 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2731 hena |= 2732 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2733 break; 2734 case TCP_V6_FLOW: 2735 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2736 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2737 hena |= 2738 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2739 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2740 hena |= 2741 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2742 break; 2743 case UDP_V4_FLOW: 2744 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2745 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2746 hena |= 2747 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2748 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2749 2750 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2751 break; 2752 case UDP_V6_FLOW: 2753 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2754 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2755 hena |= 2756 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2757 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2758 2759 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2760 break; 2761 case AH_ESP_V4_FLOW: 2762 case AH_V4_FLOW: 2763 case ESP_V4_FLOW: 2764 case SCTP_V4_FLOW: 2765 if ((nfc->data & RXH_L4_B_0_1) || 2766 (nfc->data & RXH_L4_B_2_3)) 2767 return -EINVAL; 2768 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2769 break; 2770 case AH_ESP_V6_FLOW: 2771 case AH_V6_FLOW: 2772 case ESP_V6_FLOW: 2773 case SCTP_V6_FLOW: 2774 if ((nfc->data & RXH_L4_B_0_1) || 2775 (nfc->data & RXH_L4_B_2_3)) 2776 return -EINVAL; 2777 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2778 break; 2779 case IPV4_FLOW: 2780 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2781 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2782 break; 2783 case IPV6_FLOW: 2784 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2785 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2786 break; 2787 default: 2788 return -EINVAL; 2789 } 2790 2791 if (flow_pctype) { 2792 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2793 flow_pctype)) | 2794 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2795 flow_pctype)) << 32); 2796 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2797 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2798 (u32)i_set); 2799 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2800 (u32)(i_set >> 32)); 2801 hena |= BIT_ULL(flow_pctype); 2802 } 2803 2804 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2805 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2806 i40e_flush(hw); 2807 2808 return 0; 2809 } 2810 2811 /** 2812 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2813 * @vsi: Pointer to the targeted VSI 2814 * @input: The filter to update or NULL to indicate deletion 2815 * @sw_idx: Software index to the filter 2816 * @cmd: The command to get or set Rx flow classification rules 2817 * 2818 * This function updates (or deletes) a Flow Director entry from 2819 * the hlist of the corresponding PF 2820 * 2821 * Returns 0 on success 2822 **/ 2823 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2824 struct i40e_fdir_filter *input, 2825 u16 sw_idx, 2826 struct ethtool_rxnfc *cmd) 2827 { 2828 struct i40e_fdir_filter *rule, *parent; 2829 struct i40e_pf *pf = vsi->back; 2830 struct hlist_node *node2; 2831 int err = -EINVAL; 2832 2833 parent = NULL; 2834 rule = NULL; 2835 2836 hlist_for_each_entry_safe(rule, node2, 2837 &pf->fdir_filter_list, fdir_node) { 2838 /* hash found, or no matching entry */ 2839 if (rule->fd_id >= sw_idx) 2840 break; 2841 parent = rule; 2842 } 2843 2844 /* if there is an old rule occupying our place remove it */ 2845 if (rule && (rule->fd_id == sw_idx)) { 2846 /* Remove this rule, since we're either deleting it, or 2847 * replacing it. 2848 */ 2849 err = i40e_add_del_fdir(vsi, rule, false); 2850 hlist_del(&rule->fdir_node); 2851 kfree(rule); 2852 pf->fdir_pf_active_filters--; 2853 } 2854 2855 /* If we weren't given an input, this is a delete, so just return the 2856 * error code indicating if there was an entry at the requested slot 2857 */ 2858 if (!input) 2859 return err; 2860 2861 /* Otherwise, install the new rule as requested */ 2862 INIT_HLIST_NODE(&input->fdir_node); 2863 2864 /* add filter to the list */ 2865 if (parent) 2866 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2867 else 2868 hlist_add_head(&input->fdir_node, 2869 &pf->fdir_filter_list); 2870 2871 /* update counts */ 2872 pf->fdir_pf_active_filters++; 2873 2874 return 0; 2875 } 2876 2877 /** 2878 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 2879 * @pf: pointer to PF structure 2880 * 2881 * This function searches the list of filters and determines which FLX_PIT 2882 * entries are still required. It will prune any entries which are no longer 2883 * in use after the deletion. 2884 **/ 2885 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 2886 { 2887 struct i40e_flex_pit *entry, *tmp; 2888 struct i40e_fdir_filter *rule; 2889 2890 /* First, we'll check the l3 table */ 2891 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 2892 bool found = false; 2893 2894 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2895 if (rule->flow_type != IP_USER_FLOW) 2896 continue; 2897 if (rule->flex_filter && 2898 rule->flex_offset == entry->src_offset) { 2899 found = true; 2900 break; 2901 } 2902 } 2903 2904 /* If we didn't find the filter, then we can prune this entry 2905 * from the list. 2906 */ 2907 if (!found) { 2908 list_del(&entry->list); 2909 kfree(entry); 2910 } 2911 } 2912 2913 /* Followed by the L4 table */ 2914 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 2915 bool found = false; 2916 2917 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2918 /* Skip this filter if it's L3, since we already 2919 * checked those in the above loop 2920 */ 2921 if (rule->flow_type == IP_USER_FLOW) 2922 continue; 2923 if (rule->flex_filter && 2924 rule->flex_offset == entry->src_offset) { 2925 found = true; 2926 break; 2927 } 2928 } 2929 2930 /* If we didn't find the filter, then we can prune this entry 2931 * from the list. 2932 */ 2933 if (!found) { 2934 list_del(&entry->list); 2935 kfree(entry); 2936 } 2937 } 2938 } 2939 2940 /** 2941 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 2942 * @vsi: Pointer to the targeted VSI 2943 * @cmd: The command to get or set Rx flow classification rules 2944 * 2945 * The function removes a Flow Director filter entry from the 2946 * hlist of the corresponding PF 2947 * 2948 * Returns 0 on success 2949 */ 2950 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 2951 struct ethtool_rxnfc *cmd) 2952 { 2953 struct ethtool_rx_flow_spec *fsp = 2954 (struct ethtool_rx_flow_spec *)&cmd->fs; 2955 struct i40e_pf *pf = vsi->back; 2956 int ret = 0; 2957 2958 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 2959 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 2960 return -EBUSY; 2961 2962 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 2963 return -EBUSY; 2964 2965 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 2966 2967 i40e_prune_flex_pit_list(pf); 2968 2969 i40e_fdir_check_and_reenable(pf); 2970 return ret; 2971 } 2972 2973 /** 2974 * i40e_unused_pit_index - Find an unused PIT index for given list 2975 * @pf: the PF data structure 2976 * 2977 * Find the first unused flexible PIT index entry. We search both the L3 and 2978 * L4 flexible PIT lists so that the returned index is unique and unused by 2979 * either currently programmed L3 or L4 filters. We use a bit field as storage 2980 * to track which indexes are already used. 2981 **/ 2982 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 2983 { 2984 unsigned long available_index = 0xFF; 2985 struct i40e_flex_pit *entry; 2986 2987 /* We need to make sure that the new index isn't in use by either L3 2988 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 2989 * L4 to use the same index. 2990 */ 2991 2992 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 2993 clear_bit(entry->pit_index, &available_index); 2994 2995 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 2996 clear_bit(entry->pit_index, &available_index); 2997 2998 return find_first_bit(&available_index, 8); 2999 } 3000 3001 /** 3002 * i40e_find_flex_offset - Find an existing flex src_offset 3003 * @flex_pit_list: L3 or L4 flex PIT list 3004 * @src_offset: new src_offset to find 3005 * 3006 * Searches the flex_pit_list for an existing offset. If no offset is 3007 * currently programmed, then this will return an ERR_PTR if there is no space 3008 * to add a new offset, otherwise it returns NULL. 3009 **/ 3010 static 3011 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3012 u16 src_offset) 3013 { 3014 struct i40e_flex_pit *entry; 3015 int size = 0; 3016 3017 /* Search for the src_offset first. If we find a matching entry 3018 * already programmed, we can simply re-use it. 3019 */ 3020 list_for_each_entry(entry, flex_pit_list, list) { 3021 size++; 3022 if (entry->src_offset == src_offset) 3023 return entry; 3024 } 3025 3026 /* If we haven't found an entry yet, then the provided src offset has 3027 * not yet been programmed. We will program the src offset later on, 3028 * but we need to indicate whether there is enough space to do so 3029 * here. We'll make use of ERR_PTR for this purpose. 3030 */ 3031 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3032 return ERR_PTR(-ENOSPC); 3033 3034 return NULL; 3035 } 3036 3037 /** 3038 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3039 * @flex_pit_list: L3 or L4 flex PIT list 3040 * @src_offset: new src_offset to add 3041 * @pit_index: the PIT index to program 3042 * 3043 * This function programs the new src_offset to the list. It is expected that 3044 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3045 * that this offset is not programmed, and that the list has enough space to 3046 * store another offset. 3047 * 3048 * Returns 0 on success, and negative value on error. 3049 **/ 3050 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3051 u16 src_offset, 3052 u8 pit_index) 3053 { 3054 struct i40e_flex_pit *new_pit, *entry; 3055 3056 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3057 if (!new_pit) 3058 return -ENOMEM; 3059 3060 new_pit->src_offset = src_offset; 3061 new_pit->pit_index = pit_index; 3062 3063 /* We need to insert this item such that the list is sorted by 3064 * src_offset in ascending order. 3065 */ 3066 list_for_each_entry(entry, flex_pit_list, list) { 3067 if (new_pit->src_offset < entry->src_offset) { 3068 list_add_tail(&new_pit->list, &entry->list); 3069 return 0; 3070 } 3071 3072 /* If we found an entry with our offset already programmed we 3073 * can simply return here, after freeing the memory. However, 3074 * if the pit_index does not match we need to report an error. 3075 */ 3076 if (new_pit->src_offset == entry->src_offset) { 3077 int err = 0; 3078 3079 /* If the PIT index is not the same we can't re-use 3080 * the entry, so we must report an error. 3081 */ 3082 if (new_pit->pit_index != entry->pit_index) 3083 err = -EINVAL; 3084 3085 kfree(new_pit); 3086 return err; 3087 } 3088 } 3089 3090 /* If we reached here, then we haven't yet added the item. This means 3091 * that we should add the item at the end of the list. 3092 */ 3093 list_add_tail(&new_pit->list, flex_pit_list); 3094 return 0; 3095 } 3096 3097 /** 3098 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3099 * @pf: Pointer to the PF structure 3100 * @flex_pit_list: list of flexible src offsets in use 3101 * #flex_pit_start: index to first entry for this section of the table 3102 * 3103 * In order to handle flexible data, the hardware uses a table of values 3104 * called the FLX_PIT table. This table is used to indicate which sections of 3105 * the input correspond to what PIT index values. Unfortunately, hardware is 3106 * very restrictive about programming this table. Entries must be ordered by 3107 * src_offset in ascending order, without duplicates. Additionally, unused 3108 * entries must be set to the unused index value, and must have valid size and 3109 * length according to the src_offset ordering. 3110 * 3111 * This function will reprogram the FLX_PIT register from a book-keeping 3112 * structure that we guarantee is already ordered correctly, and has no more 3113 * than 3 entries. 3114 * 3115 * To make things easier, we only support flexible values of one word length, 3116 * rather than allowing variable length flexible values. 3117 **/ 3118 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3119 struct list_head *flex_pit_list, 3120 int flex_pit_start) 3121 { 3122 struct i40e_flex_pit *entry = NULL; 3123 u16 last_offset = 0; 3124 int i = 0, j = 0; 3125 3126 /* First, loop over the list of flex PIT entries, and reprogram the 3127 * registers. 3128 */ 3129 list_for_each_entry(entry, flex_pit_list, list) { 3130 /* We have to be careful when programming values for the 3131 * largest SRC_OFFSET value. It is possible that adding 3132 * additional empty values at the end would overflow the space 3133 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3134 * we check here and add the empty values prior to adding the 3135 * largest value. 3136 * 3137 * To determine this, we will use a loop from i+1 to 3, which 3138 * will determine whether the unused entries would have valid 3139 * SRC_OFFSET. Note that there cannot be extra entries past 3140 * this value, because the only valid values would have been 3141 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3142 * have been added to the list in the first place. 3143 */ 3144 for (j = i + 1; j < 3; j++) { 3145 u16 offset = entry->src_offset + j; 3146 int index = flex_pit_start + i; 3147 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3148 1, 3149 offset - 3); 3150 3151 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3152 i40e_write_rx_ctl(&pf->hw, 3153 I40E_PRTQF_FLX_PIT(index), 3154 value); 3155 i++; 3156 } 3157 } 3158 3159 /* Now, we can program the actual value into the table */ 3160 i40e_write_rx_ctl(&pf->hw, 3161 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3162 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3163 1, 3164 entry->src_offset)); 3165 i++; 3166 } 3167 3168 /* In order to program the last entries in the table, we need to 3169 * determine the valid offset. If the list is empty, we'll just start 3170 * with 0. Otherwise, we'll start with the last item offset and add 1. 3171 * This ensures that all entries have valid sizes. If we don't do this 3172 * correctly, the hardware will disable flexible field parsing. 3173 */ 3174 if (!list_empty(flex_pit_list)) 3175 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3176 3177 for (; i < 3; i++, last_offset++) { 3178 i40e_write_rx_ctl(&pf->hw, 3179 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3180 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3181 1, 3182 last_offset)); 3183 } 3184 } 3185 3186 /** 3187 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3188 * @pf: pointer to the PF structure 3189 * 3190 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3191 * internal helper function for implementation details. 3192 **/ 3193 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3194 { 3195 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3196 I40E_FLEX_PIT_IDX_START_L3); 3197 3198 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3199 I40E_FLEX_PIT_IDX_START_L4); 3200 3201 /* We also need to program the L3 and L4 GLQF ORT register */ 3202 i40e_write_rx_ctl(&pf->hw, 3203 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3204 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3205 3, 1)); 3206 3207 i40e_write_rx_ctl(&pf->hw, 3208 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3209 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3210 3, 1)); 3211 } 3212 3213 /** 3214 * i40e_flow_str - Converts a flow_type into a human readable string 3215 * @flow_type: the flow type from a flow specification 3216 * 3217 * Currently only flow types we support are included here, and the string 3218 * value attempts to match what ethtool would use to configure this flow type. 3219 **/ 3220 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3221 { 3222 switch (fsp->flow_type & ~FLOW_EXT) { 3223 case TCP_V4_FLOW: 3224 return "tcp4"; 3225 case UDP_V4_FLOW: 3226 return "udp4"; 3227 case SCTP_V4_FLOW: 3228 return "sctp4"; 3229 case IP_USER_FLOW: 3230 return "ip4"; 3231 default: 3232 return "unknown"; 3233 } 3234 } 3235 3236 /** 3237 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3238 * @pit_index: PIT index to convert 3239 * 3240 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3241 * of range. 3242 **/ 3243 static u64 i40e_pit_index_to_mask(int pit_index) 3244 { 3245 switch (pit_index) { 3246 case 0: 3247 return I40E_FLEX_50_MASK; 3248 case 1: 3249 return I40E_FLEX_51_MASK; 3250 case 2: 3251 return I40E_FLEX_52_MASK; 3252 case 3: 3253 return I40E_FLEX_53_MASK; 3254 case 4: 3255 return I40E_FLEX_54_MASK; 3256 case 5: 3257 return I40E_FLEX_55_MASK; 3258 case 6: 3259 return I40E_FLEX_56_MASK; 3260 case 7: 3261 return I40E_FLEX_57_MASK; 3262 default: 3263 return 0; 3264 } 3265 } 3266 3267 /** 3268 * i40e_print_input_set - Show changes between two input sets 3269 * @vsi: the vsi being configured 3270 * @old: the old input set 3271 * @new: the new input set 3272 * 3273 * Print the difference between old and new input sets by showing which series 3274 * of words are toggled on or off. Only displays the bits we actually support 3275 * changing. 3276 **/ 3277 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3278 { 3279 struct i40e_pf *pf = vsi->back; 3280 bool old_value, new_value; 3281 int i; 3282 3283 old_value = !!(old & I40E_L3_SRC_MASK); 3284 new_value = !!(new & I40E_L3_SRC_MASK); 3285 if (old_value != new_value) 3286 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3287 old_value ? "ON" : "OFF", 3288 new_value ? "ON" : "OFF"); 3289 3290 old_value = !!(old & I40E_L3_DST_MASK); 3291 new_value = !!(new & I40E_L3_DST_MASK); 3292 if (old_value != new_value) 3293 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3294 old_value ? "ON" : "OFF", 3295 new_value ? "ON" : "OFF"); 3296 3297 old_value = !!(old & I40E_L4_SRC_MASK); 3298 new_value = !!(new & I40E_L4_SRC_MASK); 3299 if (old_value != new_value) 3300 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3301 old_value ? "ON" : "OFF", 3302 new_value ? "ON" : "OFF"); 3303 3304 old_value = !!(old & I40E_L4_DST_MASK); 3305 new_value = !!(new & I40E_L4_DST_MASK); 3306 if (old_value != new_value) 3307 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3308 old_value ? "ON" : "OFF", 3309 new_value ? "ON" : "OFF"); 3310 3311 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3312 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3313 if (old_value != new_value) 3314 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3315 old_value ? "ON" : "OFF", 3316 new_value ? "ON" : "OFF"); 3317 3318 /* Show change of flexible filter entries */ 3319 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3320 u64 flex_mask = i40e_pit_index_to_mask(i); 3321 3322 old_value = !!(old & flex_mask); 3323 new_value = !!(new & flex_mask); 3324 if (old_value != new_value) 3325 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3326 i, 3327 old_value ? "ON" : "OFF", 3328 new_value ? "ON" : "OFF"); 3329 } 3330 3331 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3332 old); 3333 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3334 new); 3335 } 3336 3337 /** 3338 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3339 * @vsi: pointer to the targeted VSI 3340 * @fsp: pointer to Rx flow specification 3341 * @userdef: userdefined data from flow specification 3342 * 3343 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3344 * for partial matches exists with a few limitations. First, hardware only 3345 * supports masking by word boundary (2 bytes) and not per individual bit. 3346 * Second, hardware is limited to using one mask for a flow type and cannot 3347 * use a separate mask for each filter. 3348 * 3349 * To support these limitations, if we already have a configured filter for 3350 * the specified type, this function enforces that new filters of the type 3351 * match the configured input set. Otherwise, if we do not have a filter of 3352 * the specified type, we allow the input set to be updated to match the 3353 * desired filter. 3354 * 3355 * To help ensure that administrators understand why filters weren't displayed 3356 * as supported, we print a diagnostic message displaying how the input set 3357 * would change and warning to delete the preexisting filters if required. 3358 * 3359 * Returns 0 on successful input set match, and a negative return code on 3360 * failure. 3361 **/ 3362 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3363 struct ethtool_rx_flow_spec *fsp, 3364 struct i40e_rx_flow_userdef *userdef) 3365 { 3366 struct i40e_pf *pf = vsi->back; 3367 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3368 struct ethtool_usrip4_spec *usr_ip4_spec; 3369 u64 current_mask, new_mask; 3370 bool new_flex_offset = false; 3371 bool flex_l3 = false; 3372 u16 *fdir_filter_count; 3373 u16 index, src_offset = 0; 3374 u8 pit_index = 0; 3375 int err; 3376 3377 switch (fsp->flow_type & ~FLOW_EXT) { 3378 case SCTP_V4_FLOW: 3379 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3380 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3381 break; 3382 case TCP_V4_FLOW: 3383 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3384 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3385 break; 3386 case UDP_V4_FLOW: 3387 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3388 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3389 break; 3390 case IP_USER_FLOW: 3391 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3392 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3393 flex_l3 = true; 3394 break; 3395 default: 3396 return -EOPNOTSUPP; 3397 } 3398 3399 /* Read the current input set from register memory. */ 3400 current_mask = i40e_read_fd_input_set(pf, index); 3401 new_mask = current_mask; 3402 3403 /* Determine, if any, the required changes to the input set in order 3404 * to support the provided mask. 3405 * 3406 * Hardware only supports masking at word (2 byte) granularity and does 3407 * not support full bitwise masking. This implementation simplifies 3408 * even further and only supports fully enabled or fully disabled 3409 * masks for each field, even though we could split the ip4src and 3410 * ip4dst fields. 3411 */ 3412 switch (fsp->flow_type & ~FLOW_EXT) { 3413 case SCTP_V4_FLOW: 3414 new_mask &= ~I40E_VERIFY_TAG_MASK; 3415 /* Fall through */ 3416 case TCP_V4_FLOW: 3417 case UDP_V4_FLOW: 3418 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3419 3420 /* IPv4 source address */ 3421 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3422 new_mask |= I40E_L3_SRC_MASK; 3423 else if (!tcp_ip4_spec->ip4src) 3424 new_mask &= ~I40E_L3_SRC_MASK; 3425 else 3426 return -EOPNOTSUPP; 3427 3428 /* IPv4 destination address */ 3429 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3430 new_mask |= I40E_L3_DST_MASK; 3431 else if (!tcp_ip4_spec->ip4dst) 3432 new_mask &= ~I40E_L3_DST_MASK; 3433 else 3434 return -EOPNOTSUPP; 3435 3436 /* L4 source port */ 3437 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3438 new_mask |= I40E_L4_SRC_MASK; 3439 else if (!tcp_ip4_spec->psrc) 3440 new_mask &= ~I40E_L4_SRC_MASK; 3441 else 3442 return -EOPNOTSUPP; 3443 3444 /* L4 destination port */ 3445 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3446 new_mask |= I40E_L4_DST_MASK; 3447 else if (!tcp_ip4_spec->pdst) 3448 new_mask &= ~I40E_L4_DST_MASK; 3449 else 3450 return -EOPNOTSUPP; 3451 3452 /* Filtering on Type of Service is not supported. */ 3453 if (tcp_ip4_spec->tos) 3454 return -EOPNOTSUPP; 3455 3456 break; 3457 case IP_USER_FLOW: 3458 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3459 3460 /* IPv4 source address */ 3461 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3462 new_mask |= I40E_L3_SRC_MASK; 3463 else if (!usr_ip4_spec->ip4src) 3464 new_mask &= ~I40E_L3_SRC_MASK; 3465 else 3466 return -EOPNOTSUPP; 3467 3468 /* IPv4 destination address */ 3469 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3470 new_mask |= I40E_L3_DST_MASK; 3471 else if (!usr_ip4_spec->ip4dst) 3472 new_mask &= ~I40E_L3_DST_MASK; 3473 else 3474 return -EOPNOTSUPP; 3475 3476 /* First 4 bytes of L4 header */ 3477 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3478 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3479 else if (!usr_ip4_spec->l4_4_bytes) 3480 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3481 else 3482 return -EOPNOTSUPP; 3483 3484 /* Filtering on Type of Service is not supported. */ 3485 if (usr_ip4_spec->tos) 3486 return -EOPNOTSUPP; 3487 3488 /* Filtering on IP version is not supported */ 3489 if (usr_ip4_spec->ip_ver) 3490 return -EINVAL; 3491 3492 /* Filtering on L4 protocol is not supported */ 3493 if (usr_ip4_spec->proto) 3494 return -EINVAL; 3495 3496 break; 3497 default: 3498 return -EOPNOTSUPP; 3499 } 3500 3501 /* First, clear all flexible filter entries */ 3502 new_mask &= ~I40E_FLEX_INPUT_MASK; 3503 3504 /* If we have a flexible filter, try to add this offset to the correct 3505 * flexible filter PIT list. Once finished, we can update the mask. 3506 * If the src_offset changed, we will get a new mask value which will 3507 * trigger an input set change. 3508 */ 3509 if (userdef->flex_filter) { 3510 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3511 3512 /* Flexible offset must be even, since the flexible payload 3513 * must be aligned on 2-byte boundary. 3514 */ 3515 if (userdef->flex_offset & 0x1) { 3516 dev_warn(&pf->pdev->dev, 3517 "Flexible data offset must be 2-byte aligned\n"); 3518 return -EINVAL; 3519 } 3520 3521 src_offset = userdef->flex_offset >> 1; 3522 3523 /* FLX_PIT source offset value is only so large */ 3524 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3525 dev_warn(&pf->pdev->dev, 3526 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3527 return -EINVAL; 3528 } 3529 3530 /* See if this offset has already been programmed. If we get 3531 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3532 * if we get a NULL pointer, this means we will need to add 3533 * the offset. 3534 */ 3535 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3536 src_offset); 3537 if (IS_ERR(flex_pit)) 3538 return PTR_ERR(flex_pit); 3539 3540 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3541 * packet types, and thus we need to program both L3 and L4 3542 * flexible values. These must have identical flexible index, 3543 * as otherwise we can't correctly program the input set. So 3544 * we'll find both an L3 and L4 index and make sure they are 3545 * the same. 3546 */ 3547 if (flex_l3) { 3548 l3_flex_pit = 3549 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3550 src_offset); 3551 if (IS_ERR(l3_flex_pit)) 3552 return PTR_ERR(l3_flex_pit); 3553 3554 if (flex_pit) { 3555 /* If we already had a matching L4 entry, we 3556 * need to make sure that the L3 entry we 3557 * obtained uses the same index. 3558 */ 3559 if (l3_flex_pit) { 3560 if (l3_flex_pit->pit_index != 3561 flex_pit->pit_index) { 3562 return -EINVAL; 3563 } 3564 } else { 3565 new_flex_offset = true; 3566 } 3567 } else { 3568 flex_pit = l3_flex_pit; 3569 } 3570 } 3571 3572 /* If we didn't find an existing flex offset, we need to 3573 * program a new one. However, we don't immediately program it 3574 * here because we will wait to program until after we check 3575 * that it is safe to change the input set. 3576 */ 3577 if (!flex_pit) { 3578 new_flex_offset = true; 3579 pit_index = i40e_unused_pit_index(pf); 3580 } else { 3581 pit_index = flex_pit->pit_index; 3582 } 3583 3584 /* Update the mask with the new offset */ 3585 new_mask |= i40e_pit_index_to_mask(pit_index); 3586 } 3587 3588 /* If the mask and flexible filter offsets for this filter match the 3589 * currently programmed values we don't need any input set change, so 3590 * this filter is safe to install. 3591 */ 3592 if (new_mask == current_mask && !new_flex_offset) 3593 return 0; 3594 3595 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3596 i40e_flow_str(fsp)); 3597 i40e_print_input_set(vsi, current_mask, new_mask); 3598 if (new_flex_offset) { 3599 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3600 pit_index, src_offset); 3601 } 3602 3603 /* Hardware input sets are global across multiple ports, so even the 3604 * main port cannot change them when in MFP mode as this would impact 3605 * any filters on the other ports. 3606 */ 3607 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3608 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3609 return -EOPNOTSUPP; 3610 } 3611 3612 /* This filter requires us to update the input set. However, hardware 3613 * only supports one input set per flow type, and does not support 3614 * separate masks for each filter. This means that we can only support 3615 * a single mask for all filters of a specific type. 3616 * 3617 * If we have preexisting filters, they obviously depend on the 3618 * current programmed input set. Display a diagnostic message in this 3619 * case explaining why the filter could not be accepted. 3620 */ 3621 if (*fdir_filter_count) { 3622 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3623 i40e_flow_str(fsp), 3624 *fdir_filter_count); 3625 return -EOPNOTSUPP; 3626 } 3627 3628 i40e_write_fd_input_set(pf, index, new_mask); 3629 3630 /* Add the new offset and update table, if necessary */ 3631 if (new_flex_offset) { 3632 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3633 pit_index); 3634 if (err) 3635 return err; 3636 3637 if (flex_l3) { 3638 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3639 src_offset, 3640 pit_index); 3641 if (err) 3642 return err; 3643 } 3644 3645 i40e_reprogram_flex_pit(pf); 3646 } 3647 3648 return 0; 3649 } 3650 3651 /** 3652 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3653 * @vsi: pointer to the targeted VSI 3654 * @cmd: command to get or set RX flow classification rules 3655 * 3656 * Add Flow Director filters for a specific flow spec based on their 3657 * protocol. Returns 0 if the filters were successfully added. 3658 **/ 3659 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3660 struct ethtool_rxnfc *cmd) 3661 { 3662 struct i40e_rx_flow_userdef userdef; 3663 struct ethtool_rx_flow_spec *fsp; 3664 struct i40e_fdir_filter *input; 3665 u16 dest_vsi = 0, q_index = 0; 3666 struct i40e_pf *pf; 3667 int ret = -EINVAL; 3668 u8 dest_ctl; 3669 3670 if (!vsi) 3671 return -EINVAL; 3672 pf = vsi->back; 3673 3674 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3675 return -EOPNOTSUPP; 3676 3677 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3678 return -ENOSPC; 3679 3680 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3681 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3682 return -EBUSY; 3683 3684 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3685 return -EBUSY; 3686 3687 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3688 3689 /* Parse the user-defined field */ 3690 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3691 return -EINVAL; 3692 3693 /* Extended MAC field is not supported */ 3694 if (fsp->flow_type & FLOW_MAC_EXT) 3695 return -EINVAL; 3696 3697 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3698 if (ret) 3699 return ret; 3700 3701 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3702 pf->hw.func_caps.fd_filters_guaranteed)) { 3703 return -EINVAL; 3704 } 3705 3706 /* ring_cookie is either the drop index, or is a mask of the queue 3707 * index and VF id we wish to target. 3708 */ 3709 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3710 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3711 } else { 3712 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3713 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3714 3715 if (!vf) { 3716 if (ring >= vsi->num_queue_pairs) 3717 return -EINVAL; 3718 dest_vsi = vsi->id; 3719 } else { 3720 /* VFs are zero-indexed, so we subtract one here */ 3721 vf--; 3722 3723 if (vf >= pf->num_alloc_vfs) 3724 return -EINVAL; 3725 if (ring >= pf->vf[vf].num_queue_pairs) 3726 return -EINVAL; 3727 dest_vsi = pf->vf[vf].lan_vsi_id; 3728 } 3729 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3730 q_index = ring; 3731 } 3732 3733 input = kzalloc(sizeof(*input), GFP_KERNEL); 3734 3735 if (!input) 3736 return -ENOMEM; 3737 3738 input->fd_id = fsp->location; 3739 input->q_index = q_index; 3740 input->dest_vsi = dest_vsi; 3741 input->dest_ctl = dest_ctl; 3742 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 3743 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 3744 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3745 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3746 input->flow_type = fsp->flow_type & ~FLOW_EXT; 3747 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 3748 3749 /* Reverse the src and dest notion, since the HW expects them to be from 3750 * Tx perspective where as the input from user is from Rx filter view. 3751 */ 3752 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 3753 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 3754 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3755 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3756 3757 if (userdef.flex_filter) { 3758 input->flex_filter = true; 3759 input->flex_word = cpu_to_be16(userdef.flex_word); 3760 input->flex_offset = userdef.flex_offset; 3761 } 3762 3763 ret = i40e_add_del_fdir(vsi, input, true); 3764 if (ret) 3765 goto free_input; 3766 3767 /* Add the input filter to the fdir_input_list, possibly replacing 3768 * a previous filter. Do not free the input structure after adding it 3769 * to the list as this would cause a use-after-free bug. 3770 */ 3771 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 3772 3773 return 0; 3774 3775 free_input: 3776 kfree(input); 3777 return ret; 3778 } 3779 3780 /** 3781 * i40e_set_rxnfc - command to set RX flow classification rules 3782 * @netdev: network interface device structure 3783 * @cmd: ethtool rxnfc command 3784 * 3785 * Returns Success if the command is supported. 3786 **/ 3787 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 3788 { 3789 struct i40e_netdev_priv *np = netdev_priv(netdev); 3790 struct i40e_vsi *vsi = np->vsi; 3791 struct i40e_pf *pf = vsi->back; 3792 int ret = -EOPNOTSUPP; 3793 3794 switch (cmd->cmd) { 3795 case ETHTOOL_SRXFH: 3796 ret = i40e_set_rss_hash_opt(pf, cmd); 3797 break; 3798 case ETHTOOL_SRXCLSRLINS: 3799 ret = i40e_add_fdir_ethtool(vsi, cmd); 3800 break; 3801 case ETHTOOL_SRXCLSRLDEL: 3802 ret = i40e_del_fdir_entry(vsi, cmd); 3803 break; 3804 default: 3805 break; 3806 } 3807 3808 return ret; 3809 } 3810 3811 /** 3812 * i40e_max_channels - get Max number of combined channels supported 3813 * @vsi: vsi pointer 3814 **/ 3815 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 3816 { 3817 /* TODO: This code assumes DCB and FD is disabled for now. */ 3818 return vsi->alloc_queue_pairs; 3819 } 3820 3821 /** 3822 * i40e_get_channels - Get the current channels enabled and max supported etc. 3823 * @netdev: network interface device structure 3824 * @ch: ethtool channels structure 3825 * 3826 * We don't support separate tx and rx queues as channels. The other count 3827 * represents how many queues are being used for control. max_combined counts 3828 * how many queue pairs we can support. They may not be mapped 1 to 1 with 3829 * q_vectors since we support a lot more queue pairs than q_vectors. 3830 **/ 3831 static void i40e_get_channels(struct net_device *dev, 3832 struct ethtool_channels *ch) 3833 { 3834 struct i40e_netdev_priv *np = netdev_priv(dev); 3835 struct i40e_vsi *vsi = np->vsi; 3836 struct i40e_pf *pf = vsi->back; 3837 3838 /* report maximum channels */ 3839 ch->max_combined = i40e_max_channels(vsi); 3840 3841 /* report info for other vector */ 3842 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 3843 ch->max_other = ch->other_count; 3844 3845 /* Note: This code assumes DCB is disabled for now. */ 3846 ch->combined_count = vsi->num_queue_pairs; 3847 } 3848 3849 /** 3850 * i40e_set_channels - Set the new channels count. 3851 * @netdev: network interface device structure 3852 * @ch: ethtool channels structure 3853 * 3854 * The new channels count may not be the same as requested by the user 3855 * since it gets rounded down to a power of 2 value. 3856 **/ 3857 static int i40e_set_channels(struct net_device *dev, 3858 struct ethtool_channels *ch) 3859 { 3860 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3861 struct i40e_netdev_priv *np = netdev_priv(dev); 3862 unsigned int count = ch->combined_count; 3863 struct i40e_vsi *vsi = np->vsi; 3864 struct i40e_pf *pf = vsi->back; 3865 struct i40e_fdir_filter *rule; 3866 struct hlist_node *node2; 3867 int new_count; 3868 int err = 0; 3869 3870 /* We do not support setting channels for any other VSI at present */ 3871 if (vsi->type != I40E_VSI_MAIN) 3872 return -EINVAL; 3873 3874 /* verify they are not requesting separate vectors */ 3875 if (!count || ch->rx_count || ch->tx_count) 3876 return -EINVAL; 3877 3878 /* verify other_count has not changed */ 3879 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 3880 return -EINVAL; 3881 3882 /* verify the number of channels does not exceed hardware limits */ 3883 if (count > i40e_max_channels(vsi)) 3884 return -EINVAL; 3885 3886 /* verify that the number of channels does not invalidate any current 3887 * flow director rules 3888 */ 3889 hlist_for_each_entry_safe(rule, node2, 3890 &pf->fdir_filter_list, fdir_node) { 3891 if (rule->dest_ctl != drop && count <= rule->q_index) { 3892 dev_warn(&pf->pdev->dev, 3893 "Existing user defined filter %d assigns flow to queue %d\n", 3894 rule->fd_id, rule->q_index); 3895 err = -EINVAL; 3896 } 3897 } 3898 3899 if (err) { 3900 dev_err(&pf->pdev->dev, 3901 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 3902 count); 3903 return err; 3904 } 3905 3906 /* update feature limits from largest to smallest supported values */ 3907 /* TODO: Flow director limit, DCB etc */ 3908 3909 /* use rss_reconfig to rebuild with new queue count and update traffic 3910 * class queue mapping 3911 */ 3912 new_count = i40e_reconfig_rss_queues(pf, count); 3913 if (new_count > 0) 3914 return 0; 3915 else 3916 return -EINVAL; 3917 } 3918 3919 /** 3920 * i40e_get_rxfh_key_size - get the RSS hash key size 3921 * @netdev: network interface device structure 3922 * 3923 * Returns the table size. 3924 **/ 3925 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 3926 { 3927 return I40E_HKEY_ARRAY_SIZE; 3928 } 3929 3930 /** 3931 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 3932 * @netdev: network interface device structure 3933 * 3934 * Returns the table size. 3935 **/ 3936 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 3937 { 3938 return I40E_HLUT_ARRAY_SIZE; 3939 } 3940 3941 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 3942 u8 *hfunc) 3943 { 3944 struct i40e_netdev_priv *np = netdev_priv(netdev); 3945 struct i40e_vsi *vsi = np->vsi; 3946 u8 *lut, *seed = NULL; 3947 int ret; 3948 u16 i; 3949 3950 if (hfunc) 3951 *hfunc = ETH_RSS_HASH_TOP; 3952 3953 if (!indir) 3954 return 0; 3955 3956 seed = key; 3957 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3958 if (!lut) 3959 return -ENOMEM; 3960 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 3961 if (ret) 3962 goto out; 3963 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3964 indir[i] = (u32)(lut[i]); 3965 3966 out: 3967 kfree(lut); 3968 3969 return ret; 3970 } 3971 3972 /** 3973 * i40e_set_rxfh - set the rx flow hash indirection table 3974 * @netdev: network interface device structure 3975 * @indir: indirection table 3976 * @key: hash key 3977 * 3978 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 3979 * returns 0 after programming the table. 3980 **/ 3981 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 3982 const u8 *key, const u8 hfunc) 3983 { 3984 struct i40e_netdev_priv *np = netdev_priv(netdev); 3985 struct i40e_vsi *vsi = np->vsi; 3986 struct i40e_pf *pf = vsi->back; 3987 u8 *seed = NULL; 3988 u16 i; 3989 3990 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 3991 return -EOPNOTSUPP; 3992 3993 if (key) { 3994 if (!vsi->rss_hkey_user) { 3995 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 3996 GFP_KERNEL); 3997 if (!vsi->rss_hkey_user) 3998 return -ENOMEM; 3999 } 4000 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4001 seed = vsi->rss_hkey_user; 4002 } 4003 if (!vsi->rss_lut_user) { 4004 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4005 if (!vsi->rss_lut_user) 4006 return -ENOMEM; 4007 } 4008 4009 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4010 if (indir) 4011 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4012 vsi->rss_lut_user[i] = (u8)(indir[i]); 4013 else 4014 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4015 vsi->rss_size); 4016 4017 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4018 I40E_HLUT_ARRAY_SIZE); 4019 } 4020 4021 /** 4022 * i40e_get_priv_flags - report device private flags 4023 * @dev: network interface device structure 4024 * 4025 * The get string set count and the string set should be matched for each 4026 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4027 * array. 4028 * 4029 * Returns a u32 bitmap of flags. 4030 **/ 4031 static u32 i40e_get_priv_flags(struct net_device *dev) 4032 { 4033 struct i40e_netdev_priv *np = netdev_priv(dev); 4034 struct i40e_vsi *vsi = np->vsi; 4035 struct i40e_pf *pf = vsi->back; 4036 u32 i, j, ret_flags = 0; 4037 4038 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4039 const struct i40e_priv_flags *priv_flags; 4040 4041 priv_flags = &i40e_gstrings_priv_flags[i]; 4042 4043 if (priv_flags->flag & pf->flags) 4044 ret_flags |= BIT(i); 4045 } 4046 4047 if (pf->hw.pf_id != 0) 4048 return ret_flags; 4049 4050 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4051 const struct i40e_priv_flags *priv_flags; 4052 4053 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4054 4055 if (priv_flags->flag & pf->flags) 4056 ret_flags |= BIT(i + j); 4057 } 4058 4059 return ret_flags; 4060 } 4061 4062 /** 4063 * i40e_set_priv_flags - set private flags 4064 * @dev: network interface device structure 4065 * @flags: bit flags to be set 4066 **/ 4067 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4068 { 4069 struct i40e_netdev_priv *np = netdev_priv(dev); 4070 struct i40e_vsi *vsi = np->vsi; 4071 struct i40e_pf *pf = vsi->back; 4072 u64 changed_flags; 4073 u32 i, j; 4074 4075 changed_flags = pf->flags; 4076 4077 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4078 const struct i40e_priv_flags *priv_flags; 4079 4080 priv_flags = &i40e_gstrings_priv_flags[i]; 4081 4082 if (priv_flags->read_only) 4083 continue; 4084 4085 if (flags & BIT(i)) 4086 pf->flags |= priv_flags->flag; 4087 else 4088 pf->flags &= ~(priv_flags->flag); 4089 } 4090 4091 if (pf->hw.pf_id != 0) 4092 goto flags_complete; 4093 4094 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4095 const struct i40e_priv_flags *priv_flags; 4096 4097 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4098 4099 if (priv_flags->read_only) 4100 continue; 4101 4102 if (flags & BIT(i + j)) 4103 pf->flags |= priv_flags->flag; 4104 else 4105 pf->flags &= ~(priv_flags->flag); 4106 } 4107 4108 flags_complete: 4109 /* check for flags that changed */ 4110 changed_flags ^= pf->flags; 4111 4112 /* Process any additional changes needed as a result of flag changes. 4113 * The changed_flags value reflects the list of bits that were 4114 * changed in the code above. 4115 */ 4116 4117 /* Flush current ATR settings if ATR was disabled */ 4118 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4119 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4120 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4121 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4122 } 4123 4124 /* Only allow ATR evict on hardware that is capable of handling it */ 4125 if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) 4126 pf->flags &= ~I40E_FLAG_HW_ATR_EVICT_ENABLED; 4127 4128 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4129 u16 sw_flags = 0, valid_flags = 0; 4130 int ret; 4131 4132 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4133 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4134 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4135 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4136 NULL); 4137 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4138 dev_info(&pf->pdev->dev, 4139 "couldn't set switch config bits, err %s aq_err %s\n", 4140 i40e_stat_str(&pf->hw, ret), 4141 i40e_aq_str(&pf->hw, 4142 pf->hw.aq.asq_last_status)); 4143 /* not a fatal problem, just keep going */ 4144 } 4145 } 4146 4147 /* Issue reset to cause things to take effect, as additional bits 4148 * are added we will need to create a mask of bits requiring reset 4149 */ 4150 if ((changed_flags & I40E_FLAG_VEB_STATS_ENABLED) || 4151 ((changed_flags & I40E_FLAG_LEGACY_RX) && netif_running(dev))) 4152 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4153 4154 return 0; 4155 } 4156 4157 static const struct ethtool_ops i40e_ethtool_ops = { 4158 .get_drvinfo = i40e_get_drvinfo, 4159 .get_regs_len = i40e_get_regs_len, 4160 .get_regs = i40e_get_regs, 4161 .nway_reset = i40e_nway_reset, 4162 .get_link = ethtool_op_get_link, 4163 .get_wol = i40e_get_wol, 4164 .set_wol = i40e_set_wol, 4165 .set_eeprom = i40e_set_eeprom, 4166 .get_eeprom_len = i40e_get_eeprom_len, 4167 .get_eeprom = i40e_get_eeprom, 4168 .get_ringparam = i40e_get_ringparam, 4169 .set_ringparam = i40e_set_ringparam, 4170 .get_pauseparam = i40e_get_pauseparam, 4171 .set_pauseparam = i40e_set_pauseparam, 4172 .get_msglevel = i40e_get_msglevel, 4173 .set_msglevel = i40e_set_msglevel, 4174 .get_rxnfc = i40e_get_rxnfc, 4175 .set_rxnfc = i40e_set_rxnfc, 4176 .self_test = i40e_diag_test, 4177 .get_strings = i40e_get_strings, 4178 .set_phys_id = i40e_set_phys_id, 4179 .get_sset_count = i40e_get_sset_count, 4180 .get_ethtool_stats = i40e_get_ethtool_stats, 4181 .get_coalesce = i40e_get_coalesce, 4182 .set_coalesce = i40e_set_coalesce, 4183 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4184 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4185 .get_rxfh = i40e_get_rxfh, 4186 .set_rxfh = i40e_set_rxfh, 4187 .get_channels = i40e_get_channels, 4188 .set_channels = i40e_set_channels, 4189 .get_ts_info = i40e_get_ts_info, 4190 .get_priv_flags = i40e_get_priv_flags, 4191 .set_priv_flags = i40e_set_priv_flags, 4192 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4193 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4194 .get_link_ksettings = i40e_get_link_ksettings, 4195 .set_link_ksettings = i40e_set_link_ksettings, 4196 }; 4197 4198 void i40e_set_ethtool_ops(struct net_device *netdev) 4199 { 4200 netdev->ethtool_ops = &i40e_ethtool_ops; 4201 } 4202