1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = sizeof_field(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * i40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_VEB_TC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat) 237 #define I40E_PFC_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 239 #define I40E_QUEUE_STAT(_name, _stat) \ 240 I40E_STAT(struct i40e_ring, _name, _stat) 241 242 static const struct i40e_stats i40e_gstrings_net_stats[] = { 243 I40E_NETDEV_STAT(rx_packets), 244 I40E_NETDEV_STAT(tx_packets), 245 I40E_NETDEV_STAT(rx_bytes), 246 I40E_NETDEV_STAT(tx_bytes), 247 I40E_NETDEV_STAT(rx_errors), 248 I40E_NETDEV_STAT(tx_errors), 249 I40E_NETDEV_STAT(rx_dropped), 250 I40E_NETDEV_STAT(tx_dropped), 251 I40E_NETDEV_STAT(collisions), 252 I40E_NETDEV_STAT(rx_length_errors), 253 I40E_NETDEV_STAT(rx_crc_errors), 254 }; 255 256 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 257 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 258 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 259 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 260 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 261 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 262 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 263 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 264 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 265 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 266 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 267 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 268 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 269 }; 270 271 struct i40e_cp_veb_tc_stats { 272 u64 tc_rx_packets; 273 u64 tc_rx_bytes; 274 u64 tc_tx_packets; 275 u64 tc_tx_bytes; 276 }; 277 278 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 279 I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets), 280 I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes), 281 I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets), 282 I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes), 283 }; 284 285 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 286 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 287 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 288 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 289 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 290 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 291 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 292 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 293 I40E_VSI_STAT("tx_linearize", tx_linearize), 294 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 295 I40E_VSI_STAT("tx_busy", tx_busy), 296 I40E_VSI_STAT("tx_stopped", tx_stopped), 297 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 298 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 299 I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse), 300 I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc), 301 I40E_VSI_STAT("rx_cache_waive", rx_page_waive), 302 I40E_VSI_STAT("rx_cache_busy", rx_page_busy), 303 I40E_VSI_STAT("tx_restart", tx_restart), 304 }; 305 306 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 307 * but they are separate. This device supports Virtualization, and 308 * as such might have several netdevs supporting VMDq and FCoE going 309 * through a single port. The NETDEV_STATs are for individual netdevs 310 * seen at the top of the stack, and the PF_STATs are for the physical 311 * function at the bottom of the stack hosting those netdevs. 312 * 313 * The PF_STATs are appended to the netdev stats only when ethtool -S 314 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 315 */ 316 static const struct i40e_stats i40e_gstrings_stats[] = { 317 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 318 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 319 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 320 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 321 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 322 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 323 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 324 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 325 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 326 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 327 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 328 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 329 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 330 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 331 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 332 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 333 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 334 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 335 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 336 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 337 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 338 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 339 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 340 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 341 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 342 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 343 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 344 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 345 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 346 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 347 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 348 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 349 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 350 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 351 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 352 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 353 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 354 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 355 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 356 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 357 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 358 I40E_PF_STAT("port.arq_overflows", arq_overflows), 359 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 360 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 361 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 362 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 363 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 364 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 365 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 366 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 367 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 368 369 /* LPI stats */ 370 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 371 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 372 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 373 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 374 }; 375 376 struct i40e_pfc_stats { 377 u64 priority_xon_rx; 378 u64 priority_xoff_rx; 379 u64 priority_xon_tx; 380 u64 priority_xoff_tx; 381 u64 priority_xon_2_xoff; 382 }; 383 384 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 385 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 386 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 387 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 388 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 389 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 390 }; 391 392 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 393 394 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 395 396 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 397 398 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 399 I40E_MAX_USER_PRIORITY) 400 401 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 402 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 403 I40E_MAX_TRAFFIC_CLASS)) 404 405 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 406 407 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 408 I40E_PFC_STATS_LEN + \ 409 I40E_VEB_STATS_LEN + \ 410 I40E_VSI_STATS_LEN) 411 412 /* Length of stats for a single queue */ 413 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 414 415 enum i40e_ethtool_test_id { 416 I40E_ETH_TEST_REG = 0, 417 I40E_ETH_TEST_EEPROM, 418 I40E_ETH_TEST_INTR, 419 I40E_ETH_TEST_LINK, 420 }; 421 422 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 423 "Register test (offline)", 424 "Eeprom test (offline)", 425 "Interrupt test (offline)", 426 "Link test (on/offline)" 427 }; 428 429 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 430 431 struct i40e_priv_flags { 432 char flag_string[ETH_GSTRING_LEN]; 433 u64 flag; 434 bool read_only; 435 }; 436 437 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 438 .flag_string = _name, \ 439 .flag = _flag, \ 440 .read_only = _read_only, \ 441 } 442 443 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 444 /* NOTE: MFP setting cannot be changed */ 445 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 446 I40E_PRIV_FLAG("total-port-shutdown", 447 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1), 448 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 449 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 450 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 451 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 452 I40E_PRIV_FLAG("link-down-on-close", 453 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 454 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 455 I40E_PRIV_FLAG("disable-source-pruning", 456 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 457 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 458 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 459 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 460 }; 461 462 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 463 464 /* Private flags with a global effect, restricted to PF 0 */ 465 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 466 I40E_PRIV_FLAG("vf-true-promisc-support", 467 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 468 }; 469 470 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 471 472 /** 473 * i40e_partition_setting_complaint - generic complaint for MFP restriction 474 * @pf: the PF struct 475 **/ 476 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 477 { 478 dev_info(&pf->pdev->dev, 479 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 480 } 481 482 /** 483 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 484 * @pf: PF struct with phy_types 485 * @ks: ethtool link ksettings struct to fill out 486 * 487 **/ 488 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 489 struct ethtool_link_ksettings *ks) 490 { 491 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 492 u64 phy_types = pf->hw.phy.phy_types; 493 494 ethtool_link_ksettings_zero_link_mode(ks, supported); 495 ethtool_link_ksettings_zero_link_mode(ks, advertising); 496 497 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 498 ethtool_link_ksettings_add_link_mode(ks, supported, 499 1000baseT_Full); 500 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 501 ethtool_link_ksettings_add_link_mode(ks, advertising, 502 1000baseT_Full); 503 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 504 ethtool_link_ksettings_add_link_mode(ks, supported, 505 100baseT_Full); 506 ethtool_link_ksettings_add_link_mode(ks, advertising, 507 100baseT_Full); 508 } 509 } 510 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 511 phy_types & I40E_CAP_PHY_TYPE_XFI || 512 phy_types & I40E_CAP_PHY_TYPE_SFI || 513 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 514 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 515 ethtool_link_ksettings_add_link_mode(ks, supported, 516 10000baseT_Full); 517 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 518 ethtool_link_ksettings_add_link_mode(ks, advertising, 519 10000baseT_Full); 520 } 521 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 522 ethtool_link_ksettings_add_link_mode(ks, supported, 523 10000baseT_Full); 524 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 525 ethtool_link_ksettings_add_link_mode(ks, advertising, 526 10000baseT_Full); 527 } 528 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) { 529 ethtool_link_ksettings_add_link_mode(ks, supported, 530 2500baseT_Full); 531 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 532 ethtool_link_ksettings_add_link_mode(ks, advertising, 533 2500baseT_Full); 534 } 535 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) { 536 ethtool_link_ksettings_add_link_mode(ks, supported, 537 5000baseT_Full); 538 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 539 ethtool_link_ksettings_add_link_mode(ks, advertising, 540 5000baseT_Full); 541 } 542 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 543 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 544 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 545 ethtool_link_ksettings_add_link_mode(ks, supported, 546 40000baseCR4_Full); 547 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 548 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 549 ethtool_link_ksettings_add_link_mode(ks, supported, 550 40000baseCR4_Full); 551 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 552 ethtool_link_ksettings_add_link_mode(ks, advertising, 553 40000baseCR4_Full); 554 } 555 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 556 ethtool_link_ksettings_add_link_mode(ks, supported, 557 100baseT_Full); 558 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 559 ethtool_link_ksettings_add_link_mode(ks, advertising, 560 100baseT_Full); 561 } 562 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 563 ethtool_link_ksettings_add_link_mode(ks, supported, 564 1000baseT_Full); 565 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 566 ethtool_link_ksettings_add_link_mode(ks, advertising, 567 1000baseT_Full); 568 } 569 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) { 570 ethtool_link_ksettings_add_link_mode(ks, supported, 571 40000baseSR4_Full); 572 ethtool_link_ksettings_add_link_mode(ks, advertising, 573 40000baseSR4_Full); 574 } 575 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) { 576 ethtool_link_ksettings_add_link_mode(ks, supported, 577 40000baseLR4_Full); 578 ethtool_link_ksettings_add_link_mode(ks, advertising, 579 40000baseLR4_Full); 580 } 581 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 582 ethtool_link_ksettings_add_link_mode(ks, supported, 583 40000baseKR4_Full); 584 ethtool_link_ksettings_add_link_mode(ks, advertising, 585 40000baseKR4_Full); 586 } 587 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 588 ethtool_link_ksettings_add_link_mode(ks, supported, 589 20000baseKR2_Full); 590 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 591 ethtool_link_ksettings_add_link_mode(ks, advertising, 592 20000baseKR2_Full); 593 } 594 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 595 ethtool_link_ksettings_add_link_mode(ks, supported, 596 10000baseKX4_Full); 597 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 598 ethtool_link_ksettings_add_link_mode(ks, advertising, 599 10000baseKX4_Full); 600 } 601 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 602 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 603 ethtool_link_ksettings_add_link_mode(ks, supported, 604 10000baseKR_Full); 605 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 606 ethtool_link_ksettings_add_link_mode(ks, advertising, 607 10000baseKR_Full); 608 } 609 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 610 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 611 ethtool_link_ksettings_add_link_mode(ks, supported, 612 1000baseKX_Full); 613 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 614 ethtool_link_ksettings_add_link_mode(ks, advertising, 615 1000baseKX_Full); 616 } 617 /* need to add 25G PHY types */ 618 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 619 ethtool_link_ksettings_add_link_mode(ks, supported, 620 25000baseKR_Full); 621 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 622 ethtool_link_ksettings_add_link_mode(ks, advertising, 623 25000baseKR_Full); 624 } 625 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 25000baseCR_Full); 628 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 629 ethtool_link_ksettings_add_link_mode(ks, advertising, 630 25000baseCR_Full); 631 } 632 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 633 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 634 ethtool_link_ksettings_add_link_mode(ks, supported, 635 25000baseSR_Full); 636 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 637 ethtool_link_ksettings_add_link_mode(ks, advertising, 638 25000baseSR_Full); 639 } 640 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 641 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 642 ethtool_link_ksettings_add_link_mode(ks, supported, 643 25000baseCR_Full); 644 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 645 ethtool_link_ksettings_add_link_mode(ks, advertising, 646 25000baseCR_Full); 647 } 648 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 649 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 650 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 651 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 652 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 653 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 654 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 655 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 656 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 657 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 658 ethtool_link_ksettings_add_link_mode(ks, advertising, 659 FEC_NONE); 660 ethtool_link_ksettings_add_link_mode(ks, advertising, 661 FEC_RS); 662 ethtool_link_ksettings_add_link_mode(ks, advertising, 663 FEC_BASER); 664 } 665 } 666 /* need to add new 10G PHY types */ 667 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 668 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 669 ethtool_link_ksettings_add_link_mode(ks, supported, 670 10000baseCR_Full); 671 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 672 ethtool_link_ksettings_add_link_mode(ks, advertising, 673 10000baseCR_Full); 674 } 675 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 676 ethtool_link_ksettings_add_link_mode(ks, supported, 677 10000baseSR_Full); 678 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 679 ethtool_link_ksettings_add_link_mode(ks, advertising, 680 10000baseSR_Full); 681 } 682 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 683 ethtool_link_ksettings_add_link_mode(ks, supported, 684 10000baseLR_Full); 685 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 686 ethtool_link_ksettings_add_link_mode(ks, advertising, 687 10000baseLR_Full); 688 } 689 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 690 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 691 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 692 ethtool_link_ksettings_add_link_mode(ks, supported, 693 1000baseX_Full); 694 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 695 ethtool_link_ksettings_add_link_mode(ks, advertising, 696 1000baseX_Full); 697 } 698 /* Autoneg PHY types */ 699 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 700 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 701 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 702 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 703 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 704 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 705 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 706 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 707 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 708 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 709 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 710 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 711 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 712 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 713 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 714 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 715 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T || 716 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T || 717 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 718 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 719 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 720 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 721 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 722 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 723 ethtool_link_ksettings_add_link_mode(ks, supported, 724 Autoneg); 725 ethtool_link_ksettings_add_link_mode(ks, advertising, 726 Autoneg); 727 } 728 } 729 730 /** 731 * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask 732 * @req_fec_info: mask request FEC info 733 * @ks: ethtool ksettings to fill in 734 **/ 735 static void i40e_get_settings_link_up_fec(u8 req_fec_info, 736 struct ethtool_link_ksettings *ks) 737 { 738 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 739 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 740 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 741 742 if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) && 743 (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) { 744 ethtool_link_ksettings_add_link_mode(ks, advertising, 745 FEC_NONE); 746 ethtool_link_ksettings_add_link_mode(ks, advertising, 747 FEC_BASER); 748 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 749 } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) { 750 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 751 } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) { 752 ethtool_link_ksettings_add_link_mode(ks, advertising, 753 FEC_BASER); 754 } else { 755 ethtool_link_ksettings_add_link_mode(ks, advertising, 756 FEC_NONE); 757 } 758 } 759 760 /** 761 * i40e_get_settings_link_up - Get the Link settings for when link is up 762 * @hw: hw structure 763 * @ks: ethtool ksettings to fill in 764 * @netdev: network interface device structure 765 * @pf: pointer to physical function struct 766 **/ 767 static void i40e_get_settings_link_up(struct i40e_hw *hw, 768 struct ethtool_link_ksettings *ks, 769 struct net_device *netdev, 770 struct i40e_pf *pf) 771 { 772 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 773 struct ethtool_link_ksettings cap_ksettings; 774 u32 link_speed = hw_link_info->link_speed; 775 776 /* Initialize supported and advertised settings based on phy settings */ 777 switch (hw_link_info->phy_type) { 778 case I40E_PHY_TYPE_40GBASE_CR4: 779 case I40E_PHY_TYPE_40GBASE_CR4_CU: 780 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 781 ethtool_link_ksettings_add_link_mode(ks, supported, 782 40000baseCR4_Full); 783 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 784 ethtool_link_ksettings_add_link_mode(ks, advertising, 785 40000baseCR4_Full); 786 break; 787 case I40E_PHY_TYPE_XLAUI: 788 case I40E_PHY_TYPE_XLPPI: 789 case I40E_PHY_TYPE_40GBASE_AOC: 790 ethtool_link_ksettings_add_link_mode(ks, supported, 791 40000baseCR4_Full); 792 ethtool_link_ksettings_add_link_mode(ks, advertising, 793 40000baseCR4_Full); 794 break; 795 case I40E_PHY_TYPE_40GBASE_SR4: 796 ethtool_link_ksettings_add_link_mode(ks, supported, 797 40000baseSR4_Full); 798 ethtool_link_ksettings_add_link_mode(ks, advertising, 799 40000baseSR4_Full); 800 break; 801 case I40E_PHY_TYPE_40GBASE_LR4: 802 ethtool_link_ksettings_add_link_mode(ks, supported, 803 40000baseLR4_Full); 804 ethtool_link_ksettings_add_link_mode(ks, advertising, 805 40000baseLR4_Full); 806 break; 807 case I40E_PHY_TYPE_25GBASE_SR: 808 case I40E_PHY_TYPE_25GBASE_LR: 809 case I40E_PHY_TYPE_10GBASE_SR: 810 case I40E_PHY_TYPE_10GBASE_LR: 811 case I40E_PHY_TYPE_1000BASE_SX: 812 case I40E_PHY_TYPE_1000BASE_LX: 813 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 814 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 815 ethtool_link_ksettings_add_link_mode(ks, supported, 816 25000baseSR_Full); 817 ethtool_link_ksettings_add_link_mode(ks, advertising, 818 25000baseSR_Full); 819 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 820 ethtool_link_ksettings_add_link_mode(ks, supported, 821 10000baseSR_Full); 822 ethtool_link_ksettings_add_link_mode(ks, advertising, 823 10000baseSR_Full); 824 ethtool_link_ksettings_add_link_mode(ks, supported, 825 10000baseLR_Full); 826 ethtool_link_ksettings_add_link_mode(ks, advertising, 827 10000baseLR_Full); 828 ethtool_link_ksettings_add_link_mode(ks, supported, 829 1000baseX_Full); 830 ethtool_link_ksettings_add_link_mode(ks, advertising, 831 1000baseX_Full); 832 ethtool_link_ksettings_add_link_mode(ks, supported, 833 10000baseT_Full); 834 if (hw_link_info->module_type[2] & 835 I40E_MODULE_TYPE_1000BASE_SX || 836 hw_link_info->module_type[2] & 837 I40E_MODULE_TYPE_1000BASE_LX) { 838 ethtool_link_ksettings_add_link_mode(ks, supported, 839 1000baseT_Full); 840 if (hw_link_info->requested_speeds & 841 I40E_LINK_SPEED_1GB) 842 ethtool_link_ksettings_add_link_mode( 843 ks, advertising, 1000baseT_Full); 844 } 845 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 846 ethtool_link_ksettings_add_link_mode(ks, advertising, 847 10000baseT_Full); 848 break; 849 case I40E_PHY_TYPE_10GBASE_T: 850 case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS: 851 case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS: 852 case I40E_PHY_TYPE_1000BASE_T: 853 case I40E_PHY_TYPE_100BASE_TX: 854 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 855 ethtool_link_ksettings_add_link_mode(ks, supported, 856 10000baseT_Full); 857 ethtool_link_ksettings_add_link_mode(ks, supported, 858 5000baseT_Full); 859 ethtool_link_ksettings_add_link_mode(ks, supported, 860 2500baseT_Full); 861 ethtool_link_ksettings_add_link_mode(ks, supported, 862 1000baseT_Full); 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 100baseT_Full); 865 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 866 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 867 ethtool_link_ksettings_add_link_mode(ks, advertising, 868 10000baseT_Full); 869 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 870 ethtool_link_ksettings_add_link_mode(ks, advertising, 871 5000baseT_Full); 872 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 873 ethtool_link_ksettings_add_link_mode(ks, advertising, 874 2500baseT_Full); 875 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 876 ethtool_link_ksettings_add_link_mode(ks, advertising, 877 1000baseT_Full); 878 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 879 ethtool_link_ksettings_add_link_mode(ks, advertising, 880 100baseT_Full); 881 break; 882 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 883 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 884 ethtool_link_ksettings_add_link_mode(ks, supported, 885 1000baseT_Full); 886 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 887 ethtool_link_ksettings_add_link_mode(ks, advertising, 888 1000baseT_Full); 889 break; 890 case I40E_PHY_TYPE_10GBASE_CR1_CU: 891 case I40E_PHY_TYPE_10GBASE_CR1: 892 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 893 ethtool_link_ksettings_add_link_mode(ks, supported, 894 10000baseT_Full); 895 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 896 ethtool_link_ksettings_add_link_mode(ks, advertising, 897 10000baseT_Full); 898 break; 899 case I40E_PHY_TYPE_XAUI: 900 case I40E_PHY_TYPE_XFI: 901 case I40E_PHY_TYPE_SFI: 902 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 903 case I40E_PHY_TYPE_10GBASE_AOC: 904 ethtool_link_ksettings_add_link_mode(ks, supported, 905 10000baseT_Full); 906 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 907 ethtool_link_ksettings_add_link_mode(ks, advertising, 908 10000baseT_Full); 909 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 910 break; 911 case I40E_PHY_TYPE_SGMII: 912 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 913 ethtool_link_ksettings_add_link_mode(ks, supported, 914 1000baseT_Full); 915 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 916 ethtool_link_ksettings_add_link_mode(ks, advertising, 917 1000baseT_Full); 918 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 919 ethtool_link_ksettings_add_link_mode(ks, supported, 920 100baseT_Full); 921 if (hw_link_info->requested_speeds & 922 I40E_LINK_SPEED_100MB) 923 ethtool_link_ksettings_add_link_mode( 924 ks, advertising, 100baseT_Full); 925 } 926 break; 927 case I40E_PHY_TYPE_40GBASE_KR4: 928 case I40E_PHY_TYPE_25GBASE_KR: 929 case I40E_PHY_TYPE_20GBASE_KR2: 930 case I40E_PHY_TYPE_10GBASE_KR: 931 case I40E_PHY_TYPE_10GBASE_KX4: 932 case I40E_PHY_TYPE_1000BASE_KX: 933 ethtool_link_ksettings_add_link_mode(ks, supported, 934 40000baseKR4_Full); 935 ethtool_link_ksettings_add_link_mode(ks, supported, 936 25000baseKR_Full); 937 ethtool_link_ksettings_add_link_mode(ks, supported, 938 20000baseKR2_Full); 939 ethtool_link_ksettings_add_link_mode(ks, supported, 940 10000baseKR_Full); 941 ethtool_link_ksettings_add_link_mode(ks, supported, 942 10000baseKX4_Full); 943 ethtool_link_ksettings_add_link_mode(ks, supported, 944 1000baseKX_Full); 945 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 946 ethtool_link_ksettings_add_link_mode(ks, advertising, 947 40000baseKR4_Full); 948 ethtool_link_ksettings_add_link_mode(ks, advertising, 949 25000baseKR_Full); 950 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 951 ethtool_link_ksettings_add_link_mode(ks, advertising, 952 20000baseKR2_Full); 953 ethtool_link_ksettings_add_link_mode(ks, advertising, 954 10000baseKR_Full); 955 ethtool_link_ksettings_add_link_mode(ks, advertising, 956 10000baseKX4_Full); 957 ethtool_link_ksettings_add_link_mode(ks, advertising, 958 1000baseKX_Full); 959 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 960 break; 961 case I40E_PHY_TYPE_25GBASE_CR: 962 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 963 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 964 ethtool_link_ksettings_add_link_mode(ks, supported, 965 25000baseCR_Full); 966 ethtool_link_ksettings_add_link_mode(ks, advertising, 967 25000baseCR_Full); 968 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 969 970 break; 971 case I40E_PHY_TYPE_25GBASE_AOC: 972 case I40E_PHY_TYPE_25GBASE_ACC: 973 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 974 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 975 ethtool_link_ksettings_add_link_mode(ks, supported, 976 25000baseCR_Full); 977 ethtool_link_ksettings_add_link_mode(ks, advertising, 978 25000baseCR_Full); 979 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 980 981 ethtool_link_ksettings_add_link_mode(ks, supported, 982 10000baseCR_Full); 983 ethtool_link_ksettings_add_link_mode(ks, advertising, 984 10000baseCR_Full); 985 break; 986 default: 987 /* if we got here and link is up something bad is afoot */ 988 netdev_info(netdev, 989 "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n", 990 hw_link_info->phy_type); 991 } 992 993 /* Now that we've worked out everything that could be supported by the 994 * current PHY type, get what is supported by the NVM and intersect 995 * them to get what is truly supported 996 */ 997 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 998 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 999 ethtool_intersect_link_masks(ks, &cap_ksettings); 1000 1001 /* Set speed and duplex */ 1002 switch (link_speed) { 1003 case I40E_LINK_SPEED_40GB: 1004 ks->base.speed = SPEED_40000; 1005 break; 1006 case I40E_LINK_SPEED_25GB: 1007 ks->base.speed = SPEED_25000; 1008 break; 1009 case I40E_LINK_SPEED_20GB: 1010 ks->base.speed = SPEED_20000; 1011 break; 1012 case I40E_LINK_SPEED_10GB: 1013 ks->base.speed = SPEED_10000; 1014 break; 1015 case I40E_LINK_SPEED_5GB: 1016 ks->base.speed = SPEED_5000; 1017 break; 1018 case I40E_LINK_SPEED_2_5GB: 1019 ks->base.speed = SPEED_2500; 1020 break; 1021 case I40E_LINK_SPEED_1GB: 1022 ks->base.speed = SPEED_1000; 1023 break; 1024 case I40E_LINK_SPEED_100MB: 1025 ks->base.speed = SPEED_100; 1026 break; 1027 default: 1028 ks->base.speed = SPEED_UNKNOWN; 1029 break; 1030 } 1031 ks->base.duplex = DUPLEX_FULL; 1032 } 1033 1034 /** 1035 * i40e_get_settings_link_down - Get the Link settings for when link is down 1036 * @hw: hw structure 1037 * @ks: ethtool ksettings to fill in 1038 * @pf: pointer to physical function struct 1039 * 1040 * Reports link settings that can be determined when link is down 1041 **/ 1042 static void i40e_get_settings_link_down(struct i40e_hw *hw, 1043 struct ethtool_link_ksettings *ks, 1044 struct i40e_pf *pf) 1045 { 1046 /* link is down and the driver needs to fall back on 1047 * supported phy types to figure out what info to display 1048 */ 1049 i40e_phy_type_to_ethtool(pf, ks); 1050 1051 /* With no link speed and duplex are unknown */ 1052 ks->base.speed = SPEED_UNKNOWN; 1053 ks->base.duplex = DUPLEX_UNKNOWN; 1054 } 1055 1056 /** 1057 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 1058 * @netdev: network interface device structure 1059 * @ks: ethtool ksettings 1060 * 1061 * Reports speed/duplex settings based on media_type 1062 **/ 1063 static int i40e_get_link_ksettings(struct net_device *netdev, 1064 struct ethtool_link_ksettings *ks) 1065 { 1066 struct i40e_netdev_priv *np = netdev_priv(netdev); 1067 struct i40e_pf *pf = np->vsi->back; 1068 struct i40e_hw *hw = &pf->hw; 1069 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1070 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1071 1072 ethtool_link_ksettings_zero_link_mode(ks, supported); 1073 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1074 1075 if (link_up) 1076 i40e_get_settings_link_up(hw, ks, netdev, pf); 1077 else 1078 i40e_get_settings_link_down(hw, ks, pf); 1079 1080 /* Now set the settings that don't rely on link being up/down */ 1081 /* Set autoneg settings */ 1082 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1083 AUTONEG_ENABLE : AUTONEG_DISABLE); 1084 1085 /* Set media type settings */ 1086 switch (hw->phy.media_type) { 1087 case I40E_MEDIA_TYPE_BACKPLANE: 1088 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1089 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1090 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1091 ethtool_link_ksettings_add_link_mode(ks, advertising, 1092 Backplane); 1093 ks->base.port = PORT_NONE; 1094 break; 1095 case I40E_MEDIA_TYPE_BASET: 1096 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1097 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1098 ks->base.port = PORT_TP; 1099 break; 1100 case I40E_MEDIA_TYPE_DA: 1101 case I40E_MEDIA_TYPE_CX4: 1102 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1103 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1104 ks->base.port = PORT_DA; 1105 break; 1106 case I40E_MEDIA_TYPE_FIBER: 1107 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1108 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1109 ks->base.port = PORT_FIBRE; 1110 break; 1111 case I40E_MEDIA_TYPE_UNKNOWN: 1112 default: 1113 ks->base.port = PORT_OTHER; 1114 break; 1115 } 1116 1117 /* Set flow control settings */ 1118 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1119 ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause); 1120 1121 switch (hw->fc.requested_mode) { 1122 case I40E_FC_FULL: 1123 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1124 break; 1125 case I40E_FC_TX_PAUSE: 1126 ethtool_link_ksettings_add_link_mode(ks, advertising, 1127 Asym_Pause); 1128 break; 1129 case I40E_FC_RX_PAUSE: 1130 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1131 ethtool_link_ksettings_add_link_mode(ks, advertising, 1132 Asym_Pause); 1133 break; 1134 default: 1135 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1136 ethtool_link_ksettings_del_link_mode(ks, advertising, 1137 Asym_Pause); 1138 break; 1139 } 1140 1141 return 0; 1142 } 1143 1144 /** 1145 * i40e_set_link_ksettings - Set Speed and Duplex 1146 * @netdev: network interface device structure 1147 * @ks: ethtool ksettings 1148 * 1149 * Set speed/duplex per media_types advertised/forced 1150 **/ 1151 static int i40e_set_link_ksettings(struct net_device *netdev, 1152 const struct ethtool_link_ksettings *ks) 1153 { 1154 struct i40e_netdev_priv *np = netdev_priv(netdev); 1155 struct i40e_aq_get_phy_abilities_resp abilities; 1156 struct ethtool_link_ksettings safe_ks; 1157 struct ethtool_link_ksettings copy_ks; 1158 struct i40e_aq_set_phy_config config; 1159 struct i40e_pf *pf = np->vsi->back; 1160 struct i40e_vsi *vsi = np->vsi; 1161 struct i40e_hw *hw = &pf->hw; 1162 bool autoneg_changed = false; 1163 i40e_status status = 0; 1164 int timeout = 50; 1165 int err = 0; 1166 u8 autoneg; 1167 1168 /* Changing port settings is not supported if this isn't the 1169 * port's controlling PF 1170 */ 1171 if (hw->partition_id != 1) { 1172 i40e_partition_setting_complaint(pf); 1173 return -EOPNOTSUPP; 1174 } 1175 if (vsi != pf->vsi[pf->lan_vsi]) 1176 return -EOPNOTSUPP; 1177 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1178 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1179 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1180 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1181 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1182 return -EOPNOTSUPP; 1183 if (hw->device_id == I40E_DEV_ID_KX_B || 1184 hw->device_id == I40E_DEV_ID_KX_C || 1185 hw->device_id == I40E_DEV_ID_20G_KR2 || 1186 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1187 hw->device_id == I40E_DEV_ID_25G_B || 1188 hw->device_id == I40E_DEV_ID_KX_X722) { 1189 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1190 return -EOPNOTSUPP; 1191 } 1192 1193 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1194 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1195 1196 /* save autoneg out of ksettings */ 1197 autoneg = copy_ks.base.autoneg; 1198 1199 /* get our own copy of the bits to check against */ 1200 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1201 safe_ks.base.cmd = copy_ks.base.cmd; 1202 safe_ks.base.link_mode_masks_nwords = 1203 copy_ks.base.link_mode_masks_nwords; 1204 i40e_get_link_ksettings(netdev, &safe_ks); 1205 1206 /* Get link modes supported by hardware and check against modes 1207 * requested by the user. Return an error if unsupported mode was set. 1208 */ 1209 if (!bitmap_subset(copy_ks.link_modes.advertising, 1210 safe_ks.link_modes.supported, 1211 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1212 return -EINVAL; 1213 1214 /* set autoneg back to what it currently is */ 1215 copy_ks.base.autoneg = safe_ks.base.autoneg; 1216 1217 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1218 * trying to set something that we do not support. 1219 */ 1220 if (memcmp(©_ks.base, &safe_ks.base, 1221 sizeof(struct ethtool_link_settings))) 1222 return -EOPNOTSUPP; 1223 1224 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1225 timeout--; 1226 if (!timeout) 1227 return -EBUSY; 1228 usleep_range(1000, 2000); 1229 } 1230 1231 /* Get the current phy config */ 1232 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1233 NULL); 1234 if (status) { 1235 err = -EAGAIN; 1236 goto done; 1237 } 1238 1239 /* Copy abilities to config in case autoneg is not 1240 * set below 1241 */ 1242 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1243 config.abilities = abilities.abilities; 1244 1245 /* Check autoneg */ 1246 if (autoneg == AUTONEG_ENABLE) { 1247 /* If autoneg was not already enabled */ 1248 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1249 /* If autoneg is not supported, return error */ 1250 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1251 supported, 1252 Autoneg)) { 1253 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1254 err = -EINVAL; 1255 goto done; 1256 } 1257 /* Autoneg is allowed to change */ 1258 config.abilities = abilities.abilities | 1259 I40E_AQ_PHY_ENABLE_AN; 1260 autoneg_changed = true; 1261 } 1262 } else { 1263 /* If autoneg is currently enabled */ 1264 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1265 /* If autoneg is supported 10GBASE_T is the only PHY 1266 * that can disable it, so otherwise return error 1267 */ 1268 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1269 supported, 1270 Autoneg) && 1271 hw->phy.media_type != I40E_MEDIA_TYPE_BASET) { 1272 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1273 err = -EINVAL; 1274 goto done; 1275 } 1276 /* Autoneg is allowed to change */ 1277 config.abilities = abilities.abilities & 1278 ~I40E_AQ_PHY_ENABLE_AN; 1279 autoneg_changed = true; 1280 } 1281 } 1282 1283 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1284 100baseT_Full)) 1285 config.link_speed |= I40E_LINK_SPEED_100MB; 1286 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1287 1000baseT_Full) || 1288 ethtool_link_ksettings_test_link_mode(ks, advertising, 1289 1000baseX_Full) || 1290 ethtool_link_ksettings_test_link_mode(ks, advertising, 1291 1000baseKX_Full)) 1292 config.link_speed |= I40E_LINK_SPEED_1GB; 1293 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1294 10000baseT_Full) || 1295 ethtool_link_ksettings_test_link_mode(ks, advertising, 1296 10000baseKX4_Full) || 1297 ethtool_link_ksettings_test_link_mode(ks, advertising, 1298 10000baseKR_Full) || 1299 ethtool_link_ksettings_test_link_mode(ks, advertising, 1300 10000baseCR_Full) || 1301 ethtool_link_ksettings_test_link_mode(ks, advertising, 1302 10000baseSR_Full) || 1303 ethtool_link_ksettings_test_link_mode(ks, advertising, 1304 10000baseLR_Full)) 1305 config.link_speed |= I40E_LINK_SPEED_10GB; 1306 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1307 2500baseT_Full)) 1308 config.link_speed |= I40E_LINK_SPEED_2_5GB; 1309 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1310 5000baseT_Full)) 1311 config.link_speed |= I40E_LINK_SPEED_5GB; 1312 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1313 20000baseKR2_Full)) 1314 config.link_speed |= I40E_LINK_SPEED_20GB; 1315 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1316 25000baseCR_Full) || 1317 ethtool_link_ksettings_test_link_mode(ks, advertising, 1318 25000baseKR_Full) || 1319 ethtool_link_ksettings_test_link_mode(ks, advertising, 1320 25000baseSR_Full)) 1321 config.link_speed |= I40E_LINK_SPEED_25GB; 1322 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1323 40000baseKR4_Full) || 1324 ethtool_link_ksettings_test_link_mode(ks, advertising, 1325 40000baseCR4_Full) || 1326 ethtool_link_ksettings_test_link_mode(ks, advertising, 1327 40000baseSR4_Full) || 1328 ethtool_link_ksettings_test_link_mode(ks, advertising, 1329 40000baseLR4_Full)) 1330 config.link_speed |= I40E_LINK_SPEED_40GB; 1331 1332 /* If speed didn't get set, set it to what it currently is. 1333 * This is needed because if advertise is 0 (as it is when autoneg 1334 * is disabled) then speed won't get set. 1335 */ 1336 if (!config.link_speed) 1337 config.link_speed = abilities.link_speed; 1338 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1339 /* copy over the rest of the abilities */ 1340 config.phy_type = abilities.phy_type; 1341 config.phy_type_ext = abilities.phy_type_ext; 1342 config.eee_capability = abilities.eee_capability; 1343 config.eeer = abilities.eeer_val; 1344 config.low_power_ctrl = abilities.d3_lpan; 1345 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1346 I40E_AQ_PHY_FEC_CONFIG_MASK; 1347 1348 /* save the requested speeds */ 1349 hw->phy.link_info.requested_speeds = config.link_speed; 1350 /* set link and auto negotiation so changes take effect */ 1351 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1352 /* If link is up put link down */ 1353 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1354 /* Tell the OS link is going down, the link will go 1355 * back up when fw says it is ready asynchronously 1356 */ 1357 i40e_print_link_message(vsi, false); 1358 netif_carrier_off(netdev); 1359 netif_tx_stop_all_queues(netdev); 1360 } 1361 1362 /* make the aq call */ 1363 status = i40e_aq_set_phy_config(hw, &config, NULL); 1364 if (status) { 1365 netdev_info(netdev, 1366 "Set phy config failed, err %s aq_err %s\n", 1367 i40e_stat_str(hw, status), 1368 i40e_aq_str(hw, hw->aq.asq_last_status)); 1369 err = -EAGAIN; 1370 goto done; 1371 } 1372 1373 status = i40e_update_link_info(hw); 1374 if (status) 1375 netdev_dbg(netdev, 1376 "Updating link info failed with err %s aq_err %s\n", 1377 i40e_stat_str(hw, status), 1378 i40e_aq_str(hw, hw->aq.asq_last_status)); 1379 1380 } else { 1381 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1382 } 1383 1384 done: 1385 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1386 1387 return err; 1388 } 1389 1390 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1391 { 1392 struct i40e_netdev_priv *np = netdev_priv(netdev); 1393 struct i40e_aq_get_phy_abilities_resp abilities; 1394 struct i40e_pf *pf = np->vsi->back; 1395 struct i40e_hw *hw = &pf->hw; 1396 i40e_status status = 0; 1397 u32 flags = 0; 1398 int err = 0; 1399 1400 flags = READ_ONCE(pf->flags); 1401 i40e_set_fec_in_flags(fec_cfg, &flags); 1402 1403 /* Get the current phy config */ 1404 memset(&abilities, 0, sizeof(abilities)); 1405 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1406 NULL); 1407 if (status) { 1408 err = -EAGAIN; 1409 goto done; 1410 } 1411 1412 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1413 struct i40e_aq_set_phy_config config; 1414 1415 memset(&config, 0, sizeof(config)); 1416 config.phy_type = abilities.phy_type; 1417 config.abilities = abilities.abilities | 1418 I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1419 config.phy_type_ext = abilities.phy_type_ext; 1420 config.link_speed = abilities.link_speed; 1421 config.eee_capability = abilities.eee_capability; 1422 config.eeer = abilities.eeer_val; 1423 config.low_power_ctrl = abilities.d3_lpan; 1424 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1425 status = i40e_aq_set_phy_config(hw, &config, NULL); 1426 if (status) { 1427 netdev_info(netdev, 1428 "Set phy config failed, err %s aq_err %s\n", 1429 i40e_stat_str(hw, status), 1430 i40e_aq_str(hw, hw->aq.asq_last_status)); 1431 err = -EAGAIN; 1432 goto done; 1433 } 1434 pf->flags = flags; 1435 status = i40e_update_link_info(hw); 1436 if (status) 1437 /* debug level message only due to relation to the link 1438 * itself rather than to the FEC settings 1439 * (e.g. no physical connection etc.) 1440 */ 1441 netdev_dbg(netdev, 1442 "Updating link info failed with err %s aq_err %s\n", 1443 i40e_stat_str(hw, status), 1444 i40e_aq_str(hw, hw->aq.asq_last_status)); 1445 } 1446 1447 done: 1448 return err; 1449 } 1450 1451 static int i40e_get_fec_param(struct net_device *netdev, 1452 struct ethtool_fecparam *fecparam) 1453 { 1454 struct i40e_netdev_priv *np = netdev_priv(netdev); 1455 struct i40e_aq_get_phy_abilities_resp abilities; 1456 struct i40e_pf *pf = np->vsi->back; 1457 struct i40e_hw *hw = &pf->hw; 1458 i40e_status status = 0; 1459 int err = 0; 1460 u8 fec_cfg; 1461 1462 /* Get the current phy config */ 1463 memset(&abilities, 0, sizeof(abilities)); 1464 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1465 NULL); 1466 if (status) { 1467 err = -EAGAIN; 1468 goto done; 1469 } 1470 1471 fecparam->fec = 0; 1472 fec_cfg = abilities.fec_cfg_curr_mod_ext_info; 1473 if (fec_cfg & I40E_AQ_SET_FEC_AUTO) 1474 fecparam->fec |= ETHTOOL_FEC_AUTO; 1475 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS | 1476 I40E_AQ_SET_FEC_ABILITY_RS)) 1477 fecparam->fec |= ETHTOOL_FEC_RS; 1478 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR | 1479 I40E_AQ_SET_FEC_ABILITY_KR)) 1480 fecparam->fec |= ETHTOOL_FEC_BASER; 1481 if (fec_cfg == 0) 1482 fecparam->fec |= ETHTOOL_FEC_OFF; 1483 1484 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1485 fecparam->active_fec = ETHTOOL_FEC_BASER; 1486 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1487 fecparam->active_fec = ETHTOOL_FEC_RS; 1488 else 1489 fecparam->active_fec = ETHTOOL_FEC_OFF; 1490 done: 1491 return err; 1492 } 1493 1494 static int i40e_set_fec_param(struct net_device *netdev, 1495 struct ethtool_fecparam *fecparam) 1496 { 1497 struct i40e_netdev_priv *np = netdev_priv(netdev); 1498 struct i40e_pf *pf = np->vsi->back; 1499 struct i40e_hw *hw = &pf->hw; 1500 u8 fec_cfg = 0; 1501 1502 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1503 hw->device_id != I40E_DEV_ID_25G_B && 1504 hw->device_id != I40E_DEV_ID_KX_X722) 1505 return -EPERM; 1506 1507 if (hw->mac.type == I40E_MAC_X722 && 1508 !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) { 1509 netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n"); 1510 return -EOPNOTSUPP; 1511 } 1512 1513 switch (fecparam->fec) { 1514 case ETHTOOL_FEC_AUTO: 1515 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1516 break; 1517 case ETHTOOL_FEC_RS: 1518 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1519 I40E_AQ_SET_FEC_ABILITY_RS); 1520 break; 1521 case ETHTOOL_FEC_BASER: 1522 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1523 I40E_AQ_SET_FEC_ABILITY_KR); 1524 break; 1525 case ETHTOOL_FEC_OFF: 1526 case ETHTOOL_FEC_NONE: 1527 fec_cfg = 0; 1528 break; 1529 default: 1530 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1531 fecparam->fec); 1532 return -EINVAL; 1533 } 1534 1535 return i40e_set_fec_cfg(netdev, fec_cfg); 1536 } 1537 1538 static int i40e_nway_reset(struct net_device *netdev) 1539 { 1540 /* restart autonegotiation */ 1541 struct i40e_netdev_priv *np = netdev_priv(netdev); 1542 struct i40e_pf *pf = np->vsi->back; 1543 struct i40e_hw *hw = &pf->hw; 1544 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1545 i40e_status ret = 0; 1546 1547 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1548 if (ret) { 1549 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1550 i40e_stat_str(hw, ret), 1551 i40e_aq_str(hw, hw->aq.asq_last_status)); 1552 return -EIO; 1553 } 1554 1555 return 0; 1556 } 1557 1558 /** 1559 * i40e_get_pauseparam - Get Flow Control status 1560 * @netdev: netdevice structure 1561 * @pause: buffer to return pause parameters 1562 * 1563 * Return tx/rx-pause status 1564 **/ 1565 static void i40e_get_pauseparam(struct net_device *netdev, 1566 struct ethtool_pauseparam *pause) 1567 { 1568 struct i40e_netdev_priv *np = netdev_priv(netdev); 1569 struct i40e_pf *pf = np->vsi->back; 1570 struct i40e_hw *hw = &pf->hw; 1571 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1572 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1573 1574 pause->autoneg = 1575 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1576 AUTONEG_ENABLE : AUTONEG_DISABLE); 1577 1578 /* PFC enabled so report LFC as off */ 1579 if (dcbx_cfg->pfc.pfcenable) { 1580 pause->rx_pause = 0; 1581 pause->tx_pause = 0; 1582 return; 1583 } 1584 1585 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1586 pause->rx_pause = 1; 1587 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1588 pause->tx_pause = 1; 1589 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1590 pause->rx_pause = 1; 1591 pause->tx_pause = 1; 1592 } 1593 } 1594 1595 /** 1596 * i40e_set_pauseparam - Set Flow Control parameter 1597 * @netdev: network interface device structure 1598 * @pause: return tx/rx flow control status 1599 **/ 1600 static int i40e_set_pauseparam(struct net_device *netdev, 1601 struct ethtool_pauseparam *pause) 1602 { 1603 struct i40e_netdev_priv *np = netdev_priv(netdev); 1604 struct i40e_pf *pf = np->vsi->back; 1605 struct i40e_vsi *vsi = np->vsi; 1606 struct i40e_hw *hw = &pf->hw; 1607 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1608 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1609 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1610 i40e_status status; 1611 u8 aq_failures; 1612 int err = 0; 1613 u32 is_an; 1614 1615 /* Changing the port's flow control is not supported if this isn't the 1616 * port's controlling PF 1617 */ 1618 if (hw->partition_id != 1) { 1619 i40e_partition_setting_complaint(pf); 1620 return -EOPNOTSUPP; 1621 } 1622 1623 if (vsi != pf->vsi[pf->lan_vsi]) 1624 return -EOPNOTSUPP; 1625 1626 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1627 if (pause->autoneg != is_an) { 1628 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1629 return -EOPNOTSUPP; 1630 } 1631 1632 /* If we have link and don't have autoneg */ 1633 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1634 /* Send message that it might not necessarily work*/ 1635 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1636 } 1637 1638 if (dcbx_cfg->pfc.pfcenable) { 1639 netdev_info(netdev, 1640 "Priority flow control enabled. Cannot set link flow control.\n"); 1641 return -EOPNOTSUPP; 1642 } 1643 1644 if (pause->rx_pause && pause->tx_pause) 1645 hw->fc.requested_mode = I40E_FC_FULL; 1646 else if (pause->rx_pause && !pause->tx_pause) 1647 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1648 else if (!pause->rx_pause && pause->tx_pause) 1649 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1650 else if (!pause->rx_pause && !pause->tx_pause) 1651 hw->fc.requested_mode = I40E_FC_NONE; 1652 else 1653 return -EINVAL; 1654 1655 /* Tell the OS link is going down, the link will go back up when fw 1656 * says it is ready asynchronously 1657 */ 1658 i40e_print_link_message(vsi, false); 1659 netif_carrier_off(netdev); 1660 netif_tx_stop_all_queues(netdev); 1661 1662 /* Set the fc mode and only restart an if link is up*/ 1663 status = i40e_set_fc(hw, &aq_failures, link_up); 1664 1665 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1666 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1667 i40e_stat_str(hw, status), 1668 i40e_aq_str(hw, hw->aq.asq_last_status)); 1669 err = -EAGAIN; 1670 } 1671 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1672 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1673 i40e_stat_str(hw, status), 1674 i40e_aq_str(hw, hw->aq.asq_last_status)); 1675 err = -EAGAIN; 1676 } 1677 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1678 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1679 i40e_stat_str(hw, status), 1680 i40e_aq_str(hw, hw->aq.asq_last_status)); 1681 err = -EAGAIN; 1682 } 1683 1684 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1685 /* Give it a little more time to try to come back */ 1686 msleep(75); 1687 if (!test_bit(__I40E_DOWN, pf->state)) 1688 return i40e_nway_reset(netdev); 1689 } 1690 1691 return err; 1692 } 1693 1694 static u32 i40e_get_msglevel(struct net_device *netdev) 1695 { 1696 struct i40e_netdev_priv *np = netdev_priv(netdev); 1697 struct i40e_pf *pf = np->vsi->back; 1698 u32 debug_mask = pf->hw.debug_mask; 1699 1700 if (debug_mask) 1701 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1702 1703 return pf->msg_enable; 1704 } 1705 1706 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1707 { 1708 struct i40e_netdev_priv *np = netdev_priv(netdev); 1709 struct i40e_pf *pf = np->vsi->back; 1710 1711 if (I40E_DEBUG_USER & data) 1712 pf->hw.debug_mask = data; 1713 else 1714 pf->msg_enable = data; 1715 } 1716 1717 static int i40e_get_regs_len(struct net_device *netdev) 1718 { 1719 int reg_count = 0; 1720 int i; 1721 1722 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1723 reg_count += i40e_reg_list[i].elements; 1724 1725 return reg_count * sizeof(u32); 1726 } 1727 1728 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1729 void *p) 1730 { 1731 struct i40e_netdev_priv *np = netdev_priv(netdev); 1732 struct i40e_pf *pf = np->vsi->back; 1733 struct i40e_hw *hw = &pf->hw; 1734 u32 *reg_buf = p; 1735 unsigned int i, j, ri; 1736 u32 reg; 1737 1738 /* Tell ethtool which driver-version-specific regs output we have. 1739 * 1740 * At some point, if we have ethtool doing special formatting of 1741 * this data, it will rely on this version number to know how to 1742 * interpret things. Hence, this needs to be updated if/when the 1743 * diags register table is changed. 1744 */ 1745 regs->version = 1; 1746 1747 /* loop through the diags reg table for what to print */ 1748 ri = 0; 1749 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1750 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1751 reg = i40e_reg_list[i].offset 1752 + (j * i40e_reg_list[i].stride); 1753 reg_buf[ri++] = rd32(hw, reg); 1754 } 1755 } 1756 1757 } 1758 1759 static int i40e_get_eeprom(struct net_device *netdev, 1760 struct ethtool_eeprom *eeprom, u8 *bytes) 1761 { 1762 struct i40e_netdev_priv *np = netdev_priv(netdev); 1763 struct i40e_hw *hw = &np->vsi->back->hw; 1764 struct i40e_pf *pf = np->vsi->back; 1765 int ret_val = 0, len, offset; 1766 u8 *eeprom_buff; 1767 u16 i, sectors; 1768 bool last; 1769 u32 magic; 1770 1771 #define I40E_NVM_SECTOR_SIZE 4096 1772 if (eeprom->len == 0) 1773 return -EINVAL; 1774 1775 /* check for NVMUpdate access method */ 1776 magic = hw->vendor_id | (hw->device_id << 16); 1777 if (eeprom->magic && eeprom->magic != magic) { 1778 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1779 int errno = 0; 1780 1781 /* make sure it is the right magic for NVMUpdate */ 1782 if ((eeprom->magic >> 16) != hw->device_id) 1783 errno = -EINVAL; 1784 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1785 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1786 errno = -EBUSY; 1787 else 1788 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1789 1790 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1791 dev_info(&pf->pdev->dev, 1792 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1793 ret_val, hw->aq.asq_last_status, errno, 1794 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1795 cmd->offset, cmd->data_size); 1796 1797 return errno; 1798 } 1799 1800 /* normal ethtool get_eeprom support */ 1801 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1802 1803 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1804 if (!eeprom_buff) 1805 return -ENOMEM; 1806 1807 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1808 if (ret_val) { 1809 dev_info(&pf->pdev->dev, 1810 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1811 ret_val, hw->aq.asq_last_status); 1812 goto free_buff; 1813 } 1814 1815 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1816 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1817 len = I40E_NVM_SECTOR_SIZE; 1818 last = false; 1819 for (i = 0; i < sectors; i++) { 1820 if (i == (sectors - 1)) { 1821 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1822 last = true; 1823 } 1824 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1825 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1826 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1827 last, NULL); 1828 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1829 dev_info(&pf->pdev->dev, 1830 "read NVM failed, invalid offset 0x%x\n", 1831 offset); 1832 break; 1833 } else if (ret_val && 1834 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1835 dev_info(&pf->pdev->dev, 1836 "read NVM failed, access, offset 0x%x\n", 1837 offset); 1838 break; 1839 } else if (ret_val) { 1840 dev_info(&pf->pdev->dev, 1841 "read NVM failed offset %d err=%d status=0x%x\n", 1842 offset, ret_val, hw->aq.asq_last_status); 1843 break; 1844 } 1845 } 1846 1847 i40e_release_nvm(hw); 1848 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1849 free_buff: 1850 kfree(eeprom_buff); 1851 return ret_val; 1852 } 1853 1854 static int i40e_get_eeprom_len(struct net_device *netdev) 1855 { 1856 struct i40e_netdev_priv *np = netdev_priv(netdev); 1857 struct i40e_hw *hw = &np->vsi->back->hw; 1858 u32 val; 1859 1860 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1861 if (hw->mac.type == I40E_MAC_X722) { 1862 val = X722_EEPROM_SCOPE_LIMIT + 1; 1863 return val; 1864 } 1865 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1866 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1867 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1868 /* register returns value in power of 2, 64Kbyte chunks. */ 1869 val = (64 * 1024) * BIT(val); 1870 return val; 1871 } 1872 1873 static int i40e_set_eeprom(struct net_device *netdev, 1874 struct ethtool_eeprom *eeprom, u8 *bytes) 1875 { 1876 struct i40e_netdev_priv *np = netdev_priv(netdev); 1877 struct i40e_hw *hw = &np->vsi->back->hw; 1878 struct i40e_pf *pf = np->vsi->back; 1879 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1880 int ret_val = 0; 1881 int errno = 0; 1882 u32 magic; 1883 1884 /* normal ethtool set_eeprom is not supported */ 1885 magic = hw->vendor_id | (hw->device_id << 16); 1886 if (eeprom->magic == magic) 1887 errno = -EOPNOTSUPP; 1888 /* check for NVMUpdate access method */ 1889 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1890 errno = -EINVAL; 1891 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1892 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1893 errno = -EBUSY; 1894 else 1895 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1896 1897 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1898 dev_info(&pf->pdev->dev, 1899 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1900 ret_val, hw->aq.asq_last_status, errno, 1901 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1902 cmd->offset, cmd->data_size); 1903 1904 return errno; 1905 } 1906 1907 static void i40e_get_drvinfo(struct net_device *netdev, 1908 struct ethtool_drvinfo *drvinfo) 1909 { 1910 struct i40e_netdev_priv *np = netdev_priv(netdev); 1911 struct i40e_vsi *vsi = np->vsi; 1912 struct i40e_pf *pf = vsi->back; 1913 1914 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1915 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1916 sizeof(drvinfo->fw_version)); 1917 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1918 sizeof(drvinfo->bus_info)); 1919 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1920 if (pf->hw.pf_id == 0) 1921 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1922 } 1923 1924 static void i40e_get_ringparam(struct net_device *netdev, 1925 struct ethtool_ringparam *ring, 1926 struct kernel_ethtool_ringparam *kernel_ring, 1927 struct netlink_ext_ack *extack) 1928 { 1929 struct i40e_netdev_priv *np = netdev_priv(netdev); 1930 struct i40e_pf *pf = np->vsi->back; 1931 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1932 1933 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1934 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1935 ring->rx_mini_max_pending = 0; 1936 ring->rx_jumbo_max_pending = 0; 1937 ring->rx_pending = vsi->rx_rings[0]->count; 1938 ring->tx_pending = vsi->tx_rings[0]->count; 1939 ring->rx_mini_pending = 0; 1940 ring->rx_jumbo_pending = 0; 1941 } 1942 1943 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1944 { 1945 if (i40e_enabled_xdp_vsi(vsi)) { 1946 return index < vsi->num_queue_pairs || 1947 (index >= vsi->alloc_queue_pairs && 1948 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1949 } 1950 1951 return index < vsi->num_queue_pairs; 1952 } 1953 1954 static int i40e_set_ringparam(struct net_device *netdev, 1955 struct ethtool_ringparam *ring, 1956 struct kernel_ethtool_ringparam *kernel_ring, 1957 struct netlink_ext_ack *extack) 1958 { 1959 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1960 struct i40e_netdev_priv *np = netdev_priv(netdev); 1961 struct i40e_hw *hw = &np->vsi->back->hw; 1962 struct i40e_vsi *vsi = np->vsi; 1963 struct i40e_pf *pf = vsi->back; 1964 u32 new_rx_count, new_tx_count; 1965 u16 tx_alloc_queue_pairs; 1966 int timeout = 50; 1967 int i, err = 0; 1968 1969 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1970 return -EINVAL; 1971 1972 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1973 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1974 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1975 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1976 netdev_info(netdev, 1977 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1978 ring->tx_pending, ring->rx_pending, 1979 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1980 return -EINVAL; 1981 } 1982 1983 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1984 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1985 1986 /* if nothing to do return success */ 1987 if ((new_tx_count == vsi->tx_rings[0]->count) && 1988 (new_rx_count == vsi->rx_rings[0]->count)) 1989 return 0; 1990 1991 /* If there is a AF_XDP page pool attached to any of Rx rings, 1992 * disallow changing the number of descriptors -- regardless 1993 * if the netdev is running or not. 1994 */ 1995 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1996 return -EBUSY; 1997 1998 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1999 timeout--; 2000 if (!timeout) 2001 return -EBUSY; 2002 usleep_range(1000, 2000); 2003 } 2004 2005 if (!netif_running(vsi->netdev)) { 2006 /* simple case - set for the next time the netdev is started */ 2007 for (i = 0; i < vsi->num_queue_pairs; i++) { 2008 vsi->tx_rings[i]->count = new_tx_count; 2009 vsi->rx_rings[i]->count = new_rx_count; 2010 if (i40e_enabled_xdp_vsi(vsi)) 2011 vsi->xdp_rings[i]->count = new_tx_count; 2012 } 2013 vsi->num_tx_desc = new_tx_count; 2014 vsi->num_rx_desc = new_rx_count; 2015 goto done; 2016 } 2017 2018 /* We can't just free everything and then setup again, 2019 * because the ISRs in MSI-X mode get passed pointers 2020 * to the Tx and Rx ring structs. 2021 */ 2022 2023 /* alloc updated Tx and XDP Tx resources */ 2024 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 2025 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 2026 if (new_tx_count != vsi->tx_rings[0]->count) { 2027 netdev_info(netdev, 2028 "Changing Tx descriptor count from %d to %d.\n", 2029 vsi->tx_rings[0]->count, new_tx_count); 2030 tx_rings = kcalloc(tx_alloc_queue_pairs, 2031 sizeof(struct i40e_ring), GFP_KERNEL); 2032 if (!tx_rings) { 2033 err = -ENOMEM; 2034 goto done; 2035 } 2036 2037 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2038 if (!i40e_active_tx_ring_index(vsi, i)) 2039 continue; 2040 2041 tx_rings[i] = *vsi->tx_rings[i]; 2042 tx_rings[i].count = new_tx_count; 2043 /* the desc and bi pointers will be reallocated in the 2044 * setup call 2045 */ 2046 tx_rings[i].desc = NULL; 2047 tx_rings[i].rx_bi = NULL; 2048 err = i40e_setup_tx_descriptors(&tx_rings[i]); 2049 if (err) { 2050 while (i) { 2051 i--; 2052 if (!i40e_active_tx_ring_index(vsi, i)) 2053 continue; 2054 i40e_free_tx_resources(&tx_rings[i]); 2055 } 2056 kfree(tx_rings); 2057 tx_rings = NULL; 2058 2059 goto done; 2060 } 2061 } 2062 } 2063 2064 /* alloc updated Rx resources */ 2065 if (new_rx_count != vsi->rx_rings[0]->count) { 2066 netdev_info(netdev, 2067 "Changing Rx descriptor count from %d to %d\n", 2068 vsi->rx_rings[0]->count, new_rx_count); 2069 rx_rings = kcalloc(vsi->alloc_queue_pairs, 2070 sizeof(struct i40e_ring), GFP_KERNEL); 2071 if (!rx_rings) { 2072 err = -ENOMEM; 2073 goto free_tx; 2074 } 2075 2076 for (i = 0; i < vsi->num_queue_pairs; i++) { 2077 u16 unused; 2078 2079 /* clone ring and setup updated count */ 2080 rx_rings[i] = *vsi->rx_rings[i]; 2081 rx_rings[i].count = new_rx_count; 2082 /* the desc and bi pointers will be reallocated in the 2083 * setup call 2084 */ 2085 rx_rings[i].desc = NULL; 2086 rx_rings[i].rx_bi = NULL; 2087 /* Clear cloned XDP RX-queue info before setup call */ 2088 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2089 /* this is to allow wr32 to have something to write to 2090 * during early allocation of Rx buffers 2091 */ 2092 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2093 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2094 if (err) 2095 goto rx_unwind; 2096 err = i40e_alloc_rx_bi(&rx_rings[i]); 2097 if (err) 2098 goto rx_unwind; 2099 2100 /* now allocate the Rx buffers to make sure the OS 2101 * has enough memory, any failure here means abort 2102 */ 2103 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2104 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2105 rx_unwind: 2106 if (err) { 2107 do { 2108 i40e_free_rx_resources(&rx_rings[i]); 2109 } while (i--); 2110 kfree(rx_rings); 2111 rx_rings = NULL; 2112 2113 goto free_tx; 2114 } 2115 } 2116 } 2117 2118 /* Bring interface down, copy in the new ring info, 2119 * then restore the interface 2120 */ 2121 i40e_down(vsi); 2122 2123 if (tx_rings) { 2124 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2125 if (i40e_active_tx_ring_index(vsi, i)) { 2126 i40e_free_tx_resources(vsi->tx_rings[i]); 2127 *vsi->tx_rings[i] = tx_rings[i]; 2128 } 2129 } 2130 kfree(tx_rings); 2131 tx_rings = NULL; 2132 } 2133 2134 if (rx_rings) { 2135 for (i = 0; i < vsi->num_queue_pairs; i++) { 2136 i40e_free_rx_resources(vsi->rx_rings[i]); 2137 /* get the real tail offset */ 2138 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2139 /* this is to fake out the allocation routine 2140 * into thinking it has to realloc everything 2141 * but the recycling logic will let us re-use 2142 * the buffers allocated above 2143 */ 2144 rx_rings[i].next_to_use = 0; 2145 rx_rings[i].next_to_clean = 0; 2146 rx_rings[i].next_to_alloc = 0; 2147 /* do a struct copy */ 2148 *vsi->rx_rings[i] = rx_rings[i]; 2149 } 2150 kfree(rx_rings); 2151 rx_rings = NULL; 2152 } 2153 2154 vsi->num_tx_desc = new_tx_count; 2155 vsi->num_rx_desc = new_rx_count; 2156 i40e_up(vsi); 2157 2158 free_tx: 2159 /* error cleanup if the Rx allocations failed after getting Tx */ 2160 if (tx_rings) { 2161 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2162 if (i40e_active_tx_ring_index(vsi, i)) 2163 i40e_free_tx_resources(vsi->tx_rings[i]); 2164 } 2165 kfree(tx_rings); 2166 tx_rings = NULL; 2167 } 2168 2169 done: 2170 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2171 2172 return err; 2173 } 2174 2175 /** 2176 * i40e_get_stats_count - return the stats count for a device 2177 * @netdev: the netdev to return the count for 2178 * 2179 * Returns the total number of statistics for this netdev. Note that even 2180 * though this is a function, it is required that the count for a specific 2181 * netdev must never change. Basing the count on static values such as the 2182 * maximum number of queues or the device type is ok. However, the API for 2183 * obtaining stats is *not* safe against changes based on non-static 2184 * values such as the *current* number of queues, or runtime flags. 2185 * 2186 * If a statistic is not always enabled, return it as part of the count 2187 * anyways, always return its string, and report its value as zero. 2188 **/ 2189 static int i40e_get_stats_count(struct net_device *netdev) 2190 { 2191 struct i40e_netdev_priv *np = netdev_priv(netdev); 2192 struct i40e_vsi *vsi = np->vsi; 2193 struct i40e_pf *pf = vsi->back; 2194 int stats_len; 2195 2196 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 2197 stats_len = I40E_PF_STATS_LEN; 2198 else 2199 stats_len = I40E_VSI_STATS_LEN; 2200 2201 /* The number of stats reported for a given net_device must remain 2202 * constant throughout the life of that device. 2203 * 2204 * This is because the API for obtaining the size, strings, and stats 2205 * is spread out over three separate ethtool ioctls. There is no safe 2206 * way to lock the number of stats across these calls, so we must 2207 * assume that they will never change. 2208 * 2209 * Due to this, we report the maximum number of queues, even if not 2210 * every queue is currently configured. Since we always allocate 2211 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2212 * works because the num_tx_queues is set at device creation and never 2213 * changes. 2214 */ 2215 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2216 2217 return stats_len; 2218 } 2219 2220 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2221 { 2222 struct i40e_netdev_priv *np = netdev_priv(netdev); 2223 struct i40e_vsi *vsi = np->vsi; 2224 struct i40e_pf *pf = vsi->back; 2225 2226 switch (sset) { 2227 case ETH_SS_TEST: 2228 return I40E_TEST_LEN; 2229 case ETH_SS_STATS: 2230 return i40e_get_stats_count(netdev); 2231 case ETH_SS_PRIV_FLAGS: 2232 return I40E_PRIV_FLAGS_STR_LEN + 2233 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2234 default: 2235 return -EOPNOTSUPP; 2236 } 2237 } 2238 2239 /** 2240 * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure 2241 * @tc: the TC statistics in VEB structure (veb->tc_stats) 2242 * @i: the index of traffic class in (veb->tc_stats) structure to copy 2243 * 2244 * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to 2245 * one dimensional structure i40e_cp_veb_tc_stats. 2246 * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC 2247 * statistics for the given TC. 2248 **/ 2249 static struct i40e_cp_veb_tc_stats 2250 i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i) 2251 { 2252 struct i40e_cp_veb_tc_stats veb_tc = { 2253 .tc_rx_packets = tc->tc_rx_packets[i], 2254 .tc_rx_bytes = tc->tc_rx_bytes[i], 2255 .tc_tx_packets = tc->tc_tx_packets[i], 2256 .tc_tx_bytes = tc->tc_tx_bytes[i], 2257 }; 2258 2259 return veb_tc; 2260 } 2261 2262 /** 2263 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2264 * @pf: the PF device structure 2265 * @i: the priority value to copy 2266 * 2267 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2268 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2269 * of the PFC stats for the given priority. 2270 **/ 2271 static inline struct i40e_pfc_stats 2272 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2273 { 2274 #define I40E_GET_PFC_STAT(stat, priority) \ 2275 .stat = pf->stats.stat[priority] 2276 2277 struct i40e_pfc_stats pfc = { 2278 I40E_GET_PFC_STAT(priority_xon_rx, i), 2279 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2280 I40E_GET_PFC_STAT(priority_xon_tx, i), 2281 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2282 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2283 }; 2284 return pfc; 2285 } 2286 2287 /** 2288 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2289 * @netdev: the netdev to collect stats for 2290 * @stats: ethtool stats command structure 2291 * @data: ethtool supplied buffer 2292 * 2293 * Copy the stats values for this netdev into the buffer. Expects data to be 2294 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2295 * statistics must be copied in a static order, and the count must not change 2296 * for a given netdev. See i40e_get_stats_count for more details. 2297 * 2298 * If a statistic is not currently valid (such as a disabled queue), this 2299 * function reports its value as zero. 2300 **/ 2301 static void i40e_get_ethtool_stats(struct net_device *netdev, 2302 struct ethtool_stats *stats, u64 *data) 2303 { 2304 struct i40e_netdev_priv *np = netdev_priv(netdev); 2305 struct i40e_vsi *vsi = np->vsi; 2306 struct i40e_pf *pf = vsi->back; 2307 struct i40e_veb *veb = NULL; 2308 unsigned int i; 2309 bool veb_stats; 2310 u64 *p = data; 2311 2312 i40e_update_stats(vsi); 2313 2314 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2315 i40e_gstrings_net_stats); 2316 2317 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2318 2319 rcu_read_lock(); 2320 for (i = 0; i < netdev->num_tx_queues; i++) { 2321 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2322 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2323 } 2324 rcu_read_unlock(); 2325 2326 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2327 goto check_data_pointer; 2328 2329 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2330 (pf->lan_veb < I40E_MAX_VEB) && 2331 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2332 2333 if (veb_stats) { 2334 veb = pf->veb[pf->lan_veb]; 2335 i40e_update_veb_stats(veb); 2336 } 2337 2338 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2339 * we initialize stats to zero and update the data pointer 2340 * intelligently 2341 */ 2342 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2343 i40e_gstrings_veb_stats); 2344 2345 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2346 if (veb_stats) { 2347 struct i40e_cp_veb_tc_stats veb_tc = 2348 i40e_get_veb_tc_stats(&veb->tc_stats, i); 2349 2350 i40e_add_ethtool_stats(&data, &veb_tc, 2351 i40e_gstrings_veb_tc_stats); 2352 } else { 2353 i40e_add_ethtool_stats(&data, NULL, 2354 i40e_gstrings_veb_tc_stats); 2355 } 2356 2357 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2358 2359 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2360 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2361 2362 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2363 } 2364 2365 check_data_pointer: 2366 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2367 "ethtool stats count mismatch!"); 2368 } 2369 2370 /** 2371 * i40e_get_stat_strings - copy stat strings into supplied buffer 2372 * @netdev: the netdev to collect strings for 2373 * @data: supplied buffer to copy strings into 2374 * 2375 * Copy the strings related to stats for this netdev. Expects data to be 2376 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2377 * strings must be copied in a static order and the total count must not 2378 * change for a given netdev. See i40e_get_stats_count for more details. 2379 **/ 2380 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2381 { 2382 struct i40e_netdev_priv *np = netdev_priv(netdev); 2383 struct i40e_vsi *vsi = np->vsi; 2384 struct i40e_pf *pf = vsi->back; 2385 unsigned int i; 2386 u8 *p = data; 2387 2388 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2389 2390 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2391 2392 for (i = 0; i < netdev->num_tx_queues; i++) { 2393 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2394 "tx", i); 2395 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2396 "rx", i); 2397 } 2398 2399 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2400 goto check_data_pointer; 2401 2402 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2403 2404 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2405 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2406 2407 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2408 2409 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2410 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2411 2412 check_data_pointer: 2413 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2414 "stat strings count mismatch!"); 2415 } 2416 2417 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2418 { 2419 struct i40e_netdev_priv *np = netdev_priv(netdev); 2420 struct i40e_vsi *vsi = np->vsi; 2421 struct i40e_pf *pf = vsi->back; 2422 unsigned int i; 2423 u8 *p = data; 2424 2425 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) 2426 ethtool_sprintf(&p, i40e_gstrings_priv_flags[i].flag_string); 2427 if (pf->hw.pf_id != 0) 2428 return; 2429 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) 2430 ethtool_sprintf(&p, i40e_gl_gstrings_priv_flags[i].flag_string); 2431 } 2432 2433 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2434 u8 *data) 2435 { 2436 switch (stringset) { 2437 case ETH_SS_TEST: 2438 memcpy(data, i40e_gstrings_test, 2439 I40E_TEST_LEN * ETH_GSTRING_LEN); 2440 break; 2441 case ETH_SS_STATS: 2442 i40e_get_stat_strings(netdev, data); 2443 break; 2444 case ETH_SS_PRIV_FLAGS: 2445 i40e_get_priv_flag_strings(netdev, data); 2446 break; 2447 default: 2448 break; 2449 } 2450 } 2451 2452 static int i40e_get_ts_info(struct net_device *dev, 2453 struct ethtool_ts_info *info) 2454 { 2455 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2456 2457 /* only report HW timestamping if PTP is enabled */ 2458 if (!(pf->flags & I40E_FLAG_PTP)) 2459 return ethtool_op_get_ts_info(dev, info); 2460 2461 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2462 SOF_TIMESTAMPING_RX_SOFTWARE | 2463 SOF_TIMESTAMPING_SOFTWARE | 2464 SOF_TIMESTAMPING_TX_HARDWARE | 2465 SOF_TIMESTAMPING_RX_HARDWARE | 2466 SOF_TIMESTAMPING_RAW_HARDWARE; 2467 2468 if (pf->ptp_clock) 2469 info->phc_index = ptp_clock_index(pf->ptp_clock); 2470 else 2471 info->phc_index = -1; 2472 2473 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2474 2475 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2476 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2477 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2478 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2479 2480 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2481 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2482 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2483 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2484 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2485 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2486 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2487 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2488 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2489 2490 return 0; 2491 } 2492 2493 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2494 { 2495 struct i40e_netdev_priv *np = netdev_priv(netdev); 2496 struct i40e_pf *pf = np->vsi->back; 2497 i40e_status status; 2498 bool link_up = false; 2499 2500 netif_info(pf, hw, netdev, "link test\n"); 2501 status = i40e_get_link_status(&pf->hw, &link_up); 2502 if (status) { 2503 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2504 *data = 1; 2505 return *data; 2506 } 2507 2508 if (link_up) 2509 *data = 0; 2510 else 2511 *data = 1; 2512 2513 return *data; 2514 } 2515 2516 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2517 { 2518 struct i40e_netdev_priv *np = netdev_priv(netdev); 2519 struct i40e_pf *pf = np->vsi->back; 2520 2521 netif_info(pf, hw, netdev, "register test\n"); 2522 *data = i40e_diag_reg_test(&pf->hw); 2523 2524 return *data; 2525 } 2526 2527 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2528 { 2529 struct i40e_netdev_priv *np = netdev_priv(netdev); 2530 struct i40e_pf *pf = np->vsi->back; 2531 2532 netif_info(pf, hw, netdev, "eeprom test\n"); 2533 *data = i40e_diag_eeprom_test(&pf->hw); 2534 2535 /* forcebly clear the NVM Update state machine */ 2536 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2537 2538 return *data; 2539 } 2540 2541 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2542 { 2543 struct i40e_netdev_priv *np = netdev_priv(netdev); 2544 struct i40e_pf *pf = np->vsi->back; 2545 u16 swc_old = pf->sw_int_count; 2546 2547 netif_info(pf, hw, netdev, "interrupt test\n"); 2548 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2549 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2550 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2551 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2552 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2553 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2554 usleep_range(1000, 2000); 2555 *data = (swc_old == pf->sw_int_count); 2556 2557 return *data; 2558 } 2559 2560 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2561 { 2562 struct i40e_vf *vfs = pf->vf; 2563 int i; 2564 2565 for (i = 0; i < pf->num_alloc_vfs; i++) 2566 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2567 return true; 2568 return false; 2569 } 2570 2571 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2572 { 2573 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2574 } 2575 2576 static void i40e_diag_test(struct net_device *netdev, 2577 struct ethtool_test *eth_test, u64 *data) 2578 { 2579 struct i40e_netdev_priv *np = netdev_priv(netdev); 2580 bool if_running = netif_running(netdev); 2581 struct i40e_pf *pf = np->vsi->back; 2582 2583 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2584 /* Offline tests */ 2585 netif_info(pf, drv, netdev, "offline testing starting\n"); 2586 2587 set_bit(__I40E_TESTING, pf->state); 2588 2589 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 2590 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) { 2591 dev_warn(&pf->pdev->dev, 2592 "Cannot start offline testing when PF is in reset state.\n"); 2593 goto skip_ol_tests; 2594 } 2595 2596 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2597 dev_warn(&pf->pdev->dev, 2598 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2599 goto skip_ol_tests; 2600 } 2601 2602 /* If the device is online then take it offline */ 2603 if (if_running) 2604 /* indicate we're in test mode */ 2605 i40e_close(netdev); 2606 else 2607 /* This reset does not affect link - if it is 2608 * changed to a type of reset that does affect 2609 * link then the following link test would have 2610 * to be moved to before the reset 2611 */ 2612 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2613 2614 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2615 eth_test->flags |= ETH_TEST_FL_FAILED; 2616 2617 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2618 eth_test->flags |= ETH_TEST_FL_FAILED; 2619 2620 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2621 eth_test->flags |= ETH_TEST_FL_FAILED; 2622 2623 /* run reg test last, a reset is required after it */ 2624 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2625 eth_test->flags |= ETH_TEST_FL_FAILED; 2626 2627 clear_bit(__I40E_TESTING, pf->state); 2628 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2629 2630 if (if_running) 2631 i40e_open(netdev); 2632 } else { 2633 /* Online tests */ 2634 netif_info(pf, drv, netdev, "online testing starting\n"); 2635 2636 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2637 eth_test->flags |= ETH_TEST_FL_FAILED; 2638 2639 /* Offline only tests, not run in online; pass by default */ 2640 data[I40E_ETH_TEST_REG] = 0; 2641 data[I40E_ETH_TEST_EEPROM] = 0; 2642 data[I40E_ETH_TEST_INTR] = 0; 2643 } 2644 2645 netif_info(pf, drv, netdev, "testing finished\n"); 2646 return; 2647 2648 skip_ol_tests: 2649 data[I40E_ETH_TEST_REG] = 1; 2650 data[I40E_ETH_TEST_EEPROM] = 1; 2651 data[I40E_ETH_TEST_INTR] = 1; 2652 data[I40E_ETH_TEST_LINK] = 1; 2653 eth_test->flags |= ETH_TEST_FL_FAILED; 2654 clear_bit(__I40E_TESTING, pf->state); 2655 netif_info(pf, drv, netdev, "testing failed\n"); 2656 } 2657 2658 static void i40e_get_wol(struct net_device *netdev, 2659 struct ethtool_wolinfo *wol) 2660 { 2661 struct i40e_netdev_priv *np = netdev_priv(netdev); 2662 struct i40e_pf *pf = np->vsi->back; 2663 struct i40e_hw *hw = &pf->hw; 2664 u16 wol_nvm_bits; 2665 2666 /* NVM bit on means WoL disabled for the port */ 2667 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2668 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2669 wol->supported = 0; 2670 wol->wolopts = 0; 2671 } else { 2672 wol->supported = WAKE_MAGIC; 2673 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2674 } 2675 } 2676 2677 /** 2678 * i40e_set_wol - set the WakeOnLAN configuration 2679 * @netdev: the netdev in question 2680 * @wol: the ethtool WoL setting data 2681 **/ 2682 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2683 { 2684 struct i40e_netdev_priv *np = netdev_priv(netdev); 2685 struct i40e_pf *pf = np->vsi->back; 2686 struct i40e_vsi *vsi = np->vsi; 2687 struct i40e_hw *hw = &pf->hw; 2688 u16 wol_nvm_bits; 2689 2690 /* WoL not supported if this isn't the controlling PF on the port */ 2691 if (hw->partition_id != 1) { 2692 i40e_partition_setting_complaint(pf); 2693 return -EOPNOTSUPP; 2694 } 2695 2696 if (vsi != pf->vsi[pf->lan_vsi]) 2697 return -EOPNOTSUPP; 2698 2699 /* NVM bit on means WoL disabled for the port */ 2700 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2701 if (BIT(hw->port) & wol_nvm_bits) 2702 return -EOPNOTSUPP; 2703 2704 /* only magic packet is supported */ 2705 if (wol->wolopts & ~WAKE_MAGIC) 2706 return -EOPNOTSUPP; 2707 2708 /* is this a new value? */ 2709 if (pf->wol_en != !!wol->wolopts) { 2710 pf->wol_en = !!wol->wolopts; 2711 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2712 } 2713 2714 return 0; 2715 } 2716 2717 static int i40e_set_phys_id(struct net_device *netdev, 2718 enum ethtool_phys_id_state state) 2719 { 2720 struct i40e_netdev_priv *np = netdev_priv(netdev); 2721 i40e_status ret = 0; 2722 struct i40e_pf *pf = np->vsi->back; 2723 struct i40e_hw *hw = &pf->hw; 2724 int blink_freq = 2; 2725 u16 temp_status; 2726 2727 switch (state) { 2728 case ETHTOOL_ID_ACTIVE: 2729 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2730 pf->led_status = i40e_led_get(hw); 2731 } else { 2732 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2733 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2734 NULL); 2735 ret = i40e_led_get_phy(hw, &temp_status, 2736 &pf->phy_led_val); 2737 pf->led_status = temp_status; 2738 } 2739 return blink_freq; 2740 case ETHTOOL_ID_ON: 2741 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2742 i40e_led_set(hw, 0xf, false); 2743 else 2744 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2745 break; 2746 case ETHTOOL_ID_OFF: 2747 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2748 i40e_led_set(hw, 0x0, false); 2749 else 2750 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2751 break; 2752 case ETHTOOL_ID_INACTIVE: 2753 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2754 i40e_led_set(hw, pf->led_status, false); 2755 } else { 2756 ret = i40e_led_set_phy(hw, false, pf->led_status, 2757 (pf->phy_led_val | 2758 I40E_PHY_LED_MODE_ORIG)); 2759 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2760 i40e_aq_set_phy_debug(hw, 0, NULL); 2761 } 2762 break; 2763 default: 2764 break; 2765 } 2766 if (ret) 2767 return -ENOENT; 2768 else 2769 return 0; 2770 } 2771 2772 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2773 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2774 * 125us (8000 interrupts per second) == ITR(62) 2775 */ 2776 2777 /** 2778 * __i40e_get_coalesce - get per-queue coalesce settings 2779 * @netdev: the netdev to check 2780 * @ec: ethtool coalesce data structure 2781 * @queue: which queue to pick 2782 * 2783 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2784 * are per queue. If queue is <0 then we default to queue 0 as the 2785 * representative value. 2786 **/ 2787 static int __i40e_get_coalesce(struct net_device *netdev, 2788 struct ethtool_coalesce *ec, 2789 int queue) 2790 { 2791 struct i40e_netdev_priv *np = netdev_priv(netdev); 2792 struct i40e_ring *rx_ring, *tx_ring; 2793 struct i40e_vsi *vsi = np->vsi; 2794 2795 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2796 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2797 2798 /* rx and tx usecs has per queue value. If user doesn't specify the 2799 * queue, return queue 0's value to represent. 2800 */ 2801 if (queue < 0) 2802 queue = 0; 2803 else if (queue >= vsi->num_queue_pairs) 2804 return -EINVAL; 2805 2806 rx_ring = vsi->rx_rings[queue]; 2807 tx_ring = vsi->tx_rings[queue]; 2808 2809 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2810 ec->use_adaptive_rx_coalesce = 1; 2811 2812 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2813 ec->use_adaptive_tx_coalesce = 1; 2814 2815 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2816 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2817 2818 /* we use the _usecs_high to store/set the interrupt rate limit 2819 * that the hardware supports, that almost but not quite 2820 * fits the original intent of the ethtool variable, 2821 * the rx_coalesce_usecs_high limits total interrupts 2822 * per second from both tx/rx sources. 2823 */ 2824 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2825 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2826 2827 return 0; 2828 } 2829 2830 /** 2831 * i40e_get_coalesce - get a netdev's coalesce settings 2832 * @netdev: the netdev to check 2833 * @ec: ethtool coalesce data structure 2834 * @kernel_coal: ethtool CQE mode setting structure 2835 * @extack: extack for reporting error messages 2836 * 2837 * Gets the coalesce settings for a particular netdev. Note that if user has 2838 * modified per-queue settings, this only guarantees to represent queue 0. See 2839 * __i40e_get_coalesce for more details. 2840 **/ 2841 static int i40e_get_coalesce(struct net_device *netdev, 2842 struct ethtool_coalesce *ec, 2843 struct kernel_ethtool_coalesce *kernel_coal, 2844 struct netlink_ext_ack *extack) 2845 { 2846 return __i40e_get_coalesce(netdev, ec, -1); 2847 } 2848 2849 /** 2850 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2851 * @netdev: netdev structure 2852 * @ec: ethtool's coalesce settings 2853 * @queue: the particular queue to read 2854 * 2855 * Will read a specific queue's coalesce settings 2856 **/ 2857 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2858 struct ethtool_coalesce *ec) 2859 { 2860 return __i40e_get_coalesce(netdev, ec, queue); 2861 } 2862 2863 /** 2864 * i40e_set_itr_per_queue - set ITR values for specific queue 2865 * @vsi: the VSI to set values for 2866 * @ec: coalesce settings from ethtool 2867 * @queue: the queue to modify 2868 * 2869 * Change the ITR settings for a specific queue. 2870 **/ 2871 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2872 struct ethtool_coalesce *ec, 2873 int queue) 2874 { 2875 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2876 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2877 struct i40e_pf *pf = vsi->back; 2878 struct i40e_hw *hw = &pf->hw; 2879 struct i40e_q_vector *q_vector; 2880 u16 intrl; 2881 2882 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2883 2884 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2885 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2886 2887 if (ec->use_adaptive_rx_coalesce) 2888 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2889 else 2890 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2891 2892 if (ec->use_adaptive_tx_coalesce) 2893 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2894 else 2895 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2896 2897 q_vector = rx_ring->q_vector; 2898 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2899 2900 q_vector = tx_ring->q_vector; 2901 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2902 2903 /* The interrupt handler itself will take care of programming 2904 * the Tx and Rx ITR values based on the values we have entered 2905 * into the q_vector, no need to write the values now. 2906 */ 2907 2908 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2909 i40e_flush(hw); 2910 } 2911 2912 /** 2913 * __i40e_set_coalesce - set coalesce settings for particular queue 2914 * @netdev: the netdev to change 2915 * @ec: ethtool coalesce settings 2916 * @queue: the queue to change 2917 * 2918 * Sets the coalesce settings for a particular queue. 2919 **/ 2920 static int __i40e_set_coalesce(struct net_device *netdev, 2921 struct ethtool_coalesce *ec, 2922 int queue) 2923 { 2924 struct i40e_netdev_priv *np = netdev_priv(netdev); 2925 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2926 struct i40e_vsi *vsi = np->vsi; 2927 struct i40e_pf *pf = vsi->back; 2928 int i; 2929 2930 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2931 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2932 2933 if (queue < 0) { 2934 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2935 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2936 } else if (queue < vsi->num_queue_pairs) { 2937 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2938 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2939 } else { 2940 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2941 vsi->num_queue_pairs - 1); 2942 return -EINVAL; 2943 } 2944 2945 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2946 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2947 2948 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2949 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2950 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2951 return -EINVAL; 2952 } 2953 2954 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2955 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2956 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2957 return -EINVAL; 2958 } 2959 2960 if (ec->rx_coalesce_usecs != cur_rx_itr && 2961 ec->use_adaptive_rx_coalesce) { 2962 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2963 return -EINVAL; 2964 } 2965 2966 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2967 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2968 return -EINVAL; 2969 } 2970 2971 if (ec->tx_coalesce_usecs != cur_tx_itr && 2972 ec->use_adaptive_tx_coalesce) { 2973 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2974 return -EINVAL; 2975 } 2976 2977 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2978 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2979 return -EINVAL; 2980 } 2981 2982 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2983 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2984 2985 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2986 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2987 2988 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2989 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2990 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2991 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2992 vsi->int_rate_limit); 2993 } 2994 2995 /* rx and tx usecs has per queue value. If user doesn't specify the 2996 * queue, apply to all queues. 2997 */ 2998 if (queue < 0) { 2999 for (i = 0; i < vsi->num_queue_pairs; i++) 3000 i40e_set_itr_per_queue(vsi, ec, i); 3001 } else { 3002 i40e_set_itr_per_queue(vsi, ec, queue); 3003 } 3004 3005 return 0; 3006 } 3007 3008 /** 3009 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 3010 * @netdev: the netdev to change 3011 * @ec: ethtool coalesce settings 3012 * @kernel_coal: ethtool CQE mode setting structure 3013 * @extack: extack for reporting error messages 3014 * 3015 * This will set each queue to the same coalesce settings. 3016 **/ 3017 static int i40e_set_coalesce(struct net_device *netdev, 3018 struct ethtool_coalesce *ec, 3019 struct kernel_ethtool_coalesce *kernel_coal, 3020 struct netlink_ext_ack *extack) 3021 { 3022 return __i40e_set_coalesce(netdev, ec, -1); 3023 } 3024 3025 /** 3026 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 3027 * @netdev: the netdev to change 3028 * @ec: ethtool's coalesce settings 3029 * @queue: the queue to change 3030 * 3031 * Sets the specified queue's coalesce settings. 3032 **/ 3033 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 3034 struct ethtool_coalesce *ec) 3035 { 3036 return __i40e_set_coalesce(netdev, ec, queue); 3037 } 3038 3039 /** 3040 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 3041 * @pf: pointer to the physical function struct 3042 * @cmd: ethtool rxnfc command 3043 * 3044 * Returns Success if the flow is supported, else Invalid Input. 3045 **/ 3046 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 3047 { 3048 struct i40e_hw *hw = &pf->hw; 3049 u8 flow_pctype = 0; 3050 u64 i_set = 0; 3051 3052 cmd->data = 0; 3053 3054 switch (cmd->flow_type) { 3055 case TCP_V4_FLOW: 3056 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3057 break; 3058 case UDP_V4_FLOW: 3059 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3060 break; 3061 case TCP_V6_FLOW: 3062 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3063 break; 3064 case UDP_V6_FLOW: 3065 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3066 break; 3067 case SCTP_V4_FLOW: 3068 case AH_ESP_V4_FLOW: 3069 case AH_V4_FLOW: 3070 case ESP_V4_FLOW: 3071 case IPV4_FLOW: 3072 case SCTP_V6_FLOW: 3073 case AH_ESP_V6_FLOW: 3074 case AH_V6_FLOW: 3075 case ESP_V6_FLOW: 3076 case IPV6_FLOW: 3077 /* Default is src/dest for IP, no matter the L4 hashing */ 3078 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 3079 break; 3080 default: 3081 return -EINVAL; 3082 } 3083 3084 /* Read flow based hash input set register */ 3085 if (flow_pctype) { 3086 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3087 flow_pctype)) | 3088 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3089 flow_pctype)) << 32); 3090 } 3091 3092 /* Process bits of hash input set */ 3093 if (i_set) { 3094 if (i_set & I40E_L4_SRC_MASK) 3095 cmd->data |= RXH_L4_B_0_1; 3096 if (i_set & I40E_L4_DST_MASK) 3097 cmd->data |= RXH_L4_B_2_3; 3098 3099 if (cmd->flow_type == TCP_V4_FLOW || 3100 cmd->flow_type == UDP_V4_FLOW) { 3101 if (i_set & I40E_L3_SRC_MASK) 3102 cmd->data |= RXH_IP_SRC; 3103 if (i_set & I40E_L3_DST_MASK) 3104 cmd->data |= RXH_IP_DST; 3105 } else if (cmd->flow_type == TCP_V6_FLOW || 3106 cmd->flow_type == UDP_V6_FLOW) { 3107 if (i_set & I40E_L3_V6_SRC_MASK) 3108 cmd->data |= RXH_IP_SRC; 3109 if (i_set & I40E_L3_V6_DST_MASK) 3110 cmd->data |= RXH_IP_DST; 3111 } 3112 } 3113 3114 return 0; 3115 } 3116 3117 /** 3118 * i40e_check_mask - Check whether a mask field is set 3119 * @mask: the full mask value 3120 * @field: mask of the field to check 3121 * 3122 * If the given mask is fully set, return positive value. If the mask for the 3123 * field is fully unset, return zero. Otherwise return a negative error code. 3124 **/ 3125 static int i40e_check_mask(u64 mask, u64 field) 3126 { 3127 u64 value = mask & field; 3128 3129 if (value == field) 3130 return 1; 3131 else if (!value) 3132 return 0; 3133 else 3134 return -1; 3135 } 3136 3137 /** 3138 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3139 * @fsp: pointer to rx flow specification 3140 * @data: pointer to userdef data structure for storage 3141 * 3142 * Read the user-defined data and deconstruct the value into a structure. No 3143 * other code should read the user-defined data, so as to ensure that every 3144 * place consistently reads the value correctly. 3145 * 3146 * The user-defined field is a 64bit Big Endian format value, which we 3147 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3148 * be defined starting from the highest bits, while small bit field values 3149 * shall be defined starting from the lowest bits. 3150 * 3151 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3152 * and the filter should be rejected. The data structure will always be 3153 * modified even if FLOW_EXT is not set. 3154 * 3155 **/ 3156 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3157 struct i40e_rx_flow_userdef *data) 3158 { 3159 u64 value, mask; 3160 int valid; 3161 3162 /* Zero memory first so it's always consistent. */ 3163 memset(data, 0, sizeof(*data)); 3164 3165 if (!(fsp->flow_type & FLOW_EXT)) 3166 return 0; 3167 3168 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3169 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3170 3171 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3172 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3173 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3174 3175 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3176 if (valid < 0) { 3177 return -EINVAL; 3178 } else if (valid) { 3179 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3180 data->flex_offset = 3181 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 3182 data->flex_filter = true; 3183 } 3184 3185 return 0; 3186 } 3187 3188 /** 3189 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3190 * @fsp: pointer to rx_flow specification 3191 * @data: pointer to return userdef data 3192 * 3193 * Reads the userdef data structure and properly fills in the user defined 3194 * fields of the rx_flow_spec. 3195 **/ 3196 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3197 struct i40e_rx_flow_userdef *data) 3198 { 3199 u64 value = 0, mask = 0; 3200 3201 if (data->flex_filter) { 3202 value |= data->flex_word; 3203 value |= (u64)data->flex_offset << 16; 3204 mask |= I40E_USERDEF_FLEX_FILTER; 3205 } 3206 3207 if (value || mask) 3208 fsp->flow_type |= FLOW_EXT; 3209 3210 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3211 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3212 } 3213 3214 /** 3215 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3216 * @pf: Pointer to the physical function struct 3217 * @cmd: The command to get or set Rx flow classification rules 3218 * @rule_locs: Array of used rule locations 3219 * 3220 * This function populates both the total and actual rule count of 3221 * the ethtool flow classification command 3222 * 3223 * Returns 0 on success or -EMSGSIZE if entry not found 3224 **/ 3225 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3226 struct ethtool_rxnfc *cmd, 3227 u32 *rule_locs) 3228 { 3229 struct i40e_fdir_filter *rule; 3230 struct hlist_node *node2; 3231 int cnt = 0; 3232 3233 /* report total rule count */ 3234 cmd->data = i40e_get_fd_cnt_all(pf); 3235 3236 hlist_for_each_entry_safe(rule, node2, 3237 &pf->fdir_filter_list, fdir_node) { 3238 if (cnt == cmd->rule_cnt) 3239 return -EMSGSIZE; 3240 3241 rule_locs[cnt] = rule->fd_id; 3242 cnt++; 3243 } 3244 3245 cmd->rule_cnt = cnt; 3246 3247 return 0; 3248 } 3249 3250 /** 3251 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3252 * @pf: Pointer to the physical function struct 3253 * @cmd: The command to get or set Rx flow classification rules 3254 * 3255 * This function looks up a filter based on the Rx flow classification 3256 * command and fills the flow spec info for it if found 3257 * 3258 * Returns 0 on success or -EINVAL if filter not found 3259 **/ 3260 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3261 struct ethtool_rxnfc *cmd) 3262 { 3263 struct ethtool_rx_flow_spec *fsp = 3264 (struct ethtool_rx_flow_spec *)&cmd->fs; 3265 struct i40e_rx_flow_userdef userdef = {0}; 3266 struct i40e_fdir_filter *rule = NULL; 3267 struct hlist_node *node2; 3268 u64 input_set; 3269 u16 index; 3270 3271 hlist_for_each_entry_safe(rule, node2, 3272 &pf->fdir_filter_list, fdir_node) { 3273 if (fsp->location <= rule->fd_id) 3274 break; 3275 } 3276 3277 if (!rule || fsp->location != rule->fd_id) 3278 return -EINVAL; 3279 3280 fsp->flow_type = rule->flow_type; 3281 if (fsp->flow_type == IP_USER_FLOW) { 3282 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3283 fsp->h_u.usr_ip4_spec.proto = 0; 3284 fsp->m_u.usr_ip4_spec.proto = 0; 3285 } 3286 3287 if (fsp->flow_type == IPV6_USER_FLOW || 3288 fsp->flow_type == UDP_V6_FLOW || 3289 fsp->flow_type == TCP_V6_FLOW || 3290 fsp->flow_type == SCTP_V6_FLOW) { 3291 /* Reverse the src and dest notion, since the HW views them 3292 * from Tx perspective where as the user expects it from 3293 * Rx filter view. 3294 */ 3295 fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port; 3296 fsp->h_u.tcp_ip6_spec.pdst = rule->src_port; 3297 memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6, 3298 sizeof(__be32) * 4); 3299 memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6, 3300 sizeof(__be32) * 4); 3301 } else { 3302 /* Reverse the src and dest notion, since the HW views them 3303 * from Tx perspective where as the user expects it from 3304 * Rx filter view. 3305 */ 3306 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3307 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3308 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3309 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3310 } 3311 3312 switch (rule->flow_type) { 3313 case SCTP_V4_FLOW: 3314 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3315 break; 3316 case TCP_V4_FLOW: 3317 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3318 break; 3319 case UDP_V4_FLOW: 3320 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3321 break; 3322 case SCTP_V6_FLOW: 3323 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP; 3324 break; 3325 case TCP_V6_FLOW: 3326 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3327 break; 3328 case UDP_V6_FLOW: 3329 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3330 break; 3331 case IP_USER_FLOW: 3332 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3333 break; 3334 case IPV6_USER_FLOW: 3335 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER; 3336 break; 3337 default: 3338 /* If we have stored a filter with a flow type not listed here 3339 * it is almost certainly a driver bug. WARN(), and then 3340 * assign the input_set as if all fields are enabled to avoid 3341 * reading unassigned memory. 3342 */ 3343 WARN(1, "Missing input set index for flow_type %d\n", 3344 rule->flow_type); 3345 input_set = 0xFFFFFFFFFFFFFFFFULL; 3346 goto no_input_set; 3347 } 3348 3349 input_set = i40e_read_fd_input_set(pf, index); 3350 3351 no_input_set: 3352 if (input_set & I40E_L3_V6_SRC_MASK) { 3353 fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF); 3354 fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF); 3355 fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF); 3356 fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF); 3357 } 3358 3359 if (input_set & I40E_L3_V6_DST_MASK) { 3360 fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF); 3361 fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF); 3362 fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF); 3363 fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF); 3364 } 3365 3366 if (input_set & I40E_L3_SRC_MASK) 3367 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3368 3369 if (input_set & I40E_L3_DST_MASK) 3370 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3371 3372 if (input_set & I40E_L4_SRC_MASK) 3373 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3374 3375 if (input_set & I40E_L4_DST_MASK) 3376 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3377 3378 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3379 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3380 else 3381 fsp->ring_cookie = rule->q_index; 3382 3383 if (rule->vlan_tag) { 3384 fsp->h_ext.vlan_etype = rule->vlan_etype; 3385 fsp->m_ext.vlan_etype = htons(0xFFFF); 3386 fsp->h_ext.vlan_tci = rule->vlan_tag; 3387 fsp->m_ext.vlan_tci = htons(0xFFFF); 3388 fsp->flow_type |= FLOW_EXT; 3389 } 3390 3391 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3392 struct i40e_vsi *vsi; 3393 3394 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3395 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3396 /* VFs are zero-indexed by the driver, but ethtool 3397 * expects them to be one-indexed, so add one here 3398 */ 3399 u64 ring_vf = vsi->vf_id + 1; 3400 3401 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3402 fsp->ring_cookie |= ring_vf; 3403 } 3404 } 3405 3406 if (rule->flex_filter) { 3407 userdef.flex_filter = true; 3408 userdef.flex_word = be16_to_cpu(rule->flex_word); 3409 userdef.flex_offset = rule->flex_offset; 3410 } 3411 3412 i40e_fill_rx_flow_user_data(fsp, &userdef); 3413 3414 return 0; 3415 } 3416 3417 /** 3418 * i40e_get_rxnfc - command to get RX flow classification rules 3419 * @netdev: network interface device structure 3420 * @cmd: ethtool rxnfc command 3421 * @rule_locs: pointer to store rule data 3422 * 3423 * Returns Success if the command is supported. 3424 **/ 3425 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3426 u32 *rule_locs) 3427 { 3428 struct i40e_netdev_priv *np = netdev_priv(netdev); 3429 struct i40e_vsi *vsi = np->vsi; 3430 struct i40e_pf *pf = vsi->back; 3431 int ret = -EOPNOTSUPP; 3432 3433 switch (cmd->cmd) { 3434 case ETHTOOL_GRXRINGS: 3435 cmd->data = vsi->rss_size; 3436 ret = 0; 3437 break; 3438 case ETHTOOL_GRXFH: 3439 ret = i40e_get_rss_hash_opts(pf, cmd); 3440 break; 3441 case ETHTOOL_GRXCLSRLCNT: 3442 cmd->rule_cnt = pf->fdir_pf_active_filters; 3443 /* report total rule count */ 3444 cmd->data = i40e_get_fd_cnt_all(pf); 3445 ret = 0; 3446 break; 3447 case ETHTOOL_GRXCLSRULE: 3448 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3449 break; 3450 case ETHTOOL_GRXCLSRLALL: 3451 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3452 break; 3453 default: 3454 break; 3455 } 3456 3457 return ret; 3458 } 3459 3460 /** 3461 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3462 * @nfc: pointer to user request 3463 * @i_setc: bits currently set 3464 * 3465 * Returns value of bits to be set per user request 3466 **/ 3467 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3468 { 3469 u64 i_set = i_setc; 3470 u64 src_l3 = 0, dst_l3 = 0; 3471 3472 if (nfc->data & RXH_L4_B_0_1) 3473 i_set |= I40E_L4_SRC_MASK; 3474 else 3475 i_set &= ~I40E_L4_SRC_MASK; 3476 if (nfc->data & RXH_L4_B_2_3) 3477 i_set |= I40E_L4_DST_MASK; 3478 else 3479 i_set &= ~I40E_L4_DST_MASK; 3480 3481 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3482 src_l3 = I40E_L3_V6_SRC_MASK; 3483 dst_l3 = I40E_L3_V6_DST_MASK; 3484 } else if (nfc->flow_type == TCP_V4_FLOW || 3485 nfc->flow_type == UDP_V4_FLOW) { 3486 src_l3 = I40E_L3_SRC_MASK; 3487 dst_l3 = I40E_L3_DST_MASK; 3488 } else { 3489 /* Any other flow type are not supported here */ 3490 return i_set; 3491 } 3492 3493 if (nfc->data & RXH_IP_SRC) 3494 i_set |= src_l3; 3495 else 3496 i_set &= ~src_l3; 3497 if (nfc->data & RXH_IP_DST) 3498 i_set |= dst_l3; 3499 else 3500 i_set &= ~dst_l3; 3501 3502 return i_set; 3503 } 3504 3505 /** 3506 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3507 * @pf: pointer to the physical function struct 3508 * @nfc: ethtool rxnfc command 3509 * 3510 * Returns Success if the flow input set is supported. 3511 **/ 3512 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3513 { 3514 struct i40e_hw *hw = &pf->hw; 3515 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3516 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3517 u8 flow_pctype = 0; 3518 u64 i_set, i_setc; 3519 3520 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3521 dev_err(&pf->pdev->dev, 3522 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3523 return -EOPNOTSUPP; 3524 } 3525 3526 /* RSS does not support anything other than hashing 3527 * to queues on src and dst IPs and ports 3528 */ 3529 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3530 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3531 return -EINVAL; 3532 3533 switch (nfc->flow_type) { 3534 case TCP_V4_FLOW: 3535 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3536 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3537 hena |= 3538 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3539 break; 3540 case TCP_V6_FLOW: 3541 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3542 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3543 hena |= 3544 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3545 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3546 hena |= 3547 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3548 break; 3549 case UDP_V4_FLOW: 3550 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3551 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3552 hena |= 3553 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3554 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3555 3556 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3557 break; 3558 case UDP_V6_FLOW: 3559 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3560 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3561 hena |= 3562 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3563 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3564 3565 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3566 break; 3567 case AH_ESP_V4_FLOW: 3568 case AH_V4_FLOW: 3569 case ESP_V4_FLOW: 3570 case SCTP_V4_FLOW: 3571 if ((nfc->data & RXH_L4_B_0_1) || 3572 (nfc->data & RXH_L4_B_2_3)) 3573 return -EINVAL; 3574 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3575 break; 3576 case AH_ESP_V6_FLOW: 3577 case AH_V6_FLOW: 3578 case ESP_V6_FLOW: 3579 case SCTP_V6_FLOW: 3580 if ((nfc->data & RXH_L4_B_0_1) || 3581 (nfc->data & RXH_L4_B_2_3)) 3582 return -EINVAL; 3583 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3584 break; 3585 case IPV4_FLOW: 3586 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3587 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3588 break; 3589 case IPV6_FLOW: 3590 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3591 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3592 break; 3593 default: 3594 return -EINVAL; 3595 } 3596 3597 if (flow_pctype) { 3598 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3599 flow_pctype)) | 3600 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3601 flow_pctype)) << 32); 3602 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3603 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3604 (u32)i_set); 3605 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3606 (u32)(i_set >> 32)); 3607 hena |= BIT_ULL(flow_pctype); 3608 } 3609 3610 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3611 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3612 i40e_flush(hw); 3613 3614 return 0; 3615 } 3616 3617 /** 3618 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3619 * @vsi: Pointer to the targeted VSI 3620 * @input: The filter to update or NULL to indicate deletion 3621 * @sw_idx: Software index to the filter 3622 * @cmd: The command to get or set Rx flow classification rules 3623 * 3624 * This function updates (or deletes) a Flow Director entry from 3625 * the hlist of the corresponding PF 3626 * 3627 * Returns 0 on success 3628 **/ 3629 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3630 struct i40e_fdir_filter *input, 3631 u16 sw_idx, 3632 struct ethtool_rxnfc *cmd) 3633 { 3634 struct i40e_fdir_filter *rule, *parent; 3635 struct i40e_pf *pf = vsi->back; 3636 struct hlist_node *node2; 3637 int err = -EINVAL; 3638 3639 parent = NULL; 3640 rule = NULL; 3641 3642 hlist_for_each_entry_safe(rule, node2, 3643 &pf->fdir_filter_list, fdir_node) { 3644 /* hash found, or no matching entry */ 3645 if (rule->fd_id >= sw_idx) 3646 break; 3647 parent = rule; 3648 } 3649 3650 /* if there is an old rule occupying our place remove it */ 3651 if (rule && (rule->fd_id == sw_idx)) { 3652 /* Remove this rule, since we're either deleting it, or 3653 * replacing it. 3654 */ 3655 err = i40e_add_del_fdir(vsi, rule, false); 3656 hlist_del(&rule->fdir_node); 3657 kfree(rule); 3658 pf->fdir_pf_active_filters--; 3659 } 3660 3661 /* If we weren't given an input, this is a delete, so just return the 3662 * error code indicating if there was an entry at the requested slot 3663 */ 3664 if (!input) 3665 return err; 3666 3667 /* Otherwise, install the new rule as requested */ 3668 INIT_HLIST_NODE(&input->fdir_node); 3669 3670 /* add filter to the list */ 3671 if (parent) 3672 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3673 else 3674 hlist_add_head(&input->fdir_node, 3675 &pf->fdir_filter_list); 3676 3677 /* update counts */ 3678 pf->fdir_pf_active_filters++; 3679 3680 return 0; 3681 } 3682 3683 /** 3684 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3685 * @pf: pointer to PF structure 3686 * 3687 * This function searches the list of filters and determines which FLX_PIT 3688 * entries are still required. It will prune any entries which are no longer 3689 * in use after the deletion. 3690 **/ 3691 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3692 { 3693 struct i40e_flex_pit *entry, *tmp; 3694 struct i40e_fdir_filter *rule; 3695 3696 /* First, we'll check the l3 table */ 3697 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3698 bool found = false; 3699 3700 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3701 if (rule->flow_type != IP_USER_FLOW) 3702 continue; 3703 if (rule->flex_filter && 3704 rule->flex_offset == entry->src_offset) { 3705 found = true; 3706 break; 3707 } 3708 } 3709 3710 /* If we didn't find the filter, then we can prune this entry 3711 * from the list. 3712 */ 3713 if (!found) { 3714 list_del(&entry->list); 3715 kfree(entry); 3716 } 3717 } 3718 3719 /* Followed by the L4 table */ 3720 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3721 bool found = false; 3722 3723 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3724 /* Skip this filter if it's L3, since we already 3725 * checked those in the above loop 3726 */ 3727 if (rule->flow_type == IP_USER_FLOW) 3728 continue; 3729 if (rule->flex_filter && 3730 rule->flex_offset == entry->src_offset) { 3731 found = true; 3732 break; 3733 } 3734 } 3735 3736 /* If we didn't find the filter, then we can prune this entry 3737 * from the list. 3738 */ 3739 if (!found) { 3740 list_del(&entry->list); 3741 kfree(entry); 3742 } 3743 } 3744 } 3745 3746 /** 3747 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3748 * @vsi: Pointer to the targeted VSI 3749 * @cmd: The command to get or set Rx flow classification rules 3750 * 3751 * The function removes a Flow Director filter entry from the 3752 * hlist of the corresponding PF 3753 * 3754 * Returns 0 on success 3755 */ 3756 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3757 struct ethtool_rxnfc *cmd) 3758 { 3759 struct ethtool_rx_flow_spec *fsp = 3760 (struct ethtool_rx_flow_spec *)&cmd->fs; 3761 struct i40e_pf *pf = vsi->back; 3762 int ret = 0; 3763 3764 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3765 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3766 return -EBUSY; 3767 3768 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3769 return -EBUSY; 3770 3771 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3772 3773 i40e_prune_flex_pit_list(pf); 3774 3775 i40e_fdir_check_and_reenable(pf); 3776 return ret; 3777 } 3778 3779 /** 3780 * i40e_unused_pit_index - Find an unused PIT index for given list 3781 * @pf: the PF data structure 3782 * 3783 * Find the first unused flexible PIT index entry. We search both the L3 and 3784 * L4 flexible PIT lists so that the returned index is unique and unused by 3785 * either currently programmed L3 or L4 filters. We use a bit field as storage 3786 * to track which indexes are already used. 3787 **/ 3788 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3789 { 3790 unsigned long available_index = 0xFF; 3791 struct i40e_flex_pit *entry; 3792 3793 /* We need to make sure that the new index isn't in use by either L3 3794 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3795 * L4 to use the same index. 3796 */ 3797 3798 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3799 clear_bit(entry->pit_index, &available_index); 3800 3801 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3802 clear_bit(entry->pit_index, &available_index); 3803 3804 return find_first_bit(&available_index, 8); 3805 } 3806 3807 /** 3808 * i40e_find_flex_offset - Find an existing flex src_offset 3809 * @flex_pit_list: L3 or L4 flex PIT list 3810 * @src_offset: new src_offset to find 3811 * 3812 * Searches the flex_pit_list for an existing offset. If no offset is 3813 * currently programmed, then this will return an ERR_PTR if there is no space 3814 * to add a new offset, otherwise it returns NULL. 3815 **/ 3816 static 3817 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3818 u16 src_offset) 3819 { 3820 struct i40e_flex_pit *entry; 3821 int size = 0; 3822 3823 /* Search for the src_offset first. If we find a matching entry 3824 * already programmed, we can simply re-use it. 3825 */ 3826 list_for_each_entry(entry, flex_pit_list, list) { 3827 size++; 3828 if (entry->src_offset == src_offset) 3829 return entry; 3830 } 3831 3832 /* If we haven't found an entry yet, then the provided src offset has 3833 * not yet been programmed. We will program the src offset later on, 3834 * but we need to indicate whether there is enough space to do so 3835 * here. We'll make use of ERR_PTR for this purpose. 3836 */ 3837 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3838 return ERR_PTR(-ENOSPC); 3839 3840 return NULL; 3841 } 3842 3843 /** 3844 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3845 * @flex_pit_list: L3 or L4 flex PIT list 3846 * @src_offset: new src_offset to add 3847 * @pit_index: the PIT index to program 3848 * 3849 * This function programs the new src_offset to the list. It is expected that 3850 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3851 * that this offset is not programmed, and that the list has enough space to 3852 * store another offset. 3853 * 3854 * Returns 0 on success, and negative value on error. 3855 **/ 3856 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3857 u16 src_offset, 3858 u8 pit_index) 3859 { 3860 struct i40e_flex_pit *new_pit, *entry; 3861 3862 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3863 if (!new_pit) 3864 return -ENOMEM; 3865 3866 new_pit->src_offset = src_offset; 3867 new_pit->pit_index = pit_index; 3868 3869 /* We need to insert this item such that the list is sorted by 3870 * src_offset in ascending order. 3871 */ 3872 list_for_each_entry(entry, flex_pit_list, list) { 3873 if (new_pit->src_offset < entry->src_offset) { 3874 list_add_tail(&new_pit->list, &entry->list); 3875 return 0; 3876 } 3877 3878 /* If we found an entry with our offset already programmed we 3879 * can simply return here, after freeing the memory. However, 3880 * if the pit_index does not match we need to report an error. 3881 */ 3882 if (new_pit->src_offset == entry->src_offset) { 3883 int err = 0; 3884 3885 /* If the PIT index is not the same we can't re-use 3886 * the entry, so we must report an error. 3887 */ 3888 if (new_pit->pit_index != entry->pit_index) 3889 err = -EINVAL; 3890 3891 kfree(new_pit); 3892 return err; 3893 } 3894 } 3895 3896 /* If we reached here, then we haven't yet added the item. This means 3897 * that we should add the item at the end of the list. 3898 */ 3899 list_add_tail(&new_pit->list, flex_pit_list); 3900 return 0; 3901 } 3902 3903 /** 3904 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3905 * @pf: Pointer to the PF structure 3906 * @flex_pit_list: list of flexible src offsets in use 3907 * @flex_pit_start: index to first entry for this section of the table 3908 * 3909 * In order to handle flexible data, the hardware uses a table of values 3910 * called the FLX_PIT table. This table is used to indicate which sections of 3911 * the input correspond to what PIT index values. Unfortunately, hardware is 3912 * very restrictive about programming this table. Entries must be ordered by 3913 * src_offset in ascending order, without duplicates. Additionally, unused 3914 * entries must be set to the unused index value, and must have valid size and 3915 * length according to the src_offset ordering. 3916 * 3917 * This function will reprogram the FLX_PIT register from a book-keeping 3918 * structure that we guarantee is already ordered correctly, and has no more 3919 * than 3 entries. 3920 * 3921 * To make things easier, we only support flexible values of one word length, 3922 * rather than allowing variable length flexible values. 3923 **/ 3924 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3925 struct list_head *flex_pit_list, 3926 int flex_pit_start) 3927 { 3928 struct i40e_flex_pit *entry = NULL; 3929 u16 last_offset = 0; 3930 int i = 0, j = 0; 3931 3932 /* First, loop over the list of flex PIT entries, and reprogram the 3933 * registers. 3934 */ 3935 list_for_each_entry(entry, flex_pit_list, list) { 3936 /* We have to be careful when programming values for the 3937 * largest SRC_OFFSET value. It is possible that adding 3938 * additional empty values at the end would overflow the space 3939 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3940 * we check here and add the empty values prior to adding the 3941 * largest value. 3942 * 3943 * To determine this, we will use a loop from i+1 to 3, which 3944 * will determine whether the unused entries would have valid 3945 * SRC_OFFSET. Note that there cannot be extra entries past 3946 * this value, because the only valid values would have been 3947 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3948 * have been added to the list in the first place. 3949 */ 3950 for (j = i + 1; j < 3; j++) { 3951 u16 offset = entry->src_offset + j; 3952 int index = flex_pit_start + i; 3953 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3954 1, 3955 offset - 3); 3956 3957 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3958 i40e_write_rx_ctl(&pf->hw, 3959 I40E_PRTQF_FLX_PIT(index), 3960 value); 3961 i++; 3962 } 3963 } 3964 3965 /* Now, we can program the actual value into the table */ 3966 i40e_write_rx_ctl(&pf->hw, 3967 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3968 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3969 1, 3970 entry->src_offset)); 3971 i++; 3972 } 3973 3974 /* In order to program the last entries in the table, we need to 3975 * determine the valid offset. If the list is empty, we'll just start 3976 * with 0. Otherwise, we'll start with the last item offset and add 1. 3977 * This ensures that all entries have valid sizes. If we don't do this 3978 * correctly, the hardware will disable flexible field parsing. 3979 */ 3980 if (!list_empty(flex_pit_list)) 3981 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3982 3983 for (; i < 3; i++, last_offset++) { 3984 i40e_write_rx_ctl(&pf->hw, 3985 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3986 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3987 1, 3988 last_offset)); 3989 } 3990 } 3991 3992 /** 3993 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3994 * @pf: pointer to the PF structure 3995 * 3996 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3997 * internal helper function for implementation details. 3998 **/ 3999 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 4000 { 4001 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 4002 I40E_FLEX_PIT_IDX_START_L3); 4003 4004 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 4005 I40E_FLEX_PIT_IDX_START_L4); 4006 4007 /* We also need to program the L3 and L4 GLQF ORT register */ 4008 i40e_write_rx_ctl(&pf->hw, 4009 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 4010 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 4011 3, 1)); 4012 4013 i40e_write_rx_ctl(&pf->hw, 4014 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 4015 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 4016 3, 1)); 4017 } 4018 4019 /** 4020 * i40e_flow_str - Converts a flow_type into a human readable string 4021 * @fsp: the flow specification 4022 * 4023 * Currently only flow types we support are included here, and the string 4024 * value attempts to match what ethtool would use to configure this flow type. 4025 **/ 4026 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 4027 { 4028 switch (fsp->flow_type & ~FLOW_EXT) { 4029 case TCP_V4_FLOW: 4030 return "tcp4"; 4031 case UDP_V4_FLOW: 4032 return "udp4"; 4033 case SCTP_V4_FLOW: 4034 return "sctp4"; 4035 case IP_USER_FLOW: 4036 return "ip4"; 4037 case TCP_V6_FLOW: 4038 return "tcp6"; 4039 case UDP_V6_FLOW: 4040 return "udp6"; 4041 case SCTP_V6_FLOW: 4042 return "sctp6"; 4043 case IPV6_USER_FLOW: 4044 return "ip6"; 4045 default: 4046 return "unknown"; 4047 } 4048 } 4049 4050 /** 4051 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 4052 * @pit_index: PIT index to convert 4053 * 4054 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 4055 * of range. 4056 **/ 4057 static u64 i40e_pit_index_to_mask(int pit_index) 4058 { 4059 switch (pit_index) { 4060 case 0: 4061 return I40E_FLEX_50_MASK; 4062 case 1: 4063 return I40E_FLEX_51_MASK; 4064 case 2: 4065 return I40E_FLEX_52_MASK; 4066 case 3: 4067 return I40E_FLEX_53_MASK; 4068 case 4: 4069 return I40E_FLEX_54_MASK; 4070 case 5: 4071 return I40E_FLEX_55_MASK; 4072 case 6: 4073 return I40E_FLEX_56_MASK; 4074 case 7: 4075 return I40E_FLEX_57_MASK; 4076 default: 4077 return 0; 4078 } 4079 } 4080 4081 /** 4082 * i40e_print_input_set - Show changes between two input sets 4083 * @vsi: the vsi being configured 4084 * @old: the old input set 4085 * @new: the new input set 4086 * 4087 * Print the difference between old and new input sets by showing which series 4088 * of words are toggled on or off. Only displays the bits we actually support 4089 * changing. 4090 **/ 4091 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 4092 { 4093 struct i40e_pf *pf = vsi->back; 4094 bool old_value, new_value; 4095 int i; 4096 4097 old_value = !!(old & I40E_L3_SRC_MASK); 4098 new_value = !!(new & I40E_L3_SRC_MASK); 4099 if (old_value != new_value) 4100 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 4101 old_value ? "ON" : "OFF", 4102 new_value ? "ON" : "OFF"); 4103 4104 old_value = !!(old & I40E_L3_DST_MASK); 4105 new_value = !!(new & I40E_L3_DST_MASK); 4106 if (old_value != new_value) 4107 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 4108 old_value ? "ON" : "OFF", 4109 new_value ? "ON" : "OFF"); 4110 4111 old_value = !!(old & I40E_L4_SRC_MASK); 4112 new_value = !!(new & I40E_L4_SRC_MASK); 4113 if (old_value != new_value) 4114 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 4115 old_value ? "ON" : "OFF", 4116 new_value ? "ON" : "OFF"); 4117 4118 old_value = !!(old & I40E_L4_DST_MASK); 4119 new_value = !!(new & I40E_L4_DST_MASK); 4120 if (old_value != new_value) 4121 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 4122 old_value ? "ON" : "OFF", 4123 new_value ? "ON" : "OFF"); 4124 4125 old_value = !!(old & I40E_VERIFY_TAG_MASK); 4126 new_value = !!(new & I40E_VERIFY_TAG_MASK); 4127 if (old_value != new_value) 4128 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 4129 old_value ? "ON" : "OFF", 4130 new_value ? "ON" : "OFF"); 4131 4132 /* Show change of flexible filter entries */ 4133 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 4134 u64 flex_mask = i40e_pit_index_to_mask(i); 4135 4136 old_value = !!(old & flex_mask); 4137 new_value = !!(new & flex_mask); 4138 if (old_value != new_value) 4139 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 4140 i, 4141 old_value ? "ON" : "OFF", 4142 new_value ? "ON" : "OFF"); 4143 } 4144 4145 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 4146 old); 4147 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 4148 new); 4149 } 4150 4151 /** 4152 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 4153 * @vsi: pointer to the targeted VSI 4154 * @fsp: pointer to Rx flow specification 4155 * @userdef: userdefined data from flow specification 4156 * 4157 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 4158 * for partial matches exists with a few limitations. First, hardware only 4159 * supports masking by word boundary (2 bytes) and not per individual bit. 4160 * Second, hardware is limited to using one mask for a flow type and cannot 4161 * use a separate mask for each filter. 4162 * 4163 * To support these limitations, if we already have a configured filter for 4164 * the specified type, this function enforces that new filters of the type 4165 * match the configured input set. Otherwise, if we do not have a filter of 4166 * the specified type, we allow the input set to be updated to match the 4167 * desired filter. 4168 * 4169 * To help ensure that administrators understand why filters weren't displayed 4170 * as supported, we print a diagnostic message displaying how the input set 4171 * would change and warning to delete the preexisting filters if required. 4172 * 4173 * Returns 0 on successful input set match, and a negative return code on 4174 * failure. 4175 **/ 4176 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 4177 struct ethtool_rx_flow_spec *fsp, 4178 struct i40e_rx_flow_userdef *userdef) 4179 { 4180 static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff), 4181 cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff), 4182 cpu_to_be32(0xffffffff)}; 4183 struct ethtool_tcpip6_spec *tcp_ip6_spec; 4184 struct ethtool_usrip6_spec *usr_ip6_spec; 4185 struct ethtool_tcpip4_spec *tcp_ip4_spec; 4186 struct ethtool_usrip4_spec *usr_ip4_spec; 4187 struct i40e_pf *pf = vsi->back; 4188 u64 current_mask, new_mask; 4189 bool new_flex_offset = false; 4190 bool flex_l3 = false; 4191 u16 *fdir_filter_count; 4192 u16 index, src_offset = 0; 4193 u8 pit_index = 0; 4194 int err; 4195 4196 switch (fsp->flow_type & ~FLOW_EXT) { 4197 case SCTP_V4_FLOW: 4198 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 4199 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 4200 break; 4201 case TCP_V4_FLOW: 4202 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4203 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4204 break; 4205 case UDP_V4_FLOW: 4206 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4207 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4208 break; 4209 case SCTP_V6_FLOW: 4210 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP; 4211 fdir_filter_count = &pf->fd_sctp6_filter_cnt; 4212 break; 4213 case TCP_V6_FLOW: 4214 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 4215 fdir_filter_count = &pf->fd_tcp6_filter_cnt; 4216 break; 4217 case UDP_V6_FLOW: 4218 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 4219 fdir_filter_count = &pf->fd_udp6_filter_cnt; 4220 break; 4221 case IP_USER_FLOW: 4222 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4223 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4224 flex_l3 = true; 4225 break; 4226 case IPV6_USER_FLOW: 4227 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER; 4228 fdir_filter_count = &pf->fd_ip6_filter_cnt; 4229 flex_l3 = true; 4230 break; 4231 default: 4232 return -EOPNOTSUPP; 4233 } 4234 4235 /* Read the current input set from register memory. */ 4236 current_mask = i40e_read_fd_input_set(pf, index); 4237 new_mask = current_mask; 4238 4239 /* Determine, if any, the required changes to the input set in order 4240 * to support the provided mask. 4241 * 4242 * Hardware only supports masking at word (2 byte) granularity and does 4243 * not support full bitwise masking. This implementation simplifies 4244 * even further and only supports fully enabled or fully disabled 4245 * masks for each field, even though we could split the ip4src and 4246 * ip4dst fields. 4247 */ 4248 switch (fsp->flow_type & ~FLOW_EXT) { 4249 case SCTP_V4_FLOW: 4250 new_mask &= ~I40E_VERIFY_TAG_MASK; 4251 fallthrough; 4252 case TCP_V4_FLOW: 4253 case UDP_V4_FLOW: 4254 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4255 4256 /* IPv4 source address */ 4257 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4258 new_mask |= I40E_L3_SRC_MASK; 4259 else if (!tcp_ip4_spec->ip4src) 4260 new_mask &= ~I40E_L3_SRC_MASK; 4261 else 4262 return -EOPNOTSUPP; 4263 4264 /* IPv4 destination address */ 4265 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4266 new_mask |= I40E_L3_DST_MASK; 4267 else if (!tcp_ip4_spec->ip4dst) 4268 new_mask &= ~I40E_L3_DST_MASK; 4269 else 4270 return -EOPNOTSUPP; 4271 4272 /* L4 source port */ 4273 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4274 new_mask |= I40E_L4_SRC_MASK; 4275 else if (!tcp_ip4_spec->psrc) 4276 new_mask &= ~I40E_L4_SRC_MASK; 4277 else 4278 return -EOPNOTSUPP; 4279 4280 /* L4 destination port */ 4281 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4282 new_mask |= I40E_L4_DST_MASK; 4283 else if (!tcp_ip4_spec->pdst) 4284 new_mask &= ~I40E_L4_DST_MASK; 4285 else 4286 return -EOPNOTSUPP; 4287 4288 /* Filtering on Type of Service is not supported. */ 4289 if (tcp_ip4_spec->tos) 4290 return -EOPNOTSUPP; 4291 4292 break; 4293 case SCTP_V6_FLOW: 4294 new_mask &= ~I40E_VERIFY_TAG_MASK; 4295 fallthrough; 4296 case TCP_V6_FLOW: 4297 case UDP_V6_FLOW: 4298 tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec; 4299 4300 /* Check if user provided IPv6 source address. */ 4301 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src, 4302 (struct in6_addr *)&ipv6_full_mask)) 4303 new_mask |= I40E_L3_V6_SRC_MASK; 4304 else if (ipv6_addr_any((struct in6_addr *) 4305 &tcp_ip6_spec->ip6src)) 4306 new_mask &= ~I40E_L3_V6_SRC_MASK; 4307 else 4308 return -EOPNOTSUPP; 4309 4310 /* Check if user provided destination address. */ 4311 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst, 4312 (struct in6_addr *)&ipv6_full_mask)) 4313 new_mask |= I40E_L3_V6_DST_MASK; 4314 else if (ipv6_addr_any((struct in6_addr *) 4315 &tcp_ip6_spec->ip6dst)) 4316 new_mask &= ~I40E_L3_V6_DST_MASK; 4317 else 4318 return -EOPNOTSUPP; 4319 4320 /* L4 source port */ 4321 if (tcp_ip6_spec->psrc == htons(0xFFFF)) 4322 new_mask |= I40E_L4_SRC_MASK; 4323 else if (!tcp_ip6_spec->psrc) 4324 new_mask &= ~I40E_L4_SRC_MASK; 4325 else 4326 return -EOPNOTSUPP; 4327 4328 /* L4 destination port */ 4329 if (tcp_ip6_spec->pdst == htons(0xFFFF)) 4330 new_mask |= I40E_L4_DST_MASK; 4331 else if (!tcp_ip6_spec->pdst) 4332 new_mask &= ~I40E_L4_DST_MASK; 4333 else 4334 return -EOPNOTSUPP; 4335 4336 /* Filtering on Traffic Classes is not supported. */ 4337 if (tcp_ip6_spec->tclass) 4338 return -EOPNOTSUPP; 4339 break; 4340 case IP_USER_FLOW: 4341 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4342 4343 /* IPv4 source address */ 4344 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4345 new_mask |= I40E_L3_SRC_MASK; 4346 else if (!usr_ip4_spec->ip4src) 4347 new_mask &= ~I40E_L3_SRC_MASK; 4348 else 4349 return -EOPNOTSUPP; 4350 4351 /* IPv4 destination address */ 4352 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4353 new_mask |= I40E_L3_DST_MASK; 4354 else if (!usr_ip4_spec->ip4dst) 4355 new_mask &= ~I40E_L3_DST_MASK; 4356 else 4357 return -EOPNOTSUPP; 4358 4359 /* First 4 bytes of L4 header */ 4360 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4361 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4362 else if (!usr_ip4_spec->l4_4_bytes) 4363 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4364 else 4365 return -EOPNOTSUPP; 4366 4367 /* Filtering on Type of Service is not supported. */ 4368 if (usr_ip4_spec->tos) 4369 return -EOPNOTSUPP; 4370 4371 /* Filtering on IP version is not supported */ 4372 if (usr_ip4_spec->ip_ver) 4373 return -EINVAL; 4374 4375 /* Filtering on L4 protocol is not supported */ 4376 if (usr_ip4_spec->proto) 4377 return -EINVAL; 4378 4379 break; 4380 case IPV6_USER_FLOW: 4381 usr_ip6_spec = &fsp->m_u.usr_ip6_spec; 4382 4383 /* Check if user provided IPv6 source address. */ 4384 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src, 4385 (struct in6_addr *)&ipv6_full_mask)) 4386 new_mask |= I40E_L3_V6_SRC_MASK; 4387 else if (ipv6_addr_any((struct in6_addr *) 4388 &usr_ip6_spec->ip6src)) 4389 new_mask &= ~I40E_L3_V6_SRC_MASK; 4390 else 4391 return -EOPNOTSUPP; 4392 4393 /* Check if user provided destination address. */ 4394 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst, 4395 (struct in6_addr *)&ipv6_full_mask)) 4396 new_mask |= I40E_L3_V6_DST_MASK; 4397 else if (ipv6_addr_any((struct in6_addr *) 4398 &usr_ip6_spec->ip6src)) 4399 new_mask &= ~I40E_L3_V6_DST_MASK; 4400 else 4401 return -EOPNOTSUPP; 4402 4403 if (usr_ip6_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4404 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4405 else if (!usr_ip6_spec->l4_4_bytes) 4406 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4407 else 4408 return -EOPNOTSUPP; 4409 4410 /* Filtering on Traffic class is not supported. */ 4411 if (usr_ip6_spec->tclass) 4412 return -EOPNOTSUPP; 4413 4414 /* Filtering on L4 protocol is not supported */ 4415 if (usr_ip6_spec->l4_proto) 4416 return -EINVAL; 4417 4418 break; 4419 default: 4420 return -EOPNOTSUPP; 4421 } 4422 4423 if (fsp->flow_type & FLOW_EXT) { 4424 /* Allow only 802.1Q and no etype defined, as 4425 * later it's modified to 0x8100 4426 */ 4427 if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) && 4428 fsp->h_ext.vlan_etype != 0) 4429 return -EOPNOTSUPP; 4430 if (fsp->m_ext.vlan_tci == htons(0xFFFF)) 4431 new_mask |= I40E_VLAN_SRC_MASK; 4432 else 4433 new_mask &= ~I40E_VLAN_SRC_MASK; 4434 } 4435 4436 /* First, clear all flexible filter entries */ 4437 new_mask &= ~I40E_FLEX_INPUT_MASK; 4438 4439 /* If we have a flexible filter, try to add this offset to the correct 4440 * flexible filter PIT list. Once finished, we can update the mask. 4441 * If the src_offset changed, we will get a new mask value which will 4442 * trigger an input set change. 4443 */ 4444 if (userdef->flex_filter) { 4445 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4446 4447 /* Flexible offset must be even, since the flexible payload 4448 * must be aligned on 2-byte boundary. 4449 */ 4450 if (userdef->flex_offset & 0x1) { 4451 dev_warn(&pf->pdev->dev, 4452 "Flexible data offset must be 2-byte aligned\n"); 4453 return -EINVAL; 4454 } 4455 4456 src_offset = userdef->flex_offset >> 1; 4457 4458 /* FLX_PIT source offset value is only so large */ 4459 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4460 dev_warn(&pf->pdev->dev, 4461 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4462 return -EINVAL; 4463 } 4464 4465 /* See if this offset has already been programmed. If we get 4466 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4467 * if we get a NULL pointer, this means we will need to add 4468 * the offset. 4469 */ 4470 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4471 src_offset); 4472 if (IS_ERR(flex_pit)) 4473 return PTR_ERR(flex_pit); 4474 4475 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4476 * packet types, and thus we need to program both L3 and L4 4477 * flexible values. These must have identical flexible index, 4478 * as otherwise we can't correctly program the input set. So 4479 * we'll find both an L3 and L4 index and make sure they are 4480 * the same. 4481 */ 4482 if (flex_l3) { 4483 l3_flex_pit = 4484 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4485 src_offset); 4486 if (IS_ERR(l3_flex_pit)) 4487 return PTR_ERR(l3_flex_pit); 4488 4489 if (flex_pit) { 4490 /* If we already had a matching L4 entry, we 4491 * need to make sure that the L3 entry we 4492 * obtained uses the same index. 4493 */ 4494 if (l3_flex_pit) { 4495 if (l3_flex_pit->pit_index != 4496 flex_pit->pit_index) { 4497 return -EINVAL; 4498 } 4499 } else { 4500 new_flex_offset = true; 4501 } 4502 } else { 4503 flex_pit = l3_flex_pit; 4504 } 4505 } 4506 4507 /* If we didn't find an existing flex offset, we need to 4508 * program a new one. However, we don't immediately program it 4509 * here because we will wait to program until after we check 4510 * that it is safe to change the input set. 4511 */ 4512 if (!flex_pit) { 4513 new_flex_offset = true; 4514 pit_index = i40e_unused_pit_index(pf); 4515 } else { 4516 pit_index = flex_pit->pit_index; 4517 } 4518 4519 /* Update the mask with the new offset */ 4520 new_mask |= i40e_pit_index_to_mask(pit_index); 4521 } 4522 4523 /* If the mask and flexible filter offsets for this filter match the 4524 * currently programmed values we don't need any input set change, so 4525 * this filter is safe to install. 4526 */ 4527 if (new_mask == current_mask && !new_flex_offset) 4528 return 0; 4529 4530 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4531 i40e_flow_str(fsp)); 4532 i40e_print_input_set(vsi, current_mask, new_mask); 4533 if (new_flex_offset) { 4534 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4535 pit_index, src_offset); 4536 } 4537 4538 /* Hardware input sets are global across multiple ports, so even the 4539 * main port cannot change them when in MFP mode as this would impact 4540 * any filters on the other ports. 4541 */ 4542 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4543 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4544 return -EOPNOTSUPP; 4545 } 4546 4547 /* This filter requires us to update the input set. However, hardware 4548 * only supports one input set per flow type, and does not support 4549 * separate masks for each filter. This means that we can only support 4550 * a single mask for all filters of a specific type. 4551 * 4552 * If we have preexisting filters, they obviously depend on the 4553 * current programmed input set. Display a diagnostic message in this 4554 * case explaining why the filter could not be accepted. 4555 */ 4556 if (*fdir_filter_count) { 4557 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4558 i40e_flow_str(fsp), 4559 *fdir_filter_count); 4560 return -EOPNOTSUPP; 4561 } 4562 4563 i40e_write_fd_input_set(pf, index, new_mask); 4564 4565 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4566 * frames. If we're programming the input set for IPv4/Other, we also 4567 * need to program the IPv4/Fragmented input set. Since we don't have 4568 * separate support, we'll always assume and enforce that the two flow 4569 * types must have matching input sets. 4570 */ 4571 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4572 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4573 new_mask); 4574 4575 /* Add the new offset and update table, if necessary */ 4576 if (new_flex_offset) { 4577 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4578 pit_index); 4579 if (err) 4580 return err; 4581 4582 if (flex_l3) { 4583 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4584 src_offset, 4585 pit_index); 4586 if (err) 4587 return err; 4588 } 4589 4590 i40e_reprogram_flex_pit(pf); 4591 } 4592 4593 return 0; 4594 } 4595 4596 /** 4597 * i40e_match_fdir_filter - Return true of two filters match 4598 * @a: pointer to filter struct 4599 * @b: pointer to filter struct 4600 * 4601 * Returns true if the two filters match exactly the same criteria. I.e. they 4602 * match the same flow type and have the same parameters. We don't need to 4603 * check any input-set since all filters of the same flow type must use the 4604 * same input set. 4605 **/ 4606 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4607 struct i40e_fdir_filter *b) 4608 { 4609 /* The filters do not much if any of these criteria differ. */ 4610 if (a->dst_ip != b->dst_ip || 4611 a->src_ip != b->src_ip || 4612 a->dst_port != b->dst_port || 4613 a->src_port != b->src_port || 4614 a->flow_type != b->flow_type || 4615 a->ipl4_proto != b->ipl4_proto || 4616 a->vlan_tag != b->vlan_tag || 4617 a->vlan_etype != b->vlan_etype) 4618 return false; 4619 4620 return true; 4621 } 4622 4623 /** 4624 * i40e_disallow_matching_filters - Check that new filters differ 4625 * @vsi: pointer to the targeted VSI 4626 * @input: new filter to check 4627 * 4628 * Due to hardware limitations, it is not possible for two filters that match 4629 * similar criteria to be programmed at the same time. This is true for a few 4630 * reasons: 4631 * 4632 * (a) all filters matching a particular flow type must use the same input 4633 * set, that is they must match the same criteria. 4634 * (b) different flow types will never match the same packet, as the flow type 4635 * is decided by hardware before checking which rules apply. 4636 * (c) hardware has no way to distinguish which order filters apply in. 4637 * 4638 * Due to this, we can't really support using the location data to order 4639 * filters in the hardware parsing. It is technically possible for the user to 4640 * request two filters matching the same criteria but which select different 4641 * queues. In this case, rather than keep both filters in the list, we reject 4642 * the 2nd filter when the user requests adding it. 4643 * 4644 * This avoids needing to track location for programming the filter to 4645 * hardware, and ensures that we avoid some strange scenarios involving 4646 * deleting filters which match the same criteria. 4647 **/ 4648 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4649 struct i40e_fdir_filter *input) 4650 { 4651 struct i40e_pf *pf = vsi->back; 4652 struct i40e_fdir_filter *rule; 4653 struct hlist_node *node2; 4654 4655 /* Loop through every filter, and check that it doesn't match */ 4656 hlist_for_each_entry_safe(rule, node2, 4657 &pf->fdir_filter_list, fdir_node) { 4658 /* Don't check the filters match if they share the same fd_id, 4659 * since the new filter is actually just updating the target 4660 * of the old filter. 4661 */ 4662 if (rule->fd_id == input->fd_id) 4663 continue; 4664 4665 /* If any filters match, then print a warning message to the 4666 * kernel message buffer and bail out. 4667 */ 4668 if (i40e_match_fdir_filter(rule, input)) { 4669 dev_warn(&pf->pdev->dev, 4670 "Existing user defined filter %d already matches this flow.\n", 4671 rule->fd_id); 4672 return -EINVAL; 4673 } 4674 } 4675 4676 return 0; 4677 } 4678 4679 /** 4680 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4681 * @vsi: pointer to the targeted VSI 4682 * @cmd: command to get or set RX flow classification rules 4683 * 4684 * Add Flow Director filters for a specific flow spec based on their 4685 * protocol. Returns 0 if the filters were successfully added. 4686 **/ 4687 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4688 struct ethtool_rxnfc *cmd) 4689 { 4690 struct i40e_rx_flow_userdef userdef; 4691 struct ethtool_rx_flow_spec *fsp; 4692 struct i40e_fdir_filter *input; 4693 u16 dest_vsi = 0, q_index = 0; 4694 struct i40e_pf *pf; 4695 int ret = -EINVAL; 4696 u8 dest_ctl; 4697 4698 if (!vsi) 4699 return -EINVAL; 4700 pf = vsi->back; 4701 4702 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4703 return -EOPNOTSUPP; 4704 4705 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4706 return -ENOSPC; 4707 4708 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4709 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4710 return -EBUSY; 4711 4712 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4713 return -EBUSY; 4714 4715 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4716 4717 /* Parse the user-defined field */ 4718 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4719 return -EINVAL; 4720 4721 /* Extended MAC field is not supported */ 4722 if (fsp->flow_type & FLOW_MAC_EXT) 4723 return -EINVAL; 4724 4725 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4726 if (ret) 4727 return ret; 4728 4729 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4730 pf->hw.func_caps.fd_filters_guaranteed)) { 4731 return -EINVAL; 4732 } 4733 4734 /* ring_cookie is either the drop index, or is a mask of the queue 4735 * index and VF id we wish to target. 4736 */ 4737 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4738 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4739 } else { 4740 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4741 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4742 4743 if (!vf) { 4744 if (ring >= vsi->num_queue_pairs) 4745 return -EINVAL; 4746 dest_vsi = vsi->id; 4747 } else { 4748 /* VFs are zero-indexed, so we subtract one here */ 4749 vf--; 4750 4751 if (vf >= pf->num_alloc_vfs) 4752 return -EINVAL; 4753 if (ring >= pf->vf[vf].num_queue_pairs) 4754 return -EINVAL; 4755 dest_vsi = pf->vf[vf].lan_vsi_id; 4756 } 4757 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4758 q_index = ring; 4759 } 4760 4761 input = kzalloc(sizeof(*input), GFP_KERNEL); 4762 4763 if (!input) 4764 return -ENOMEM; 4765 4766 input->fd_id = fsp->location; 4767 input->q_index = q_index; 4768 input->dest_vsi = dest_vsi; 4769 input->dest_ctl = dest_ctl; 4770 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4771 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4772 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4773 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4774 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4775 4776 input->vlan_etype = fsp->h_ext.vlan_etype; 4777 if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci) 4778 input->vlan_etype = cpu_to_be16(ETH_P_8021Q); 4779 if (fsp->m_ext.vlan_tci && input->vlan_etype) 4780 input->vlan_tag = fsp->h_ext.vlan_tci; 4781 if (input->flow_type == IPV6_USER_FLOW || 4782 input->flow_type == UDP_V6_FLOW || 4783 input->flow_type == TCP_V6_FLOW || 4784 input->flow_type == SCTP_V6_FLOW) { 4785 /* Reverse the src and dest notion, since the HW expects them 4786 * to be from Tx perspective where as the input from user is 4787 * from Rx filter view. 4788 */ 4789 input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto; 4790 input->dst_port = fsp->h_u.tcp_ip6_spec.psrc; 4791 input->src_port = fsp->h_u.tcp_ip6_spec.pdst; 4792 memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src, 4793 sizeof(__be32) * 4); 4794 memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst, 4795 sizeof(__be32) * 4); 4796 } else { 4797 /* Reverse the src and dest notion, since the HW expects them 4798 * to be from Tx perspective where as the input from user is 4799 * from Rx filter view. 4800 */ 4801 input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto; 4802 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4803 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4804 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4805 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4806 } 4807 4808 if (userdef.flex_filter) { 4809 input->flex_filter = true; 4810 input->flex_word = cpu_to_be16(userdef.flex_word); 4811 input->flex_offset = userdef.flex_offset; 4812 } 4813 4814 /* Avoid programming two filters with identical match criteria. */ 4815 ret = i40e_disallow_matching_filters(vsi, input); 4816 if (ret) 4817 goto free_filter_memory; 4818 4819 /* Add the input filter to the fdir_input_list, possibly replacing 4820 * a previous filter. Do not free the input structure after adding it 4821 * to the list as this would cause a use-after-free bug. 4822 */ 4823 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4824 ret = i40e_add_del_fdir(vsi, input, true); 4825 if (ret) 4826 goto remove_sw_rule; 4827 return 0; 4828 4829 remove_sw_rule: 4830 hlist_del(&input->fdir_node); 4831 pf->fdir_pf_active_filters--; 4832 free_filter_memory: 4833 kfree(input); 4834 return ret; 4835 } 4836 4837 /** 4838 * i40e_set_rxnfc - command to set RX flow classification rules 4839 * @netdev: network interface device structure 4840 * @cmd: ethtool rxnfc command 4841 * 4842 * Returns Success if the command is supported. 4843 **/ 4844 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4845 { 4846 struct i40e_netdev_priv *np = netdev_priv(netdev); 4847 struct i40e_vsi *vsi = np->vsi; 4848 struct i40e_pf *pf = vsi->back; 4849 int ret = -EOPNOTSUPP; 4850 4851 switch (cmd->cmd) { 4852 case ETHTOOL_SRXFH: 4853 ret = i40e_set_rss_hash_opt(pf, cmd); 4854 break; 4855 case ETHTOOL_SRXCLSRLINS: 4856 ret = i40e_add_fdir_ethtool(vsi, cmd); 4857 break; 4858 case ETHTOOL_SRXCLSRLDEL: 4859 ret = i40e_del_fdir_entry(vsi, cmd); 4860 break; 4861 default: 4862 break; 4863 } 4864 4865 return ret; 4866 } 4867 4868 /** 4869 * i40e_max_channels - get Max number of combined channels supported 4870 * @vsi: vsi pointer 4871 **/ 4872 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4873 { 4874 /* TODO: This code assumes DCB and FD is disabled for now. */ 4875 return vsi->alloc_queue_pairs; 4876 } 4877 4878 /** 4879 * i40e_get_channels - Get the current channels enabled and max supported etc. 4880 * @dev: network interface device structure 4881 * @ch: ethtool channels structure 4882 * 4883 * We don't support separate tx and rx queues as channels. The other count 4884 * represents how many queues are being used for control. max_combined counts 4885 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4886 * q_vectors since we support a lot more queue pairs than q_vectors. 4887 **/ 4888 static void i40e_get_channels(struct net_device *dev, 4889 struct ethtool_channels *ch) 4890 { 4891 struct i40e_netdev_priv *np = netdev_priv(dev); 4892 struct i40e_vsi *vsi = np->vsi; 4893 struct i40e_pf *pf = vsi->back; 4894 4895 /* report maximum channels */ 4896 ch->max_combined = i40e_max_channels(vsi); 4897 4898 /* report info for other vector */ 4899 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4900 ch->max_other = ch->other_count; 4901 4902 /* Note: This code assumes DCB is disabled for now. */ 4903 ch->combined_count = vsi->num_queue_pairs; 4904 } 4905 4906 /** 4907 * i40e_set_channels - Set the new channels count. 4908 * @dev: network interface device structure 4909 * @ch: ethtool channels structure 4910 * 4911 * The new channels count may not be the same as requested by the user 4912 * since it gets rounded down to a power of 2 value. 4913 **/ 4914 static int i40e_set_channels(struct net_device *dev, 4915 struct ethtool_channels *ch) 4916 { 4917 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4918 struct i40e_netdev_priv *np = netdev_priv(dev); 4919 unsigned int count = ch->combined_count; 4920 struct i40e_vsi *vsi = np->vsi; 4921 struct i40e_pf *pf = vsi->back; 4922 struct i40e_fdir_filter *rule; 4923 struct hlist_node *node2; 4924 int new_count; 4925 int err = 0; 4926 4927 /* We do not support setting channels for any other VSI at present */ 4928 if (vsi->type != I40E_VSI_MAIN) 4929 return -EINVAL; 4930 4931 /* We do not support setting channels via ethtool when TCs are 4932 * configured through mqprio 4933 */ 4934 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4935 return -EINVAL; 4936 4937 /* verify they are not requesting separate vectors */ 4938 if (!count || ch->rx_count || ch->tx_count) 4939 return -EINVAL; 4940 4941 /* verify other_count has not changed */ 4942 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4943 return -EINVAL; 4944 4945 /* verify the number of channels does not exceed hardware limits */ 4946 if (count > i40e_max_channels(vsi)) 4947 return -EINVAL; 4948 4949 /* verify that the number of channels does not invalidate any current 4950 * flow director rules 4951 */ 4952 hlist_for_each_entry_safe(rule, node2, 4953 &pf->fdir_filter_list, fdir_node) { 4954 if (rule->dest_ctl != drop && count <= rule->q_index) { 4955 dev_warn(&pf->pdev->dev, 4956 "Existing user defined filter %d assigns flow to queue %d\n", 4957 rule->fd_id, rule->q_index); 4958 err = -EINVAL; 4959 } 4960 } 4961 4962 if (err) { 4963 dev_err(&pf->pdev->dev, 4964 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4965 count); 4966 return err; 4967 } 4968 4969 /* update feature limits from largest to smallest supported values */ 4970 /* TODO: Flow director limit, DCB etc */ 4971 4972 /* use rss_reconfig to rebuild with new queue count and update traffic 4973 * class queue mapping 4974 */ 4975 new_count = i40e_reconfig_rss_queues(pf, count); 4976 if (new_count > 0) 4977 return 0; 4978 else 4979 return -EINVAL; 4980 } 4981 4982 /** 4983 * i40e_get_rxfh_key_size - get the RSS hash key size 4984 * @netdev: network interface device structure 4985 * 4986 * Returns the table size. 4987 **/ 4988 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4989 { 4990 return I40E_HKEY_ARRAY_SIZE; 4991 } 4992 4993 /** 4994 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4995 * @netdev: network interface device structure 4996 * 4997 * Returns the table size. 4998 **/ 4999 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 5000 { 5001 return I40E_HLUT_ARRAY_SIZE; 5002 } 5003 5004 /** 5005 * i40e_get_rxfh - get the rx flow hash indirection table 5006 * @netdev: network interface device structure 5007 * @indir: indirection table 5008 * @key: hash key 5009 * @hfunc: hash function 5010 * 5011 * Reads the indirection table directly from the hardware. Returns 0 on 5012 * success. 5013 **/ 5014 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 5015 u8 *hfunc) 5016 { 5017 struct i40e_netdev_priv *np = netdev_priv(netdev); 5018 struct i40e_vsi *vsi = np->vsi; 5019 u8 *lut, *seed = NULL; 5020 int ret; 5021 u16 i; 5022 5023 if (hfunc) 5024 *hfunc = ETH_RSS_HASH_TOP; 5025 5026 if (!indir) 5027 return 0; 5028 5029 seed = key; 5030 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 5031 if (!lut) 5032 return -ENOMEM; 5033 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 5034 if (ret) 5035 goto out; 5036 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 5037 indir[i] = (u32)(lut[i]); 5038 5039 out: 5040 kfree(lut); 5041 5042 return ret; 5043 } 5044 5045 /** 5046 * i40e_set_rxfh - set the rx flow hash indirection table 5047 * @netdev: network interface device structure 5048 * @indir: indirection table 5049 * @key: hash key 5050 * @hfunc: hash function to use 5051 * 5052 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 5053 * returns 0 after programming the table. 5054 **/ 5055 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 5056 const u8 *key, const u8 hfunc) 5057 { 5058 struct i40e_netdev_priv *np = netdev_priv(netdev); 5059 struct i40e_vsi *vsi = np->vsi; 5060 struct i40e_pf *pf = vsi->back; 5061 u8 *seed = NULL; 5062 u16 i; 5063 5064 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 5065 return -EOPNOTSUPP; 5066 5067 if (key) { 5068 if (!vsi->rss_hkey_user) { 5069 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 5070 GFP_KERNEL); 5071 if (!vsi->rss_hkey_user) 5072 return -ENOMEM; 5073 } 5074 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 5075 seed = vsi->rss_hkey_user; 5076 } 5077 if (!vsi->rss_lut_user) { 5078 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 5079 if (!vsi->rss_lut_user) 5080 return -ENOMEM; 5081 } 5082 5083 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 5084 if (indir) 5085 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 5086 vsi->rss_lut_user[i] = (u8)(indir[i]); 5087 else 5088 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 5089 vsi->rss_size); 5090 5091 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 5092 I40E_HLUT_ARRAY_SIZE); 5093 } 5094 5095 /** 5096 * i40e_get_priv_flags - report device private flags 5097 * @dev: network interface device structure 5098 * 5099 * The get string set count and the string set should be matched for each 5100 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 5101 * array. 5102 * 5103 * Returns a u32 bitmap of flags. 5104 **/ 5105 static u32 i40e_get_priv_flags(struct net_device *dev) 5106 { 5107 struct i40e_netdev_priv *np = netdev_priv(dev); 5108 struct i40e_vsi *vsi = np->vsi; 5109 struct i40e_pf *pf = vsi->back; 5110 u32 i, j, ret_flags = 0; 5111 5112 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 5113 const struct i40e_priv_flags *priv_flags; 5114 5115 priv_flags = &i40e_gstrings_priv_flags[i]; 5116 5117 if (priv_flags->flag & pf->flags) 5118 ret_flags |= BIT(i); 5119 } 5120 5121 if (pf->hw.pf_id != 0) 5122 return ret_flags; 5123 5124 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 5125 const struct i40e_priv_flags *priv_flags; 5126 5127 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 5128 5129 if (priv_flags->flag & pf->flags) 5130 ret_flags |= BIT(i + j); 5131 } 5132 5133 return ret_flags; 5134 } 5135 5136 /** 5137 * i40e_set_priv_flags - set private flags 5138 * @dev: network interface device structure 5139 * @flags: bit flags to be set 5140 **/ 5141 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 5142 { 5143 struct i40e_netdev_priv *np = netdev_priv(dev); 5144 u64 orig_flags, new_flags, changed_flags; 5145 enum i40e_admin_queue_err adq_err; 5146 struct i40e_vsi *vsi = np->vsi; 5147 struct i40e_pf *pf = vsi->back; 5148 u32 reset_needed = 0; 5149 i40e_status status; 5150 u32 i, j; 5151 5152 orig_flags = READ_ONCE(pf->flags); 5153 new_flags = orig_flags; 5154 5155 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 5156 const struct i40e_priv_flags *priv_flags; 5157 5158 priv_flags = &i40e_gstrings_priv_flags[i]; 5159 5160 if (flags & BIT(i)) 5161 new_flags |= priv_flags->flag; 5162 else 5163 new_flags &= ~(priv_flags->flag); 5164 5165 /* If this is a read-only flag, it can't be changed */ 5166 if (priv_flags->read_only && 5167 ((orig_flags ^ new_flags) & ~BIT(i))) 5168 return -EOPNOTSUPP; 5169 } 5170 5171 if (pf->hw.pf_id != 0) 5172 goto flags_complete; 5173 5174 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 5175 const struct i40e_priv_flags *priv_flags; 5176 5177 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 5178 5179 if (flags & BIT(i + j)) 5180 new_flags |= priv_flags->flag; 5181 else 5182 new_flags &= ~(priv_flags->flag); 5183 5184 /* If this is a read-only flag, it can't be changed */ 5185 if (priv_flags->read_only && 5186 ((orig_flags ^ new_flags) & ~BIT(i))) 5187 return -EOPNOTSUPP; 5188 } 5189 5190 flags_complete: 5191 changed_flags = orig_flags ^ new_flags; 5192 5193 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) 5194 reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG; 5195 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 5196 I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED)) 5197 reset_needed = BIT(__I40E_PF_RESET_REQUESTED); 5198 5199 /* Before we finalize any flag changes, we need to perform some 5200 * checks to ensure that the changes are supported and safe. 5201 */ 5202 5203 /* ATR eviction is not supported on all devices */ 5204 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 5205 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 5206 return -EOPNOTSUPP; 5207 5208 /* If the driver detected FW LLDP was disabled on init, this flag could 5209 * be set, however we do not support _changing_ the flag: 5210 * - on XL710 if NPAR is enabled or FW API version < 1.7 5211 * - on X722 with FW API version < 1.6 5212 * There are situations where older FW versions/NPAR enabled PFs could 5213 * disable LLDP, however we _must_ not allow the user to enable/disable 5214 * LLDP with this flag on unsupported FW versions. 5215 */ 5216 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 5217 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 5218 dev_warn(&pf->pdev->dev, 5219 "Device does not support changing FW LLDP\n"); 5220 return -EOPNOTSUPP; 5221 } 5222 } 5223 5224 if (changed_flags & I40E_FLAG_RS_FEC && 5225 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 5226 pf->hw.device_id != I40E_DEV_ID_25G_B) { 5227 dev_warn(&pf->pdev->dev, 5228 "Device does not support changing FEC configuration\n"); 5229 return -EOPNOTSUPP; 5230 } 5231 5232 if (changed_flags & I40E_FLAG_BASE_R_FEC && 5233 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 5234 pf->hw.device_id != I40E_DEV_ID_25G_B && 5235 pf->hw.device_id != I40E_DEV_ID_KX_X722) { 5236 dev_warn(&pf->pdev->dev, 5237 "Device does not support changing FEC configuration\n"); 5238 return -EOPNOTSUPP; 5239 } 5240 5241 /* Process any additional changes needed as a result of flag changes. 5242 * The changed_flags value reflects the list of bits that were 5243 * changed in the code above. 5244 */ 5245 5246 /* Flush current ATR settings if ATR was disabled */ 5247 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 5248 !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) { 5249 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 5250 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 5251 } 5252 5253 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 5254 u16 sw_flags = 0, valid_flags = 0; 5255 int ret; 5256 5257 if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 5258 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 5259 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 5260 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 5261 0, NULL); 5262 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 5263 dev_info(&pf->pdev->dev, 5264 "couldn't set switch config bits, err %s aq_err %s\n", 5265 i40e_stat_str(&pf->hw, ret), 5266 i40e_aq_str(&pf->hw, 5267 pf->hw.aq.asq_last_status)); 5268 /* not a fatal problem, just keep going */ 5269 } 5270 } 5271 5272 if ((changed_flags & I40E_FLAG_RS_FEC) || 5273 (changed_flags & I40E_FLAG_BASE_R_FEC)) { 5274 u8 fec_cfg = 0; 5275 5276 if (new_flags & I40E_FLAG_RS_FEC && 5277 new_flags & I40E_FLAG_BASE_R_FEC) { 5278 fec_cfg = I40E_AQ_SET_FEC_AUTO; 5279 } else if (new_flags & I40E_FLAG_RS_FEC) { 5280 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 5281 I40E_AQ_SET_FEC_ABILITY_RS); 5282 } else if (new_flags & I40E_FLAG_BASE_R_FEC) { 5283 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 5284 I40E_AQ_SET_FEC_ABILITY_KR); 5285 } 5286 if (i40e_set_fec_cfg(dev, fec_cfg)) 5287 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 5288 } 5289 5290 if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 5291 (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) { 5292 dev_err(&pf->pdev->dev, 5293 "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n"); 5294 return -EOPNOTSUPP; 5295 } 5296 5297 if ((changed_flags & new_flags & 5298 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 5299 (new_flags & I40E_FLAG_MFP_ENABLED)) 5300 dev_warn(&pf->pdev->dev, 5301 "Turning on link-down-on-close flag may affect other partitions\n"); 5302 5303 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 5304 if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) { 5305 #ifdef CONFIG_I40E_DCB 5306 i40e_dcb_sw_default_config(pf); 5307 #endif /* CONFIG_I40E_DCB */ 5308 i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL); 5309 i40e_aq_stop_lldp(&pf->hw, true, false, NULL); 5310 } else { 5311 status = i40e_aq_start_lldp(&pf->hw, false, NULL); 5312 if (status) { 5313 adq_err = pf->hw.aq.asq_last_status; 5314 switch (adq_err) { 5315 case I40E_AQ_RC_EEXIST: 5316 dev_warn(&pf->pdev->dev, 5317 "FW LLDP agent is already running\n"); 5318 reset_needed = 0; 5319 break; 5320 case I40E_AQ_RC_EPERM: 5321 dev_warn(&pf->pdev->dev, 5322 "Device configuration forbids SW from starting the LLDP agent.\n"); 5323 return -EINVAL; 5324 case I40E_AQ_RC_EAGAIN: 5325 dev_warn(&pf->pdev->dev, 5326 "Stop FW LLDP agent command is still being processed, please try again in a second.\n"); 5327 return -EBUSY; 5328 default: 5329 dev_warn(&pf->pdev->dev, 5330 "Starting FW LLDP agent failed: error: %s, %s\n", 5331 i40e_stat_str(&pf->hw, 5332 status), 5333 i40e_aq_str(&pf->hw, 5334 adq_err)); 5335 return -EINVAL; 5336 } 5337 } 5338 } 5339 } 5340 5341 /* Now that we've checked to ensure that the new flags are valid, load 5342 * them into place. Since we only modify flags either (a) during 5343 * initialization or (b) while holding the RTNL lock, we don't need 5344 * anything fancy here. 5345 */ 5346 pf->flags = new_flags; 5347 5348 /* Issue reset to cause things to take effect, as additional bits 5349 * are added we will need to create a mask of bits requiring reset 5350 */ 5351 if (reset_needed) 5352 i40e_do_reset(pf, reset_needed, true); 5353 5354 return 0; 5355 } 5356 5357 /** 5358 * i40e_get_module_info - get (Q)SFP+ module type info 5359 * @netdev: network interface device structure 5360 * @modinfo: module EEPROM size and layout information structure 5361 **/ 5362 static int i40e_get_module_info(struct net_device *netdev, 5363 struct ethtool_modinfo *modinfo) 5364 { 5365 struct i40e_netdev_priv *np = netdev_priv(netdev); 5366 struct i40e_vsi *vsi = np->vsi; 5367 struct i40e_pf *pf = vsi->back; 5368 struct i40e_hw *hw = &pf->hw; 5369 u32 sff8472_comp = 0; 5370 u32 sff8472_swap = 0; 5371 u32 sff8636_rev = 0; 5372 i40e_status status; 5373 u32 type = 0; 5374 5375 /* Check if firmware supports reading module EEPROM. */ 5376 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 5377 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5378 return -EINVAL; 5379 } 5380 5381 status = i40e_update_link_info(hw); 5382 if (status) 5383 return -EIO; 5384 5385 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5386 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5387 return -EINVAL; 5388 } 5389 5390 type = hw->phy.link_info.module_type[0]; 5391 5392 switch (type) { 5393 case I40E_MODULE_TYPE_SFP: 5394 status = i40e_aq_get_phy_register(hw, 5395 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5396 I40E_I2C_EEPROM_DEV_ADDR, true, 5397 I40E_MODULE_SFF_8472_COMP, 5398 &sff8472_comp, NULL); 5399 if (status) 5400 return -EIO; 5401 5402 status = i40e_aq_get_phy_register(hw, 5403 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5404 I40E_I2C_EEPROM_DEV_ADDR, true, 5405 I40E_MODULE_SFF_8472_SWAP, 5406 &sff8472_swap, NULL); 5407 if (status) 5408 return -EIO; 5409 5410 /* Check if the module requires address swap to access 5411 * the other EEPROM memory page. 5412 */ 5413 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5414 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5415 modinfo->type = ETH_MODULE_SFF_8079; 5416 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5417 } else if (sff8472_comp == 0x00) { 5418 /* Module is not SFF-8472 compliant */ 5419 modinfo->type = ETH_MODULE_SFF_8079; 5420 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5421 } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) { 5422 /* Module is SFF-8472 compliant but doesn't implement 5423 * Digital Diagnostic Monitoring (DDM). 5424 */ 5425 modinfo->type = ETH_MODULE_SFF_8079; 5426 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5427 } else { 5428 modinfo->type = ETH_MODULE_SFF_8472; 5429 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5430 } 5431 break; 5432 case I40E_MODULE_TYPE_QSFP_PLUS: 5433 /* Read from memory page 0. */ 5434 status = i40e_aq_get_phy_register(hw, 5435 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5436 0, true, 5437 I40E_MODULE_REVISION_ADDR, 5438 &sff8636_rev, NULL); 5439 if (status) 5440 return -EIO; 5441 /* Determine revision compliance byte */ 5442 if (sff8636_rev > 0x02) { 5443 /* Module is SFF-8636 compliant */ 5444 modinfo->type = ETH_MODULE_SFF_8636; 5445 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5446 } else { 5447 modinfo->type = ETH_MODULE_SFF_8436; 5448 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5449 } 5450 break; 5451 case I40E_MODULE_TYPE_QSFP28: 5452 modinfo->type = ETH_MODULE_SFF_8636; 5453 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5454 break; 5455 default: 5456 netdev_err(vsi->netdev, "Module type unrecognized\n"); 5457 return -EINVAL; 5458 } 5459 return 0; 5460 } 5461 5462 /** 5463 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5464 * @netdev: network interface device structure 5465 * @ee: EEPROM dump request structure 5466 * @data: buffer to be filled with EEPROM contents 5467 **/ 5468 static int i40e_get_module_eeprom(struct net_device *netdev, 5469 struct ethtool_eeprom *ee, 5470 u8 *data) 5471 { 5472 struct i40e_netdev_priv *np = netdev_priv(netdev); 5473 struct i40e_vsi *vsi = np->vsi; 5474 struct i40e_pf *pf = vsi->back; 5475 struct i40e_hw *hw = &pf->hw; 5476 bool is_sfp = false; 5477 i40e_status status; 5478 u32 value = 0; 5479 int i; 5480 5481 if (!ee || !ee->len || !data) 5482 return -EINVAL; 5483 5484 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5485 is_sfp = true; 5486 5487 for (i = 0; i < ee->len; i++) { 5488 u32 offset = i + ee->offset; 5489 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5490 5491 /* Check if we need to access the other memory page */ 5492 if (is_sfp) { 5493 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5494 offset -= ETH_MODULE_SFF_8079_LEN; 5495 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5496 } 5497 } else { 5498 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5499 /* Compute memory page number and offset. */ 5500 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5501 addr++; 5502 } 5503 } 5504 5505 status = i40e_aq_get_phy_register(hw, 5506 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5507 addr, true, offset, &value, NULL); 5508 if (status) 5509 return -EIO; 5510 data[i] = value; 5511 } 5512 return 0; 5513 } 5514 5515 static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata) 5516 { 5517 struct i40e_netdev_priv *np = netdev_priv(netdev); 5518 struct i40e_aq_get_phy_abilities_resp phy_cfg; 5519 enum i40e_status_code status = 0; 5520 struct i40e_vsi *vsi = np->vsi; 5521 struct i40e_pf *pf = vsi->back; 5522 struct i40e_hw *hw = &pf->hw; 5523 5524 /* Get initial PHY capabilities */ 5525 status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL); 5526 if (status) 5527 return -EAGAIN; 5528 5529 /* Check whether NIC configuration is compatible with Energy Efficient 5530 * Ethernet (EEE) mode. 5531 */ 5532 if (phy_cfg.eee_capability == 0) 5533 return -EOPNOTSUPP; 5534 5535 edata->supported = SUPPORTED_Autoneg; 5536 edata->lp_advertised = edata->supported; 5537 5538 /* Get current configuration */ 5539 status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL); 5540 if (status) 5541 return -EAGAIN; 5542 5543 edata->advertised = phy_cfg.eee_capability ? SUPPORTED_Autoneg : 0U; 5544 edata->eee_enabled = !!edata->advertised; 5545 edata->tx_lpi_enabled = pf->stats.tx_lpi_status; 5546 5547 edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status; 5548 5549 return 0; 5550 } 5551 5552 static int i40e_is_eee_param_supported(struct net_device *netdev, 5553 struct ethtool_eee *edata) 5554 { 5555 struct i40e_netdev_priv *np = netdev_priv(netdev); 5556 struct i40e_vsi *vsi = np->vsi; 5557 struct i40e_pf *pf = vsi->back; 5558 struct i40e_ethtool_not_used { 5559 u32 value; 5560 const char *name; 5561 } param[] = { 5562 {edata->advertised & ~SUPPORTED_Autoneg, "advertise"}, 5563 {edata->tx_lpi_timer, "tx-timer"}, 5564 {edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"} 5565 }; 5566 int i; 5567 5568 for (i = 0; i < ARRAY_SIZE(param); i++) { 5569 if (param[i].value) { 5570 netdev_info(netdev, 5571 "EEE setting %s not supported\n", 5572 param[i].name); 5573 return -EOPNOTSUPP; 5574 } 5575 } 5576 5577 return 0; 5578 } 5579 5580 static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata) 5581 { 5582 struct i40e_netdev_priv *np = netdev_priv(netdev); 5583 struct i40e_aq_get_phy_abilities_resp abilities; 5584 enum i40e_status_code status = I40E_SUCCESS; 5585 struct i40e_aq_set_phy_config config; 5586 struct i40e_vsi *vsi = np->vsi; 5587 struct i40e_pf *pf = vsi->back; 5588 struct i40e_hw *hw = &pf->hw; 5589 __le16 eee_capability; 5590 5591 /* Deny parameters we don't support */ 5592 if (i40e_is_eee_param_supported(netdev, edata)) 5593 return -EOPNOTSUPP; 5594 5595 /* Get initial PHY capabilities */ 5596 status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, 5597 NULL); 5598 if (status) 5599 return -EAGAIN; 5600 5601 /* Check whether NIC configuration is compatible with Energy Efficient 5602 * Ethernet (EEE) mode. 5603 */ 5604 if (abilities.eee_capability == 0) 5605 return -EOPNOTSUPP; 5606 5607 /* Cache initial EEE capability */ 5608 eee_capability = abilities.eee_capability; 5609 5610 /* Get current PHY configuration */ 5611 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 5612 NULL); 5613 if (status) 5614 return -EAGAIN; 5615 5616 /* Cache current PHY configuration */ 5617 config.phy_type = abilities.phy_type; 5618 config.phy_type_ext = abilities.phy_type_ext; 5619 config.link_speed = abilities.link_speed; 5620 config.abilities = abilities.abilities | 5621 I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 5622 config.eeer = abilities.eeer_val; 5623 config.low_power_ctrl = abilities.d3_lpan; 5624 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 5625 I40E_AQ_PHY_FEC_CONFIG_MASK; 5626 5627 /* Set desired EEE state */ 5628 if (edata->eee_enabled) { 5629 config.eee_capability = eee_capability; 5630 config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK); 5631 } else { 5632 config.eee_capability = 0; 5633 config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK); 5634 } 5635 5636 /* Apply modified PHY configuration */ 5637 status = i40e_aq_set_phy_config(hw, &config, NULL); 5638 if (status) 5639 return -EAGAIN; 5640 5641 return 0; 5642 } 5643 5644 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = { 5645 .get_drvinfo = i40e_get_drvinfo, 5646 .set_eeprom = i40e_set_eeprom, 5647 .get_eeprom_len = i40e_get_eeprom_len, 5648 .get_eeprom = i40e_get_eeprom, 5649 }; 5650 5651 static const struct ethtool_ops i40e_ethtool_ops = { 5652 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 5653 ETHTOOL_COALESCE_MAX_FRAMES_IRQ | 5654 ETHTOOL_COALESCE_USE_ADAPTIVE | 5655 ETHTOOL_COALESCE_RX_USECS_HIGH | 5656 ETHTOOL_COALESCE_TX_USECS_HIGH, 5657 .get_drvinfo = i40e_get_drvinfo, 5658 .get_regs_len = i40e_get_regs_len, 5659 .get_regs = i40e_get_regs, 5660 .nway_reset = i40e_nway_reset, 5661 .get_link = ethtool_op_get_link, 5662 .get_wol = i40e_get_wol, 5663 .set_wol = i40e_set_wol, 5664 .set_eeprom = i40e_set_eeprom, 5665 .get_eeprom_len = i40e_get_eeprom_len, 5666 .get_eeprom = i40e_get_eeprom, 5667 .get_ringparam = i40e_get_ringparam, 5668 .set_ringparam = i40e_set_ringparam, 5669 .get_pauseparam = i40e_get_pauseparam, 5670 .set_pauseparam = i40e_set_pauseparam, 5671 .get_msglevel = i40e_get_msglevel, 5672 .set_msglevel = i40e_set_msglevel, 5673 .get_rxnfc = i40e_get_rxnfc, 5674 .set_rxnfc = i40e_set_rxnfc, 5675 .self_test = i40e_diag_test, 5676 .get_strings = i40e_get_strings, 5677 .get_eee = i40e_get_eee, 5678 .set_eee = i40e_set_eee, 5679 .set_phys_id = i40e_set_phys_id, 5680 .get_sset_count = i40e_get_sset_count, 5681 .get_ethtool_stats = i40e_get_ethtool_stats, 5682 .get_coalesce = i40e_get_coalesce, 5683 .set_coalesce = i40e_set_coalesce, 5684 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5685 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5686 .get_rxfh = i40e_get_rxfh, 5687 .set_rxfh = i40e_set_rxfh, 5688 .get_channels = i40e_get_channels, 5689 .set_channels = i40e_set_channels, 5690 .get_module_info = i40e_get_module_info, 5691 .get_module_eeprom = i40e_get_module_eeprom, 5692 .get_ts_info = i40e_get_ts_info, 5693 .get_priv_flags = i40e_get_priv_flags, 5694 .set_priv_flags = i40e_set_priv_flags, 5695 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5696 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5697 .get_link_ksettings = i40e_get_link_ksettings, 5698 .set_link_ksettings = i40e_set_link_ksettings, 5699 .get_fecparam = i40e_get_fec_param, 5700 .set_fecparam = i40e_set_fec_param, 5701 .flash_device = i40e_ddp_flash, 5702 }; 5703 5704 void i40e_set_ethtool_ops(struct net_device *netdev) 5705 { 5706 struct i40e_netdev_priv *np = netdev_priv(netdev); 5707 struct i40e_pf *pf = np->vsi->back; 5708 5709 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) 5710 netdev->ethtool_ops = &i40e_ethtool_ops; 5711 else 5712 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops; 5713 } 5714