1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
3 
4 /* ethtool support for i40e */
5 
6 #include "i40e_devids.h"
7 #include "i40e_diag.h"
8 #include "i40e_txrx_common.h"
9 #include "i40e_virtchnl_pf.h"
10 
11 /* ethtool statistics helpers */
12 
13 /**
14  * struct i40e_stats - definition for an ethtool statistic
15  * @stat_string: statistic name to display in ethtool -S output
16  * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
17  * @stat_offset: offsetof() the stat from a base pointer
18  *
19  * This structure defines a statistic to be added to the ethtool stats buffer.
20  * It defines a statistic as offset from a common base pointer. Stats should
21  * be defined in constant arrays using the I40E_STAT macro, with every element
22  * of the array using the same _type for calculating the sizeof_stat and
23  * stat_offset.
24  *
25  * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
26  * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
27  * the i40e_add_ethtool_stat() helper function.
28  *
29  * The @stat_string is interpreted as a format string, allowing formatted
30  * values to be inserted while looping over multiple structures for a given
31  * statistics array. Thus, every statistic string in an array should have the
32  * same type and number of format specifiers, to be formatted by variadic
33  * arguments to the i40e_add_stat_string() helper function.
34  **/
35 struct i40e_stats {
36 	char stat_string[ETH_GSTRING_LEN];
37 	int sizeof_stat;
38 	int stat_offset;
39 };
40 
41 /* Helper macro to define an i40e_stat structure with proper size and type.
42  * Use this when defining constant statistics arrays. Note that @_type expects
43  * only a type name and is used multiple times.
44  */
45 #define I40E_STAT(_type, _name, _stat) { \
46 	.stat_string = _name, \
47 	.sizeof_stat = sizeof_field(_type, _stat), \
48 	.stat_offset = offsetof(_type, _stat) \
49 }
50 
51 /* Helper macro for defining some statistics directly copied from the netdev
52  * stats structure.
53  */
54 #define I40E_NETDEV_STAT(_net_stat) \
55 	I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
56 
57 /* Helper macro for defining some statistics related to queues */
58 #define I40E_QUEUE_STAT(_name, _stat) \
59 	I40E_STAT(struct i40e_ring, _name, _stat)
60 
61 /* Stats associated with a Tx or Rx ring */
62 static const struct i40e_stats i40e_gstrings_queue_stats[] = {
63 	I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
64 	I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
65 };
66 
67 /**
68  * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
69  * @data: location to store the stat value
70  * @pointer: basis for where to copy from
71  * @stat: the stat definition
72  *
73  * Copies the stat data defined by the pointer and stat structure pair into
74  * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
75  * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
76  */
77 static void
78 i40e_add_one_ethtool_stat(u64 *data, void *pointer,
79 			  const struct i40e_stats *stat)
80 {
81 	char *p;
82 
83 	if (!pointer) {
84 		/* ensure that the ethtool data buffer is zero'd for any stats
85 		 * which don't have a valid pointer.
86 		 */
87 		*data = 0;
88 		return;
89 	}
90 
91 	p = (char *)pointer + stat->stat_offset;
92 	switch (stat->sizeof_stat) {
93 	case sizeof(u64):
94 		*data = *((u64 *)p);
95 		break;
96 	case sizeof(u32):
97 		*data = *((u32 *)p);
98 		break;
99 	case sizeof(u16):
100 		*data = *((u16 *)p);
101 		break;
102 	case sizeof(u8):
103 		*data = *((u8 *)p);
104 		break;
105 	default:
106 		WARN_ONCE(1, "unexpected stat size for %s",
107 			  stat->stat_string);
108 		*data = 0;
109 	}
110 }
111 
112 /**
113  * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
114  * @data: ethtool stats buffer
115  * @pointer: location to copy stats from
116  * @stats: array of stats to copy
117  * @size: the size of the stats definition
118  *
119  * Copy the stats defined by the stats array using the pointer as a base into
120  * the data buffer supplied by ethtool. Updates the data pointer to point to
121  * the next empty location for successive calls to __i40e_add_ethtool_stats.
122  * If pointer is null, set the data values to zero and update the pointer to
123  * skip these stats.
124  **/
125 static void
126 __i40e_add_ethtool_stats(u64 **data, void *pointer,
127 			 const struct i40e_stats stats[],
128 			 const unsigned int size)
129 {
130 	unsigned int i;
131 
132 	for (i = 0; i < size; i++)
133 		i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
134 }
135 
136 /**
137  * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
138  * @data: ethtool stats buffer
139  * @pointer: location where stats are stored
140  * @stats: static const array of stat definitions
141  *
142  * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
143  * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
144  * ensuring that we pass the size associated with the given stats array.
145  *
146  * The parameter @stats is evaluated twice, so parameters with side effects
147  * should be avoided.
148  **/
149 #define i40e_add_ethtool_stats(data, pointer, stats) \
150 	__i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
151 
152 /**
153  * i40e_add_queue_stats - copy queue statistics into supplied buffer
154  * @data: ethtool stats buffer
155  * @ring: the ring to copy
156  *
157  * Queue statistics must be copied while protected by
158  * u64_stats_fetch_begin, so we can't directly use i40e_add_ethtool_stats.
159  * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
160  * ring pointer is null, zero out the queue stat values and update the data
161  * pointer. Otherwise safely copy the stats from the ring into the supplied
162  * buffer and update the data pointer when finished.
163  *
164  * This function expects to be called while under rcu_read_lock().
165  **/
166 static void
167 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
168 {
169 	const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
170 	const struct i40e_stats *stats = i40e_gstrings_queue_stats;
171 	unsigned int start;
172 	unsigned int i;
173 
174 	/* To avoid invalid statistics values, ensure that we keep retrying
175 	 * the copy until we get a consistent value according to
176 	 * u64_stats_fetch_retry. But first, make sure our ring is
177 	 * non-null before attempting to access its syncp.
178 	 */
179 	do {
180 		start = !ring ? 0 : u64_stats_fetch_begin(&ring->syncp);
181 		for (i = 0; i < size; i++) {
182 			i40e_add_one_ethtool_stat(&(*data)[i], ring,
183 						  &stats[i]);
184 		}
185 	} while (ring && u64_stats_fetch_retry(&ring->syncp, start));
186 
187 	/* Once we successfully copy the stats in, update the data pointer */
188 	*data += size;
189 }
190 
191 /**
192  * __i40e_add_stat_strings - copy stat strings into ethtool buffer
193  * @p: ethtool supplied buffer
194  * @stats: stat definitions array
195  * @size: size of the stats array
196  *
197  * Format and copy the strings described by stats into the buffer pointed at
198  * by p.
199  **/
200 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
201 				    const unsigned int size, ...)
202 {
203 	unsigned int i;
204 
205 	for (i = 0; i < size; i++) {
206 		va_list args;
207 
208 		va_start(args, size);
209 		vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
210 		*p += ETH_GSTRING_LEN;
211 		va_end(args);
212 	}
213 }
214 
215 /**
216  * i40e_add_stat_strings - copy stat strings into ethtool buffer
217  * @p: ethtool supplied buffer
218  * @stats: stat definitions array
219  *
220  * Format and copy the strings described by the const static stats value into
221  * the buffer pointed at by p.
222  *
223  * The parameter @stats is evaluated twice, so parameters with side effects
224  * should be avoided. Additionally, stats must be an array such that
225  * ARRAY_SIZE can be called on it.
226  **/
227 #define i40e_add_stat_strings(p, stats, ...) \
228 	__i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
229 
230 #define I40E_PF_STAT(_name, _stat) \
231 	I40E_STAT(struct i40e_pf, _name, _stat)
232 #define I40E_VSI_STAT(_name, _stat) \
233 	I40E_STAT(struct i40e_vsi, _name, _stat)
234 #define I40E_VEB_STAT(_name, _stat) \
235 	I40E_STAT(struct i40e_veb, _name, _stat)
236 #define I40E_VEB_TC_STAT(_name, _stat) \
237 	I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
238 #define I40E_PFC_STAT(_name, _stat) \
239 	I40E_STAT(struct i40e_pfc_stats, _name, _stat)
240 
241 static const struct i40e_stats i40e_gstrings_net_stats[] = {
242 	I40E_NETDEV_STAT(rx_packets),
243 	I40E_NETDEV_STAT(tx_packets),
244 	I40E_NETDEV_STAT(rx_bytes),
245 	I40E_NETDEV_STAT(tx_bytes),
246 	I40E_NETDEV_STAT(rx_errors),
247 	I40E_NETDEV_STAT(tx_errors),
248 	I40E_NETDEV_STAT(rx_dropped),
249 	I40E_NETDEV_STAT(tx_dropped),
250 	I40E_NETDEV_STAT(collisions),
251 	I40E_NETDEV_STAT(rx_length_errors),
252 	I40E_NETDEV_STAT(rx_crc_errors),
253 };
254 
255 static const struct i40e_stats i40e_gstrings_veb_stats[] = {
256 	I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
257 	I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
258 	I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
259 	I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
260 	I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
261 	I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
262 	I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
263 	I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
264 	I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
265 	I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
266 	I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
267 	I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
268 };
269 
270 struct i40e_cp_veb_tc_stats {
271 	u64 tc_rx_packets;
272 	u64 tc_rx_bytes;
273 	u64 tc_tx_packets;
274 	u64 tc_tx_bytes;
275 };
276 
277 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
278 	I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
279 	I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
280 	I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
281 	I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
282 };
283 
284 static const struct i40e_stats i40e_gstrings_misc_stats[] = {
285 	I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
286 	I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
287 	I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
288 	I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
289 	I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
290 	I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
291 	I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
292 	I40E_VSI_STAT("tx_linearize", tx_linearize),
293 	I40E_VSI_STAT("tx_force_wb", tx_force_wb),
294 	I40E_VSI_STAT("tx_busy", tx_busy),
295 	I40E_VSI_STAT("tx_stopped", tx_stopped),
296 	I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
297 	I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
298 	I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse),
299 	I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc),
300 	I40E_VSI_STAT("rx_cache_waive", rx_page_waive),
301 	I40E_VSI_STAT("rx_cache_busy", rx_page_busy),
302 	I40E_VSI_STAT("tx_restart", tx_restart),
303 };
304 
305 /* These PF_STATs might look like duplicates of some NETDEV_STATs,
306  * but they are separate.  This device supports Virtualization, and
307  * as such might have several netdevs supporting VMDq and FCoE going
308  * through a single port.  The NETDEV_STATs are for individual netdevs
309  * seen at the top of the stack, and the PF_STATs are for the physical
310  * function at the bottom of the stack hosting those netdevs.
311  *
312  * The PF_STATs are appended to the netdev stats only when ethtool -S
313  * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
314  */
315 static const struct i40e_stats i40e_gstrings_stats[] = {
316 	I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
317 	I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
318 	I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
319 	I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
320 	I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
321 	I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
322 	I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
323 	I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
324 	I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
325 	I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
326 	I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
327 	I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
328 	I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
329 	I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
330 	I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
331 	I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
332 	I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
333 	I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
334 	I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
335 	I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
336 	I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
337 	I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
338 	I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
339 	I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
340 	I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
341 	I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
342 	I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
343 	I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
344 	I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
345 	I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
346 	I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
347 	I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
348 	I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
349 	I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
350 	I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
351 	I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
352 	I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
353 	I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
354 	I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
355 	I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
356 	I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
357 	I40E_PF_STAT("port.arq_overflows", arq_overflows),
358 	I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
359 	I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
360 	I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
361 	I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
362 	I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
363 	I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
364 	I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
365 	I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
366 	I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
367 
368 	/* LPI stats */
369 	I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
370 	I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
371 	I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
372 	I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
373 };
374 
375 struct i40e_pfc_stats {
376 	u64 priority_xon_rx;
377 	u64 priority_xoff_rx;
378 	u64 priority_xon_tx;
379 	u64 priority_xoff_tx;
380 	u64 priority_xon_2_xoff;
381 };
382 
383 static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
384 	I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
385 	I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
386 	I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
387 	I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
388 	I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
389 };
390 
391 #define I40E_NETDEV_STATS_LEN	ARRAY_SIZE(i40e_gstrings_net_stats)
392 
393 #define I40E_MISC_STATS_LEN	ARRAY_SIZE(i40e_gstrings_misc_stats)
394 
395 #define I40E_VSI_STATS_LEN	(I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
396 
397 #define I40E_PFC_STATS_LEN	(ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
398 				 I40E_MAX_USER_PRIORITY)
399 
400 #define I40E_VEB_STATS_LEN	(ARRAY_SIZE(i40e_gstrings_veb_stats) + \
401 				 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
402 				  I40E_MAX_TRAFFIC_CLASS))
403 
404 #define I40E_GLOBAL_STATS_LEN	ARRAY_SIZE(i40e_gstrings_stats)
405 
406 #define I40E_PF_STATS_LEN	(I40E_GLOBAL_STATS_LEN + \
407 				 I40E_PFC_STATS_LEN + \
408 				 I40E_VEB_STATS_LEN + \
409 				 I40E_VSI_STATS_LEN)
410 
411 /* Length of stats for a single queue */
412 #define I40E_QUEUE_STATS_LEN	ARRAY_SIZE(i40e_gstrings_queue_stats)
413 
414 enum i40e_ethtool_test_id {
415 	I40E_ETH_TEST_REG = 0,
416 	I40E_ETH_TEST_EEPROM,
417 	I40E_ETH_TEST_INTR,
418 	I40E_ETH_TEST_LINK,
419 };
420 
421 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
422 	"Register test  (offline)",
423 	"Eeprom test    (offline)",
424 	"Interrupt test (offline)",
425 	"Link test   (on/offline)"
426 };
427 
428 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
429 
430 struct i40e_priv_flags {
431 	char flag_string[ETH_GSTRING_LEN];
432 	u64 flag;
433 	bool read_only;
434 };
435 
436 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
437 	.flag_string = _name, \
438 	.flag = _flag, \
439 	.read_only = _read_only, \
440 }
441 
442 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
443 	/* NOTE: MFP setting cannot be changed */
444 	I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
445 	I40E_PRIV_FLAG("total-port-shutdown",
446 		       I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1),
447 	I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
448 	I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
449 	I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
450 	I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
451 	I40E_PRIV_FLAG("link-down-on-close",
452 		       I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
453 	I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
454 	I40E_PRIV_FLAG("disable-source-pruning",
455 		       I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
456 	I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
457 	I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
458 	I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
459 	I40E_PRIV_FLAG("vf-vlan-pruning",
460 		       I40E_FLAG_VF_VLAN_PRUNING, 0),
461 };
462 
463 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
464 
465 /* Private flags with a global effect, restricted to PF 0 */
466 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
467 	I40E_PRIV_FLAG("vf-true-promisc-support",
468 		       I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
469 };
470 
471 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
472 
473 /**
474  * i40e_partition_setting_complaint - generic complaint for MFP restriction
475  * @pf: the PF struct
476  **/
477 static void i40e_partition_setting_complaint(struct i40e_pf *pf)
478 {
479 	dev_info(&pf->pdev->dev,
480 		 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
481 }
482 
483 /**
484  * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
485  * @pf: PF struct with phy_types
486  * @ks: ethtool link ksettings struct to fill out
487  *
488  **/
489 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
490 				     struct ethtool_link_ksettings *ks)
491 {
492 	struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
493 	u64 phy_types = pf->hw.phy.phy_types;
494 
495 	ethtool_link_ksettings_zero_link_mode(ks, supported);
496 	ethtool_link_ksettings_zero_link_mode(ks, advertising);
497 
498 	if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
499 		ethtool_link_ksettings_add_link_mode(ks, supported,
500 						     1000baseT_Full);
501 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
502 			ethtool_link_ksettings_add_link_mode(ks, advertising,
503 							     1000baseT_Full);
504 		if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
505 			ethtool_link_ksettings_add_link_mode(ks, supported,
506 							     100baseT_Full);
507 			ethtool_link_ksettings_add_link_mode(ks, advertising,
508 							     100baseT_Full);
509 		}
510 	}
511 	if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
512 	    phy_types & I40E_CAP_PHY_TYPE_XFI ||
513 	    phy_types & I40E_CAP_PHY_TYPE_SFI ||
514 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
515 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
516 		ethtool_link_ksettings_add_link_mode(ks, supported,
517 						     10000baseT_Full);
518 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
519 			ethtool_link_ksettings_add_link_mode(ks, advertising,
520 							     10000baseT_Full);
521 	}
522 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
523 		ethtool_link_ksettings_add_link_mode(ks, supported,
524 						     10000baseT_Full);
525 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
526 			ethtool_link_ksettings_add_link_mode(ks, advertising,
527 							     10000baseT_Full);
528 	}
529 	if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
530 		ethtool_link_ksettings_add_link_mode(ks, supported,
531 						     2500baseT_Full);
532 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
533 			ethtool_link_ksettings_add_link_mode(ks, advertising,
534 							     2500baseT_Full);
535 	}
536 	if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
537 		ethtool_link_ksettings_add_link_mode(ks, supported,
538 						     5000baseT_Full);
539 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
540 			ethtool_link_ksettings_add_link_mode(ks, advertising,
541 							     5000baseT_Full);
542 	}
543 	if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
544 	    phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
545 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
546 		ethtool_link_ksettings_add_link_mode(ks, supported,
547 						     40000baseCR4_Full);
548 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
549 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
550 		ethtool_link_ksettings_add_link_mode(ks, supported,
551 						     40000baseCR4_Full);
552 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
553 			ethtool_link_ksettings_add_link_mode(ks, advertising,
554 							     40000baseCR4_Full);
555 	}
556 	if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
557 		ethtool_link_ksettings_add_link_mode(ks, supported,
558 						     100baseT_Full);
559 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
560 			ethtool_link_ksettings_add_link_mode(ks, advertising,
561 							     100baseT_Full);
562 	}
563 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
564 		ethtool_link_ksettings_add_link_mode(ks, supported,
565 						     1000baseT_Full);
566 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
567 			ethtool_link_ksettings_add_link_mode(ks, advertising,
568 							     1000baseT_Full);
569 	}
570 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
571 		ethtool_link_ksettings_add_link_mode(ks, supported,
572 						     40000baseSR4_Full);
573 		ethtool_link_ksettings_add_link_mode(ks, advertising,
574 						     40000baseSR4_Full);
575 	}
576 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
577 		ethtool_link_ksettings_add_link_mode(ks, supported,
578 						     40000baseLR4_Full);
579 		ethtool_link_ksettings_add_link_mode(ks, advertising,
580 						     40000baseLR4_Full);
581 	}
582 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
583 		ethtool_link_ksettings_add_link_mode(ks, supported,
584 						     40000baseKR4_Full);
585 		ethtool_link_ksettings_add_link_mode(ks, advertising,
586 						     40000baseKR4_Full);
587 	}
588 	if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
589 		ethtool_link_ksettings_add_link_mode(ks, supported,
590 						     20000baseKR2_Full);
591 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
592 			ethtool_link_ksettings_add_link_mode(ks, advertising,
593 							     20000baseKR2_Full);
594 	}
595 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
596 		ethtool_link_ksettings_add_link_mode(ks, supported,
597 						     10000baseKX4_Full);
598 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
599 			ethtool_link_ksettings_add_link_mode(ks, advertising,
600 							     10000baseKX4_Full);
601 	}
602 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
603 	    !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
604 		ethtool_link_ksettings_add_link_mode(ks, supported,
605 						     10000baseKR_Full);
606 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
607 			ethtool_link_ksettings_add_link_mode(ks, advertising,
608 							     10000baseKR_Full);
609 	}
610 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
611 	    !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
612 		ethtool_link_ksettings_add_link_mode(ks, supported,
613 						     1000baseKX_Full);
614 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
615 			ethtool_link_ksettings_add_link_mode(ks, advertising,
616 							     1000baseKX_Full);
617 	}
618 	/* need to add 25G PHY types */
619 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
620 		ethtool_link_ksettings_add_link_mode(ks, supported,
621 						     25000baseKR_Full);
622 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
623 			ethtool_link_ksettings_add_link_mode(ks, advertising,
624 							     25000baseKR_Full);
625 	}
626 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
627 		ethtool_link_ksettings_add_link_mode(ks, supported,
628 						     25000baseCR_Full);
629 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
630 			ethtool_link_ksettings_add_link_mode(ks, advertising,
631 							     25000baseCR_Full);
632 	}
633 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
634 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
635 		ethtool_link_ksettings_add_link_mode(ks, supported,
636 						     25000baseSR_Full);
637 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
638 			ethtool_link_ksettings_add_link_mode(ks, advertising,
639 							     25000baseSR_Full);
640 	}
641 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
642 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
643 		ethtool_link_ksettings_add_link_mode(ks, supported,
644 						     25000baseCR_Full);
645 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
646 			ethtool_link_ksettings_add_link_mode(ks, advertising,
647 							     25000baseCR_Full);
648 	}
649 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
650 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
651 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
652 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
653 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
654 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
655 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
656 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
657 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
658 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
659 			ethtool_link_ksettings_add_link_mode(ks, advertising,
660 							     FEC_NONE);
661 			ethtool_link_ksettings_add_link_mode(ks, advertising,
662 							     FEC_RS);
663 			ethtool_link_ksettings_add_link_mode(ks, advertising,
664 							     FEC_BASER);
665 		}
666 	}
667 	/* need to add new 10G PHY types */
668 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
669 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
670 		ethtool_link_ksettings_add_link_mode(ks, supported,
671 						     10000baseCR_Full);
672 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
673 			ethtool_link_ksettings_add_link_mode(ks, advertising,
674 							     10000baseCR_Full);
675 	}
676 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
677 		ethtool_link_ksettings_add_link_mode(ks, supported,
678 						     10000baseSR_Full);
679 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
680 			ethtool_link_ksettings_add_link_mode(ks, advertising,
681 							     10000baseSR_Full);
682 	}
683 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
684 		ethtool_link_ksettings_add_link_mode(ks, supported,
685 						     10000baseLR_Full);
686 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
687 			ethtool_link_ksettings_add_link_mode(ks, advertising,
688 							     10000baseLR_Full);
689 	}
690 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
691 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
692 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
693 		ethtool_link_ksettings_add_link_mode(ks, supported,
694 						     1000baseX_Full);
695 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
696 			ethtool_link_ksettings_add_link_mode(ks, advertising,
697 							     1000baseX_Full);
698 	}
699 	/* Autoneg PHY types */
700 	if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
701 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
702 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
703 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
704 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
705 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
706 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
707 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
708 	    phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
709 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
710 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
711 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
712 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
713 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
714 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
715 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
716 	    phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
717 	    phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
718 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
719 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
720 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
721 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
722 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
723 	    phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
724 		ethtool_link_ksettings_add_link_mode(ks, supported,
725 						     Autoneg);
726 		ethtool_link_ksettings_add_link_mode(ks, advertising,
727 						     Autoneg);
728 	}
729 }
730 
731 /**
732  * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
733  * @req_fec_info: mask request FEC info
734  * @ks: ethtool ksettings to fill in
735  **/
736 static void i40e_get_settings_link_up_fec(u8 req_fec_info,
737 					  struct ethtool_link_ksettings *ks)
738 {
739 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
740 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
741 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
742 
743 	if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
744 	    (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
745 		ethtool_link_ksettings_add_link_mode(ks, advertising,
746 						     FEC_NONE);
747 		ethtool_link_ksettings_add_link_mode(ks, advertising,
748 						     FEC_BASER);
749 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
750 	} else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
751 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
752 	} else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
753 		ethtool_link_ksettings_add_link_mode(ks, advertising,
754 						     FEC_BASER);
755 	} else {
756 		ethtool_link_ksettings_add_link_mode(ks, advertising,
757 						     FEC_NONE);
758 	}
759 }
760 
761 /**
762  * i40e_get_settings_link_up - Get the Link settings for when link is up
763  * @hw: hw structure
764  * @ks: ethtool ksettings to fill in
765  * @netdev: network interface device structure
766  * @pf: pointer to physical function struct
767  **/
768 static void i40e_get_settings_link_up(struct i40e_hw *hw,
769 				      struct ethtool_link_ksettings *ks,
770 				      struct net_device *netdev,
771 				      struct i40e_pf *pf)
772 {
773 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
774 	struct ethtool_link_ksettings cap_ksettings;
775 	u32 link_speed = hw_link_info->link_speed;
776 
777 	/* Initialize supported and advertised settings based on phy settings */
778 	switch (hw_link_info->phy_type) {
779 	case I40E_PHY_TYPE_40GBASE_CR4:
780 	case I40E_PHY_TYPE_40GBASE_CR4_CU:
781 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
782 		ethtool_link_ksettings_add_link_mode(ks, supported,
783 						     40000baseCR4_Full);
784 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
785 		ethtool_link_ksettings_add_link_mode(ks, advertising,
786 						     40000baseCR4_Full);
787 		break;
788 	case I40E_PHY_TYPE_XLAUI:
789 	case I40E_PHY_TYPE_XLPPI:
790 	case I40E_PHY_TYPE_40GBASE_AOC:
791 		ethtool_link_ksettings_add_link_mode(ks, supported,
792 						     40000baseCR4_Full);
793 		ethtool_link_ksettings_add_link_mode(ks, advertising,
794 						     40000baseCR4_Full);
795 		break;
796 	case I40E_PHY_TYPE_40GBASE_SR4:
797 		ethtool_link_ksettings_add_link_mode(ks, supported,
798 						     40000baseSR4_Full);
799 		ethtool_link_ksettings_add_link_mode(ks, advertising,
800 						     40000baseSR4_Full);
801 		break;
802 	case I40E_PHY_TYPE_40GBASE_LR4:
803 		ethtool_link_ksettings_add_link_mode(ks, supported,
804 						     40000baseLR4_Full);
805 		ethtool_link_ksettings_add_link_mode(ks, advertising,
806 						     40000baseLR4_Full);
807 		break;
808 	case I40E_PHY_TYPE_25GBASE_SR:
809 	case I40E_PHY_TYPE_25GBASE_LR:
810 	case I40E_PHY_TYPE_10GBASE_SR:
811 	case I40E_PHY_TYPE_10GBASE_LR:
812 	case I40E_PHY_TYPE_1000BASE_SX:
813 	case I40E_PHY_TYPE_1000BASE_LX:
814 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
815 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
816 		ethtool_link_ksettings_add_link_mode(ks, supported,
817 						     25000baseSR_Full);
818 		ethtool_link_ksettings_add_link_mode(ks, advertising,
819 						     25000baseSR_Full);
820 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
821 		ethtool_link_ksettings_add_link_mode(ks, supported,
822 						     10000baseSR_Full);
823 		ethtool_link_ksettings_add_link_mode(ks, advertising,
824 						     10000baseSR_Full);
825 		ethtool_link_ksettings_add_link_mode(ks, supported,
826 						     10000baseLR_Full);
827 		ethtool_link_ksettings_add_link_mode(ks, advertising,
828 						     10000baseLR_Full);
829 		ethtool_link_ksettings_add_link_mode(ks, supported,
830 						     1000baseX_Full);
831 		ethtool_link_ksettings_add_link_mode(ks, advertising,
832 						     1000baseX_Full);
833 		ethtool_link_ksettings_add_link_mode(ks, supported,
834 						     10000baseT_Full);
835 		if (hw_link_info->module_type[2] &
836 		    I40E_MODULE_TYPE_1000BASE_SX ||
837 		    hw_link_info->module_type[2] &
838 		    I40E_MODULE_TYPE_1000BASE_LX) {
839 			ethtool_link_ksettings_add_link_mode(ks, supported,
840 							     1000baseT_Full);
841 			if (hw_link_info->requested_speeds &
842 			    I40E_LINK_SPEED_1GB)
843 				ethtool_link_ksettings_add_link_mode(
844 				     ks, advertising, 1000baseT_Full);
845 		}
846 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
847 			ethtool_link_ksettings_add_link_mode(ks, advertising,
848 							     10000baseT_Full);
849 		break;
850 	case I40E_PHY_TYPE_10GBASE_T:
851 	case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
852 	case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
853 	case I40E_PHY_TYPE_1000BASE_T:
854 	case I40E_PHY_TYPE_100BASE_TX:
855 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
856 		ethtool_link_ksettings_add_link_mode(ks, supported,
857 						     10000baseT_Full);
858 		ethtool_link_ksettings_add_link_mode(ks, supported,
859 						     5000baseT_Full);
860 		ethtool_link_ksettings_add_link_mode(ks, supported,
861 						     2500baseT_Full);
862 		ethtool_link_ksettings_add_link_mode(ks, supported,
863 						     1000baseT_Full);
864 		ethtool_link_ksettings_add_link_mode(ks, supported,
865 						     100baseT_Full);
866 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
867 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
868 			ethtool_link_ksettings_add_link_mode(ks, advertising,
869 							     10000baseT_Full);
870 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
871 			ethtool_link_ksettings_add_link_mode(ks, advertising,
872 							     5000baseT_Full);
873 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
874 			ethtool_link_ksettings_add_link_mode(ks, advertising,
875 							     2500baseT_Full);
876 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
877 			ethtool_link_ksettings_add_link_mode(ks, advertising,
878 							     1000baseT_Full);
879 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
880 			ethtool_link_ksettings_add_link_mode(ks, advertising,
881 							     100baseT_Full);
882 		break;
883 	case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
884 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
885 		ethtool_link_ksettings_add_link_mode(ks, supported,
886 						     1000baseT_Full);
887 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
888 		ethtool_link_ksettings_add_link_mode(ks, advertising,
889 						     1000baseT_Full);
890 		break;
891 	case I40E_PHY_TYPE_10GBASE_CR1_CU:
892 	case I40E_PHY_TYPE_10GBASE_CR1:
893 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
894 		ethtool_link_ksettings_add_link_mode(ks, supported,
895 						     10000baseT_Full);
896 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
897 		ethtool_link_ksettings_add_link_mode(ks, advertising,
898 						     10000baseT_Full);
899 		break;
900 	case I40E_PHY_TYPE_XAUI:
901 	case I40E_PHY_TYPE_XFI:
902 	case I40E_PHY_TYPE_SFI:
903 	case I40E_PHY_TYPE_10GBASE_SFPP_CU:
904 	case I40E_PHY_TYPE_10GBASE_AOC:
905 		ethtool_link_ksettings_add_link_mode(ks, supported,
906 						     10000baseT_Full);
907 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
908 			ethtool_link_ksettings_add_link_mode(ks, advertising,
909 							     10000baseT_Full);
910 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
911 		break;
912 	case I40E_PHY_TYPE_SGMII:
913 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
914 		ethtool_link_ksettings_add_link_mode(ks, supported,
915 						     1000baseT_Full);
916 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
917 			ethtool_link_ksettings_add_link_mode(ks, advertising,
918 							     1000baseT_Full);
919 		if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
920 			ethtool_link_ksettings_add_link_mode(ks, supported,
921 							     100baseT_Full);
922 			if (hw_link_info->requested_speeds &
923 			    I40E_LINK_SPEED_100MB)
924 				ethtool_link_ksettings_add_link_mode(
925 				      ks, advertising, 100baseT_Full);
926 		}
927 		break;
928 	case I40E_PHY_TYPE_40GBASE_KR4:
929 	case I40E_PHY_TYPE_25GBASE_KR:
930 	case I40E_PHY_TYPE_20GBASE_KR2:
931 	case I40E_PHY_TYPE_10GBASE_KR:
932 	case I40E_PHY_TYPE_10GBASE_KX4:
933 	case I40E_PHY_TYPE_1000BASE_KX:
934 		ethtool_link_ksettings_add_link_mode(ks, supported,
935 						     40000baseKR4_Full);
936 		ethtool_link_ksettings_add_link_mode(ks, supported,
937 						     25000baseKR_Full);
938 		ethtool_link_ksettings_add_link_mode(ks, supported,
939 						     20000baseKR2_Full);
940 		ethtool_link_ksettings_add_link_mode(ks, supported,
941 						     10000baseKR_Full);
942 		ethtool_link_ksettings_add_link_mode(ks, supported,
943 						     10000baseKX4_Full);
944 		ethtool_link_ksettings_add_link_mode(ks, supported,
945 						     1000baseKX_Full);
946 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
947 		ethtool_link_ksettings_add_link_mode(ks, advertising,
948 						     40000baseKR4_Full);
949 		ethtool_link_ksettings_add_link_mode(ks, advertising,
950 						     25000baseKR_Full);
951 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
952 		ethtool_link_ksettings_add_link_mode(ks, advertising,
953 						     20000baseKR2_Full);
954 		ethtool_link_ksettings_add_link_mode(ks, advertising,
955 						     10000baseKR_Full);
956 		ethtool_link_ksettings_add_link_mode(ks, advertising,
957 						     10000baseKX4_Full);
958 		ethtool_link_ksettings_add_link_mode(ks, advertising,
959 						     1000baseKX_Full);
960 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
961 		break;
962 	case I40E_PHY_TYPE_25GBASE_CR:
963 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
964 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
965 		ethtool_link_ksettings_add_link_mode(ks, supported,
966 						     25000baseCR_Full);
967 		ethtool_link_ksettings_add_link_mode(ks, advertising,
968 						     25000baseCR_Full);
969 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
970 
971 		break;
972 	case I40E_PHY_TYPE_25GBASE_AOC:
973 	case I40E_PHY_TYPE_25GBASE_ACC:
974 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
975 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
976 		ethtool_link_ksettings_add_link_mode(ks, supported,
977 						     25000baseCR_Full);
978 		ethtool_link_ksettings_add_link_mode(ks, advertising,
979 						     25000baseCR_Full);
980 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
981 
982 		ethtool_link_ksettings_add_link_mode(ks, supported,
983 						     10000baseCR_Full);
984 		ethtool_link_ksettings_add_link_mode(ks, advertising,
985 						     10000baseCR_Full);
986 		break;
987 	default:
988 		/* if we got here and link is up something bad is afoot */
989 		netdev_info(netdev,
990 			    "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
991 			    hw_link_info->phy_type);
992 	}
993 
994 	/* Now that we've worked out everything that could be supported by the
995 	 * current PHY type, get what is supported by the NVM and intersect
996 	 * them to get what is truly supported
997 	 */
998 	memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
999 	i40e_phy_type_to_ethtool(pf, &cap_ksettings);
1000 	ethtool_intersect_link_masks(ks, &cap_ksettings);
1001 
1002 	/* Set speed and duplex */
1003 	switch (link_speed) {
1004 	case I40E_LINK_SPEED_40GB:
1005 		ks->base.speed = SPEED_40000;
1006 		break;
1007 	case I40E_LINK_SPEED_25GB:
1008 		ks->base.speed = SPEED_25000;
1009 		break;
1010 	case I40E_LINK_SPEED_20GB:
1011 		ks->base.speed = SPEED_20000;
1012 		break;
1013 	case I40E_LINK_SPEED_10GB:
1014 		ks->base.speed = SPEED_10000;
1015 		break;
1016 	case I40E_LINK_SPEED_5GB:
1017 		ks->base.speed = SPEED_5000;
1018 		break;
1019 	case I40E_LINK_SPEED_2_5GB:
1020 		ks->base.speed = SPEED_2500;
1021 		break;
1022 	case I40E_LINK_SPEED_1GB:
1023 		ks->base.speed = SPEED_1000;
1024 		break;
1025 	case I40E_LINK_SPEED_100MB:
1026 		ks->base.speed = SPEED_100;
1027 		break;
1028 	default:
1029 		ks->base.speed = SPEED_UNKNOWN;
1030 		break;
1031 	}
1032 	ks->base.duplex = DUPLEX_FULL;
1033 }
1034 
1035 /**
1036  * i40e_get_settings_link_down - Get the Link settings for when link is down
1037  * @hw: hw structure
1038  * @ks: ethtool ksettings to fill in
1039  * @pf: pointer to physical function struct
1040  *
1041  * Reports link settings that can be determined when link is down
1042  **/
1043 static void i40e_get_settings_link_down(struct i40e_hw *hw,
1044 					struct ethtool_link_ksettings *ks,
1045 					struct i40e_pf *pf)
1046 {
1047 	/* link is down and the driver needs to fall back on
1048 	 * supported phy types to figure out what info to display
1049 	 */
1050 	i40e_phy_type_to_ethtool(pf, ks);
1051 
1052 	/* With no link speed and duplex are unknown */
1053 	ks->base.speed = SPEED_UNKNOWN;
1054 	ks->base.duplex = DUPLEX_UNKNOWN;
1055 }
1056 
1057 /**
1058  * i40e_get_link_ksettings - Get Link Speed and Duplex settings
1059  * @netdev: network interface device structure
1060  * @ks: ethtool ksettings
1061  *
1062  * Reports speed/duplex settings based on media_type
1063  **/
1064 static int i40e_get_link_ksettings(struct net_device *netdev,
1065 				   struct ethtool_link_ksettings *ks)
1066 {
1067 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 	struct i40e_pf *pf = np->vsi->back;
1069 	struct i40e_hw *hw = &pf->hw;
1070 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1071 	bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1072 
1073 	ethtool_link_ksettings_zero_link_mode(ks, supported);
1074 	ethtool_link_ksettings_zero_link_mode(ks, advertising);
1075 
1076 	if (link_up)
1077 		i40e_get_settings_link_up(hw, ks, netdev, pf);
1078 	else
1079 		i40e_get_settings_link_down(hw, ks, pf);
1080 
1081 	/* Now set the settings that don't rely on link being up/down */
1082 	/* Set autoneg settings */
1083 	ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1084 			    AUTONEG_ENABLE : AUTONEG_DISABLE);
1085 
1086 	/* Set media type settings */
1087 	switch (hw->phy.media_type) {
1088 	case I40E_MEDIA_TYPE_BACKPLANE:
1089 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
1090 		ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
1091 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1092 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1093 						     Backplane);
1094 		ks->base.port = PORT_NONE;
1095 		break;
1096 	case I40E_MEDIA_TYPE_BASET:
1097 		ethtool_link_ksettings_add_link_mode(ks, supported, TP);
1098 		ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
1099 		ks->base.port = PORT_TP;
1100 		break;
1101 	case I40E_MEDIA_TYPE_DA:
1102 	case I40E_MEDIA_TYPE_CX4:
1103 		ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1104 		ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1105 		ks->base.port = PORT_DA;
1106 		break;
1107 	case I40E_MEDIA_TYPE_FIBER:
1108 		ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1109 		ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1110 		ks->base.port = PORT_FIBRE;
1111 		break;
1112 	case I40E_MEDIA_TYPE_UNKNOWN:
1113 	default:
1114 		ks->base.port = PORT_OTHER;
1115 		break;
1116 	}
1117 
1118 	/* Set flow control settings */
1119 	ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
1120 	ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
1121 
1122 	switch (hw->fc.requested_mode) {
1123 	case I40E_FC_FULL:
1124 		ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1125 		break;
1126 	case I40E_FC_TX_PAUSE:
1127 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1128 						     Asym_Pause);
1129 		break;
1130 	case I40E_FC_RX_PAUSE:
1131 		ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1132 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1133 						     Asym_Pause);
1134 		break;
1135 	default:
1136 		ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
1137 		ethtool_link_ksettings_del_link_mode(ks, advertising,
1138 						     Asym_Pause);
1139 		break;
1140 	}
1141 
1142 	return 0;
1143 }
1144 
1145 #define I40E_LBIT_SIZE 8
1146 /**
1147  * i40e_speed_to_link_speed - Translate decimal speed to i40e_aq_link_speed
1148  * @speed: speed in decimal
1149  * @ks: ethtool ksettings
1150  *
1151  * Return i40e_aq_link_speed based on speed
1152  **/
1153 static enum i40e_aq_link_speed
1154 i40e_speed_to_link_speed(__u32 speed, const struct ethtool_link_ksettings *ks)
1155 {
1156 	enum i40e_aq_link_speed link_speed = I40E_LINK_SPEED_UNKNOWN;
1157 	bool speed_changed = false;
1158 	int i, j;
1159 
1160 	static const struct {
1161 		__u32 speed;
1162 		enum i40e_aq_link_speed link_speed;
1163 		__u8 bit[I40E_LBIT_SIZE];
1164 	} i40e_speed_lut[] = {
1165 #define I40E_LBIT(mode) ETHTOOL_LINK_MODE_ ## mode ##_Full_BIT
1166 		{SPEED_100, I40E_LINK_SPEED_100MB, {I40E_LBIT(100baseT)} },
1167 		{SPEED_1000, I40E_LINK_SPEED_1GB,
1168 		 {I40E_LBIT(1000baseT), I40E_LBIT(1000baseX),
1169 		  I40E_LBIT(1000baseKX)} },
1170 		{SPEED_10000, I40E_LINK_SPEED_10GB,
1171 		 {I40E_LBIT(10000baseT), I40E_LBIT(10000baseKR),
1172 		  I40E_LBIT(10000baseLR), I40E_LBIT(10000baseCR),
1173 		  I40E_LBIT(10000baseSR), I40E_LBIT(10000baseKX4)} },
1174 
1175 		{SPEED_25000, I40E_LINK_SPEED_25GB,
1176 		 {I40E_LBIT(25000baseCR), I40E_LBIT(25000baseKR),
1177 		  I40E_LBIT(25000baseSR)} },
1178 		{SPEED_40000, I40E_LINK_SPEED_40GB,
1179 		 {I40E_LBIT(40000baseKR4), I40E_LBIT(40000baseCR4),
1180 		  I40E_LBIT(40000baseSR4), I40E_LBIT(40000baseLR4)} },
1181 		{SPEED_20000, I40E_LINK_SPEED_20GB,
1182 		 {I40E_LBIT(20000baseKR2)} },
1183 		{SPEED_2500, I40E_LINK_SPEED_2_5GB, {I40E_LBIT(2500baseT)} },
1184 		{SPEED_5000, I40E_LINK_SPEED_5GB, {I40E_LBIT(2500baseT)} }
1185 #undef I40E_LBIT
1186 };
1187 
1188 	for (i = 0; i < ARRAY_SIZE(i40e_speed_lut); i++) {
1189 		if (i40e_speed_lut[i].speed == speed) {
1190 			for (j = 0; j < I40E_LBIT_SIZE; j++) {
1191 				if (test_bit(i40e_speed_lut[i].bit[j],
1192 					     ks->link_modes.supported)) {
1193 					speed_changed = true;
1194 					break;
1195 				}
1196 				if (!i40e_speed_lut[i].bit[j])
1197 					break;
1198 			}
1199 			if (speed_changed) {
1200 				link_speed = i40e_speed_lut[i].link_speed;
1201 				break;
1202 			}
1203 		}
1204 	}
1205 	return link_speed;
1206 }
1207 
1208 #undef I40E_LBIT_SIZE
1209 
1210 /**
1211  * i40e_set_link_ksettings - Set Speed and Duplex
1212  * @netdev: network interface device structure
1213  * @ks: ethtool ksettings
1214  *
1215  * Set speed/duplex per media_types advertised/forced
1216  **/
1217 static int i40e_set_link_ksettings(struct net_device *netdev,
1218 				   const struct ethtool_link_ksettings *ks)
1219 {
1220 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1221 	struct i40e_aq_get_phy_abilities_resp abilities;
1222 	struct ethtool_link_ksettings safe_ks;
1223 	struct ethtool_link_ksettings copy_ks;
1224 	struct i40e_aq_set_phy_config config;
1225 	struct i40e_pf *pf = np->vsi->back;
1226 	enum i40e_aq_link_speed link_speed;
1227 	struct i40e_vsi *vsi = np->vsi;
1228 	struct i40e_hw *hw = &pf->hw;
1229 	bool autoneg_changed = false;
1230 	int timeout = 50;
1231 	int status = 0;
1232 	int err = 0;
1233 	__u32 speed;
1234 	u8 autoneg;
1235 
1236 	/* Changing port settings is not supported if this isn't the
1237 	 * port's controlling PF
1238 	 */
1239 	if (hw->partition_id != 1) {
1240 		i40e_partition_setting_complaint(pf);
1241 		return -EOPNOTSUPP;
1242 	}
1243 	if (vsi != pf->vsi[pf->lan_vsi])
1244 		return -EOPNOTSUPP;
1245 	if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
1246 	    hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
1247 	    hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
1248 	    hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
1249 	    hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
1250 		return -EOPNOTSUPP;
1251 	if (hw->device_id == I40E_DEV_ID_KX_B ||
1252 	    hw->device_id == I40E_DEV_ID_KX_C ||
1253 	    hw->device_id == I40E_DEV_ID_20G_KR2 ||
1254 	    hw->device_id == I40E_DEV_ID_20G_KR2_A ||
1255 	    hw->device_id == I40E_DEV_ID_25G_B ||
1256 	    hw->device_id == I40E_DEV_ID_KX_X722) {
1257 		netdev_info(netdev, "Changing settings is not supported on backplane.\n");
1258 		return -EOPNOTSUPP;
1259 	}
1260 
1261 	/* copy the ksettings to copy_ks to avoid modifying the origin */
1262 	memcpy(&copy_ks, ks, sizeof(struct ethtool_link_ksettings));
1263 
1264 	/* save autoneg out of ksettings */
1265 	autoneg = copy_ks.base.autoneg;
1266 	speed = copy_ks.base.speed;
1267 
1268 	/* get our own copy of the bits to check against */
1269 	memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
1270 	safe_ks.base.cmd = copy_ks.base.cmd;
1271 	safe_ks.base.link_mode_masks_nwords =
1272 		copy_ks.base.link_mode_masks_nwords;
1273 	i40e_get_link_ksettings(netdev, &safe_ks);
1274 
1275 	/* Get link modes supported by hardware and check against modes
1276 	 * requested by the user.  Return an error if unsupported mode was set.
1277 	 */
1278 	if (!bitmap_subset(copy_ks.link_modes.advertising,
1279 			   safe_ks.link_modes.supported,
1280 			   __ETHTOOL_LINK_MODE_MASK_NBITS))
1281 		return -EINVAL;
1282 
1283 	/* set autoneg back to what it currently is */
1284 	copy_ks.base.autoneg = safe_ks.base.autoneg;
1285 	copy_ks.base.speed  = safe_ks.base.speed;
1286 
1287 	/* If copy_ks.base and safe_ks.base are not the same now, then they are
1288 	 * trying to set something that we do not support.
1289 	 */
1290 	if (memcmp(&copy_ks.base, &safe_ks.base,
1291 		   sizeof(struct ethtool_link_settings))) {
1292 		netdev_err(netdev, "Only speed and autoneg are supported.\n");
1293 		return -EOPNOTSUPP;
1294 	}
1295 
1296 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1297 		timeout--;
1298 		if (!timeout)
1299 			return -EBUSY;
1300 		usleep_range(1000, 2000);
1301 	}
1302 
1303 	/* Get the current phy config */
1304 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1305 					      NULL);
1306 	if (status) {
1307 		err = -EAGAIN;
1308 		goto done;
1309 	}
1310 
1311 	/* Copy abilities to config in case autoneg is not
1312 	 * set below
1313 	 */
1314 	memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
1315 	config.abilities = abilities.abilities;
1316 
1317 	/* Check autoneg */
1318 	if (autoneg == AUTONEG_ENABLE) {
1319 		/* If autoneg was not already enabled */
1320 		if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
1321 			/* If autoneg is not supported, return error */
1322 			if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
1323 								   supported,
1324 								   Autoneg)) {
1325 				netdev_info(netdev, "Autoneg not supported on this phy\n");
1326 				err = -EINVAL;
1327 				goto done;
1328 			}
1329 			/* Autoneg is allowed to change */
1330 			config.abilities = abilities.abilities |
1331 					   I40E_AQ_PHY_ENABLE_AN;
1332 			autoneg_changed = true;
1333 		}
1334 	} else {
1335 		/* If autoneg is currently enabled */
1336 		if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
1337 			/* If autoneg is supported 10GBASE_T is the only PHY
1338 			 * that can disable it, so otherwise return error
1339 			 */
1340 			if (ethtool_link_ksettings_test_link_mode(&safe_ks,
1341 								  supported,
1342 								  Autoneg) &&
1343 			    hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
1344 				netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
1345 				err = -EINVAL;
1346 				goto done;
1347 			}
1348 			/* Autoneg is allowed to change */
1349 			config.abilities = abilities.abilities &
1350 					   ~I40E_AQ_PHY_ENABLE_AN;
1351 			autoneg_changed = true;
1352 		}
1353 	}
1354 
1355 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1356 						  100baseT_Full))
1357 		config.link_speed |= I40E_LINK_SPEED_100MB;
1358 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1359 						  1000baseT_Full) ||
1360 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1361 						  1000baseX_Full) ||
1362 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1363 						  1000baseKX_Full))
1364 		config.link_speed |= I40E_LINK_SPEED_1GB;
1365 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1366 						  10000baseT_Full) ||
1367 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1368 						  10000baseKX4_Full) ||
1369 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1370 						  10000baseKR_Full) ||
1371 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1372 						  10000baseCR_Full) ||
1373 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1374 						  10000baseSR_Full) ||
1375 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1376 						  10000baseLR_Full))
1377 		config.link_speed |= I40E_LINK_SPEED_10GB;
1378 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1379 						  2500baseT_Full))
1380 		config.link_speed |= I40E_LINK_SPEED_2_5GB;
1381 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1382 						  5000baseT_Full))
1383 		config.link_speed |= I40E_LINK_SPEED_5GB;
1384 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1385 						  20000baseKR2_Full))
1386 		config.link_speed |= I40E_LINK_SPEED_20GB;
1387 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1388 						  25000baseCR_Full) ||
1389 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1390 						  25000baseKR_Full) ||
1391 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1392 						  25000baseSR_Full))
1393 		config.link_speed |= I40E_LINK_SPEED_25GB;
1394 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1395 						  40000baseKR4_Full) ||
1396 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1397 						  40000baseCR4_Full) ||
1398 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1399 						  40000baseSR4_Full) ||
1400 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1401 						  40000baseLR4_Full))
1402 		config.link_speed |= I40E_LINK_SPEED_40GB;
1403 
1404 	/* Autonegotiation must be disabled to change speed */
1405 	if ((speed != SPEED_UNKNOWN && safe_ks.base.speed != speed) &&
1406 	    (autoneg == AUTONEG_DISABLE ||
1407 	    (safe_ks.base.autoneg == AUTONEG_DISABLE && !autoneg_changed))) {
1408 		link_speed = i40e_speed_to_link_speed(speed, ks);
1409 		if (link_speed == I40E_LINK_SPEED_UNKNOWN) {
1410 			netdev_info(netdev, "Given speed is not supported\n");
1411 			err = -EOPNOTSUPP;
1412 			goto done;
1413 		} else {
1414 			config.link_speed = link_speed;
1415 		}
1416 	} else {
1417 		if (safe_ks.base.speed != speed) {
1418 			netdev_info(netdev,
1419 				    "Unable to set speed, disable autoneg\n");
1420 			err = -EOPNOTSUPP;
1421 			goto done;
1422 		}
1423 	}
1424 
1425 	/* If speed didn't get set, set it to what it currently is.
1426 	 * This is needed because if advertise is 0 (as it is when autoneg
1427 	 * is disabled) then speed won't get set.
1428 	 */
1429 	if (!config.link_speed)
1430 		config.link_speed = abilities.link_speed;
1431 	if (autoneg_changed || abilities.link_speed != config.link_speed) {
1432 		/* copy over the rest of the abilities */
1433 		config.phy_type = abilities.phy_type;
1434 		config.phy_type_ext = abilities.phy_type_ext;
1435 		config.eee_capability = abilities.eee_capability;
1436 		config.eeer = abilities.eeer_val;
1437 		config.low_power_ctrl = abilities.d3_lpan;
1438 		config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1439 				    I40E_AQ_PHY_FEC_CONFIG_MASK;
1440 
1441 		/* save the requested speeds */
1442 		hw->phy.link_info.requested_speeds = config.link_speed;
1443 		/* set link and auto negotiation so changes take effect */
1444 		config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1445 		/* If link is up put link down */
1446 		if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1447 			/* Tell the OS link is going down, the link will go
1448 			 * back up when fw says it is ready asynchronously
1449 			 */
1450 			i40e_print_link_message(vsi, false);
1451 			netif_carrier_off(netdev);
1452 			netif_tx_stop_all_queues(netdev);
1453 		}
1454 
1455 		/* make the aq call */
1456 		status = i40e_aq_set_phy_config(hw, &config, NULL);
1457 		if (status) {
1458 			netdev_info(netdev,
1459 				    "Set phy config failed, err %pe aq_err %s\n",
1460 				    ERR_PTR(status),
1461 				    i40e_aq_str(hw, hw->aq.asq_last_status));
1462 			err = -EAGAIN;
1463 			goto done;
1464 		}
1465 
1466 		status = i40e_update_link_info(hw);
1467 		if (status)
1468 			netdev_dbg(netdev,
1469 				   "Updating link info failed with err %pe aq_err %s\n",
1470 				   ERR_PTR(status),
1471 				   i40e_aq_str(hw, hw->aq.asq_last_status));
1472 
1473 	} else {
1474 		netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1475 	}
1476 
1477 done:
1478 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
1479 
1480 	return err;
1481 }
1482 
1483 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
1484 {
1485 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1486 	struct i40e_aq_get_phy_abilities_resp abilities;
1487 	struct i40e_pf *pf = np->vsi->back;
1488 	struct i40e_hw *hw = &pf->hw;
1489 	int status = 0;
1490 	u32 flags = 0;
1491 	int err = 0;
1492 
1493 	flags = READ_ONCE(pf->flags);
1494 	i40e_set_fec_in_flags(fec_cfg, &flags);
1495 
1496 	/* Get the current phy config */
1497 	memset(&abilities, 0, sizeof(abilities));
1498 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1499 					      NULL);
1500 	if (status) {
1501 		err = -EAGAIN;
1502 		goto done;
1503 	}
1504 
1505 	if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
1506 		struct i40e_aq_set_phy_config config;
1507 
1508 		memset(&config, 0, sizeof(config));
1509 		config.phy_type = abilities.phy_type;
1510 		config.abilities = abilities.abilities |
1511 				   I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1512 		config.phy_type_ext = abilities.phy_type_ext;
1513 		config.link_speed = abilities.link_speed;
1514 		config.eee_capability = abilities.eee_capability;
1515 		config.eeer = abilities.eeer_val;
1516 		config.low_power_ctrl = abilities.d3_lpan;
1517 		config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
1518 		status = i40e_aq_set_phy_config(hw, &config, NULL);
1519 		if (status) {
1520 			netdev_info(netdev,
1521 				    "Set phy config failed, err %pe aq_err %s\n",
1522 				    ERR_PTR(status),
1523 				    i40e_aq_str(hw, hw->aq.asq_last_status));
1524 			err = -EAGAIN;
1525 			goto done;
1526 		}
1527 		pf->flags = flags;
1528 		status = i40e_update_link_info(hw);
1529 		if (status)
1530 			/* debug level message only due to relation to the link
1531 			 * itself rather than to the FEC settings
1532 			 * (e.g. no physical connection etc.)
1533 			 */
1534 			netdev_dbg(netdev,
1535 				   "Updating link info failed with err %pe aq_err %s\n",
1536 				   ERR_PTR(status),
1537 				   i40e_aq_str(hw, hw->aq.asq_last_status));
1538 	}
1539 
1540 done:
1541 	return err;
1542 }
1543 
1544 static int i40e_get_fec_param(struct net_device *netdev,
1545 			      struct ethtool_fecparam *fecparam)
1546 {
1547 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1548 	struct i40e_aq_get_phy_abilities_resp abilities;
1549 	struct i40e_pf *pf = np->vsi->back;
1550 	struct i40e_hw *hw = &pf->hw;
1551 	int status = 0;
1552 	int err = 0;
1553 	u8 fec_cfg;
1554 
1555 	/* Get the current phy config */
1556 	memset(&abilities, 0, sizeof(abilities));
1557 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1558 					      NULL);
1559 	if (status) {
1560 		err = -EAGAIN;
1561 		goto done;
1562 	}
1563 
1564 	fecparam->fec = 0;
1565 	fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
1566 	if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
1567 		fecparam->fec |= ETHTOOL_FEC_AUTO;
1568 	else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
1569 		 I40E_AQ_SET_FEC_ABILITY_RS))
1570 		fecparam->fec |= ETHTOOL_FEC_RS;
1571 	else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
1572 		 I40E_AQ_SET_FEC_ABILITY_KR))
1573 		fecparam->fec |= ETHTOOL_FEC_BASER;
1574 	if (fec_cfg == 0)
1575 		fecparam->fec |= ETHTOOL_FEC_OFF;
1576 
1577 	if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
1578 		fecparam->active_fec = ETHTOOL_FEC_BASER;
1579 	else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
1580 		fecparam->active_fec = ETHTOOL_FEC_RS;
1581 	else
1582 		fecparam->active_fec = ETHTOOL_FEC_OFF;
1583 done:
1584 	return err;
1585 }
1586 
1587 static int i40e_set_fec_param(struct net_device *netdev,
1588 			      struct ethtool_fecparam *fecparam)
1589 {
1590 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1591 	struct i40e_pf *pf = np->vsi->back;
1592 	struct i40e_hw *hw = &pf->hw;
1593 	u8 fec_cfg = 0;
1594 
1595 	if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
1596 	    hw->device_id != I40E_DEV_ID_25G_B &&
1597 	    hw->device_id != I40E_DEV_ID_KX_X722)
1598 		return -EPERM;
1599 
1600 	if (hw->mac.type == I40E_MAC_X722 &&
1601 	    !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {
1602 		netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
1603 		return -EOPNOTSUPP;
1604 	}
1605 
1606 	switch (fecparam->fec) {
1607 	case ETHTOOL_FEC_AUTO:
1608 		fec_cfg = I40E_AQ_SET_FEC_AUTO;
1609 		break;
1610 	case ETHTOOL_FEC_RS:
1611 		fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
1612 			     I40E_AQ_SET_FEC_ABILITY_RS);
1613 		break;
1614 	case ETHTOOL_FEC_BASER:
1615 		fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
1616 			     I40E_AQ_SET_FEC_ABILITY_KR);
1617 		break;
1618 	case ETHTOOL_FEC_OFF:
1619 	case ETHTOOL_FEC_NONE:
1620 		fec_cfg = 0;
1621 		break;
1622 	default:
1623 		dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
1624 			 fecparam->fec);
1625 		return -EINVAL;
1626 	}
1627 
1628 	return i40e_set_fec_cfg(netdev, fec_cfg);
1629 }
1630 
1631 static int i40e_nway_reset(struct net_device *netdev)
1632 {
1633 	/* restart autonegotiation */
1634 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1635 	struct i40e_pf *pf = np->vsi->back;
1636 	struct i40e_hw *hw = &pf->hw;
1637 	bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1638 	int ret = 0;
1639 
1640 	ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1641 	if (ret) {
1642 		netdev_info(netdev, "link restart failed, err %pe aq_err %s\n",
1643 			    ERR_PTR(ret),
1644 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1645 		return -EIO;
1646 	}
1647 
1648 	return 0;
1649 }
1650 
1651 /**
1652  * i40e_get_pauseparam -  Get Flow Control status
1653  * @netdev: netdevice structure
1654  * @pause: buffer to return pause parameters
1655  *
1656  * Return tx/rx-pause status
1657  **/
1658 static void i40e_get_pauseparam(struct net_device *netdev,
1659 				struct ethtool_pauseparam *pause)
1660 {
1661 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1662 	struct i40e_pf *pf = np->vsi->back;
1663 	struct i40e_hw *hw = &pf->hw;
1664 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1665 	struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1666 
1667 	pause->autoneg =
1668 		((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1669 		  AUTONEG_ENABLE : AUTONEG_DISABLE);
1670 
1671 	/* PFC enabled so report LFC as off */
1672 	if (dcbx_cfg->pfc.pfcenable) {
1673 		pause->rx_pause = 0;
1674 		pause->tx_pause = 0;
1675 		return;
1676 	}
1677 
1678 	if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1679 		pause->rx_pause = 1;
1680 	} else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1681 		pause->tx_pause = 1;
1682 	} else if (hw->fc.current_mode == I40E_FC_FULL) {
1683 		pause->rx_pause = 1;
1684 		pause->tx_pause = 1;
1685 	}
1686 }
1687 
1688 /**
1689  * i40e_set_pauseparam - Set Flow Control parameter
1690  * @netdev: network interface device structure
1691  * @pause: return tx/rx flow control status
1692  **/
1693 static int i40e_set_pauseparam(struct net_device *netdev,
1694 			       struct ethtool_pauseparam *pause)
1695 {
1696 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1697 	struct i40e_pf *pf = np->vsi->back;
1698 	struct i40e_vsi *vsi = np->vsi;
1699 	struct i40e_hw *hw = &pf->hw;
1700 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1701 	struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1702 	bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1703 	u8 aq_failures;
1704 	int err = 0;
1705 	int status;
1706 	u32 is_an;
1707 
1708 	/* Changing the port's flow control is not supported if this isn't the
1709 	 * port's controlling PF
1710 	 */
1711 	if (hw->partition_id != 1) {
1712 		i40e_partition_setting_complaint(pf);
1713 		return -EOPNOTSUPP;
1714 	}
1715 
1716 	if (vsi != pf->vsi[pf->lan_vsi])
1717 		return -EOPNOTSUPP;
1718 
1719 	is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
1720 	if (pause->autoneg != is_an) {
1721 		netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1722 		return -EOPNOTSUPP;
1723 	}
1724 
1725 	/* If we have link and don't have autoneg */
1726 	if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
1727 		/* Send message that it might not necessarily work*/
1728 		netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1729 	}
1730 
1731 	if (dcbx_cfg->pfc.pfcenable) {
1732 		netdev_info(netdev,
1733 			    "Priority flow control enabled. Cannot set link flow control.\n");
1734 		return -EOPNOTSUPP;
1735 	}
1736 
1737 	if (pause->rx_pause && pause->tx_pause)
1738 		hw->fc.requested_mode = I40E_FC_FULL;
1739 	else if (pause->rx_pause && !pause->tx_pause)
1740 		hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1741 	else if (!pause->rx_pause && pause->tx_pause)
1742 		hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1743 	else if (!pause->rx_pause && !pause->tx_pause)
1744 		hw->fc.requested_mode = I40E_FC_NONE;
1745 	else
1746 		return -EINVAL;
1747 
1748 	/* Tell the OS link is going down, the link will go back up when fw
1749 	 * says it is ready asynchronously
1750 	 */
1751 	i40e_print_link_message(vsi, false);
1752 	netif_carrier_off(netdev);
1753 	netif_tx_stop_all_queues(netdev);
1754 
1755 	/* Set the fc mode and only restart an if link is up*/
1756 	status = i40e_set_fc(hw, &aq_failures, link_up);
1757 
1758 	if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1759 		netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %pe aq_err %s\n",
1760 			    ERR_PTR(status),
1761 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1762 		err = -EAGAIN;
1763 	}
1764 	if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1765 		netdev_info(netdev, "Set fc failed on the set_phy_config call with err %pe aq_err %s\n",
1766 			    ERR_PTR(status),
1767 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1768 		err = -EAGAIN;
1769 	}
1770 	if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1771 		netdev_info(netdev, "Set fc failed on the get_link_info call with err %pe aq_err %s\n",
1772 			    ERR_PTR(status),
1773 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1774 		err = -EAGAIN;
1775 	}
1776 
1777 	if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1778 		/* Give it a little more time to try to come back */
1779 		msleep(75);
1780 		if (!test_bit(__I40E_DOWN, pf->state))
1781 			return i40e_nway_reset(netdev);
1782 	}
1783 
1784 	return err;
1785 }
1786 
1787 static u32 i40e_get_msglevel(struct net_device *netdev)
1788 {
1789 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1790 	struct i40e_pf *pf = np->vsi->back;
1791 	u32 debug_mask = pf->hw.debug_mask;
1792 
1793 	if (debug_mask)
1794 		netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1795 
1796 	return pf->msg_enable;
1797 }
1798 
1799 static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1800 {
1801 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1802 	struct i40e_pf *pf = np->vsi->back;
1803 
1804 	if (I40E_DEBUG_USER & data)
1805 		pf->hw.debug_mask = data;
1806 	else
1807 		pf->msg_enable = data;
1808 }
1809 
1810 static int i40e_get_regs_len(struct net_device *netdev)
1811 {
1812 	int reg_count = 0;
1813 	int i;
1814 
1815 	for (i = 0; i40e_reg_list[i].offset != 0; i++)
1816 		reg_count += i40e_reg_list[i].elements;
1817 
1818 	return reg_count * sizeof(u32);
1819 }
1820 
1821 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1822 			  void *p)
1823 {
1824 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1825 	struct i40e_pf *pf = np->vsi->back;
1826 	struct i40e_hw *hw = &pf->hw;
1827 	u32 *reg_buf = p;
1828 	unsigned int i, j, ri;
1829 	u32 reg;
1830 
1831 	/* Tell ethtool which driver-version-specific regs output we have.
1832 	 *
1833 	 * At some point, if we have ethtool doing special formatting of
1834 	 * this data, it will rely on this version number to know how to
1835 	 * interpret things.  Hence, this needs to be updated if/when the
1836 	 * diags register table is changed.
1837 	 */
1838 	regs->version = 1;
1839 
1840 	/* loop through the diags reg table for what to print */
1841 	ri = 0;
1842 	for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1843 		for (j = 0; j < i40e_reg_list[i].elements; j++) {
1844 			reg = i40e_reg_list[i].offset
1845 				+ (j * i40e_reg_list[i].stride);
1846 			reg_buf[ri++] = rd32(hw, reg);
1847 		}
1848 	}
1849 
1850 }
1851 
1852 static int i40e_get_eeprom(struct net_device *netdev,
1853 			   struct ethtool_eeprom *eeprom, u8 *bytes)
1854 {
1855 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1856 	struct i40e_hw *hw = &np->vsi->back->hw;
1857 	struct i40e_pf *pf = np->vsi->back;
1858 	int ret_val = 0, len, offset;
1859 	u8 *eeprom_buff;
1860 	u16 i, sectors;
1861 	bool last;
1862 	u32 magic;
1863 
1864 #define I40E_NVM_SECTOR_SIZE  4096
1865 	if (eeprom->len == 0)
1866 		return -EINVAL;
1867 
1868 	/* check for NVMUpdate access method */
1869 	magic = hw->vendor_id | (hw->device_id << 16);
1870 	if (eeprom->magic && eeprom->magic != magic) {
1871 		struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1872 		int errno = 0;
1873 
1874 		/* make sure it is the right magic for NVMUpdate */
1875 		if ((eeprom->magic >> 16) != hw->device_id)
1876 			errno = -EINVAL;
1877 		else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1878 			 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1879 			errno = -EBUSY;
1880 		else
1881 			ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1882 
1883 		if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1884 			dev_info(&pf->pdev->dev,
1885 				 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1886 				 ret_val, hw->aq.asq_last_status, errno,
1887 				 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1888 				 cmd->offset, cmd->data_size);
1889 
1890 		return errno;
1891 	}
1892 
1893 	/* normal ethtool get_eeprom support */
1894 	eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1895 
1896 	eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1897 	if (!eeprom_buff)
1898 		return -ENOMEM;
1899 
1900 	ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1901 	if (ret_val) {
1902 		dev_info(&pf->pdev->dev,
1903 			 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1904 			 ret_val, hw->aq.asq_last_status);
1905 		goto free_buff;
1906 	}
1907 
1908 	sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1909 	sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1910 	len = I40E_NVM_SECTOR_SIZE;
1911 	last = false;
1912 	for (i = 0; i < sectors; i++) {
1913 		if (i == (sectors - 1)) {
1914 			len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1915 			last = true;
1916 		}
1917 		offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1918 		ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1919 				(u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1920 				last, NULL);
1921 		if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1922 			dev_info(&pf->pdev->dev,
1923 				 "read NVM failed, invalid offset 0x%x\n",
1924 				 offset);
1925 			break;
1926 		} else if (ret_val &&
1927 			   hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1928 			dev_info(&pf->pdev->dev,
1929 				 "read NVM failed, access, offset 0x%x\n",
1930 				 offset);
1931 			break;
1932 		} else if (ret_val) {
1933 			dev_info(&pf->pdev->dev,
1934 				 "read NVM failed offset %d err=%d status=0x%x\n",
1935 				 offset, ret_val, hw->aq.asq_last_status);
1936 			break;
1937 		}
1938 	}
1939 
1940 	i40e_release_nvm(hw);
1941 	memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1942 free_buff:
1943 	kfree(eeprom_buff);
1944 	return ret_val;
1945 }
1946 
1947 static int i40e_get_eeprom_len(struct net_device *netdev)
1948 {
1949 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1950 	struct i40e_hw *hw = &np->vsi->back->hw;
1951 	u32 val;
1952 
1953 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1954 	if (hw->mac.type == I40E_MAC_X722) {
1955 		val = X722_EEPROM_SCOPE_LIMIT + 1;
1956 		return val;
1957 	}
1958 	val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1959 		& I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1960 		>> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1961 	/* register returns value in power of 2, 64Kbyte chunks. */
1962 	val = (64 * 1024) * BIT(val);
1963 	return val;
1964 }
1965 
1966 static int i40e_set_eeprom(struct net_device *netdev,
1967 			   struct ethtool_eeprom *eeprom, u8 *bytes)
1968 {
1969 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1970 	struct i40e_hw *hw = &np->vsi->back->hw;
1971 	struct i40e_pf *pf = np->vsi->back;
1972 	struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1973 	int ret_val = 0;
1974 	int errno = 0;
1975 	u32 magic;
1976 
1977 	/* normal ethtool set_eeprom is not supported */
1978 	magic = hw->vendor_id | (hw->device_id << 16);
1979 	if (eeprom->magic == magic)
1980 		errno = -EOPNOTSUPP;
1981 	/* check for NVMUpdate access method */
1982 	else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1983 		errno = -EINVAL;
1984 	else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1985 		 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1986 		errno = -EBUSY;
1987 	else
1988 		ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1989 
1990 	if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1991 		dev_info(&pf->pdev->dev,
1992 			 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1993 			 ret_val, hw->aq.asq_last_status, errno,
1994 			 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1995 			 cmd->offset, cmd->data_size);
1996 
1997 	return errno;
1998 }
1999 
2000 static void i40e_get_drvinfo(struct net_device *netdev,
2001 			     struct ethtool_drvinfo *drvinfo)
2002 {
2003 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2004 	struct i40e_vsi *vsi = np->vsi;
2005 	struct i40e_pf *pf = vsi->back;
2006 
2007 	strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
2008 	strscpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
2009 		sizeof(drvinfo->fw_version));
2010 	strscpy(drvinfo->bus_info, pci_name(pf->pdev),
2011 		sizeof(drvinfo->bus_info));
2012 	drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
2013 	if (pf->hw.pf_id == 0)
2014 		drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
2015 }
2016 
2017 static void i40e_get_ringparam(struct net_device *netdev,
2018 			       struct ethtool_ringparam *ring,
2019 			       struct kernel_ethtool_ringparam *kernel_ring,
2020 			       struct netlink_ext_ack *extack)
2021 {
2022 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2023 	struct i40e_pf *pf = np->vsi->back;
2024 	struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2025 
2026 	ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
2027 	ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
2028 	ring->rx_mini_max_pending = 0;
2029 	ring->rx_jumbo_max_pending = 0;
2030 	ring->rx_pending = vsi->rx_rings[0]->count;
2031 	ring->tx_pending = vsi->tx_rings[0]->count;
2032 	ring->rx_mini_pending = 0;
2033 	ring->rx_jumbo_pending = 0;
2034 }
2035 
2036 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
2037 {
2038 	if (i40e_enabled_xdp_vsi(vsi)) {
2039 		return index < vsi->num_queue_pairs ||
2040 			(index >= vsi->alloc_queue_pairs &&
2041 			 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
2042 	}
2043 
2044 	return index < vsi->num_queue_pairs;
2045 }
2046 
2047 static int i40e_set_ringparam(struct net_device *netdev,
2048 			      struct ethtool_ringparam *ring,
2049 			      struct kernel_ethtool_ringparam *kernel_ring,
2050 			      struct netlink_ext_ack *extack)
2051 {
2052 	struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
2053 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2054 	struct i40e_hw *hw = &np->vsi->back->hw;
2055 	struct i40e_vsi *vsi = np->vsi;
2056 	struct i40e_pf *pf = vsi->back;
2057 	u32 new_rx_count, new_tx_count;
2058 	u16 tx_alloc_queue_pairs;
2059 	int timeout = 50;
2060 	int i, err = 0;
2061 
2062 	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
2063 		return -EINVAL;
2064 
2065 	if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
2066 	    ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
2067 	    ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
2068 	    ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
2069 		netdev_info(netdev,
2070 			    "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
2071 			    ring->tx_pending, ring->rx_pending,
2072 			    I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
2073 		return -EINVAL;
2074 	}
2075 
2076 	new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2077 	new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2078 
2079 	/* if nothing to do return success */
2080 	if ((new_tx_count == vsi->tx_rings[0]->count) &&
2081 	    (new_rx_count == vsi->rx_rings[0]->count))
2082 		return 0;
2083 
2084 	/* If there is a AF_XDP page pool attached to any of Rx rings,
2085 	 * disallow changing the number of descriptors -- regardless
2086 	 * if the netdev is running or not.
2087 	 */
2088 	if (i40e_xsk_any_rx_ring_enabled(vsi))
2089 		return -EBUSY;
2090 
2091 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
2092 		timeout--;
2093 		if (!timeout)
2094 			return -EBUSY;
2095 		usleep_range(1000, 2000);
2096 	}
2097 
2098 	if (!netif_running(vsi->netdev)) {
2099 		/* simple case - set for the next time the netdev is started */
2100 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2101 			vsi->tx_rings[i]->count = new_tx_count;
2102 			vsi->rx_rings[i]->count = new_rx_count;
2103 			if (i40e_enabled_xdp_vsi(vsi))
2104 				vsi->xdp_rings[i]->count = new_tx_count;
2105 		}
2106 		vsi->num_tx_desc = new_tx_count;
2107 		vsi->num_rx_desc = new_rx_count;
2108 		goto done;
2109 	}
2110 
2111 	/* We can't just free everything and then setup again,
2112 	 * because the ISRs in MSI-X mode get passed pointers
2113 	 * to the Tx and Rx ring structs.
2114 	 */
2115 
2116 	/* alloc updated Tx and XDP Tx resources */
2117 	tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
2118 			       (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
2119 	if (new_tx_count != vsi->tx_rings[0]->count) {
2120 		netdev_info(netdev,
2121 			    "Changing Tx descriptor count from %d to %d.\n",
2122 			    vsi->tx_rings[0]->count, new_tx_count);
2123 		tx_rings = kcalloc(tx_alloc_queue_pairs,
2124 				   sizeof(struct i40e_ring), GFP_KERNEL);
2125 		if (!tx_rings) {
2126 			err = -ENOMEM;
2127 			goto done;
2128 		}
2129 
2130 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2131 			if (!i40e_active_tx_ring_index(vsi, i))
2132 				continue;
2133 
2134 			tx_rings[i] = *vsi->tx_rings[i];
2135 			tx_rings[i].count = new_tx_count;
2136 			/* the desc and bi pointers will be reallocated in the
2137 			 * setup call
2138 			 */
2139 			tx_rings[i].desc = NULL;
2140 			tx_rings[i].rx_bi = NULL;
2141 			err = i40e_setup_tx_descriptors(&tx_rings[i]);
2142 			if (err) {
2143 				while (i) {
2144 					i--;
2145 					if (!i40e_active_tx_ring_index(vsi, i))
2146 						continue;
2147 					i40e_free_tx_resources(&tx_rings[i]);
2148 				}
2149 				kfree(tx_rings);
2150 				tx_rings = NULL;
2151 
2152 				goto done;
2153 			}
2154 		}
2155 	}
2156 
2157 	/* alloc updated Rx resources */
2158 	if (new_rx_count != vsi->rx_rings[0]->count) {
2159 		netdev_info(netdev,
2160 			    "Changing Rx descriptor count from %d to %d\n",
2161 			    vsi->rx_rings[0]->count, new_rx_count);
2162 		rx_rings = kcalloc(vsi->alloc_queue_pairs,
2163 				   sizeof(struct i40e_ring), GFP_KERNEL);
2164 		if (!rx_rings) {
2165 			err = -ENOMEM;
2166 			goto free_tx;
2167 		}
2168 
2169 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2170 			u16 unused;
2171 
2172 			/* clone ring and setup updated count */
2173 			rx_rings[i] = *vsi->rx_rings[i];
2174 			rx_rings[i].count = new_rx_count;
2175 			/* the desc and bi pointers will be reallocated in the
2176 			 * setup call
2177 			 */
2178 			rx_rings[i].desc = NULL;
2179 			rx_rings[i].rx_bi = NULL;
2180 			/* Clear cloned XDP RX-queue info before setup call */
2181 			memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2182 			/* this is to allow wr32 to have something to write to
2183 			 * during early allocation of Rx buffers
2184 			 */
2185 			rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
2186 			err = i40e_setup_rx_descriptors(&rx_rings[i]);
2187 			if (err)
2188 				goto rx_unwind;
2189 
2190 			/* now allocate the Rx buffers to make sure the OS
2191 			 * has enough memory, any failure here means abort
2192 			 */
2193 			unused = I40E_DESC_UNUSED(&rx_rings[i]);
2194 			err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
2195 rx_unwind:
2196 			if (err) {
2197 				do {
2198 					i40e_free_rx_resources(&rx_rings[i]);
2199 				} while (i--);
2200 				kfree(rx_rings);
2201 				rx_rings = NULL;
2202 
2203 				goto free_tx;
2204 			}
2205 		}
2206 	}
2207 
2208 	/* Bring interface down, copy in the new ring info,
2209 	 * then restore the interface
2210 	 */
2211 	i40e_down(vsi);
2212 
2213 	if (tx_rings) {
2214 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2215 			if (i40e_active_tx_ring_index(vsi, i)) {
2216 				i40e_free_tx_resources(vsi->tx_rings[i]);
2217 				*vsi->tx_rings[i] = tx_rings[i];
2218 			}
2219 		}
2220 		kfree(tx_rings);
2221 		tx_rings = NULL;
2222 	}
2223 
2224 	if (rx_rings) {
2225 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2226 			i40e_free_rx_resources(vsi->rx_rings[i]);
2227 			/* get the real tail offset */
2228 			rx_rings[i].tail = vsi->rx_rings[i]->tail;
2229 			/* this is to fake out the allocation routine
2230 			 * into thinking it has to realloc everything
2231 			 * but the recycling logic will let us re-use
2232 			 * the buffers allocated above
2233 			 */
2234 			rx_rings[i].next_to_use = 0;
2235 			rx_rings[i].next_to_clean = 0;
2236 			rx_rings[i].next_to_alloc = 0;
2237 			/* do a struct copy */
2238 			*vsi->rx_rings[i] = rx_rings[i];
2239 		}
2240 		kfree(rx_rings);
2241 		rx_rings = NULL;
2242 	}
2243 
2244 	vsi->num_tx_desc = new_tx_count;
2245 	vsi->num_rx_desc = new_rx_count;
2246 	i40e_up(vsi);
2247 
2248 free_tx:
2249 	/* error cleanup if the Rx allocations failed after getting Tx */
2250 	if (tx_rings) {
2251 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2252 			if (i40e_active_tx_ring_index(vsi, i))
2253 				i40e_free_tx_resources(vsi->tx_rings[i]);
2254 		}
2255 		kfree(tx_rings);
2256 		tx_rings = NULL;
2257 	}
2258 
2259 done:
2260 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
2261 
2262 	return err;
2263 }
2264 
2265 /**
2266  * i40e_get_stats_count - return the stats count for a device
2267  * @netdev: the netdev to return the count for
2268  *
2269  * Returns the total number of statistics for this netdev. Note that even
2270  * though this is a function, it is required that the count for a specific
2271  * netdev must never change. Basing the count on static values such as the
2272  * maximum number of queues or the device type is ok. However, the API for
2273  * obtaining stats is *not* safe against changes based on non-static
2274  * values such as the *current* number of queues, or runtime flags.
2275  *
2276  * If a statistic is not always enabled, return it as part of the count
2277  * anyways, always return its string, and report its value as zero.
2278  **/
2279 static int i40e_get_stats_count(struct net_device *netdev)
2280 {
2281 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2282 	struct i40e_vsi *vsi = np->vsi;
2283 	struct i40e_pf *pf = vsi->back;
2284 	int stats_len;
2285 
2286 	if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1)
2287 		stats_len = I40E_PF_STATS_LEN;
2288 	else
2289 		stats_len = I40E_VSI_STATS_LEN;
2290 
2291 	/* The number of stats reported for a given net_device must remain
2292 	 * constant throughout the life of that device.
2293 	 *
2294 	 * This is because the API for obtaining the size, strings, and stats
2295 	 * is spread out over three separate ethtool ioctls. There is no safe
2296 	 * way to lock the number of stats across these calls, so we must
2297 	 * assume that they will never change.
2298 	 *
2299 	 * Due to this, we report the maximum number of queues, even if not
2300 	 * every queue is currently configured. Since we always allocate
2301 	 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
2302 	 * works because the num_tx_queues is set at device creation and never
2303 	 * changes.
2304 	 */
2305 	stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
2306 
2307 	return stats_len;
2308 }
2309 
2310 static int i40e_get_sset_count(struct net_device *netdev, int sset)
2311 {
2312 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2313 	struct i40e_vsi *vsi = np->vsi;
2314 	struct i40e_pf *pf = vsi->back;
2315 
2316 	switch (sset) {
2317 	case ETH_SS_TEST:
2318 		return I40E_TEST_LEN;
2319 	case ETH_SS_STATS:
2320 		return i40e_get_stats_count(netdev);
2321 	case ETH_SS_PRIV_FLAGS:
2322 		return I40E_PRIV_FLAGS_STR_LEN +
2323 			(pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
2324 	default:
2325 		return -EOPNOTSUPP;
2326 	}
2327 }
2328 
2329 /**
2330  * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
2331  * @tc: the TC statistics in VEB structure (veb->tc_stats)
2332  * @i: the index of traffic class in (veb->tc_stats) structure to copy
2333  *
2334  * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
2335  * one dimensional structure i40e_cp_veb_tc_stats.
2336  * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
2337  * statistics for the given TC.
2338  **/
2339 static struct i40e_cp_veb_tc_stats
2340 i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
2341 {
2342 	struct i40e_cp_veb_tc_stats veb_tc = {
2343 		.tc_rx_packets = tc->tc_rx_packets[i],
2344 		.tc_rx_bytes = tc->tc_rx_bytes[i],
2345 		.tc_tx_packets = tc->tc_tx_packets[i],
2346 		.tc_tx_bytes = tc->tc_tx_bytes[i],
2347 	};
2348 
2349 	return veb_tc;
2350 }
2351 
2352 /**
2353  * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
2354  * @pf: the PF device structure
2355  * @i: the priority value to copy
2356  *
2357  * The PFC stats are found as arrays in pf->stats, which is not easy to pass
2358  * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
2359  * of the PFC stats for the given priority.
2360  **/
2361 static inline struct i40e_pfc_stats
2362 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
2363 {
2364 #define I40E_GET_PFC_STAT(stat, priority) \
2365 	.stat = pf->stats.stat[priority]
2366 
2367 	struct i40e_pfc_stats pfc = {
2368 		I40E_GET_PFC_STAT(priority_xon_rx, i),
2369 		I40E_GET_PFC_STAT(priority_xoff_rx, i),
2370 		I40E_GET_PFC_STAT(priority_xon_tx, i),
2371 		I40E_GET_PFC_STAT(priority_xoff_tx, i),
2372 		I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
2373 	};
2374 	return pfc;
2375 }
2376 
2377 /**
2378  * i40e_get_ethtool_stats - copy stat values into supplied buffer
2379  * @netdev: the netdev to collect stats for
2380  * @stats: ethtool stats command structure
2381  * @data: ethtool supplied buffer
2382  *
2383  * Copy the stats values for this netdev into the buffer. Expects data to be
2384  * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
2385  * statistics must be copied in a static order, and the count must not change
2386  * for a given netdev. See i40e_get_stats_count for more details.
2387  *
2388  * If a statistic is not currently valid (such as a disabled queue), this
2389  * function reports its value as zero.
2390  **/
2391 static void i40e_get_ethtool_stats(struct net_device *netdev,
2392 				   struct ethtool_stats *stats, u64 *data)
2393 {
2394 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2395 	struct i40e_vsi *vsi = np->vsi;
2396 	struct i40e_pf *pf = vsi->back;
2397 	struct i40e_veb *veb = NULL;
2398 	unsigned int i;
2399 	bool veb_stats;
2400 	u64 *p = data;
2401 
2402 	i40e_update_stats(vsi);
2403 
2404 	i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
2405 			       i40e_gstrings_net_stats);
2406 
2407 	i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
2408 
2409 	rcu_read_lock();
2410 	for (i = 0; i < netdev->num_tx_queues; i++) {
2411 		i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
2412 		i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
2413 	}
2414 	rcu_read_unlock();
2415 
2416 	if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2417 		goto check_data_pointer;
2418 
2419 	veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
2420 		     (pf->lan_veb < I40E_MAX_VEB) &&
2421 		     (pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
2422 
2423 	if (veb_stats) {
2424 		veb = pf->veb[pf->lan_veb];
2425 		i40e_update_veb_stats(veb);
2426 	}
2427 
2428 	/* If veb stats aren't enabled, pass NULL instead of the veb so that
2429 	 * we initialize stats to zero and update the data pointer
2430 	 * intelligently
2431 	 */
2432 	i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
2433 			       i40e_gstrings_veb_stats);
2434 
2435 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2436 		if (veb_stats) {
2437 			struct i40e_cp_veb_tc_stats veb_tc =
2438 				i40e_get_veb_tc_stats(&veb->tc_stats, i);
2439 
2440 			i40e_add_ethtool_stats(&data, &veb_tc,
2441 					       i40e_gstrings_veb_tc_stats);
2442 		} else {
2443 			i40e_add_ethtool_stats(&data, NULL,
2444 					       i40e_gstrings_veb_tc_stats);
2445 		}
2446 
2447 	i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
2448 
2449 	for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
2450 		struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
2451 
2452 		i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
2453 	}
2454 
2455 check_data_pointer:
2456 	WARN_ONCE(data - p != i40e_get_stats_count(netdev),
2457 		  "ethtool stats count mismatch!");
2458 }
2459 
2460 /**
2461  * i40e_get_stat_strings - copy stat strings into supplied buffer
2462  * @netdev: the netdev to collect strings for
2463  * @data: supplied buffer to copy strings into
2464  *
2465  * Copy the strings related to stats for this netdev. Expects data to be
2466  * pre-allocated with the size reported by i40e_get_stats_count. Note that the
2467  * strings must be copied in a static order and the total count must not
2468  * change for a given netdev. See i40e_get_stats_count for more details.
2469  **/
2470 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
2471 {
2472 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2473 	struct i40e_vsi *vsi = np->vsi;
2474 	struct i40e_pf *pf = vsi->back;
2475 	unsigned int i;
2476 	u8 *p = data;
2477 
2478 	i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
2479 
2480 	i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
2481 
2482 	for (i = 0; i < netdev->num_tx_queues; i++) {
2483 		i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2484 				      "tx", i);
2485 		i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2486 				      "rx", i);
2487 	}
2488 
2489 	if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2490 		goto check_data_pointer;
2491 
2492 	i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2493 
2494 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2495 		i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
2496 
2497 	i40e_add_stat_strings(&data, i40e_gstrings_stats);
2498 
2499 	for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2500 		i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
2501 
2502 check_data_pointer:
2503 	WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
2504 		  "stat strings count mismatch!");
2505 }
2506 
2507 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
2508 {
2509 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2510 	struct i40e_vsi *vsi = np->vsi;
2511 	struct i40e_pf *pf = vsi->back;
2512 	unsigned int i;
2513 	u8 *p = data;
2514 
2515 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++)
2516 		ethtool_sprintf(&p, i40e_gstrings_priv_flags[i].flag_string);
2517 	if (pf->hw.pf_id != 0)
2518 		return;
2519 	for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++)
2520 		ethtool_sprintf(&p, i40e_gl_gstrings_priv_flags[i].flag_string);
2521 }
2522 
2523 static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2524 			     u8 *data)
2525 {
2526 	switch (stringset) {
2527 	case ETH_SS_TEST:
2528 		memcpy(data, i40e_gstrings_test,
2529 		       I40E_TEST_LEN * ETH_GSTRING_LEN);
2530 		break;
2531 	case ETH_SS_STATS:
2532 		i40e_get_stat_strings(netdev, data);
2533 		break;
2534 	case ETH_SS_PRIV_FLAGS:
2535 		i40e_get_priv_flag_strings(netdev, data);
2536 		break;
2537 	default:
2538 		break;
2539 	}
2540 }
2541 
2542 static int i40e_get_ts_info(struct net_device *dev,
2543 			    struct ethtool_ts_info *info)
2544 {
2545 	struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2546 
2547 	/* only report HW timestamping if PTP is enabled */
2548 	if (!(pf->flags & I40E_FLAG_PTP))
2549 		return ethtool_op_get_ts_info(dev, info);
2550 
2551 	info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2552 				SOF_TIMESTAMPING_RX_SOFTWARE |
2553 				SOF_TIMESTAMPING_SOFTWARE |
2554 				SOF_TIMESTAMPING_TX_HARDWARE |
2555 				SOF_TIMESTAMPING_RX_HARDWARE |
2556 				SOF_TIMESTAMPING_RAW_HARDWARE;
2557 
2558 	if (pf->ptp_clock)
2559 		info->phc_index = ptp_clock_index(pf->ptp_clock);
2560 	else
2561 		info->phc_index = -1;
2562 
2563 	info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2564 
2565 	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2566 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2567 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2568 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2569 
2570 	if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
2571 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2572 				    BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2573 				    BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2574 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2575 				    BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2576 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2577 				    BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2578 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
2579 
2580 	return 0;
2581 }
2582 
2583 static u64 i40e_link_test(struct net_device *netdev, u64 *data)
2584 {
2585 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2586 	struct i40e_pf *pf = np->vsi->back;
2587 	bool link_up = false;
2588 	int status;
2589 
2590 	netif_info(pf, hw, netdev, "link test\n");
2591 	status = i40e_get_link_status(&pf->hw, &link_up);
2592 	if (status) {
2593 		netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2594 		*data = 1;
2595 		return *data;
2596 	}
2597 
2598 	if (link_up)
2599 		*data = 0;
2600 	else
2601 		*data = 1;
2602 
2603 	return *data;
2604 }
2605 
2606 static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
2607 {
2608 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2609 	struct i40e_pf *pf = np->vsi->back;
2610 
2611 	netif_info(pf, hw, netdev, "register test\n");
2612 	*data = i40e_diag_reg_test(&pf->hw);
2613 
2614 	return *data;
2615 }
2616 
2617 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
2618 {
2619 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2620 	struct i40e_pf *pf = np->vsi->back;
2621 
2622 	netif_info(pf, hw, netdev, "eeprom test\n");
2623 	*data = i40e_diag_eeprom_test(&pf->hw);
2624 
2625 	/* forcebly clear the NVM Update state machine */
2626 	pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2627 
2628 	return *data;
2629 }
2630 
2631 static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
2632 {
2633 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2634 	struct i40e_pf *pf = np->vsi->back;
2635 	u16 swc_old = pf->sw_int_count;
2636 
2637 	netif_info(pf, hw, netdev, "interrupt test\n");
2638 	wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2639 	     (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2640 	      I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2641 	      I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2642 	      I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2643 	      I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2644 	usleep_range(1000, 2000);
2645 	*data = (swc_old == pf->sw_int_count);
2646 
2647 	return *data;
2648 }
2649 
2650 static inline bool i40e_active_vfs(struct i40e_pf *pf)
2651 {
2652 	struct i40e_vf *vfs = pf->vf;
2653 	int i;
2654 
2655 	for (i = 0; i < pf->num_alloc_vfs; i++)
2656 		if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2657 			return true;
2658 	return false;
2659 }
2660 
2661 static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2662 {
2663 	return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2664 }
2665 
2666 static void i40e_diag_test(struct net_device *netdev,
2667 			   struct ethtool_test *eth_test, u64 *data)
2668 {
2669 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2670 	bool if_running = netif_running(netdev);
2671 	struct i40e_pf *pf = np->vsi->back;
2672 
2673 	if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2674 		/* Offline tests */
2675 		netif_info(pf, drv, netdev, "offline testing starting\n");
2676 
2677 		set_bit(__I40E_TESTING, pf->state);
2678 
2679 		if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
2680 		    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
2681 			dev_warn(&pf->pdev->dev,
2682 				 "Cannot start offline testing when PF is in reset state.\n");
2683 			goto skip_ol_tests;
2684 		}
2685 
2686 		if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2687 			dev_warn(&pf->pdev->dev,
2688 				 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2689 			goto skip_ol_tests;
2690 		}
2691 
2692 		/* If the device is online then take it offline */
2693 		if (if_running)
2694 			/* indicate we're in test mode */
2695 			i40e_close(netdev);
2696 		else
2697 			/* This reset does not affect link - if it is
2698 			 * changed to a type of reset that does affect
2699 			 * link then the following link test would have
2700 			 * to be moved to before the reset
2701 			 */
2702 			i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2703 
2704 		if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2705 			eth_test->flags |= ETH_TEST_FL_FAILED;
2706 
2707 		if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2708 			eth_test->flags |= ETH_TEST_FL_FAILED;
2709 
2710 		if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2711 			eth_test->flags |= ETH_TEST_FL_FAILED;
2712 
2713 		/* run reg test last, a reset is required after it */
2714 		if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2715 			eth_test->flags |= ETH_TEST_FL_FAILED;
2716 
2717 		clear_bit(__I40E_TESTING, pf->state);
2718 		i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2719 
2720 		if (if_running)
2721 			i40e_open(netdev);
2722 	} else {
2723 		/* Online tests */
2724 		netif_info(pf, drv, netdev, "online testing starting\n");
2725 
2726 		if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2727 			eth_test->flags |= ETH_TEST_FL_FAILED;
2728 
2729 		/* Offline only tests, not run in online; pass by default */
2730 		data[I40E_ETH_TEST_REG] = 0;
2731 		data[I40E_ETH_TEST_EEPROM] = 0;
2732 		data[I40E_ETH_TEST_INTR] = 0;
2733 	}
2734 
2735 	netif_info(pf, drv, netdev, "testing finished\n");
2736 	return;
2737 
2738 skip_ol_tests:
2739 	data[I40E_ETH_TEST_REG]		= 1;
2740 	data[I40E_ETH_TEST_EEPROM]	= 1;
2741 	data[I40E_ETH_TEST_INTR]	= 1;
2742 	data[I40E_ETH_TEST_LINK]	= 1;
2743 	eth_test->flags |= ETH_TEST_FL_FAILED;
2744 	clear_bit(__I40E_TESTING, pf->state);
2745 	netif_info(pf, drv, netdev, "testing failed\n");
2746 }
2747 
2748 static void i40e_get_wol(struct net_device *netdev,
2749 			 struct ethtool_wolinfo *wol)
2750 {
2751 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2752 	struct i40e_pf *pf = np->vsi->back;
2753 	struct i40e_hw *hw = &pf->hw;
2754 	u16 wol_nvm_bits;
2755 
2756 	/* NVM bit on means WoL disabled for the port */
2757 	i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2758 	if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2759 		wol->supported = 0;
2760 		wol->wolopts = 0;
2761 	} else {
2762 		wol->supported = WAKE_MAGIC;
2763 		wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2764 	}
2765 }
2766 
2767 /**
2768  * i40e_set_wol - set the WakeOnLAN configuration
2769  * @netdev: the netdev in question
2770  * @wol: the ethtool WoL setting data
2771  **/
2772 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2773 {
2774 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2775 	struct i40e_pf *pf = np->vsi->back;
2776 	struct i40e_vsi *vsi = np->vsi;
2777 	struct i40e_hw *hw = &pf->hw;
2778 	u16 wol_nvm_bits;
2779 
2780 	/* WoL not supported if this isn't the controlling PF on the port */
2781 	if (hw->partition_id != 1) {
2782 		i40e_partition_setting_complaint(pf);
2783 		return -EOPNOTSUPP;
2784 	}
2785 
2786 	if (vsi != pf->vsi[pf->lan_vsi])
2787 		return -EOPNOTSUPP;
2788 
2789 	/* NVM bit on means WoL disabled for the port */
2790 	i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2791 	if (BIT(hw->port) & wol_nvm_bits)
2792 		return -EOPNOTSUPP;
2793 
2794 	/* only magic packet is supported */
2795 	if (wol->wolopts & ~WAKE_MAGIC)
2796 		return -EOPNOTSUPP;
2797 
2798 	/* is this a new value? */
2799 	if (pf->wol_en != !!wol->wolopts) {
2800 		pf->wol_en = !!wol->wolopts;
2801 		device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2802 	}
2803 
2804 	return 0;
2805 }
2806 
2807 static int i40e_set_phys_id(struct net_device *netdev,
2808 			    enum ethtool_phys_id_state state)
2809 {
2810 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2811 	struct i40e_pf *pf = np->vsi->back;
2812 	struct i40e_hw *hw = &pf->hw;
2813 	int blink_freq = 2;
2814 	u16 temp_status;
2815 	int ret = 0;
2816 
2817 	switch (state) {
2818 	case ETHTOOL_ID_ACTIVE:
2819 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2820 			pf->led_status = i40e_led_get(hw);
2821 		} else {
2822 			if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2823 				i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2824 						      NULL);
2825 			ret = i40e_led_get_phy(hw, &temp_status,
2826 					       &pf->phy_led_val);
2827 			pf->led_status = temp_status;
2828 		}
2829 		return blink_freq;
2830 	case ETHTOOL_ID_ON:
2831 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2832 			i40e_led_set(hw, 0xf, false);
2833 		else
2834 			ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2835 		break;
2836 	case ETHTOOL_ID_OFF:
2837 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2838 			i40e_led_set(hw, 0x0, false);
2839 		else
2840 			ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2841 		break;
2842 	case ETHTOOL_ID_INACTIVE:
2843 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2844 			i40e_led_set(hw, pf->led_status, false);
2845 		} else {
2846 			ret = i40e_led_set_phy(hw, false, pf->led_status,
2847 					       (pf->phy_led_val |
2848 					       I40E_PHY_LED_MODE_ORIG));
2849 			if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2850 				i40e_aq_set_phy_debug(hw, 0, NULL);
2851 		}
2852 		break;
2853 	default:
2854 		break;
2855 	}
2856 	if (ret)
2857 		return -ENOENT;
2858 	else
2859 		return 0;
2860 }
2861 
2862 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2863  * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2864  * 125us (8000 interrupts per second) == ITR(62)
2865  */
2866 
2867 /**
2868  * __i40e_get_coalesce - get per-queue coalesce settings
2869  * @netdev: the netdev to check
2870  * @ec: ethtool coalesce data structure
2871  * @queue: which queue to pick
2872  *
2873  * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2874  * are per queue. If queue is <0 then we default to queue 0 as the
2875  * representative value.
2876  **/
2877 static int __i40e_get_coalesce(struct net_device *netdev,
2878 			       struct ethtool_coalesce *ec,
2879 			       int queue)
2880 {
2881 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2882 	struct i40e_ring *rx_ring, *tx_ring;
2883 	struct i40e_vsi *vsi = np->vsi;
2884 
2885 	ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2886 	ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2887 
2888 	/* rx and tx usecs has per queue value. If user doesn't specify the
2889 	 * queue, return queue 0's value to represent.
2890 	 */
2891 	if (queue < 0)
2892 		queue = 0;
2893 	else if (queue >= vsi->num_queue_pairs)
2894 		return -EINVAL;
2895 
2896 	rx_ring = vsi->rx_rings[queue];
2897 	tx_ring = vsi->tx_rings[queue];
2898 
2899 	if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2900 		ec->use_adaptive_rx_coalesce = 1;
2901 
2902 	if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2903 		ec->use_adaptive_tx_coalesce = 1;
2904 
2905 	ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2906 	ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2907 
2908 	/* we use the _usecs_high to store/set the interrupt rate limit
2909 	 * that the hardware supports, that almost but not quite
2910 	 * fits the original intent of the ethtool variable,
2911 	 * the rx_coalesce_usecs_high limits total interrupts
2912 	 * per second from both tx/rx sources.
2913 	 */
2914 	ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2915 	ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2916 
2917 	return 0;
2918 }
2919 
2920 /**
2921  * i40e_get_coalesce - get a netdev's coalesce settings
2922  * @netdev: the netdev to check
2923  * @ec: ethtool coalesce data structure
2924  * @kernel_coal: ethtool CQE mode setting structure
2925  * @extack: extack for reporting error messages
2926  *
2927  * Gets the coalesce settings for a particular netdev. Note that if user has
2928  * modified per-queue settings, this only guarantees to represent queue 0. See
2929  * __i40e_get_coalesce for more details.
2930  **/
2931 static int i40e_get_coalesce(struct net_device *netdev,
2932 			     struct ethtool_coalesce *ec,
2933 			     struct kernel_ethtool_coalesce *kernel_coal,
2934 			     struct netlink_ext_ack *extack)
2935 {
2936 	return __i40e_get_coalesce(netdev, ec, -1);
2937 }
2938 
2939 /**
2940  * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2941  * @netdev: netdev structure
2942  * @ec: ethtool's coalesce settings
2943  * @queue: the particular queue to read
2944  *
2945  * Will read a specific queue's coalesce settings
2946  **/
2947 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2948 				       struct ethtool_coalesce *ec)
2949 {
2950 	return __i40e_get_coalesce(netdev, ec, queue);
2951 }
2952 
2953 /**
2954  * i40e_set_itr_per_queue - set ITR values for specific queue
2955  * @vsi: the VSI to set values for
2956  * @ec: coalesce settings from ethtool
2957  * @queue: the queue to modify
2958  *
2959  * Change the ITR settings for a specific queue.
2960  **/
2961 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2962 				   struct ethtool_coalesce *ec,
2963 				   int queue)
2964 {
2965 	struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2966 	struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2967 	struct i40e_pf *pf = vsi->back;
2968 	struct i40e_hw *hw = &pf->hw;
2969 	struct i40e_q_vector *q_vector;
2970 	u16 intrl;
2971 
2972 	intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2973 
2974 	rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2975 	tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2976 
2977 	if (ec->use_adaptive_rx_coalesce)
2978 		rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2979 	else
2980 		rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2981 
2982 	if (ec->use_adaptive_tx_coalesce)
2983 		tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2984 	else
2985 		tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2986 
2987 	q_vector = rx_ring->q_vector;
2988 	q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2989 
2990 	q_vector = tx_ring->q_vector;
2991 	q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2992 
2993 	/* The interrupt handler itself will take care of programming
2994 	 * the Tx and Rx ITR values based on the values we have entered
2995 	 * into the q_vector, no need to write the values now.
2996 	 */
2997 
2998 	wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
2999 	i40e_flush(hw);
3000 }
3001 
3002 /**
3003  * __i40e_set_coalesce - set coalesce settings for particular queue
3004  * @netdev: the netdev to change
3005  * @ec: ethtool coalesce settings
3006  * @queue: the queue to change
3007  *
3008  * Sets the coalesce settings for a particular queue.
3009  **/
3010 static int __i40e_set_coalesce(struct net_device *netdev,
3011 			       struct ethtool_coalesce *ec,
3012 			       int queue)
3013 {
3014 	struct i40e_netdev_priv *np = netdev_priv(netdev);
3015 	u16 intrl_reg, cur_rx_itr, cur_tx_itr;
3016 	struct i40e_vsi *vsi = np->vsi;
3017 	struct i40e_pf *pf = vsi->back;
3018 	int i;
3019 
3020 	if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
3021 		vsi->work_limit = ec->tx_max_coalesced_frames_irq;
3022 
3023 	if (queue < 0) {
3024 		cur_rx_itr = vsi->rx_rings[0]->itr_setting;
3025 		cur_tx_itr = vsi->tx_rings[0]->itr_setting;
3026 	} else if (queue < vsi->num_queue_pairs) {
3027 		cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
3028 		cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
3029 	} else {
3030 		netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
3031 			   vsi->num_queue_pairs - 1);
3032 		return -EINVAL;
3033 	}
3034 
3035 	cur_tx_itr &= ~I40E_ITR_DYNAMIC;
3036 	cur_rx_itr &= ~I40E_ITR_DYNAMIC;
3037 
3038 	/* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
3039 	if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
3040 		netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
3041 		return -EINVAL;
3042 	}
3043 
3044 	if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
3045 		netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
3046 			   INTRL_REG_TO_USEC(I40E_MAX_INTRL));
3047 		return -EINVAL;
3048 	}
3049 
3050 	if (ec->rx_coalesce_usecs != cur_rx_itr &&
3051 	    ec->use_adaptive_rx_coalesce) {
3052 		netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
3053 		return -EINVAL;
3054 	}
3055 
3056 	if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
3057 		netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
3058 		return -EINVAL;
3059 	}
3060 
3061 	if (ec->tx_coalesce_usecs != cur_tx_itr &&
3062 	    ec->use_adaptive_tx_coalesce) {
3063 		netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
3064 		return -EINVAL;
3065 	}
3066 
3067 	if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
3068 		netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
3069 		return -EINVAL;
3070 	}
3071 
3072 	if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
3073 		ec->rx_coalesce_usecs = I40E_MIN_ITR;
3074 
3075 	if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
3076 		ec->tx_coalesce_usecs = I40E_MIN_ITR;
3077 
3078 	intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
3079 	vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
3080 	if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
3081 		netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
3082 			   vsi->int_rate_limit);
3083 	}
3084 
3085 	/* rx and tx usecs has per queue value. If user doesn't specify the
3086 	 * queue, apply to all queues.
3087 	 */
3088 	if (queue < 0) {
3089 		for (i = 0; i < vsi->num_queue_pairs; i++)
3090 			i40e_set_itr_per_queue(vsi, ec, i);
3091 	} else {
3092 		i40e_set_itr_per_queue(vsi, ec, queue);
3093 	}
3094 
3095 	return 0;
3096 }
3097 
3098 /**
3099  * i40e_set_coalesce - set coalesce settings for every queue on the netdev
3100  * @netdev: the netdev to change
3101  * @ec: ethtool coalesce settings
3102  * @kernel_coal: ethtool CQE mode setting structure
3103  * @extack: extack for reporting error messages
3104  *
3105  * This will set each queue to the same coalesce settings.
3106  **/
3107 static int i40e_set_coalesce(struct net_device *netdev,
3108 			     struct ethtool_coalesce *ec,
3109 			     struct kernel_ethtool_coalesce *kernel_coal,
3110 			     struct netlink_ext_ack *extack)
3111 {
3112 	return __i40e_set_coalesce(netdev, ec, -1);
3113 }
3114 
3115 /**
3116  * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
3117  * @netdev: the netdev to change
3118  * @ec: ethtool's coalesce settings
3119  * @queue: the queue to change
3120  *
3121  * Sets the specified queue's coalesce settings.
3122  **/
3123 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
3124 				       struct ethtool_coalesce *ec)
3125 {
3126 	return __i40e_set_coalesce(netdev, ec, queue);
3127 }
3128 
3129 /**
3130  * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
3131  * @pf: pointer to the physical function struct
3132  * @cmd: ethtool rxnfc command
3133  *
3134  * Returns Success if the flow is supported, else Invalid Input.
3135  **/
3136 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
3137 {
3138 	struct i40e_hw *hw = &pf->hw;
3139 	u8 flow_pctype = 0;
3140 	u64 i_set = 0;
3141 
3142 	cmd->data = 0;
3143 
3144 	switch (cmd->flow_type) {
3145 	case TCP_V4_FLOW:
3146 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3147 		break;
3148 	case UDP_V4_FLOW:
3149 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3150 		break;
3151 	case TCP_V6_FLOW:
3152 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3153 		break;
3154 	case UDP_V6_FLOW:
3155 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3156 		break;
3157 	case SCTP_V4_FLOW:
3158 	case AH_ESP_V4_FLOW:
3159 	case AH_V4_FLOW:
3160 	case ESP_V4_FLOW:
3161 	case IPV4_FLOW:
3162 	case SCTP_V6_FLOW:
3163 	case AH_ESP_V6_FLOW:
3164 	case AH_V6_FLOW:
3165 	case ESP_V6_FLOW:
3166 	case IPV6_FLOW:
3167 		/* Default is src/dest for IP, no matter the L4 hashing */
3168 		cmd->data |= RXH_IP_SRC | RXH_IP_DST;
3169 		break;
3170 	default:
3171 		return -EINVAL;
3172 	}
3173 
3174 	/* Read flow based hash input set register */
3175 	if (flow_pctype) {
3176 		i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3177 					      flow_pctype)) |
3178 			((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3179 					       flow_pctype)) << 32);
3180 	}
3181 
3182 	/* Process bits of hash input set */
3183 	if (i_set) {
3184 		if (i_set & I40E_L4_SRC_MASK)
3185 			cmd->data |= RXH_L4_B_0_1;
3186 		if (i_set & I40E_L4_DST_MASK)
3187 			cmd->data |= RXH_L4_B_2_3;
3188 
3189 		if (cmd->flow_type == TCP_V4_FLOW ||
3190 		    cmd->flow_type == UDP_V4_FLOW) {
3191 			if (hw->mac.type == I40E_MAC_X722) {
3192 				if (i_set & I40E_X722_L3_SRC_MASK)
3193 					cmd->data |= RXH_IP_SRC;
3194 				if (i_set & I40E_X722_L3_DST_MASK)
3195 					cmd->data |= RXH_IP_DST;
3196 			} else {
3197 				if (i_set & I40E_L3_SRC_MASK)
3198 					cmd->data |= RXH_IP_SRC;
3199 				if (i_set & I40E_L3_DST_MASK)
3200 					cmd->data |= RXH_IP_DST;
3201 			}
3202 		} else if (cmd->flow_type == TCP_V6_FLOW ||
3203 			  cmd->flow_type == UDP_V6_FLOW) {
3204 			if (i_set & I40E_L3_V6_SRC_MASK)
3205 				cmd->data |= RXH_IP_SRC;
3206 			if (i_set & I40E_L3_V6_DST_MASK)
3207 				cmd->data |= RXH_IP_DST;
3208 		}
3209 	}
3210 
3211 	return 0;
3212 }
3213 
3214 /**
3215  * i40e_check_mask - Check whether a mask field is set
3216  * @mask: the full mask value
3217  * @field: mask of the field to check
3218  *
3219  * If the given mask is fully set, return positive value. If the mask for the
3220  * field is fully unset, return zero. Otherwise return a negative error code.
3221  **/
3222 static int i40e_check_mask(u64 mask, u64 field)
3223 {
3224 	u64 value = mask & field;
3225 
3226 	if (value == field)
3227 		return 1;
3228 	else if (!value)
3229 		return 0;
3230 	else
3231 		return -1;
3232 }
3233 
3234 /**
3235  * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
3236  * @fsp: pointer to rx flow specification
3237  * @data: pointer to userdef data structure for storage
3238  *
3239  * Read the user-defined data and deconstruct the value into a structure. No
3240  * other code should read the user-defined data, so as to ensure that every
3241  * place consistently reads the value correctly.
3242  *
3243  * The user-defined field is a 64bit Big Endian format value, which we
3244  * deconstruct by reading bits or bit fields from it. Single bit flags shall
3245  * be defined starting from the highest bits, while small bit field values
3246  * shall be defined starting from the lowest bits.
3247  *
3248  * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
3249  * and the filter should be rejected. The data structure will always be
3250  * modified even if FLOW_EXT is not set.
3251  *
3252  **/
3253 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3254 					struct i40e_rx_flow_userdef *data)
3255 {
3256 	u64 value, mask;
3257 	int valid;
3258 
3259 	/* Zero memory first so it's always consistent. */
3260 	memset(data, 0, sizeof(*data));
3261 
3262 	if (!(fsp->flow_type & FLOW_EXT))
3263 		return 0;
3264 
3265 	value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
3266 	mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
3267 
3268 #define I40E_USERDEF_FLEX_WORD		GENMASK_ULL(15, 0)
3269 #define I40E_USERDEF_FLEX_OFFSET	GENMASK_ULL(31, 16)
3270 #define I40E_USERDEF_FLEX_FILTER	GENMASK_ULL(31, 0)
3271 
3272 	valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
3273 	if (valid < 0) {
3274 		return -EINVAL;
3275 	} else if (valid) {
3276 		data->flex_word = value & I40E_USERDEF_FLEX_WORD;
3277 		data->flex_offset =
3278 			(value & I40E_USERDEF_FLEX_OFFSET) >> 16;
3279 		data->flex_filter = true;
3280 	}
3281 
3282 	return 0;
3283 }
3284 
3285 /**
3286  * i40e_fill_rx_flow_user_data - Fill in user-defined data field
3287  * @fsp: pointer to rx_flow specification
3288  * @data: pointer to return userdef data
3289  *
3290  * Reads the userdef data structure and properly fills in the user defined
3291  * fields of the rx_flow_spec.
3292  **/
3293 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3294 					struct i40e_rx_flow_userdef *data)
3295 {
3296 	u64 value = 0, mask = 0;
3297 
3298 	if (data->flex_filter) {
3299 		value |= data->flex_word;
3300 		value |= (u64)data->flex_offset << 16;
3301 		mask |= I40E_USERDEF_FLEX_FILTER;
3302 	}
3303 
3304 	if (value || mask)
3305 		fsp->flow_type |= FLOW_EXT;
3306 
3307 	*((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
3308 	*((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
3309 }
3310 
3311 /**
3312  * i40e_get_ethtool_fdir_all - Populates the rule count of a command
3313  * @pf: Pointer to the physical function struct
3314  * @cmd: The command to get or set Rx flow classification rules
3315  * @rule_locs: Array of used rule locations
3316  *
3317  * This function populates both the total and actual rule count of
3318  * the ethtool flow classification command
3319  *
3320  * Returns 0 on success or -EMSGSIZE if entry not found
3321  **/
3322 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
3323 				     struct ethtool_rxnfc *cmd,
3324 				     u32 *rule_locs)
3325 {
3326 	struct i40e_fdir_filter *rule;
3327 	struct hlist_node *node2;
3328 	int cnt = 0;
3329 
3330 	/* report total rule count */
3331 	cmd->data = i40e_get_fd_cnt_all(pf);
3332 
3333 	hlist_for_each_entry_safe(rule, node2,
3334 				  &pf->fdir_filter_list, fdir_node) {
3335 		if (cnt == cmd->rule_cnt)
3336 			return -EMSGSIZE;
3337 
3338 		rule_locs[cnt] = rule->fd_id;
3339 		cnt++;
3340 	}
3341 
3342 	cmd->rule_cnt = cnt;
3343 
3344 	return 0;
3345 }
3346 
3347 /**
3348  * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
3349  * @pf: Pointer to the physical function struct
3350  * @cmd: The command to get or set Rx flow classification rules
3351  *
3352  * This function looks up a filter based on the Rx flow classification
3353  * command and fills the flow spec info for it if found
3354  *
3355  * Returns 0 on success or -EINVAL if filter not found
3356  **/
3357 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
3358 				       struct ethtool_rxnfc *cmd)
3359 {
3360 	struct ethtool_rx_flow_spec *fsp =
3361 			(struct ethtool_rx_flow_spec *)&cmd->fs;
3362 	struct i40e_rx_flow_userdef userdef = {0};
3363 	struct i40e_fdir_filter *rule = NULL;
3364 	struct hlist_node *node2;
3365 	u64 input_set;
3366 	u16 index;
3367 
3368 	hlist_for_each_entry_safe(rule, node2,
3369 				  &pf->fdir_filter_list, fdir_node) {
3370 		if (fsp->location <= rule->fd_id)
3371 			break;
3372 	}
3373 
3374 	if (!rule || fsp->location != rule->fd_id)
3375 		return -EINVAL;
3376 
3377 	fsp->flow_type = rule->flow_type;
3378 	if (fsp->flow_type == IP_USER_FLOW) {
3379 		fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
3380 		fsp->h_u.usr_ip4_spec.proto = 0;
3381 		fsp->m_u.usr_ip4_spec.proto = 0;
3382 	}
3383 
3384 	if (fsp->flow_type == IPV6_USER_FLOW ||
3385 	    fsp->flow_type == UDP_V6_FLOW ||
3386 	    fsp->flow_type == TCP_V6_FLOW ||
3387 	    fsp->flow_type == SCTP_V6_FLOW) {
3388 		/* Reverse the src and dest notion, since the HW views them
3389 		 * from Tx perspective where as the user expects it from
3390 		 * Rx filter view.
3391 		 */
3392 		fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port;
3393 		fsp->h_u.tcp_ip6_spec.pdst = rule->src_port;
3394 		memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6,
3395 		       sizeof(__be32) * 4);
3396 		memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6,
3397 		       sizeof(__be32) * 4);
3398 	} else {
3399 		/* Reverse the src and dest notion, since the HW views them
3400 		 * from Tx perspective where as the user expects it from
3401 		 * Rx filter view.
3402 		 */
3403 		fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
3404 		fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
3405 		fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
3406 		fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
3407 	}
3408 
3409 	switch (rule->flow_type) {
3410 	case SCTP_V4_FLOW:
3411 		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3412 		break;
3413 	case TCP_V4_FLOW:
3414 		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3415 		break;
3416 	case UDP_V4_FLOW:
3417 		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3418 		break;
3419 	case SCTP_V6_FLOW:
3420 		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
3421 		break;
3422 	case TCP_V6_FLOW:
3423 		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3424 		break;
3425 	case UDP_V6_FLOW:
3426 		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3427 		break;
3428 	case IP_USER_FLOW:
3429 		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3430 		break;
3431 	case IPV6_USER_FLOW:
3432 		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
3433 		break;
3434 	default:
3435 		/* If we have stored a filter with a flow type not listed here
3436 		 * it is almost certainly a driver bug. WARN(), and then
3437 		 * assign the input_set as if all fields are enabled to avoid
3438 		 * reading unassigned memory.
3439 		 */
3440 		WARN(1, "Missing input set index for flow_type %d\n",
3441 		     rule->flow_type);
3442 		input_set = 0xFFFFFFFFFFFFFFFFULL;
3443 		goto no_input_set;
3444 	}
3445 
3446 	input_set = i40e_read_fd_input_set(pf, index);
3447 
3448 no_input_set:
3449 	if (input_set & I40E_L3_V6_SRC_MASK) {
3450 		fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF);
3451 		fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF);
3452 		fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF);
3453 		fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF);
3454 	}
3455 
3456 	if (input_set & I40E_L3_V6_DST_MASK) {
3457 		fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF);
3458 		fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF);
3459 		fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF);
3460 		fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF);
3461 	}
3462 
3463 	if (input_set & I40E_L3_SRC_MASK)
3464 		fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
3465 
3466 	if (input_set & I40E_L3_DST_MASK)
3467 		fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
3468 
3469 	if (input_set & I40E_L4_SRC_MASK)
3470 		fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
3471 
3472 	if (input_set & I40E_L4_DST_MASK)
3473 		fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
3474 
3475 	if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
3476 		fsp->ring_cookie = RX_CLS_FLOW_DISC;
3477 	else
3478 		fsp->ring_cookie = rule->q_index;
3479 
3480 	if (rule->vlan_tag) {
3481 		fsp->h_ext.vlan_etype = rule->vlan_etype;
3482 		fsp->m_ext.vlan_etype = htons(0xFFFF);
3483 		fsp->h_ext.vlan_tci = rule->vlan_tag;
3484 		fsp->m_ext.vlan_tci = htons(0xFFFF);
3485 		fsp->flow_type |= FLOW_EXT;
3486 	}
3487 
3488 	if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
3489 		struct i40e_vsi *vsi;
3490 
3491 		vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
3492 		if (vsi && vsi->type == I40E_VSI_SRIOV) {
3493 			/* VFs are zero-indexed by the driver, but ethtool
3494 			 * expects them to be one-indexed, so add one here
3495 			 */
3496 			u64 ring_vf = vsi->vf_id + 1;
3497 
3498 			ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
3499 			fsp->ring_cookie |= ring_vf;
3500 		}
3501 	}
3502 
3503 	if (rule->flex_filter) {
3504 		userdef.flex_filter = true;
3505 		userdef.flex_word = be16_to_cpu(rule->flex_word);
3506 		userdef.flex_offset = rule->flex_offset;
3507 	}
3508 
3509 	i40e_fill_rx_flow_user_data(fsp, &userdef);
3510 
3511 	return 0;
3512 }
3513 
3514 /**
3515  * i40e_get_rxnfc - command to get RX flow classification rules
3516  * @netdev: network interface device structure
3517  * @cmd: ethtool rxnfc command
3518  * @rule_locs: pointer to store rule data
3519  *
3520  * Returns Success if the command is supported.
3521  **/
3522 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
3523 			  u32 *rule_locs)
3524 {
3525 	struct i40e_netdev_priv *np = netdev_priv(netdev);
3526 	struct i40e_vsi *vsi = np->vsi;
3527 	struct i40e_pf *pf = vsi->back;
3528 	int ret = -EOPNOTSUPP;
3529 
3530 	switch (cmd->cmd) {
3531 	case ETHTOOL_GRXRINGS:
3532 		cmd->data = vsi->rss_size;
3533 		ret = 0;
3534 		break;
3535 	case ETHTOOL_GRXFH:
3536 		ret = i40e_get_rss_hash_opts(pf, cmd);
3537 		break;
3538 	case ETHTOOL_GRXCLSRLCNT:
3539 		cmd->rule_cnt = pf->fdir_pf_active_filters;
3540 		/* report total rule count */
3541 		cmd->data = i40e_get_fd_cnt_all(pf);
3542 		ret = 0;
3543 		break;
3544 	case ETHTOOL_GRXCLSRULE:
3545 		ret = i40e_get_ethtool_fdir_entry(pf, cmd);
3546 		break;
3547 	case ETHTOOL_GRXCLSRLALL:
3548 		ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
3549 		break;
3550 	default:
3551 		break;
3552 	}
3553 
3554 	return ret;
3555 }
3556 
3557 /**
3558  * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3559  * @hw: hw structure
3560  * @nfc: pointer to user request
3561  * @i_setc: bits currently set
3562  *
3563  * Returns value of bits to be set per user request
3564  **/
3565 static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
3566 				  struct ethtool_rxnfc *nfc,
3567 				  u64 i_setc)
3568 {
3569 	u64 i_set = i_setc;
3570 	u64 src_l3 = 0, dst_l3 = 0;
3571 
3572 	if (nfc->data & RXH_L4_B_0_1)
3573 		i_set |= I40E_L4_SRC_MASK;
3574 	else
3575 		i_set &= ~I40E_L4_SRC_MASK;
3576 	if (nfc->data & RXH_L4_B_2_3)
3577 		i_set |= I40E_L4_DST_MASK;
3578 	else
3579 		i_set &= ~I40E_L4_DST_MASK;
3580 
3581 	if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3582 		src_l3 = I40E_L3_V6_SRC_MASK;
3583 		dst_l3 = I40E_L3_V6_DST_MASK;
3584 	} else if (nfc->flow_type == TCP_V4_FLOW ||
3585 		  nfc->flow_type == UDP_V4_FLOW) {
3586 		if (hw->mac.type == I40E_MAC_X722) {
3587 			src_l3 = I40E_X722_L3_SRC_MASK;
3588 			dst_l3 = I40E_X722_L3_DST_MASK;
3589 		} else {
3590 			src_l3 = I40E_L3_SRC_MASK;
3591 			dst_l3 = I40E_L3_DST_MASK;
3592 		}
3593 	} else {
3594 		/* Any other flow type are not supported here */
3595 		return i_set;
3596 	}
3597 
3598 	if (nfc->data & RXH_IP_SRC)
3599 		i_set |= src_l3;
3600 	else
3601 		i_set &= ~src_l3;
3602 	if (nfc->data & RXH_IP_DST)
3603 		i_set |= dst_l3;
3604 	else
3605 		i_set &= ~dst_l3;
3606 
3607 	return i_set;
3608 }
3609 
3610 #define FLOW_PCTYPES_SIZE 64
3611 /**
3612  * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3613  * @pf: pointer to the physical function struct
3614  * @nfc: ethtool rxnfc command
3615  *
3616  * Returns Success if the flow input set is supported.
3617  **/
3618 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3619 {
3620 	struct i40e_hw *hw = &pf->hw;
3621 	u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3622 		   ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
3623 	DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
3624 	u64 i_set, i_setc;
3625 
3626 	bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
3627 
3628 	if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3629 		dev_err(&pf->pdev->dev,
3630 			"Change of RSS hash input set is not supported when MFP mode is enabled\n");
3631 		return -EOPNOTSUPP;
3632 	}
3633 
3634 	/* RSS does not support anything other than hashing
3635 	 * to queues on src and dst IPs and ports
3636 	 */
3637 	if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3638 			  RXH_L4_B_0_1 | RXH_L4_B_2_3))
3639 		return -EINVAL;
3640 
3641 	switch (nfc->flow_type) {
3642 	case TCP_V4_FLOW:
3643 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
3644 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3645 			set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
3646 				flow_pctypes);
3647 		break;
3648 	case TCP_V6_FLOW:
3649 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
3650 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3651 			set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
3652 				flow_pctypes);
3653 		break;
3654 	case UDP_V4_FLOW:
3655 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
3656 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3657 			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
3658 				flow_pctypes);
3659 			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
3660 				flow_pctypes);
3661 		}
3662 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3663 		break;
3664 	case UDP_V6_FLOW:
3665 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
3666 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3667 			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
3668 				flow_pctypes);
3669 			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
3670 				flow_pctypes);
3671 		}
3672 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3673 		break;
3674 	case AH_ESP_V4_FLOW:
3675 	case AH_V4_FLOW:
3676 	case ESP_V4_FLOW:
3677 	case SCTP_V4_FLOW:
3678 		if ((nfc->data & RXH_L4_B_0_1) ||
3679 		    (nfc->data & RXH_L4_B_2_3))
3680 			return -EINVAL;
3681 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
3682 		break;
3683 	case AH_ESP_V6_FLOW:
3684 	case AH_V6_FLOW:
3685 	case ESP_V6_FLOW:
3686 	case SCTP_V6_FLOW:
3687 		if ((nfc->data & RXH_L4_B_0_1) ||
3688 		    (nfc->data & RXH_L4_B_2_3))
3689 			return -EINVAL;
3690 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
3691 		break;
3692 	case IPV4_FLOW:
3693 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3694 			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3695 		break;
3696 	case IPV6_FLOW:
3697 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3698 			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3699 		break;
3700 	default:
3701 		return -EINVAL;
3702 	}
3703 
3704 	if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
3705 		u8 flow_id;
3706 
3707 		for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
3708 			i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
3709 				 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
3710 			i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
3711 
3712 			i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
3713 					  (u32)i_set);
3714 			i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
3715 					  (u32)(i_set >> 32));
3716 			hena |= BIT_ULL(flow_id);
3717 		}
3718 	}
3719 
3720 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3721 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
3722 	i40e_flush(hw);
3723 
3724 	return 0;
3725 }
3726 
3727 /**
3728  * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3729  * @vsi: Pointer to the targeted VSI
3730  * @input: The filter to update or NULL to indicate deletion
3731  * @sw_idx: Software index to the filter
3732  * @cmd: The command to get or set Rx flow classification rules
3733  *
3734  * This function updates (or deletes) a Flow Director entry from
3735  * the hlist of the corresponding PF
3736  *
3737  * Returns 0 on success
3738  **/
3739 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3740 					  struct i40e_fdir_filter *input,
3741 					  u16 sw_idx,
3742 					  struct ethtool_rxnfc *cmd)
3743 {
3744 	struct i40e_fdir_filter *rule, *parent;
3745 	struct i40e_pf *pf = vsi->back;
3746 	struct hlist_node *node2;
3747 	int err = -EINVAL;
3748 
3749 	parent = NULL;
3750 	rule = NULL;
3751 
3752 	hlist_for_each_entry_safe(rule, node2,
3753 				  &pf->fdir_filter_list, fdir_node) {
3754 		/* hash found, or no matching entry */
3755 		if (rule->fd_id >= sw_idx)
3756 			break;
3757 		parent = rule;
3758 	}
3759 
3760 	/* if there is an old rule occupying our place remove it */
3761 	if (rule && (rule->fd_id == sw_idx)) {
3762 		/* Remove this rule, since we're either deleting it, or
3763 		 * replacing it.
3764 		 */
3765 		err = i40e_add_del_fdir(vsi, rule, false);
3766 		hlist_del(&rule->fdir_node);
3767 		kfree(rule);
3768 		pf->fdir_pf_active_filters--;
3769 	}
3770 
3771 	/* If we weren't given an input, this is a delete, so just return the
3772 	 * error code indicating if there was an entry at the requested slot
3773 	 */
3774 	if (!input)
3775 		return err;
3776 
3777 	/* Otherwise, install the new rule as requested */
3778 	INIT_HLIST_NODE(&input->fdir_node);
3779 
3780 	/* add filter to the list */
3781 	if (parent)
3782 		hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3783 	else
3784 		hlist_add_head(&input->fdir_node,
3785 			       &pf->fdir_filter_list);
3786 
3787 	/* update counts */
3788 	pf->fdir_pf_active_filters++;
3789 
3790 	return 0;
3791 }
3792 
3793 /**
3794  * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3795  * @pf: pointer to PF structure
3796  *
3797  * This function searches the list of filters and determines which FLX_PIT
3798  * entries are still required. It will prune any entries which are no longer
3799  * in use after the deletion.
3800  **/
3801 static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3802 {
3803 	struct i40e_flex_pit *entry, *tmp;
3804 	struct i40e_fdir_filter *rule;
3805 
3806 	/* First, we'll check the l3 table */
3807 	list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3808 		bool found = false;
3809 
3810 		hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3811 			if (rule->flow_type != IP_USER_FLOW)
3812 				continue;
3813 			if (rule->flex_filter &&
3814 			    rule->flex_offset == entry->src_offset) {
3815 				found = true;
3816 				break;
3817 			}
3818 		}
3819 
3820 		/* If we didn't find the filter, then we can prune this entry
3821 		 * from the list.
3822 		 */
3823 		if (!found) {
3824 			list_del(&entry->list);
3825 			kfree(entry);
3826 		}
3827 	}
3828 
3829 	/* Followed by the L4 table */
3830 	list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3831 		bool found = false;
3832 
3833 		hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3834 			/* Skip this filter if it's L3, since we already
3835 			 * checked those in the above loop
3836 			 */
3837 			if (rule->flow_type == IP_USER_FLOW)
3838 				continue;
3839 			if (rule->flex_filter &&
3840 			    rule->flex_offset == entry->src_offset) {
3841 				found = true;
3842 				break;
3843 			}
3844 		}
3845 
3846 		/* If we didn't find the filter, then we can prune this entry
3847 		 * from the list.
3848 		 */
3849 		if (!found) {
3850 			list_del(&entry->list);
3851 			kfree(entry);
3852 		}
3853 	}
3854 }
3855 
3856 /**
3857  * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3858  * @vsi: Pointer to the targeted VSI
3859  * @cmd: The command to get or set Rx flow classification rules
3860  *
3861  * The function removes a Flow Director filter entry from the
3862  * hlist of the corresponding PF
3863  *
3864  * Returns 0 on success
3865  */
3866 static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3867 			       struct ethtool_rxnfc *cmd)
3868 {
3869 	struct ethtool_rx_flow_spec *fsp =
3870 		(struct ethtool_rx_flow_spec *)&cmd->fs;
3871 	struct i40e_pf *pf = vsi->back;
3872 	int ret = 0;
3873 
3874 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3875 	    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3876 		return -EBUSY;
3877 
3878 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3879 		return -EBUSY;
3880 
3881 	ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3882 
3883 	i40e_prune_flex_pit_list(pf);
3884 
3885 	i40e_fdir_check_and_reenable(pf);
3886 	return ret;
3887 }
3888 
3889 /**
3890  * i40e_unused_pit_index - Find an unused PIT index for given list
3891  * @pf: the PF data structure
3892  *
3893  * Find the first unused flexible PIT index entry. We search both the L3 and
3894  * L4 flexible PIT lists so that the returned index is unique and unused by
3895  * either currently programmed L3 or L4 filters. We use a bit field as storage
3896  * to track which indexes are already used.
3897  **/
3898 static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3899 {
3900 	unsigned long available_index = 0xFF;
3901 	struct i40e_flex_pit *entry;
3902 
3903 	/* We need to make sure that the new index isn't in use by either L3
3904 	 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3905 	 * L4 to use the same index.
3906 	 */
3907 
3908 	list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3909 		clear_bit(entry->pit_index, &available_index);
3910 
3911 	list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3912 		clear_bit(entry->pit_index, &available_index);
3913 
3914 	return find_first_bit(&available_index, 8);
3915 }
3916 
3917 /**
3918  * i40e_find_flex_offset - Find an existing flex src_offset
3919  * @flex_pit_list: L3 or L4 flex PIT list
3920  * @src_offset: new src_offset to find
3921  *
3922  * Searches the flex_pit_list for an existing offset. If no offset is
3923  * currently programmed, then this will return an ERR_PTR if there is no space
3924  * to add a new offset, otherwise it returns NULL.
3925  **/
3926 static
3927 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3928 					    u16 src_offset)
3929 {
3930 	struct i40e_flex_pit *entry;
3931 	int size = 0;
3932 
3933 	/* Search for the src_offset first. If we find a matching entry
3934 	 * already programmed, we can simply re-use it.
3935 	 */
3936 	list_for_each_entry(entry, flex_pit_list, list) {
3937 		size++;
3938 		if (entry->src_offset == src_offset)
3939 			return entry;
3940 	}
3941 
3942 	/* If we haven't found an entry yet, then the provided src offset has
3943 	 * not yet been programmed. We will program the src offset later on,
3944 	 * but we need to indicate whether there is enough space to do so
3945 	 * here. We'll make use of ERR_PTR for this purpose.
3946 	 */
3947 	if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3948 		return ERR_PTR(-ENOSPC);
3949 
3950 	return NULL;
3951 }
3952 
3953 /**
3954  * i40e_add_flex_offset - Add src_offset to flex PIT table list
3955  * @flex_pit_list: L3 or L4 flex PIT list
3956  * @src_offset: new src_offset to add
3957  * @pit_index: the PIT index to program
3958  *
3959  * This function programs the new src_offset to the list. It is expected that
3960  * i40e_find_flex_offset has already been tried and returned NULL, indicating
3961  * that this offset is not programmed, and that the list has enough space to
3962  * store another offset.
3963  *
3964  * Returns 0 on success, and negative value on error.
3965  **/
3966 static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3967 				u16 src_offset,
3968 				u8 pit_index)
3969 {
3970 	struct i40e_flex_pit *new_pit, *entry;
3971 
3972 	new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3973 	if (!new_pit)
3974 		return -ENOMEM;
3975 
3976 	new_pit->src_offset = src_offset;
3977 	new_pit->pit_index = pit_index;
3978 
3979 	/* We need to insert this item such that the list is sorted by
3980 	 * src_offset in ascending order.
3981 	 */
3982 	list_for_each_entry(entry, flex_pit_list, list) {
3983 		if (new_pit->src_offset < entry->src_offset) {
3984 			list_add_tail(&new_pit->list, &entry->list);
3985 			return 0;
3986 		}
3987 
3988 		/* If we found an entry with our offset already programmed we
3989 		 * can simply return here, after freeing the memory. However,
3990 		 * if the pit_index does not match we need to report an error.
3991 		 */
3992 		if (new_pit->src_offset == entry->src_offset) {
3993 			int err = 0;
3994 
3995 			/* If the PIT index is not the same we can't re-use
3996 			 * the entry, so we must report an error.
3997 			 */
3998 			if (new_pit->pit_index != entry->pit_index)
3999 				err = -EINVAL;
4000 
4001 			kfree(new_pit);
4002 			return err;
4003 		}
4004 	}
4005 
4006 	/* If we reached here, then we haven't yet added the item. This means
4007 	 * that we should add the item at the end of the list.
4008 	 */
4009 	list_add_tail(&new_pit->list, flex_pit_list);
4010 	return 0;
4011 }
4012 
4013 /**
4014  * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
4015  * @pf: Pointer to the PF structure
4016  * @flex_pit_list: list of flexible src offsets in use
4017  * @flex_pit_start: index to first entry for this section of the table
4018  *
4019  * In order to handle flexible data, the hardware uses a table of values
4020  * called the FLX_PIT table. This table is used to indicate which sections of
4021  * the input correspond to what PIT index values. Unfortunately, hardware is
4022  * very restrictive about programming this table. Entries must be ordered by
4023  * src_offset in ascending order, without duplicates. Additionally, unused
4024  * entries must be set to the unused index value, and must have valid size and
4025  * length according to the src_offset ordering.
4026  *
4027  * This function will reprogram the FLX_PIT register from a book-keeping
4028  * structure that we guarantee is already ordered correctly, and has no more
4029  * than 3 entries.
4030  *
4031  * To make things easier, we only support flexible values of one word length,
4032  * rather than allowing variable length flexible values.
4033  **/
4034 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
4035 				      struct list_head *flex_pit_list,
4036 				      int flex_pit_start)
4037 {
4038 	struct i40e_flex_pit *entry = NULL;
4039 	u16 last_offset = 0;
4040 	int i = 0, j = 0;
4041 
4042 	/* First, loop over the list of flex PIT entries, and reprogram the
4043 	 * registers.
4044 	 */
4045 	list_for_each_entry(entry, flex_pit_list, list) {
4046 		/* We have to be careful when programming values for the
4047 		 * largest SRC_OFFSET value. It is possible that adding
4048 		 * additional empty values at the end would overflow the space
4049 		 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
4050 		 * we check here and add the empty values prior to adding the
4051 		 * largest value.
4052 		 *
4053 		 * To determine this, we will use a loop from i+1 to 3, which
4054 		 * will determine whether the unused entries would have valid
4055 		 * SRC_OFFSET. Note that there cannot be extra entries past
4056 		 * this value, because the only valid values would have been
4057 		 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
4058 		 * have been added to the list in the first place.
4059 		 */
4060 		for (j = i + 1; j < 3; j++) {
4061 			u16 offset = entry->src_offset + j;
4062 			int index = flex_pit_start + i;
4063 			u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4064 						       1,
4065 						       offset - 3);
4066 
4067 			if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
4068 				i40e_write_rx_ctl(&pf->hw,
4069 						  I40E_PRTQF_FLX_PIT(index),
4070 						  value);
4071 				i++;
4072 			}
4073 		}
4074 
4075 		/* Now, we can program the actual value into the table */
4076 		i40e_write_rx_ctl(&pf->hw,
4077 				  I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4078 				  I40E_FLEX_PREP_VAL(entry->pit_index + 50,
4079 						     1,
4080 						     entry->src_offset));
4081 		i++;
4082 	}
4083 
4084 	/* In order to program the last entries in the table, we need to
4085 	 * determine the valid offset. If the list is empty, we'll just start
4086 	 * with 0. Otherwise, we'll start with the last item offset and add 1.
4087 	 * This ensures that all entries have valid sizes. If we don't do this
4088 	 * correctly, the hardware will disable flexible field parsing.
4089 	 */
4090 	if (!list_empty(flex_pit_list))
4091 		last_offset = list_prev_entry(entry, list)->src_offset + 1;
4092 
4093 	for (; i < 3; i++, last_offset++) {
4094 		i40e_write_rx_ctl(&pf->hw,
4095 				  I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4096 				  I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4097 						     1,
4098 						     last_offset));
4099 	}
4100 }
4101 
4102 /**
4103  * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
4104  * @pf: pointer to the PF structure
4105  *
4106  * This function reprograms both the L3 and L4 FLX_PIT tables. See the
4107  * internal helper function for implementation details.
4108  **/
4109 static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
4110 {
4111 	__i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
4112 				  I40E_FLEX_PIT_IDX_START_L3);
4113 
4114 	__i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
4115 				  I40E_FLEX_PIT_IDX_START_L4);
4116 
4117 	/* We also need to program the L3 and L4 GLQF ORT register */
4118 	i40e_write_rx_ctl(&pf->hw,
4119 			  I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
4120 			  I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
4121 					    3, 1));
4122 
4123 	i40e_write_rx_ctl(&pf->hw,
4124 			  I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
4125 			  I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
4126 					    3, 1));
4127 }
4128 
4129 /**
4130  * i40e_flow_str - Converts a flow_type into a human readable string
4131  * @fsp: the flow specification
4132  *
4133  * Currently only flow types we support are included here, and the string
4134  * value attempts to match what ethtool would use to configure this flow type.
4135  **/
4136 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
4137 {
4138 	switch (fsp->flow_type & ~FLOW_EXT) {
4139 	case TCP_V4_FLOW:
4140 		return "tcp4";
4141 	case UDP_V4_FLOW:
4142 		return "udp4";
4143 	case SCTP_V4_FLOW:
4144 		return "sctp4";
4145 	case IP_USER_FLOW:
4146 		return "ip4";
4147 	case TCP_V6_FLOW:
4148 		return "tcp6";
4149 	case UDP_V6_FLOW:
4150 		return "udp6";
4151 	case SCTP_V6_FLOW:
4152 		return "sctp6";
4153 	case IPV6_USER_FLOW:
4154 		return "ip6";
4155 	default:
4156 		return "unknown";
4157 	}
4158 }
4159 
4160 /**
4161  * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
4162  * @pit_index: PIT index to convert
4163  *
4164  * Returns the mask for a given PIT index. Will return 0 if the pit_index is
4165  * of range.
4166  **/
4167 static u64 i40e_pit_index_to_mask(int pit_index)
4168 {
4169 	switch (pit_index) {
4170 	case 0:
4171 		return I40E_FLEX_50_MASK;
4172 	case 1:
4173 		return I40E_FLEX_51_MASK;
4174 	case 2:
4175 		return I40E_FLEX_52_MASK;
4176 	case 3:
4177 		return I40E_FLEX_53_MASK;
4178 	case 4:
4179 		return I40E_FLEX_54_MASK;
4180 	case 5:
4181 		return I40E_FLEX_55_MASK;
4182 	case 6:
4183 		return I40E_FLEX_56_MASK;
4184 	case 7:
4185 		return I40E_FLEX_57_MASK;
4186 	default:
4187 		return 0;
4188 	}
4189 }
4190 
4191 /**
4192  * i40e_print_input_set - Show changes between two input sets
4193  * @vsi: the vsi being configured
4194  * @old: the old input set
4195  * @new: the new input set
4196  *
4197  * Print the difference between old and new input sets by showing which series
4198  * of words are toggled on or off. Only displays the bits we actually support
4199  * changing.
4200  **/
4201 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
4202 {
4203 	struct i40e_pf *pf = vsi->back;
4204 	bool old_value, new_value;
4205 	int i;
4206 
4207 	old_value = !!(old & I40E_L3_SRC_MASK);
4208 	new_value = !!(new & I40E_L3_SRC_MASK);
4209 	if (old_value != new_value)
4210 		netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
4211 			   old_value ? "ON" : "OFF",
4212 			   new_value ? "ON" : "OFF");
4213 
4214 	old_value = !!(old & I40E_L3_DST_MASK);
4215 	new_value = !!(new & I40E_L3_DST_MASK);
4216 	if (old_value != new_value)
4217 		netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
4218 			   old_value ? "ON" : "OFF",
4219 			   new_value ? "ON" : "OFF");
4220 
4221 	old_value = !!(old & I40E_L4_SRC_MASK);
4222 	new_value = !!(new & I40E_L4_SRC_MASK);
4223 	if (old_value != new_value)
4224 		netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
4225 			   old_value ? "ON" : "OFF",
4226 			   new_value ? "ON" : "OFF");
4227 
4228 	old_value = !!(old & I40E_L4_DST_MASK);
4229 	new_value = !!(new & I40E_L4_DST_MASK);
4230 	if (old_value != new_value)
4231 		netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
4232 			   old_value ? "ON" : "OFF",
4233 			   new_value ? "ON" : "OFF");
4234 
4235 	old_value = !!(old & I40E_VERIFY_TAG_MASK);
4236 	new_value = !!(new & I40E_VERIFY_TAG_MASK);
4237 	if (old_value != new_value)
4238 		netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
4239 			   old_value ? "ON" : "OFF",
4240 			   new_value ? "ON" : "OFF");
4241 
4242 	/* Show change of flexible filter entries */
4243 	for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
4244 		u64 flex_mask = i40e_pit_index_to_mask(i);
4245 
4246 		old_value = !!(old & flex_mask);
4247 		new_value = !!(new & flex_mask);
4248 		if (old_value != new_value)
4249 			netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
4250 				   i,
4251 				   old_value ? "ON" : "OFF",
4252 				   new_value ? "ON" : "OFF");
4253 	}
4254 
4255 	netif_info(pf, drv, vsi->netdev, "  Current input set: %0llx\n",
4256 		   old);
4257 	netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
4258 		   new);
4259 }
4260 
4261 /**
4262  * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
4263  * @vsi: pointer to the targeted VSI
4264  * @fsp: pointer to Rx flow specification
4265  * @userdef: userdefined data from flow specification
4266  *
4267  * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
4268  * for partial matches exists with a few limitations. First, hardware only
4269  * supports masking by word boundary (2 bytes) and not per individual bit.
4270  * Second, hardware is limited to using one mask for a flow type and cannot
4271  * use a separate mask for each filter.
4272  *
4273  * To support these limitations, if we already have a configured filter for
4274  * the specified type, this function enforces that new filters of the type
4275  * match the configured input set. Otherwise, if we do not have a filter of
4276  * the specified type, we allow the input set to be updated to match the
4277  * desired filter.
4278  *
4279  * To help ensure that administrators understand why filters weren't displayed
4280  * as supported, we print a diagnostic message displaying how the input set
4281  * would change and warning to delete the preexisting filters if required.
4282  *
4283  * Returns 0 on successful input set match, and a negative return code on
4284  * failure.
4285  **/
4286 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
4287 				     struct ethtool_rx_flow_spec *fsp,
4288 				     struct i40e_rx_flow_userdef *userdef)
4289 {
4290 	static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff),
4291 		cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff),
4292 		cpu_to_be32(0xffffffff)};
4293 	struct ethtool_tcpip6_spec *tcp_ip6_spec;
4294 	struct ethtool_usrip6_spec *usr_ip6_spec;
4295 	struct ethtool_tcpip4_spec *tcp_ip4_spec;
4296 	struct ethtool_usrip4_spec *usr_ip4_spec;
4297 	struct i40e_pf *pf = vsi->back;
4298 	u64 current_mask, new_mask;
4299 	bool new_flex_offset = false;
4300 	bool flex_l3 = false;
4301 	u16 *fdir_filter_count;
4302 	u16 index, src_offset = 0;
4303 	u8 pit_index = 0;
4304 	int err;
4305 
4306 	switch (fsp->flow_type & ~FLOW_EXT) {
4307 	case SCTP_V4_FLOW:
4308 		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
4309 		fdir_filter_count = &pf->fd_sctp4_filter_cnt;
4310 		break;
4311 	case TCP_V4_FLOW:
4312 		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
4313 		fdir_filter_count = &pf->fd_tcp4_filter_cnt;
4314 		break;
4315 	case UDP_V4_FLOW:
4316 		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
4317 		fdir_filter_count = &pf->fd_udp4_filter_cnt;
4318 		break;
4319 	case SCTP_V6_FLOW:
4320 		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
4321 		fdir_filter_count = &pf->fd_sctp6_filter_cnt;
4322 		break;
4323 	case TCP_V6_FLOW:
4324 		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
4325 		fdir_filter_count = &pf->fd_tcp6_filter_cnt;
4326 		break;
4327 	case UDP_V6_FLOW:
4328 		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
4329 		fdir_filter_count = &pf->fd_udp6_filter_cnt;
4330 		break;
4331 	case IP_USER_FLOW:
4332 		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
4333 		fdir_filter_count = &pf->fd_ip4_filter_cnt;
4334 		flex_l3 = true;
4335 		break;
4336 	case IPV6_USER_FLOW:
4337 		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
4338 		fdir_filter_count = &pf->fd_ip6_filter_cnt;
4339 		flex_l3 = true;
4340 		break;
4341 	default:
4342 		return -EOPNOTSUPP;
4343 	}
4344 
4345 	/* Read the current input set from register memory. */
4346 	current_mask = i40e_read_fd_input_set(pf, index);
4347 	new_mask = current_mask;
4348 
4349 	/* Determine, if any, the required changes to the input set in order
4350 	 * to support the provided mask.
4351 	 *
4352 	 * Hardware only supports masking at word (2 byte) granularity and does
4353 	 * not support full bitwise masking. This implementation simplifies
4354 	 * even further and only supports fully enabled or fully disabled
4355 	 * masks for each field, even though we could split the ip4src and
4356 	 * ip4dst fields.
4357 	 */
4358 	switch (fsp->flow_type & ~FLOW_EXT) {
4359 	case SCTP_V4_FLOW:
4360 		new_mask &= ~I40E_VERIFY_TAG_MASK;
4361 		fallthrough;
4362 	case TCP_V4_FLOW:
4363 	case UDP_V4_FLOW:
4364 		tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
4365 
4366 		/* IPv4 source address */
4367 		if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4368 			new_mask |= I40E_L3_SRC_MASK;
4369 		else if (!tcp_ip4_spec->ip4src)
4370 			new_mask &= ~I40E_L3_SRC_MASK;
4371 		else
4372 			return -EOPNOTSUPP;
4373 
4374 		/* IPv4 destination address */
4375 		if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4376 			new_mask |= I40E_L3_DST_MASK;
4377 		else if (!tcp_ip4_spec->ip4dst)
4378 			new_mask &= ~I40E_L3_DST_MASK;
4379 		else
4380 			return -EOPNOTSUPP;
4381 
4382 		/* L4 source port */
4383 		if (tcp_ip4_spec->psrc == htons(0xFFFF))
4384 			new_mask |= I40E_L4_SRC_MASK;
4385 		else if (!tcp_ip4_spec->psrc)
4386 			new_mask &= ~I40E_L4_SRC_MASK;
4387 		else
4388 			return -EOPNOTSUPP;
4389 
4390 		/* L4 destination port */
4391 		if (tcp_ip4_spec->pdst == htons(0xFFFF))
4392 			new_mask |= I40E_L4_DST_MASK;
4393 		else if (!tcp_ip4_spec->pdst)
4394 			new_mask &= ~I40E_L4_DST_MASK;
4395 		else
4396 			return -EOPNOTSUPP;
4397 
4398 		/* Filtering on Type of Service is not supported. */
4399 		if (tcp_ip4_spec->tos)
4400 			return -EOPNOTSUPP;
4401 
4402 		break;
4403 	case SCTP_V6_FLOW:
4404 		new_mask &= ~I40E_VERIFY_TAG_MASK;
4405 		fallthrough;
4406 	case TCP_V6_FLOW:
4407 	case UDP_V6_FLOW:
4408 		tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec;
4409 
4410 		/* Check if user provided IPv6 source address. */
4411 		if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src,
4412 				    (struct in6_addr *)&ipv6_full_mask))
4413 			new_mask |= I40E_L3_V6_SRC_MASK;
4414 		else if (ipv6_addr_any((struct in6_addr *)
4415 				       &tcp_ip6_spec->ip6src))
4416 			new_mask &= ~I40E_L3_V6_SRC_MASK;
4417 		else
4418 			return -EOPNOTSUPP;
4419 
4420 		/* Check if user provided destination address. */
4421 		if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst,
4422 				    (struct in6_addr *)&ipv6_full_mask))
4423 			new_mask |= I40E_L3_V6_DST_MASK;
4424 		else if (ipv6_addr_any((struct in6_addr *)
4425 				       &tcp_ip6_spec->ip6dst))
4426 			new_mask &= ~I40E_L3_V6_DST_MASK;
4427 		else
4428 			return -EOPNOTSUPP;
4429 
4430 		/* L4 source port */
4431 		if (tcp_ip6_spec->psrc == htons(0xFFFF))
4432 			new_mask |= I40E_L4_SRC_MASK;
4433 		else if (!tcp_ip6_spec->psrc)
4434 			new_mask &= ~I40E_L4_SRC_MASK;
4435 		else
4436 			return -EOPNOTSUPP;
4437 
4438 		/* L4 destination port */
4439 		if (tcp_ip6_spec->pdst == htons(0xFFFF))
4440 			new_mask |= I40E_L4_DST_MASK;
4441 		else if (!tcp_ip6_spec->pdst)
4442 			new_mask &= ~I40E_L4_DST_MASK;
4443 		else
4444 			return -EOPNOTSUPP;
4445 
4446 		/* Filtering on Traffic Classes is not supported. */
4447 		if (tcp_ip6_spec->tclass)
4448 			return -EOPNOTSUPP;
4449 		break;
4450 	case IP_USER_FLOW:
4451 		usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
4452 
4453 		/* IPv4 source address */
4454 		if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4455 			new_mask |= I40E_L3_SRC_MASK;
4456 		else if (!usr_ip4_spec->ip4src)
4457 			new_mask &= ~I40E_L3_SRC_MASK;
4458 		else
4459 			return -EOPNOTSUPP;
4460 
4461 		/* IPv4 destination address */
4462 		if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4463 			new_mask |= I40E_L3_DST_MASK;
4464 		else if (!usr_ip4_spec->ip4dst)
4465 			new_mask &= ~I40E_L3_DST_MASK;
4466 		else
4467 			return -EOPNOTSUPP;
4468 
4469 		/* First 4 bytes of L4 header */
4470 		if (usr_ip4_spec->l4_4_bytes)
4471 			return -EOPNOTSUPP;
4472 
4473 		/* Filtering on Type of Service is not supported. */
4474 		if (usr_ip4_spec->tos)
4475 			return -EOPNOTSUPP;
4476 
4477 		/* Filtering on IP version is not supported */
4478 		if (usr_ip4_spec->ip_ver)
4479 			return -EINVAL;
4480 
4481 		/* Filtering on L4 protocol is not supported */
4482 		if (usr_ip4_spec->proto)
4483 			return -EINVAL;
4484 
4485 		break;
4486 	case IPV6_USER_FLOW:
4487 		usr_ip6_spec = &fsp->m_u.usr_ip6_spec;
4488 
4489 		/* Check if user provided IPv6 source address. */
4490 		if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src,
4491 				    (struct in6_addr *)&ipv6_full_mask))
4492 			new_mask |= I40E_L3_V6_SRC_MASK;
4493 		else if (ipv6_addr_any((struct in6_addr *)
4494 				       &usr_ip6_spec->ip6src))
4495 			new_mask &= ~I40E_L3_V6_SRC_MASK;
4496 		else
4497 			return -EOPNOTSUPP;
4498 
4499 		/* Check if user provided destination address. */
4500 		if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst,
4501 				    (struct in6_addr *)&ipv6_full_mask))
4502 			new_mask |= I40E_L3_V6_DST_MASK;
4503 		else if (ipv6_addr_any((struct in6_addr *)
4504 				       &usr_ip6_spec->ip6dst))
4505 			new_mask &= ~I40E_L3_V6_DST_MASK;
4506 		else
4507 			return -EOPNOTSUPP;
4508 
4509 		if (usr_ip6_spec->l4_4_bytes)
4510 			return -EOPNOTSUPP;
4511 
4512 		/* Filtering on Traffic class is not supported. */
4513 		if (usr_ip6_spec->tclass)
4514 			return -EOPNOTSUPP;
4515 
4516 		/* Filtering on L4 protocol is not supported */
4517 		if (usr_ip6_spec->l4_proto)
4518 			return -EINVAL;
4519 
4520 		break;
4521 	default:
4522 		return -EOPNOTSUPP;
4523 	}
4524 
4525 	if (fsp->flow_type & FLOW_EXT) {
4526 		/* Allow only 802.1Q and no etype defined, as
4527 		 * later it's modified to 0x8100
4528 		 */
4529 		if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) &&
4530 		    fsp->h_ext.vlan_etype != 0)
4531 			return -EOPNOTSUPP;
4532 		if (fsp->m_ext.vlan_tci == htons(0xFFFF))
4533 			new_mask |= I40E_VLAN_SRC_MASK;
4534 		else
4535 			new_mask &= ~I40E_VLAN_SRC_MASK;
4536 	}
4537 
4538 	/* First, clear all flexible filter entries */
4539 	new_mask &= ~I40E_FLEX_INPUT_MASK;
4540 
4541 	/* If we have a flexible filter, try to add this offset to the correct
4542 	 * flexible filter PIT list. Once finished, we can update the mask.
4543 	 * If the src_offset changed, we will get a new mask value which will
4544 	 * trigger an input set change.
4545 	 */
4546 	if (userdef->flex_filter) {
4547 		struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
4548 
4549 		/* Flexible offset must be even, since the flexible payload
4550 		 * must be aligned on 2-byte boundary.
4551 		 */
4552 		if (userdef->flex_offset & 0x1) {
4553 			dev_warn(&pf->pdev->dev,
4554 				 "Flexible data offset must be 2-byte aligned\n");
4555 			return -EINVAL;
4556 		}
4557 
4558 		src_offset = userdef->flex_offset >> 1;
4559 
4560 		/* FLX_PIT source offset value is only so large */
4561 		if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
4562 			dev_warn(&pf->pdev->dev,
4563 				 "Flexible data must reside within first 64 bytes of the packet payload\n");
4564 			return -EINVAL;
4565 		}
4566 
4567 		/* See if this offset has already been programmed. If we get
4568 		 * an ERR_PTR, then the filter is not safe to add. Otherwise,
4569 		 * if we get a NULL pointer, this means we will need to add
4570 		 * the offset.
4571 		 */
4572 		flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
4573 						 src_offset);
4574 		if (IS_ERR(flex_pit))
4575 			return PTR_ERR(flex_pit);
4576 
4577 		/* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
4578 		 * packet types, and thus we need to program both L3 and L4
4579 		 * flexible values. These must have identical flexible index,
4580 		 * as otherwise we can't correctly program the input set. So
4581 		 * we'll find both an L3 and L4 index and make sure they are
4582 		 * the same.
4583 		 */
4584 		if (flex_l3) {
4585 			l3_flex_pit =
4586 				i40e_find_flex_offset(&pf->l3_flex_pit_list,
4587 						      src_offset);
4588 			if (IS_ERR(l3_flex_pit))
4589 				return PTR_ERR(l3_flex_pit);
4590 
4591 			if (flex_pit) {
4592 				/* If we already had a matching L4 entry, we
4593 				 * need to make sure that the L3 entry we
4594 				 * obtained uses the same index.
4595 				 */
4596 				if (l3_flex_pit) {
4597 					if (l3_flex_pit->pit_index !=
4598 					    flex_pit->pit_index) {
4599 						return -EINVAL;
4600 					}
4601 				} else {
4602 					new_flex_offset = true;
4603 				}
4604 			} else {
4605 				flex_pit = l3_flex_pit;
4606 			}
4607 		}
4608 
4609 		/* If we didn't find an existing flex offset, we need to
4610 		 * program a new one. However, we don't immediately program it
4611 		 * here because we will wait to program until after we check
4612 		 * that it is safe to change the input set.
4613 		 */
4614 		if (!flex_pit) {
4615 			new_flex_offset = true;
4616 			pit_index = i40e_unused_pit_index(pf);
4617 		} else {
4618 			pit_index = flex_pit->pit_index;
4619 		}
4620 
4621 		/* Update the mask with the new offset */
4622 		new_mask |= i40e_pit_index_to_mask(pit_index);
4623 	}
4624 
4625 	/* If the mask and flexible filter offsets for this filter match the
4626 	 * currently programmed values we don't need any input set change, so
4627 	 * this filter is safe to install.
4628 	 */
4629 	if (new_mask == current_mask && !new_flex_offset)
4630 		return 0;
4631 
4632 	netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
4633 		   i40e_flow_str(fsp));
4634 	i40e_print_input_set(vsi, current_mask, new_mask);
4635 	if (new_flex_offset) {
4636 		netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
4637 			   pit_index, src_offset);
4638 	}
4639 
4640 	/* Hardware input sets are global across multiple ports, so even the
4641 	 * main port cannot change them when in MFP mode as this would impact
4642 	 * any filters on the other ports.
4643 	 */
4644 	if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4645 		netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
4646 		return -EOPNOTSUPP;
4647 	}
4648 
4649 	/* This filter requires us to update the input set. However, hardware
4650 	 * only supports one input set per flow type, and does not support
4651 	 * separate masks for each filter. This means that we can only support
4652 	 * a single mask for all filters of a specific type.
4653 	 *
4654 	 * If we have preexisting filters, they obviously depend on the
4655 	 * current programmed input set. Display a diagnostic message in this
4656 	 * case explaining why the filter could not be accepted.
4657 	 */
4658 	if (*fdir_filter_count) {
4659 		netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
4660 			  i40e_flow_str(fsp),
4661 			  *fdir_filter_count);
4662 		return -EOPNOTSUPP;
4663 	}
4664 
4665 	i40e_write_fd_input_set(pf, index, new_mask);
4666 
4667 	/* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
4668 	 * frames. If we're programming the input set for IPv4/Other, we also
4669 	 * need to program the IPv4/Fragmented input set. Since we don't have
4670 	 * separate support, we'll always assume and enforce that the two flow
4671 	 * types must have matching input sets.
4672 	 */
4673 	if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
4674 		i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
4675 					new_mask);
4676 
4677 	/* Add the new offset and update table, if necessary */
4678 	if (new_flex_offset) {
4679 		err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
4680 					   pit_index);
4681 		if (err)
4682 			return err;
4683 
4684 		if (flex_l3) {
4685 			err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
4686 						   src_offset,
4687 						   pit_index);
4688 			if (err)
4689 				return err;
4690 		}
4691 
4692 		i40e_reprogram_flex_pit(pf);
4693 	}
4694 
4695 	return 0;
4696 }
4697 
4698 /**
4699  * i40e_match_fdir_filter - Return true of two filters match
4700  * @a: pointer to filter struct
4701  * @b: pointer to filter struct
4702  *
4703  * Returns true if the two filters match exactly the same criteria. I.e. they
4704  * match the same flow type and have the same parameters. We don't need to
4705  * check any input-set since all filters of the same flow type must use the
4706  * same input set.
4707  **/
4708 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4709 				   struct i40e_fdir_filter *b)
4710 {
4711 	/* The filters do not much if any of these criteria differ. */
4712 	if (a->dst_ip != b->dst_ip ||
4713 	    a->src_ip != b->src_ip ||
4714 	    a->dst_port != b->dst_port ||
4715 	    a->src_port != b->src_port ||
4716 	    a->flow_type != b->flow_type ||
4717 	    a->ipl4_proto != b->ipl4_proto ||
4718 	    a->vlan_tag != b->vlan_tag ||
4719 	    a->vlan_etype != b->vlan_etype)
4720 		return false;
4721 
4722 	return true;
4723 }
4724 
4725 /**
4726  * i40e_disallow_matching_filters - Check that new filters differ
4727  * @vsi: pointer to the targeted VSI
4728  * @input: new filter to check
4729  *
4730  * Due to hardware limitations, it is not possible for two filters that match
4731  * similar criteria to be programmed at the same time. This is true for a few
4732  * reasons:
4733  *
4734  * (a) all filters matching a particular flow type must use the same input
4735  * set, that is they must match the same criteria.
4736  * (b) different flow types will never match the same packet, as the flow type
4737  * is decided by hardware before checking which rules apply.
4738  * (c) hardware has no way to distinguish which order filters apply in.
4739  *
4740  * Due to this, we can't really support using the location data to order
4741  * filters in the hardware parsing. It is technically possible for the user to
4742  * request two filters matching the same criteria but which select different
4743  * queues. In this case, rather than keep both filters in the list, we reject
4744  * the 2nd filter when the user requests adding it.
4745  *
4746  * This avoids needing to track location for programming the filter to
4747  * hardware, and ensures that we avoid some strange scenarios involving
4748  * deleting filters which match the same criteria.
4749  **/
4750 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4751 					  struct i40e_fdir_filter *input)
4752 {
4753 	struct i40e_pf *pf = vsi->back;
4754 	struct i40e_fdir_filter *rule;
4755 	struct hlist_node *node2;
4756 
4757 	/* Loop through every filter, and check that it doesn't match */
4758 	hlist_for_each_entry_safe(rule, node2,
4759 				  &pf->fdir_filter_list, fdir_node) {
4760 		/* Don't check the filters match if they share the same fd_id,
4761 		 * since the new filter is actually just updating the target
4762 		 * of the old filter.
4763 		 */
4764 		if (rule->fd_id == input->fd_id)
4765 			continue;
4766 
4767 		/* If any filters match, then print a warning message to the
4768 		 * kernel message buffer and bail out.
4769 		 */
4770 		if (i40e_match_fdir_filter(rule, input)) {
4771 			dev_warn(&pf->pdev->dev,
4772 				 "Existing user defined filter %d already matches this flow.\n",
4773 				 rule->fd_id);
4774 			return -EINVAL;
4775 		}
4776 	}
4777 
4778 	return 0;
4779 }
4780 
4781 /**
4782  * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
4783  * @vsi: pointer to the targeted VSI
4784  * @cmd: command to get or set RX flow classification rules
4785  *
4786  * Add Flow Director filters for a specific flow spec based on their
4787  * protocol.  Returns 0 if the filters were successfully added.
4788  **/
4789 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4790 				 struct ethtool_rxnfc *cmd)
4791 {
4792 	struct i40e_rx_flow_userdef userdef;
4793 	struct ethtool_rx_flow_spec *fsp;
4794 	struct i40e_fdir_filter *input;
4795 	u16 dest_vsi = 0, q_index = 0;
4796 	struct i40e_pf *pf;
4797 	int ret = -EINVAL;
4798 	u8 dest_ctl;
4799 
4800 	if (!vsi)
4801 		return -EINVAL;
4802 	pf = vsi->back;
4803 
4804 	if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
4805 		return -EOPNOTSUPP;
4806 
4807 	if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
4808 		return -ENOSPC;
4809 
4810 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4811 	    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
4812 		return -EBUSY;
4813 
4814 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
4815 		return -EBUSY;
4816 
4817 	fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4818 
4819 	/* Parse the user-defined field */
4820 	if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4821 		return -EINVAL;
4822 
4823 	/* Extended MAC field is not supported */
4824 	if (fsp->flow_type & FLOW_MAC_EXT)
4825 		return -EINVAL;
4826 
4827 	ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
4828 	if (ret)
4829 		return ret;
4830 
4831 	if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4832 			      pf->hw.func_caps.fd_filters_guaranteed)) {
4833 		return -EINVAL;
4834 	}
4835 
4836 	/* ring_cookie is either the drop index, or is a mask of the queue
4837 	 * index and VF id we wish to target.
4838 	 */
4839 	if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4840 		dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4841 	} else {
4842 		u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4843 		u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4844 
4845 		if (!vf) {
4846 			if (ring >= vsi->num_queue_pairs)
4847 				return -EINVAL;
4848 			dest_vsi = vsi->id;
4849 		} else {
4850 			/* VFs are zero-indexed, so we subtract one here */
4851 			vf--;
4852 
4853 			if (vf >= pf->num_alloc_vfs)
4854 				return -EINVAL;
4855 			if (ring >= pf->vf[vf].num_queue_pairs)
4856 				return -EINVAL;
4857 			dest_vsi = pf->vf[vf].lan_vsi_id;
4858 		}
4859 		dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4860 		q_index = ring;
4861 	}
4862 
4863 	input = kzalloc(sizeof(*input), GFP_KERNEL);
4864 
4865 	if (!input)
4866 		return -ENOMEM;
4867 
4868 	input->fd_id = fsp->location;
4869 	input->q_index = q_index;
4870 	input->dest_vsi = dest_vsi;
4871 	input->dest_ctl = dest_ctl;
4872 	input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4873 	input->cnt_index  = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4874 	input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4875 	input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4876 	input->flow_type = fsp->flow_type & ~FLOW_EXT;
4877 
4878 	input->vlan_etype = fsp->h_ext.vlan_etype;
4879 	if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci)
4880 		input->vlan_etype = cpu_to_be16(ETH_P_8021Q);
4881 	if (fsp->m_ext.vlan_tci && input->vlan_etype)
4882 		input->vlan_tag = fsp->h_ext.vlan_tci;
4883 	if (input->flow_type == IPV6_USER_FLOW ||
4884 	    input->flow_type == UDP_V6_FLOW ||
4885 	    input->flow_type == TCP_V6_FLOW ||
4886 	    input->flow_type == SCTP_V6_FLOW) {
4887 		/* Reverse the src and dest notion, since the HW expects them
4888 		 * to be from Tx perspective where as the input from user is
4889 		 * from Rx filter view.
4890 		 */
4891 		input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto;
4892 		input->dst_port = fsp->h_u.tcp_ip6_spec.psrc;
4893 		input->src_port = fsp->h_u.tcp_ip6_spec.pdst;
4894 		memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src,
4895 		       sizeof(__be32) * 4);
4896 		memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst,
4897 		       sizeof(__be32) * 4);
4898 	} else {
4899 		/* Reverse the src and dest notion, since the HW expects them
4900 		 * to be from Tx perspective where as the input from user is
4901 		 * from Rx filter view.
4902 		 */
4903 		input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto;
4904 		input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4905 		input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4906 		input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4907 		input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4908 	}
4909 
4910 	if (userdef.flex_filter) {
4911 		input->flex_filter = true;
4912 		input->flex_word = cpu_to_be16(userdef.flex_word);
4913 		input->flex_offset = userdef.flex_offset;
4914 	}
4915 
4916 	/* Avoid programming two filters with identical match criteria. */
4917 	ret = i40e_disallow_matching_filters(vsi, input);
4918 	if (ret)
4919 		goto free_filter_memory;
4920 
4921 	/* Add the input filter to the fdir_input_list, possibly replacing
4922 	 * a previous filter. Do not free the input structure after adding it
4923 	 * to the list as this would cause a use-after-free bug.
4924 	 */
4925 	i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4926 	ret = i40e_add_del_fdir(vsi, input, true);
4927 	if (ret)
4928 		goto remove_sw_rule;
4929 	return 0;
4930 
4931 remove_sw_rule:
4932 	hlist_del(&input->fdir_node);
4933 	pf->fdir_pf_active_filters--;
4934 free_filter_memory:
4935 	kfree(input);
4936 	return ret;
4937 }
4938 
4939 /**
4940  * i40e_set_rxnfc - command to set RX flow classification rules
4941  * @netdev: network interface device structure
4942  * @cmd: ethtool rxnfc command
4943  *
4944  * Returns Success if the command is supported.
4945  **/
4946 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4947 {
4948 	struct i40e_netdev_priv *np = netdev_priv(netdev);
4949 	struct i40e_vsi *vsi = np->vsi;
4950 	struct i40e_pf *pf = vsi->back;
4951 	int ret = -EOPNOTSUPP;
4952 
4953 	switch (cmd->cmd) {
4954 	case ETHTOOL_SRXFH:
4955 		ret = i40e_set_rss_hash_opt(pf, cmd);
4956 		break;
4957 	case ETHTOOL_SRXCLSRLINS:
4958 		ret = i40e_add_fdir_ethtool(vsi, cmd);
4959 		break;
4960 	case ETHTOOL_SRXCLSRLDEL:
4961 		ret = i40e_del_fdir_entry(vsi, cmd);
4962 		break;
4963 	default:
4964 		break;
4965 	}
4966 
4967 	return ret;
4968 }
4969 
4970 /**
4971  * i40e_max_channels - get Max number of combined channels supported
4972  * @vsi: vsi pointer
4973  **/
4974 static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4975 {
4976 	/* TODO: This code assumes DCB and FD is disabled for now. */
4977 	return vsi->alloc_queue_pairs;
4978 }
4979 
4980 /**
4981  * i40e_get_channels - Get the current channels enabled and max supported etc.
4982  * @dev: network interface device structure
4983  * @ch: ethtool channels structure
4984  *
4985  * We don't support separate tx and rx queues as channels. The other count
4986  * represents how many queues are being used for control. max_combined counts
4987  * how many queue pairs we can support. They may not be mapped 1 to 1 with
4988  * q_vectors since we support a lot more queue pairs than q_vectors.
4989  **/
4990 static void i40e_get_channels(struct net_device *dev,
4991 			      struct ethtool_channels *ch)
4992 {
4993 	struct i40e_netdev_priv *np = netdev_priv(dev);
4994 	struct i40e_vsi *vsi = np->vsi;
4995 	struct i40e_pf *pf = vsi->back;
4996 
4997 	/* report maximum channels */
4998 	ch->max_combined = i40e_max_channels(vsi);
4999 
5000 	/* report info for other vector */
5001 	ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
5002 	ch->max_other = ch->other_count;
5003 
5004 	/* Note: This code assumes DCB is disabled for now. */
5005 	ch->combined_count = vsi->num_queue_pairs;
5006 }
5007 
5008 /**
5009  * i40e_set_channels - Set the new channels count.
5010  * @dev: network interface device structure
5011  * @ch: ethtool channels structure
5012  *
5013  * The new channels count may not be the same as requested by the user
5014  * since it gets rounded down to a power of 2 value.
5015  **/
5016 static int i40e_set_channels(struct net_device *dev,
5017 			     struct ethtool_channels *ch)
5018 {
5019 	const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
5020 	struct i40e_netdev_priv *np = netdev_priv(dev);
5021 	unsigned int count = ch->combined_count;
5022 	struct i40e_vsi *vsi = np->vsi;
5023 	struct i40e_pf *pf = vsi->back;
5024 	struct i40e_fdir_filter *rule;
5025 	struct hlist_node *node2;
5026 	int new_count;
5027 	int err = 0;
5028 
5029 	/* We do not support setting channels for any other VSI at present */
5030 	if (vsi->type != I40E_VSI_MAIN)
5031 		return -EINVAL;
5032 
5033 	/* We do not support setting channels via ethtool when TCs are
5034 	 * configured through mqprio
5035 	 */
5036 	if (i40e_is_tc_mqprio_enabled(pf))
5037 		return -EINVAL;
5038 
5039 	/* verify they are not requesting separate vectors */
5040 	if (!count || ch->rx_count || ch->tx_count)
5041 		return -EINVAL;
5042 
5043 	/* verify other_count has not changed */
5044 	if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
5045 		return -EINVAL;
5046 
5047 	/* verify the number of channels does not exceed hardware limits */
5048 	if (count > i40e_max_channels(vsi))
5049 		return -EINVAL;
5050 
5051 	/* verify that the number of channels does not invalidate any current
5052 	 * flow director rules
5053 	 */
5054 	hlist_for_each_entry_safe(rule, node2,
5055 				  &pf->fdir_filter_list, fdir_node) {
5056 		if (rule->dest_ctl != drop && count <= rule->q_index) {
5057 			dev_warn(&pf->pdev->dev,
5058 				 "Existing user defined filter %d assigns flow to queue %d\n",
5059 				 rule->fd_id, rule->q_index);
5060 			err = -EINVAL;
5061 		}
5062 	}
5063 
5064 	if (err) {
5065 		dev_err(&pf->pdev->dev,
5066 			"Existing filter rules must be deleted to reduce combined channel count to %d\n",
5067 			count);
5068 		return err;
5069 	}
5070 
5071 	/* update feature limits from largest to smallest supported values */
5072 	/* TODO: Flow director limit, DCB etc */
5073 
5074 	/* use rss_reconfig to rebuild with new queue count and update traffic
5075 	 * class queue mapping
5076 	 */
5077 	new_count = i40e_reconfig_rss_queues(pf, count);
5078 	if (new_count > 0)
5079 		return 0;
5080 	else
5081 		return -EINVAL;
5082 }
5083 
5084 /**
5085  * i40e_get_rxfh_key_size - get the RSS hash key size
5086  * @netdev: network interface device structure
5087  *
5088  * Returns the table size.
5089  **/
5090 static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
5091 {
5092 	return I40E_HKEY_ARRAY_SIZE;
5093 }
5094 
5095 /**
5096  * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
5097  * @netdev: network interface device structure
5098  *
5099  * Returns the table size.
5100  **/
5101 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
5102 {
5103 	return I40E_HLUT_ARRAY_SIZE;
5104 }
5105 
5106 /**
5107  * i40e_get_rxfh - get the rx flow hash indirection table
5108  * @netdev: network interface device structure
5109  * @indir: indirection table
5110  * @key: hash key
5111  * @hfunc: hash function
5112  *
5113  * Reads the indirection table directly from the hardware. Returns 0 on
5114  * success.
5115  **/
5116 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
5117 			 u8 *hfunc)
5118 {
5119 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5120 	struct i40e_vsi *vsi = np->vsi;
5121 	u8 *lut, *seed = NULL;
5122 	int ret;
5123 	u16 i;
5124 
5125 	if (hfunc)
5126 		*hfunc = ETH_RSS_HASH_TOP;
5127 
5128 	if (!indir)
5129 		return 0;
5130 
5131 	seed = key;
5132 	lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5133 	if (!lut)
5134 		return -ENOMEM;
5135 	ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
5136 	if (ret)
5137 		goto out;
5138 	for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5139 		indir[i] = (u32)(lut[i]);
5140 
5141 out:
5142 	kfree(lut);
5143 
5144 	return ret;
5145 }
5146 
5147 /**
5148  * i40e_set_rxfh - set the rx flow hash indirection table
5149  * @netdev: network interface device structure
5150  * @indir: indirection table
5151  * @key: hash key
5152  * @hfunc: hash function to use
5153  *
5154  * Returns -EINVAL if the table specifies an invalid queue id, otherwise
5155  * returns 0 after programming the table.
5156  **/
5157 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
5158 			 const u8 *key, const u8 hfunc)
5159 {
5160 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5161 	struct i40e_vsi *vsi = np->vsi;
5162 	struct i40e_pf *pf = vsi->back;
5163 	u8 *seed = NULL;
5164 	u16 i;
5165 
5166 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
5167 		return -EOPNOTSUPP;
5168 
5169 	if (key) {
5170 		if (!vsi->rss_hkey_user) {
5171 			vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
5172 						     GFP_KERNEL);
5173 			if (!vsi->rss_hkey_user)
5174 				return -ENOMEM;
5175 		}
5176 		memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
5177 		seed = vsi->rss_hkey_user;
5178 	}
5179 	if (!vsi->rss_lut_user) {
5180 		vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5181 		if (!vsi->rss_lut_user)
5182 			return -ENOMEM;
5183 	}
5184 
5185 	/* Each 32 bits pointed by 'indir' is stored with a lut entry */
5186 	if (indir)
5187 		for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5188 			vsi->rss_lut_user[i] = (u8)(indir[i]);
5189 	else
5190 		i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
5191 				  vsi->rss_size);
5192 
5193 	return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
5194 			       I40E_HLUT_ARRAY_SIZE);
5195 }
5196 
5197 /**
5198  * i40e_get_priv_flags - report device private flags
5199  * @dev: network interface device structure
5200  *
5201  * The get string set count and the string set should be matched for each
5202  * flag returned.  Add new strings for each flag to the i40e_gstrings_priv_flags
5203  * array.
5204  *
5205  * Returns a u32 bitmap of flags.
5206  **/
5207 static u32 i40e_get_priv_flags(struct net_device *dev)
5208 {
5209 	struct i40e_netdev_priv *np = netdev_priv(dev);
5210 	struct i40e_vsi *vsi = np->vsi;
5211 	struct i40e_pf *pf = vsi->back;
5212 	u32 i, j, ret_flags = 0;
5213 
5214 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5215 		const struct i40e_priv_flags *priv_flags;
5216 
5217 		priv_flags = &i40e_gstrings_priv_flags[i];
5218 
5219 		if (priv_flags->flag & pf->flags)
5220 			ret_flags |= BIT(i);
5221 	}
5222 
5223 	if (pf->hw.pf_id != 0)
5224 		return ret_flags;
5225 
5226 	for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5227 		const struct i40e_priv_flags *priv_flags;
5228 
5229 		priv_flags = &i40e_gl_gstrings_priv_flags[j];
5230 
5231 		if (priv_flags->flag & pf->flags)
5232 			ret_flags |= BIT(i + j);
5233 	}
5234 
5235 	return ret_flags;
5236 }
5237 
5238 /**
5239  * i40e_set_priv_flags - set private flags
5240  * @dev: network interface device structure
5241  * @flags: bit flags to be set
5242  **/
5243 static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
5244 {
5245 	struct i40e_netdev_priv *np = netdev_priv(dev);
5246 	u64 orig_flags, new_flags, changed_flags;
5247 	enum i40e_admin_queue_err adq_err;
5248 	struct i40e_vsi *vsi = np->vsi;
5249 	struct i40e_pf *pf = vsi->back;
5250 	u32 reset_needed = 0;
5251 	int status;
5252 	u32 i, j;
5253 
5254 	orig_flags = READ_ONCE(pf->flags);
5255 	new_flags = orig_flags;
5256 
5257 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5258 		const struct i40e_priv_flags *priv_flags;
5259 
5260 		priv_flags = &i40e_gstrings_priv_flags[i];
5261 
5262 		if (flags & BIT(i))
5263 			new_flags |= priv_flags->flag;
5264 		else
5265 			new_flags &= ~(priv_flags->flag);
5266 
5267 		/* If this is a read-only flag, it can't be changed */
5268 		if (priv_flags->read_only &&
5269 		    ((orig_flags ^ new_flags) & ~BIT(i)))
5270 			return -EOPNOTSUPP;
5271 	}
5272 
5273 	if (pf->hw.pf_id != 0)
5274 		goto flags_complete;
5275 
5276 	for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5277 		const struct i40e_priv_flags *priv_flags;
5278 
5279 		priv_flags = &i40e_gl_gstrings_priv_flags[j];
5280 
5281 		if (flags & BIT(i + j))
5282 			new_flags |= priv_flags->flag;
5283 		else
5284 			new_flags &= ~(priv_flags->flag);
5285 
5286 		/* If this is a read-only flag, it can't be changed */
5287 		if (priv_flags->read_only &&
5288 		    ((orig_flags ^ new_flags) & ~BIT(i)))
5289 			return -EOPNOTSUPP;
5290 	}
5291 
5292 flags_complete:
5293 	changed_flags = orig_flags ^ new_flags;
5294 
5295 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
5296 		reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
5297 	if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
5298 	    I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
5299 		reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
5300 
5301 	/* Before we finalize any flag changes, we need to perform some
5302 	 * checks to ensure that the changes are supported and safe.
5303 	 */
5304 
5305 	/* ATR eviction is not supported on all devices */
5306 	if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
5307 	    !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
5308 		return -EOPNOTSUPP;
5309 
5310 	/* If the driver detected FW LLDP was disabled on init, this flag could
5311 	 * be set, however we do not support _changing_ the flag:
5312 	 * - on XL710 if NPAR is enabled or FW API version < 1.7
5313 	 * - on X722 with FW API version < 1.6
5314 	 * There are situations where older FW versions/NPAR enabled PFs could
5315 	 * disable LLDP, however we _must_ not allow the user to enable/disable
5316 	 * LLDP with this flag on unsupported FW versions.
5317 	 */
5318 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5319 		if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) {
5320 			dev_warn(&pf->pdev->dev,
5321 				 "Device does not support changing FW LLDP\n");
5322 			return -EOPNOTSUPP;
5323 		}
5324 	}
5325 
5326 	if (changed_flags & I40E_FLAG_RS_FEC &&
5327 	    pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5328 	    pf->hw.device_id != I40E_DEV_ID_25G_B) {
5329 		dev_warn(&pf->pdev->dev,
5330 			 "Device does not support changing FEC configuration\n");
5331 		return -EOPNOTSUPP;
5332 	}
5333 
5334 	if (changed_flags & I40E_FLAG_BASE_R_FEC &&
5335 	    pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5336 	    pf->hw.device_id != I40E_DEV_ID_25G_B &&
5337 	    pf->hw.device_id != I40E_DEV_ID_KX_X722) {
5338 		dev_warn(&pf->pdev->dev,
5339 			 "Device does not support changing FEC configuration\n");
5340 		return -EOPNOTSUPP;
5341 	}
5342 
5343 	/* Process any additional changes needed as a result of flag changes.
5344 	 * The changed_flags value reflects the list of bits that were
5345 	 * changed in the code above.
5346 	 */
5347 
5348 	/* Flush current ATR settings if ATR was disabled */
5349 	if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5350 	    !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5351 		set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
5352 		set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
5353 	}
5354 
5355 	if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
5356 		u16 sw_flags = 0, valid_flags = 0;
5357 		int ret;
5358 
5359 		if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
5360 			sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5361 		valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5362 		ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5363 						0, NULL);
5364 		if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
5365 			dev_info(&pf->pdev->dev,
5366 				 "couldn't set switch config bits, err %pe aq_err %s\n",
5367 				 ERR_PTR(ret),
5368 				 i40e_aq_str(&pf->hw,
5369 					     pf->hw.aq.asq_last_status));
5370 			/* not a fatal problem, just keep going */
5371 		}
5372 	}
5373 
5374 	if ((changed_flags & I40E_FLAG_RS_FEC) ||
5375 	    (changed_flags & I40E_FLAG_BASE_R_FEC)) {
5376 		u8 fec_cfg = 0;
5377 
5378 		if (new_flags & I40E_FLAG_RS_FEC &&
5379 		    new_flags & I40E_FLAG_BASE_R_FEC) {
5380 			fec_cfg = I40E_AQ_SET_FEC_AUTO;
5381 		} else if (new_flags & I40E_FLAG_RS_FEC) {
5382 			fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
5383 				   I40E_AQ_SET_FEC_ABILITY_RS);
5384 		} else if (new_flags & I40E_FLAG_BASE_R_FEC) {
5385 			fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
5386 				   I40E_AQ_SET_FEC_ABILITY_KR);
5387 		}
5388 		if (i40e_set_fec_cfg(dev, fec_cfg))
5389 			dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
5390 	}
5391 
5392 	if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5393 	    (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) {
5394 		dev_err(&pf->pdev->dev,
5395 			"Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
5396 		return -EOPNOTSUPP;
5397 	}
5398 
5399 	if ((changed_flags & I40E_FLAG_VF_VLAN_PRUNING) &&
5400 	    pf->num_alloc_vfs) {
5401 		dev_warn(&pf->pdev->dev,
5402 			 "Changing vf-vlan-pruning flag while VF(s) are active is not supported\n");
5403 		return -EOPNOTSUPP;
5404 	}
5405 
5406 	if ((changed_flags & I40E_FLAG_LEGACY_RX) &&
5407 	    I40E_2K_TOO_SMALL_WITH_PADDING) {
5408 		dev_warn(&pf->pdev->dev,
5409 			 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
5410 		return -EOPNOTSUPP;
5411 	}
5412 
5413 	if ((changed_flags & new_flags &
5414 	     I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5415 	    (new_flags & I40E_FLAG_MFP_ENABLED))
5416 		dev_warn(&pf->pdev->dev,
5417 			 "Turning on link-down-on-close flag may affect other partitions\n");
5418 
5419 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5420 		if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5421 #ifdef CONFIG_I40E_DCB
5422 			i40e_dcb_sw_default_config(pf);
5423 #endif /* CONFIG_I40E_DCB */
5424 			i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL);
5425 			i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
5426 		} else {
5427 			status = i40e_aq_start_lldp(&pf->hw, false, NULL);
5428 			if (status) {
5429 				adq_err = pf->hw.aq.asq_last_status;
5430 				switch (adq_err) {
5431 				case I40E_AQ_RC_EEXIST:
5432 					dev_warn(&pf->pdev->dev,
5433 						 "FW LLDP agent is already running\n");
5434 					reset_needed = 0;
5435 					break;
5436 				case I40E_AQ_RC_EPERM:
5437 					dev_warn(&pf->pdev->dev,
5438 						 "Device configuration forbids SW from starting the LLDP agent.\n");
5439 					return -EINVAL;
5440 				case I40E_AQ_RC_EAGAIN:
5441 					dev_warn(&pf->pdev->dev,
5442 						 "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
5443 					return -EBUSY;
5444 				default:
5445 					dev_warn(&pf->pdev->dev,
5446 						 "Starting FW LLDP agent failed: error: %pe, %s\n",
5447 						 ERR_PTR(status),
5448 						 i40e_aq_str(&pf->hw,
5449 							     adq_err));
5450 					return -EINVAL;
5451 				}
5452 			}
5453 		}
5454 	}
5455 
5456 	/* Now that we've checked to ensure that the new flags are valid, load
5457 	 * them into place. Since we only modify flags either (a) during
5458 	 * initialization or (b) while holding the RTNL lock, we don't need
5459 	 * anything fancy here.
5460 	 */
5461 	pf->flags = new_flags;
5462 
5463 	/* Issue reset to cause things to take effect, as additional bits
5464 	 * are added we will need to create a mask of bits requiring reset
5465 	 */
5466 	if (reset_needed)
5467 		i40e_do_reset(pf, reset_needed, true);
5468 
5469 	return 0;
5470 }
5471 
5472 /**
5473  * i40e_get_module_info - get (Q)SFP+ module type info
5474  * @netdev: network interface device structure
5475  * @modinfo: module EEPROM size and layout information structure
5476  **/
5477 static int i40e_get_module_info(struct net_device *netdev,
5478 				struct ethtool_modinfo *modinfo)
5479 {
5480 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5481 	struct i40e_vsi *vsi = np->vsi;
5482 	struct i40e_pf *pf = vsi->back;
5483 	struct i40e_hw *hw = &pf->hw;
5484 	u32 sff8472_comp = 0;
5485 	u32 sff8472_swap = 0;
5486 	u32 sff8636_rev = 0;
5487 	u32 type = 0;
5488 	int status;
5489 
5490 	/* Check if firmware supports reading module EEPROM. */
5491 	if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
5492 		netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
5493 		return -EINVAL;
5494 	}
5495 
5496 	status = i40e_update_link_info(hw);
5497 	if (status)
5498 		return -EIO;
5499 
5500 	if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
5501 		netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
5502 		return -EINVAL;
5503 	}
5504 
5505 	type = hw->phy.link_info.module_type[0];
5506 
5507 	switch (type) {
5508 	case I40E_MODULE_TYPE_SFP:
5509 		status = i40e_aq_get_phy_register(hw,
5510 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5511 				I40E_I2C_EEPROM_DEV_ADDR, true,
5512 				I40E_MODULE_SFF_8472_COMP,
5513 				&sff8472_comp, NULL);
5514 		if (status)
5515 			return -EIO;
5516 
5517 		status = i40e_aq_get_phy_register(hw,
5518 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5519 				I40E_I2C_EEPROM_DEV_ADDR, true,
5520 				I40E_MODULE_SFF_8472_SWAP,
5521 				&sff8472_swap, NULL);
5522 		if (status)
5523 			return -EIO;
5524 
5525 		/* Check if the module requires address swap to access
5526 		 * the other EEPROM memory page.
5527 		 */
5528 		if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
5529 			netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
5530 			modinfo->type = ETH_MODULE_SFF_8079;
5531 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5532 		} else if (sff8472_comp == 0x00) {
5533 			/* Module is not SFF-8472 compliant */
5534 			modinfo->type = ETH_MODULE_SFF_8079;
5535 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5536 		} else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
5537 			/* Module is SFF-8472 compliant but doesn't implement
5538 			 * Digital Diagnostic Monitoring (DDM).
5539 			 */
5540 			modinfo->type = ETH_MODULE_SFF_8079;
5541 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5542 		} else {
5543 			modinfo->type = ETH_MODULE_SFF_8472;
5544 			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
5545 		}
5546 		break;
5547 	case I40E_MODULE_TYPE_QSFP_PLUS:
5548 		/* Read from memory page 0. */
5549 		status = i40e_aq_get_phy_register(hw,
5550 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5551 				0, true,
5552 				I40E_MODULE_REVISION_ADDR,
5553 				&sff8636_rev, NULL);
5554 		if (status)
5555 			return -EIO;
5556 		/* Determine revision compliance byte */
5557 		if (sff8636_rev > 0x02) {
5558 			/* Module is SFF-8636 compliant */
5559 			modinfo->type = ETH_MODULE_SFF_8636;
5560 			modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5561 		} else {
5562 			modinfo->type = ETH_MODULE_SFF_8436;
5563 			modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5564 		}
5565 		break;
5566 	case I40E_MODULE_TYPE_QSFP28:
5567 		modinfo->type = ETH_MODULE_SFF_8636;
5568 		modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5569 		break;
5570 	default:
5571 		netdev_err(vsi->netdev, "Module type unrecognized\n");
5572 		return -EINVAL;
5573 	}
5574 	return 0;
5575 }
5576 
5577 /**
5578  * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
5579  * @netdev: network interface device structure
5580  * @ee: EEPROM dump request structure
5581  * @data: buffer to be filled with EEPROM contents
5582  **/
5583 static int i40e_get_module_eeprom(struct net_device *netdev,
5584 				  struct ethtool_eeprom *ee,
5585 				  u8 *data)
5586 {
5587 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5588 	struct i40e_vsi *vsi = np->vsi;
5589 	struct i40e_pf *pf = vsi->back;
5590 	struct i40e_hw *hw = &pf->hw;
5591 	bool is_sfp = false;
5592 	u32 value = 0;
5593 	int status;
5594 	int i;
5595 
5596 	if (!ee || !ee->len || !data)
5597 		return -EINVAL;
5598 
5599 	if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
5600 		is_sfp = true;
5601 
5602 	for (i = 0; i < ee->len; i++) {
5603 		u32 offset = i + ee->offset;
5604 		u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
5605 
5606 		/* Check if we need to access the other memory page */
5607 		if (is_sfp) {
5608 			if (offset >= ETH_MODULE_SFF_8079_LEN) {
5609 				offset -= ETH_MODULE_SFF_8079_LEN;
5610 				addr = I40E_I2C_EEPROM_DEV_ADDR2;
5611 			}
5612 		} else {
5613 			while (offset >= ETH_MODULE_SFF_8436_LEN) {
5614 				/* Compute memory page number and offset. */
5615 				offset -= ETH_MODULE_SFF_8436_LEN / 2;
5616 				addr++;
5617 			}
5618 		}
5619 
5620 		status = i40e_aq_get_phy_register(hw,
5621 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5622 				addr, true, offset, &value, NULL);
5623 		if (status)
5624 			return -EIO;
5625 		data[i] = value;
5626 	}
5627 	return 0;
5628 }
5629 
5630 static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
5631 {
5632 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5633 	struct i40e_aq_get_phy_abilities_resp phy_cfg;
5634 	struct i40e_vsi *vsi = np->vsi;
5635 	struct i40e_pf *pf = vsi->back;
5636 	struct i40e_hw *hw = &pf->hw;
5637 	int status = 0;
5638 
5639 	/* Get initial PHY capabilities */
5640 	status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL);
5641 	if (status)
5642 		return -EAGAIN;
5643 
5644 	/* Check whether NIC configuration is compatible with Energy Efficient
5645 	 * Ethernet (EEE) mode.
5646 	 */
5647 	if (phy_cfg.eee_capability == 0)
5648 		return -EOPNOTSUPP;
5649 
5650 	edata->supported = SUPPORTED_Autoneg;
5651 	edata->lp_advertised = edata->supported;
5652 
5653 	/* Get current configuration */
5654 	status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL);
5655 	if (status)
5656 		return -EAGAIN;
5657 
5658 	edata->advertised = phy_cfg.eee_capability ? SUPPORTED_Autoneg : 0U;
5659 	edata->eee_enabled = !!edata->advertised;
5660 	edata->tx_lpi_enabled = pf->stats.tx_lpi_status;
5661 
5662 	edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status;
5663 
5664 	return 0;
5665 }
5666 
5667 static int i40e_is_eee_param_supported(struct net_device *netdev,
5668 				       struct ethtool_eee *edata)
5669 {
5670 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5671 	struct i40e_vsi *vsi = np->vsi;
5672 	struct i40e_pf *pf = vsi->back;
5673 	struct i40e_ethtool_not_used {
5674 		u32 value;
5675 		const char *name;
5676 	} param[] = {
5677 		{edata->advertised & ~SUPPORTED_Autoneg, "advertise"},
5678 		{edata->tx_lpi_timer, "tx-timer"},
5679 		{edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"}
5680 	};
5681 	int i;
5682 
5683 	for (i = 0; i < ARRAY_SIZE(param); i++) {
5684 		if (param[i].value) {
5685 			netdev_info(netdev,
5686 				    "EEE setting %s not supported\n",
5687 				    param[i].name);
5688 			return -EOPNOTSUPP;
5689 		}
5690 	}
5691 
5692 	return 0;
5693 }
5694 
5695 static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
5696 {
5697 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5698 	struct i40e_aq_get_phy_abilities_resp abilities;
5699 	struct i40e_aq_set_phy_config config;
5700 	struct i40e_vsi *vsi = np->vsi;
5701 	struct i40e_pf *pf = vsi->back;
5702 	struct i40e_hw *hw = &pf->hw;
5703 	__le16 eee_capability;
5704 	int status = 0;
5705 
5706 	/* Deny parameters we don't support */
5707 	if (i40e_is_eee_param_supported(netdev, edata))
5708 		return -EOPNOTSUPP;
5709 
5710 	/* Get initial PHY capabilities */
5711 	status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
5712 					      NULL);
5713 	if (status)
5714 		return -EAGAIN;
5715 
5716 	/* Check whether NIC configuration is compatible with Energy Efficient
5717 	 * Ethernet (EEE) mode.
5718 	 */
5719 	if (abilities.eee_capability == 0)
5720 		return -EOPNOTSUPP;
5721 
5722 	/* Cache initial EEE capability */
5723 	eee_capability = abilities.eee_capability;
5724 
5725 	/* Get current PHY configuration */
5726 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
5727 					      NULL);
5728 	if (status)
5729 		return -EAGAIN;
5730 
5731 	/* Cache current PHY configuration */
5732 	config.phy_type = abilities.phy_type;
5733 	config.phy_type_ext = abilities.phy_type_ext;
5734 	config.link_speed = abilities.link_speed;
5735 	config.abilities = abilities.abilities |
5736 			   I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
5737 	config.eeer = abilities.eeer_val;
5738 	config.low_power_ctrl = abilities.d3_lpan;
5739 	config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
5740 			    I40E_AQ_PHY_FEC_CONFIG_MASK;
5741 
5742 	/* Set desired EEE state */
5743 	if (edata->eee_enabled) {
5744 		config.eee_capability = eee_capability;
5745 		config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5746 	} else {
5747 		config.eee_capability = 0;
5748 		config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5749 	}
5750 
5751 	/* Apply modified PHY configuration */
5752 	status = i40e_aq_set_phy_config(hw, &config, NULL);
5753 	if (status)
5754 		return -EAGAIN;
5755 
5756 	return 0;
5757 }
5758 
5759 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
5760 	.get_drvinfo		= i40e_get_drvinfo,
5761 	.set_eeprom		= i40e_set_eeprom,
5762 	.get_eeprom_len		= i40e_get_eeprom_len,
5763 	.get_eeprom		= i40e_get_eeprom,
5764 };
5765 
5766 static const struct ethtool_ops i40e_ethtool_ops = {
5767 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5768 				     ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
5769 				     ETHTOOL_COALESCE_USE_ADAPTIVE |
5770 				     ETHTOOL_COALESCE_RX_USECS_HIGH |
5771 				     ETHTOOL_COALESCE_TX_USECS_HIGH,
5772 	.get_drvinfo		= i40e_get_drvinfo,
5773 	.get_regs_len		= i40e_get_regs_len,
5774 	.get_regs		= i40e_get_regs,
5775 	.nway_reset		= i40e_nway_reset,
5776 	.get_link		= ethtool_op_get_link,
5777 	.get_wol		= i40e_get_wol,
5778 	.set_wol		= i40e_set_wol,
5779 	.set_eeprom		= i40e_set_eeprom,
5780 	.get_eeprom_len		= i40e_get_eeprom_len,
5781 	.get_eeprom		= i40e_get_eeprom,
5782 	.get_ringparam		= i40e_get_ringparam,
5783 	.set_ringparam		= i40e_set_ringparam,
5784 	.get_pauseparam		= i40e_get_pauseparam,
5785 	.set_pauseparam		= i40e_set_pauseparam,
5786 	.get_msglevel		= i40e_get_msglevel,
5787 	.set_msglevel		= i40e_set_msglevel,
5788 	.get_rxnfc		= i40e_get_rxnfc,
5789 	.set_rxnfc		= i40e_set_rxnfc,
5790 	.self_test		= i40e_diag_test,
5791 	.get_strings		= i40e_get_strings,
5792 	.get_eee		= i40e_get_eee,
5793 	.set_eee		= i40e_set_eee,
5794 	.set_phys_id		= i40e_set_phys_id,
5795 	.get_sset_count		= i40e_get_sset_count,
5796 	.get_ethtool_stats	= i40e_get_ethtool_stats,
5797 	.get_coalesce		= i40e_get_coalesce,
5798 	.set_coalesce		= i40e_set_coalesce,
5799 	.get_rxfh_key_size	= i40e_get_rxfh_key_size,
5800 	.get_rxfh_indir_size	= i40e_get_rxfh_indir_size,
5801 	.get_rxfh		= i40e_get_rxfh,
5802 	.set_rxfh		= i40e_set_rxfh,
5803 	.get_channels		= i40e_get_channels,
5804 	.set_channels		= i40e_set_channels,
5805 	.get_module_info	= i40e_get_module_info,
5806 	.get_module_eeprom	= i40e_get_module_eeprom,
5807 	.get_ts_info		= i40e_get_ts_info,
5808 	.get_priv_flags		= i40e_get_priv_flags,
5809 	.set_priv_flags		= i40e_set_priv_flags,
5810 	.get_per_queue_coalesce	= i40e_get_per_queue_coalesce,
5811 	.set_per_queue_coalesce	= i40e_set_per_queue_coalesce,
5812 	.get_link_ksettings	= i40e_get_link_ksettings,
5813 	.set_link_ksettings	= i40e_set_link_ksettings,
5814 	.get_fecparam = i40e_get_fec_param,
5815 	.set_fecparam = i40e_set_fec_param,
5816 	.flash_device = i40e_ddp_flash,
5817 };
5818 
5819 void i40e_set_ethtool_ops(struct net_device *netdev)
5820 {
5821 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5822 	struct i40e_pf		*pf = np->vsi->back;
5823 
5824 	if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
5825 		netdev->ethtool_ops = &i40e_ethtool_ops;
5826 	else
5827 		netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
5828 }
5829