1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 130 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 131 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 132 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 135 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 136 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 137 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 138 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 139 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 142 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 143 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 144 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 145 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 146 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 148 I40E_PF_STAT("arq_overflows", arq_overflows), 149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 150 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 157 158 /* LPI stats */ 159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 163 }; 164 165 #define I40E_QUEUE_STATS_LEN(n) \ 166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 167 * 2 /* Tx and Rx together */ \ 168 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 173 I40E_MISC_STATS_LEN + \ 174 I40E_QUEUE_STATS_LEN((n))) 175 #define I40E_PFC_STATS_LEN ( \ 176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 181 / sizeof(u64)) 182 #define I40E_VEB_TC_STATS_LEN ( \ 183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 187 / sizeof(u64)) 188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 191 I40E_PFC_STATS_LEN + \ 192 I40E_VSI_STATS_LEN((n))) 193 194 enum i40e_ethtool_test_id { 195 I40E_ETH_TEST_REG = 0, 196 I40E_ETH_TEST_EEPROM, 197 I40E_ETH_TEST_INTR, 198 I40E_ETH_TEST_LINK, 199 }; 200 201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 202 "Register test (offline)", 203 "Eeprom test (offline)", 204 "Interrupt test (offline)", 205 "Link test (on/offline)" 206 }; 207 208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 209 210 struct i40e_priv_flags { 211 char flag_string[ETH_GSTRING_LEN]; 212 u64 flag; 213 bool read_only; 214 }; 215 216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 217 .flag_string = _name, \ 218 .flag = _flag, \ 219 .read_only = _read_only, \ 220 } 221 222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 223 /* NOTE: MFP setting cannot be changed */ 224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 230 I40E_PRIV_FLAG("disable-source-pruning", 231 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 232 }; 233 234 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 235 236 /* Private flags with a global effect, restricted to PF 0 */ 237 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 238 I40E_PRIV_FLAG("vf-true-promisc-support", 239 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 240 }; 241 242 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 243 244 /** 245 * i40e_partition_setting_complaint - generic complaint for MFP restriction 246 * @pf: the PF struct 247 **/ 248 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 249 { 250 dev_info(&pf->pdev->dev, 251 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 252 } 253 254 /** 255 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 256 * @pf: PF struct with phy_types 257 * @ks: ethtool link ksettings struct to fill out 258 * 259 **/ 260 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 261 struct ethtool_link_ksettings *ks) 262 { 263 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 264 u64 phy_types = pf->hw.phy.phy_types; 265 266 ethtool_link_ksettings_zero_link_mode(ks, supported); 267 ethtool_link_ksettings_zero_link_mode(ks, advertising); 268 269 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 270 ethtool_link_ksettings_add_link_mode(ks, supported, 271 1000baseT_Full); 272 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 273 ethtool_link_ksettings_add_link_mode(ks, advertising, 274 1000baseT_Full); 275 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 276 ethtool_link_ksettings_add_link_mode(ks, supported, 277 100baseT_Full); 278 ethtool_link_ksettings_add_link_mode(ks, advertising, 279 100baseT_Full); 280 } 281 } 282 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 283 phy_types & I40E_CAP_PHY_TYPE_XFI || 284 phy_types & I40E_CAP_PHY_TYPE_SFI || 285 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 287 ethtool_link_ksettings_add_link_mode(ks, supported, 288 10000baseT_Full); 289 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 290 ethtool_link_ksettings_add_link_mode(ks, advertising, 291 10000baseT_Full); 292 } 293 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 294 ethtool_link_ksettings_add_link_mode(ks, supported, 295 10000baseT_Full); 296 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 297 ethtool_link_ksettings_add_link_mode(ks, advertising, 298 10000baseT_Full); 299 } 300 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 301 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 302 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 303 ethtool_link_ksettings_add_link_mode(ks, supported, 304 40000baseCR4_Full); 305 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 306 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 307 ethtool_link_ksettings_add_link_mode(ks, supported, 308 40000baseCR4_Full); 309 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 310 ethtool_link_ksettings_add_link_mode(ks, advertising, 311 40000baseCR4_Full); 312 } 313 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 314 ethtool_link_ksettings_add_link_mode(ks, supported, 315 100baseT_Full); 316 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 317 ethtool_link_ksettings_add_link_mode(ks, advertising, 318 100baseT_Full); 319 } 320 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 321 ethtool_link_ksettings_add_link_mode(ks, supported, 322 1000baseT_Full); 323 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 324 ethtool_link_ksettings_add_link_mode(ks, advertising, 325 1000baseT_Full); 326 } 327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 328 ethtool_link_ksettings_add_link_mode(ks, supported, 329 40000baseSR4_Full); 330 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 331 ethtool_link_ksettings_add_link_mode(ks, supported, 332 40000baseLR4_Full); 333 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 334 ethtool_link_ksettings_add_link_mode(ks, supported, 335 40000baseLR4_Full); 336 ethtool_link_ksettings_add_link_mode(ks, advertising, 337 40000baseLR4_Full); 338 } 339 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 340 ethtool_link_ksettings_add_link_mode(ks, supported, 341 20000baseKR2_Full); 342 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 343 ethtool_link_ksettings_add_link_mode(ks, advertising, 344 20000baseKR2_Full); 345 } 346 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 347 ethtool_link_ksettings_add_link_mode(ks, supported, 348 10000baseKX4_Full); 349 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 350 ethtool_link_ksettings_add_link_mode(ks, advertising, 351 10000baseKX4_Full); 352 } 353 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 354 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 355 ethtool_link_ksettings_add_link_mode(ks, supported, 356 10000baseKR_Full); 357 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 358 ethtool_link_ksettings_add_link_mode(ks, advertising, 359 10000baseKR_Full); 360 } 361 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 362 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 363 ethtool_link_ksettings_add_link_mode(ks, supported, 364 1000baseKX_Full); 365 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 366 ethtool_link_ksettings_add_link_mode(ks, advertising, 367 1000baseKX_Full); 368 } 369 /* need to add 25G PHY types */ 370 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 371 ethtool_link_ksettings_add_link_mode(ks, supported, 372 25000baseKR_Full); 373 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 374 ethtool_link_ksettings_add_link_mode(ks, advertising, 375 25000baseKR_Full); 376 } 377 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 378 ethtool_link_ksettings_add_link_mode(ks, supported, 379 25000baseCR_Full); 380 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 381 ethtool_link_ksettings_add_link_mode(ks, advertising, 382 25000baseCR_Full); 383 } 384 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 385 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 386 ethtool_link_ksettings_add_link_mode(ks, supported, 387 25000baseSR_Full); 388 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 389 ethtool_link_ksettings_add_link_mode(ks, advertising, 390 25000baseSR_Full); 391 } 392 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 393 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 394 ethtool_link_ksettings_add_link_mode(ks, supported, 395 25000baseCR_Full); 396 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 397 ethtool_link_ksettings_add_link_mode(ks, advertising, 398 25000baseCR_Full); 399 } 400 /* need to add new 10G PHY types */ 401 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 402 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 403 ethtool_link_ksettings_add_link_mode(ks, supported, 404 10000baseCR_Full); 405 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 406 ethtool_link_ksettings_add_link_mode(ks, advertising, 407 10000baseCR_Full); 408 } 409 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 410 ethtool_link_ksettings_add_link_mode(ks, supported, 411 10000baseSR_Full); 412 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 413 ethtool_link_ksettings_add_link_mode(ks, advertising, 414 10000baseSR_Full); 415 } 416 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 417 ethtool_link_ksettings_add_link_mode(ks, supported, 418 10000baseLR_Full); 419 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 420 ethtool_link_ksettings_add_link_mode(ks, advertising, 421 10000baseLR_Full); 422 } 423 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 424 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 425 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 426 ethtool_link_ksettings_add_link_mode(ks, supported, 427 1000baseX_Full); 428 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 429 ethtool_link_ksettings_add_link_mode(ks, advertising, 430 1000baseX_Full); 431 } 432 /* Autoneg PHY types */ 433 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 434 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 435 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 436 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 437 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 438 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 439 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 440 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 441 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 442 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 443 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 444 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 445 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 446 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 447 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 448 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 449 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 450 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 451 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 452 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 453 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 454 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 455 ethtool_link_ksettings_add_link_mode(ks, supported, 456 Autoneg); 457 ethtool_link_ksettings_add_link_mode(ks, advertising, 458 Autoneg); 459 } 460 } 461 462 /** 463 * i40e_get_settings_link_up - Get the Link settings for when link is up 464 * @hw: hw structure 465 * @ks: ethtool ksettings to fill in 466 * @netdev: network interface device structure 467 * @pf: pointer to physical function struct 468 **/ 469 static void i40e_get_settings_link_up(struct i40e_hw *hw, 470 struct ethtool_link_ksettings *ks, 471 struct net_device *netdev, 472 struct i40e_pf *pf) 473 { 474 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 475 struct ethtool_link_ksettings cap_ksettings; 476 u32 link_speed = hw_link_info->link_speed; 477 478 /* Initialize supported and advertised settings based on phy settings */ 479 switch (hw_link_info->phy_type) { 480 case I40E_PHY_TYPE_40GBASE_CR4: 481 case I40E_PHY_TYPE_40GBASE_CR4_CU: 482 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 483 ethtool_link_ksettings_add_link_mode(ks, supported, 484 40000baseCR4_Full); 485 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 486 ethtool_link_ksettings_add_link_mode(ks, advertising, 487 40000baseCR4_Full); 488 break; 489 case I40E_PHY_TYPE_XLAUI: 490 case I40E_PHY_TYPE_XLPPI: 491 case I40E_PHY_TYPE_40GBASE_AOC: 492 ethtool_link_ksettings_add_link_mode(ks, supported, 493 40000baseCR4_Full); 494 break; 495 case I40E_PHY_TYPE_40GBASE_SR4: 496 ethtool_link_ksettings_add_link_mode(ks, supported, 497 40000baseSR4_Full); 498 break; 499 case I40E_PHY_TYPE_40GBASE_LR4: 500 ethtool_link_ksettings_add_link_mode(ks, supported, 501 40000baseLR4_Full); 502 break; 503 case I40E_PHY_TYPE_25GBASE_SR: 504 case I40E_PHY_TYPE_25GBASE_LR: 505 case I40E_PHY_TYPE_10GBASE_SR: 506 case I40E_PHY_TYPE_10GBASE_LR: 507 case I40E_PHY_TYPE_1000BASE_SX: 508 case I40E_PHY_TYPE_1000BASE_LX: 509 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 510 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 511 ethtool_link_ksettings_add_link_mode(ks, supported, 512 25000baseSR_Full); 513 ethtool_link_ksettings_add_link_mode(ks, advertising, 514 25000baseSR_Full); 515 ethtool_link_ksettings_add_link_mode(ks, supported, 516 10000baseSR_Full); 517 ethtool_link_ksettings_add_link_mode(ks, advertising, 518 10000baseSR_Full); 519 ethtool_link_ksettings_add_link_mode(ks, supported, 520 10000baseLR_Full); 521 ethtool_link_ksettings_add_link_mode(ks, advertising, 522 10000baseLR_Full); 523 ethtool_link_ksettings_add_link_mode(ks, supported, 524 1000baseX_Full); 525 ethtool_link_ksettings_add_link_mode(ks, advertising, 526 1000baseX_Full); 527 ethtool_link_ksettings_add_link_mode(ks, supported, 528 10000baseT_Full); 529 if (hw_link_info->module_type[2] & 530 I40E_MODULE_TYPE_1000BASE_SX || 531 hw_link_info->module_type[2] & 532 I40E_MODULE_TYPE_1000BASE_LX) { 533 ethtool_link_ksettings_add_link_mode(ks, supported, 534 1000baseT_Full); 535 if (hw_link_info->requested_speeds & 536 I40E_LINK_SPEED_1GB) 537 ethtool_link_ksettings_add_link_mode( 538 ks, advertising, 1000baseT_Full); 539 } 540 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 541 ethtool_link_ksettings_add_link_mode(ks, advertising, 542 10000baseT_Full); 543 break; 544 case I40E_PHY_TYPE_10GBASE_T: 545 case I40E_PHY_TYPE_1000BASE_T: 546 case I40E_PHY_TYPE_100BASE_TX: 547 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 548 ethtool_link_ksettings_add_link_mode(ks, supported, 549 10000baseT_Full); 550 ethtool_link_ksettings_add_link_mode(ks, supported, 551 1000baseT_Full); 552 ethtool_link_ksettings_add_link_mode(ks, supported, 553 100baseT_Full); 554 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 555 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 556 ethtool_link_ksettings_add_link_mode(ks, advertising, 557 10000baseT_Full); 558 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 559 ethtool_link_ksettings_add_link_mode(ks, advertising, 560 1000baseT_Full); 561 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 562 ethtool_link_ksettings_add_link_mode(ks, advertising, 563 100baseT_Full); 564 break; 565 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 566 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 567 ethtool_link_ksettings_add_link_mode(ks, supported, 568 1000baseT_Full); 569 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 570 ethtool_link_ksettings_add_link_mode(ks, advertising, 571 1000baseT_Full); 572 break; 573 case I40E_PHY_TYPE_10GBASE_CR1_CU: 574 case I40E_PHY_TYPE_10GBASE_CR1: 575 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 576 ethtool_link_ksettings_add_link_mode(ks, supported, 577 10000baseT_Full); 578 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 579 ethtool_link_ksettings_add_link_mode(ks, advertising, 580 10000baseT_Full); 581 break; 582 case I40E_PHY_TYPE_XAUI: 583 case I40E_PHY_TYPE_XFI: 584 case I40E_PHY_TYPE_SFI: 585 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 586 case I40E_PHY_TYPE_10GBASE_AOC: 587 ethtool_link_ksettings_add_link_mode(ks, supported, 588 10000baseT_Full); 589 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 590 ethtool_link_ksettings_add_link_mode(ks, advertising, 591 10000baseT_Full); 592 break; 593 case I40E_PHY_TYPE_SGMII: 594 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 595 ethtool_link_ksettings_add_link_mode(ks, supported, 596 1000baseT_Full); 597 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 598 ethtool_link_ksettings_add_link_mode(ks, advertising, 599 1000baseT_Full); 600 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 601 ethtool_link_ksettings_add_link_mode(ks, supported, 602 100baseT_Full); 603 if (hw_link_info->requested_speeds & 604 I40E_LINK_SPEED_100MB) 605 ethtool_link_ksettings_add_link_mode( 606 ks, advertising, 100baseT_Full); 607 } 608 break; 609 case I40E_PHY_TYPE_40GBASE_KR4: 610 case I40E_PHY_TYPE_25GBASE_KR: 611 case I40E_PHY_TYPE_20GBASE_KR2: 612 case I40E_PHY_TYPE_10GBASE_KR: 613 case I40E_PHY_TYPE_10GBASE_KX4: 614 case I40E_PHY_TYPE_1000BASE_KX: 615 ethtool_link_ksettings_add_link_mode(ks, supported, 616 40000baseKR4_Full); 617 ethtool_link_ksettings_add_link_mode(ks, supported, 618 25000baseKR_Full); 619 ethtool_link_ksettings_add_link_mode(ks, supported, 620 20000baseKR2_Full); 621 ethtool_link_ksettings_add_link_mode(ks, supported, 622 10000baseKR_Full); 623 ethtool_link_ksettings_add_link_mode(ks, supported, 624 10000baseKX4_Full); 625 ethtool_link_ksettings_add_link_mode(ks, supported, 626 1000baseKX_Full); 627 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 628 ethtool_link_ksettings_add_link_mode(ks, advertising, 629 40000baseKR4_Full); 630 ethtool_link_ksettings_add_link_mode(ks, advertising, 631 25000baseKR_Full); 632 ethtool_link_ksettings_add_link_mode(ks, advertising, 633 20000baseKR2_Full); 634 ethtool_link_ksettings_add_link_mode(ks, advertising, 635 10000baseKR_Full); 636 ethtool_link_ksettings_add_link_mode(ks, advertising, 637 10000baseKX4_Full); 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 1000baseKX_Full); 640 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 641 break; 642 case I40E_PHY_TYPE_25GBASE_CR: 643 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 644 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 645 ethtool_link_ksettings_add_link_mode(ks, supported, 646 25000baseCR_Full); 647 ethtool_link_ksettings_add_link_mode(ks, advertising, 648 25000baseCR_Full); 649 break; 650 case I40E_PHY_TYPE_25GBASE_AOC: 651 case I40E_PHY_TYPE_25GBASE_ACC: 652 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 653 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 654 ethtool_link_ksettings_add_link_mode(ks, supported, 655 25000baseCR_Full); 656 657 ethtool_link_ksettings_add_link_mode(ks, advertising, 658 25000baseCR_Full); 659 ethtool_link_ksettings_add_link_mode(ks, supported, 660 10000baseCR_Full); 661 ethtool_link_ksettings_add_link_mode(ks, advertising, 662 10000baseCR_Full); 663 break; 664 default: 665 /* if we got here and link is up something bad is afoot */ 666 netdev_info(netdev, 667 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 668 hw_link_info->phy_type); 669 } 670 671 /* Now that we've worked out everything that could be supported by the 672 * current PHY type, get what is supported by the NVM and intersect 673 * them to get what is truly supported 674 */ 675 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 676 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 677 ethtool_intersect_link_masks(ks, &cap_ksettings); 678 679 /* Set speed and duplex */ 680 switch (link_speed) { 681 case I40E_LINK_SPEED_40GB: 682 ks->base.speed = SPEED_40000; 683 break; 684 case I40E_LINK_SPEED_25GB: 685 ks->base.speed = SPEED_25000; 686 break; 687 case I40E_LINK_SPEED_20GB: 688 ks->base.speed = SPEED_20000; 689 break; 690 case I40E_LINK_SPEED_10GB: 691 ks->base.speed = SPEED_10000; 692 break; 693 case I40E_LINK_SPEED_1GB: 694 ks->base.speed = SPEED_1000; 695 break; 696 case I40E_LINK_SPEED_100MB: 697 ks->base.speed = SPEED_100; 698 break; 699 default: 700 break; 701 } 702 ks->base.duplex = DUPLEX_FULL; 703 } 704 705 /** 706 * i40e_get_settings_link_down - Get the Link settings for when link is down 707 * @hw: hw structure 708 * @ks: ethtool ksettings to fill in 709 * @pf: pointer to physical function struct 710 * 711 * Reports link settings that can be determined when link is down 712 **/ 713 static void i40e_get_settings_link_down(struct i40e_hw *hw, 714 struct ethtool_link_ksettings *ks, 715 struct i40e_pf *pf) 716 { 717 /* link is down and the driver needs to fall back on 718 * supported phy types to figure out what info to display 719 */ 720 i40e_phy_type_to_ethtool(pf, ks); 721 722 /* With no link speed and duplex are unknown */ 723 ks->base.speed = SPEED_UNKNOWN; 724 ks->base.duplex = DUPLEX_UNKNOWN; 725 } 726 727 /** 728 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 729 * @netdev: network interface device structure 730 * @ks: ethtool ksettings 731 * 732 * Reports speed/duplex settings based on media_type 733 **/ 734 static int i40e_get_link_ksettings(struct net_device *netdev, 735 struct ethtool_link_ksettings *ks) 736 { 737 struct i40e_netdev_priv *np = netdev_priv(netdev); 738 struct i40e_pf *pf = np->vsi->back; 739 struct i40e_hw *hw = &pf->hw; 740 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 741 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 742 743 ethtool_link_ksettings_zero_link_mode(ks, supported); 744 ethtool_link_ksettings_zero_link_mode(ks, advertising); 745 746 if (link_up) 747 i40e_get_settings_link_up(hw, ks, netdev, pf); 748 else 749 i40e_get_settings_link_down(hw, ks, pf); 750 751 /* Now set the settings that don't rely on link being up/down */ 752 /* Set autoneg settings */ 753 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 754 AUTONEG_ENABLE : AUTONEG_DISABLE); 755 756 /* Set media type settings */ 757 switch (hw->phy.media_type) { 758 case I40E_MEDIA_TYPE_BACKPLANE: 759 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 760 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 761 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 762 ethtool_link_ksettings_add_link_mode(ks, advertising, 763 Backplane); 764 ks->base.port = PORT_NONE; 765 break; 766 case I40E_MEDIA_TYPE_BASET: 767 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 768 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 769 ks->base.port = PORT_TP; 770 break; 771 case I40E_MEDIA_TYPE_DA: 772 case I40E_MEDIA_TYPE_CX4: 773 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 774 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 775 ks->base.port = PORT_DA; 776 break; 777 case I40E_MEDIA_TYPE_FIBER: 778 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 779 ks->base.port = PORT_FIBRE; 780 break; 781 case I40E_MEDIA_TYPE_UNKNOWN: 782 default: 783 ks->base.port = PORT_OTHER; 784 break; 785 } 786 787 /* Set flow control settings */ 788 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 789 790 switch (hw->fc.requested_mode) { 791 case I40E_FC_FULL: 792 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 793 break; 794 case I40E_FC_TX_PAUSE: 795 ethtool_link_ksettings_add_link_mode(ks, advertising, 796 Asym_Pause); 797 break; 798 case I40E_FC_RX_PAUSE: 799 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 800 ethtool_link_ksettings_add_link_mode(ks, advertising, 801 Asym_Pause); 802 break; 803 default: 804 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 805 ethtool_link_ksettings_del_link_mode(ks, advertising, 806 Asym_Pause); 807 break; 808 } 809 810 return 0; 811 } 812 813 /** 814 * i40e_set_link_ksettings - Set Speed and Duplex 815 * @netdev: network interface device structure 816 * @ks: ethtool ksettings 817 * 818 * Set speed/duplex per media_types advertised/forced 819 **/ 820 static int i40e_set_link_ksettings(struct net_device *netdev, 821 const struct ethtool_link_ksettings *ks) 822 { 823 struct i40e_netdev_priv *np = netdev_priv(netdev); 824 struct i40e_aq_get_phy_abilities_resp abilities; 825 struct ethtool_link_ksettings safe_ks; 826 struct ethtool_link_ksettings copy_ks; 827 struct i40e_aq_set_phy_config config; 828 struct i40e_pf *pf = np->vsi->back; 829 struct i40e_vsi *vsi = np->vsi; 830 struct i40e_hw *hw = &pf->hw; 831 bool autoneg_changed = false; 832 i40e_status status = 0; 833 int timeout = 50; 834 int err = 0; 835 u8 autoneg; 836 837 /* Changing port settings is not supported if this isn't the 838 * port's controlling PF 839 */ 840 if (hw->partition_id != 1) { 841 i40e_partition_setting_complaint(pf); 842 return -EOPNOTSUPP; 843 } 844 if (vsi != pf->vsi[pf->lan_vsi]) 845 return -EOPNOTSUPP; 846 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 847 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 848 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 849 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 850 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 851 return -EOPNOTSUPP; 852 if (hw->device_id == I40E_DEV_ID_KX_B || 853 hw->device_id == I40E_DEV_ID_KX_C || 854 hw->device_id == I40E_DEV_ID_20G_KR2 || 855 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 856 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 857 return -EOPNOTSUPP; 858 } 859 860 /* copy the ksettings to copy_ks to avoid modifying the origin */ 861 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 862 863 /* save autoneg out of ksettings */ 864 autoneg = copy_ks.base.autoneg; 865 866 memset(&safe_ks, 0, sizeof(safe_ks)); 867 /* Get link modes supported by hardware and check against modes 868 * requested by the user. Return an error if unsupported mode was set. 869 */ 870 i40e_phy_type_to_ethtool(pf, &safe_ks); 871 if (!bitmap_subset(copy_ks.link_modes.advertising, 872 safe_ks.link_modes.supported, 873 __ETHTOOL_LINK_MODE_MASK_NBITS)) 874 return -EINVAL; 875 876 /* get our own copy of the bits to check against */ 877 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 878 safe_ks.base.cmd = copy_ks.base.cmd; 879 safe_ks.base.link_mode_masks_nwords = 880 copy_ks.base.link_mode_masks_nwords; 881 i40e_get_link_ksettings(netdev, &safe_ks); 882 883 /* set autoneg back to what it currently is */ 884 copy_ks.base.autoneg = safe_ks.base.autoneg; 885 886 /* If copy_ks.base and safe_ks.base are not the same now, then they are 887 * trying to set something that we do not support. 888 */ 889 if (memcmp(©_ks.base, &safe_ks.base, 890 sizeof(struct ethtool_link_settings))) 891 return -EOPNOTSUPP; 892 893 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 894 timeout--; 895 if (!timeout) 896 return -EBUSY; 897 usleep_range(1000, 2000); 898 } 899 900 /* Get the current phy config */ 901 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 902 NULL); 903 if (status) { 904 err = -EAGAIN; 905 goto done; 906 } 907 908 /* Copy abilities to config in case autoneg is not 909 * set below 910 */ 911 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 912 config.abilities = abilities.abilities; 913 914 /* Check autoneg */ 915 if (autoneg == AUTONEG_ENABLE) { 916 /* If autoneg was not already enabled */ 917 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 918 /* If autoneg is not supported, return error */ 919 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 920 supported, 921 Autoneg)) { 922 netdev_info(netdev, "Autoneg not supported on this phy\n"); 923 err = -EINVAL; 924 goto done; 925 } 926 /* Autoneg is allowed to change */ 927 config.abilities = abilities.abilities | 928 I40E_AQ_PHY_ENABLE_AN; 929 autoneg_changed = true; 930 } 931 } else { 932 /* If autoneg is currently enabled */ 933 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 934 /* If autoneg is supported 10GBASE_T is the only PHY 935 * that can disable it, so otherwise return error 936 */ 937 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 938 supported, 939 Autoneg) && 940 hw->phy.link_info.phy_type != 941 I40E_PHY_TYPE_10GBASE_T) { 942 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 943 err = -EINVAL; 944 goto done; 945 } 946 /* Autoneg is allowed to change */ 947 config.abilities = abilities.abilities & 948 ~I40E_AQ_PHY_ENABLE_AN; 949 autoneg_changed = true; 950 } 951 } 952 953 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 954 100baseT_Full)) 955 config.link_speed |= I40E_LINK_SPEED_100MB; 956 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 957 1000baseT_Full) || 958 ethtool_link_ksettings_test_link_mode(ks, advertising, 959 1000baseX_Full) || 960 ethtool_link_ksettings_test_link_mode(ks, advertising, 961 1000baseKX_Full)) 962 config.link_speed |= I40E_LINK_SPEED_1GB; 963 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 964 10000baseT_Full) || 965 ethtool_link_ksettings_test_link_mode(ks, advertising, 966 10000baseKX4_Full) || 967 ethtool_link_ksettings_test_link_mode(ks, advertising, 968 10000baseKR_Full) || 969 ethtool_link_ksettings_test_link_mode(ks, advertising, 970 10000baseCR_Full) || 971 ethtool_link_ksettings_test_link_mode(ks, advertising, 972 10000baseSR_Full)) 973 config.link_speed |= I40E_LINK_SPEED_10GB; 974 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 975 20000baseKR2_Full)) 976 config.link_speed |= I40E_LINK_SPEED_20GB; 977 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 978 25000baseCR_Full) || 979 ethtool_link_ksettings_test_link_mode(ks, advertising, 980 25000baseKR_Full) || 981 ethtool_link_ksettings_test_link_mode(ks, advertising, 982 25000baseSR_Full)) 983 config.link_speed |= I40E_LINK_SPEED_25GB; 984 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 985 40000baseKR4_Full) || 986 ethtool_link_ksettings_test_link_mode(ks, advertising, 987 40000baseCR4_Full) || 988 ethtool_link_ksettings_test_link_mode(ks, advertising, 989 40000baseSR4_Full) || 990 ethtool_link_ksettings_test_link_mode(ks, advertising, 991 40000baseLR4_Full)) 992 config.link_speed |= I40E_LINK_SPEED_40GB; 993 994 /* If speed didn't get set, set it to what it currently is. 995 * This is needed because if advertise is 0 (as it is when autoneg 996 * is disabled) then speed won't get set. 997 */ 998 if (!config.link_speed) 999 config.link_speed = abilities.link_speed; 1000 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1001 /* copy over the rest of the abilities */ 1002 config.phy_type = abilities.phy_type; 1003 config.phy_type_ext = abilities.phy_type_ext; 1004 config.eee_capability = abilities.eee_capability; 1005 config.eeer = abilities.eeer_val; 1006 config.low_power_ctrl = abilities.d3_lpan; 1007 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1008 I40E_AQ_PHY_FEC_CONFIG_MASK; 1009 1010 /* save the requested speeds */ 1011 hw->phy.link_info.requested_speeds = config.link_speed; 1012 /* set link and auto negotiation so changes take effect */ 1013 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1014 /* If link is up put link down */ 1015 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1016 /* Tell the OS link is going down, the link will go 1017 * back up when fw says it is ready asynchronously 1018 */ 1019 i40e_print_link_message(vsi, false); 1020 netif_carrier_off(netdev); 1021 netif_tx_stop_all_queues(netdev); 1022 } 1023 1024 /* make the aq call */ 1025 status = i40e_aq_set_phy_config(hw, &config, NULL); 1026 if (status) { 1027 netdev_info(netdev, 1028 "Set phy config failed, err %s aq_err %s\n", 1029 i40e_stat_str(hw, status), 1030 i40e_aq_str(hw, hw->aq.asq_last_status)); 1031 err = -EAGAIN; 1032 goto done; 1033 } 1034 1035 status = i40e_update_link_info(hw); 1036 if (status) 1037 netdev_dbg(netdev, 1038 "Updating link info failed with err %s aq_err %s\n", 1039 i40e_stat_str(hw, status), 1040 i40e_aq_str(hw, hw->aq.asq_last_status)); 1041 1042 } else { 1043 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1044 } 1045 1046 done: 1047 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1048 1049 return err; 1050 } 1051 1052 static int i40e_nway_reset(struct net_device *netdev) 1053 { 1054 /* restart autonegotiation */ 1055 struct i40e_netdev_priv *np = netdev_priv(netdev); 1056 struct i40e_pf *pf = np->vsi->back; 1057 struct i40e_hw *hw = &pf->hw; 1058 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1059 i40e_status ret = 0; 1060 1061 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1062 if (ret) { 1063 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1064 i40e_stat_str(hw, ret), 1065 i40e_aq_str(hw, hw->aq.asq_last_status)); 1066 return -EIO; 1067 } 1068 1069 return 0; 1070 } 1071 1072 /** 1073 * i40e_get_pauseparam - Get Flow Control status 1074 * Return tx/rx-pause status 1075 **/ 1076 static void i40e_get_pauseparam(struct net_device *netdev, 1077 struct ethtool_pauseparam *pause) 1078 { 1079 struct i40e_netdev_priv *np = netdev_priv(netdev); 1080 struct i40e_pf *pf = np->vsi->back; 1081 struct i40e_hw *hw = &pf->hw; 1082 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1083 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1084 1085 pause->autoneg = 1086 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1087 AUTONEG_ENABLE : AUTONEG_DISABLE); 1088 1089 /* PFC enabled so report LFC as off */ 1090 if (dcbx_cfg->pfc.pfcenable) { 1091 pause->rx_pause = 0; 1092 pause->tx_pause = 0; 1093 return; 1094 } 1095 1096 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1097 pause->rx_pause = 1; 1098 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1099 pause->tx_pause = 1; 1100 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1101 pause->rx_pause = 1; 1102 pause->tx_pause = 1; 1103 } 1104 } 1105 1106 /** 1107 * i40e_set_pauseparam - Set Flow Control parameter 1108 * @netdev: network interface device structure 1109 * @pause: return tx/rx flow control status 1110 **/ 1111 static int i40e_set_pauseparam(struct net_device *netdev, 1112 struct ethtool_pauseparam *pause) 1113 { 1114 struct i40e_netdev_priv *np = netdev_priv(netdev); 1115 struct i40e_pf *pf = np->vsi->back; 1116 struct i40e_vsi *vsi = np->vsi; 1117 struct i40e_hw *hw = &pf->hw; 1118 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1119 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1120 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1121 i40e_status status; 1122 u8 aq_failures; 1123 int err = 0; 1124 1125 /* Changing the port's flow control is not supported if this isn't the 1126 * port's controlling PF 1127 */ 1128 if (hw->partition_id != 1) { 1129 i40e_partition_setting_complaint(pf); 1130 return -EOPNOTSUPP; 1131 } 1132 1133 if (vsi != pf->vsi[pf->lan_vsi]) 1134 return -EOPNOTSUPP; 1135 1136 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1137 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1138 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1139 return -EOPNOTSUPP; 1140 } 1141 1142 /* If we have link and don't have autoneg */ 1143 if (!test_bit(__I40E_DOWN, pf->state) && 1144 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1145 /* Send message that it might not necessarily work*/ 1146 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1147 } 1148 1149 if (dcbx_cfg->pfc.pfcenable) { 1150 netdev_info(netdev, 1151 "Priority flow control enabled. Cannot set link flow control.\n"); 1152 return -EOPNOTSUPP; 1153 } 1154 1155 if (pause->rx_pause && pause->tx_pause) 1156 hw->fc.requested_mode = I40E_FC_FULL; 1157 else if (pause->rx_pause && !pause->tx_pause) 1158 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1159 else if (!pause->rx_pause && pause->tx_pause) 1160 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1161 else if (!pause->rx_pause && !pause->tx_pause) 1162 hw->fc.requested_mode = I40E_FC_NONE; 1163 else 1164 return -EINVAL; 1165 1166 /* Tell the OS link is going down, the link will go back up when fw 1167 * says it is ready asynchronously 1168 */ 1169 i40e_print_link_message(vsi, false); 1170 netif_carrier_off(netdev); 1171 netif_tx_stop_all_queues(netdev); 1172 1173 /* Set the fc mode and only restart an if link is up*/ 1174 status = i40e_set_fc(hw, &aq_failures, link_up); 1175 1176 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1177 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1178 i40e_stat_str(hw, status), 1179 i40e_aq_str(hw, hw->aq.asq_last_status)); 1180 err = -EAGAIN; 1181 } 1182 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1183 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1184 i40e_stat_str(hw, status), 1185 i40e_aq_str(hw, hw->aq.asq_last_status)); 1186 err = -EAGAIN; 1187 } 1188 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1189 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1190 i40e_stat_str(hw, status), 1191 i40e_aq_str(hw, hw->aq.asq_last_status)); 1192 err = -EAGAIN; 1193 } 1194 1195 if (!test_bit(__I40E_DOWN, pf->state)) { 1196 /* Give it a little more time to try to come back */ 1197 msleep(75); 1198 if (!test_bit(__I40E_DOWN, pf->state)) 1199 return i40e_nway_reset(netdev); 1200 } 1201 1202 return err; 1203 } 1204 1205 static u32 i40e_get_msglevel(struct net_device *netdev) 1206 { 1207 struct i40e_netdev_priv *np = netdev_priv(netdev); 1208 struct i40e_pf *pf = np->vsi->back; 1209 u32 debug_mask = pf->hw.debug_mask; 1210 1211 if (debug_mask) 1212 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1213 1214 return pf->msg_enable; 1215 } 1216 1217 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1218 { 1219 struct i40e_netdev_priv *np = netdev_priv(netdev); 1220 struct i40e_pf *pf = np->vsi->back; 1221 1222 if (I40E_DEBUG_USER & data) 1223 pf->hw.debug_mask = data; 1224 else 1225 pf->msg_enable = data; 1226 } 1227 1228 static int i40e_get_regs_len(struct net_device *netdev) 1229 { 1230 int reg_count = 0; 1231 int i; 1232 1233 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1234 reg_count += i40e_reg_list[i].elements; 1235 1236 return reg_count * sizeof(u32); 1237 } 1238 1239 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1240 void *p) 1241 { 1242 struct i40e_netdev_priv *np = netdev_priv(netdev); 1243 struct i40e_pf *pf = np->vsi->back; 1244 struct i40e_hw *hw = &pf->hw; 1245 u32 *reg_buf = p; 1246 unsigned int i, j, ri; 1247 u32 reg; 1248 1249 /* Tell ethtool which driver-version-specific regs output we have. 1250 * 1251 * At some point, if we have ethtool doing special formatting of 1252 * this data, it will rely on this version number to know how to 1253 * interpret things. Hence, this needs to be updated if/when the 1254 * diags register table is changed. 1255 */ 1256 regs->version = 1; 1257 1258 /* loop through the diags reg table for what to print */ 1259 ri = 0; 1260 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1261 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1262 reg = i40e_reg_list[i].offset 1263 + (j * i40e_reg_list[i].stride); 1264 reg_buf[ri++] = rd32(hw, reg); 1265 } 1266 } 1267 1268 } 1269 1270 static int i40e_get_eeprom(struct net_device *netdev, 1271 struct ethtool_eeprom *eeprom, u8 *bytes) 1272 { 1273 struct i40e_netdev_priv *np = netdev_priv(netdev); 1274 struct i40e_hw *hw = &np->vsi->back->hw; 1275 struct i40e_pf *pf = np->vsi->back; 1276 int ret_val = 0, len, offset; 1277 u8 *eeprom_buff; 1278 u16 i, sectors; 1279 bool last; 1280 u32 magic; 1281 1282 #define I40E_NVM_SECTOR_SIZE 4096 1283 if (eeprom->len == 0) 1284 return -EINVAL; 1285 1286 /* check for NVMUpdate access method */ 1287 magic = hw->vendor_id | (hw->device_id << 16); 1288 if (eeprom->magic && eeprom->magic != magic) { 1289 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1290 int errno = 0; 1291 1292 /* make sure it is the right magic for NVMUpdate */ 1293 if ((eeprom->magic >> 16) != hw->device_id) 1294 errno = -EINVAL; 1295 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1296 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1297 errno = -EBUSY; 1298 else 1299 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1300 1301 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1302 dev_info(&pf->pdev->dev, 1303 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1304 ret_val, hw->aq.asq_last_status, errno, 1305 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1306 cmd->offset, cmd->data_size); 1307 1308 return errno; 1309 } 1310 1311 /* normal ethtool get_eeprom support */ 1312 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1313 1314 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1315 if (!eeprom_buff) 1316 return -ENOMEM; 1317 1318 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1319 if (ret_val) { 1320 dev_info(&pf->pdev->dev, 1321 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1322 ret_val, hw->aq.asq_last_status); 1323 goto free_buff; 1324 } 1325 1326 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1327 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1328 len = I40E_NVM_SECTOR_SIZE; 1329 last = false; 1330 for (i = 0; i < sectors; i++) { 1331 if (i == (sectors - 1)) { 1332 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1333 last = true; 1334 } 1335 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1336 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1337 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1338 last, NULL); 1339 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1340 dev_info(&pf->pdev->dev, 1341 "read NVM failed, invalid offset 0x%x\n", 1342 offset); 1343 break; 1344 } else if (ret_val && 1345 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1346 dev_info(&pf->pdev->dev, 1347 "read NVM failed, access, offset 0x%x\n", 1348 offset); 1349 break; 1350 } else if (ret_val) { 1351 dev_info(&pf->pdev->dev, 1352 "read NVM failed offset %d err=%d status=0x%x\n", 1353 offset, ret_val, hw->aq.asq_last_status); 1354 break; 1355 } 1356 } 1357 1358 i40e_release_nvm(hw); 1359 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1360 free_buff: 1361 kfree(eeprom_buff); 1362 return ret_val; 1363 } 1364 1365 static int i40e_get_eeprom_len(struct net_device *netdev) 1366 { 1367 struct i40e_netdev_priv *np = netdev_priv(netdev); 1368 struct i40e_hw *hw = &np->vsi->back->hw; 1369 u32 val; 1370 1371 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1372 if (hw->mac.type == I40E_MAC_X722) { 1373 val = X722_EEPROM_SCOPE_LIMIT + 1; 1374 return val; 1375 } 1376 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1377 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1378 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1379 /* register returns value in power of 2, 64Kbyte chunks. */ 1380 val = (64 * 1024) * BIT(val); 1381 return val; 1382 } 1383 1384 static int i40e_set_eeprom(struct net_device *netdev, 1385 struct ethtool_eeprom *eeprom, u8 *bytes) 1386 { 1387 struct i40e_netdev_priv *np = netdev_priv(netdev); 1388 struct i40e_hw *hw = &np->vsi->back->hw; 1389 struct i40e_pf *pf = np->vsi->back; 1390 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1391 int ret_val = 0; 1392 int errno = 0; 1393 u32 magic; 1394 1395 /* normal ethtool set_eeprom is not supported */ 1396 magic = hw->vendor_id | (hw->device_id << 16); 1397 if (eeprom->magic == magic) 1398 errno = -EOPNOTSUPP; 1399 /* check for NVMUpdate access method */ 1400 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1401 errno = -EINVAL; 1402 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1403 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1404 errno = -EBUSY; 1405 else 1406 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1407 1408 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1409 dev_info(&pf->pdev->dev, 1410 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1411 ret_val, hw->aq.asq_last_status, errno, 1412 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1413 cmd->offset, cmd->data_size); 1414 1415 return errno; 1416 } 1417 1418 static void i40e_get_drvinfo(struct net_device *netdev, 1419 struct ethtool_drvinfo *drvinfo) 1420 { 1421 struct i40e_netdev_priv *np = netdev_priv(netdev); 1422 struct i40e_vsi *vsi = np->vsi; 1423 struct i40e_pf *pf = vsi->back; 1424 1425 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1426 strlcpy(drvinfo->version, i40e_driver_version_str, 1427 sizeof(drvinfo->version)); 1428 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1429 sizeof(drvinfo->fw_version)); 1430 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1431 sizeof(drvinfo->bus_info)); 1432 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1433 if (pf->hw.pf_id == 0) 1434 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1435 } 1436 1437 static void i40e_get_ringparam(struct net_device *netdev, 1438 struct ethtool_ringparam *ring) 1439 { 1440 struct i40e_netdev_priv *np = netdev_priv(netdev); 1441 struct i40e_pf *pf = np->vsi->back; 1442 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1443 1444 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1445 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1446 ring->rx_mini_max_pending = 0; 1447 ring->rx_jumbo_max_pending = 0; 1448 ring->rx_pending = vsi->rx_rings[0]->count; 1449 ring->tx_pending = vsi->tx_rings[0]->count; 1450 ring->rx_mini_pending = 0; 1451 ring->rx_jumbo_pending = 0; 1452 } 1453 1454 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1455 { 1456 if (i40e_enabled_xdp_vsi(vsi)) { 1457 return index < vsi->num_queue_pairs || 1458 (index >= vsi->alloc_queue_pairs && 1459 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1460 } 1461 1462 return index < vsi->num_queue_pairs; 1463 } 1464 1465 static int i40e_set_ringparam(struct net_device *netdev, 1466 struct ethtool_ringparam *ring) 1467 { 1468 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1469 struct i40e_netdev_priv *np = netdev_priv(netdev); 1470 struct i40e_hw *hw = &np->vsi->back->hw; 1471 struct i40e_vsi *vsi = np->vsi; 1472 struct i40e_pf *pf = vsi->back; 1473 u32 new_rx_count, new_tx_count; 1474 u16 tx_alloc_queue_pairs; 1475 int timeout = 50; 1476 int i, err = 0; 1477 1478 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1479 return -EINVAL; 1480 1481 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1482 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1483 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1484 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1485 netdev_info(netdev, 1486 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1487 ring->tx_pending, ring->rx_pending, 1488 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1489 return -EINVAL; 1490 } 1491 1492 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1493 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1494 1495 /* if nothing to do return success */ 1496 if ((new_tx_count == vsi->tx_rings[0]->count) && 1497 (new_rx_count == vsi->rx_rings[0]->count)) 1498 return 0; 1499 1500 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1501 timeout--; 1502 if (!timeout) 1503 return -EBUSY; 1504 usleep_range(1000, 2000); 1505 } 1506 1507 if (!netif_running(vsi->netdev)) { 1508 /* simple case - set for the next time the netdev is started */ 1509 for (i = 0; i < vsi->num_queue_pairs; i++) { 1510 vsi->tx_rings[i]->count = new_tx_count; 1511 vsi->rx_rings[i]->count = new_rx_count; 1512 if (i40e_enabled_xdp_vsi(vsi)) 1513 vsi->xdp_rings[i]->count = new_tx_count; 1514 } 1515 goto done; 1516 } 1517 1518 /* We can't just free everything and then setup again, 1519 * because the ISRs in MSI-X mode get passed pointers 1520 * to the Tx and Rx ring structs. 1521 */ 1522 1523 /* alloc updated Tx and XDP Tx resources */ 1524 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1525 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1526 if (new_tx_count != vsi->tx_rings[0]->count) { 1527 netdev_info(netdev, 1528 "Changing Tx descriptor count from %d to %d.\n", 1529 vsi->tx_rings[0]->count, new_tx_count); 1530 tx_rings = kcalloc(tx_alloc_queue_pairs, 1531 sizeof(struct i40e_ring), GFP_KERNEL); 1532 if (!tx_rings) { 1533 err = -ENOMEM; 1534 goto done; 1535 } 1536 1537 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1538 if (!i40e_active_tx_ring_index(vsi, i)) 1539 continue; 1540 1541 tx_rings[i] = *vsi->tx_rings[i]; 1542 tx_rings[i].count = new_tx_count; 1543 /* the desc and bi pointers will be reallocated in the 1544 * setup call 1545 */ 1546 tx_rings[i].desc = NULL; 1547 tx_rings[i].rx_bi = NULL; 1548 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1549 if (err) { 1550 while (i) { 1551 i--; 1552 if (!i40e_active_tx_ring_index(vsi, i)) 1553 continue; 1554 i40e_free_tx_resources(&tx_rings[i]); 1555 } 1556 kfree(tx_rings); 1557 tx_rings = NULL; 1558 1559 goto done; 1560 } 1561 } 1562 } 1563 1564 /* alloc updated Rx resources */ 1565 if (new_rx_count != vsi->rx_rings[0]->count) { 1566 netdev_info(netdev, 1567 "Changing Rx descriptor count from %d to %d\n", 1568 vsi->rx_rings[0]->count, new_rx_count); 1569 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1570 sizeof(struct i40e_ring), GFP_KERNEL); 1571 if (!rx_rings) { 1572 err = -ENOMEM; 1573 goto free_tx; 1574 } 1575 1576 for (i = 0; i < vsi->num_queue_pairs; i++) { 1577 struct i40e_ring *ring; 1578 u16 unused; 1579 1580 /* clone ring and setup updated count */ 1581 rx_rings[i] = *vsi->rx_rings[i]; 1582 rx_rings[i].count = new_rx_count; 1583 /* the desc and bi pointers will be reallocated in the 1584 * setup call 1585 */ 1586 rx_rings[i].desc = NULL; 1587 rx_rings[i].rx_bi = NULL; 1588 /* this is to allow wr32 to have something to write to 1589 * during early allocation of Rx buffers 1590 */ 1591 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1592 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1593 if (err) 1594 goto rx_unwind; 1595 1596 /* now allocate the Rx buffers to make sure the OS 1597 * has enough memory, any failure here means abort 1598 */ 1599 ring = &rx_rings[i]; 1600 unused = I40E_DESC_UNUSED(ring); 1601 err = i40e_alloc_rx_buffers(ring, unused); 1602 rx_unwind: 1603 if (err) { 1604 do { 1605 i40e_free_rx_resources(&rx_rings[i]); 1606 } while (i--); 1607 kfree(rx_rings); 1608 rx_rings = NULL; 1609 1610 goto free_tx; 1611 } 1612 } 1613 } 1614 1615 /* Bring interface down, copy in the new ring info, 1616 * then restore the interface 1617 */ 1618 i40e_down(vsi); 1619 1620 if (tx_rings) { 1621 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1622 if (i40e_active_tx_ring_index(vsi, i)) { 1623 i40e_free_tx_resources(vsi->tx_rings[i]); 1624 *vsi->tx_rings[i] = tx_rings[i]; 1625 } 1626 } 1627 kfree(tx_rings); 1628 tx_rings = NULL; 1629 } 1630 1631 if (rx_rings) { 1632 for (i = 0; i < vsi->num_queue_pairs; i++) { 1633 i40e_free_rx_resources(vsi->rx_rings[i]); 1634 /* get the real tail offset */ 1635 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1636 /* this is to fake out the allocation routine 1637 * into thinking it has to realloc everything 1638 * but the recycling logic will let us re-use 1639 * the buffers allocated above 1640 */ 1641 rx_rings[i].next_to_use = 0; 1642 rx_rings[i].next_to_clean = 0; 1643 rx_rings[i].next_to_alloc = 0; 1644 /* do a struct copy */ 1645 *vsi->rx_rings[i] = rx_rings[i]; 1646 } 1647 kfree(rx_rings); 1648 rx_rings = NULL; 1649 } 1650 1651 i40e_up(vsi); 1652 1653 free_tx: 1654 /* error cleanup if the Rx allocations failed after getting Tx */ 1655 if (tx_rings) { 1656 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1657 if (i40e_active_tx_ring_index(vsi, i)) 1658 i40e_free_tx_resources(vsi->tx_rings[i]); 1659 } 1660 kfree(tx_rings); 1661 tx_rings = NULL; 1662 } 1663 1664 done: 1665 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1666 1667 return err; 1668 } 1669 1670 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1671 { 1672 struct i40e_netdev_priv *np = netdev_priv(netdev); 1673 struct i40e_vsi *vsi = np->vsi; 1674 struct i40e_pf *pf = vsi->back; 1675 1676 switch (sset) { 1677 case ETH_SS_TEST: 1678 return I40E_TEST_LEN; 1679 case ETH_SS_STATS: 1680 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1681 int len = I40E_PF_STATS_LEN(netdev); 1682 1683 if ((pf->lan_veb != I40E_NO_VEB) && 1684 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1685 len += I40E_VEB_STATS_TOTAL; 1686 return len; 1687 } else { 1688 return I40E_VSI_STATS_LEN(netdev); 1689 } 1690 case ETH_SS_PRIV_FLAGS: 1691 return I40E_PRIV_FLAGS_STR_LEN + 1692 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1693 default: 1694 return -EOPNOTSUPP; 1695 } 1696 } 1697 1698 static void i40e_get_ethtool_stats(struct net_device *netdev, 1699 struct ethtool_stats *stats, u64 *data) 1700 { 1701 struct i40e_netdev_priv *np = netdev_priv(netdev); 1702 struct i40e_ring *tx_ring, *rx_ring; 1703 struct i40e_vsi *vsi = np->vsi; 1704 struct i40e_pf *pf = vsi->back; 1705 unsigned int j; 1706 int i = 0; 1707 char *p; 1708 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1709 unsigned int start; 1710 1711 i40e_update_stats(vsi); 1712 1713 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1714 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1715 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1716 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1717 } 1718 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1719 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1720 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1721 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1722 } 1723 rcu_read_lock(); 1724 for (j = 0; j < vsi->num_queue_pairs; j++) { 1725 tx_ring = READ_ONCE(vsi->tx_rings[j]); 1726 1727 if (!tx_ring) 1728 continue; 1729 1730 /* process Tx ring statistics */ 1731 do { 1732 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1733 data[i] = tx_ring->stats.packets; 1734 data[i + 1] = tx_ring->stats.bytes; 1735 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1736 i += 2; 1737 1738 /* Rx ring is the 2nd half of the queue pair */ 1739 rx_ring = &tx_ring[1]; 1740 do { 1741 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1742 data[i] = rx_ring->stats.packets; 1743 data[i + 1] = rx_ring->stats.bytes; 1744 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1745 i += 2; 1746 } 1747 rcu_read_unlock(); 1748 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1749 return; 1750 1751 if ((pf->lan_veb != I40E_NO_VEB) && 1752 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1753 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1754 1755 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1756 p = (char *)veb; 1757 p += i40e_gstrings_veb_stats[j].stat_offset; 1758 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1759 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1760 } 1761 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1762 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1763 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1764 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1765 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1766 } 1767 } 1768 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1769 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1770 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1771 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1772 } 1773 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1774 data[i++] = pf->stats.priority_xon_tx[j]; 1775 data[i++] = pf->stats.priority_xoff_tx[j]; 1776 } 1777 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1778 data[i++] = pf->stats.priority_xon_rx[j]; 1779 data[i++] = pf->stats.priority_xoff_rx[j]; 1780 } 1781 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1782 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1783 } 1784 1785 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1786 u8 *data) 1787 { 1788 struct i40e_netdev_priv *np = netdev_priv(netdev); 1789 struct i40e_vsi *vsi = np->vsi; 1790 struct i40e_pf *pf = vsi->back; 1791 char *p = (char *)data; 1792 unsigned int i; 1793 1794 switch (stringset) { 1795 case ETH_SS_TEST: 1796 memcpy(data, i40e_gstrings_test, 1797 I40E_TEST_LEN * ETH_GSTRING_LEN); 1798 break; 1799 case ETH_SS_STATS: 1800 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1801 snprintf(p, ETH_GSTRING_LEN, "%s", 1802 i40e_gstrings_net_stats[i].stat_string); 1803 p += ETH_GSTRING_LEN; 1804 } 1805 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1806 snprintf(p, ETH_GSTRING_LEN, "%s", 1807 i40e_gstrings_misc_stats[i].stat_string); 1808 p += ETH_GSTRING_LEN; 1809 } 1810 for (i = 0; i < vsi->num_queue_pairs; i++) { 1811 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1812 p += ETH_GSTRING_LEN; 1813 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1814 p += ETH_GSTRING_LEN; 1815 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1816 p += ETH_GSTRING_LEN; 1817 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1818 p += ETH_GSTRING_LEN; 1819 } 1820 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1821 return; 1822 1823 if ((pf->lan_veb != I40E_NO_VEB) && 1824 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1825 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1826 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1827 i40e_gstrings_veb_stats[i].stat_string); 1828 p += ETH_GSTRING_LEN; 1829 } 1830 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1831 snprintf(p, ETH_GSTRING_LEN, 1832 "veb.tc_%d_tx_packets", i); 1833 p += ETH_GSTRING_LEN; 1834 snprintf(p, ETH_GSTRING_LEN, 1835 "veb.tc_%d_tx_bytes", i); 1836 p += ETH_GSTRING_LEN; 1837 snprintf(p, ETH_GSTRING_LEN, 1838 "veb.tc_%d_rx_packets", i); 1839 p += ETH_GSTRING_LEN; 1840 snprintf(p, ETH_GSTRING_LEN, 1841 "veb.tc_%d_rx_bytes", i); 1842 p += ETH_GSTRING_LEN; 1843 } 1844 } 1845 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1846 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1847 i40e_gstrings_stats[i].stat_string); 1848 p += ETH_GSTRING_LEN; 1849 } 1850 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1851 snprintf(p, ETH_GSTRING_LEN, 1852 "port.tx_priority_%d_xon", i); 1853 p += ETH_GSTRING_LEN; 1854 snprintf(p, ETH_GSTRING_LEN, 1855 "port.tx_priority_%d_xoff", i); 1856 p += ETH_GSTRING_LEN; 1857 } 1858 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1859 snprintf(p, ETH_GSTRING_LEN, 1860 "port.rx_priority_%d_xon", i); 1861 p += ETH_GSTRING_LEN; 1862 snprintf(p, ETH_GSTRING_LEN, 1863 "port.rx_priority_%d_xoff", i); 1864 p += ETH_GSTRING_LEN; 1865 } 1866 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1867 snprintf(p, ETH_GSTRING_LEN, 1868 "port.rx_priority_%d_xon_2_xoff", i); 1869 p += ETH_GSTRING_LEN; 1870 } 1871 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1872 break; 1873 case ETH_SS_PRIV_FLAGS: 1874 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1875 snprintf(p, ETH_GSTRING_LEN, "%s", 1876 i40e_gstrings_priv_flags[i].flag_string); 1877 p += ETH_GSTRING_LEN; 1878 } 1879 if (pf->hw.pf_id != 0) 1880 break; 1881 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1882 snprintf(p, ETH_GSTRING_LEN, "%s", 1883 i40e_gl_gstrings_priv_flags[i].flag_string); 1884 p += ETH_GSTRING_LEN; 1885 } 1886 break; 1887 default: 1888 break; 1889 } 1890 } 1891 1892 static int i40e_get_ts_info(struct net_device *dev, 1893 struct ethtool_ts_info *info) 1894 { 1895 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1896 1897 /* only report HW timestamping if PTP is enabled */ 1898 if (!(pf->flags & I40E_FLAG_PTP)) 1899 return ethtool_op_get_ts_info(dev, info); 1900 1901 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1902 SOF_TIMESTAMPING_RX_SOFTWARE | 1903 SOF_TIMESTAMPING_SOFTWARE | 1904 SOF_TIMESTAMPING_TX_HARDWARE | 1905 SOF_TIMESTAMPING_RX_HARDWARE | 1906 SOF_TIMESTAMPING_RAW_HARDWARE; 1907 1908 if (pf->ptp_clock) 1909 info->phc_index = ptp_clock_index(pf->ptp_clock); 1910 else 1911 info->phc_index = -1; 1912 1913 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1914 1915 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1916 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1917 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1918 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1919 1920 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1921 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1922 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1923 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1924 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1925 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1926 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1927 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1928 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1929 1930 return 0; 1931 } 1932 1933 static int i40e_link_test(struct net_device *netdev, u64 *data) 1934 { 1935 struct i40e_netdev_priv *np = netdev_priv(netdev); 1936 struct i40e_pf *pf = np->vsi->back; 1937 i40e_status status; 1938 bool link_up = false; 1939 1940 netif_info(pf, hw, netdev, "link test\n"); 1941 status = i40e_get_link_status(&pf->hw, &link_up); 1942 if (status) { 1943 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1944 *data = 1; 1945 return *data; 1946 } 1947 1948 if (link_up) 1949 *data = 0; 1950 else 1951 *data = 1; 1952 1953 return *data; 1954 } 1955 1956 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1957 { 1958 struct i40e_netdev_priv *np = netdev_priv(netdev); 1959 struct i40e_pf *pf = np->vsi->back; 1960 1961 netif_info(pf, hw, netdev, "register test\n"); 1962 *data = i40e_diag_reg_test(&pf->hw); 1963 1964 return *data; 1965 } 1966 1967 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1968 { 1969 struct i40e_netdev_priv *np = netdev_priv(netdev); 1970 struct i40e_pf *pf = np->vsi->back; 1971 1972 netif_info(pf, hw, netdev, "eeprom test\n"); 1973 *data = i40e_diag_eeprom_test(&pf->hw); 1974 1975 /* forcebly clear the NVM Update state machine */ 1976 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1977 1978 return *data; 1979 } 1980 1981 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1982 { 1983 struct i40e_netdev_priv *np = netdev_priv(netdev); 1984 struct i40e_pf *pf = np->vsi->back; 1985 u16 swc_old = pf->sw_int_count; 1986 1987 netif_info(pf, hw, netdev, "interrupt test\n"); 1988 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1989 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1990 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1991 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1992 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1993 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1994 usleep_range(1000, 2000); 1995 *data = (swc_old == pf->sw_int_count); 1996 1997 return *data; 1998 } 1999 2000 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2001 { 2002 struct i40e_vf *vfs = pf->vf; 2003 int i; 2004 2005 for (i = 0; i < pf->num_alloc_vfs; i++) 2006 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2007 return true; 2008 return false; 2009 } 2010 2011 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2012 { 2013 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2014 } 2015 2016 static void i40e_diag_test(struct net_device *netdev, 2017 struct ethtool_test *eth_test, u64 *data) 2018 { 2019 struct i40e_netdev_priv *np = netdev_priv(netdev); 2020 bool if_running = netif_running(netdev); 2021 struct i40e_pf *pf = np->vsi->back; 2022 2023 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2024 /* Offline tests */ 2025 netif_info(pf, drv, netdev, "offline testing starting\n"); 2026 2027 set_bit(__I40E_TESTING, pf->state); 2028 2029 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2030 dev_warn(&pf->pdev->dev, 2031 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2032 data[I40E_ETH_TEST_REG] = 1; 2033 data[I40E_ETH_TEST_EEPROM] = 1; 2034 data[I40E_ETH_TEST_INTR] = 1; 2035 data[I40E_ETH_TEST_LINK] = 1; 2036 eth_test->flags |= ETH_TEST_FL_FAILED; 2037 clear_bit(__I40E_TESTING, pf->state); 2038 goto skip_ol_tests; 2039 } 2040 2041 /* If the device is online then take it offline */ 2042 if (if_running) 2043 /* indicate we're in test mode */ 2044 i40e_close(netdev); 2045 else 2046 /* This reset does not affect link - if it is 2047 * changed to a type of reset that does affect 2048 * link then the following link test would have 2049 * to be moved to before the reset 2050 */ 2051 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2052 2053 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2054 eth_test->flags |= ETH_TEST_FL_FAILED; 2055 2056 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2057 eth_test->flags |= ETH_TEST_FL_FAILED; 2058 2059 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2060 eth_test->flags |= ETH_TEST_FL_FAILED; 2061 2062 /* run reg test last, a reset is required after it */ 2063 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2064 eth_test->flags |= ETH_TEST_FL_FAILED; 2065 2066 clear_bit(__I40E_TESTING, pf->state); 2067 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2068 2069 if (if_running) 2070 i40e_open(netdev); 2071 } else { 2072 /* Online tests */ 2073 netif_info(pf, drv, netdev, "online testing starting\n"); 2074 2075 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2076 eth_test->flags |= ETH_TEST_FL_FAILED; 2077 2078 /* Offline only tests, not run in online; pass by default */ 2079 data[I40E_ETH_TEST_REG] = 0; 2080 data[I40E_ETH_TEST_EEPROM] = 0; 2081 data[I40E_ETH_TEST_INTR] = 0; 2082 } 2083 2084 skip_ol_tests: 2085 2086 netif_info(pf, drv, netdev, "testing finished\n"); 2087 } 2088 2089 static void i40e_get_wol(struct net_device *netdev, 2090 struct ethtool_wolinfo *wol) 2091 { 2092 struct i40e_netdev_priv *np = netdev_priv(netdev); 2093 struct i40e_pf *pf = np->vsi->back; 2094 struct i40e_hw *hw = &pf->hw; 2095 u16 wol_nvm_bits; 2096 2097 /* NVM bit on means WoL disabled for the port */ 2098 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2099 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2100 wol->supported = 0; 2101 wol->wolopts = 0; 2102 } else { 2103 wol->supported = WAKE_MAGIC; 2104 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2105 } 2106 } 2107 2108 /** 2109 * i40e_set_wol - set the WakeOnLAN configuration 2110 * @netdev: the netdev in question 2111 * @wol: the ethtool WoL setting data 2112 **/ 2113 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2114 { 2115 struct i40e_netdev_priv *np = netdev_priv(netdev); 2116 struct i40e_pf *pf = np->vsi->back; 2117 struct i40e_vsi *vsi = np->vsi; 2118 struct i40e_hw *hw = &pf->hw; 2119 u16 wol_nvm_bits; 2120 2121 /* WoL not supported if this isn't the controlling PF on the port */ 2122 if (hw->partition_id != 1) { 2123 i40e_partition_setting_complaint(pf); 2124 return -EOPNOTSUPP; 2125 } 2126 2127 if (vsi != pf->vsi[pf->lan_vsi]) 2128 return -EOPNOTSUPP; 2129 2130 /* NVM bit on means WoL disabled for the port */ 2131 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2132 if (BIT(hw->port) & wol_nvm_bits) 2133 return -EOPNOTSUPP; 2134 2135 /* only magic packet is supported */ 2136 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2137 return -EOPNOTSUPP; 2138 2139 /* is this a new value? */ 2140 if (pf->wol_en != !!wol->wolopts) { 2141 pf->wol_en = !!wol->wolopts; 2142 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2143 } 2144 2145 return 0; 2146 } 2147 2148 static int i40e_set_phys_id(struct net_device *netdev, 2149 enum ethtool_phys_id_state state) 2150 { 2151 struct i40e_netdev_priv *np = netdev_priv(netdev); 2152 i40e_status ret = 0; 2153 struct i40e_pf *pf = np->vsi->back; 2154 struct i40e_hw *hw = &pf->hw; 2155 int blink_freq = 2; 2156 u16 temp_status; 2157 2158 switch (state) { 2159 case ETHTOOL_ID_ACTIVE: 2160 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2161 pf->led_status = i40e_led_get(hw); 2162 } else { 2163 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2164 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2165 NULL); 2166 ret = i40e_led_get_phy(hw, &temp_status, 2167 &pf->phy_led_val); 2168 pf->led_status = temp_status; 2169 } 2170 return blink_freq; 2171 case ETHTOOL_ID_ON: 2172 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2173 i40e_led_set(hw, 0xf, false); 2174 else 2175 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2176 break; 2177 case ETHTOOL_ID_OFF: 2178 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2179 i40e_led_set(hw, 0x0, false); 2180 else 2181 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2182 break; 2183 case ETHTOOL_ID_INACTIVE: 2184 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2185 i40e_led_set(hw, pf->led_status, false); 2186 } else { 2187 ret = i40e_led_set_phy(hw, false, pf->led_status, 2188 (pf->phy_led_val | 2189 I40E_PHY_LED_MODE_ORIG)); 2190 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2191 i40e_aq_set_phy_debug(hw, 0, NULL); 2192 } 2193 break; 2194 default: 2195 break; 2196 } 2197 if (ret) 2198 return -ENOENT; 2199 else 2200 return 0; 2201 } 2202 2203 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2204 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2205 * 125us (8000 interrupts per second) == ITR(62) 2206 */ 2207 2208 /** 2209 * __i40e_get_coalesce - get per-queue coalesce settings 2210 * @netdev: the netdev to check 2211 * @ec: ethtool coalesce data structure 2212 * @queue: which queue to pick 2213 * 2214 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2215 * are per queue. If queue is <0 then we default to queue 0 as the 2216 * representative value. 2217 **/ 2218 static int __i40e_get_coalesce(struct net_device *netdev, 2219 struct ethtool_coalesce *ec, 2220 int queue) 2221 { 2222 struct i40e_netdev_priv *np = netdev_priv(netdev); 2223 struct i40e_ring *rx_ring, *tx_ring; 2224 struct i40e_vsi *vsi = np->vsi; 2225 2226 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2227 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2228 2229 /* rx and tx usecs has per queue value. If user doesn't specify the 2230 * queue, return queue 0's value to represent. 2231 */ 2232 if (queue < 0) 2233 queue = 0; 2234 else if (queue >= vsi->num_queue_pairs) 2235 return -EINVAL; 2236 2237 rx_ring = vsi->rx_rings[queue]; 2238 tx_ring = vsi->tx_rings[queue]; 2239 2240 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2241 ec->use_adaptive_rx_coalesce = 1; 2242 2243 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2244 ec->use_adaptive_tx_coalesce = 1; 2245 2246 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2247 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2248 2249 /* we use the _usecs_high to store/set the interrupt rate limit 2250 * that the hardware supports, that almost but not quite 2251 * fits the original intent of the ethtool variable, 2252 * the rx_coalesce_usecs_high limits total interrupts 2253 * per second from both tx/rx sources. 2254 */ 2255 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2256 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2257 2258 return 0; 2259 } 2260 2261 /** 2262 * i40e_get_coalesce - get a netdev's coalesce settings 2263 * @netdev: the netdev to check 2264 * @ec: ethtool coalesce data structure 2265 * 2266 * Gets the coalesce settings for a particular netdev. Note that if user has 2267 * modified per-queue settings, this only guarantees to represent queue 0. See 2268 * __i40e_get_coalesce for more details. 2269 **/ 2270 static int i40e_get_coalesce(struct net_device *netdev, 2271 struct ethtool_coalesce *ec) 2272 { 2273 return __i40e_get_coalesce(netdev, ec, -1); 2274 } 2275 2276 /** 2277 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2278 * @netdev: netdev structure 2279 * @ec: ethtool's coalesce settings 2280 * @queue: the particular queue to read 2281 * 2282 * Will read a specific queue's coalesce settings 2283 **/ 2284 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2285 struct ethtool_coalesce *ec) 2286 { 2287 return __i40e_get_coalesce(netdev, ec, queue); 2288 } 2289 2290 /** 2291 * i40e_set_itr_per_queue - set ITR values for specific queue 2292 * @vsi: the VSI to set values for 2293 * @ec: coalesce settings from ethtool 2294 * @queue: the queue to modify 2295 * 2296 * Change the ITR settings for a specific queue. 2297 **/ 2298 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2299 struct ethtool_coalesce *ec, 2300 int queue) 2301 { 2302 struct i40e_pf *pf = vsi->back; 2303 struct i40e_hw *hw = &pf->hw; 2304 struct i40e_q_vector *q_vector; 2305 u16 vector, intrl; 2306 2307 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2308 2309 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; 2310 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; 2311 2312 if (ec->use_adaptive_rx_coalesce) 2313 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; 2314 else 2315 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2316 2317 if (ec->use_adaptive_tx_coalesce) 2318 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; 2319 else 2320 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2321 2322 q_vector = vsi->rx_rings[queue]->q_vector; 2323 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); 2324 vector = vsi->base_vector + q_vector->v_idx; 2325 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2326 2327 q_vector = vsi->tx_rings[queue]->q_vector; 2328 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); 2329 vector = vsi->base_vector + q_vector->v_idx; 2330 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2331 2332 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2333 i40e_flush(hw); 2334 } 2335 2336 /** 2337 * __i40e_set_coalesce - set coalesce settings for particular queue 2338 * @netdev: the netdev to change 2339 * @ec: ethtool coalesce settings 2340 * @queue: the queue to change 2341 * 2342 * Sets the coalesce settings for a particular queue. 2343 **/ 2344 static int __i40e_set_coalesce(struct net_device *netdev, 2345 struct ethtool_coalesce *ec, 2346 int queue) 2347 { 2348 struct i40e_netdev_priv *np = netdev_priv(netdev); 2349 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2350 struct i40e_vsi *vsi = np->vsi; 2351 struct i40e_pf *pf = vsi->back; 2352 int i; 2353 2354 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2355 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2356 2357 if (queue < 0) { 2358 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting; 2359 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting; 2360 } else if (queue < vsi->num_queue_pairs) { 2361 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting; 2362 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting; 2363 } else { 2364 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2365 vsi->num_queue_pairs - 1); 2366 return -EINVAL; 2367 } 2368 2369 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2370 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2371 2372 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2373 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2374 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2375 return -EINVAL; 2376 } 2377 2378 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2379 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2380 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2381 return -EINVAL; 2382 } 2383 2384 if (ec->rx_coalesce_usecs != cur_rx_itr && 2385 ec->use_adaptive_rx_coalesce) { 2386 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2387 return -EINVAL; 2388 } 2389 2390 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2391 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2392 return -EINVAL; 2393 } 2394 2395 if (ec->tx_coalesce_usecs != cur_tx_itr && 2396 ec->use_adaptive_tx_coalesce) { 2397 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2398 return -EINVAL; 2399 } 2400 2401 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2402 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2403 return -EINVAL; 2404 } 2405 2406 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2407 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1; 2408 2409 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2410 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1; 2411 2412 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2413 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2414 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2415 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2416 vsi->int_rate_limit); 2417 } 2418 2419 /* rx and tx usecs has per queue value. If user doesn't specify the 2420 * queue, apply to all queues. 2421 */ 2422 if (queue < 0) { 2423 for (i = 0; i < vsi->num_queue_pairs; i++) 2424 i40e_set_itr_per_queue(vsi, ec, i); 2425 } else { 2426 i40e_set_itr_per_queue(vsi, ec, queue); 2427 } 2428 2429 return 0; 2430 } 2431 2432 /** 2433 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2434 * @netdev: the netdev to change 2435 * @ec: ethtool coalesce settings 2436 * 2437 * This will set each queue to the same coalesce settings. 2438 **/ 2439 static int i40e_set_coalesce(struct net_device *netdev, 2440 struct ethtool_coalesce *ec) 2441 { 2442 return __i40e_set_coalesce(netdev, ec, -1); 2443 } 2444 2445 /** 2446 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2447 * @netdev: the netdev to change 2448 * @ec: ethtool's coalesce settings 2449 * @queue: the queue to change 2450 * 2451 * Sets the specified queue's coalesce settings. 2452 **/ 2453 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2454 struct ethtool_coalesce *ec) 2455 { 2456 return __i40e_set_coalesce(netdev, ec, queue); 2457 } 2458 2459 /** 2460 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2461 * @pf: pointer to the physical function struct 2462 * @cmd: ethtool rxnfc command 2463 * 2464 * Returns Success if the flow is supported, else Invalid Input. 2465 **/ 2466 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2467 { 2468 struct i40e_hw *hw = &pf->hw; 2469 u8 flow_pctype = 0; 2470 u64 i_set = 0; 2471 2472 cmd->data = 0; 2473 2474 switch (cmd->flow_type) { 2475 case TCP_V4_FLOW: 2476 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2477 break; 2478 case UDP_V4_FLOW: 2479 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2480 break; 2481 case TCP_V6_FLOW: 2482 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2483 break; 2484 case UDP_V6_FLOW: 2485 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2486 break; 2487 case SCTP_V4_FLOW: 2488 case AH_ESP_V4_FLOW: 2489 case AH_V4_FLOW: 2490 case ESP_V4_FLOW: 2491 case IPV4_FLOW: 2492 case SCTP_V6_FLOW: 2493 case AH_ESP_V6_FLOW: 2494 case AH_V6_FLOW: 2495 case ESP_V6_FLOW: 2496 case IPV6_FLOW: 2497 /* Default is src/dest for IP, no matter the L4 hashing */ 2498 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2499 break; 2500 default: 2501 return -EINVAL; 2502 } 2503 2504 /* Read flow based hash input set register */ 2505 if (flow_pctype) { 2506 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2507 flow_pctype)) | 2508 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2509 flow_pctype)) << 32); 2510 } 2511 2512 /* Process bits of hash input set */ 2513 if (i_set) { 2514 if (i_set & I40E_L4_SRC_MASK) 2515 cmd->data |= RXH_L4_B_0_1; 2516 if (i_set & I40E_L4_DST_MASK) 2517 cmd->data |= RXH_L4_B_2_3; 2518 2519 if (cmd->flow_type == TCP_V4_FLOW || 2520 cmd->flow_type == UDP_V4_FLOW) { 2521 if (i_set & I40E_L3_SRC_MASK) 2522 cmd->data |= RXH_IP_SRC; 2523 if (i_set & I40E_L3_DST_MASK) 2524 cmd->data |= RXH_IP_DST; 2525 } else if (cmd->flow_type == TCP_V6_FLOW || 2526 cmd->flow_type == UDP_V6_FLOW) { 2527 if (i_set & I40E_L3_V6_SRC_MASK) 2528 cmd->data |= RXH_IP_SRC; 2529 if (i_set & I40E_L3_V6_DST_MASK) 2530 cmd->data |= RXH_IP_DST; 2531 } 2532 } 2533 2534 return 0; 2535 } 2536 2537 /** 2538 * i40e_check_mask - Check whether a mask field is set 2539 * @mask: the full mask value 2540 * @field; mask of the field to check 2541 * 2542 * If the given mask is fully set, return positive value. If the mask for the 2543 * field is fully unset, return zero. Otherwise return a negative error code. 2544 **/ 2545 static int i40e_check_mask(u64 mask, u64 field) 2546 { 2547 u64 value = mask & field; 2548 2549 if (value == field) 2550 return 1; 2551 else if (!value) 2552 return 0; 2553 else 2554 return -1; 2555 } 2556 2557 /** 2558 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2559 * @fsp: pointer to rx flow specification 2560 * @data: pointer to userdef data structure for storage 2561 * 2562 * Read the user-defined data and deconstruct the value into a structure. No 2563 * other code should read the user-defined data, so as to ensure that every 2564 * place consistently reads the value correctly. 2565 * 2566 * The user-defined field is a 64bit Big Endian format value, which we 2567 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2568 * be defined starting from the highest bits, while small bit field values 2569 * shall be defined starting from the lowest bits. 2570 * 2571 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2572 * and the filter should be rejected. The data structure will always be 2573 * modified even if FLOW_EXT is not set. 2574 * 2575 **/ 2576 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2577 struct i40e_rx_flow_userdef *data) 2578 { 2579 u64 value, mask; 2580 int valid; 2581 2582 /* Zero memory first so it's always consistent. */ 2583 memset(data, 0, sizeof(*data)); 2584 2585 if (!(fsp->flow_type & FLOW_EXT)) 2586 return 0; 2587 2588 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2589 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2590 2591 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2592 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2593 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2594 2595 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2596 if (valid < 0) { 2597 return -EINVAL; 2598 } else if (valid) { 2599 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2600 data->flex_offset = 2601 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2602 data->flex_filter = true; 2603 } 2604 2605 return 0; 2606 } 2607 2608 /** 2609 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2610 * @fsp: pointer to rx_flow specification 2611 * 2612 * Reads the userdef data structure and properly fills in the user defined 2613 * fields of the rx_flow_spec. 2614 **/ 2615 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2616 struct i40e_rx_flow_userdef *data) 2617 { 2618 u64 value = 0, mask = 0; 2619 2620 if (data->flex_filter) { 2621 value |= data->flex_word; 2622 value |= (u64)data->flex_offset << 16; 2623 mask |= I40E_USERDEF_FLEX_FILTER; 2624 } 2625 2626 if (value || mask) 2627 fsp->flow_type |= FLOW_EXT; 2628 2629 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2630 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2631 } 2632 2633 /** 2634 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2635 * @pf: Pointer to the physical function struct 2636 * @cmd: The command to get or set Rx flow classification rules 2637 * @rule_locs: Array of used rule locations 2638 * 2639 * This function populates both the total and actual rule count of 2640 * the ethtool flow classification command 2641 * 2642 * Returns 0 on success or -EMSGSIZE if entry not found 2643 **/ 2644 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2645 struct ethtool_rxnfc *cmd, 2646 u32 *rule_locs) 2647 { 2648 struct i40e_fdir_filter *rule; 2649 struct hlist_node *node2; 2650 int cnt = 0; 2651 2652 /* report total rule count */ 2653 cmd->data = i40e_get_fd_cnt_all(pf); 2654 2655 hlist_for_each_entry_safe(rule, node2, 2656 &pf->fdir_filter_list, fdir_node) { 2657 if (cnt == cmd->rule_cnt) 2658 return -EMSGSIZE; 2659 2660 rule_locs[cnt] = rule->fd_id; 2661 cnt++; 2662 } 2663 2664 cmd->rule_cnt = cnt; 2665 2666 return 0; 2667 } 2668 2669 /** 2670 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2671 * @pf: Pointer to the physical function struct 2672 * @cmd: The command to get or set Rx flow classification rules 2673 * 2674 * This function looks up a filter based on the Rx flow classification 2675 * command and fills the flow spec info for it if found 2676 * 2677 * Returns 0 on success or -EINVAL if filter not found 2678 **/ 2679 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2680 struct ethtool_rxnfc *cmd) 2681 { 2682 struct ethtool_rx_flow_spec *fsp = 2683 (struct ethtool_rx_flow_spec *)&cmd->fs; 2684 struct i40e_rx_flow_userdef userdef = {0}; 2685 struct i40e_fdir_filter *rule = NULL; 2686 struct hlist_node *node2; 2687 u64 input_set; 2688 u16 index; 2689 2690 hlist_for_each_entry_safe(rule, node2, 2691 &pf->fdir_filter_list, fdir_node) { 2692 if (fsp->location <= rule->fd_id) 2693 break; 2694 } 2695 2696 if (!rule || fsp->location != rule->fd_id) 2697 return -EINVAL; 2698 2699 fsp->flow_type = rule->flow_type; 2700 if (fsp->flow_type == IP_USER_FLOW) { 2701 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2702 fsp->h_u.usr_ip4_spec.proto = 0; 2703 fsp->m_u.usr_ip4_spec.proto = 0; 2704 } 2705 2706 /* Reverse the src and dest notion, since the HW views them from 2707 * Tx perspective where as the user expects it from Rx filter view. 2708 */ 2709 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2710 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2711 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2712 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2713 2714 switch (rule->flow_type) { 2715 case SCTP_V4_FLOW: 2716 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2717 break; 2718 case TCP_V4_FLOW: 2719 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2720 break; 2721 case UDP_V4_FLOW: 2722 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2723 break; 2724 case IP_USER_FLOW: 2725 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2726 break; 2727 default: 2728 /* If we have stored a filter with a flow type not listed here 2729 * it is almost certainly a driver bug. WARN(), and then 2730 * assign the input_set as if all fields are enabled to avoid 2731 * reading unassigned memory. 2732 */ 2733 WARN(1, "Missing input set index for flow_type %d\n", 2734 rule->flow_type); 2735 input_set = 0xFFFFFFFFFFFFFFFFULL; 2736 goto no_input_set; 2737 } 2738 2739 input_set = i40e_read_fd_input_set(pf, index); 2740 2741 no_input_set: 2742 if (input_set & I40E_L3_SRC_MASK) 2743 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF); 2744 2745 if (input_set & I40E_L3_DST_MASK) 2746 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF); 2747 2748 if (input_set & I40E_L4_SRC_MASK) 2749 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF); 2750 2751 if (input_set & I40E_L4_DST_MASK) 2752 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF); 2753 2754 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2755 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2756 else 2757 fsp->ring_cookie = rule->q_index; 2758 2759 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2760 struct i40e_vsi *vsi; 2761 2762 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2763 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2764 /* VFs are zero-indexed by the driver, but ethtool 2765 * expects them to be one-indexed, so add one here 2766 */ 2767 u64 ring_vf = vsi->vf_id + 1; 2768 2769 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2770 fsp->ring_cookie |= ring_vf; 2771 } 2772 } 2773 2774 if (rule->flex_filter) { 2775 userdef.flex_filter = true; 2776 userdef.flex_word = be16_to_cpu(rule->flex_word); 2777 userdef.flex_offset = rule->flex_offset; 2778 } 2779 2780 i40e_fill_rx_flow_user_data(fsp, &userdef); 2781 2782 return 0; 2783 } 2784 2785 /** 2786 * i40e_get_rxnfc - command to get RX flow classification rules 2787 * @netdev: network interface device structure 2788 * @cmd: ethtool rxnfc command 2789 * 2790 * Returns Success if the command is supported. 2791 **/ 2792 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2793 u32 *rule_locs) 2794 { 2795 struct i40e_netdev_priv *np = netdev_priv(netdev); 2796 struct i40e_vsi *vsi = np->vsi; 2797 struct i40e_pf *pf = vsi->back; 2798 int ret = -EOPNOTSUPP; 2799 2800 switch (cmd->cmd) { 2801 case ETHTOOL_GRXRINGS: 2802 cmd->data = vsi->rss_size; 2803 ret = 0; 2804 break; 2805 case ETHTOOL_GRXFH: 2806 ret = i40e_get_rss_hash_opts(pf, cmd); 2807 break; 2808 case ETHTOOL_GRXCLSRLCNT: 2809 cmd->rule_cnt = pf->fdir_pf_active_filters; 2810 /* report total rule count */ 2811 cmd->data = i40e_get_fd_cnt_all(pf); 2812 ret = 0; 2813 break; 2814 case ETHTOOL_GRXCLSRULE: 2815 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2816 break; 2817 case ETHTOOL_GRXCLSRLALL: 2818 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2819 break; 2820 default: 2821 break; 2822 } 2823 2824 return ret; 2825 } 2826 2827 /** 2828 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2829 * @nfc: pointer to user request 2830 * @i_setc bits currently set 2831 * 2832 * Returns value of bits to be set per user request 2833 **/ 2834 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2835 { 2836 u64 i_set = i_setc; 2837 u64 src_l3 = 0, dst_l3 = 0; 2838 2839 if (nfc->data & RXH_L4_B_0_1) 2840 i_set |= I40E_L4_SRC_MASK; 2841 else 2842 i_set &= ~I40E_L4_SRC_MASK; 2843 if (nfc->data & RXH_L4_B_2_3) 2844 i_set |= I40E_L4_DST_MASK; 2845 else 2846 i_set &= ~I40E_L4_DST_MASK; 2847 2848 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2849 src_l3 = I40E_L3_V6_SRC_MASK; 2850 dst_l3 = I40E_L3_V6_DST_MASK; 2851 } else if (nfc->flow_type == TCP_V4_FLOW || 2852 nfc->flow_type == UDP_V4_FLOW) { 2853 src_l3 = I40E_L3_SRC_MASK; 2854 dst_l3 = I40E_L3_DST_MASK; 2855 } else { 2856 /* Any other flow type are not supported here */ 2857 return i_set; 2858 } 2859 2860 if (nfc->data & RXH_IP_SRC) 2861 i_set |= src_l3; 2862 else 2863 i_set &= ~src_l3; 2864 if (nfc->data & RXH_IP_DST) 2865 i_set |= dst_l3; 2866 else 2867 i_set &= ~dst_l3; 2868 2869 return i_set; 2870 } 2871 2872 /** 2873 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2874 * @pf: pointer to the physical function struct 2875 * @cmd: ethtool rxnfc command 2876 * 2877 * Returns Success if the flow input set is supported. 2878 **/ 2879 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2880 { 2881 struct i40e_hw *hw = &pf->hw; 2882 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2883 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2884 u8 flow_pctype = 0; 2885 u64 i_set, i_setc; 2886 2887 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2888 dev_err(&pf->pdev->dev, 2889 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2890 return -EOPNOTSUPP; 2891 } 2892 2893 /* RSS does not support anything other than hashing 2894 * to queues on src and dst IPs and ports 2895 */ 2896 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2897 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2898 return -EINVAL; 2899 2900 switch (nfc->flow_type) { 2901 case TCP_V4_FLOW: 2902 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2903 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2904 hena |= 2905 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2906 break; 2907 case TCP_V6_FLOW: 2908 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2909 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2910 hena |= 2911 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2912 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2913 hena |= 2914 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2915 break; 2916 case UDP_V4_FLOW: 2917 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2918 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2919 hena |= 2920 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2921 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2922 2923 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2924 break; 2925 case UDP_V6_FLOW: 2926 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2927 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2928 hena |= 2929 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2930 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2931 2932 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2933 break; 2934 case AH_ESP_V4_FLOW: 2935 case AH_V4_FLOW: 2936 case ESP_V4_FLOW: 2937 case SCTP_V4_FLOW: 2938 if ((nfc->data & RXH_L4_B_0_1) || 2939 (nfc->data & RXH_L4_B_2_3)) 2940 return -EINVAL; 2941 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2942 break; 2943 case AH_ESP_V6_FLOW: 2944 case AH_V6_FLOW: 2945 case ESP_V6_FLOW: 2946 case SCTP_V6_FLOW: 2947 if ((nfc->data & RXH_L4_B_0_1) || 2948 (nfc->data & RXH_L4_B_2_3)) 2949 return -EINVAL; 2950 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2951 break; 2952 case IPV4_FLOW: 2953 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2954 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2955 break; 2956 case IPV6_FLOW: 2957 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2958 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2959 break; 2960 default: 2961 return -EINVAL; 2962 } 2963 2964 if (flow_pctype) { 2965 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2966 flow_pctype)) | 2967 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2968 flow_pctype)) << 32); 2969 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2970 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2971 (u32)i_set); 2972 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2973 (u32)(i_set >> 32)); 2974 hena |= BIT_ULL(flow_pctype); 2975 } 2976 2977 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2978 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2979 i40e_flush(hw); 2980 2981 return 0; 2982 } 2983 2984 /** 2985 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2986 * @vsi: Pointer to the targeted VSI 2987 * @input: The filter to update or NULL to indicate deletion 2988 * @sw_idx: Software index to the filter 2989 * @cmd: The command to get or set Rx flow classification rules 2990 * 2991 * This function updates (or deletes) a Flow Director entry from 2992 * the hlist of the corresponding PF 2993 * 2994 * Returns 0 on success 2995 **/ 2996 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2997 struct i40e_fdir_filter *input, 2998 u16 sw_idx, 2999 struct ethtool_rxnfc *cmd) 3000 { 3001 struct i40e_fdir_filter *rule, *parent; 3002 struct i40e_pf *pf = vsi->back; 3003 struct hlist_node *node2; 3004 int err = -EINVAL; 3005 3006 parent = NULL; 3007 rule = NULL; 3008 3009 hlist_for_each_entry_safe(rule, node2, 3010 &pf->fdir_filter_list, fdir_node) { 3011 /* hash found, or no matching entry */ 3012 if (rule->fd_id >= sw_idx) 3013 break; 3014 parent = rule; 3015 } 3016 3017 /* if there is an old rule occupying our place remove it */ 3018 if (rule && (rule->fd_id == sw_idx)) { 3019 /* Remove this rule, since we're either deleting it, or 3020 * replacing it. 3021 */ 3022 err = i40e_add_del_fdir(vsi, rule, false); 3023 hlist_del(&rule->fdir_node); 3024 kfree(rule); 3025 pf->fdir_pf_active_filters--; 3026 } 3027 3028 /* If we weren't given an input, this is a delete, so just return the 3029 * error code indicating if there was an entry at the requested slot 3030 */ 3031 if (!input) 3032 return err; 3033 3034 /* Otherwise, install the new rule as requested */ 3035 INIT_HLIST_NODE(&input->fdir_node); 3036 3037 /* add filter to the list */ 3038 if (parent) 3039 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3040 else 3041 hlist_add_head(&input->fdir_node, 3042 &pf->fdir_filter_list); 3043 3044 /* update counts */ 3045 pf->fdir_pf_active_filters++; 3046 3047 return 0; 3048 } 3049 3050 /** 3051 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3052 * @pf: pointer to PF structure 3053 * 3054 * This function searches the list of filters and determines which FLX_PIT 3055 * entries are still required. It will prune any entries which are no longer 3056 * in use after the deletion. 3057 **/ 3058 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3059 { 3060 struct i40e_flex_pit *entry, *tmp; 3061 struct i40e_fdir_filter *rule; 3062 3063 /* First, we'll check the l3 table */ 3064 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3065 bool found = false; 3066 3067 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3068 if (rule->flow_type != IP_USER_FLOW) 3069 continue; 3070 if (rule->flex_filter && 3071 rule->flex_offset == entry->src_offset) { 3072 found = true; 3073 break; 3074 } 3075 } 3076 3077 /* If we didn't find the filter, then we can prune this entry 3078 * from the list. 3079 */ 3080 if (!found) { 3081 list_del(&entry->list); 3082 kfree(entry); 3083 } 3084 } 3085 3086 /* Followed by the L4 table */ 3087 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3088 bool found = false; 3089 3090 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3091 /* Skip this filter if it's L3, since we already 3092 * checked those in the above loop 3093 */ 3094 if (rule->flow_type == IP_USER_FLOW) 3095 continue; 3096 if (rule->flex_filter && 3097 rule->flex_offset == entry->src_offset) { 3098 found = true; 3099 break; 3100 } 3101 } 3102 3103 /* If we didn't find the filter, then we can prune this entry 3104 * from the list. 3105 */ 3106 if (!found) { 3107 list_del(&entry->list); 3108 kfree(entry); 3109 } 3110 } 3111 } 3112 3113 /** 3114 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3115 * @vsi: Pointer to the targeted VSI 3116 * @cmd: The command to get or set Rx flow classification rules 3117 * 3118 * The function removes a Flow Director filter entry from the 3119 * hlist of the corresponding PF 3120 * 3121 * Returns 0 on success 3122 */ 3123 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3124 struct ethtool_rxnfc *cmd) 3125 { 3126 struct ethtool_rx_flow_spec *fsp = 3127 (struct ethtool_rx_flow_spec *)&cmd->fs; 3128 struct i40e_pf *pf = vsi->back; 3129 int ret = 0; 3130 3131 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3132 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3133 return -EBUSY; 3134 3135 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3136 return -EBUSY; 3137 3138 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3139 3140 i40e_prune_flex_pit_list(pf); 3141 3142 i40e_fdir_check_and_reenable(pf); 3143 return ret; 3144 } 3145 3146 /** 3147 * i40e_unused_pit_index - Find an unused PIT index for given list 3148 * @pf: the PF data structure 3149 * 3150 * Find the first unused flexible PIT index entry. We search both the L3 and 3151 * L4 flexible PIT lists so that the returned index is unique and unused by 3152 * either currently programmed L3 or L4 filters. We use a bit field as storage 3153 * to track which indexes are already used. 3154 **/ 3155 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3156 { 3157 unsigned long available_index = 0xFF; 3158 struct i40e_flex_pit *entry; 3159 3160 /* We need to make sure that the new index isn't in use by either L3 3161 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3162 * L4 to use the same index. 3163 */ 3164 3165 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3166 clear_bit(entry->pit_index, &available_index); 3167 3168 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3169 clear_bit(entry->pit_index, &available_index); 3170 3171 return find_first_bit(&available_index, 8); 3172 } 3173 3174 /** 3175 * i40e_find_flex_offset - Find an existing flex src_offset 3176 * @flex_pit_list: L3 or L4 flex PIT list 3177 * @src_offset: new src_offset to find 3178 * 3179 * Searches the flex_pit_list for an existing offset. If no offset is 3180 * currently programmed, then this will return an ERR_PTR if there is no space 3181 * to add a new offset, otherwise it returns NULL. 3182 **/ 3183 static 3184 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3185 u16 src_offset) 3186 { 3187 struct i40e_flex_pit *entry; 3188 int size = 0; 3189 3190 /* Search for the src_offset first. If we find a matching entry 3191 * already programmed, we can simply re-use it. 3192 */ 3193 list_for_each_entry(entry, flex_pit_list, list) { 3194 size++; 3195 if (entry->src_offset == src_offset) 3196 return entry; 3197 } 3198 3199 /* If we haven't found an entry yet, then the provided src offset has 3200 * not yet been programmed. We will program the src offset later on, 3201 * but we need to indicate whether there is enough space to do so 3202 * here. We'll make use of ERR_PTR for this purpose. 3203 */ 3204 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3205 return ERR_PTR(-ENOSPC); 3206 3207 return NULL; 3208 } 3209 3210 /** 3211 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3212 * @flex_pit_list: L3 or L4 flex PIT list 3213 * @src_offset: new src_offset to add 3214 * @pit_index: the PIT index to program 3215 * 3216 * This function programs the new src_offset to the list. It is expected that 3217 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3218 * that this offset is not programmed, and that the list has enough space to 3219 * store another offset. 3220 * 3221 * Returns 0 on success, and negative value on error. 3222 **/ 3223 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3224 u16 src_offset, 3225 u8 pit_index) 3226 { 3227 struct i40e_flex_pit *new_pit, *entry; 3228 3229 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3230 if (!new_pit) 3231 return -ENOMEM; 3232 3233 new_pit->src_offset = src_offset; 3234 new_pit->pit_index = pit_index; 3235 3236 /* We need to insert this item such that the list is sorted by 3237 * src_offset in ascending order. 3238 */ 3239 list_for_each_entry(entry, flex_pit_list, list) { 3240 if (new_pit->src_offset < entry->src_offset) { 3241 list_add_tail(&new_pit->list, &entry->list); 3242 return 0; 3243 } 3244 3245 /* If we found an entry with our offset already programmed we 3246 * can simply return here, after freeing the memory. However, 3247 * if the pit_index does not match we need to report an error. 3248 */ 3249 if (new_pit->src_offset == entry->src_offset) { 3250 int err = 0; 3251 3252 /* If the PIT index is not the same we can't re-use 3253 * the entry, so we must report an error. 3254 */ 3255 if (new_pit->pit_index != entry->pit_index) 3256 err = -EINVAL; 3257 3258 kfree(new_pit); 3259 return err; 3260 } 3261 } 3262 3263 /* If we reached here, then we haven't yet added the item. This means 3264 * that we should add the item at the end of the list. 3265 */ 3266 list_add_tail(&new_pit->list, flex_pit_list); 3267 return 0; 3268 } 3269 3270 /** 3271 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3272 * @pf: Pointer to the PF structure 3273 * @flex_pit_list: list of flexible src offsets in use 3274 * #flex_pit_start: index to first entry for this section of the table 3275 * 3276 * In order to handle flexible data, the hardware uses a table of values 3277 * called the FLX_PIT table. This table is used to indicate which sections of 3278 * the input correspond to what PIT index values. Unfortunately, hardware is 3279 * very restrictive about programming this table. Entries must be ordered by 3280 * src_offset in ascending order, without duplicates. Additionally, unused 3281 * entries must be set to the unused index value, and must have valid size and 3282 * length according to the src_offset ordering. 3283 * 3284 * This function will reprogram the FLX_PIT register from a book-keeping 3285 * structure that we guarantee is already ordered correctly, and has no more 3286 * than 3 entries. 3287 * 3288 * To make things easier, we only support flexible values of one word length, 3289 * rather than allowing variable length flexible values. 3290 **/ 3291 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3292 struct list_head *flex_pit_list, 3293 int flex_pit_start) 3294 { 3295 struct i40e_flex_pit *entry = NULL; 3296 u16 last_offset = 0; 3297 int i = 0, j = 0; 3298 3299 /* First, loop over the list of flex PIT entries, and reprogram the 3300 * registers. 3301 */ 3302 list_for_each_entry(entry, flex_pit_list, list) { 3303 /* We have to be careful when programming values for the 3304 * largest SRC_OFFSET value. It is possible that adding 3305 * additional empty values at the end would overflow the space 3306 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3307 * we check here and add the empty values prior to adding the 3308 * largest value. 3309 * 3310 * To determine this, we will use a loop from i+1 to 3, which 3311 * will determine whether the unused entries would have valid 3312 * SRC_OFFSET. Note that there cannot be extra entries past 3313 * this value, because the only valid values would have been 3314 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3315 * have been added to the list in the first place. 3316 */ 3317 for (j = i + 1; j < 3; j++) { 3318 u16 offset = entry->src_offset + j; 3319 int index = flex_pit_start + i; 3320 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3321 1, 3322 offset - 3); 3323 3324 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3325 i40e_write_rx_ctl(&pf->hw, 3326 I40E_PRTQF_FLX_PIT(index), 3327 value); 3328 i++; 3329 } 3330 } 3331 3332 /* Now, we can program the actual value into the table */ 3333 i40e_write_rx_ctl(&pf->hw, 3334 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3335 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3336 1, 3337 entry->src_offset)); 3338 i++; 3339 } 3340 3341 /* In order to program the last entries in the table, we need to 3342 * determine the valid offset. If the list is empty, we'll just start 3343 * with 0. Otherwise, we'll start with the last item offset and add 1. 3344 * This ensures that all entries have valid sizes. If we don't do this 3345 * correctly, the hardware will disable flexible field parsing. 3346 */ 3347 if (!list_empty(flex_pit_list)) 3348 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3349 3350 for (; i < 3; i++, last_offset++) { 3351 i40e_write_rx_ctl(&pf->hw, 3352 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3353 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3354 1, 3355 last_offset)); 3356 } 3357 } 3358 3359 /** 3360 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3361 * @pf: pointer to the PF structure 3362 * 3363 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3364 * internal helper function for implementation details. 3365 **/ 3366 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3367 { 3368 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3369 I40E_FLEX_PIT_IDX_START_L3); 3370 3371 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3372 I40E_FLEX_PIT_IDX_START_L4); 3373 3374 /* We also need to program the L3 and L4 GLQF ORT register */ 3375 i40e_write_rx_ctl(&pf->hw, 3376 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3377 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3378 3, 1)); 3379 3380 i40e_write_rx_ctl(&pf->hw, 3381 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3382 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3383 3, 1)); 3384 } 3385 3386 /** 3387 * i40e_flow_str - Converts a flow_type into a human readable string 3388 * @flow_type: the flow type from a flow specification 3389 * 3390 * Currently only flow types we support are included here, and the string 3391 * value attempts to match what ethtool would use to configure this flow type. 3392 **/ 3393 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3394 { 3395 switch (fsp->flow_type & ~FLOW_EXT) { 3396 case TCP_V4_FLOW: 3397 return "tcp4"; 3398 case UDP_V4_FLOW: 3399 return "udp4"; 3400 case SCTP_V4_FLOW: 3401 return "sctp4"; 3402 case IP_USER_FLOW: 3403 return "ip4"; 3404 default: 3405 return "unknown"; 3406 } 3407 } 3408 3409 /** 3410 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3411 * @pit_index: PIT index to convert 3412 * 3413 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3414 * of range. 3415 **/ 3416 static u64 i40e_pit_index_to_mask(int pit_index) 3417 { 3418 switch (pit_index) { 3419 case 0: 3420 return I40E_FLEX_50_MASK; 3421 case 1: 3422 return I40E_FLEX_51_MASK; 3423 case 2: 3424 return I40E_FLEX_52_MASK; 3425 case 3: 3426 return I40E_FLEX_53_MASK; 3427 case 4: 3428 return I40E_FLEX_54_MASK; 3429 case 5: 3430 return I40E_FLEX_55_MASK; 3431 case 6: 3432 return I40E_FLEX_56_MASK; 3433 case 7: 3434 return I40E_FLEX_57_MASK; 3435 default: 3436 return 0; 3437 } 3438 } 3439 3440 /** 3441 * i40e_print_input_set - Show changes between two input sets 3442 * @vsi: the vsi being configured 3443 * @old: the old input set 3444 * @new: the new input set 3445 * 3446 * Print the difference between old and new input sets by showing which series 3447 * of words are toggled on or off. Only displays the bits we actually support 3448 * changing. 3449 **/ 3450 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3451 { 3452 struct i40e_pf *pf = vsi->back; 3453 bool old_value, new_value; 3454 int i; 3455 3456 old_value = !!(old & I40E_L3_SRC_MASK); 3457 new_value = !!(new & I40E_L3_SRC_MASK); 3458 if (old_value != new_value) 3459 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3460 old_value ? "ON" : "OFF", 3461 new_value ? "ON" : "OFF"); 3462 3463 old_value = !!(old & I40E_L3_DST_MASK); 3464 new_value = !!(new & I40E_L3_DST_MASK); 3465 if (old_value != new_value) 3466 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3467 old_value ? "ON" : "OFF", 3468 new_value ? "ON" : "OFF"); 3469 3470 old_value = !!(old & I40E_L4_SRC_MASK); 3471 new_value = !!(new & I40E_L4_SRC_MASK); 3472 if (old_value != new_value) 3473 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3474 old_value ? "ON" : "OFF", 3475 new_value ? "ON" : "OFF"); 3476 3477 old_value = !!(old & I40E_L4_DST_MASK); 3478 new_value = !!(new & I40E_L4_DST_MASK); 3479 if (old_value != new_value) 3480 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3481 old_value ? "ON" : "OFF", 3482 new_value ? "ON" : "OFF"); 3483 3484 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3485 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3486 if (old_value != new_value) 3487 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3488 old_value ? "ON" : "OFF", 3489 new_value ? "ON" : "OFF"); 3490 3491 /* Show change of flexible filter entries */ 3492 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3493 u64 flex_mask = i40e_pit_index_to_mask(i); 3494 3495 old_value = !!(old & flex_mask); 3496 new_value = !!(new & flex_mask); 3497 if (old_value != new_value) 3498 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3499 i, 3500 old_value ? "ON" : "OFF", 3501 new_value ? "ON" : "OFF"); 3502 } 3503 3504 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3505 old); 3506 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3507 new); 3508 } 3509 3510 /** 3511 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3512 * @vsi: pointer to the targeted VSI 3513 * @fsp: pointer to Rx flow specification 3514 * @userdef: userdefined data from flow specification 3515 * 3516 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3517 * for partial matches exists with a few limitations. First, hardware only 3518 * supports masking by word boundary (2 bytes) and not per individual bit. 3519 * Second, hardware is limited to using one mask for a flow type and cannot 3520 * use a separate mask for each filter. 3521 * 3522 * To support these limitations, if we already have a configured filter for 3523 * the specified type, this function enforces that new filters of the type 3524 * match the configured input set. Otherwise, if we do not have a filter of 3525 * the specified type, we allow the input set to be updated to match the 3526 * desired filter. 3527 * 3528 * To help ensure that administrators understand why filters weren't displayed 3529 * as supported, we print a diagnostic message displaying how the input set 3530 * would change and warning to delete the preexisting filters if required. 3531 * 3532 * Returns 0 on successful input set match, and a negative return code on 3533 * failure. 3534 **/ 3535 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3536 struct ethtool_rx_flow_spec *fsp, 3537 struct i40e_rx_flow_userdef *userdef) 3538 { 3539 struct i40e_pf *pf = vsi->back; 3540 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3541 struct ethtool_usrip4_spec *usr_ip4_spec; 3542 u64 current_mask, new_mask; 3543 bool new_flex_offset = false; 3544 bool flex_l3 = false; 3545 u16 *fdir_filter_count; 3546 u16 index, src_offset = 0; 3547 u8 pit_index = 0; 3548 int err; 3549 3550 switch (fsp->flow_type & ~FLOW_EXT) { 3551 case SCTP_V4_FLOW: 3552 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3553 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3554 break; 3555 case TCP_V4_FLOW: 3556 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3557 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3558 break; 3559 case UDP_V4_FLOW: 3560 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3561 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3562 break; 3563 case IP_USER_FLOW: 3564 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3565 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3566 flex_l3 = true; 3567 break; 3568 default: 3569 return -EOPNOTSUPP; 3570 } 3571 3572 /* Read the current input set from register memory. */ 3573 current_mask = i40e_read_fd_input_set(pf, index); 3574 new_mask = current_mask; 3575 3576 /* Determine, if any, the required changes to the input set in order 3577 * to support the provided mask. 3578 * 3579 * Hardware only supports masking at word (2 byte) granularity and does 3580 * not support full bitwise masking. This implementation simplifies 3581 * even further and only supports fully enabled or fully disabled 3582 * masks for each field, even though we could split the ip4src and 3583 * ip4dst fields. 3584 */ 3585 switch (fsp->flow_type & ~FLOW_EXT) { 3586 case SCTP_V4_FLOW: 3587 new_mask &= ~I40E_VERIFY_TAG_MASK; 3588 /* Fall through */ 3589 case TCP_V4_FLOW: 3590 case UDP_V4_FLOW: 3591 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3592 3593 /* IPv4 source address */ 3594 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3595 new_mask |= I40E_L3_SRC_MASK; 3596 else if (!tcp_ip4_spec->ip4src) 3597 new_mask &= ~I40E_L3_SRC_MASK; 3598 else 3599 return -EOPNOTSUPP; 3600 3601 /* IPv4 destination address */ 3602 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3603 new_mask |= I40E_L3_DST_MASK; 3604 else if (!tcp_ip4_spec->ip4dst) 3605 new_mask &= ~I40E_L3_DST_MASK; 3606 else 3607 return -EOPNOTSUPP; 3608 3609 /* L4 source port */ 3610 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3611 new_mask |= I40E_L4_SRC_MASK; 3612 else if (!tcp_ip4_spec->psrc) 3613 new_mask &= ~I40E_L4_SRC_MASK; 3614 else 3615 return -EOPNOTSUPP; 3616 3617 /* L4 destination port */ 3618 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3619 new_mask |= I40E_L4_DST_MASK; 3620 else if (!tcp_ip4_spec->pdst) 3621 new_mask &= ~I40E_L4_DST_MASK; 3622 else 3623 return -EOPNOTSUPP; 3624 3625 /* Filtering on Type of Service is not supported. */ 3626 if (tcp_ip4_spec->tos) 3627 return -EOPNOTSUPP; 3628 3629 break; 3630 case IP_USER_FLOW: 3631 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3632 3633 /* IPv4 source address */ 3634 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3635 new_mask |= I40E_L3_SRC_MASK; 3636 else if (!usr_ip4_spec->ip4src) 3637 new_mask &= ~I40E_L3_SRC_MASK; 3638 else 3639 return -EOPNOTSUPP; 3640 3641 /* IPv4 destination address */ 3642 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3643 new_mask |= I40E_L3_DST_MASK; 3644 else if (!usr_ip4_spec->ip4dst) 3645 new_mask &= ~I40E_L3_DST_MASK; 3646 else 3647 return -EOPNOTSUPP; 3648 3649 /* First 4 bytes of L4 header */ 3650 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3651 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3652 else if (!usr_ip4_spec->l4_4_bytes) 3653 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3654 else 3655 return -EOPNOTSUPP; 3656 3657 /* Filtering on Type of Service is not supported. */ 3658 if (usr_ip4_spec->tos) 3659 return -EOPNOTSUPP; 3660 3661 /* Filtering on IP version is not supported */ 3662 if (usr_ip4_spec->ip_ver) 3663 return -EINVAL; 3664 3665 /* Filtering on L4 protocol is not supported */ 3666 if (usr_ip4_spec->proto) 3667 return -EINVAL; 3668 3669 break; 3670 default: 3671 return -EOPNOTSUPP; 3672 } 3673 3674 /* First, clear all flexible filter entries */ 3675 new_mask &= ~I40E_FLEX_INPUT_MASK; 3676 3677 /* If we have a flexible filter, try to add this offset to the correct 3678 * flexible filter PIT list. Once finished, we can update the mask. 3679 * If the src_offset changed, we will get a new mask value which will 3680 * trigger an input set change. 3681 */ 3682 if (userdef->flex_filter) { 3683 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3684 3685 /* Flexible offset must be even, since the flexible payload 3686 * must be aligned on 2-byte boundary. 3687 */ 3688 if (userdef->flex_offset & 0x1) { 3689 dev_warn(&pf->pdev->dev, 3690 "Flexible data offset must be 2-byte aligned\n"); 3691 return -EINVAL; 3692 } 3693 3694 src_offset = userdef->flex_offset >> 1; 3695 3696 /* FLX_PIT source offset value is only so large */ 3697 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3698 dev_warn(&pf->pdev->dev, 3699 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3700 return -EINVAL; 3701 } 3702 3703 /* See if this offset has already been programmed. If we get 3704 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3705 * if we get a NULL pointer, this means we will need to add 3706 * the offset. 3707 */ 3708 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3709 src_offset); 3710 if (IS_ERR(flex_pit)) 3711 return PTR_ERR(flex_pit); 3712 3713 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3714 * packet types, and thus we need to program both L3 and L4 3715 * flexible values. These must have identical flexible index, 3716 * as otherwise we can't correctly program the input set. So 3717 * we'll find both an L3 and L4 index and make sure they are 3718 * the same. 3719 */ 3720 if (flex_l3) { 3721 l3_flex_pit = 3722 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3723 src_offset); 3724 if (IS_ERR(l3_flex_pit)) 3725 return PTR_ERR(l3_flex_pit); 3726 3727 if (flex_pit) { 3728 /* If we already had a matching L4 entry, we 3729 * need to make sure that the L3 entry we 3730 * obtained uses the same index. 3731 */ 3732 if (l3_flex_pit) { 3733 if (l3_flex_pit->pit_index != 3734 flex_pit->pit_index) { 3735 return -EINVAL; 3736 } 3737 } else { 3738 new_flex_offset = true; 3739 } 3740 } else { 3741 flex_pit = l3_flex_pit; 3742 } 3743 } 3744 3745 /* If we didn't find an existing flex offset, we need to 3746 * program a new one. However, we don't immediately program it 3747 * here because we will wait to program until after we check 3748 * that it is safe to change the input set. 3749 */ 3750 if (!flex_pit) { 3751 new_flex_offset = true; 3752 pit_index = i40e_unused_pit_index(pf); 3753 } else { 3754 pit_index = flex_pit->pit_index; 3755 } 3756 3757 /* Update the mask with the new offset */ 3758 new_mask |= i40e_pit_index_to_mask(pit_index); 3759 } 3760 3761 /* If the mask and flexible filter offsets for this filter match the 3762 * currently programmed values we don't need any input set change, so 3763 * this filter is safe to install. 3764 */ 3765 if (new_mask == current_mask && !new_flex_offset) 3766 return 0; 3767 3768 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3769 i40e_flow_str(fsp)); 3770 i40e_print_input_set(vsi, current_mask, new_mask); 3771 if (new_flex_offset) { 3772 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3773 pit_index, src_offset); 3774 } 3775 3776 /* Hardware input sets are global across multiple ports, so even the 3777 * main port cannot change them when in MFP mode as this would impact 3778 * any filters on the other ports. 3779 */ 3780 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3781 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3782 return -EOPNOTSUPP; 3783 } 3784 3785 /* This filter requires us to update the input set. However, hardware 3786 * only supports one input set per flow type, and does not support 3787 * separate masks for each filter. This means that we can only support 3788 * a single mask for all filters of a specific type. 3789 * 3790 * If we have preexisting filters, they obviously depend on the 3791 * current programmed input set. Display a diagnostic message in this 3792 * case explaining why the filter could not be accepted. 3793 */ 3794 if (*fdir_filter_count) { 3795 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3796 i40e_flow_str(fsp), 3797 *fdir_filter_count); 3798 return -EOPNOTSUPP; 3799 } 3800 3801 i40e_write_fd_input_set(pf, index, new_mask); 3802 3803 /* Add the new offset and update table, if necessary */ 3804 if (new_flex_offset) { 3805 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3806 pit_index); 3807 if (err) 3808 return err; 3809 3810 if (flex_l3) { 3811 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3812 src_offset, 3813 pit_index); 3814 if (err) 3815 return err; 3816 } 3817 3818 i40e_reprogram_flex_pit(pf); 3819 } 3820 3821 return 0; 3822 } 3823 3824 /** 3825 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3826 * @vsi: pointer to the targeted VSI 3827 * @cmd: command to get or set RX flow classification rules 3828 * 3829 * Add Flow Director filters for a specific flow spec based on their 3830 * protocol. Returns 0 if the filters were successfully added. 3831 **/ 3832 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3833 struct ethtool_rxnfc *cmd) 3834 { 3835 struct i40e_rx_flow_userdef userdef; 3836 struct ethtool_rx_flow_spec *fsp; 3837 struct i40e_fdir_filter *input; 3838 u16 dest_vsi = 0, q_index = 0; 3839 struct i40e_pf *pf; 3840 int ret = -EINVAL; 3841 u8 dest_ctl; 3842 3843 if (!vsi) 3844 return -EINVAL; 3845 pf = vsi->back; 3846 3847 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3848 return -EOPNOTSUPP; 3849 3850 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3851 return -ENOSPC; 3852 3853 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3854 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3855 return -EBUSY; 3856 3857 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3858 return -EBUSY; 3859 3860 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3861 3862 /* Parse the user-defined field */ 3863 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3864 return -EINVAL; 3865 3866 /* Extended MAC field is not supported */ 3867 if (fsp->flow_type & FLOW_MAC_EXT) 3868 return -EINVAL; 3869 3870 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3871 if (ret) 3872 return ret; 3873 3874 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3875 pf->hw.func_caps.fd_filters_guaranteed)) { 3876 return -EINVAL; 3877 } 3878 3879 /* ring_cookie is either the drop index, or is a mask of the queue 3880 * index and VF id we wish to target. 3881 */ 3882 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3883 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3884 } else { 3885 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3886 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3887 3888 if (!vf) { 3889 if (ring >= vsi->num_queue_pairs) 3890 return -EINVAL; 3891 dest_vsi = vsi->id; 3892 } else { 3893 /* VFs are zero-indexed, so we subtract one here */ 3894 vf--; 3895 3896 if (vf >= pf->num_alloc_vfs) 3897 return -EINVAL; 3898 if (ring >= pf->vf[vf].num_queue_pairs) 3899 return -EINVAL; 3900 dest_vsi = pf->vf[vf].lan_vsi_id; 3901 } 3902 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3903 q_index = ring; 3904 } 3905 3906 input = kzalloc(sizeof(*input), GFP_KERNEL); 3907 3908 if (!input) 3909 return -ENOMEM; 3910 3911 input->fd_id = fsp->location; 3912 input->q_index = q_index; 3913 input->dest_vsi = dest_vsi; 3914 input->dest_ctl = dest_ctl; 3915 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 3916 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 3917 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3918 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3919 input->flow_type = fsp->flow_type & ~FLOW_EXT; 3920 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 3921 3922 /* Reverse the src and dest notion, since the HW expects them to be from 3923 * Tx perspective where as the input from user is from Rx filter view. 3924 */ 3925 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 3926 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 3927 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3928 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3929 3930 if (userdef.flex_filter) { 3931 input->flex_filter = true; 3932 input->flex_word = cpu_to_be16(userdef.flex_word); 3933 input->flex_offset = userdef.flex_offset; 3934 } 3935 3936 ret = i40e_add_del_fdir(vsi, input, true); 3937 if (ret) 3938 goto free_input; 3939 3940 /* Add the input filter to the fdir_input_list, possibly replacing 3941 * a previous filter. Do not free the input structure after adding it 3942 * to the list as this would cause a use-after-free bug. 3943 */ 3944 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 3945 3946 return 0; 3947 3948 free_input: 3949 kfree(input); 3950 return ret; 3951 } 3952 3953 /** 3954 * i40e_set_rxnfc - command to set RX flow classification rules 3955 * @netdev: network interface device structure 3956 * @cmd: ethtool rxnfc command 3957 * 3958 * Returns Success if the command is supported. 3959 **/ 3960 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 3961 { 3962 struct i40e_netdev_priv *np = netdev_priv(netdev); 3963 struct i40e_vsi *vsi = np->vsi; 3964 struct i40e_pf *pf = vsi->back; 3965 int ret = -EOPNOTSUPP; 3966 3967 switch (cmd->cmd) { 3968 case ETHTOOL_SRXFH: 3969 ret = i40e_set_rss_hash_opt(pf, cmd); 3970 break; 3971 case ETHTOOL_SRXCLSRLINS: 3972 ret = i40e_add_fdir_ethtool(vsi, cmd); 3973 break; 3974 case ETHTOOL_SRXCLSRLDEL: 3975 ret = i40e_del_fdir_entry(vsi, cmd); 3976 break; 3977 default: 3978 break; 3979 } 3980 3981 return ret; 3982 } 3983 3984 /** 3985 * i40e_max_channels - get Max number of combined channels supported 3986 * @vsi: vsi pointer 3987 **/ 3988 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 3989 { 3990 /* TODO: This code assumes DCB and FD is disabled for now. */ 3991 return vsi->alloc_queue_pairs; 3992 } 3993 3994 /** 3995 * i40e_get_channels - Get the current channels enabled and max supported etc. 3996 * @netdev: network interface device structure 3997 * @ch: ethtool channels structure 3998 * 3999 * We don't support separate tx and rx queues as channels. The other count 4000 * represents how many queues are being used for control. max_combined counts 4001 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4002 * q_vectors since we support a lot more queue pairs than q_vectors. 4003 **/ 4004 static void i40e_get_channels(struct net_device *dev, 4005 struct ethtool_channels *ch) 4006 { 4007 struct i40e_netdev_priv *np = netdev_priv(dev); 4008 struct i40e_vsi *vsi = np->vsi; 4009 struct i40e_pf *pf = vsi->back; 4010 4011 /* report maximum channels */ 4012 ch->max_combined = i40e_max_channels(vsi); 4013 4014 /* report info for other vector */ 4015 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4016 ch->max_other = ch->other_count; 4017 4018 /* Note: This code assumes DCB is disabled for now. */ 4019 ch->combined_count = vsi->num_queue_pairs; 4020 } 4021 4022 /** 4023 * i40e_set_channels - Set the new channels count. 4024 * @netdev: network interface device structure 4025 * @ch: ethtool channels structure 4026 * 4027 * The new channels count may not be the same as requested by the user 4028 * since it gets rounded down to a power of 2 value. 4029 **/ 4030 static int i40e_set_channels(struct net_device *dev, 4031 struct ethtool_channels *ch) 4032 { 4033 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4034 struct i40e_netdev_priv *np = netdev_priv(dev); 4035 unsigned int count = ch->combined_count; 4036 struct i40e_vsi *vsi = np->vsi; 4037 struct i40e_pf *pf = vsi->back; 4038 struct i40e_fdir_filter *rule; 4039 struct hlist_node *node2; 4040 int new_count; 4041 int err = 0; 4042 4043 /* We do not support setting channels for any other VSI at present */ 4044 if (vsi->type != I40E_VSI_MAIN) 4045 return -EINVAL; 4046 4047 /* We do not support setting channels via ethtool when TCs are 4048 * configured through mqprio 4049 */ 4050 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4051 return -EINVAL; 4052 4053 /* verify they are not requesting separate vectors */ 4054 if (!count || ch->rx_count || ch->tx_count) 4055 return -EINVAL; 4056 4057 /* verify other_count has not changed */ 4058 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4059 return -EINVAL; 4060 4061 /* verify the number of channels does not exceed hardware limits */ 4062 if (count > i40e_max_channels(vsi)) 4063 return -EINVAL; 4064 4065 /* verify that the number of channels does not invalidate any current 4066 * flow director rules 4067 */ 4068 hlist_for_each_entry_safe(rule, node2, 4069 &pf->fdir_filter_list, fdir_node) { 4070 if (rule->dest_ctl != drop && count <= rule->q_index) { 4071 dev_warn(&pf->pdev->dev, 4072 "Existing user defined filter %d assigns flow to queue %d\n", 4073 rule->fd_id, rule->q_index); 4074 err = -EINVAL; 4075 } 4076 } 4077 4078 if (err) { 4079 dev_err(&pf->pdev->dev, 4080 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4081 count); 4082 return err; 4083 } 4084 4085 /* update feature limits from largest to smallest supported values */ 4086 /* TODO: Flow director limit, DCB etc */ 4087 4088 /* use rss_reconfig to rebuild with new queue count and update traffic 4089 * class queue mapping 4090 */ 4091 new_count = i40e_reconfig_rss_queues(pf, count); 4092 if (new_count > 0) 4093 return 0; 4094 else 4095 return -EINVAL; 4096 } 4097 4098 /** 4099 * i40e_get_rxfh_key_size - get the RSS hash key size 4100 * @netdev: network interface device structure 4101 * 4102 * Returns the table size. 4103 **/ 4104 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4105 { 4106 return I40E_HKEY_ARRAY_SIZE; 4107 } 4108 4109 /** 4110 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4111 * @netdev: network interface device structure 4112 * 4113 * Returns the table size. 4114 **/ 4115 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4116 { 4117 return I40E_HLUT_ARRAY_SIZE; 4118 } 4119 4120 /** 4121 * i40e_get_rxfh - get the rx flow hash indirection table 4122 * @netdev: network interface device structure 4123 * @indir: indirection table 4124 * @key: hash key 4125 * @hfunc: hash function 4126 * 4127 * Reads the indirection table directly from the hardware. Returns 0 on 4128 * success. 4129 **/ 4130 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4131 u8 *hfunc) 4132 { 4133 struct i40e_netdev_priv *np = netdev_priv(netdev); 4134 struct i40e_vsi *vsi = np->vsi; 4135 u8 *lut, *seed = NULL; 4136 int ret; 4137 u16 i; 4138 4139 if (hfunc) 4140 *hfunc = ETH_RSS_HASH_TOP; 4141 4142 if (!indir) 4143 return 0; 4144 4145 seed = key; 4146 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4147 if (!lut) 4148 return -ENOMEM; 4149 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4150 if (ret) 4151 goto out; 4152 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4153 indir[i] = (u32)(lut[i]); 4154 4155 out: 4156 kfree(lut); 4157 4158 return ret; 4159 } 4160 4161 /** 4162 * i40e_set_rxfh - set the rx flow hash indirection table 4163 * @netdev: network interface device structure 4164 * @indir: indirection table 4165 * @key: hash key 4166 * 4167 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4168 * returns 0 after programming the table. 4169 **/ 4170 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4171 const u8 *key, const u8 hfunc) 4172 { 4173 struct i40e_netdev_priv *np = netdev_priv(netdev); 4174 struct i40e_vsi *vsi = np->vsi; 4175 struct i40e_pf *pf = vsi->back; 4176 u8 *seed = NULL; 4177 u16 i; 4178 4179 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4180 return -EOPNOTSUPP; 4181 4182 if (key) { 4183 if (!vsi->rss_hkey_user) { 4184 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4185 GFP_KERNEL); 4186 if (!vsi->rss_hkey_user) 4187 return -ENOMEM; 4188 } 4189 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4190 seed = vsi->rss_hkey_user; 4191 } 4192 if (!vsi->rss_lut_user) { 4193 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4194 if (!vsi->rss_lut_user) 4195 return -ENOMEM; 4196 } 4197 4198 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4199 if (indir) 4200 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4201 vsi->rss_lut_user[i] = (u8)(indir[i]); 4202 else 4203 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4204 vsi->rss_size); 4205 4206 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4207 I40E_HLUT_ARRAY_SIZE); 4208 } 4209 4210 /** 4211 * i40e_get_priv_flags - report device private flags 4212 * @dev: network interface device structure 4213 * 4214 * The get string set count and the string set should be matched for each 4215 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4216 * array. 4217 * 4218 * Returns a u32 bitmap of flags. 4219 **/ 4220 static u32 i40e_get_priv_flags(struct net_device *dev) 4221 { 4222 struct i40e_netdev_priv *np = netdev_priv(dev); 4223 struct i40e_vsi *vsi = np->vsi; 4224 struct i40e_pf *pf = vsi->back; 4225 u32 i, j, ret_flags = 0; 4226 4227 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4228 const struct i40e_priv_flags *priv_flags; 4229 4230 priv_flags = &i40e_gstrings_priv_flags[i]; 4231 4232 if (priv_flags->flag & pf->flags) 4233 ret_flags |= BIT(i); 4234 } 4235 4236 if (pf->hw.pf_id != 0) 4237 return ret_flags; 4238 4239 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4240 const struct i40e_priv_flags *priv_flags; 4241 4242 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4243 4244 if (priv_flags->flag & pf->flags) 4245 ret_flags |= BIT(i + j); 4246 } 4247 4248 return ret_flags; 4249 } 4250 4251 /** 4252 * i40e_set_priv_flags - set private flags 4253 * @dev: network interface device structure 4254 * @flags: bit flags to be set 4255 **/ 4256 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4257 { 4258 struct i40e_netdev_priv *np = netdev_priv(dev); 4259 struct i40e_vsi *vsi = np->vsi; 4260 struct i40e_pf *pf = vsi->back; 4261 u32 orig_flags, new_flags, changed_flags; 4262 u32 i, j; 4263 4264 orig_flags = READ_ONCE(pf->flags); 4265 new_flags = orig_flags; 4266 4267 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4268 const struct i40e_priv_flags *priv_flags; 4269 4270 priv_flags = &i40e_gstrings_priv_flags[i]; 4271 4272 if (flags & BIT(i)) 4273 new_flags |= priv_flags->flag; 4274 else 4275 new_flags &= ~(priv_flags->flag); 4276 4277 /* If this is a read-only flag, it can't be changed */ 4278 if (priv_flags->read_only && 4279 ((orig_flags ^ new_flags) & ~BIT(i))) 4280 return -EOPNOTSUPP; 4281 } 4282 4283 if (pf->hw.pf_id != 0) 4284 goto flags_complete; 4285 4286 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4287 const struct i40e_priv_flags *priv_flags; 4288 4289 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4290 4291 if (flags & BIT(i + j)) 4292 new_flags |= priv_flags->flag; 4293 else 4294 new_flags &= ~(priv_flags->flag); 4295 4296 /* If this is a read-only flag, it can't be changed */ 4297 if (priv_flags->read_only && 4298 ((orig_flags ^ new_flags) & ~BIT(i))) 4299 return -EOPNOTSUPP; 4300 } 4301 4302 flags_complete: 4303 /* Before we finalize any flag changes, we need to perform some 4304 * checks to ensure that the changes are supported and safe. 4305 */ 4306 4307 /* ATR eviction is not supported on all devices */ 4308 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4309 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4310 return -EOPNOTSUPP; 4311 4312 /* Compare and exchange the new flags into place. If we failed, that 4313 * is if cmpxchg returns anything but the old value, this means that 4314 * something else has modified the flags variable since we copied it 4315 * originally. We'll just punt with an error and log something in the 4316 * message buffer. 4317 */ 4318 if (cmpxchg(&pf->flags, orig_flags, new_flags) != orig_flags) { 4319 dev_warn(&pf->pdev->dev, 4320 "Unable to update pf->flags as it was modified by another thread...\n"); 4321 return -EAGAIN; 4322 } 4323 4324 changed_flags = orig_flags ^ new_flags; 4325 4326 /* Process any additional changes needed as a result of flag changes. 4327 * The changed_flags value reflects the list of bits that were 4328 * changed in the code above. 4329 */ 4330 4331 /* Flush current ATR settings if ATR was disabled */ 4332 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4333 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4334 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4335 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4336 } 4337 4338 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4339 u16 sw_flags = 0, valid_flags = 0; 4340 int ret; 4341 4342 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4343 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4344 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4345 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4346 0, NULL); 4347 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4348 dev_info(&pf->pdev->dev, 4349 "couldn't set switch config bits, err %s aq_err %s\n", 4350 i40e_stat_str(&pf->hw, ret), 4351 i40e_aq_str(&pf->hw, 4352 pf->hw.aq.asq_last_status)); 4353 /* not a fatal problem, just keep going */ 4354 } 4355 } 4356 4357 /* Issue reset to cause things to take effect, as additional bits 4358 * are added we will need to create a mask of bits requiring reset 4359 */ 4360 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4361 I40E_FLAG_LEGACY_RX | 4362 I40E_FLAG_SOURCE_PRUNING_DISABLED)) 4363 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4364 4365 return 0; 4366 } 4367 4368 /** 4369 * i40e_get_module_info - get (Q)SFP+ module type info 4370 * @netdev: network interface device structure 4371 * @modinfo: module EEPROM size and layout information structure 4372 **/ 4373 static int i40e_get_module_info(struct net_device *netdev, 4374 struct ethtool_modinfo *modinfo) 4375 { 4376 struct i40e_netdev_priv *np = netdev_priv(netdev); 4377 struct i40e_vsi *vsi = np->vsi; 4378 struct i40e_pf *pf = vsi->back; 4379 struct i40e_hw *hw = &pf->hw; 4380 u32 sff8472_comp = 0; 4381 u32 sff8472_swap = 0; 4382 u32 sff8636_rev = 0; 4383 i40e_status status; 4384 u32 type = 0; 4385 4386 /* Check if firmware supports reading module EEPROM. */ 4387 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4388 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4389 return -EINVAL; 4390 } 4391 4392 status = i40e_update_link_info(hw); 4393 if (status) 4394 return -EIO; 4395 4396 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4397 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4398 return -EINVAL; 4399 } 4400 4401 type = hw->phy.link_info.module_type[0]; 4402 4403 switch (type) { 4404 case I40E_MODULE_TYPE_SFP: 4405 status = i40e_aq_get_phy_register(hw, 4406 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4407 I40E_I2C_EEPROM_DEV_ADDR, 4408 I40E_MODULE_SFF_8472_COMP, 4409 &sff8472_comp, NULL); 4410 if (status) 4411 return -EIO; 4412 4413 status = i40e_aq_get_phy_register(hw, 4414 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4415 I40E_I2C_EEPROM_DEV_ADDR, 4416 I40E_MODULE_SFF_8472_SWAP, 4417 &sff8472_swap, NULL); 4418 if (status) 4419 return -EIO; 4420 4421 /* Check if the module requires address swap to access 4422 * the other EEPROM memory page. 4423 */ 4424 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4425 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4426 modinfo->type = ETH_MODULE_SFF_8079; 4427 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4428 } else if (sff8472_comp == 0x00) { 4429 /* Module is not SFF-8472 compliant */ 4430 modinfo->type = ETH_MODULE_SFF_8079; 4431 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4432 } else { 4433 modinfo->type = ETH_MODULE_SFF_8472; 4434 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4435 } 4436 break; 4437 case I40E_MODULE_TYPE_QSFP_PLUS: 4438 /* Read from memory page 0. */ 4439 status = i40e_aq_get_phy_register(hw, 4440 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4441 0, 4442 I40E_MODULE_REVISION_ADDR, 4443 &sff8636_rev, NULL); 4444 if (status) 4445 return -EIO; 4446 /* Determine revision compliance byte */ 4447 if (sff8636_rev > 0x02) { 4448 /* Module is SFF-8636 compliant */ 4449 modinfo->type = ETH_MODULE_SFF_8636; 4450 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4451 } else { 4452 modinfo->type = ETH_MODULE_SFF_8436; 4453 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4454 } 4455 break; 4456 case I40E_MODULE_TYPE_QSFP28: 4457 modinfo->type = ETH_MODULE_SFF_8636; 4458 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4459 break; 4460 default: 4461 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4462 return -EINVAL; 4463 } 4464 return 0; 4465 } 4466 4467 /** 4468 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4469 * @netdev: network interface device structure 4470 * @ee: EEPROM dump request structure 4471 * @data: buffer to be filled with EEPROM contents 4472 **/ 4473 static int i40e_get_module_eeprom(struct net_device *netdev, 4474 struct ethtool_eeprom *ee, 4475 u8 *data) 4476 { 4477 struct i40e_netdev_priv *np = netdev_priv(netdev); 4478 struct i40e_vsi *vsi = np->vsi; 4479 struct i40e_pf *pf = vsi->back; 4480 struct i40e_hw *hw = &pf->hw; 4481 bool is_sfp = false; 4482 i40e_status status; 4483 u32 value = 0; 4484 int i; 4485 4486 if (!ee || !ee->len || !data) 4487 return -EINVAL; 4488 4489 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4490 is_sfp = true; 4491 4492 for (i = 0; i < ee->len; i++) { 4493 u32 offset = i + ee->offset; 4494 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4495 4496 /* Check if we need to access the other memory page */ 4497 if (is_sfp) { 4498 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4499 offset -= ETH_MODULE_SFF_8079_LEN; 4500 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4501 } 4502 } else { 4503 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4504 /* Compute memory page number and offset. */ 4505 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4506 addr++; 4507 } 4508 } 4509 4510 status = i40e_aq_get_phy_register(hw, 4511 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4512 addr, offset, &value, NULL); 4513 if (status) 4514 return -EIO; 4515 data[i] = value; 4516 } 4517 return 0; 4518 } 4519 4520 static const struct ethtool_ops i40e_ethtool_ops = { 4521 .get_drvinfo = i40e_get_drvinfo, 4522 .get_regs_len = i40e_get_regs_len, 4523 .get_regs = i40e_get_regs, 4524 .nway_reset = i40e_nway_reset, 4525 .get_link = ethtool_op_get_link, 4526 .get_wol = i40e_get_wol, 4527 .set_wol = i40e_set_wol, 4528 .set_eeprom = i40e_set_eeprom, 4529 .get_eeprom_len = i40e_get_eeprom_len, 4530 .get_eeprom = i40e_get_eeprom, 4531 .get_ringparam = i40e_get_ringparam, 4532 .set_ringparam = i40e_set_ringparam, 4533 .get_pauseparam = i40e_get_pauseparam, 4534 .set_pauseparam = i40e_set_pauseparam, 4535 .get_msglevel = i40e_get_msglevel, 4536 .set_msglevel = i40e_set_msglevel, 4537 .get_rxnfc = i40e_get_rxnfc, 4538 .set_rxnfc = i40e_set_rxnfc, 4539 .self_test = i40e_diag_test, 4540 .get_strings = i40e_get_strings, 4541 .set_phys_id = i40e_set_phys_id, 4542 .get_sset_count = i40e_get_sset_count, 4543 .get_ethtool_stats = i40e_get_ethtool_stats, 4544 .get_coalesce = i40e_get_coalesce, 4545 .set_coalesce = i40e_set_coalesce, 4546 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4547 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4548 .get_rxfh = i40e_get_rxfh, 4549 .set_rxfh = i40e_set_rxfh, 4550 .get_channels = i40e_get_channels, 4551 .set_channels = i40e_set_channels, 4552 .get_module_info = i40e_get_module_info, 4553 .get_module_eeprom = i40e_get_module_eeprom, 4554 .get_ts_info = i40e_get_ts_info, 4555 .get_priv_flags = i40e_get_priv_flags, 4556 .set_priv_flags = i40e_set_priv_flags, 4557 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4558 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4559 .get_link_ksettings = i40e_get_link_ksettings, 4560 .set_link_ksettings = i40e_set_link_ksettings, 4561 }; 4562 4563 void i40e_set_ethtool_ops(struct net_device *netdev) 4564 { 4565 netdev->ethtool_ops = &i40e_ethtool_ops; 4566 } 4567