1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 9 struct i40e_stats { 10 char stat_string[ETH_GSTRING_LEN]; 11 int sizeof_stat; 12 int stat_offset; 13 }; 14 15 #define I40E_STAT(_type, _name, _stat) { \ 16 .stat_string = _name, \ 17 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 18 .stat_offset = offsetof(_type, _stat) \ 19 } 20 21 #define I40E_NETDEV_STAT(_net_stat) \ 22 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 23 #define I40E_PF_STAT(_name, _stat) \ 24 I40E_STAT(struct i40e_pf, _name, _stat) 25 #define I40E_VSI_STAT(_name, _stat) \ 26 I40E_STAT(struct i40e_vsi, _name, _stat) 27 #define I40E_VEB_STAT(_name, _stat) \ 28 I40E_STAT(struct i40e_veb, _name, _stat) 29 30 static const struct i40e_stats i40e_gstrings_net_stats[] = { 31 I40E_NETDEV_STAT(rx_packets), 32 I40E_NETDEV_STAT(tx_packets), 33 I40E_NETDEV_STAT(rx_bytes), 34 I40E_NETDEV_STAT(tx_bytes), 35 I40E_NETDEV_STAT(rx_errors), 36 I40E_NETDEV_STAT(tx_errors), 37 I40E_NETDEV_STAT(rx_dropped), 38 I40E_NETDEV_STAT(tx_dropped), 39 I40E_NETDEV_STAT(collisions), 40 I40E_NETDEV_STAT(rx_length_errors), 41 I40E_NETDEV_STAT(rx_crc_errors), 42 }; 43 44 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 45 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 46 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 47 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 48 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 49 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 50 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 51 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 52 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 53 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 54 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 55 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 56 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 57 }; 58 59 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 60 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 61 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 62 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 63 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 64 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 65 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 66 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 67 I40E_VSI_STAT("tx_linearize", tx_linearize), 68 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 69 I40E_VSI_STAT("tx_busy", tx_busy), 70 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 71 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 72 }; 73 74 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 75 * but they are separate. This device supports Virtualization, and 76 * as such might have several netdevs supporting VMDq and FCoE going 77 * through a single port. The NETDEV_STATs are for individual netdevs 78 * seen at the top of the stack, and the PF_STATs are for the physical 79 * function at the bottom of the stack hosting those netdevs. 80 * 81 * The PF_STATs are appended to the netdev stats only when ethtool -S 82 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 83 */ 84 static const struct i40e_stats i40e_gstrings_stats[] = { 85 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 86 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 87 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 88 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 89 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 90 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 91 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 92 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 93 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 94 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 95 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 96 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 97 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 98 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 99 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 100 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 101 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 102 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 103 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 104 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 105 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 106 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 107 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 108 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 109 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 110 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 111 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 112 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 113 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 114 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 115 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 116 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 117 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 118 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 119 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 120 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 121 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 122 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 123 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 124 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 125 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 126 I40E_PF_STAT("port.arq_overflows", arq_overflows), 127 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 128 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 129 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 130 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 131 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 132 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 133 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 134 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 135 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 136 137 /* LPI stats */ 138 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 139 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 140 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 141 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 142 }; 143 144 /* We use num_tx_queues here as a proxy for the maximum number of queues 145 * available because we always allocate queues symmetrically. 146 */ 147 #define I40E_MAX_NUM_QUEUES(n) ((n)->num_tx_queues) 148 #define I40E_QUEUE_STATS_LEN(n) \ 149 (I40E_MAX_NUM_QUEUES(n) \ 150 * 2 /* Tx and Rx together */ \ 151 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 152 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 153 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 154 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 155 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 156 I40E_MISC_STATS_LEN + \ 157 I40E_QUEUE_STATS_LEN((n))) 158 #define I40E_PFC_STATS_LEN ( \ 159 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 160 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 161 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 162 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 163 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 164 / sizeof(u64)) 165 #define I40E_VEB_TC_STATS_LEN ( \ 166 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 167 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 168 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 169 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 170 / sizeof(u64)) 171 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 172 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 173 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 174 I40E_PFC_STATS_LEN + \ 175 I40E_VSI_STATS_LEN((n))) 176 177 enum i40e_ethtool_test_id { 178 I40E_ETH_TEST_REG = 0, 179 I40E_ETH_TEST_EEPROM, 180 I40E_ETH_TEST_INTR, 181 I40E_ETH_TEST_LINK, 182 }; 183 184 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 185 "Register test (offline)", 186 "Eeprom test (offline)", 187 "Interrupt test (offline)", 188 "Link test (on/offline)" 189 }; 190 191 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 192 193 struct i40e_priv_flags { 194 char flag_string[ETH_GSTRING_LEN]; 195 u64 flag; 196 bool read_only; 197 }; 198 199 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 200 .flag_string = _name, \ 201 .flag = _flag, \ 202 .read_only = _read_only, \ 203 } 204 205 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 206 /* NOTE: MFP setting cannot be changed */ 207 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 208 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 209 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 210 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 211 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 212 I40E_PRIV_FLAG("link-down-on-close", 213 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 214 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 215 I40E_PRIV_FLAG("disable-source-pruning", 216 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 217 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 218 }; 219 220 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 221 222 /* Private flags with a global effect, restricted to PF 0 */ 223 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 224 I40E_PRIV_FLAG("vf-true-promisc-support", 225 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 226 }; 227 228 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 229 230 /** 231 * i40e_partition_setting_complaint - generic complaint for MFP restriction 232 * @pf: the PF struct 233 **/ 234 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 235 { 236 dev_info(&pf->pdev->dev, 237 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 238 } 239 240 /** 241 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 242 * @pf: PF struct with phy_types 243 * @ks: ethtool link ksettings struct to fill out 244 * 245 **/ 246 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 247 struct ethtool_link_ksettings *ks) 248 { 249 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 250 u64 phy_types = pf->hw.phy.phy_types; 251 252 ethtool_link_ksettings_zero_link_mode(ks, supported); 253 ethtool_link_ksettings_zero_link_mode(ks, advertising); 254 255 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 256 ethtool_link_ksettings_add_link_mode(ks, supported, 257 1000baseT_Full); 258 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 259 ethtool_link_ksettings_add_link_mode(ks, advertising, 260 1000baseT_Full); 261 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 262 ethtool_link_ksettings_add_link_mode(ks, supported, 263 100baseT_Full); 264 ethtool_link_ksettings_add_link_mode(ks, advertising, 265 100baseT_Full); 266 } 267 } 268 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 269 phy_types & I40E_CAP_PHY_TYPE_XFI || 270 phy_types & I40E_CAP_PHY_TYPE_SFI || 271 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 272 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 273 ethtool_link_ksettings_add_link_mode(ks, supported, 274 10000baseT_Full); 275 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 276 ethtool_link_ksettings_add_link_mode(ks, advertising, 277 10000baseT_Full); 278 } 279 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 280 ethtool_link_ksettings_add_link_mode(ks, supported, 281 10000baseT_Full); 282 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 283 ethtool_link_ksettings_add_link_mode(ks, advertising, 284 10000baseT_Full); 285 } 286 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 287 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 288 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 289 ethtool_link_ksettings_add_link_mode(ks, supported, 290 40000baseCR4_Full); 291 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 292 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 293 ethtool_link_ksettings_add_link_mode(ks, supported, 294 40000baseCR4_Full); 295 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 296 ethtool_link_ksettings_add_link_mode(ks, advertising, 297 40000baseCR4_Full); 298 } 299 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 300 ethtool_link_ksettings_add_link_mode(ks, supported, 301 100baseT_Full); 302 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 303 ethtool_link_ksettings_add_link_mode(ks, advertising, 304 100baseT_Full); 305 } 306 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 307 ethtool_link_ksettings_add_link_mode(ks, supported, 308 1000baseT_Full); 309 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 310 ethtool_link_ksettings_add_link_mode(ks, advertising, 311 1000baseT_Full); 312 } 313 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 314 ethtool_link_ksettings_add_link_mode(ks, supported, 315 40000baseSR4_Full); 316 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 317 ethtool_link_ksettings_add_link_mode(ks, supported, 318 40000baseLR4_Full); 319 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 320 ethtool_link_ksettings_add_link_mode(ks, supported, 321 40000baseLR4_Full); 322 ethtool_link_ksettings_add_link_mode(ks, advertising, 323 40000baseLR4_Full); 324 } 325 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 326 ethtool_link_ksettings_add_link_mode(ks, supported, 327 20000baseKR2_Full); 328 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 329 ethtool_link_ksettings_add_link_mode(ks, advertising, 330 20000baseKR2_Full); 331 } 332 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 333 ethtool_link_ksettings_add_link_mode(ks, supported, 334 10000baseKX4_Full); 335 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 336 ethtool_link_ksettings_add_link_mode(ks, advertising, 337 10000baseKX4_Full); 338 } 339 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 340 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 341 ethtool_link_ksettings_add_link_mode(ks, supported, 342 10000baseKR_Full); 343 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 344 ethtool_link_ksettings_add_link_mode(ks, advertising, 345 10000baseKR_Full); 346 } 347 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 348 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 349 ethtool_link_ksettings_add_link_mode(ks, supported, 350 1000baseKX_Full); 351 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 352 ethtool_link_ksettings_add_link_mode(ks, advertising, 353 1000baseKX_Full); 354 } 355 /* need to add 25G PHY types */ 356 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 357 ethtool_link_ksettings_add_link_mode(ks, supported, 358 25000baseKR_Full); 359 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 360 ethtool_link_ksettings_add_link_mode(ks, advertising, 361 25000baseKR_Full); 362 } 363 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 364 ethtool_link_ksettings_add_link_mode(ks, supported, 365 25000baseCR_Full); 366 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 367 ethtool_link_ksettings_add_link_mode(ks, advertising, 368 25000baseCR_Full); 369 } 370 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 371 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 372 ethtool_link_ksettings_add_link_mode(ks, supported, 373 25000baseSR_Full); 374 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 375 ethtool_link_ksettings_add_link_mode(ks, advertising, 376 25000baseSR_Full); 377 } 378 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 379 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 380 ethtool_link_ksettings_add_link_mode(ks, supported, 381 25000baseCR_Full); 382 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 383 ethtool_link_ksettings_add_link_mode(ks, advertising, 384 25000baseCR_Full); 385 } 386 /* need to add new 10G PHY types */ 387 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 388 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 389 ethtool_link_ksettings_add_link_mode(ks, supported, 390 10000baseCR_Full); 391 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 392 ethtool_link_ksettings_add_link_mode(ks, advertising, 393 10000baseCR_Full); 394 } 395 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 396 ethtool_link_ksettings_add_link_mode(ks, supported, 397 10000baseSR_Full); 398 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 399 ethtool_link_ksettings_add_link_mode(ks, advertising, 400 10000baseSR_Full); 401 } 402 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 403 ethtool_link_ksettings_add_link_mode(ks, supported, 404 10000baseLR_Full); 405 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 406 ethtool_link_ksettings_add_link_mode(ks, advertising, 407 10000baseLR_Full); 408 } 409 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 410 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 411 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 412 ethtool_link_ksettings_add_link_mode(ks, supported, 413 1000baseX_Full); 414 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 415 ethtool_link_ksettings_add_link_mode(ks, advertising, 416 1000baseX_Full); 417 } 418 /* Autoneg PHY types */ 419 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 420 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 421 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 422 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 423 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 424 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 425 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 426 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 427 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 428 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 429 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 430 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 431 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 432 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 433 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 434 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 435 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 436 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 437 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 438 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 439 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 440 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 441 ethtool_link_ksettings_add_link_mode(ks, supported, 442 Autoneg); 443 ethtool_link_ksettings_add_link_mode(ks, advertising, 444 Autoneg); 445 } 446 } 447 448 /** 449 * i40e_get_settings_link_up - Get the Link settings for when link is up 450 * @hw: hw structure 451 * @ks: ethtool ksettings to fill in 452 * @netdev: network interface device structure 453 * @pf: pointer to physical function struct 454 **/ 455 static void i40e_get_settings_link_up(struct i40e_hw *hw, 456 struct ethtool_link_ksettings *ks, 457 struct net_device *netdev, 458 struct i40e_pf *pf) 459 { 460 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 461 struct ethtool_link_ksettings cap_ksettings; 462 u32 link_speed = hw_link_info->link_speed; 463 464 /* Initialize supported and advertised settings based on phy settings */ 465 switch (hw_link_info->phy_type) { 466 case I40E_PHY_TYPE_40GBASE_CR4: 467 case I40E_PHY_TYPE_40GBASE_CR4_CU: 468 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 469 ethtool_link_ksettings_add_link_mode(ks, supported, 470 40000baseCR4_Full); 471 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 472 ethtool_link_ksettings_add_link_mode(ks, advertising, 473 40000baseCR4_Full); 474 break; 475 case I40E_PHY_TYPE_XLAUI: 476 case I40E_PHY_TYPE_XLPPI: 477 case I40E_PHY_TYPE_40GBASE_AOC: 478 ethtool_link_ksettings_add_link_mode(ks, supported, 479 40000baseCR4_Full); 480 break; 481 case I40E_PHY_TYPE_40GBASE_SR4: 482 ethtool_link_ksettings_add_link_mode(ks, supported, 483 40000baseSR4_Full); 484 break; 485 case I40E_PHY_TYPE_40GBASE_LR4: 486 ethtool_link_ksettings_add_link_mode(ks, supported, 487 40000baseLR4_Full); 488 break; 489 case I40E_PHY_TYPE_25GBASE_SR: 490 case I40E_PHY_TYPE_25GBASE_LR: 491 case I40E_PHY_TYPE_10GBASE_SR: 492 case I40E_PHY_TYPE_10GBASE_LR: 493 case I40E_PHY_TYPE_1000BASE_SX: 494 case I40E_PHY_TYPE_1000BASE_LX: 495 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 496 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 497 ethtool_link_ksettings_add_link_mode(ks, supported, 498 25000baseSR_Full); 499 ethtool_link_ksettings_add_link_mode(ks, advertising, 500 25000baseSR_Full); 501 ethtool_link_ksettings_add_link_mode(ks, supported, 502 10000baseSR_Full); 503 ethtool_link_ksettings_add_link_mode(ks, advertising, 504 10000baseSR_Full); 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 10000baseLR_Full); 507 ethtool_link_ksettings_add_link_mode(ks, advertising, 508 10000baseLR_Full); 509 ethtool_link_ksettings_add_link_mode(ks, supported, 510 1000baseX_Full); 511 ethtool_link_ksettings_add_link_mode(ks, advertising, 512 1000baseX_Full); 513 ethtool_link_ksettings_add_link_mode(ks, supported, 514 10000baseT_Full); 515 if (hw_link_info->module_type[2] & 516 I40E_MODULE_TYPE_1000BASE_SX || 517 hw_link_info->module_type[2] & 518 I40E_MODULE_TYPE_1000BASE_LX) { 519 ethtool_link_ksettings_add_link_mode(ks, supported, 520 1000baseT_Full); 521 if (hw_link_info->requested_speeds & 522 I40E_LINK_SPEED_1GB) 523 ethtool_link_ksettings_add_link_mode( 524 ks, advertising, 1000baseT_Full); 525 } 526 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 527 ethtool_link_ksettings_add_link_mode(ks, advertising, 528 10000baseT_Full); 529 break; 530 case I40E_PHY_TYPE_10GBASE_T: 531 case I40E_PHY_TYPE_1000BASE_T: 532 case I40E_PHY_TYPE_100BASE_TX: 533 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 534 ethtool_link_ksettings_add_link_mode(ks, supported, 535 10000baseT_Full); 536 ethtool_link_ksettings_add_link_mode(ks, supported, 537 1000baseT_Full); 538 ethtool_link_ksettings_add_link_mode(ks, supported, 539 100baseT_Full); 540 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 541 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 542 ethtool_link_ksettings_add_link_mode(ks, advertising, 543 10000baseT_Full); 544 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 545 ethtool_link_ksettings_add_link_mode(ks, advertising, 546 1000baseT_Full); 547 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 548 ethtool_link_ksettings_add_link_mode(ks, advertising, 549 100baseT_Full); 550 break; 551 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 552 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 553 ethtool_link_ksettings_add_link_mode(ks, supported, 554 1000baseT_Full); 555 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 556 ethtool_link_ksettings_add_link_mode(ks, advertising, 557 1000baseT_Full); 558 break; 559 case I40E_PHY_TYPE_10GBASE_CR1_CU: 560 case I40E_PHY_TYPE_10GBASE_CR1: 561 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 562 ethtool_link_ksettings_add_link_mode(ks, supported, 563 10000baseT_Full); 564 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 565 ethtool_link_ksettings_add_link_mode(ks, advertising, 566 10000baseT_Full); 567 break; 568 case I40E_PHY_TYPE_XAUI: 569 case I40E_PHY_TYPE_XFI: 570 case I40E_PHY_TYPE_SFI: 571 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 572 case I40E_PHY_TYPE_10GBASE_AOC: 573 ethtool_link_ksettings_add_link_mode(ks, supported, 574 10000baseT_Full); 575 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 576 ethtool_link_ksettings_add_link_mode(ks, advertising, 577 10000baseT_Full); 578 break; 579 case I40E_PHY_TYPE_SGMII: 580 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 581 ethtool_link_ksettings_add_link_mode(ks, supported, 582 1000baseT_Full); 583 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 584 ethtool_link_ksettings_add_link_mode(ks, advertising, 585 1000baseT_Full); 586 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 587 ethtool_link_ksettings_add_link_mode(ks, supported, 588 100baseT_Full); 589 if (hw_link_info->requested_speeds & 590 I40E_LINK_SPEED_100MB) 591 ethtool_link_ksettings_add_link_mode( 592 ks, advertising, 100baseT_Full); 593 } 594 break; 595 case I40E_PHY_TYPE_40GBASE_KR4: 596 case I40E_PHY_TYPE_25GBASE_KR: 597 case I40E_PHY_TYPE_20GBASE_KR2: 598 case I40E_PHY_TYPE_10GBASE_KR: 599 case I40E_PHY_TYPE_10GBASE_KX4: 600 case I40E_PHY_TYPE_1000BASE_KX: 601 ethtool_link_ksettings_add_link_mode(ks, supported, 602 40000baseKR4_Full); 603 ethtool_link_ksettings_add_link_mode(ks, supported, 604 25000baseKR_Full); 605 ethtool_link_ksettings_add_link_mode(ks, supported, 606 20000baseKR2_Full); 607 ethtool_link_ksettings_add_link_mode(ks, supported, 608 10000baseKR_Full); 609 ethtool_link_ksettings_add_link_mode(ks, supported, 610 10000baseKX4_Full); 611 ethtool_link_ksettings_add_link_mode(ks, supported, 612 1000baseKX_Full); 613 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 614 ethtool_link_ksettings_add_link_mode(ks, advertising, 615 40000baseKR4_Full); 616 ethtool_link_ksettings_add_link_mode(ks, advertising, 617 25000baseKR_Full); 618 ethtool_link_ksettings_add_link_mode(ks, advertising, 619 20000baseKR2_Full); 620 ethtool_link_ksettings_add_link_mode(ks, advertising, 621 10000baseKR_Full); 622 ethtool_link_ksettings_add_link_mode(ks, advertising, 623 10000baseKX4_Full); 624 ethtool_link_ksettings_add_link_mode(ks, advertising, 625 1000baseKX_Full); 626 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 627 break; 628 case I40E_PHY_TYPE_25GBASE_CR: 629 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 630 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 631 ethtool_link_ksettings_add_link_mode(ks, supported, 632 25000baseCR_Full); 633 ethtool_link_ksettings_add_link_mode(ks, advertising, 634 25000baseCR_Full); 635 break; 636 case I40E_PHY_TYPE_25GBASE_AOC: 637 case I40E_PHY_TYPE_25GBASE_ACC: 638 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 639 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 640 ethtool_link_ksettings_add_link_mode(ks, supported, 641 25000baseCR_Full); 642 643 ethtool_link_ksettings_add_link_mode(ks, advertising, 644 25000baseCR_Full); 645 ethtool_link_ksettings_add_link_mode(ks, supported, 646 10000baseCR_Full); 647 ethtool_link_ksettings_add_link_mode(ks, advertising, 648 10000baseCR_Full); 649 break; 650 default: 651 /* if we got here and link is up something bad is afoot */ 652 netdev_info(netdev, 653 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 654 hw_link_info->phy_type); 655 } 656 657 /* Now that we've worked out everything that could be supported by the 658 * current PHY type, get what is supported by the NVM and intersect 659 * them to get what is truly supported 660 */ 661 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 662 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 663 ethtool_intersect_link_masks(ks, &cap_ksettings); 664 665 /* Set speed and duplex */ 666 switch (link_speed) { 667 case I40E_LINK_SPEED_40GB: 668 ks->base.speed = SPEED_40000; 669 break; 670 case I40E_LINK_SPEED_25GB: 671 ks->base.speed = SPEED_25000; 672 break; 673 case I40E_LINK_SPEED_20GB: 674 ks->base.speed = SPEED_20000; 675 break; 676 case I40E_LINK_SPEED_10GB: 677 ks->base.speed = SPEED_10000; 678 break; 679 case I40E_LINK_SPEED_1GB: 680 ks->base.speed = SPEED_1000; 681 break; 682 case I40E_LINK_SPEED_100MB: 683 ks->base.speed = SPEED_100; 684 break; 685 default: 686 break; 687 } 688 ks->base.duplex = DUPLEX_FULL; 689 } 690 691 /** 692 * i40e_get_settings_link_down - Get the Link settings for when link is down 693 * @hw: hw structure 694 * @ks: ethtool ksettings to fill in 695 * @pf: pointer to physical function struct 696 * 697 * Reports link settings that can be determined when link is down 698 **/ 699 static void i40e_get_settings_link_down(struct i40e_hw *hw, 700 struct ethtool_link_ksettings *ks, 701 struct i40e_pf *pf) 702 { 703 /* link is down and the driver needs to fall back on 704 * supported phy types to figure out what info to display 705 */ 706 i40e_phy_type_to_ethtool(pf, ks); 707 708 /* With no link speed and duplex are unknown */ 709 ks->base.speed = SPEED_UNKNOWN; 710 ks->base.duplex = DUPLEX_UNKNOWN; 711 } 712 713 /** 714 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 715 * @netdev: network interface device structure 716 * @ks: ethtool ksettings 717 * 718 * Reports speed/duplex settings based on media_type 719 **/ 720 static int i40e_get_link_ksettings(struct net_device *netdev, 721 struct ethtool_link_ksettings *ks) 722 { 723 struct i40e_netdev_priv *np = netdev_priv(netdev); 724 struct i40e_pf *pf = np->vsi->back; 725 struct i40e_hw *hw = &pf->hw; 726 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 727 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 728 729 ethtool_link_ksettings_zero_link_mode(ks, supported); 730 ethtool_link_ksettings_zero_link_mode(ks, advertising); 731 732 if (link_up) 733 i40e_get_settings_link_up(hw, ks, netdev, pf); 734 else 735 i40e_get_settings_link_down(hw, ks, pf); 736 737 /* Now set the settings that don't rely on link being up/down */ 738 /* Set autoneg settings */ 739 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 740 AUTONEG_ENABLE : AUTONEG_DISABLE); 741 742 /* Set media type settings */ 743 switch (hw->phy.media_type) { 744 case I40E_MEDIA_TYPE_BACKPLANE: 745 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 746 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 747 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 748 ethtool_link_ksettings_add_link_mode(ks, advertising, 749 Backplane); 750 ks->base.port = PORT_NONE; 751 break; 752 case I40E_MEDIA_TYPE_BASET: 753 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 754 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 755 ks->base.port = PORT_TP; 756 break; 757 case I40E_MEDIA_TYPE_DA: 758 case I40E_MEDIA_TYPE_CX4: 759 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 760 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 761 ks->base.port = PORT_DA; 762 break; 763 case I40E_MEDIA_TYPE_FIBER: 764 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 765 ks->base.port = PORT_FIBRE; 766 break; 767 case I40E_MEDIA_TYPE_UNKNOWN: 768 default: 769 ks->base.port = PORT_OTHER; 770 break; 771 } 772 773 /* Set flow control settings */ 774 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 775 776 switch (hw->fc.requested_mode) { 777 case I40E_FC_FULL: 778 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 779 break; 780 case I40E_FC_TX_PAUSE: 781 ethtool_link_ksettings_add_link_mode(ks, advertising, 782 Asym_Pause); 783 break; 784 case I40E_FC_RX_PAUSE: 785 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 786 ethtool_link_ksettings_add_link_mode(ks, advertising, 787 Asym_Pause); 788 break; 789 default: 790 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 791 ethtool_link_ksettings_del_link_mode(ks, advertising, 792 Asym_Pause); 793 break; 794 } 795 796 return 0; 797 } 798 799 /** 800 * i40e_set_link_ksettings - Set Speed and Duplex 801 * @netdev: network interface device structure 802 * @ks: ethtool ksettings 803 * 804 * Set speed/duplex per media_types advertised/forced 805 **/ 806 static int i40e_set_link_ksettings(struct net_device *netdev, 807 const struct ethtool_link_ksettings *ks) 808 { 809 struct i40e_netdev_priv *np = netdev_priv(netdev); 810 struct i40e_aq_get_phy_abilities_resp abilities; 811 struct ethtool_link_ksettings safe_ks; 812 struct ethtool_link_ksettings copy_ks; 813 struct i40e_aq_set_phy_config config; 814 struct i40e_pf *pf = np->vsi->back; 815 struct i40e_vsi *vsi = np->vsi; 816 struct i40e_hw *hw = &pf->hw; 817 bool autoneg_changed = false; 818 i40e_status status = 0; 819 int timeout = 50; 820 int err = 0; 821 u8 autoneg; 822 823 /* Changing port settings is not supported if this isn't the 824 * port's controlling PF 825 */ 826 if (hw->partition_id != 1) { 827 i40e_partition_setting_complaint(pf); 828 return -EOPNOTSUPP; 829 } 830 if (vsi != pf->vsi[pf->lan_vsi]) 831 return -EOPNOTSUPP; 832 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 833 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 834 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 835 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 836 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 837 return -EOPNOTSUPP; 838 if (hw->device_id == I40E_DEV_ID_KX_B || 839 hw->device_id == I40E_DEV_ID_KX_C || 840 hw->device_id == I40E_DEV_ID_20G_KR2 || 841 hw->device_id == I40E_DEV_ID_20G_KR2_A || 842 hw->device_id == I40E_DEV_ID_25G_B || 843 hw->device_id == I40E_DEV_ID_KX_X722) { 844 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 845 return -EOPNOTSUPP; 846 } 847 848 /* copy the ksettings to copy_ks to avoid modifying the origin */ 849 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 850 851 /* save autoneg out of ksettings */ 852 autoneg = copy_ks.base.autoneg; 853 854 /* get our own copy of the bits to check against */ 855 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 856 safe_ks.base.cmd = copy_ks.base.cmd; 857 safe_ks.base.link_mode_masks_nwords = 858 copy_ks.base.link_mode_masks_nwords; 859 i40e_get_link_ksettings(netdev, &safe_ks); 860 861 /* Get link modes supported by hardware and check against modes 862 * requested by the user. Return an error if unsupported mode was set. 863 */ 864 if (!bitmap_subset(copy_ks.link_modes.advertising, 865 safe_ks.link_modes.supported, 866 __ETHTOOL_LINK_MODE_MASK_NBITS)) 867 return -EINVAL; 868 869 /* set autoneg back to what it currently is */ 870 copy_ks.base.autoneg = safe_ks.base.autoneg; 871 872 /* If copy_ks.base and safe_ks.base are not the same now, then they are 873 * trying to set something that we do not support. 874 */ 875 if (memcmp(©_ks.base, &safe_ks.base, 876 sizeof(struct ethtool_link_settings))) 877 return -EOPNOTSUPP; 878 879 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 880 timeout--; 881 if (!timeout) 882 return -EBUSY; 883 usleep_range(1000, 2000); 884 } 885 886 /* Get the current phy config */ 887 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 888 NULL); 889 if (status) { 890 err = -EAGAIN; 891 goto done; 892 } 893 894 /* Copy abilities to config in case autoneg is not 895 * set below 896 */ 897 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 898 config.abilities = abilities.abilities; 899 900 /* Check autoneg */ 901 if (autoneg == AUTONEG_ENABLE) { 902 /* If autoneg was not already enabled */ 903 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 904 /* If autoneg is not supported, return error */ 905 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 906 supported, 907 Autoneg)) { 908 netdev_info(netdev, "Autoneg not supported on this phy\n"); 909 err = -EINVAL; 910 goto done; 911 } 912 /* Autoneg is allowed to change */ 913 config.abilities = abilities.abilities | 914 I40E_AQ_PHY_ENABLE_AN; 915 autoneg_changed = true; 916 } 917 } else { 918 /* If autoneg is currently enabled */ 919 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 920 /* If autoneg is supported 10GBASE_T is the only PHY 921 * that can disable it, so otherwise return error 922 */ 923 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 924 supported, 925 Autoneg) && 926 hw->phy.link_info.phy_type != 927 I40E_PHY_TYPE_10GBASE_T) { 928 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 929 err = -EINVAL; 930 goto done; 931 } 932 /* Autoneg is allowed to change */ 933 config.abilities = abilities.abilities & 934 ~I40E_AQ_PHY_ENABLE_AN; 935 autoneg_changed = true; 936 } 937 } 938 939 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 940 100baseT_Full)) 941 config.link_speed |= I40E_LINK_SPEED_100MB; 942 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 943 1000baseT_Full) || 944 ethtool_link_ksettings_test_link_mode(ks, advertising, 945 1000baseX_Full) || 946 ethtool_link_ksettings_test_link_mode(ks, advertising, 947 1000baseKX_Full)) 948 config.link_speed |= I40E_LINK_SPEED_1GB; 949 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 950 10000baseT_Full) || 951 ethtool_link_ksettings_test_link_mode(ks, advertising, 952 10000baseKX4_Full) || 953 ethtool_link_ksettings_test_link_mode(ks, advertising, 954 10000baseKR_Full) || 955 ethtool_link_ksettings_test_link_mode(ks, advertising, 956 10000baseCR_Full) || 957 ethtool_link_ksettings_test_link_mode(ks, advertising, 958 10000baseSR_Full) || 959 ethtool_link_ksettings_test_link_mode(ks, advertising, 960 10000baseLR_Full)) 961 config.link_speed |= I40E_LINK_SPEED_10GB; 962 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 963 20000baseKR2_Full)) 964 config.link_speed |= I40E_LINK_SPEED_20GB; 965 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 966 25000baseCR_Full) || 967 ethtool_link_ksettings_test_link_mode(ks, advertising, 968 25000baseKR_Full) || 969 ethtool_link_ksettings_test_link_mode(ks, advertising, 970 25000baseSR_Full)) 971 config.link_speed |= I40E_LINK_SPEED_25GB; 972 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 973 40000baseKR4_Full) || 974 ethtool_link_ksettings_test_link_mode(ks, advertising, 975 40000baseCR4_Full) || 976 ethtool_link_ksettings_test_link_mode(ks, advertising, 977 40000baseSR4_Full) || 978 ethtool_link_ksettings_test_link_mode(ks, advertising, 979 40000baseLR4_Full)) 980 config.link_speed |= I40E_LINK_SPEED_40GB; 981 982 /* If speed didn't get set, set it to what it currently is. 983 * This is needed because if advertise is 0 (as it is when autoneg 984 * is disabled) then speed won't get set. 985 */ 986 if (!config.link_speed) 987 config.link_speed = abilities.link_speed; 988 if (autoneg_changed || abilities.link_speed != config.link_speed) { 989 /* copy over the rest of the abilities */ 990 config.phy_type = abilities.phy_type; 991 config.phy_type_ext = abilities.phy_type_ext; 992 config.eee_capability = abilities.eee_capability; 993 config.eeer = abilities.eeer_val; 994 config.low_power_ctrl = abilities.d3_lpan; 995 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 996 I40E_AQ_PHY_FEC_CONFIG_MASK; 997 998 /* save the requested speeds */ 999 hw->phy.link_info.requested_speeds = config.link_speed; 1000 /* set link and auto negotiation so changes take effect */ 1001 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1002 /* If link is up put link down */ 1003 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1004 /* Tell the OS link is going down, the link will go 1005 * back up when fw says it is ready asynchronously 1006 */ 1007 i40e_print_link_message(vsi, false); 1008 netif_carrier_off(netdev); 1009 netif_tx_stop_all_queues(netdev); 1010 } 1011 1012 /* make the aq call */ 1013 status = i40e_aq_set_phy_config(hw, &config, NULL); 1014 if (status) { 1015 netdev_info(netdev, 1016 "Set phy config failed, err %s aq_err %s\n", 1017 i40e_stat_str(hw, status), 1018 i40e_aq_str(hw, hw->aq.asq_last_status)); 1019 err = -EAGAIN; 1020 goto done; 1021 } 1022 1023 status = i40e_update_link_info(hw); 1024 if (status) 1025 netdev_dbg(netdev, 1026 "Updating link info failed with err %s aq_err %s\n", 1027 i40e_stat_str(hw, status), 1028 i40e_aq_str(hw, hw->aq.asq_last_status)); 1029 1030 } else { 1031 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1032 } 1033 1034 done: 1035 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1036 1037 return err; 1038 } 1039 1040 static int i40e_nway_reset(struct net_device *netdev) 1041 { 1042 /* restart autonegotiation */ 1043 struct i40e_netdev_priv *np = netdev_priv(netdev); 1044 struct i40e_pf *pf = np->vsi->back; 1045 struct i40e_hw *hw = &pf->hw; 1046 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1047 i40e_status ret = 0; 1048 1049 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1050 if (ret) { 1051 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1052 i40e_stat_str(hw, ret), 1053 i40e_aq_str(hw, hw->aq.asq_last_status)); 1054 return -EIO; 1055 } 1056 1057 return 0; 1058 } 1059 1060 /** 1061 * i40e_get_pauseparam - Get Flow Control status 1062 * @netdev: netdevice structure 1063 * @pause: buffer to return pause parameters 1064 * 1065 * Return tx/rx-pause status 1066 **/ 1067 static void i40e_get_pauseparam(struct net_device *netdev, 1068 struct ethtool_pauseparam *pause) 1069 { 1070 struct i40e_netdev_priv *np = netdev_priv(netdev); 1071 struct i40e_pf *pf = np->vsi->back; 1072 struct i40e_hw *hw = &pf->hw; 1073 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1074 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1075 1076 pause->autoneg = 1077 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1078 AUTONEG_ENABLE : AUTONEG_DISABLE); 1079 1080 /* PFC enabled so report LFC as off */ 1081 if (dcbx_cfg->pfc.pfcenable) { 1082 pause->rx_pause = 0; 1083 pause->tx_pause = 0; 1084 return; 1085 } 1086 1087 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1088 pause->rx_pause = 1; 1089 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1090 pause->tx_pause = 1; 1091 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1092 pause->rx_pause = 1; 1093 pause->tx_pause = 1; 1094 } 1095 } 1096 1097 /** 1098 * i40e_set_pauseparam - Set Flow Control parameter 1099 * @netdev: network interface device structure 1100 * @pause: return tx/rx flow control status 1101 **/ 1102 static int i40e_set_pauseparam(struct net_device *netdev, 1103 struct ethtool_pauseparam *pause) 1104 { 1105 struct i40e_netdev_priv *np = netdev_priv(netdev); 1106 struct i40e_pf *pf = np->vsi->back; 1107 struct i40e_vsi *vsi = np->vsi; 1108 struct i40e_hw *hw = &pf->hw; 1109 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1110 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1111 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1112 i40e_status status; 1113 u8 aq_failures; 1114 int err = 0; 1115 1116 /* Changing the port's flow control is not supported if this isn't the 1117 * port's controlling PF 1118 */ 1119 if (hw->partition_id != 1) { 1120 i40e_partition_setting_complaint(pf); 1121 return -EOPNOTSUPP; 1122 } 1123 1124 if (vsi != pf->vsi[pf->lan_vsi]) 1125 return -EOPNOTSUPP; 1126 1127 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1128 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1129 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1130 return -EOPNOTSUPP; 1131 } 1132 1133 /* If we have link and don't have autoneg */ 1134 if (!test_bit(__I40E_DOWN, pf->state) && 1135 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1136 /* Send message that it might not necessarily work*/ 1137 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1138 } 1139 1140 if (dcbx_cfg->pfc.pfcenable) { 1141 netdev_info(netdev, 1142 "Priority flow control enabled. Cannot set link flow control.\n"); 1143 return -EOPNOTSUPP; 1144 } 1145 1146 if (pause->rx_pause && pause->tx_pause) 1147 hw->fc.requested_mode = I40E_FC_FULL; 1148 else if (pause->rx_pause && !pause->tx_pause) 1149 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1150 else if (!pause->rx_pause && pause->tx_pause) 1151 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1152 else if (!pause->rx_pause && !pause->tx_pause) 1153 hw->fc.requested_mode = I40E_FC_NONE; 1154 else 1155 return -EINVAL; 1156 1157 /* Tell the OS link is going down, the link will go back up when fw 1158 * says it is ready asynchronously 1159 */ 1160 i40e_print_link_message(vsi, false); 1161 netif_carrier_off(netdev); 1162 netif_tx_stop_all_queues(netdev); 1163 1164 /* Set the fc mode and only restart an if link is up*/ 1165 status = i40e_set_fc(hw, &aq_failures, link_up); 1166 1167 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1168 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1169 i40e_stat_str(hw, status), 1170 i40e_aq_str(hw, hw->aq.asq_last_status)); 1171 err = -EAGAIN; 1172 } 1173 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1174 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1175 i40e_stat_str(hw, status), 1176 i40e_aq_str(hw, hw->aq.asq_last_status)); 1177 err = -EAGAIN; 1178 } 1179 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1180 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1181 i40e_stat_str(hw, status), 1182 i40e_aq_str(hw, hw->aq.asq_last_status)); 1183 err = -EAGAIN; 1184 } 1185 1186 if (!test_bit(__I40E_DOWN, pf->state)) { 1187 /* Give it a little more time to try to come back */ 1188 msleep(75); 1189 if (!test_bit(__I40E_DOWN, pf->state)) 1190 return i40e_nway_reset(netdev); 1191 } 1192 1193 return err; 1194 } 1195 1196 static u32 i40e_get_msglevel(struct net_device *netdev) 1197 { 1198 struct i40e_netdev_priv *np = netdev_priv(netdev); 1199 struct i40e_pf *pf = np->vsi->back; 1200 u32 debug_mask = pf->hw.debug_mask; 1201 1202 if (debug_mask) 1203 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1204 1205 return pf->msg_enable; 1206 } 1207 1208 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1209 { 1210 struct i40e_netdev_priv *np = netdev_priv(netdev); 1211 struct i40e_pf *pf = np->vsi->back; 1212 1213 if (I40E_DEBUG_USER & data) 1214 pf->hw.debug_mask = data; 1215 else 1216 pf->msg_enable = data; 1217 } 1218 1219 static int i40e_get_regs_len(struct net_device *netdev) 1220 { 1221 int reg_count = 0; 1222 int i; 1223 1224 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1225 reg_count += i40e_reg_list[i].elements; 1226 1227 return reg_count * sizeof(u32); 1228 } 1229 1230 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1231 void *p) 1232 { 1233 struct i40e_netdev_priv *np = netdev_priv(netdev); 1234 struct i40e_pf *pf = np->vsi->back; 1235 struct i40e_hw *hw = &pf->hw; 1236 u32 *reg_buf = p; 1237 unsigned int i, j, ri; 1238 u32 reg; 1239 1240 /* Tell ethtool which driver-version-specific regs output we have. 1241 * 1242 * At some point, if we have ethtool doing special formatting of 1243 * this data, it will rely on this version number to know how to 1244 * interpret things. Hence, this needs to be updated if/when the 1245 * diags register table is changed. 1246 */ 1247 regs->version = 1; 1248 1249 /* loop through the diags reg table for what to print */ 1250 ri = 0; 1251 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1252 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1253 reg = i40e_reg_list[i].offset 1254 + (j * i40e_reg_list[i].stride); 1255 reg_buf[ri++] = rd32(hw, reg); 1256 } 1257 } 1258 1259 } 1260 1261 static int i40e_get_eeprom(struct net_device *netdev, 1262 struct ethtool_eeprom *eeprom, u8 *bytes) 1263 { 1264 struct i40e_netdev_priv *np = netdev_priv(netdev); 1265 struct i40e_hw *hw = &np->vsi->back->hw; 1266 struct i40e_pf *pf = np->vsi->back; 1267 int ret_val = 0, len, offset; 1268 u8 *eeprom_buff; 1269 u16 i, sectors; 1270 bool last; 1271 u32 magic; 1272 1273 #define I40E_NVM_SECTOR_SIZE 4096 1274 if (eeprom->len == 0) 1275 return -EINVAL; 1276 1277 /* check for NVMUpdate access method */ 1278 magic = hw->vendor_id | (hw->device_id << 16); 1279 if (eeprom->magic && eeprom->magic != magic) { 1280 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1281 int errno = 0; 1282 1283 /* make sure it is the right magic for NVMUpdate */ 1284 if ((eeprom->magic >> 16) != hw->device_id) 1285 errno = -EINVAL; 1286 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1287 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1288 errno = -EBUSY; 1289 else 1290 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1291 1292 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1293 dev_info(&pf->pdev->dev, 1294 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1295 ret_val, hw->aq.asq_last_status, errno, 1296 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1297 cmd->offset, cmd->data_size); 1298 1299 return errno; 1300 } 1301 1302 /* normal ethtool get_eeprom support */ 1303 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1304 1305 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1306 if (!eeprom_buff) 1307 return -ENOMEM; 1308 1309 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1310 if (ret_val) { 1311 dev_info(&pf->pdev->dev, 1312 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1313 ret_val, hw->aq.asq_last_status); 1314 goto free_buff; 1315 } 1316 1317 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1318 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1319 len = I40E_NVM_SECTOR_SIZE; 1320 last = false; 1321 for (i = 0; i < sectors; i++) { 1322 if (i == (sectors - 1)) { 1323 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1324 last = true; 1325 } 1326 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1327 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1328 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1329 last, NULL); 1330 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1331 dev_info(&pf->pdev->dev, 1332 "read NVM failed, invalid offset 0x%x\n", 1333 offset); 1334 break; 1335 } else if (ret_val && 1336 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1337 dev_info(&pf->pdev->dev, 1338 "read NVM failed, access, offset 0x%x\n", 1339 offset); 1340 break; 1341 } else if (ret_val) { 1342 dev_info(&pf->pdev->dev, 1343 "read NVM failed offset %d err=%d status=0x%x\n", 1344 offset, ret_val, hw->aq.asq_last_status); 1345 break; 1346 } 1347 } 1348 1349 i40e_release_nvm(hw); 1350 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1351 free_buff: 1352 kfree(eeprom_buff); 1353 return ret_val; 1354 } 1355 1356 static int i40e_get_eeprom_len(struct net_device *netdev) 1357 { 1358 struct i40e_netdev_priv *np = netdev_priv(netdev); 1359 struct i40e_hw *hw = &np->vsi->back->hw; 1360 u32 val; 1361 1362 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1363 if (hw->mac.type == I40E_MAC_X722) { 1364 val = X722_EEPROM_SCOPE_LIMIT + 1; 1365 return val; 1366 } 1367 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1368 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1369 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1370 /* register returns value in power of 2, 64Kbyte chunks. */ 1371 val = (64 * 1024) * BIT(val); 1372 return val; 1373 } 1374 1375 static int i40e_set_eeprom(struct net_device *netdev, 1376 struct ethtool_eeprom *eeprom, u8 *bytes) 1377 { 1378 struct i40e_netdev_priv *np = netdev_priv(netdev); 1379 struct i40e_hw *hw = &np->vsi->back->hw; 1380 struct i40e_pf *pf = np->vsi->back; 1381 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1382 int ret_val = 0; 1383 int errno = 0; 1384 u32 magic; 1385 1386 /* normal ethtool set_eeprom is not supported */ 1387 magic = hw->vendor_id | (hw->device_id << 16); 1388 if (eeprom->magic == magic) 1389 errno = -EOPNOTSUPP; 1390 /* check for NVMUpdate access method */ 1391 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1392 errno = -EINVAL; 1393 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1394 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1395 errno = -EBUSY; 1396 else 1397 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1398 1399 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1400 dev_info(&pf->pdev->dev, 1401 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1402 ret_val, hw->aq.asq_last_status, errno, 1403 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1404 cmd->offset, cmd->data_size); 1405 1406 return errno; 1407 } 1408 1409 static void i40e_get_drvinfo(struct net_device *netdev, 1410 struct ethtool_drvinfo *drvinfo) 1411 { 1412 struct i40e_netdev_priv *np = netdev_priv(netdev); 1413 struct i40e_vsi *vsi = np->vsi; 1414 struct i40e_pf *pf = vsi->back; 1415 1416 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1417 strlcpy(drvinfo->version, i40e_driver_version_str, 1418 sizeof(drvinfo->version)); 1419 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1420 sizeof(drvinfo->fw_version)); 1421 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1422 sizeof(drvinfo->bus_info)); 1423 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1424 if (pf->hw.pf_id == 0) 1425 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1426 } 1427 1428 static void i40e_get_ringparam(struct net_device *netdev, 1429 struct ethtool_ringparam *ring) 1430 { 1431 struct i40e_netdev_priv *np = netdev_priv(netdev); 1432 struct i40e_pf *pf = np->vsi->back; 1433 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1434 1435 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1436 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1437 ring->rx_mini_max_pending = 0; 1438 ring->rx_jumbo_max_pending = 0; 1439 ring->rx_pending = vsi->rx_rings[0]->count; 1440 ring->tx_pending = vsi->tx_rings[0]->count; 1441 ring->rx_mini_pending = 0; 1442 ring->rx_jumbo_pending = 0; 1443 } 1444 1445 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1446 { 1447 if (i40e_enabled_xdp_vsi(vsi)) { 1448 return index < vsi->num_queue_pairs || 1449 (index >= vsi->alloc_queue_pairs && 1450 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1451 } 1452 1453 return index < vsi->num_queue_pairs; 1454 } 1455 1456 static int i40e_set_ringparam(struct net_device *netdev, 1457 struct ethtool_ringparam *ring) 1458 { 1459 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1460 struct i40e_netdev_priv *np = netdev_priv(netdev); 1461 struct i40e_hw *hw = &np->vsi->back->hw; 1462 struct i40e_vsi *vsi = np->vsi; 1463 struct i40e_pf *pf = vsi->back; 1464 u32 new_rx_count, new_tx_count; 1465 u16 tx_alloc_queue_pairs; 1466 int timeout = 50; 1467 int i, err = 0; 1468 1469 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1470 return -EINVAL; 1471 1472 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1473 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1474 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1475 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1476 netdev_info(netdev, 1477 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1478 ring->tx_pending, ring->rx_pending, 1479 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1480 return -EINVAL; 1481 } 1482 1483 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1484 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1485 1486 /* if nothing to do return success */ 1487 if ((new_tx_count == vsi->tx_rings[0]->count) && 1488 (new_rx_count == vsi->rx_rings[0]->count)) 1489 return 0; 1490 1491 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1492 timeout--; 1493 if (!timeout) 1494 return -EBUSY; 1495 usleep_range(1000, 2000); 1496 } 1497 1498 if (!netif_running(vsi->netdev)) { 1499 /* simple case - set for the next time the netdev is started */ 1500 for (i = 0; i < vsi->num_queue_pairs; i++) { 1501 vsi->tx_rings[i]->count = new_tx_count; 1502 vsi->rx_rings[i]->count = new_rx_count; 1503 if (i40e_enabled_xdp_vsi(vsi)) 1504 vsi->xdp_rings[i]->count = new_tx_count; 1505 } 1506 goto done; 1507 } 1508 1509 /* We can't just free everything and then setup again, 1510 * because the ISRs in MSI-X mode get passed pointers 1511 * to the Tx and Rx ring structs. 1512 */ 1513 1514 /* alloc updated Tx and XDP Tx resources */ 1515 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1516 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1517 if (new_tx_count != vsi->tx_rings[0]->count) { 1518 netdev_info(netdev, 1519 "Changing Tx descriptor count from %d to %d.\n", 1520 vsi->tx_rings[0]->count, new_tx_count); 1521 tx_rings = kcalloc(tx_alloc_queue_pairs, 1522 sizeof(struct i40e_ring), GFP_KERNEL); 1523 if (!tx_rings) { 1524 err = -ENOMEM; 1525 goto done; 1526 } 1527 1528 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1529 if (!i40e_active_tx_ring_index(vsi, i)) 1530 continue; 1531 1532 tx_rings[i] = *vsi->tx_rings[i]; 1533 tx_rings[i].count = new_tx_count; 1534 /* the desc and bi pointers will be reallocated in the 1535 * setup call 1536 */ 1537 tx_rings[i].desc = NULL; 1538 tx_rings[i].rx_bi = NULL; 1539 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1540 if (err) { 1541 while (i) { 1542 i--; 1543 if (!i40e_active_tx_ring_index(vsi, i)) 1544 continue; 1545 i40e_free_tx_resources(&tx_rings[i]); 1546 } 1547 kfree(tx_rings); 1548 tx_rings = NULL; 1549 1550 goto done; 1551 } 1552 } 1553 } 1554 1555 /* alloc updated Rx resources */ 1556 if (new_rx_count != vsi->rx_rings[0]->count) { 1557 netdev_info(netdev, 1558 "Changing Rx descriptor count from %d to %d\n", 1559 vsi->rx_rings[0]->count, new_rx_count); 1560 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1561 sizeof(struct i40e_ring), GFP_KERNEL); 1562 if (!rx_rings) { 1563 err = -ENOMEM; 1564 goto free_tx; 1565 } 1566 1567 for (i = 0; i < vsi->num_queue_pairs; i++) { 1568 struct i40e_ring *ring; 1569 u16 unused; 1570 1571 /* clone ring and setup updated count */ 1572 rx_rings[i] = *vsi->rx_rings[i]; 1573 rx_rings[i].count = new_rx_count; 1574 /* the desc and bi pointers will be reallocated in the 1575 * setup call 1576 */ 1577 rx_rings[i].desc = NULL; 1578 rx_rings[i].rx_bi = NULL; 1579 /* Clear cloned XDP RX-queue info before setup call */ 1580 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1581 /* this is to allow wr32 to have something to write to 1582 * during early allocation of Rx buffers 1583 */ 1584 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1585 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1586 if (err) 1587 goto rx_unwind; 1588 1589 /* now allocate the Rx buffers to make sure the OS 1590 * has enough memory, any failure here means abort 1591 */ 1592 ring = &rx_rings[i]; 1593 unused = I40E_DESC_UNUSED(ring); 1594 err = i40e_alloc_rx_buffers(ring, unused); 1595 rx_unwind: 1596 if (err) { 1597 do { 1598 i40e_free_rx_resources(&rx_rings[i]); 1599 } while (i--); 1600 kfree(rx_rings); 1601 rx_rings = NULL; 1602 1603 goto free_tx; 1604 } 1605 } 1606 } 1607 1608 /* Bring interface down, copy in the new ring info, 1609 * then restore the interface 1610 */ 1611 i40e_down(vsi); 1612 1613 if (tx_rings) { 1614 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1615 if (i40e_active_tx_ring_index(vsi, i)) { 1616 i40e_free_tx_resources(vsi->tx_rings[i]); 1617 *vsi->tx_rings[i] = tx_rings[i]; 1618 } 1619 } 1620 kfree(tx_rings); 1621 tx_rings = NULL; 1622 } 1623 1624 if (rx_rings) { 1625 for (i = 0; i < vsi->num_queue_pairs; i++) { 1626 i40e_free_rx_resources(vsi->rx_rings[i]); 1627 /* get the real tail offset */ 1628 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1629 /* this is to fake out the allocation routine 1630 * into thinking it has to realloc everything 1631 * but the recycling logic will let us re-use 1632 * the buffers allocated above 1633 */ 1634 rx_rings[i].next_to_use = 0; 1635 rx_rings[i].next_to_clean = 0; 1636 rx_rings[i].next_to_alloc = 0; 1637 /* do a struct copy */ 1638 *vsi->rx_rings[i] = rx_rings[i]; 1639 } 1640 kfree(rx_rings); 1641 rx_rings = NULL; 1642 } 1643 1644 i40e_up(vsi); 1645 1646 free_tx: 1647 /* error cleanup if the Rx allocations failed after getting Tx */ 1648 if (tx_rings) { 1649 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1650 if (i40e_active_tx_ring_index(vsi, i)) 1651 i40e_free_tx_resources(vsi->tx_rings[i]); 1652 } 1653 kfree(tx_rings); 1654 tx_rings = NULL; 1655 } 1656 1657 done: 1658 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1659 1660 return err; 1661 } 1662 1663 /** 1664 * i40e_get_stats_count - return the stats count for a device 1665 * @netdev: the netdev to return the count for 1666 * 1667 * Returns the total number of statistics for this netdev. Note that even 1668 * though this is a function, it is required that the count for a specific 1669 * netdev must never change. Basing the count on static values such as the 1670 * maximum number of queues or the device type is ok. However, the API for 1671 * obtaining stats is *not* safe against changes based on non-static 1672 * values such as the *current* number of queues, or runtime flags. 1673 * 1674 * If a statistic is not always enabled, return it as part of the count 1675 * anyways, always return its string, and report its value as zero. 1676 **/ 1677 static int i40e_get_stats_count(struct net_device *netdev) 1678 { 1679 struct i40e_netdev_priv *np = netdev_priv(netdev); 1680 struct i40e_vsi *vsi = np->vsi; 1681 struct i40e_pf *pf = vsi->back; 1682 1683 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 1684 return I40E_PF_STATS_LEN(netdev) + I40E_VEB_STATS_TOTAL; 1685 else 1686 return I40E_VSI_STATS_LEN(netdev); 1687 } 1688 1689 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1690 { 1691 struct i40e_netdev_priv *np = netdev_priv(netdev); 1692 struct i40e_vsi *vsi = np->vsi; 1693 struct i40e_pf *pf = vsi->back; 1694 1695 switch (sset) { 1696 case ETH_SS_TEST: 1697 return I40E_TEST_LEN; 1698 case ETH_SS_STATS: 1699 return i40e_get_stats_count(netdev); 1700 case ETH_SS_PRIV_FLAGS: 1701 return I40E_PRIV_FLAGS_STR_LEN + 1702 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1703 default: 1704 return -EOPNOTSUPP; 1705 } 1706 } 1707 1708 /** 1709 * i40e_get_ethtool_stats - copy stat values into supplied buffer 1710 * @netdev: the netdev to collect stats for 1711 * @stats: ethtool stats command structure 1712 * @data: ethtool supplied buffer 1713 * 1714 * Copy the stats values for this netdev into the buffer. Expects data to be 1715 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 1716 * statistics must be copied in a static order, and the count must not change 1717 * for a given netdev. See i40e_get_stats_count for more details. 1718 * 1719 * If a statistic is not currently valid (such as a disabled queue), this 1720 * function reports its value as zero. 1721 **/ 1722 static void i40e_get_ethtool_stats(struct net_device *netdev, 1723 struct ethtool_stats *stats, u64 *data) 1724 { 1725 struct i40e_netdev_priv *np = netdev_priv(netdev); 1726 struct i40e_ring *tx_ring, *rx_ring; 1727 struct i40e_vsi *vsi = np->vsi; 1728 struct i40e_pf *pf = vsi->back; 1729 unsigned int i; 1730 char *p; 1731 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1732 unsigned int start; 1733 1734 i40e_update_stats(vsi); 1735 1736 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1737 p = (char *)net_stats + i40e_gstrings_net_stats[i].stat_offset; 1738 *(data++) = (i40e_gstrings_net_stats[i].sizeof_stat == 1739 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1740 } 1741 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1742 p = (char *)vsi + i40e_gstrings_misc_stats[i].stat_offset; 1743 *(data++) = (i40e_gstrings_misc_stats[i].sizeof_stat == 1744 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1745 } 1746 rcu_read_lock(); 1747 for (i = 0; i < I40E_MAX_NUM_QUEUES(netdev) ; i++) { 1748 tx_ring = READ_ONCE(vsi->tx_rings[i]); 1749 1750 if (!tx_ring) { 1751 /* Bump the stat counter to skip these stats, and make 1752 * sure the memory is zero'd 1753 */ 1754 *(data++) = 0; 1755 *(data++) = 0; 1756 *(data++) = 0; 1757 *(data++) = 0; 1758 continue; 1759 } 1760 1761 /* process Tx ring statistics */ 1762 do { 1763 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1764 data[0] = tx_ring->stats.packets; 1765 data[1] = tx_ring->stats.bytes; 1766 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1767 data += 2; 1768 1769 /* Rx ring is the 2nd half of the queue pair */ 1770 rx_ring = &tx_ring[1]; 1771 do { 1772 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1773 data[0] = rx_ring->stats.packets; 1774 data[1] = rx_ring->stats.bytes; 1775 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1776 data += 2; 1777 } 1778 rcu_read_unlock(); 1779 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1780 return; 1781 1782 if ((pf->lan_veb != I40E_NO_VEB) && 1783 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1784 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1785 1786 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1787 p = (char *)veb; 1788 p += i40e_gstrings_veb_stats[i].stat_offset; 1789 *(data++) = (i40e_gstrings_veb_stats[i].sizeof_stat == 1790 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1791 } 1792 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1793 *(data++) = veb->tc_stats.tc_tx_packets[i]; 1794 *(data++) = veb->tc_stats.tc_tx_bytes[i]; 1795 *(data++) = veb->tc_stats.tc_rx_packets[i]; 1796 *(data++) = veb->tc_stats.tc_rx_bytes[i]; 1797 } 1798 } else { 1799 data += I40E_VEB_STATS_TOTAL; 1800 } 1801 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1802 p = (char *)pf + i40e_gstrings_stats[i].stat_offset; 1803 *(data++) = (i40e_gstrings_stats[i].sizeof_stat == 1804 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1805 } 1806 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1807 *(data++) = pf->stats.priority_xon_tx[i]; 1808 *(data++) = pf->stats.priority_xoff_tx[i]; 1809 } 1810 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1811 *(data++) = pf->stats.priority_xon_rx[i]; 1812 *(data++) = pf->stats.priority_xoff_rx[i]; 1813 } 1814 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 1815 *(data++) = pf->stats.priority_xon_2_xoff[i]; 1816 } 1817 1818 /** 1819 * i40e_get_stat_strings - copy stat strings into supplied buffer 1820 * @netdev: the netdev to collect strings for 1821 * @data: supplied buffer to copy strings into 1822 * 1823 * Copy the strings related to stats for this netdev. Expects data to be 1824 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 1825 * strings must be copied in a static order and the total count must not 1826 * change for a given netdev. See i40e_get_stats_count for more details. 1827 **/ 1828 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 1829 { 1830 struct i40e_netdev_priv *np = netdev_priv(netdev); 1831 struct i40e_vsi *vsi = np->vsi; 1832 struct i40e_pf *pf = vsi->back; 1833 unsigned int i; 1834 u8 *p = data; 1835 1836 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1837 snprintf(data, ETH_GSTRING_LEN, "%s", 1838 i40e_gstrings_net_stats[i].stat_string); 1839 data += ETH_GSTRING_LEN; 1840 } 1841 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1842 snprintf(data, ETH_GSTRING_LEN, "%s", 1843 i40e_gstrings_misc_stats[i].stat_string); 1844 data += ETH_GSTRING_LEN; 1845 } 1846 for (i = 0; i < I40E_MAX_NUM_QUEUES(netdev); i++) { 1847 snprintf(data, ETH_GSTRING_LEN, "tx-%u.tx_packets", i); 1848 data += ETH_GSTRING_LEN; 1849 snprintf(data, ETH_GSTRING_LEN, "tx-%u.tx_bytes", i); 1850 data += ETH_GSTRING_LEN; 1851 snprintf(data, ETH_GSTRING_LEN, "rx-%u.rx_packets", i); 1852 data += ETH_GSTRING_LEN; 1853 snprintf(data, ETH_GSTRING_LEN, "rx-%u.rx_bytes", i); 1854 data += ETH_GSTRING_LEN; 1855 } 1856 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1857 return; 1858 1859 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1860 snprintf(data, ETH_GSTRING_LEN, "%s", 1861 i40e_gstrings_veb_stats[i].stat_string); 1862 data += ETH_GSTRING_LEN; 1863 } 1864 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1865 snprintf(data, ETH_GSTRING_LEN, 1866 "veb.tc_%u_tx_packets", i); 1867 data += ETH_GSTRING_LEN; 1868 snprintf(data, ETH_GSTRING_LEN, 1869 "veb.tc_%u_tx_bytes", i); 1870 data += ETH_GSTRING_LEN; 1871 snprintf(data, ETH_GSTRING_LEN, 1872 "veb.tc_%u_rx_packets", i); 1873 data += ETH_GSTRING_LEN; 1874 snprintf(data, ETH_GSTRING_LEN, 1875 "veb.tc_%u_rx_bytes", i); 1876 data += ETH_GSTRING_LEN; 1877 } 1878 1879 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1880 snprintf(data, ETH_GSTRING_LEN, "%s", 1881 i40e_gstrings_stats[i].stat_string); 1882 data += ETH_GSTRING_LEN; 1883 } 1884 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1885 snprintf(data, ETH_GSTRING_LEN, 1886 "port.tx_priority_%u_xon", i); 1887 data += ETH_GSTRING_LEN; 1888 snprintf(data, ETH_GSTRING_LEN, 1889 "port.tx_priority_%u_xoff", i); 1890 data += ETH_GSTRING_LEN; 1891 } 1892 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1893 snprintf(data, ETH_GSTRING_LEN, 1894 "port.rx_priority_%u_xon", i); 1895 data += ETH_GSTRING_LEN; 1896 snprintf(data, ETH_GSTRING_LEN, 1897 "port.rx_priority_%u_xoff", i); 1898 data += ETH_GSTRING_LEN; 1899 } 1900 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1901 snprintf(data, ETH_GSTRING_LEN, 1902 "port.rx_priority_%u_xon_2_xoff", i); 1903 data += ETH_GSTRING_LEN; 1904 } 1905 1906 WARN_ONCE(p - data != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 1907 "stat strings count mismatch!"); 1908 } 1909 1910 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 1911 { 1912 struct i40e_netdev_priv *np = netdev_priv(netdev); 1913 struct i40e_vsi *vsi = np->vsi; 1914 struct i40e_pf *pf = vsi->back; 1915 char *p = (char *)data; 1916 unsigned int i; 1917 1918 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1919 snprintf(p, ETH_GSTRING_LEN, "%s", 1920 i40e_gstrings_priv_flags[i].flag_string); 1921 p += ETH_GSTRING_LEN; 1922 } 1923 if (pf->hw.pf_id != 0) 1924 return; 1925 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1926 snprintf(p, ETH_GSTRING_LEN, "%s", 1927 i40e_gl_gstrings_priv_flags[i].flag_string); 1928 p += ETH_GSTRING_LEN; 1929 } 1930 } 1931 1932 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1933 u8 *data) 1934 { 1935 switch (stringset) { 1936 case ETH_SS_TEST: 1937 memcpy(data, i40e_gstrings_test, 1938 I40E_TEST_LEN * ETH_GSTRING_LEN); 1939 break; 1940 case ETH_SS_STATS: 1941 i40e_get_stat_strings(netdev, data); 1942 break; 1943 case ETH_SS_PRIV_FLAGS: 1944 i40e_get_priv_flag_strings(netdev, data); 1945 break; 1946 default: 1947 break; 1948 } 1949 } 1950 1951 static int i40e_get_ts_info(struct net_device *dev, 1952 struct ethtool_ts_info *info) 1953 { 1954 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1955 1956 /* only report HW timestamping if PTP is enabled */ 1957 if (!(pf->flags & I40E_FLAG_PTP)) 1958 return ethtool_op_get_ts_info(dev, info); 1959 1960 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1961 SOF_TIMESTAMPING_RX_SOFTWARE | 1962 SOF_TIMESTAMPING_SOFTWARE | 1963 SOF_TIMESTAMPING_TX_HARDWARE | 1964 SOF_TIMESTAMPING_RX_HARDWARE | 1965 SOF_TIMESTAMPING_RAW_HARDWARE; 1966 1967 if (pf->ptp_clock) 1968 info->phc_index = ptp_clock_index(pf->ptp_clock); 1969 else 1970 info->phc_index = -1; 1971 1972 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1973 1974 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1975 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1976 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1977 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1978 1979 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1980 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1981 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1982 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1983 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1984 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1985 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1986 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1987 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1988 1989 return 0; 1990 } 1991 1992 static int i40e_link_test(struct net_device *netdev, u64 *data) 1993 { 1994 struct i40e_netdev_priv *np = netdev_priv(netdev); 1995 struct i40e_pf *pf = np->vsi->back; 1996 i40e_status status; 1997 bool link_up = false; 1998 1999 netif_info(pf, hw, netdev, "link test\n"); 2000 status = i40e_get_link_status(&pf->hw, &link_up); 2001 if (status) { 2002 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2003 *data = 1; 2004 return *data; 2005 } 2006 2007 if (link_up) 2008 *data = 0; 2009 else 2010 *data = 1; 2011 2012 return *data; 2013 } 2014 2015 static int i40e_reg_test(struct net_device *netdev, u64 *data) 2016 { 2017 struct i40e_netdev_priv *np = netdev_priv(netdev); 2018 struct i40e_pf *pf = np->vsi->back; 2019 2020 netif_info(pf, hw, netdev, "register test\n"); 2021 *data = i40e_diag_reg_test(&pf->hw); 2022 2023 return *data; 2024 } 2025 2026 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 2027 { 2028 struct i40e_netdev_priv *np = netdev_priv(netdev); 2029 struct i40e_pf *pf = np->vsi->back; 2030 2031 netif_info(pf, hw, netdev, "eeprom test\n"); 2032 *data = i40e_diag_eeprom_test(&pf->hw); 2033 2034 /* forcebly clear the NVM Update state machine */ 2035 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2036 2037 return *data; 2038 } 2039 2040 static int i40e_intr_test(struct net_device *netdev, u64 *data) 2041 { 2042 struct i40e_netdev_priv *np = netdev_priv(netdev); 2043 struct i40e_pf *pf = np->vsi->back; 2044 u16 swc_old = pf->sw_int_count; 2045 2046 netif_info(pf, hw, netdev, "interrupt test\n"); 2047 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2048 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2049 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2050 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2051 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2052 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2053 usleep_range(1000, 2000); 2054 *data = (swc_old == pf->sw_int_count); 2055 2056 return *data; 2057 } 2058 2059 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2060 { 2061 struct i40e_vf *vfs = pf->vf; 2062 int i; 2063 2064 for (i = 0; i < pf->num_alloc_vfs; i++) 2065 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2066 return true; 2067 return false; 2068 } 2069 2070 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2071 { 2072 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2073 } 2074 2075 static void i40e_diag_test(struct net_device *netdev, 2076 struct ethtool_test *eth_test, u64 *data) 2077 { 2078 struct i40e_netdev_priv *np = netdev_priv(netdev); 2079 bool if_running = netif_running(netdev); 2080 struct i40e_pf *pf = np->vsi->back; 2081 2082 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2083 /* Offline tests */ 2084 netif_info(pf, drv, netdev, "offline testing starting\n"); 2085 2086 set_bit(__I40E_TESTING, pf->state); 2087 2088 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2089 dev_warn(&pf->pdev->dev, 2090 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2091 data[I40E_ETH_TEST_REG] = 1; 2092 data[I40E_ETH_TEST_EEPROM] = 1; 2093 data[I40E_ETH_TEST_INTR] = 1; 2094 data[I40E_ETH_TEST_LINK] = 1; 2095 eth_test->flags |= ETH_TEST_FL_FAILED; 2096 clear_bit(__I40E_TESTING, pf->state); 2097 goto skip_ol_tests; 2098 } 2099 2100 /* If the device is online then take it offline */ 2101 if (if_running) 2102 /* indicate we're in test mode */ 2103 i40e_close(netdev); 2104 else 2105 /* This reset does not affect link - if it is 2106 * changed to a type of reset that does affect 2107 * link then the following link test would have 2108 * to be moved to before the reset 2109 */ 2110 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2111 2112 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2113 eth_test->flags |= ETH_TEST_FL_FAILED; 2114 2115 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2116 eth_test->flags |= ETH_TEST_FL_FAILED; 2117 2118 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2119 eth_test->flags |= ETH_TEST_FL_FAILED; 2120 2121 /* run reg test last, a reset is required after it */ 2122 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2123 eth_test->flags |= ETH_TEST_FL_FAILED; 2124 2125 clear_bit(__I40E_TESTING, pf->state); 2126 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2127 2128 if (if_running) 2129 i40e_open(netdev); 2130 } else { 2131 /* Online tests */ 2132 netif_info(pf, drv, netdev, "online testing starting\n"); 2133 2134 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2135 eth_test->flags |= ETH_TEST_FL_FAILED; 2136 2137 /* Offline only tests, not run in online; pass by default */ 2138 data[I40E_ETH_TEST_REG] = 0; 2139 data[I40E_ETH_TEST_EEPROM] = 0; 2140 data[I40E_ETH_TEST_INTR] = 0; 2141 } 2142 2143 skip_ol_tests: 2144 2145 netif_info(pf, drv, netdev, "testing finished\n"); 2146 } 2147 2148 static void i40e_get_wol(struct net_device *netdev, 2149 struct ethtool_wolinfo *wol) 2150 { 2151 struct i40e_netdev_priv *np = netdev_priv(netdev); 2152 struct i40e_pf *pf = np->vsi->back; 2153 struct i40e_hw *hw = &pf->hw; 2154 u16 wol_nvm_bits; 2155 2156 /* NVM bit on means WoL disabled for the port */ 2157 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2158 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2159 wol->supported = 0; 2160 wol->wolopts = 0; 2161 } else { 2162 wol->supported = WAKE_MAGIC; 2163 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2164 } 2165 } 2166 2167 /** 2168 * i40e_set_wol - set the WakeOnLAN configuration 2169 * @netdev: the netdev in question 2170 * @wol: the ethtool WoL setting data 2171 **/ 2172 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2173 { 2174 struct i40e_netdev_priv *np = netdev_priv(netdev); 2175 struct i40e_pf *pf = np->vsi->back; 2176 struct i40e_vsi *vsi = np->vsi; 2177 struct i40e_hw *hw = &pf->hw; 2178 u16 wol_nvm_bits; 2179 2180 /* WoL not supported if this isn't the controlling PF on the port */ 2181 if (hw->partition_id != 1) { 2182 i40e_partition_setting_complaint(pf); 2183 return -EOPNOTSUPP; 2184 } 2185 2186 if (vsi != pf->vsi[pf->lan_vsi]) 2187 return -EOPNOTSUPP; 2188 2189 /* NVM bit on means WoL disabled for the port */ 2190 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2191 if (BIT(hw->port) & wol_nvm_bits) 2192 return -EOPNOTSUPP; 2193 2194 /* only magic packet is supported */ 2195 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2196 return -EOPNOTSUPP; 2197 2198 /* is this a new value? */ 2199 if (pf->wol_en != !!wol->wolopts) { 2200 pf->wol_en = !!wol->wolopts; 2201 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2202 } 2203 2204 return 0; 2205 } 2206 2207 static int i40e_set_phys_id(struct net_device *netdev, 2208 enum ethtool_phys_id_state state) 2209 { 2210 struct i40e_netdev_priv *np = netdev_priv(netdev); 2211 i40e_status ret = 0; 2212 struct i40e_pf *pf = np->vsi->back; 2213 struct i40e_hw *hw = &pf->hw; 2214 int blink_freq = 2; 2215 u16 temp_status; 2216 2217 switch (state) { 2218 case ETHTOOL_ID_ACTIVE: 2219 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2220 pf->led_status = i40e_led_get(hw); 2221 } else { 2222 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2223 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2224 NULL); 2225 ret = i40e_led_get_phy(hw, &temp_status, 2226 &pf->phy_led_val); 2227 pf->led_status = temp_status; 2228 } 2229 return blink_freq; 2230 case ETHTOOL_ID_ON: 2231 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2232 i40e_led_set(hw, 0xf, false); 2233 else 2234 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2235 break; 2236 case ETHTOOL_ID_OFF: 2237 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2238 i40e_led_set(hw, 0x0, false); 2239 else 2240 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2241 break; 2242 case ETHTOOL_ID_INACTIVE: 2243 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2244 i40e_led_set(hw, pf->led_status, false); 2245 } else { 2246 ret = i40e_led_set_phy(hw, false, pf->led_status, 2247 (pf->phy_led_val | 2248 I40E_PHY_LED_MODE_ORIG)); 2249 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2250 i40e_aq_set_phy_debug(hw, 0, NULL); 2251 } 2252 break; 2253 default: 2254 break; 2255 } 2256 if (ret) 2257 return -ENOENT; 2258 else 2259 return 0; 2260 } 2261 2262 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2263 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2264 * 125us (8000 interrupts per second) == ITR(62) 2265 */ 2266 2267 /** 2268 * __i40e_get_coalesce - get per-queue coalesce settings 2269 * @netdev: the netdev to check 2270 * @ec: ethtool coalesce data structure 2271 * @queue: which queue to pick 2272 * 2273 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2274 * are per queue. If queue is <0 then we default to queue 0 as the 2275 * representative value. 2276 **/ 2277 static int __i40e_get_coalesce(struct net_device *netdev, 2278 struct ethtool_coalesce *ec, 2279 int queue) 2280 { 2281 struct i40e_netdev_priv *np = netdev_priv(netdev); 2282 struct i40e_ring *rx_ring, *tx_ring; 2283 struct i40e_vsi *vsi = np->vsi; 2284 2285 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2286 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2287 2288 /* rx and tx usecs has per queue value. If user doesn't specify the 2289 * queue, return queue 0's value to represent. 2290 */ 2291 if (queue < 0) 2292 queue = 0; 2293 else if (queue >= vsi->num_queue_pairs) 2294 return -EINVAL; 2295 2296 rx_ring = vsi->rx_rings[queue]; 2297 tx_ring = vsi->tx_rings[queue]; 2298 2299 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2300 ec->use_adaptive_rx_coalesce = 1; 2301 2302 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2303 ec->use_adaptive_tx_coalesce = 1; 2304 2305 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2306 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2307 2308 /* we use the _usecs_high to store/set the interrupt rate limit 2309 * that the hardware supports, that almost but not quite 2310 * fits the original intent of the ethtool variable, 2311 * the rx_coalesce_usecs_high limits total interrupts 2312 * per second from both tx/rx sources. 2313 */ 2314 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2315 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2316 2317 return 0; 2318 } 2319 2320 /** 2321 * i40e_get_coalesce - get a netdev's coalesce settings 2322 * @netdev: the netdev to check 2323 * @ec: ethtool coalesce data structure 2324 * 2325 * Gets the coalesce settings for a particular netdev. Note that if user has 2326 * modified per-queue settings, this only guarantees to represent queue 0. See 2327 * __i40e_get_coalesce for more details. 2328 **/ 2329 static int i40e_get_coalesce(struct net_device *netdev, 2330 struct ethtool_coalesce *ec) 2331 { 2332 return __i40e_get_coalesce(netdev, ec, -1); 2333 } 2334 2335 /** 2336 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2337 * @netdev: netdev structure 2338 * @ec: ethtool's coalesce settings 2339 * @queue: the particular queue to read 2340 * 2341 * Will read a specific queue's coalesce settings 2342 **/ 2343 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2344 struct ethtool_coalesce *ec) 2345 { 2346 return __i40e_get_coalesce(netdev, ec, queue); 2347 } 2348 2349 /** 2350 * i40e_set_itr_per_queue - set ITR values for specific queue 2351 * @vsi: the VSI to set values for 2352 * @ec: coalesce settings from ethtool 2353 * @queue: the queue to modify 2354 * 2355 * Change the ITR settings for a specific queue. 2356 **/ 2357 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2358 struct ethtool_coalesce *ec, 2359 int queue) 2360 { 2361 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2362 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2363 struct i40e_pf *pf = vsi->back; 2364 struct i40e_hw *hw = &pf->hw; 2365 struct i40e_q_vector *q_vector; 2366 u16 intrl; 2367 2368 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2369 2370 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2371 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2372 2373 if (ec->use_adaptive_rx_coalesce) 2374 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2375 else 2376 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2377 2378 if (ec->use_adaptive_tx_coalesce) 2379 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2380 else 2381 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2382 2383 q_vector = rx_ring->q_vector; 2384 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2385 2386 q_vector = tx_ring->q_vector; 2387 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2388 2389 /* The interrupt handler itself will take care of programming 2390 * the Tx and Rx ITR values based on the values we have entered 2391 * into the q_vector, no need to write the values now. 2392 */ 2393 2394 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2395 i40e_flush(hw); 2396 } 2397 2398 /** 2399 * __i40e_set_coalesce - set coalesce settings for particular queue 2400 * @netdev: the netdev to change 2401 * @ec: ethtool coalesce settings 2402 * @queue: the queue to change 2403 * 2404 * Sets the coalesce settings for a particular queue. 2405 **/ 2406 static int __i40e_set_coalesce(struct net_device *netdev, 2407 struct ethtool_coalesce *ec, 2408 int queue) 2409 { 2410 struct i40e_netdev_priv *np = netdev_priv(netdev); 2411 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2412 struct i40e_vsi *vsi = np->vsi; 2413 struct i40e_pf *pf = vsi->back; 2414 int i; 2415 2416 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2417 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2418 2419 if (queue < 0) { 2420 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2421 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2422 } else if (queue < vsi->num_queue_pairs) { 2423 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2424 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2425 } else { 2426 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2427 vsi->num_queue_pairs - 1); 2428 return -EINVAL; 2429 } 2430 2431 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2432 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2433 2434 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2435 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2436 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2437 return -EINVAL; 2438 } 2439 2440 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2441 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2442 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2443 return -EINVAL; 2444 } 2445 2446 if (ec->rx_coalesce_usecs != cur_rx_itr && 2447 ec->use_adaptive_rx_coalesce) { 2448 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2449 return -EINVAL; 2450 } 2451 2452 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2453 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2454 return -EINVAL; 2455 } 2456 2457 if (ec->tx_coalesce_usecs != cur_tx_itr && 2458 ec->use_adaptive_tx_coalesce) { 2459 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2460 return -EINVAL; 2461 } 2462 2463 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2464 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2465 return -EINVAL; 2466 } 2467 2468 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2469 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2470 2471 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2472 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2473 2474 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2475 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2476 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2477 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2478 vsi->int_rate_limit); 2479 } 2480 2481 /* rx and tx usecs has per queue value. If user doesn't specify the 2482 * queue, apply to all queues. 2483 */ 2484 if (queue < 0) { 2485 for (i = 0; i < vsi->num_queue_pairs; i++) 2486 i40e_set_itr_per_queue(vsi, ec, i); 2487 } else { 2488 i40e_set_itr_per_queue(vsi, ec, queue); 2489 } 2490 2491 return 0; 2492 } 2493 2494 /** 2495 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2496 * @netdev: the netdev to change 2497 * @ec: ethtool coalesce settings 2498 * 2499 * This will set each queue to the same coalesce settings. 2500 **/ 2501 static int i40e_set_coalesce(struct net_device *netdev, 2502 struct ethtool_coalesce *ec) 2503 { 2504 return __i40e_set_coalesce(netdev, ec, -1); 2505 } 2506 2507 /** 2508 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2509 * @netdev: the netdev to change 2510 * @ec: ethtool's coalesce settings 2511 * @queue: the queue to change 2512 * 2513 * Sets the specified queue's coalesce settings. 2514 **/ 2515 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2516 struct ethtool_coalesce *ec) 2517 { 2518 return __i40e_set_coalesce(netdev, ec, queue); 2519 } 2520 2521 /** 2522 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2523 * @pf: pointer to the physical function struct 2524 * @cmd: ethtool rxnfc command 2525 * 2526 * Returns Success if the flow is supported, else Invalid Input. 2527 **/ 2528 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2529 { 2530 struct i40e_hw *hw = &pf->hw; 2531 u8 flow_pctype = 0; 2532 u64 i_set = 0; 2533 2534 cmd->data = 0; 2535 2536 switch (cmd->flow_type) { 2537 case TCP_V4_FLOW: 2538 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2539 break; 2540 case UDP_V4_FLOW: 2541 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2542 break; 2543 case TCP_V6_FLOW: 2544 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2545 break; 2546 case UDP_V6_FLOW: 2547 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2548 break; 2549 case SCTP_V4_FLOW: 2550 case AH_ESP_V4_FLOW: 2551 case AH_V4_FLOW: 2552 case ESP_V4_FLOW: 2553 case IPV4_FLOW: 2554 case SCTP_V6_FLOW: 2555 case AH_ESP_V6_FLOW: 2556 case AH_V6_FLOW: 2557 case ESP_V6_FLOW: 2558 case IPV6_FLOW: 2559 /* Default is src/dest for IP, no matter the L4 hashing */ 2560 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2561 break; 2562 default: 2563 return -EINVAL; 2564 } 2565 2566 /* Read flow based hash input set register */ 2567 if (flow_pctype) { 2568 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2569 flow_pctype)) | 2570 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2571 flow_pctype)) << 32); 2572 } 2573 2574 /* Process bits of hash input set */ 2575 if (i_set) { 2576 if (i_set & I40E_L4_SRC_MASK) 2577 cmd->data |= RXH_L4_B_0_1; 2578 if (i_set & I40E_L4_DST_MASK) 2579 cmd->data |= RXH_L4_B_2_3; 2580 2581 if (cmd->flow_type == TCP_V4_FLOW || 2582 cmd->flow_type == UDP_V4_FLOW) { 2583 if (i_set & I40E_L3_SRC_MASK) 2584 cmd->data |= RXH_IP_SRC; 2585 if (i_set & I40E_L3_DST_MASK) 2586 cmd->data |= RXH_IP_DST; 2587 } else if (cmd->flow_type == TCP_V6_FLOW || 2588 cmd->flow_type == UDP_V6_FLOW) { 2589 if (i_set & I40E_L3_V6_SRC_MASK) 2590 cmd->data |= RXH_IP_SRC; 2591 if (i_set & I40E_L3_V6_DST_MASK) 2592 cmd->data |= RXH_IP_DST; 2593 } 2594 } 2595 2596 return 0; 2597 } 2598 2599 /** 2600 * i40e_check_mask - Check whether a mask field is set 2601 * @mask: the full mask value 2602 * @field: mask of the field to check 2603 * 2604 * If the given mask is fully set, return positive value. If the mask for the 2605 * field is fully unset, return zero. Otherwise return a negative error code. 2606 **/ 2607 static int i40e_check_mask(u64 mask, u64 field) 2608 { 2609 u64 value = mask & field; 2610 2611 if (value == field) 2612 return 1; 2613 else if (!value) 2614 return 0; 2615 else 2616 return -1; 2617 } 2618 2619 /** 2620 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2621 * @fsp: pointer to rx flow specification 2622 * @data: pointer to userdef data structure for storage 2623 * 2624 * Read the user-defined data and deconstruct the value into a structure. No 2625 * other code should read the user-defined data, so as to ensure that every 2626 * place consistently reads the value correctly. 2627 * 2628 * The user-defined field is a 64bit Big Endian format value, which we 2629 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2630 * be defined starting from the highest bits, while small bit field values 2631 * shall be defined starting from the lowest bits. 2632 * 2633 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2634 * and the filter should be rejected. The data structure will always be 2635 * modified even if FLOW_EXT is not set. 2636 * 2637 **/ 2638 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2639 struct i40e_rx_flow_userdef *data) 2640 { 2641 u64 value, mask; 2642 int valid; 2643 2644 /* Zero memory first so it's always consistent. */ 2645 memset(data, 0, sizeof(*data)); 2646 2647 if (!(fsp->flow_type & FLOW_EXT)) 2648 return 0; 2649 2650 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2651 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2652 2653 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2654 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2655 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2656 2657 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2658 if (valid < 0) { 2659 return -EINVAL; 2660 } else if (valid) { 2661 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2662 data->flex_offset = 2663 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2664 data->flex_filter = true; 2665 } 2666 2667 return 0; 2668 } 2669 2670 /** 2671 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2672 * @fsp: pointer to rx_flow specification 2673 * @data: pointer to return userdef data 2674 * 2675 * Reads the userdef data structure and properly fills in the user defined 2676 * fields of the rx_flow_spec. 2677 **/ 2678 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2679 struct i40e_rx_flow_userdef *data) 2680 { 2681 u64 value = 0, mask = 0; 2682 2683 if (data->flex_filter) { 2684 value |= data->flex_word; 2685 value |= (u64)data->flex_offset << 16; 2686 mask |= I40E_USERDEF_FLEX_FILTER; 2687 } 2688 2689 if (value || mask) 2690 fsp->flow_type |= FLOW_EXT; 2691 2692 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2693 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2694 } 2695 2696 /** 2697 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2698 * @pf: Pointer to the physical function struct 2699 * @cmd: The command to get or set Rx flow classification rules 2700 * @rule_locs: Array of used rule locations 2701 * 2702 * This function populates both the total and actual rule count of 2703 * the ethtool flow classification command 2704 * 2705 * Returns 0 on success or -EMSGSIZE if entry not found 2706 **/ 2707 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2708 struct ethtool_rxnfc *cmd, 2709 u32 *rule_locs) 2710 { 2711 struct i40e_fdir_filter *rule; 2712 struct hlist_node *node2; 2713 int cnt = 0; 2714 2715 /* report total rule count */ 2716 cmd->data = i40e_get_fd_cnt_all(pf); 2717 2718 hlist_for_each_entry_safe(rule, node2, 2719 &pf->fdir_filter_list, fdir_node) { 2720 if (cnt == cmd->rule_cnt) 2721 return -EMSGSIZE; 2722 2723 rule_locs[cnt] = rule->fd_id; 2724 cnt++; 2725 } 2726 2727 cmd->rule_cnt = cnt; 2728 2729 return 0; 2730 } 2731 2732 /** 2733 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2734 * @pf: Pointer to the physical function struct 2735 * @cmd: The command to get or set Rx flow classification rules 2736 * 2737 * This function looks up a filter based on the Rx flow classification 2738 * command and fills the flow spec info for it if found 2739 * 2740 * Returns 0 on success or -EINVAL if filter not found 2741 **/ 2742 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2743 struct ethtool_rxnfc *cmd) 2744 { 2745 struct ethtool_rx_flow_spec *fsp = 2746 (struct ethtool_rx_flow_spec *)&cmd->fs; 2747 struct i40e_rx_flow_userdef userdef = {0}; 2748 struct i40e_fdir_filter *rule = NULL; 2749 struct hlist_node *node2; 2750 u64 input_set; 2751 u16 index; 2752 2753 hlist_for_each_entry_safe(rule, node2, 2754 &pf->fdir_filter_list, fdir_node) { 2755 if (fsp->location <= rule->fd_id) 2756 break; 2757 } 2758 2759 if (!rule || fsp->location != rule->fd_id) 2760 return -EINVAL; 2761 2762 fsp->flow_type = rule->flow_type; 2763 if (fsp->flow_type == IP_USER_FLOW) { 2764 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2765 fsp->h_u.usr_ip4_spec.proto = 0; 2766 fsp->m_u.usr_ip4_spec.proto = 0; 2767 } 2768 2769 /* Reverse the src and dest notion, since the HW views them from 2770 * Tx perspective where as the user expects it from Rx filter view. 2771 */ 2772 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2773 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2774 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2775 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2776 2777 switch (rule->flow_type) { 2778 case SCTP_V4_FLOW: 2779 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2780 break; 2781 case TCP_V4_FLOW: 2782 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2783 break; 2784 case UDP_V4_FLOW: 2785 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2786 break; 2787 case IP_USER_FLOW: 2788 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2789 break; 2790 default: 2791 /* If we have stored a filter with a flow type not listed here 2792 * it is almost certainly a driver bug. WARN(), and then 2793 * assign the input_set as if all fields are enabled to avoid 2794 * reading unassigned memory. 2795 */ 2796 WARN(1, "Missing input set index for flow_type %d\n", 2797 rule->flow_type); 2798 input_set = 0xFFFFFFFFFFFFFFFFULL; 2799 goto no_input_set; 2800 } 2801 2802 input_set = i40e_read_fd_input_set(pf, index); 2803 2804 no_input_set: 2805 if (input_set & I40E_L3_SRC_MASK) 2806 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2807 2808 if (input_set & I40E_L3_DST_MASK) 2809 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2810 2811 if (input_set & I40E_L4_SRC_MASK) 2812 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2813 2814 if (input_set & I40E_L4_DST_MASK) 2815 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 2816 2817 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2818 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2819 else 2820 fsp->ring_cookie = rule->q_index; 2821 2822 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2823 struct i40e_vsi *vsi; 2824 2825 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2826 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2827 /* VFs are zero-indexed by the driver, but ethtool 2828 * expects them to be one-indexed, so add one here 2829 */ 2830 u64 ring_vf = vsi->vf_id + 1; 2831 2832 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2833 fsp->ring_cookie |= ring_vf; 2834 } 2835 } 2836 2837 if (rule->flex_filter) { 2838 userdef.flex_filter = true; 2839 userdef.flex_word = be16_to_cpu(rule->flex_word); 2840 userdef.flex_offset = rule->flex_offset; 2841 } 2842 2843 i40e_fill_rx_flow_user_data(fsp, &userdef); 2844 2845 return 0; 2846 } 2847 2848 /** 2849 * i40e_get_rxnfc - command to get RX flow classification rules 2850 * @netdev: network interface device structure 2851 * @cmd: ethtool rxnfc command 2852 * @rule_locs: pointer to store rule data 2853 * 2854 * Returns Success if the command is supported. 2855 **/ 2856 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2857 u32 *rule_locs) 2858 { 2859 struct i40e_netdev_priv *np = netdev_priv(netdev); 2860 struct i40e_vsi *vsi = np->vsi; 2861 struct i40e_pf *pf = vsi->back; 2862 int ret = -EOPNOTSUPP; 2863 2864 switch (cmd->cmd) { 2865 case ETHTOOL_GRXRINGS: 2866 cmd->data = vsi->rss_size; 2867 ret = 0; 2868 break; 2869 case ETHTOOL_GRXFH: 2870 ret = i40e_get_rss_hash_opts(pf, cmd); 2871 break; 2872 case ETHTOOL_GRXCLSRLCNT: 2873 cmd->rule_cnt = pf->fdir_pf_active_filters; 2874 /* report total rule count */ 2875 cmd->data = i40e_get_fd_cnt_all(pf); 2876 ret = 0; 2877 break; 2878 case ETHTOOL_GRXCLSRULE: 2879 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2880 break; 2881 case ETHTOOL_GRXCLSRLALL: 2882 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2883 break; 2884 default: 2885 break; 2886 } 2887 2888 return ret; 2889 } 2890 2891 /** 2892 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2893 * @nfc: pointer to user request 2894 * @i_setc: bits currently set 2895 * 2896 * Returns value of bits to be set per user request 2897 **/ 2898 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2899 { 2900 u64 i_set = i_setc; 2901 u64 src_l3 = 0, dst_l3 = 0; 2902 2903 if (nfc->data & RXH_L4_B_0_1) 2904 i_set |= I40E_L4_SRC_MASK; 2905 else 2906 i_set &= ~I40E_L4_SRC_MASK; 2907 if (nfc->data & RXH_L4_B_2_3) 2908 i_set |= I40E_L4_DST_MASK; 2909 else 2910 i_set &= ~I40E_L4_DST_MASK; 2911 2912 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2913 src_l3 = I40E_L3_V6_SRC_MASK; 2914 dst_l3 = I40E_L3_V6_DST_MASK; 2915 } else if (nfc->flow_type == TCP_V4_FLOW || 2916 nfc->flow_type == UDP_V4_FLOW) { 2917 src_l3 = I40E_L3_SRC_MASK; 2918 dst_l3 = I40E_L3_DST_MASK; 2919 } else { 2920 /* Any other flow type are not supported here */ 2921 return i_set; 2922 } 2923 2924 if (nfc->data & RXH_IP_SRC) 2925 i_set |= src_l3; 2926 else 2927 i_set &= ~src_l3; 2928 if (nfc->data & RXH_IP_DST) 2929 i_set |= dst_l3; 2930 else 2931 i_set &= ~dst_l3; 2932 2933 return i_set; 2934 } 2935 2936 /** 2937 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2938 * @pf: pointer to the physical function struct 2939 * @nfc: ethtool rxnfc command 2940 * 2941 * Returns Success if the flow input set is supported. 2942 **/ 2943 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2944 { 2945 struct i40e_hw *hw = &pf->hw; 2946 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2947 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2948 u8 flow_pctype = 0; 2949 u64 i_set, i_setc; 2950 2951 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2952 dev_err(&pf->pdev->dev, 2953 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2954 return -EOPNOTSUPP; 2955 } 2956 2957 /* RSS does not support anything other than hashing 2958 * to queues on src and dst IPs and ports 2959 */ 2960 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2961 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2962 return -EINVAL; 2963 2964 switch (nfc->flow_type) { 2965 case TCP_V4_FLOW: 2966 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2967 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2968 hena |= 2969 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2970 break; 2971 case TCP_V6_FLOW: 2972 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2973 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2974 hena |= 2975 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2976 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2977 hena |= 2978 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2979 break; 2980 case UDP_V4_FLOW: 2981 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2982 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2983 hena |= 2984 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2985 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2986 2987 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2988 break; 2989 case UDP_V6_FLOW: 2990 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2991 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2992 hena |= 2993 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2994 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2995 2996 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2997 break; 2998 case AH_ESP_V4_FLOW: 2999 case AH_V4_FLOW: 3000 case ESP_V4_FLOW: 3001 case SCTP_V4_FLOW: 3002 if ((nfc->data & RXH_L4_B_0_1) || 3003 (nfc->data & RXH_L4_B_2_3)) 3004 return -EINVAL; 3005 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3006 break; 3007 case AH_ESP_V6_FLOW: 3008 case AH_V6_FLOW: 3009 case ESP_V6_FLOW: 3010 case SCTP_V6_FLOW: 3011 if ((nfc->data & RXH_L4_B_0_1) || 3012 (nfc->data & RXH_L4_B_2_3)) 3013 return -EINVAL; 3014 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3015 break; 3016 case IPV4_FLOW: 3017 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3018 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3019 break; 3020 case IPV6_FLOW: 3021 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3022 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3023 break; 3024 default: 3025 return -EINVAL; 3026 } 3027 3028 if (flow_pctype) { 3029 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3030 flow_pctype)) | 3031 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3032 flow_pctype)) << 32); 3033 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3034 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3035 (u32)i_set); 3036 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3037 (u32)(i_set >> 32)); 3038 hena |= BIT_ULL(flow_pctype); 3039 } 3040 3041 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3042 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3043 i40e_flush(hw); 3044 3045 return 0; 3046 } 3047 3048 /** 3049 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3050 * @vsi: Pointer to the targeted VSI 3051 * @input: The filter to update or NULL to indicate deletion 3052 * @sw_idx: Software index to the filter 3053 * @cmd: The command to get or set Rx flow classification rules 3054 * 3055 * This function updates (or deletes) a Flow Director entry from 3056 * the hlist of the corresponding PF 3057 * 3058 * Returns 0 on success 3059 **/ 3060 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3061 struct i40e_fdir_filter *input, 3062 u16 sw_idx, 3063 struct ethtool_rxnfc *cmd) 3064 { 3065 struct i40e_fdir_filter *rule, *parent; 3066 struct i40e_pf *pf = vsi->back; 3067 struct hlist_node *node2; 3068 int err = -EINVAL; 3069 3070 parent = NULL; 3071 rule = NULL; 3072 3073 hlist_for_each_entry_safe(rule, node2, 3074 &pf->fdir_filter_list, fdir_node) { 3075 /* hash found, or no matching entry */ 3076 if (rule->fd_id >= sw_idx) 3077 break; 3078 parent = rule; 3079 } 3080 3081 /* if there is an old rule occupying our place remove it */ 3082 if (rule && (rule->fd_id == sw_idx)) { 3083 /* Remove this rule, since we're either deleting it, or 3084 * replacing it. 3085 */ 3086 err = i40e_add_del_fdir(vsi, rule, false); 3087 hlist_del(&rule->fdir_node); 3088 kfree(rule); 3089 pf->fdir_pf_active_filters--; 3090 } 3091 3092 /* If we weren't given an input, this is a delete, so just return the 3093 * error code indicating if there was an entry at the requested slot 3094 */ 3095 if (!input) 3096 return err; 3097 3098 /* Otherwise, install the new rule as requested */ 3099 INIT_HLIST_NODE(&input->fdir_node); 3100 3101 /* add filter to the list */ 3102 if (parent) 3103 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3104 else 3105 hlist_add_head(&input->fdir_node, 3106 &pf->fdir_filter_list); 3107 3108 /* update counts */ 3109 pf->fdir_pf_active_filters++; 3110 3111 return 0; 3112 } 3113 3114 /** 3115 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3116 * @pf: pointer to PF structure 3117 * 3118 * This function searches the list of filters and determines which FLX_PIT 3119 * entries are still required. It will prune any entries which are no longer 3120 * in use after the deletion. 3121 **/ 3122 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3123 { 3124 struct i40e_flex_pit *entry, *tmp; 3125 struct i40e_fdir_filter *rule; 3126 3127 /* First, we'll check the l3 table */ 3128 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3129 bool found = false; 3130 3131 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3132 if (rule->flow_type != IP_USER_FLOW) 3133 continue; 3134 if (rule->flex_filter && 3135 rule->flex_offset == entry->src_offset) { 3136 found = true; 3137 break; 3138 } 3139 } 3140 3141 /* If we didn't find the filter, then we can prune this entry 3142 * from the list. 3143 */ 3144 if (!found) { 3145 list_del(&entry->list); 3146 kfree(entry); 3147 } 3148 } 3149 3150 /* Followed by the L4 table */ 3151 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3152 bool found = false; 3153 3154 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3155 /* Skip this filter if it's L3, since we already 3156 * checked those in the above loop 3157 */ 3158 if (rule->flow_type == IP_USER_FLOW) 3159 continue; 3160 if (rule->flex_filter && 3161 rule->flex_offset == entry->src_offset) { 3162 found = true; 3163 break; 3164 } 3165 } 3166 3167 /* If we didn't find the filter, then we can prune this entry 3168 * from the list. 3169 */ 3170 if (!found) { 3171 list_del(&entry->list); 3172 kfree(entry); 3173 } 3174 } 3175 } 3176 3177 /** 3178 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3179 * @vsi: Pointer to the targeted VSI 3180 * @cmd: The command to get or set Rx flow classification rules 3181 * 3182 * The function removes a Flow Director filter entry from the 3183 * hlist of the corresponding PF 3184 * 3185 * Returns 0 on success 3186 */ 3187 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3188 struct ethtool_rxnfc *cmd) 3189 { 3190 struct ethtool_rx_flow_spec *fsp = 3191 (struct ethtool_rx_flow_spec *)&cmd->fs; 3192 struct i40e_pf *pf = vsi->back; 3193 int ret = 0; 3194 3195 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3196 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3197 return -EBUSY; 3198 3199 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3200 return -EBUSY; 3201 3202 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3203 3204 i40e_prune_flex_pit_list(pf); 3205 3206 i40e_fdir_check_and_reenable(pf); 3207 return ret; 3208 } 3209 3210 /** 3211 * i40e_unused_pit_index - Find an unused PIT index for given list 3212 * @pf: the PF data structure 3213 * 3214 * Find the first unused flexible PIT index entry. We search both the L3 and 3215 * L4 flexible PIT lists so that the returned index is unique and unused by 3216 * either currently programmed L3 or L4 filters. We use a bit field as storage 3217 * to track which indexes are already used. 3218 **/ 3219 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3220 { 3221 unsigned long available_index = 0xFF; 3222 struct i40e_flex_pit *entry; 3223 3224 /* We need to make sure that the new index isn't in use by either L3 3225 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3226 * L4 to use the same index. 3227 */ 3228 3229 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3230 clear_bit(entry->pit_index, &available_index); 3231 3232 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3233 clear_bit(entry->pit_index, &available_index); 3234 3235 return find_first_bit(&available_index, 8); 3236 } 3237 3238 /** 3239 * i40e_find_flex_offset - Find an existing flex src_offset 3240 * @flex_pit_list: L3 or L4 flex PIT list 3241 * @src_offset: new src_offset to find 3242 * 3243 * Searches the flex_pit_list for an existing offset. If no offset is 3244 * currently programmed, then this will return an ERR_PTR if there is no space 3245 * to add a new offset, otherwise it returns NULL. 3246 **/ 3247 static 3248 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3249 u16 src_offset) 3250 { 3251 struct i40e_flex_pit *entry; 3252 int size = 0; 3253 3254 /* Search for the src_offset first. If we find a matching entry 3255 * already programmed, we can simply re-use it. 3256 */ 3257 list_for_each_entry(entry, flex_pit_list, list) { 3258 size++; 3259 if (entry->src_offset == src_offset) 3260 return entry; 3261 } 3262 3263 /* If we haven't found an entry yet, then the provided src offset has 3264 * not yet been programmed. We will program the src offset later on, 3265 * but we need to indicate whether there is enough space to do so 3266 * here. We'll make use of ERR_PTR for this purpose. 3267 */ 3268 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3269 return ERR_PTR(-ENOSPC); 3270 3271 return NULL; 3272 } 3273 3274 /** 3275 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3276 * @flex_pit_list: L3 or L4 flex PIT list 3277 * @src_offset: new src_offset to add 3278 * @pit_index: the PIT index to program 3279 * 3280 * This function programs the new src_offset to the list. It is expected that 3281 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3282 * that this offset is not programmed, and that the list has enough space to 3283 * store another offset. 3284 * 3285 * Returns 0 on success, and negative value on error. 3286 **/ 3287 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3288 u16 src_offset, 3289 u8 pit_index) 3290 { 3291 struct i40e_flex_pit *new_pit, *entry; 3292 3293 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3294 if (!new_pit) 3295 return -ENOMEM; 3296 3297 new_pit->src_offset = src_offset; 3298 new_pit->pit_index = pit_index; 3299 3300 /* We need to insert this item such that the list is sorted by 3301 * src_offset in ascending order. 3302 */ 3303 list_for_each_entry(entry, flex_pit_list, list) { 3304 if (new_pit->src_offset < entry->src_offset) { 3305 list_add_tail(&new_pit->list, &entry->list); 3306 return 0; 3307 } 3308 3309 /* If we found an entry with our offset already programmed we 3310 * can simply return here, after freeing the memory. However, 3311 * if the pit_index does not match we need to report an error. 3312 */ 3313 if (new_pit->src_offset == entry->src_offset) { 3314 int err = 0; 3315 3316 /* If the PIT index is not the same we can't re-use 3317 * the entry, so we must report an error. 3318 */ 3319 if (new_pit->pit_index != entry->pit_index) 3320 err = -EINVAL; 3321 3322 kfree(new_pit); 3323 return err; 3324 } 3325 } 3326 3327 /* If we reached here, then we haven't yet added the item. This means 3328 * that we should add the item at the end of the list. 3329 */ 3330 list_add_tail(&new_pit->list, flex_pit_list); 3331 return 0; 3332 } 3333 3334 /** 3335 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3336 * @pf: Pointer to the PF structure 3337 * @flex_pit_list: list of flexible src offsets in use 3338 * @flex_pit_start: index to first entry for this section of the table 3339 * 3340 * In order to handle flexible data, the hardware uses a table of values 3341 * called the FLX_PIT table. This table is used to indicate which sections of 3342 * the input correspond to what PIT index values. Unfortunately, hardware is 3343 * very restrictive about programming this table. Entries must be ordered by 3344 * src_offset in ascending order, without duplicates. Additionally, unused 3345 * entries must be set to the unused index value, and must have valid size and 3346 * length according to the src_offset ordering. 3347 * 3348 * This function will reprogram the FLX_PIT register from a book-keeping 3349 * structure that we guarantee is already ordered correctly, and has no more 3350 * than 3 entries. 3351 * 3352 * To make things easier, we only support flexible values of one word length, 3353 * rather than allowing variable length flexible values. 3354 **/ 3355 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3356 struct list_head *flex_pit_list, 3357 int flex_pit_start) 3358 { 3359 struct i40e_flex_pit *entry = NULL; 3360 u16 last_offset = 0; 3361 int i = 0, j = 0; 3362 3363 /* First, loop over the list of flex PIT entries, and reprogram the 3364 * registers. 3365 */ 3366 list_for_each_entry(entry, flex_pit_list, list) { 3367 /* We have to be careful when programming values for the 3368 * largest SRC_OFFSET value. It is possible that adding 3369 * additional empty values at the end would overflow the space 3370 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3371 * we check here and add the empty values prior to adding the 3372 * largest value. 3373 * 3374 * To determine this, we will use a loop from i+1 to 3, which 3375 * will determine whether the unused entries would have valid 3376 * SRC_OFFSET. Note that there cannot be extra entries past 3377 * this value, because the only valid values would have been 3378 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3379 * have been added to the list in the first place. 3380 */ 3381 for (j = i + 1; j < 3; j++) { 3382 u16 offset = entry->src_offset + j; 3383 int index = flex_pit_start + i; 3384 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3385 1, 3386 offset - 3); 3387 3388 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3389 i40e_write_rx_ctl(&pf->hw, 3390 I40E_PRTQF_FLX_PIT(index), 3391 value); 3392 i++; 3393 } 3394 } 3395 3396 /* Now, we can program the actual value into the table */ 3397 i40e_write_rx_ctl(&pf->hw, 3398 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3399 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3400 1, 3401 entry->src_offset)); 3402 i++; 3403 } 3404 3405 /* In order to program the last entries in the table, we need to 3406 * determine the valid offset. If the list is empty, we'll just start 3407 * with 0. Otherwise, we'll start with the last item offset and add 1. 3408 * This ensures that all entries have valid sizes. If we don't do this 3409 * correctly, the hardware will disable flexible field parsing. 3410 */ 3411 if (!list_empty(flex_pit_list)) 3412 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3413 3414 for (; i < 3; i++, last_offset++) { 3415 i40e_write_rx_ctl(&pf->hw, 3416 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3417 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3418 1, 3419 last_offset)); 3420 } 3421 } 3422 3423 /** 3424 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3425 * @pf: pointer to the PF structure 3426 * 3427 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3428 * internal helper function for implementation details. 3429 **/ 3430 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3431 { 3432 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3433 I40E_FLEX_PIT_IDX_START_L3); 3434 3435 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3436 I40E_FLEX_PIT_IDX_START_L4); 3437 3438 /* We also need to program the L3 and L4 GLQF ORT register */ 3439 i40e_write_rx_ctl(&pf->hw, 3440 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3441 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3442 3, 1)); 3443 3444 i40e_write_rx_ctl(&pf->hw, 3445 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3446 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3447 3, 1)); 3448 } 3449 3450 /** 3451 * i40e_flow_str - Converts a flow_type into a human readable string 3452 * @fsp: the flow specification 3453 * 3454 * Currently only flow types we support are included here, and the string 3455 * value attempts to match what ethtool would use to configure this flow type. 3456 **/ 3457 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3458 { 3459 switch (fsp->flow_type & ~FLOW_EXT) { 3460 case TCP_V4_FLOW: 3461 return "tcp4"; 3462 case UDP_V4_FLOW: 3463 return "udp4"; 3464 case SCTP_V4_FLOW: 3465 return "sctp4"; 3466 case IP_USER_FLOW: 3467 return "ip4"; 3468 default: 3469 return "unknown"; 3470 } 3471 } 3472 3473 /** 3474 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3475 * @pit_index: PIT index to convert 3476 * 3477 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3478 * of range. 3479 **/ 3480 static u64 i40e_pit_index_to_mask(int pit_index) 3481 { 3482 switch (pit_index) { 3483 case 0: 3484 return I40E_FLEX_50_MASK; 3485 case 1: 3486 return I40E_FLEX_51_MASK; 3487 case 2: 3488 return I40E_FLEX_52_MASK; 3489 case 3: 3490 return I40E_FLEX_53_MASK; 3491 case 4: 3492 return I40E_FLEX_54_MASK; 3493 case 5: 3494 return I40E_FLEX_55_MASK; 3495 case 6: 3496 return I40E_FLEX_56_MASK; 3497 case 7: 3498 return I40E_FLEX_57_MASK; 3499 default: 3500 return 0; 3501 } 3502 } 3503 3504 /** 3505 * i40e_print_input_set - Show changes between two input sets 3506 * @vsi: the vsi being configured 3507 * @old: the old input set 3508 * @new: the new input set 3509 * 3510 * Print the difference between old and new input sets by showing which series 3511 * of words are toggled on or off. Only displays the bits we actually support 3512 * changing. 3513 **/ 3514 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3515 { 3516 struct i40e_pf *pf = vsi->back; 3517 bool old_value, new_value; 3518 int i; 3519 3520 old_value = !!(old & I40E_L3_SRC_MASK); 3521 new_value = !!(new & I40E_L3_SRC_MASK); 3522 if (old_value != new_value) 3523 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3524 old_value ? "ON" : "OFF", 3525 new_value ? "ON" : "OFF"); 3526 3527 old_value = !!(old & I40E_L3_DST_MASK); 3528 new_value = !!(new & I40E_L3_DST_MASK); 3529 if (old_value != new_value) 3530 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3531 old_value ? "ON" : "OFF", 3532 new_value ? "ON" : "OFF"); 3533 3534 old_value = !!(old & I40E_L4_SRC_MASK); 3535 new_value = !!(new & I40E_L4_SRC_MASK); 3536 if (old_value != new_value) 3537 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3538 old_value ? "ON" : "OFF", 3539 new_value ? "ON" : "OFF"); 3540 3541 old_value = !!(old & I40E_L4_DST_MASK); 3542 new_value = !!(new & I40E_L4_DST_MASK); 3543 if (old_value != new_value) 3544 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3545 old_value ? "ON" : "OFF", 3546 new_value ? "ON" : "OFF"); 3547 3548 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3549 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3550 if (old_value != new_value) 3551 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3552 old_value ? "ON" : "OFF", 3553 new_value ? "ON" : "OFF"); 3554 3555 /* Show change of flexible filter entries */ 3556 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3557 u64 flex_mask = i40e_pit_index_to_mask(i); 3558 3559 old_value = !!(old & flex_mask); 3560 new_value = !!(new & flex_mask); 3561 if (old_value != new_value) 3562 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3563 i, 3564 old_value ? "ON" : "OFF", 3565 new_value ? "ON" : "OFF"); 3566 } 3567 3568 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3569 old); 3570 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3571 new); 3572 } 3573 3574 /** 3575 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3576 * @vsi: pointer to the targeted VSI 3577 * @fsp: pointer to Rx flow specification 3578 * @userdef: userdefined data from flow specification 3579 * 3580 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3581 * for partial matches exists with a few limitations. First, hardware only 3582 * supports masking by word boundary (2 bytes) and not per individual bit. 3583 * Second, hardware is limited to using one mask for a flow type and cannot 3584 * use a separate mask for each filter. 3585 * 3586 * To support these limitations, if we already have a configured filter for 3587 * the specified type, this function enforces that new filters of the type 3588 * match the configured input set. Otherwise, if we do not have a filter of 3589 * the specified type, we allow the input set to be updated to match the 3590 * desired filter. 3591 * 3592 * To help ensure that administrators understand why filters weren't displayed 3593 * as supported, we print a diagnostic message displaying how the input set 3594 * would change and warning to delete the preexisting filters if required. 3595 * 3596 * Returns 0 on successful input set match, and a negative return code on 3597 * failure. 3598 **/ 3599 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3600 struct ethtool_rx_flow_spec *fsp, 3601 struct i40e_rx_flow_userdef *userdef) 3602 { 3603 struct i40e_pf *pf = vsi->back; 3604 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3605 struct ethtool_usrip4_spec *usr_ip4_spec; 3606 u64 current_mask, new_mask; 3607 bool new_flex_offset = false; 3608 bool flex_l3 = false; 3609 u16 *fdir_filter_count; 3610 u16 index, src_offset = 0; 3611 u8 pit_index = 0; 3612 int err; 3613 3614 switch (fsp->flow_type & ~FLOW_EXT) { 3615 case SCTP_V4_FLOW: 3616 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3617 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3618 break; 3619 case TCP_V4_FLOW: 3620 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3621 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3622 break; 3623 case UDP_V4_FLOW: 3624 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3625 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3626 break; 3627 case IP_USER_FLOW: 3628 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3629 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3630 flex_l3 = true; 3631 break; 3632 default: 3633 return -EOPNOTSUPP; 3634 } 3635 3636 /* Read the current input set from register memory. */ 3637 current_mask = i40e_read_fd_input_set(pf, index); 3638 new_mask = current_mask; 3639 3640 /* Determine, if any, the required changes to the input set in order 3641 * to support the provided mask. 3642 * 3643 * Hardware only supports masking at word (2 byte) granularity and does 3644 * not support full bitwise masking. This implementation simplifies 3645 * even further and only supports fully enabled or fully disabled 3646 * masks for each field, even though we could split the ip4src and 3647 * ip4dst fields. 3648 */ 3649 switch (fsp->flow_type & ~FLOW_EXT) { 3650 case SCTP_V4_FLOW: 3651 new_mask &= ~I40E_VERIFY_TAG_MASK; 3652 /* Fall through */ 3653 case TCP_V4_FLOW: 3654 case UDP_V4_FLOW: 3655 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3656 3657 /* IPv4 source address */ 3658 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3659 new_mask |= I40E_L3_SRC_MASK; 3660 else if (!tcp_ip4_spec->ip4src) 3661 new_mask &= ~I40E_L3_SRC_MASK; 3662 else 3663 return -EOPNOTSUPP; 3664 3665 /* IPv4 destination address */ 3666 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3667 new_mask |= I40E_L3_DST_MASK; 3668 else if (!tcp_ip4_spec->ip4dst) 3669 new_mask &= ~I40E_L3_DST_MASK; 3670 else 3671 return -EOPNOTSUPP; 3672 3673 /* L4 source port */ 3674 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3675 new_mask |= I40E_L4_SRC_MASK; 3676 else if (!tcp_ip4_spec->psrc) 3677 new_mask &= ~I40E_L4_SRC_MASK; 3678 else 3679 return -EOPNOTSUPP; 3680 3681 /* L4 destination port */ 3682 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3683 new_mask |= I40E_L4_DST_MASK; 3684 else if (!tcp_ip4_spec->pdst) 3685 new_mask &= ~I40E_L4_DST_MASK; 3686 else 3687 return -EOPNOTSUPP; 3688 3689 /* Filtering on Type of Service is not supported. */ 3690 if (tcp_ip4_spec->tos) 3691 return -EOPNOTSUPP; 3692 3693 break; 3694 case IP_USER_FLOW: 3695 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3696 3697 /* IPv4 source address */ 3698 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3699 new_mask |= I40E_L3_SRC_MASK; 3700 else if (!usr_ip4_spec->ip4src) 3701 new_mask &= ~I40E_L3_SRC_MASK; 3702 else 3703 return -EOPNOTSUPP; 3704 3705 /* IPv4 destination address */ 3706 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3707 new_mask |= I40E_L3_DST_MASK; 3708 else if (!usr_ip4_spec->ip4dst) 3709 new_mask &= ~I40E_L3_DST_MASK; 3710 else 3711 return -EOPNOTSUPP; 3712 3713 /* First 4 bytes of L4 header */ 3714 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3715 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3716 else if (!usr_ip4_spec->l4_4_bytes) 3717 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3718 else 3719 return -EOPNOTSUPP; 3720 3721 /* Filtering on Type of Service is not supported. */ 3722 if (usr_ip4_spec->tos) 3723 return -EOPNOTSUPP; 3724 3725 /* Filtering on IP version is not supported */ 3726 if (usr_ip4_spec->ip_ver) 3727 return -EINVAL; 3728 3729 /* Filtering on L4 protocol is not supported */ 3730 if (usr_ip4_spec->proto) 3731 return -EINVAL; 3732 3733 break; 3734 default: 3735 return -EOPNOTSUPP; 3736 } 3737 3738 /* First, clear all flexible filter entries */ 3739 new_mask &= ~I40E_FLEX_INPUT_MASK; 3740 3741 /* If we have a flexible filter, try to add this offset to the correct 3742 * flexible filter PIT list. Once finished, we can update the mask. 3743 * If the src_offset changed, we will get a new mask value which will 3744 * trigger an input set change. 3745 */ 3746 if (userdef->flex_filter) { 3747 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3748 3749 /* Flexible offset must be even, since the flexible payload 3750 * must be aligned on 2-byte boundary. 3751 */ 3752 if (userdef->flex_offset & 0x1) { 3753 dev_warn(&pf->pdev->dev, 3754 "Flexible data offset must be 2-byte aligned\n"); 3755 return -EINVAL; 3756 } 3757 3758 src_offset = userdef->flex_offset >> 1; 3759 3760 /* FLX_PIT source offset value is only so large */ 3761 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3762 dev_warn(&pf->pdev->dev, 3763 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3764 return -EINVAL; 3765 } 3766 3767 /* See if this offset has already been programmed. If we get 3768 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3769 * if we get a NULL pointer, this means we will need to add 3770 * the offset. 3771 */ 3772 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3773 src_offset); 3774 if (IS_ERR(flex_pit)) 3775 return PTR_ERR(flex_pit); 3776 3777 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3778 * packet types, and thus we need to program both L3 and L4 3779 * flexible values. These must have identical flexible index, 3780 * as otherwise we can't correctly program the input set. So 3781 * we'll find both an L3 and L4 index and make sure they are 3782 * the same. 3783 */ 3784 if (flex_l3) { 3785 l3_flex_pit = 3786 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3787 src_offset); 3788 if (IS_ERR(l3_flex_pit)) 3789 return PTR_ERR(l3_flex_pit); 3790 3791 if (flex_pit) { 3792 /* If we already had a matching L4 entry, we 3793 * need to make sure that the L3 entry we 3794 * obtained uses the same index. 3795 */ 3796 if (l3_flex_pit) { 3797 if (l3_flex_pit->pit_index != 3798 flex_pit->pit_index) { 3799 return -EINVAL; 3800 } 3801 } else { 3802 new_flex_offset = true; 3803 } 3804 } else { 3805 flex_pit = l3_flex_pit; 3806 } 3807 } 3808 3809 /* If we didn't find an existing flex offset, we need to 3810 * program a new one. However, we don't immediately program it 3811 * here because we will wait to program until after we check 3812 * that it is safe to change the input set. 3813 */ 3814 if (!flex_pit) { 3815 new_flex_offset = true; 3816 pit_index = i40e_unused_pit_index(pf); 3817 } else { 3818 pit_index = flex_pit->pit_index; 3819 } 3820 3821 /* Update the mask with the new offset */ 3822 new_mask |= i40e_pit_index_to_mask(pit_index); 3823 } 3824 3825 /* If the mask and flexible filter offsets for this filter match the 3826 * currently programmed values we don't need any input set change, so 3827 * this filter is safe to install. 3828 */ 3829 if (new_mask == current_mask && !new_flex_offset) 3830 return 0; 3831 3832 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3833 i40e_flow_str(fsp)); 3834 i40e_print_input_set(vsi, current_mask, new_mask); 3835 if (new_flex_offset) { 3836 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3837 pit_index, src_offset); 3838 } 3839 3840 /* Hardware input sets are global across multiple ports, so even the 3841 * main port cannot change them when in MFP mode as this would impact 3842 * any filters on the other ports. 3843 */ 3844 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3845 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3846 return -EOPNOTSUPP; 3847 } 3848 3849 /* This filter requires us to update the input set. However, hardware 3850 * only supports one input set per flow type, and does not support 3851 * separate masks for each filter. This means that we can only support 3852 * a single mask for all filters of a specific type. 3853 * 3854 * If we have preexisting filters, they obviously depend on the 3855 * current programmed input set. Display a diagnostic message in this 3856 * case explaining why the filter could not be accepted. 3857 */ 3858 if (*fdir_filter_count) { 3859 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3860 i40e_flow_str(fsp), 3861 *fdir_filter_count); 3862 return -EOPNOTSUPP; 3863 } 3864 3865 i40e_write_fd_input_set(pf, index, new_mask); 3866 3867 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 3868 * frames. If we're programming the input set for IPv4/Other, we also 3869 * need to program the IPv4/Fragmented input set. Since we don't have 3870 * separate support, we'll always assume and enforce that the two flow 3871 * types must have matching input sets. 3872 */ 3873 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 3874 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 3875 new_mask); 3876 3877 /* Add the new offset and update table, if necessary */ 3878 if (new_flex_offset) { 3879 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3880 pit_index); 3881 if (err) 3882 return err; 3883 3884 if (flex_l3) { 3885 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3886 src_offset, 3887 pit_index); 3888 if (err) 3889 return err; 3890 } 3891 3892 i40e_reprogram_flex_pit(pf); 3893 } 3894 3895 return 0; 3896 } 3897 3898 /** 3899 * i40e_match_fdir_filter - Return true of two filters match 3900 * @a: pointer to filter struct 3901 * @b: pointer to filter struct 3902 * 3903 * Returns true if the two filters match exactly the same criteria. I.e. they 3904 * match the same flow type and have the same parameters. We don't need to 3905 * check any input-set since all filters of the same flow type must use the 3906 * same input set. 3907 **/ 3908 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 3909 struct i40e_fdir_filter *b) 3910 { 3911 /* The filters do not much if any of these criteria differ. */ 3912 if (a->dst_ip != b->dst_ip || 3913 a->src_ip != b->src_ip || 3914 a->dst_port != b->dst_port || 3915 a->src_port != b->src_port || 3916 a->flow_type != b->flow_type || 3917 a->ip4_proto != b->ip4_proto) 3918 return false; 3919 3920 return true; 3921 } 3922 3923 /** 3924 * i40e_disallow_matching_filters - Check that new filters differ 3925 * @vsi: pointer to the targeted VSI 3926 * @input: new filter to check 3927 * 3928 * Due to hardware limitations, it is not possible for two filters that match 3929 * similar criteria to be programmed at the same time. This is true for a few 3930 * reasons: 3931 * 3932 * (a) all filters matching a particular flow type must use the same input 3933 * set, that is they must match the same criteria. 3934 * (b) different flow types will never match the same packet, as the flow type 3935 * is decided by hardware before checking which rules apply. 3936 * (c) hardware has no way to distinguish which order filters apply in. 3937 * 3938 * Due to this, we can't really support using the location data to order 3939 * filters in the hardware parsing. It is technically possible for the user to 3940 * request two filters matching the same criteria but which select different 3941 * queues. In this case, rather than keep both filters in the list, we reject 3942 * the 2nd filter when the user requests adding it. 3943 * 3944 * This avoids needing to track location for programming the filter to 3945 * hardware, and ensures that we avoid some strange scenarios involving 3946 * deleting filters which match the same criteria. 3947 **/ 3948 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 3949 struct i40e_fdir_filter *input) 3950 { 3951 struct i40e_pf *pf = vsi->back; 3952 struct i40e_fdir_filter *rule; 3953 struct hlist_node *node2; 3954 3955 /* Loop through every filter, and check that it doesn't match */ 3956 hlist_for_each_entry_safe(rule, node2, 3957 &pf->fdir_filter_list, fdir_node) { 3958 /* Don't check the filters match if they share the same fd_id, 3959 * since the new filter is actually just updating the target 3960 * of the old filter. 3961 */ 3962 if (rule->fd_id == input->fd_id) 3963 continue; 3964 3965 /* If any filters match, then print a warning message to the 3966 * kernel message buffer and bail out. 3967 */ 3968 if (i40e_match_fdir_filter(rule, input)) { 3969 dev_warn(&pf->pdev->dev, 3970 "Existing user defined filter %d already matches this flow.\n", 3971 rule->fd_id); 3972 return -EINVAL; 3973 } 3974 } 3975 3976 return 0; 3977 } 3978 3979 /** 3980 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3981 * @vsi: pointer to the targeted VSI 3982 * @cmd: command to get or set RX flow classification rules 3983 * 3984 * Add Flow Director filters for a specific flow spec based on their 3985 * protocol. Returns 0 if the filters were successfully added. 3986 **/ 3987 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3988 struct ethtool_rxnfc *cmd) 3989 { 3990 struct i40e_rx_flow_userdef userdef; 3991 struct ethtool_rx_flow_spec *fsp; 3992 struct i40e_fdir_filter *input; 3993 u16 dest_vsi = 0, q_index = 0; 3994 struct i40e_pf *pf; 3995 int ret = -EINVAL; 3996 u8 dest_ctl; 3997 3998 if (!vsi) 3999 return -EINVAL; 4000 pf = vsi->back; 4001 4002 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4003 return -EOPNOTSUPP; 4004 4005 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4006 return -ENOSPC; 4007 4008 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4009 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4010 return -EBUSY; 4011 4012 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4013 return -EBUSY; 4014 4015 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4016 4017 /* Parse the user-defined field */ 4018 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4019 return -EINVAL; 4020 4021 /* Extended MAC field is not supported */ 4022 if (fsp->flow_type & FLOW_MAC_EXT) 4023 return -EINVAL; 4024 4025 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4026 if (ret) 4027 return ret; 4028 4029 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4030 pf->hw.func_caps.fd_filters_guaranteed)) { 4031 return -EINVAL; 4032 } 4033 4034 /* ring_cookie is either the drop index, or is a mask of the queue 4035 * index and VF id we wish to target. 4036 */ 4037 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4038 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4039 } else { 4040 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4041 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4042 4043 if (!vf) { 4044 if (ring >= vsi->num_queue_pairs) 4045 return -EINVAL; 4046 dest_vsi = vsi->id; 4047 } else { 4048 /* VFs are zero-indexed, so we subtract one here */ 4049 vf--; 4050 4051 if (vf >= pf->num_alloc_vfs) 4052 return -EINVAL; 4053 if (ring >= pf->vf[vf].num_queue_pairs) 4054 return -EINVAL; 4055 dest_vsi = pf->vf[vf].lan_vsi_id; 4056 } 4057 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4058 q_index = ring; 4059 } 4060 4061 input = kzalloc(sizeof(*input), GFP_KERNEL); 4062 4063 if (!input) 4064 return -ENOMEM; 4065 4066 input->fd_id = fsp->location; 4067 input->q_index = q_index; 4068 input->dest_vsi = dest_vsi; 4069 input->dest_ctl = dest_ctl; 4070 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4071 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4072 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4073 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4074 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4075 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4076 4077 /* Reverse the src and dest notion, since the HW expects them to be from 4078 * Tx perspective where as the input from user is from Rx filter view. 4079 */ 4080 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4081 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4082 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4083 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4084 4085 if (userdef.flex_filter) { 4086 input->flex_filter = true; 4087 input->flex_word = cpu_to_be16(userdef.flex_word); 4088 input->flex_offset = userdef.flex_offset; 4089 } 4090 4091 /* Avoid programming two filters with identical match criteria. */ 4092 ret = i40e_disallow_matching_filters(vsi, input); 4093 if (ret) 4094 goto free_filter_memory; 4095 4096 /* Add the input filter to the fdir_input_list, possibly replacing 4097 * a previous filter. Do not free the input structure after adding it 4098 * to the list as this would cause a use-after-free bug. 4099 */ 4100 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4101 ret = i40e_add_del_fdir(vsi, input, true); 4102 if (ret) 4103 goto remove_sw_rule; 4104 return 0; 4105 4106 remove_sw_rule: 4107 hlist_del(&input->fdir_node); 4108 pf->fdir_pf_active_filters--; 4109 free_filter_memory: 4110 kfree(input); 4111 return ret; 4112 } 4113 4114 /** 4115 * i40e_set_rxnfc - command to set RX flow classification rules 4116 * @netdev: network interface device structure 4117 * @cmd: ethtool rxnfc command 4118 * 4119 * Returns Success if the command is supported. 4120 **/ 4121 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4122 { 4123 struct i40e_netdev_priv *np = netdev_priv(netdev); 4124 struct i40e_vsi *vsi = np->vsi; 4125 struct i40e_pf *pf = vsi->back; 4126 int ret = -EOPNOTSUPP; 4127 4128 switch (cmd->cmd) { 4129 case ETHTOOL_SRXFH: 4130 ret = i40e_set_rss_hash_opt(pf, cmd); 4131 break; 4132 case ETHTOOL_SRXCLSRLINS: 4133 ret = i40e_add_fdir_ethtool(vsi, cmd); 4134 break; 4135 case ETHTOOL_SRXCLSRLDEL: 4136 ret = i40e_del_fdir_entry(vsi, cmd); 4137 break; 4138 default: 4139 break; 4140 } 4141 4142 return ret; 4143 } 4144 4145 /** 4146 * i40e_max_channels - get Max number of combined channels supported 4147 * @vsi: vsi pointer 4148 **/ 4149 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4150 { 4151 /* TODO: This code assumes DCB and FD is disabled for now. */ 4152 return vsi->alloc_queue_pairs; 4153 } 4154 4155 /** 4156 * i40e_get_channels - Get the current channels enabled and max supported etc. 4157 * @dev: network interface device structure 4158 * @ch: ethtool channels structure 4159 * 4160 * We don't support separate tx and rx queues as channels. The other count 4161 * represents how many queues are being used for control. max_combined counts 4162 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4163 * q_vectors since we support a lot more queue pairs than q_vectors. 4164 **/ 4165 static void i40e_get_channels(struct net_device *dev, 4166 struct ethtool_channels *ch) 4167 { 4168 struct i40e_netdev_priv *np = netdev_priv(dev); 4169 struct i40e_vsi *vsi = np->vsi; 4170 struct i40e_pf *pf = vsi->back; 4171 4172 /* report maximum channels */ 4173 ch->max_combined = i40e_max_channels(vsi); 4174 4175 /* report info for other vector */ 4176 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4177 ch->max_other = ch->other_count; 4178 4179 /* Note: This code assumes DCB is disabled for now. */ 4180 ch->combined_count = vsi->num_queue_pairs; 4181 } 4182 4183 /** 4184 * i40e_set_channels - Set the new channels count. 4185 * @dev: network interface device structure 4186 * @ch: ethtool channels structure 4187 * 4188 * The new channels count may not be the same as requested by the user 4189 * since it gets rounded down to a power of 2 value. 4190 **/ 4191 static int i40e_set_channels(struct net_device *dev, 4192 struct ethtool_channels *ch) 4193 { 4194 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4195 struct i40e_netdev_priv *np = netdev_priv(dev); 4196 unsigned int count = ch->combined_count; 4197 struct i40e_vsi *vsi = np->vsi; 4198 struct i40e_pf *pf = vsi->back; 4199 struct i40e_fdir_filter *rule; 4200 struct hlist_node *node2; 4201 int new_count; 4202 int err = 0; 4203 4204 /* We do not support setting channels for any other VSI at present */ 4205 if (vsi->type != I40E_VSI_MAIN) 4206 return -EINVAL; 4207 4208 /* We do not support setting channels via ethtool when TCs are 4209 * configured through mqprio 4210 */ 4211 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4212 return -EINVAL; 4213 4214 /* verify they are not requesting separate vectors */ 4215 if (!count || ch->rx_count || ch->tx_count) 4216 return -EINVAL; 4217 4218 /* verify other_count has not changed */ 4219 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4220 return -EINVAL; 4221 4222 /* verify the number of channels does not exceed hardware limits */ 4223 if (count > i40e_max_channels(vsi)) 4224 return -EINVAL; 4225 4226 /* verify that the number of channels does not invalidate any current 4227 * flow director rules 4228 */ 4229 hlist_for_each_entry_safe(rule, node2, 4230 &pf->fdir_filter_list, fdir_node) { 4231 if (rule->dest_ctl != drop && count <= rule->q_index) { 4232 dev_warn(&pf->pdev->dev, 4233 "Existing user defined filter %d assigns flow to queue %d\n", 4234 rule->fd_id, rule->q_index); 4235 err = -EINVAL; 4236 } 4237 } 4238 4239 if (err) { 4240 dev_err(&pf->pdev->dev, 4241 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4242 count); 4243 return err; 4244 } 4245 4246 /* update feature limits from largest to smallest supported values */ 4247 /* TODO: Flow director limit, DCB etc */ 4248 4249 /* use rss_reconfig to rebuild with new queue count and update traffic 4250 * class queue mapping 4251 */ 4252 new_count = i40e_reconfig_rss_queues(pf, count); 4253 if (new_count > 0) 4254 return 0; 4255 else 4256 return -EINVAL; 4257 } 4258 4259 /** 4260 * i40e_get_rxfh_key_size - get the RSS hash key size 4261 * @netdev: network interface device structure 4262 * 4263 * Returns the table size. 4264 **/ 4265 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4266 { 4267 return I40E_HKEY_ARRAY_SIZE; 4268 } 4269 4270 /** 4271 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4272 * @netdev: network interface device structure 4273 * 4274 * Returns the table size. 4275 **/ 4276 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4277 { 4278 return I40E_HLUT_ARRAY_SIZE; 4279 } 4280 4281 /** 4282 * i40e_get_rxfh - get the rx flow hash indirection table 4283 * @netdev: network interface device structure 4284 * @indir: indirection table 4285 * @key: hash key 4286 * @hfunc: hash function 4287 * 4288 * Reads the indirection table directly from the hardware. Returns 0 on 4289 * success. 4290 **/ 4291 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4292 u8 *hfunc) 4293 { 4294 struct i40e_netdev_priv *np = netdev_priv(netdev); 4295 struct i40e_vsi *vsi = np->vsi; 4296 u8 *lut, *seed = NULL; 4297 int ret; 4298 u16 i; 4299 4300 if (hfunc) 4301 *hfunc = ETH_RSS_HASH_TOP; 4302 4303 if (!indir) 4304 return 0; 4305 4306 seed = key; 4307 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4308 if (!lut) 4309 return -ENOMEM; 4310 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4311 if (ret) 4312 goto out; 4313 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4314 indir[i] = (u32)(lut[i]); 4315 4316 out: 4317 kfree(lut); 4318 4319 return ret; 4320 } 4321 4322 /** 4323 * i40e_set_rxfh - set the rx flow hash indirection table 4324 * @netdev: network interface device structure 4325 * @indir: indirection table 4326 * @key: hash key 4327 * @hfunc: hash function to use 4328 * 4329 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4330 * returns 0 after programming the table. 4331 **/ 4332 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4333 const u8 *key, const u8 hfunc) 4334 { 4335 struct i40e_netdev_priv *np = netdev_priv(netdev); 4336 struct i40e_vsi *vsi = np->vsi; 4337 struct i40e_pf *pf = vsi->back; 4338 u8 *seed = NULL; 4339 u16 i; 4340 4341 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4342 return -EOPNOTSUPP; 4343 4344 if (key) { 4345 if (!vsi->rss_hkey_user) { 4346 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4347 GFP_KERNEL); 4348 if (!vsi->rss_hkey_user) 4349 return -ENOMEM; 4350 } 4351 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4352 seed = vsi->rss_hkey_user; 4353 } 4354 if (!vsi->rss_lut_user) { 4355 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4356 if (!vsi->rss_lut_user) 4357 return -ENOMEM; 4358 } 4359 4360 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4361 if (indir) 4362 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4363 vsi->rss_lut_user[i] = (u8)(indir[i]); 4364 else 4365 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4366 vsi->rss_size); 4367 4368 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4369 I40E_HLUT_ARRAY_SIZE); 4370 } 4371 4372 /** 4373 * i40e_get_priv_flags - report device private flags 4374 * @dev: network interface device structure 4375 * 4376 * The get string set count and the string set should be matched for each 4377 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4378 * array. 4379 * 4380 * Returns a u32 bitmap of flags. 4381 **/ 4382 static u32 i40e_get_priv_flags(struct net_device *dev) 4383 { 4384 struct i40e_netdev_priv *np = netdev_priv(dev); 4385 struct i40e_vsi *vsi = np->vsi; 4386 struct i40e_pf *pf = vsi->back; 4387 u32 i, j, ret_flags = 0; 4388 4389 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4390 const struct i40e_priv_flags *priv_flags; 4391 4392 priv_flags = &i40e_gstrings_priv_flags[i]; 4393 4394 if (priv_flags->flag & pf->flags) 4395 ret_flags |= BIT(i); 4396 } 4397 4398 if (pf->hw.pf_id != 0) 4399 return ret_flags; 4400 4401 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4402 const struct i40e_priv_flags *priv_flags; 4403 4404 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4405 4406 if (priv_flags->flag & pf->flags) 4407 ret_flags |= BIT(i + j); 4408 } 4409 4410 return ret_flags; 4411 } 4412 4413 /** 4414 * i40e_set_priv_flags - set private flags 4415 * @dev: network interface device structure 4416 * @flags: bit flags to be set 4417 **/ 4418 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4419 { 4420 struct i40e_netdev_priv *np = netdev_priv(dev); 4421 struct i40e_vsi *vsi = np->vsi; 4422 struct i40e_pf *pf = vsi->back; 4423 u64 orig_flags, new_flags, changed_flags; 4424 u32 i, j; 4425 4426 orig_flags = READ_ONCE(pf->flags); 4427 new_flags = orig_flags; 4428 4429 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4430 const struct i40e_priv_flags *priv_flags; 4431 4432 priv_flags = &i40e_gstrings_priv_flags[i]; 4433 4434 if (flags & BIT(i)) 4435 new_flags |= priv_flags->flag; 4436 else 4437 new_flags &= ~(priv_flags->flag); 4438 4439 /* If this is a read-only flag, it can't be changed */ 4440 if (priv_flags->read_only && 4441 ((orig_flags ^ new_flags) & ~BIT(i))) 4442 return -EOPNOTSUPP; 4443 } 4444 4445 if (pf->hw.pf_id != 0) 4446 goto flags_complete; 4447 4448 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4449 const struct i40e_priv_flags *priv_flags; 4450 4451 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4452 4453 if (flags & BIT(i + j)) 4454 new_flags |= priv_flags->flag; 4455 else 4456 new_flags &= ~(priv_flags->flag); 4457 4458 /* If this is a read-only flag, it can't be changed */ 4459 if (priv_flags->read_only && 4460 ((orig_flags ^ new_flags) & ~BIT(i))) 4461 return -EOPNOTSUPP; 4462 } 4463 4464 flags_complete: 4465 changed_flags = orig_flags ^ new_flags; 4466 4467 /* Before we finalize any flag changes, we need to perform some 4468 * checks to ensure that the changes are supported and safe. 4469 */ 4470 4471 /* ATR eviction is not supported on all devices */ 4472 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4473 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4474 return -EOPNOTSUPP; 4475 4476 /* If the driver detected FW LLDP was disabled on init, this flag could 4477 * be set, however we do not support _changing_ the flag if NPAR is 4478 * enabled or FW API version < 1.7. There are situations where older 4479 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_ 4480 * not allow the user to enable/disable LLDP with this flag on 4481 * unsupported FW versions. 4482 */ 4483 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4484 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) { 4485 dev_warn(&pf->pdev->dev, 4486 "Device does not support changing FW LLDP\n"); 4487 return -EOPNOTSUPP; 4488 } 4489 } 4490 4491 /* Now that we've checked to ensure that the new flags are valid, load 4492 * them into place. Since we only modify flags either (a) during 4493 * initialization or (b) while holding the RTNL lock, we don't need 4494 * anything fancy here. 4495 */ 4496 pf->flags = new_flags; 4497 4498 /* Process any additional changes needed as a result of flag changes. 4499 * The changed_flags value reflects the list of bits that were 4500 * changed in the code above. 4501 */ 4502 4503 /* Flush current ATR settings if ATR was disabled */ 4504 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4505 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4506 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4507 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4508 } 4509 4510 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4511 u16 sw_flags = 0, valid_flags = 0; 4512 int ret; 4513 4514 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4515 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4516 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4517 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4518 0, NULL); 4519 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4520 dev_info(&pf->pdev->dev, 4521 "couldn't set switch config bits, err %s aq_err %s\n", 4522 i40e_stat_str(&pf->hw, ret), 4523 i40e_aq_str(&pf->hw, 4524 pf->hw.aq.asq_last_status)); 4525 /* not a fatal problem, just keep going */ 4526 } 4527 } 4528 4529 if ((changed_flags & pf->flags & 4530 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4531 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4532 dev_warn(&pf->pdev->dev, 4533 "Turning on link-down-on-close flag may affect other partitions\n"); 4534 4535 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4536 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4537 struct i40e_dcbx_config *dcbcfg; 4538 int i; 4539 4540 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4541 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4542 /* reset local_dcbx_config to default */ 4543 dcbcfg = &pf->hw.local_dcbx_config; 4544 dcbcfg->etscfg.willing = 1; 4545 dcbcfg->etscfg.maxtcs = 0; 4546 dcbcfg->etscfg.tcbwtable[0] = 100; 4547 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4548 dcbcfg->etscfg.tcbwtable[i] = 0; 4549 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4550 dcbcfg->etscfg.prioritytable[i] = 0; 4551 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4552 dcbcfg->pfc.willing = 1; 4553 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4554 } else { 4555 i40e_aq_start_lldp(&pf->hw, NULL); 4556 } 4557 } 4558 4559 /* Issue reset to cause things to take effect, as additional bits 4560 * are added we will need to create a mask of bits requiring reset 4561 */ 4562 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4563 I40E_FLAG_LEGACY_RX | 4564 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4565 I40E_FLAG_DISABLE_FW_LLDP)) 4566 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4567 4568 return 0; 4569 } 4570 4571 /** 4572 * i40e_get_module_info - get (Q)SFP+ module type info 4573 * @netdev: network interface device structure 4574 * @modinfo: module EEPROM size and layout information structure 4575 **/ 4576 static int i40e_get_module_info(struct net_device *netdev, 4577 struct ethtool_modinfo *modinfo) 4578 { 4579 struct i40e_netdev_priv *np = netdev_priv(netdev); 4580 struct i40e_vsi *vsi = np->vsi; 4581 struct i40e_pf *pf = vsi->back; 4582 struct i40e_hw *hw = &pf->hw; 4583 u32 sff8472_comp = 0; 4584 u32 sff8472_swap = 0; 4585 u32 sff8636_rev = 0; 4586 i40e_status status; 4587 u32 type = 0; 4588 4589 /* Check if firmware supports reading module EEPROM. */ 4590 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4591 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4592 return -EINVAL; 4593 } 4594 4595 status = i40e_update_link_info(hw); 4596 if (status) 4597 return -EIO; 4598 4599 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4600 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4601 return -EINVAL; 4602 } 4603 4604 type = hw->phy.link_info.module_type[0]; 4605 4606 switch (type) { 4607 case I40E_MODULE_TYPE_SFP: 4608 status = i40e_aq_get_phy_register(hw, 4609 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4610 I40E_I2C_EEPROM_DEV_ADDR, 4611 I40E_MODULE_SFF_8472_COMP, 4612 &sff8472_comp, NULL); 4613 if (status) 4614 return -EIO; 4615 4616 status = i40e_aq_get_phy_register(hw, 4617 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4618 I40E_I2C_EEPROM_DEV_ADDR, 4619 I40E_MODULE_SFF_8472_SWAP, 4620 &sff8472_swap, NULL); 4621 if (status) 4622 return -EIO; 4623 4624 /* Check if the module requires address swap to access 4625 * the other EEPROM memory page. 4626 */ 4627 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4628 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4629 modinfo->type = ETH_MODULE_SFF_8079; 4630 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4631 } else if (sff8472_comp == 0x00) { 4632 /* Module is not SFF-8472 compliant */ 4633 modinfo->type = ETH_MODULE_SFF_8079; 4634 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4635 } else { 4636 modinfo->type = ETH_MODULE_SFF_8472; 4637 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4638 } 4639 break; 4640 case I40E_MODULE_TYPE_QSFP_PLUS: 4641 /* Read from memory page 0. */ 4642 status = i40e_aq_get_phy_register(hw, 4643 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4644 0, 4645 I40E_MODULE_REVISION_ADDR, 4646 &sff8636_rev, NULL); 4647 if (status) 4648 return -EIO; 4649 /* Determine revision compliance byte */ 4650 if (sff8636_rev > 0x02) { 4651 /* Module is SFF-8636 compliant */ 4652 modinfo->type = ETH_MODULE_SFF_8636; 4653 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4654 } else { 4655 modinfo->type = ETH_MODULE_SFF_8436; 4656 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4657 } 4658 break; 4659 case I40E_MODULE_TYPE_QSFP28: 4660 modinfo->type = ETH_MODULE_SFF_8636; 4661 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4662 break; 4663 default: 4664 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4665 return -EINVAL; 4666 } 4667 return 0; 4668 } 4669 4670 /** 4671 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4672 * @netdev: network interface device structure 4673 * @ee: EEPROM dump request structure 4674 * @data: buffer to be filled with EEPROM contents 4675 **/ 4676 static int i40e_get_module_eeprom(struct net_device *netdev, 4677 struct ethtool_eeprom *ee, 4678 u8 *data) 4679 { 4680 struct i40e_netdev_priv *np = netdev_priv(netdev); 4681 struct i40e_vsi *vsi = np->vsi; 4682 struct i40e_pf *pf = vsi->back; 4683 struct i40e_hw *hw = &pf->hw; 4684 bool is_sfp = false; 4685 i40e_status status; 4686 u32 value = 0; 4687 int i; 4688 4689 if (!ee || !ee->len || !data) 4690 return -EINVAL; 4691 4692 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4693 is_sfp = true; 4694 4695 for (i = 0; i < ee->len; i++) { 4696 u32 offset = i + ee->offset; 4697 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4698 4699 /* Check if we need to access the other memory page */ 4700 if (is_sfp) { 4701 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4702 offset -= ETH_MODULE_SFF_8079_LEN; 4703 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4704 } 4705 } else { 4706 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4707 /* Compute memory page number and offset. */ 4708 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4709 addr++; 4710 } 4711 } 4712 4713 status = i40e_aq_get_phy_register(hw, 4714 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4715 addr, offset, &value, NULL); 4716 if (status) 4717 return -EIO; 4718 data[i] = value; 4719 } 4720 return 0; 4721 } 4722 4723 static const struct ethtool_ops i40e_ethtool_ops = { 4724 .get_drvinfo = i40e_get_drvinfo, 4725 .get_regs_len = i40e_get_regs_len, 4726 .get_regs = i40e_get_regs, 4727 .nway_reset = i40e_nway_reset, 4728 .get_link = ethtool_op_get_link, 4729 .get_wol = i40e_get_wol, 4730 .set_wol = i40e_set_wol, 4731 .set_eeprom = i40e_set_eeprom, 4732 .get_eeprom_len = i40e_get_eeprom_len, 4733 .get_eeprom = i40e_get_eeprom, 4734 .get_ringparam = i40e_get_ringparam, 4735 .set_ringparam = i40e_set_ringparam, 4736 .get_pauseparam = i40e_get_pauseparam, 4737 .set_pauseparam = i40e_set_pauseparam, 4738 .get_msglevel = i40e_get_msglevel, 4739 .set_msglevel = i40e_set_msglevel, 4740 .get_rxnfc = i40e_get_rxnfc, 4741 .set_rxnfc = i40e_set_rxnfc, 4742 .self_test = i40e_diag_test, 4743 .get_strings = i40e_get_strings, 4744 .set_phys_id = i40e_set_phys_id, 4745 .get_sset_count = i40e_get_sset_count, 4746 .get_ethtool_stats = i40e_get_ethtool_stats, 4747 .get_coalesce = i40e_get_coalesce, 4748 .set_coalesce = i40e_set_coalesce, 4749 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4750 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4751 .get_rxfh = i40e_get_rxfh, 4752 .set_rxfh = i40e_set_rxfh, 4753 .get_channels = i40e_get_channels, 4754 .set_channels = i40e_set_channels, 4755 .get_module_info = i40e_get_module_info, 4756 .get_module_eeprom = i40e_get_module_eeprom, 4757 .get_ts_info = i40e_get_ts_info, 4758 .get_priv_flags = i40e_get_priv_flags, 4759 .set_priv_flags = i40e_set_priv_flags, 4760 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4761 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4762 .get_link_ksettings = i40e_get_link_ksettings, 4763 .set_link_ksettings = i40e_set_link_ksettings, 4764 }; 4765 4766 void i40e_set_ethtool_ops(struct net_device *netdev) 4767 { 4768 netdev->ethtool_ops = &i40e_ethtool_ops; 4769 } 4770