1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 432 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 433 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 434 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 435 I40E_PRIV_FLAG("link-down-on-close", 436 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 437 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 438 I40E_PRIV_FLAG("disable-source-pruning", 439 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 440 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 441 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 442 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 443 }; 444 445 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 446 447 /* Private flags with a global effect, restricted to PF 0 */ 448 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 449 I40E_PRIV_FLAG("vf-true-promisc-support", 450 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 451 }; 452 453 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 454 455 /** 456 * i40e_partition_setting_complaint - generic complaint for MFP restriction 457 * @pf: the PF struct 458 **/ 459 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 460 { 461 dev_info(&pf->pdev->dev, 462 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 463 } 464 465 /** 466 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 467 * @pf: PF struct with phy_types 468 * @ks: ethtool link ksettings struct to fill out 469 * 470 **/ 471 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 472 struct ethtool_link_ksettings *ks) 473 { 474 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 475 u64 phy_types = pf->hw.phy.phy_types; 476 477 ethtool_link_ksettings_zero_link_mode(ks, supported); 478 ethtool_link_ksettings_zero_link_mode(ks, advertising); 479 480 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 481 ethtool_link_ksettings_add_link_mode(ks, supported, 482 1000baseT_Full); 483 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 484 ethtool_link_ksettings_add_link_mode(ks, advertising, 485 1000baseT_Full); 486 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 487 ethtool_link_ksettings_add_link_mode(ks, supported, 488 100baseT_Full); 489 ethtool_link_ksettings_add_link_mode(ks, advertising, 490 100baseT_Full); 491 } 492 } 493 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 494 phy_types & I40E_CAP_PHY_TYPE_XFI || 495 phy_types & I40E_CAP_PHY_TYPE_SFI || 496 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 497 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 498 ethtool_link_ksettings_add_link_mode(ks, supported, 499 10000baseT_Full); 500 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 501 ethtool_link_ksettings_add_link_mode(ks, advertising, 502 10000baseT_Full); 503 } 504 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 10000baseT_Full); 507 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 508 ethtool_link_ksettings_add_link_mode(ks, advertising, 509 10000baseT_Full); 510 } 511 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 512 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 513 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 514 ethtool_link_ksettings_add_link_mode(ks, supported, 515 40000baseCR4_Full); 516 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 517 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 518 ethtool_link_ksettings_add_link_mode(ks, supported, 519 40000baseCR4_Full); 520 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 521 ethtool_link_ksettings_add_link_mode(ks, advertising, 522 40000baseCR4_Full); 523 } 524 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 525 ethtool_link_ksettings_add_link_mode(ks, supported, 526 100baseT_Full); 527 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 528 ethtool_link_ksettings_add_link_mode(ks, advertising, 529 100baseT_Full); 530 } 531 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 532 ethtool_link_ksettings_add_link_mode(ks, supported, 533 1000baseT_Full); 534 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 535 ethtool_link_ksettings_add_link_mode(ks, advertising, 536 1000baseT_Full); 537 } 538 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 539 ethtool_link_ksettings_add_link_mode(ks, supported, 540 40000baseSR4_Full); 541 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 542 ethtool_link_ksettings_add_link_mode(ks, supported, 543 40000baseLR4_Full); 544 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 545 ethtool_link_ksettings_add_link_mode(ks, supported, 546 40000baseLR4_Full); 547 ethtool_link_ksettings_add_link_mode(ks, advertising, 548 40000baseLR4_Full); 549 } 550 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 551 ethtool_link_ksettings_add_link_mode(ks, supported, 552 20000baseKR2_Full); 553 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 554 ethtool_link_ksettings_add_link_mode(ks, advertising, 555 20000baseKR2_Full); 556 } 557 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 558 ethtool_link_ksettings_add_link_mode(ks, supported, 559 10000baseKX4_Full); 560 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 561 ethtool_link_ksettings_add_link_mode(ks, advertising, 562 10000baseKX4_Full); 563 } 564 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 565 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 566 ethtool_link_ksettings_add_link_mode(ks, supported, 567 10000baseKR_Full); 568 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 569 ethtool_link_ksettings_add_link_mode(ks, advertising, 570 10000baseKR_Full); 571 } 572 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 573 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 574 ethtool_link_ksettings_add_link_mode(ks, supported, 575 1000baseKX_Full); 576 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 577 ethtool_link_ksettings_add_link_mode(ks, advertising, 578 1000baseKX_Full); 579 } 580 /* need to add 25G PHY types */ 581 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 582 ethtool_link_ksettings_add_link_mode(ks, supported, 583 25000baseKR_Full); 584 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 585 ethtool_link_ksettings_add_link_mode(ks, advertising, 586 25000baseKR_Full); 587 } 588 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 589 ethtool_link_ksettings_add_link_mode(ks, supported, 590 25000baseCR_Full); 591 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 592 ethtool_link_ksettings_add_link_mode(ks, advertising, 593 25000baseCR_Full); 594 } 595 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 596 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 597 ethtool_link_ksettings_add_link_mode(ks, supported, 598 25000baseSR_Full); 599 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 600 ethtool_link_ksettings_add_link_mode(ks, advertising, 601 25000baseSR_Full); 602 } 603 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 604 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 605 ethtool_link_ksettings_add_link_mode(ks, supported, 606 25000baseCR_Full); 607 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 608 ethtool_link_ksettings_add_link_mode(ks, advertising, 609 25000baseCR_Full); 610 } 611 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 612 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 613 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 614 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 615 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 616 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 617 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 618 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 619 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 620 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 621 ethtool_link_ksettings_add_link_mode(ks, advertising, 622 FEC_NONE); 623 ethtool_link_ksettings_add_link_mode(ks, advertising, 624 FEC_RS); 625 ethtool_link_ksettings_add_link_mode(ks, advertising, 626 FEC_BASER); 627 } 628 } 629 /* need to add new 10G PHY types */ 630 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 631 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 632 ethtool_link_ksettings_add_link_mode(ks, supported, 633 10000baseCR_Full); 634 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 635 ethtool_link_ksettings_add_link_mode(ks, advertising, 636 10000baseCR_Full); 637 } 638 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 639 ethtool_link_ksettings_add_link_mode(ks, supported, 640 10000baseSR_Full); 641 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 642 ethtool_link_ksettings_add_link_mode(ks, advertising, 643 10000baseSR_Full); 644 } 645 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 646 ethtool_link_ksettings_add_link_mode(ks, supported, 647 10000baseLR_Full); 648 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 649 ethtool_link_ksettings_add_link_mode(ks, advertising, 650 10000baseLR_Full); 651 } 652 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 653 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 654 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 655 ethtool_link_ksettings_add_link_mode(ks, supported, 656 1000baseX_Full); 657 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 658 ethtool_link_ksettings_add_link_mode(ks, advertising, 659 1000baseX_Full); 660 } 661 /* Autoneg PHY types */ 662 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 663 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 664 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 665 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 666 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 667 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 668 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 669 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 670 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 671 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 672 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 673 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 674 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 675 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 676 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 677 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 678 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 679 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 680 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 681 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 682 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 683 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 684 ethtool_link_ksettings_add_link_mode(ks, supported, 685 Autoneg); 686 ethtool_link_ksettings_add_link_mode(ks, advertising, 687 Autoneg); 688 } 689 } 690 691 /** 692 * i40e_get_settings_link_up - Get the Link settings for when link is up 693 * @hw: hw structure 694 * @ks: ethtool ksettings to fill in 695 * @netdev: network interface device structure 696 * @pf: pointer to physical function struct 697 **/ 698 static void i40e_get_settings_link_up(struct i40e_hw *hw, 699 struct ethtool_link_ksettings *ks, 700 struct net_device *netdev, 701 struct i40e_pf *pf) 702 { 703 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 704 struct ethtool_link_ksettings cap_ksettings; 705 u32 link_speed = hw_link_info->link_speed; 706 707 /* Initialize supported and advertised settings based on phy settings */ 708 switch (hw_link_info->phy_type) { 709 case I40E_PHY_TYPE_40GBASE_CR4: 710 case I40E_PHY_TYPE_40GBASE_CR4_CU: 711 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 712 ethtool_link_ksettings_add_link_mode(ks, supported, 713 40000baseCR4_Full); 714 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 715 ethtool_link_ksettings_add_link_mode(ks, advertising, 716 40000baseCR4_Full); 717 break; 718 case I40E_PHY_TYPE_XLAUI: 719 case I40E_PHY_TYPE_XLPPI: 720 case I40E_PHY_TYPE_40GBASE_AOC: 721 ethtool_link_ksettings_add_link_mode(ks, supported, 722 40000baseCR4_Full); 723 break; 724 case I40E_PHY_TYPE_40GBASE_SR4: 725 ethtool_link_ksettings_add_link_mode(ks, supported, 726 40000baseSR4_Full); 727 break; 728 case I40E_PHY_TYPE_40GBASE_LR4: 729 ethtool_link_ksettings_add_link_mode(ks, supported, 730 40000baseLR4_Full); 731 break; 732 case I40E_PHY_TYPE_25GBASE_SR: 733 case I40E_PHY_TYPE_25GBASE_LR: 734 case I40E_PHY_TYPE_10GBASE_SR: 735 case I40E_PHY_TYPE_10GBASE_LR: 736 case I40E_PHY_TYPE_1000BASE_SX: 737 case I40E_PHY_TYPE_1000BASE_LX: 738 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 739 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 740 ethtool_link_ksettings_add_link_mode(ks, supported, 741 25000baseSR_Full); 742 ethtool_link_ksettings_add_link_mode(ks, advertising, 743 25000baseSR_Full); 744 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 745 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 746 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 747 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 748 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 749 ethtool_link_ksettings_add_link_mode(ks, advertising, 750 FEC_BASER); 751 ethtool_link_ksettings_add_link_mode(ks, supported, 752 10000baseSR_Full); 753 ethtool_link_ksettings_add_link_mode(ks, advertising, 754 10000baseSR_Full); 755 ethtool_link_ksettings_add_link_mode(ks, supported, 756 10000baseLR_Full); 757 ethtool_link_ksettings_add_link_mode(ks, advertising, 758 10000baseLR_Full); 759 ethtool_link_ksettings_add_link_mode(ks, supported, 760 1000baseX_Full); 761 ethtool_link_ksettings_add_link_mode(ks, advertising, 762 1000baseX_Full); 763 ethtool_link_ksettings_add_link_mode(ks, supported, 764 10000baseT_Full); 765 if (hw_link_info->module_type[2] & 766 I40E_MODULE_TYPE_1000BASE_SX || 767 hw_link_info->module_type[2] & 768 I40E_MODULE_TYPE_1000BASE_LX) { 769 ethtool_link_ksettings_add_link_mode(ks, supported, 770 1000baseT_Full); 771 if (hw_link_info->requested_speeds & 772 I40E_LINK_SPEED_1GB) 773 ethtool_link_ksettings_add_link_mode( 774 ks, advertising, 1000baseT_Full); 775 } 776 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 777 ethtool_link_ksettings_add_link_mode(ks, advertising, 778 10000baseT_Full); 779 break; 780 case I40E_PHY_TYPE_10GBASE_T: 781 case I40E_PHY_TYPE_1000BASE_T: 782 case I40E_PHY_TYPE_100BASE_TX: 783 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 784 ethtool_link_ksettings_add_link_mode(ks, supported, 785 10000baseT_Full); 786 ethtool_link_ksettings_add_link_mode(ks, supported, 787 1000baseT_Full); 788 ethtool_link_ksettings_add_link_mode(ks, supported, 789 100baseT_Full); 790 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 791 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 792 ethtool_link_ksettings_add_link_mode(ks, advertising, 793 10000baseT_Full); 794 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 795 ethtool_link_ksettings_add_link_mode(ks, advertising, 796 1000baseT_Full); 797 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 798 ethtool_link_ksettings_add_link_mode(ks, advertising, 799 100baseT_Full); 800 break; 801 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 802 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 803 ethtool_link_ksettings_add_link_mode(ks, supported, 804 1000baseT_Full); 805 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 806 ethtool_link_ksettings_add_link_mode(ks, advertising, 807 1000baseT_Full); 808 break; 809 case I40E_PHY_TYPE_10GBASE_CR1_CU: 810 case I40E_PHY_TYPE_10GBASE_CR1: 811 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 812 ethtool_link_ksettings_add_link_mode(ks, supported, 813 10000baseT_Full); 814 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 815 ethtool_link_ksettings_add_link_mode(ks, advertising, 816 10000baseT_Full); 817 break; 818 case I40E_PHY_TYPE_XAUI: 819 case I40E_PHY_TYPE_XFI: 820 case I40E_PHY_TYPE_SFI: 821 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 822 case I40E_PHY_TYPE_10GBASE_AOC: 823 ethtool_link_ksettings_add_link_mode(ks, supported, 824 10000baseT_Full); 825 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 826 ethtool_link_ksettings_add_link_mode(ks, advertising, 827 10000baseT_Full); 828 break; 829 case I40E_PHY_TYPE_SGMII: 830 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 831 ethtool_link_ksettings_add_link_mode(ks, supported, 832 1000baseT_Full); 833 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 834 ethtool_link_ksettings_add_link_mode(ks, advertising, 835 1000baseT_Full); 836 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 837 ethtool_link_ksettings_add_link_mode(ks, supported, 838 100baseT_Full); 839 if (hw_link_info->requested_speeds & 840 I40E_LINK_SPEED_100MB) 841 ethtool_link_ksettings_add_link_mode( 842 ks, advertising, 100baseT_Full); 843 } 844 break; 845 case I40E_PHY_TYPE_40GBASE_KR4: 846 case I40E_PHY_TYPE_25GBASE_KR: 847 case I40E_PHY_TYPE_20GBASE_KR2: 848 case I40E_PHY_TYPE_10GBASE_KR: 849 case I40E_PHY_TYPE_10GBASE_KX4: 850 case I40E_PHY_TYPE_1000BASE_KX: 851 ethtool_link_ksettings_add_link_mode(ks, supported, 852 40000baseKR4_Full); 853 ethtool_link_ksettings_add_link_mode(ks, supported, 854 25000baseKR_Full); 855 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 856 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 857 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 858 ethtool_link_ksettings_add_link_mode(ks, supported, 859 20000baseKR2_Full); 860 ethtool_link_ksettings_add_link_mode(ks, supported, 861 10000baseKR_Full); 862 ethtool_link_ksettings_add_link_mode(ks, supported, 863 10000baseKX4_Full); 864 ethtool_link_ksettings_add_link_mode(ks, supported, 865 1000baseKX_Full); 866 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 867 ethtool_link_ksettings_add_link_mode(ks, advertising, 868 40000baseKR4_Full); 869 ethtool_link_ksettings_add_link_mode(ks, advertising, 870 25000baseKR_Full); 871 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 872 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 873 ethtool_link_ksettings_add_link_mode(ks, advertising, 874 FEC_BASER); 875 ethtool_link_ksettings_add_link_mode(ks, advertising, 876 20000baseKR2_Full); 877 ethtool_link_ksettings_add_link_mode(ks, advertising, 878 10000baseKR_Full); 879 ethtool_link_ksettings_add_link_mode(ks, advertising, 880 10000baseKX4_Full); 881 ethtool_link_ksettings_add_link_mode(ks, advertising, 882 1000baseKX_Full); 883 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 884 break; 885 case I40E_PHY_TYPE_25GBASE_CR: 886 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 887 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 888 ethtool_link_ksettings_add_link_mode(ks, supported, 889 25000baseCR_Full); 890 ethtool_link_ksettings_add_link_mode(ks, advertising, 891 25000baseCR_Full); 892 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 893 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 894 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 895 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 896 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 897 ethtool_link_ksettings_add_link_mode(ks, advertising, 898 FEC_BASER); 899 break; 900 case I40E_PHY_TYPE_25GBASE_AOC: 901 case I40E_PHY_TYPE_25GBASE_ACC: 902 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 903 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 904 ethtool_link_ksettings_add_link_mode(ks, supported, 905 25000baseCR_Full); 906 ethtool_link_ksettings_add_link_mode(ks, advertising, 907 25000baseCR_Full); 908 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 909 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 910 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 911 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 912 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 913 ethtool_link_ksettings_add_link_mode(ks, advertising, 914 FEC_BASER); 915 ethtool_link_ksettings_add_link_mode(ks, supported, 916 10000baseCR_Full); 917 ethtool_link_ksettings_add_link_mode(ks, advertising, 918 10000baseCR_Full); 919 break; 920 default: 921 /* if we got here and link is up something bad is afoot */ 922 netdev_info(netdev, 923 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 924 hw_link_info->phy_type); 925 } 926 927 /* Now that we've worked out everything that could be supported by the 928 * current PHY type, get what is supported by the NVM and intersect 929 * them to get what is truly supported 930 */ 931 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 932 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 933 ethtool_intersect_link_masks(ks, &cap_ksettings); 934 935 /* Set speed and duplex */ 936 switch (link_speed) { 937 case I40E_LINK_SPEED_40GB: 938 ks->base.speed = SPEED_40000; 939 break; 940 case I40E_LINK_SPEED_25GB: 941 ks->base.speed = SPEED_25000; 942 break; 943 case I40E_LINK_SPEED_20GB: 944 ks->base.speed = SPEED_20000; 945 break; 946 case I40E_LINK_SPEED_10GB: 947 ks->base.speed = SPEED_10000; 948 break; 949 case I40E_LINK_SPEED_1GB: 950 ks->base.speed = SPEED_1000; 951 break; 952 case I40E_LINK_SPEED_100MB: 953 ks->base.speed = SPEED_100; 954 break; 955 default: 956 ks->base.speed = SPEED_UNKNOWN; 957 break; 958 } 959 ks->base.duplex = DUPLEX_FULL; 960 } 961 962 /** 963 * i40e_get_settings_link_down - Get the Link settings for when link is down 964 * @hw: hw structure 965 * @ks: ethtool ksettings to fill in 966 * @pf: pointer to physical function struct 967 * 968 * Reports link settings that can be determined when link is down 969 **/ 970 static void i40e_get_settings_link_down(struct i40e_hw *hw, 971 struct ethtool_link_ksettings *ks, 972 struct i40e_pf *pf) 973 { 974 /* link is down and the driver needs to fall back on 975 * supported phy types to figure out what info to display 976 */ 977 i40e_phy_type_to_ethtool(pf, ks); 978 979 /* With no link speed and duplex are unknown */ 980 ks->base.speed = SPEED_UNKNOWN; 981 ks->base.duplex = DUPLEX_UNKNOWN; 982 } 983 984 /** 985 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 986 * @netdev: network interface device structure 987 * @ks: ethtool ksettings 988 * 989 * Reports speed/duplex settings based on media_type 990 **/ 991 static int i40e_get_link_ksettings(struct net_device *netdev, 992 struct ethtool_link_ksettings *ks) 993 { 994 struct i40e_netdev_priv *np = netdev_priv(netdev); 995 struct i40e_pf *pf = np->vsi->back; 996 struct i40e_hw *hw = &pf->hw; 997 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 998 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 999 1000 ethtool_link_ksettings_zero_link_mode(ks, supported); 1001 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1002 1003 if (link_up) 1004 i40e_get_settings_link_up(hw, ks, netdev, pf); 1005 else 1006 i40e_get_settings_link_down(hw, ks, pf); 1007 1008 /* Now set the settings that don't rely on link being up/down */ 1009 /* Set autoneg settings */ 1010 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1011 AUTONEG_ENABLE : AUTONEG_DISABLE); 1012 1013 /* Set media type settings */ 1014 switch (hw->phy.media_type) { 1015 case I40E_MEDIA_TYPE_BACKPLANE: 1016 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1017 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1018 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1019 ethtool_link_ksettings_add_link_mode(ks, advertising, 1020 Backplane); 1021 ks->base.port = PORT_NONE; 1022 break; 1023 case I40E_MEDIA_TYPE_BASET: 1024 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1025 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1026 ks->base.port = PORT_TP; 1027 break; 1028 case I40E_MEDIA_TYPE_DA: 1029 case I40E_MEDIA_TYPE_CX4: 1030 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1031 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1032 ks->base.port = PORT_DA; 1033 break; 1034 case I40E_MEDIA_TYPE_FIBER: 1035 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1036 ks->base.port = PORT_FIBRE; 1037 break; 1038 case I40E_MEDIA_TYPE_UNKNOWN: 1039 default: 1040 ks->base.port = PORT_OTHER; 1041 break; 1042 } 1043 1044 /* Set flow control settings */ 1045 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1046 1047 switch (hw->fc.requested_mode) { 1048 case I40E_FC_FULL: 1049 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1050 break; 1051 case I40E_FC_TX_PAUSE: 1052 ethtool_link_ksettings_add_link_mode(ks, advertising, 1053 Asym_Pause); 1054 break; 1055 case I40E_FC_RX_PAUSE: 1056 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1057 ethtool_link_ksettings_add_link_mode(ks, advertising, 1058 Asym_Pause); 1059 break; 1060 default: 1061 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1062 ethtool_link_ksettings_del_link_mode(ks, advertising, 1063 Asym_Pause); 1064 break; 1065 } 1066 1067 return 0; 1068 } 1069 1070 /** 1071 * i40e_set_link_ksettings - Set Speed and Duplex 1072 * @netdev: network interface device structure 1073 * @ks: ethtool ksettings 1074 * 1075 * Set speed/duplex per media_types advertised/forced 1076 **/ 1077 static int i40e_set_link_ksettings(struct net_device *netdev, 1078 const struct ethtool_link_ksettings *ks) 1079 { 1080 struct i40e_netdev_priv *np = netdev_priv(netdev); 1081 struct i40e_aq_get_phy_abilities_resp abilities; 1082 struct ethtool_link_ksettings safe_ks; 1083 struct ethtool_link_ksettings copy_ks; 1084 struct i40e_aq_set_phy_config config; 1085 struct i40e_pf *pf = np->vsi->back; 1086 struct i40e_vsi *vsi = np->vsi; 1087 struct i40e_hw *hw = &pf->hw; 1088 bool autoneg_changed = false; 1089 i40e_status status = 0; 1090 int timeout = 50; 1091 int err = 0; 1092 u8 autoneg; 1093 1094 /* Changing port settings is not supported if this isn't the 1095 * port's controlling PF 1096 */ 1097 if (hw->partition_id != 1) { 1098 i40e_partition_setting_complaint(pf); 1099 return -EOPNOTSUPP; 1100 } 1101 if (vsi != pf->vsi[pf->lan_vsi]) 1102 return -EOPNOTSUPP; 1103 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1104 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1105 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1106 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1107 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1108 return -EOPNOTSUPP; 1109 if (hw->device_id == I40E_DEV_ID_KX_B || 1110 hw->device_id == I40E_DEV_ID_KX_C || 1111 hw->device_id == I40E_DEV_ID_20G_KR2 || 1112 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1113 hw->device_id == I40E_DEV_ID_25G_B || 1114 hw->device_id == I40E_DEV_ID_KX_X722) { 1115 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1116 return -EOPNOTSUPP; 1117 } 1118 1119 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1120 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1121 1122 /* save autoneg out of ksettings */ 1123 autoneg = copy_ks.base.autoneg; 1124 1125 /* get our own copy of the bits to check against */ 1126 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1127 safe_ks.base.cmd = copy_ks.base.cmd; 1128 safe_ks.base.link_mode_masks_nwords = 1129 copy_ks.base.link_mode_masks_nwords; 1130 i40e_get_link_ksettings(netdev, &safe_ks); 1131 1132 /* Get link modes supported by hardware and check against modes 1133 * requested by the user. Return an error if unsupported mode was set. 1134 */ 1135 if (!bitmap_subset(copy_ks.link_modes.advertising, 1136 safe_ks.link_modes.supported, 1137 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1138 return -EINVAL; 1139 1140 /* set autoneg back to what it currently is */ 1141 copy_ks.base.autoneg = safe_ks.base.autoneg; 1142 1143 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1144 * trying to set something that we do not support. 1145 */ 1146 if (memcmp(©_ks.base, &safe_ks.base, 1147 sizeof(struct ethtool_link_settings))) 1148 return -EOPNOTSUPP; 1149 1150 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1151 timeout--; 1152 if (!timeout) 1153 return -EBUSY; 1154 usleep_range(1000, 2000); 1155 } 1156 1157 /* Get the current phy config */ 1158 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1159 NULL); 1160 if (status) { 1161 err = -EAGAIN; 1162 goto done; 1163 } 1164 1165 /* Copy abilities to config in case autoneg is not 1166 * set below 1167 */ 1168 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1169 config.abilities = abilities.abilities; 1170 1171 /* Check autoneg */ 1172 if (autoneg == AUTONEG_ENABLE) { 1173 /* If autoneg was not already enabled */ 1174 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1175 /* If autoneg is not supported, return error */ 1176 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1177 supported, 1178 Autoneg)) { 1179 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1180 err = -EINVAL; 1181 goto done; 1182 } 1183 /* Autoneg is allowed to change */ 1184 config.abilities = abilities.abilities | 1185 I40E_AQ_PHY_ENABLE_AN; 1186 autoneg_changed = true; 1187 } 1188 } else { 1189 /* If autoneg is currently enabled */ 1190 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1191 /* If autoneg is supported 10GBASE_T is the only PHY 1192 * that can disable it, so otherwise return error 1193 */ 1194 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1195 supported, 1196 Autoneg) && 1197 hw->phy.link_info.phy_type != 1198 I40E_PHY_TYPE_10GBASE_T) { 1199 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1200 err = -EINVAL; 1201 goto done; 1202 } 1203 /* Autoneg is allowed to change */ 1204 config.abilities = abilities.abilities & 1205 ~I40E_AQ_PHY_ENABLE_AN; 1206 autoneg_changed = true; 1207 } 1208 } 1209 1210 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1211 100baseT_Full)) 1212 config.link_speed |= I40E_LINK_SPEED_100MB; 1213 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1214 1000baseT_Full) || 1215 ethtool_link_ksettings_test_link_mode(ks, advertising, 1216 1000baseX_Full) || 1217 ethtool_link_ksettings_test_link_mode(ks, advertising, 1218 1000baseKX_Full)) 1219 config.link_speed |= I40E_LINK_SPEED_1GB; 1220 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1221 10000baseT_Full) || 1222 ethtool_link_ksettings_test_link_mode(ks, advertising, 1223 10000baseKX4_Full) || 1224 ethtool_link_ksettings_test_link_mode(ks, advertising, 1225 10000baseKR_Full) || 1226 ethtool_link_ksettings_test_link_mode(ks, advertising, 1227 10000baseCR_Full) || 1228 ethtool_link_ksettings_test_link_mode(ks, advertising, 1229 10000baseSR_Full) || 1230 ethtool_link_ksettings_test_link_mode(ks, advertising, 1231 10000baseLR_Full)) 1232 config.link_speed |= I40E_LINK_SPEED_10GB; 1233 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1234 20000baseKR2_Full)) 1235 config.link_speed |= I40E_LINK_SPEED_20GB; 1236 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1237 25000baseCR_Full) || 1238 ethtool_link_ksettings_test_link_mode(ks, advertising, 1239 25000baseKR_Full) || 1240 ethtool_link_ksettings_test_link_mode(ks, advertising, 1241 25000baseSR_Full)) 1242 config.link_speed |= I40E_LINK_SPEED_25GB; 1243 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1244 40000baseKR4_Full) || 1245 ethtool_link_ksettings_test_link_mode(ks, advertising, 1246 40000baseCR4_Full) || 1247 ethtool_link_ksettings_test_link_mode(ks, advertising, 1248 40000baseSR4_Full) || 1249 ethtool_link_ksettings_test_link_mode(ks, advertising, 1250 40000baseLR4_Full)) 1251 config.link_speed |= I40E_LINK_SPEED_40GB; 1252 1253 /* If speed didn't get set, set it to what it currently is. 1254 * This is needed because if advertise is 0 (as it is when autoneg 1255 * is disabled) then speed won't get set. 1256 */ 1257 if (!config.link_speed) 1258 config.link_speed = abilities.link_speed; 1259 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1260 /* copy over the rest of the abilities */ 1261 config.phy_type = abilities.phy_type; 1262 config.phy_type_ext = abilities.phy_type_ext; 1263 config.eee_capability = abilities.eee_capability; 1264 config.eeer = abilities.eeer_val; 1265 config.low_power_ctrl = abilities.d3_lpan; 1266 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1267 I40E_AQ_PHY_FEC_CONFIG_MASK; 1268 1269 /* save the requested speeds */ 1270 hw->phy.link_info.requested_speeds = config.link_speed; 1271 /* set link and auto negotiation so changes take effect */ 1272 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1273 /* If link is up put link down */ 1274 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1275 /* Tell the OS link is going down, the link will go 1276 * back up when fw says it is ready asynchronously 1277 */ 1278 i40e_print_link_message(vsi, false); 1279 netif_carrier_off(netdev); 1280 netif_tx_stop_all_queues(netdev); 1281 } 1282 1283 /* make the aq call */ 1284 status = i40e_aq_set_phy_config(hw, &config, NULL); 1285 if (status) { 1286 netdev_info(netdev, 1287 "Set phy config failed, err %s aq_err %s\n", 1288 i40e_stat_str(hw, status), 1289 i40e_aq_str(hw, hw->aq.asq_last_status)); 1290 err = -EAGAIN; 1291 goto done; 1292 } 1293 1294 status = i40e_update_link_info(hw); 1295 if (status) 1296 netdev_dbg(netdev, 1297 "Updating link info failed with err %s aq_err %s\n", 1298 i40e_stat_str(hw, status), 1299 i40e_aq_str(hw, hw->aq.asq_last_status)); 1300 1301 } else { 1302 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1303 } 1304 1305 done: 1306 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1307 1308 return err; 1309 } 1310 1311 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1312 { 1313 struct i40e_netdev_priv *np = netdev_priv(netdev); 1314 struct i40e_aq_get_phy_abilities_resp abilities; 1315 struct i40e_pf *pf = np->vsi->back; 1316 struct i40e_hw *hw = &pf->hw; 1317 i40e_status status = 0; 1318 u32 flags = 0; 1319 int err = 0; 1320 1321 flags = READ_ONCE(pf->flags); 1322 i40e_set_fec_in_flags(fec_cfg, &flags); 1323 1324 /* Get the current phy config */ 1325 memset(&abilities, 0, sizeof(abilities)); 1326 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1327 NULL); 1328 if (status) { 1329 err = -EAGAIN; 1330 goto done; 1331 } 1332 1333 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1334 struct i40e_aq_set_phy_config config; 1335 1336 memset(&config, 0, sizeof(config)); 1337 config.phy_type = abilities.phy_type; 1338 config.abilities = abilities.abilities; 1339 config.phy_type_ext = abilities.phy_type_ext; 1340 config.link_speed = abilities.link_speed; 1341 config.eee_capability = abilities.eee_capability; 1342 config.eeer = abilities.eeer_val; 1343 config.low_power_ctrl = abilities.d3_lpan; 1344 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1345 status = i40e_aq_set_phy_config(hw, &config, NULL); 1346 if (status) { 1347 netdev_info(netdev, 1348 "Set phy config failed, err %s aq_err %s\n", 1349 i40e_stat_str(hw, status), 1350 i40e_aq_str(hw, hw->aq.asq_last_status)); 1351 err = -EAGAIN; 1352 goto done; 1353 } 1354 pf->flags = flags; 1355 status = i40e_update_link_info(hw); 1356 if (status) 1357 /* debug level message only due to relation to the link 1358 * itself rather than to the FEC settings 1359 * (e.g. no physical connection etc.) 1360 */ 1361 netdev_dbg(netdev, 1362 "Updating link info failed with err %s aq_err %s\n", 1363 i40e_stat_str(hw, status), 1364 i40e_aq_str(hw, hw->aq.asq_last_status)); 1365 } 1366 1367 done: 1368 return err; 1369 } 1370 1371 static int i40e_get_fec_param(struct net_device *netdev, 1372 struct ethtool_fecparam *fecparam) 1373 { 1374 struct i40e_netdev_priv *np = netdev_priv(netdev); 1375 struct i40e_aq_get_phy_abilities_resp abilities; 1376 struct i40e_pf *pf = np->vsi->back; 1377 struct i40e_hw *hw = &pf->hw; 1378 i40e_status status = 0; 1379 int err = 0; 1380 1381 /* Get the current phy config */ 1382 memset(&abilities, 0, sizeof(abilities)); 1383 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1384 NULL); 1385 if (status) { 1386 err = -EAGAIN; 1387 goto done; 1388 } 1389 1390 fecparam->fec = 0; 1391 if (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_AUTO) 1392 fecparam->fec |= ETHTOOL_FEC_AUTO; 1393 if ((abilities.fec_cfg_curr_mod_ext_info & 1394 I40E_AQ_SET_FEC_REQUEST_RS) || 1395 (abilities.fec_cfg_curr_mod_ext_info & 1396 I40E_AQ_SET_FEC_ABILITY_RS)) 1397 fecparam->fec |= ETHTOOL_FEC_RS; 1398 if ((abilities.fec_cfg_curr_mod_ext_info & 1399 I40E_AQ_SET_FEC_REQUEST_KR) || 1400 (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_ABILITY_KR)) 1401 fecparam->fec |= ETHTOOL_FEC_BASER; 1402 if (abilities.fec_cfg_curr_mod_ext_info == 0) 1403 fecparam->fec |= ETHTOOL_FEC_OFF; 1404 1405 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1406 fecparam->active_fec = ETHTOOL_FEC_BASER; 1407 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1408 fecparam->active_fec = ETHTOOL_FEC_RS; 1409 else 1410 fecparam->active_fec = ETHTOOL_FEC_OFF; 1411 done: 1412 return err; 1413 } 1414 1415 static int i40e_set_fec_param(struct net_device *netdev, 1416 struct ethtool_fecparam *fecparam) 1417 { 1418 struct i40e_netdev_priv *np = netdev_priv(netdev); 1419 struct i40e_pf *pf = np->vsi->back; 1420 struct i40e_hw *hw = &pf->hw; 1421 u8 fec_cfg = 0; 1422 int err = 0; 1423 1424 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1425 hw->device_id != I40E_DEV_ID_25G_B) { 1426 err = -EPERM; 1427 goto done; 1428 } 1429 1430 switch (fecparam->fec) { 1431 case ETHTOOL_FEC_AUTO: 1432 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1433 break; 1434 case ETHTOOL_FEC_RS: 1435 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1436 I40E_AQ_SET_FEC_ABILITY_RS); 1437 break; 1438 case ETHTOOL_FEC_BASER: 1439 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1440 I40E_AQ_SET_FEC_ABILITY_KR); 1441 break; 1442 case ETHTOOL_FEC_OFF: 1443 case ETHTOOL_FEC_NONE: 1444 fec_cfg = 0; 1445 break; 1446 default: 1447 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1448 fecparam->fec); 1449 err = -EINVAL; 1450 goto done; 1451 } 1452 1453 err = i40e_set_fec_cfg(netdev, fec_cfg); 1454 1455 done: 1456 return err; 1457 } 1458 1459 static int i40e_nway_reset(struct net_device *netdev) 1460 { 1461 /* restart autonegotiation */ 1462 struct i40e_netdev_priv *np = netdev_priv(netdev); 1463 struct i40e_pf *pf = np->vsi->back; 1464 struct i40e_hw *hw = &pf->hw; 1465 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1466 i40e_status ret = 0; 1467 1468 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1469 if (ret) { 1470 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1471 i40e_stat_str(hw, ret), 1472 i40e_aq_str(hw, hw->aq.asq_last_status)); 1473 return -EIO; 1474 } 1475 1476 return 0; 1477 } 1478 1479 /** 1480 * i40e_get_pauseparam - Get Flow Control status 1481 * @netdev: netdevice structure 1482 * @pause: buffer to return pause parameters 1483 * 1484 * Return tx/rx-pause status 1485 **/ 1486 static void i40e_get_pauseparam(struct net_device *netdev, 1487 struct ethtool_pauseparam *pause) 1488 { 1489 struct i40e_netdev_priv *np = netdev_priv(netdev); 1490 struct i40e_pf *pf = np->vsi->back; 1491 struct i40e_hw *hw = &pf->hw; 1492 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1493 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1494 1495 pause->autoneg = 1496 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1497 AUTONEG_ENABLE : AUTONEG_DISABLE); 1498 1499 /* PFC enabled so report LFC as off */ 1500 if (dcbx_cfg->pfc.pfcenable) { 1501 pause->rx_pause = 0; 1502 pause->tx_pause = 0; 1503 return; 1504 } 1505 1506 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1507 pause->rx_pause = 1; 1508 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1509 pause->tx_pause = 1; 1510 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1511 pause->rx_pause = 1; 1512 pause->tx_pause = 1; 1513 } 1514 } 1515 1516 /** 1517 * i40e_set_pauseparam - Set Flow Control parameter 1518 * @netdev: network interface device structure 1519 * @pause: return tx/rx flow control status 1520 **/ 1521 static int i40e_set_pauseparam(struct net_device *netdev, 1522 struct ethtool_pauseparam *pause) 1523 { 1524 struct i40e_netdev_priv *np = netdev_priv(netdev); 1525 struct i40e_pf *pf = np->vsi->back; 1526 struct i40e_vsi *vsi = np->vsi; 1527 struct i40e_hw *hw = &pf->hw; 1528 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1529 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1530 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1531 i40e_status status; 1532 u8 aq_failures; 1533 int err = 0; 1534 u32 is_an; 1535 1536 /* Changing the port's flow control is not supported if this isn't the 1537 * port's controlling PF 1538 */ 1539 if (hw->partition_id != 1) { 1540 i40e_partition_setting_complaint(pf); 1541 return -EOPNOTSUPP; 1542 } 1543 1544 if (vsi != pf->vsi[pf->lan_vsi]) 1545 return -EOPNOTSUPP; 1546 1547 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1548 if (pause->autoneg != is_an) { 1549 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1550 return -EOPNOTSUPP; 1551 } 1552 1553 /* If we have link and don't have autoneg */ 1554 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1555 /* Send message that it might not necessarily work*/ 1556 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1557 } 1558 1559 if (dcbx_cfg->pfc.pfcenable) { 1560 netdev_info(netdev, 1561 "Priority flow control enabled. Cannot set link flow control.\n"); 1562 return -EOPNOTSUPP; 1563 } 1564 1565 if (pause->rx_pause && pause->tx_pause) 1566 hw->fc.requested_mode = I40E_FC_FULL; 1567 else if (pause->rx_pause && !pause->tx_pause) 1568 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1569 else if (!pause->rx_pause && pause->tx_pause) 1570 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1571 else if (!pause->rx_pause && !pause->tx_pause) 1572 hw->fc.requested_mode = I40E_FC_NONE; 1573 else 1574 return -EINVAL; 1575 1576 /* Tell the OS link is going down, the link will go back up when fw 1577 * says it is ready asynchronously 1578 */ 1579 i40e_print_link_message(vsi, false); 1580 netif_carrier_off(netdev); 1581 netif_tx_stop_all_queues(netdev); 1582 1583 /* Set the fc mode and only restart an if link is up*/ 1584 status = i40e_set_fc(hw, &aq_failures, link_up); 1585 1586 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1587 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1588 i40e_stat_str(hw, status), 1589 i40e_aq_str(hw, hw->aq.asq_last_status)); 1590 err = -EAGAIN; 1591 } 1592 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1593 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1594 i40e_stat_str(hw, status), 1595 i40e_aq_str(hw, hw->aq.asq_last_status)); 1596 err = -EAGAIN; 1597 } 1598 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1599 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1600 i40e_stat_str(hw, status), 1601 i40e_aq_str(hw, hw->aq.asq_last_status)); 1602 err = -EAGAIN; 1603 } 1604 1605 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1606 /* Give it a little more time to try to come back */ 1607 msleep(75); 1608 if (!test_bit(__I40E_DOWN, pf->state)) 1609 return i40e_nway_reset(netdev); 1610 } 1611 1612 return err; 1613 } 1614 1615 static u32 i40e_get_msglevel(struct net_device *netdev) 1616 { 1617 struct i40e_netdev_priv *np = netdev_priv(netdev); 1618 struct i40e_pf *pf = np->vsi->back; 1619 u32 debug_mask = pf->hw.debug_mask; 1620 1621 if (debug_mask) 1622 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1623 1624 return pf->msg_enable; 1625 } 1626 1627 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1628 { 1629 struct i40e_netdev_priv *np = netdev_priv(netdev); 1630 struct i40e_pf *pf = np->vsi->back; 1631 1632 if (I40E_DEBUG_USER & data) 1633 pf->hw.debug_mask = data; 1634 else 1635 pf->msg_enable = data; 1636 } 1637 1638 static int i40e_get_regs_len(struct net_device *netdev) 1639 { 1640 int reg_count = 0; 1641 int i; 1642 1643 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1644 reg_count += i40e_reg_list[i].elements; 1645 1646 return reg_count * sizeof(u32); 1647 } 1648 1649 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1650 void *p) 1651 { 1652 struct i40e_netdev_priv *np = netdev_priv(netdev); 1653 struct i40e_pf *pf = np->vsi->back; 1654 struct i40e_hw *hw = &pf->hw; 1655 u32 *reg_buf = p; 1656 unsigned int i, j, ri; 1657 u32 reg; 1658 1659 /* Tell ethtool which driver-version-specific regs output we have. 1660 * 1661 * At some point, if we have ethtool doing special formatting of 1662 * this data, it will rely on this version number to know how to 1663 * interpret things. Hence, this needs to be updated if/when the 1664 * diags register table is changed. 1665 */ 1666 regs->version = 1; 1667 1668 /* loop through the diags reg table for what to print */ 1669 ri = 0; 1670 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1671 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1672 reg = i40e_reg_list[i].offset 1673 + (j * i40e_reg_list[i].stride); 1674 reg_buf[ri++] = rd32(hw, reg); 1675 } 1676 } 1677 1678 } 1679 1680 static int i40e_get_eeprom(struct net_device *netdev, 1681 struct ethtool_eeprom *eeprom, u8 *bytes) 1682 { 1683 struct i40e_netdev_priv *np = netdev_priv(netdev); 1684 struct i40e_hw *hw = &np->vsi->back->hw; 1685 struct i40e_pf *pf = np->vsi->back; 1686 int ret_val = 0, len, offset; 1687 u8 *eeprom_buff; 1688 u16 i, sectors; 1689 bool last; 1690 u32 magic; 1691 1692 #define I40E_NVM_SECTOR_SIZE 4096 1693 if (eeprom->len == 0) 1694 return -EINVAL; 1695 1696 /* check for NVMUpdate access method */ 1697 magic = hw->vendor_id | (hw->device_id << 16); 1698 if (eeprom->magic && eeprom->magic != magic) { 1699 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1700 int errno = 0; 1701 1702 /* make sure it is the right magic for NVMUpdate */ 1703 if ((eeprom->magic >> 16) != hw->device_id) 1704 errno = -EINVAL; 1705 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1706 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1707 errno = -EBUSY; 1708 else 1709 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1710 1711 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1712 dev_info(&pf->pdev->dev, 1713 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1714 ret_val, hw->aq.asq_last_status, errno, 1715 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1716 cmd->offset, cmd->data_size); 1717 1718 return errno; 1719 } 1720 1721 /* normal ethtool get_eeprom support */ 1722 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1723 1724 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1725 if (!eeprom_buff) 1726 return -ENOMEM; 1727 1728 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1729 if (ret_val) { 1730 dev_info(&pf->pdev->dev, 1731 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1732 ret_val, hw->aq.asq_last_status); 1733 goto free_buff; 1734 } 1735 1736 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1737 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1738 len = I40E_NVM_SECTOR_SIZE; 1739 last = false; 1740 for (i = 0; i < sectors; i++) { 1741 if (i == (sectors - 1)) { 1742 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1743 last = true; 1744 } 1745 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1746 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1747 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1748 last, NULL); 1749 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1750 dev_info(&pf->pdev->dev, 1751 "read NVM failed, invalid offset 0x%x\n", 1752 offset); 1753 break; 1754 } else if (ret_val && 1755 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1756 dev_info(&pf->pdev->dev, 1757 "read NVM failed, access, offset 0x%x\n", 1758 offset); 1759 break; 1760 } else if (ret_val) { 1761 dev_info(&pf->pdev->dev, 1762 "read NVM failed offset %d err=%d status=0x%x\n", 1763 offset, ret_val, hw->aq.asq_last_status); 1764 break; 1765 } 1766 } 1767 1768 i40e_release_nvm(hw); 1769 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1770 free_buff: 1771 kfree(eeprom_buff); 1772 return ret_val; 1773 } 1774 1775 static int i40e_get_eeprom_len(struct net_device *netdev) 1776 { 1777 struct i40e_netdev_priv *np = netdev_priv(netdev); 1778 struct i40e_hw *hw = &np->vsi->back->hw; 1779 u32 val; 1780 1781 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1782 if (hw->mac.type == I40E_MAC_X722) { 1783 val = X722_EEPROM_SCOPE_LIMIT + 1; 1784 return val; 1785 } 1786 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1787 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1788 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1789 /* register returns value in power of 2, 64Kbyte chunks. */ 1790 val = (64 * 1024) * BIT(val); 1791 return val; 1792 } 1793 1794 static int i40e_set_eeprom(struct net_device *netdev, 1795 struct ethtool_eeprom *eeprom, u8 *bytes) 1796 { 1797 struct i40e_netdev_priv *np = netdev_priv(netdev); 1798 struct i40e_hw *hw = &np->vsi->back->hw; 1799 struct i40e_pf *pf = np->vsi->back; 1800 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1801 int ret_val = 0; 1802 int errno = 0; 1803 u32 magic; 1804 1805 /* normal ethtool set_eeprom is not supported */ 1806 magic = hw->vendor_id | (hw->device_id << 16); 1807 if (eeprom->magic == magic) 1808 errno = -EOPNOTSUPP; 1809 /* check for NVMUpdate access method */ 1810 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1811 errno = -EINVAL; 1812 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1813 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1814 errno = -EBUSY; 1815 else 1816 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1817 1818 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1819 dev_info(&pf->pdev->dev, 1820 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1821 ret_val, hw->aq.asq_last_status, errno, 1822 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1823 cmd->offset, cmd->data_size); 1824 1825 return errno; 1826 } 1827 1828 static void i40e_get_drvinfo(struct net_device *netdev, 1829 struct ethtool_drvinfo *drvinfo) 1830 { 1831 struct i40e_netdev_priv *np = netdev_priv(netdev); 1832 struct i40e_vsi *vsi = np->vsi; 1833 struct i40e_pf *pf = vsi->back; 1834 1835 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1836 strlcpy(drvinfo->version, i40e_driver_version_str, 1837 sizeof(drvinfo->version)); 1838 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1839 sizeof(drvinfo->fw_version)); 1840 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1841 sizeof(drvinfo->bus_info)); 1842 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1843 if (pf->hw.pf_id == 0) 1844 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1845 } 1846 1847 static void i40e_get_ringparam(struct net_device *netdev, 1848 struct ethtool_ringparam *ring) 1849 { 1850 struct i40e_netdev_priv *np = netdev_priv(netdev); 1851 struct i40e_pf *pf = np->vsi->back; 1852 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1853 1854 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1855 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1856 ring->rx_mini_max_pending = 0; 1857 ring->rx_jumbo_max_pending = 0; 1858 ring->rx_pending = vsi->rx_rings[0]->count; 1859 ring->tx_pending = vsi->tx_rings[0]->count; 1860 ring->rx_mini_pending = 0; 1861 ring->rx_jumbo_pending = 0; 1862 } 1863 1864 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1865 { 1866 if (i40e_enabled_xdp_vsi(vsi)) { 1867 return index < vsi->num_queue_pairs || 1868 (index >= vsi->alloc_queue_pairs && 1869 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1870 } 1871 1872 return index < vsi->num_queue_pairs; 1873 } 1874 1875 static int i40e_set_ringparam(struct net_device *netdev, 1876 struct ethtool_ringparam *ring) 1877 { 1878 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1879 struct i40e_netdev_priv *np = netdev_priv(netdev); 1880 struct i40e_hw *hw = &np->vsi->back->hw; 1881 struct i40e_vsi *vsi = np->vsi; 1882 struct i40e_pf *pf = vsi->back; 1883 u32 new_rx_count, new_tx_count; 1884 u16 tx_alloc_queue_pairs; 1885 int timeout = 50; 1886 int i, err = 0; 1887 1888 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1889 return -EINVAL; 1890 1891 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1892 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1893 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1894 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1895 netdev_info(netdev, 1896 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1897 ring->tx_pending, ring->rx_pending, 1898 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1899 return -EINVAL; 1900 } 1901 1902 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1903 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1904 1905 /* if nothing to do return success */ 1906 if ((new_tx_count == vsi->tx_rings[0]->count) && 1907 (new_rx_count == vsi->rx_rings[0]->count)) 1908 return 0; 1909 1910 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1911 * disallow changing the number of descriptors -- regardless 1912 * if the netdev is running or not. 1913 */ 1914 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1915 return -EBUSY; 1916 1917 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1918 timeout--; 1919 if (!timeout) 1920 return -EBUSY; 1921 usleep_range(1000, 2000); 1922 } 1923 1924 if (!netif_running(vsi->netdev)) { 1925 /* simple case - set for the next time the netdev is started */ 1926 for (i = 0; i < vsi->num_queue_pairs; i++) { 1927 vsi->tx_rings[i]->count = new_tx_count; 1928 vsi->rx_rings[i]->count = new_rx_count; 1929 if (i40e_enabled_xdp_vsi(vsi)) 1930 vsi->xdp_rings[i]->count = new_tx_count; 1931 } 1932 goto done; 1933 } 1934 1935 /* We can't just free everything and then setup again, 1936 * because the ISRs in MSI-X mode get passed pointers 1937 * to the Tx and Rx ring structs. 1938 */ 1939 1940 /* alloc updated Tx and XDP Tx resources */ 1941 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1942 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1943 if (new_tx_count != vsi->tx_rings[0]->count) { 1944 netdev_info(netdev, 1945 "Changing Tx descriptor count from %d to %d.\n", 1946 vsi->tx_rings[0]->count, new_tx_count); 1947 tx_rings = kcalloc(tx_alloc_queue_pairs, 1948 sizeof(struct i40e_ring), GFP_KERNEL); 1949 if (!tx_rings) { 1950 err = -ENOMEM; 1951 goto done; 1952 } 1953 1954 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1955 if (!i40e_active_tx_ring_index(vsi, i)) 1956 continue; 1957 1958 tx_rings[i] = *vsi->tx_rings[i]; 1959 tx_rings[i].count = new_tx_count; 1960 /* the desc and bi pointers will be reallocated in the 1961 * setup call 1962 */ 1963 tx_rings[i].desc = NULL; 1964 tx_rings[i].rx_bi = NULL; 1965 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1966 if (err) { 1967 while (i) { 1968 i--; 1969 if (!i40e_active_tx_ring_index(vsi, i)) 1970 continue; 1971 i40e_free_tx_resources(&tx_rings[i]); 1972 } 1973 kfree(tx_rings); 1974 tx_rings = NULL; 1975 1976 goto done; 1977 } 1978 } 1979 } 1980 1981 /* alloc updated Rx resources */ 1982 if (new_rx_count != vsi->rx_rings[0]->count) { 1983 netdev_info(netdev, 1984 "Changing Rx descriptor count from %d to %d\n", 1985 vsi->rx_rings[0]->count, new_rx_count); 1986 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1987 sizeof(struct i40e_ring), GFP_KERNEL); 1988 if (!rx_rings) { 1989 err = -ENOMEM; 1990 goto free_tx; 1991 } 1992 1993 for (i = 0; i < vsi->num_queue_pairs; i++) { 1994 u16 unused; 1995 1996 /* clone ring and setup updated count */ 1997 rx_rings[i] = *vsi->rx_rings[i]; 1998 rx_rings[i].count = new_rx_count; 1999 /* the desc and bi pointers will be reallocated in the 2000 * setup call 2001 */ 2002 rx_rings[i].desc = NULL; 2003 rx_rings[i].rx_bi = NULL; 2004 /* Clear cloned XDP RX-queue info before setup call */ 2005 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2006 /* this is to allow wr32 to have something to write to 2007 * during early allocation of Rx buffers 2008 */ 2009 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2010 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2011 if (err) 2012 goto rx_unwind; 2013 2014 /* now allocate the Rx buffers to make sure the OS 2015 * has enough memory, any failure here means abort 2016 */ 2017 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2018 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2019 rx_unwind: 2020 if (err) { 2021 do { 2022 i40e_free_rx_resources(&rx_rings[i]); 2023 } while (i--); 2024 kfree(rx_rings); 2025 rx_rings = NULL; 2026 2027 goto free_tx; 2028 } 2029 } 2030 } 2031 2032 /* Bring interface down, copy in the new ring info, 2033 * then restore the interface 2034 */ 2035 i40e_down(vsi); 2036 2037 if (tx_rings) { 2038 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2039 if (i40e_active_tx_ring_index(vsi, i)) { 2040 i40e_free_tx_resources(vsi->tx_rings[i]); 2041 *vsi->tx_rings[i] = tx_rings[i]; 2042 } 2043 } 2044 kfree(tx_rings); 2045 tx_rings = NULL; 2046 } 2047 2048 if (rx_rings) { 2049 for (i = 0; i < vsi->num_queue_pairs; i++) { 2050 i40e_free_rx_resources(vsi->rx_rings[i]); 2051 /* get the real tail offset */ 2052 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2053 /* this is to fake out the allocation routine 2054 * into thinking it has to realloc everything 2055 * but the recycling logic will let us re-use 2056 * the buffers allocated above 2057 */ 2058 rx_rings[i].next_to_use = 0; 2059 rx_rings[i].next_to_clean = 0; 2060 rx_rings[i].next_to_alloc = 0; 2061 /* do a struct copy */ 2062 *vsi->rx_rings[i] = rx_rings[i]; 2063 } 2064 kfree(rx_rings); 2065 rx_rings = NULL; 2066 } 2067 2068 i40e_up(vsi); 2069 2070 free_tx: 2071 /* error cleanup if the Rx allocations failed after getting Tx */ 2072 if (tx_rings) { 2073 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2074 if (i40e_active_tx_ring_index(vsi, i)) 2075 i40e_free_tx_resources(vsi->tx_rings[i]); 2076 } 2077 kfree(tx_rings); 2078 tx_rings = NULL; 2079 } 2080 2081 done: 2082 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2083 2084 return err; 2085 } 2086 2087 /** 2088 * i40e_get_stats_count - return the stats count for a device 2089 * @netdev: the netdev to return the count for 2090 * 2091 * Returns the total number of statistics for this netdev. Note that even 2092 * though this is a function, it is required that the count for a specific 2093 * netdev must never change. Basing the count on static values such as the 2094 * maximum number of queues or the device type is ok. However, the API for 2095 * obtaining stats is *not* safe against changes based on non-static 2096 * values such as the *current* number of queues, or runtime flags. 2097 * 2098 * If a statistic is not always enabled, return it as part of the count 2099 * anyways, always return its string, and report its value as zero. 2100 **/ 2101 static int i40e_get_stats_count(struct net_device *netdev) 2102 { 2103 struct i40e_netdev_priv *np = netdev_priv(netdev); 2104 struct i40e_vsi *vsi = np->vsi; 2105 struct i40e_pf *pf = vsi->back; 2106 int stats_len; 2107 2108 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 2109 stats_len = I40E_PF_STATS_LEN; 2110 else 2111 stats_len = I40E_VSI_STATS_LEN; 2112 2113 /* The number of stats reported for a given net_device must remain 2114 * constant throughout the life of that device. 2115 * 2116 * This is because the API for obtaining the size, strings, and stats 2117 * is spread out over three separate ethtool ioctls. There is no safe 2118 * way to lock the number of stats across these calls, so we must 2119 * assume that they will never change. 2120 * 2121 * Due to this, we report the maximum number of queues, even if not 2122 * every queue is currently configured. Since we always allocate 2123 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2124 * works because the num_tx_queues is set at device creation and never 2125 * changes. 2126 */ 2127 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2128 2129 return stats_len; 2130 } 2131 2132 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2133 { 2134 struct i40e_netdev_priv *np = netdev_priv(netdev); 2135 struct i40e_vsi *vsi = np->vsi; 2136 struct i40e_pf *pf = vsi->back; 2137 2138 switch (sset) { 2139 case ETH_SS_TEST: 2140 return I40E_TEST_LEN; 2141 case ETH_SS_STATS: 2142 return i40e_get_stats_count(netdev); 2143 case ETH_SS_PRIV_FLAGS: 2144 return I40E_PRIV_FLAGS_STR_LEN + 2145 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2146 default: 2147 return -EOPNOTSUPP; 2148 } 2149 } 2150 2151 /** 2152 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2153 * @pf: the PF device structure 2154 * @i: the priority value to copy 2155 * 2156 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2157 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2158 * of the PFC stats for the given priority. 2159 **/ 2160 static inline struct i40e_pfc_stats 2161 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2162 { 2163 #define I40E_GET_PFC_STAT(stat, priority) \ 2164 .stat = pf->stats.stat[priority] 2165 2166 struct i40e_pfc_stats pfc = { 2167 I40E_GET_PFC_STAT(priority_xon_rx, i), 2168 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2169 I40E_GET_PFC_STAT(priority_xon_tx, i), 2170 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2171 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2172 }; 2173 return pfc; 2174 } 2175 2176 /** 2177 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2178 * @netdev: the netdev to collect stats for 2179 * @stats: ethtool stats command structure 2180 * @data: ethtool supplied buffer 2181 * 2182 * Copy the stats values for this netdev into the buffer. Expects data to be 2183 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2184 * statistics must be copied in a static order, and the count must not change 2185 * for a given netdev. See i40e_get_stats_count for more details. 2186 * 2187 * If a statistic is not currently valid (such as a disabled queue), this 2188 * function reports its value as zero. 2189 **/ 2190 static void i40e_get_ethtool_stats(struct net_device *netdev, 2191 struct ethtool_stats *stats, u64 *data) 2192 { 2193 struct i40e_netdev_priv *np = netdev_priv(netdev); 2194 struct i40e_vsi *vsi = np->vsi; 2195 struct i40e_pf *pf = vsi->back; 2196 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 2197 unsigned int i; 2198 bool veb_stats; 2199 u64 *p = data; 2200 2201 i40e_update_stats(vsi); 2202 2203 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2204 i40e_gstrings_net_stats); 2205 2206 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2207 2208 rcu_read_lock(); 2209 for (i = 0; i < netdev->num_tx_queues; i++) { 2210 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2211 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2212 } 2213 rcu_read_unlock(); 2214 2215 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2216 goto check_data_pointer; 2217 2218 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2219 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2220 2221 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2222 * we initialize stats to zero and update the data pointer 2223 * intelligently 2224 */ 2225 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2226 i40e_gstrings_veb_stats); 2227 2228 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2229 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2230 i40e_gstrings_veb_tc_stats); 2231 2232 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2233 2234 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2235 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2236 2237 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2238 } 2239 2240 check_data_pointer: 2241 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2242 "ethtool stats count mismatch!"); 2243 } 2244 2245 /** 2246 * i40e_get_stat_strings - copy stat strings into supplied buffer 2247 * @netdev: the netdev to collect strings for 2248 * @data: supplied buffer to copy strings into 2249 * 2250 * Copy the strings related to stats for this netdev. Expects data to be 2251 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2252 * strings must be copied in a static order and the total count must not 2253 * change for a given netdev. See i40e_get_stats_count for more details. 2254 **/ 2255 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2256 { 2257 struct i40e_netdev_priv *np = netdev_priv(netdev); 2258 struct i40e_vsi *vsi = np->vsi; 2259 struct i40e_pf *pf = vsi->back; 2260 unsigned int i; 2261 u8 *p = data; 2262 2263 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2264 2265 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2266 2267 for (i = 0; i < netdev->num_tx_queues; i++) { 2268 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2269 "tx", i); 2270 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2271 "rx", i); 2272 } 2273 2274 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2275 return; 2276 2277 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2278 2279 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2280 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2281 2282 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2283 2284 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2285 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2286 2287 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2288 "stat strings count mismatch!"); 2289 } 2290 2291 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2292 { 2293 struct i40e_netdev_priv *np = netdev_priv(netdev); 2294 struct i40e_vsi *vsi = np->vsi; 2295 struct i40e_pf *pf = vsi->back; 2296 char *p = (char *)data; 2297 unsigned int i; 2298 2299 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2300 snprintf(p, ETH_GSTRING_LEN, "%s", 2301 i40e_gstrings_priv_flags[i].flag_string); 2302 p += ETH_GSTRING_LEN; 2303 } 2304 if (pf->hw.pf_id != 0) 2305 return; 2306 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2307 snprintf(p, ETH_GSTRING_LEN, "%s", 2308 i40e_gl_gstrings_priv_flags[i].flag_string); 2309 p += ETH_GSTRING_LEN; 2310 } 2311 } 2312 2313 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2314 u8 *data) 2315 { 2316 switch (stringset) { 2317 case ETH_SS_TEST: 2318 memcpy(data, i40e_gstrings_test, 2319 I40E_TEST_LEN * ETH_GSTRING_LEN); 2320 break; 2321 case ETH_SS_STATS: 2322 i40e_get_stat_strings(netdev, data); 2323 break; 2324 case ETH_SS_PRIV_FLAGS: 2325 i40e_get_priv_flag_strings(netdev, data); 2326 break; 2327 default: 2328 break; 2329 } 2330 } 2331 2332 static int i40e_get_ts_info(struct net_device *dev, 2333 struct ethtool_ts_info *info) 2334 { 2335 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2336 2337 /* only report HW timestamping if PTP is enabled */ 2338 if (!(pf->flags & I40E_FLAG_PTP)) 2339 return ethtool_op_get_ts_info(dev, info); 2340 2341 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2342 SOF_TIMESTAMPING_RX_SOFTWARE | 2343 SOF_TIMESTAMPING_SOFTWARE | 2344 SOF_TIMESTAMPING_TX_HARDWARE | 2345 SOF_TIMESTAMPING_RX_HARDWARE | 2346 SOF_TIMESTAMPING_RAW_HARDWARE; 2347 2348 if (pf->ptp_clock) 2349 info->phc_index = ptp_clock_index(pf->ptp_clock); 2350 else 2351 info->phc_index = -1; 2352 2353 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2354 2355 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2356 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2357 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2358 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2359 2360 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2361 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2362 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2363 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2364 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2365 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2366 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2367 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2368 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2369 2370 return 0; 2371 } 2372 2373 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2374 { 2375 struct i40e_netdev_priv *np = netdev_priv(netdev); 2376 struct i40e_pf *pf = np->vsi->back; 2377 i40e_status status; 2378 bool link_up = false; 2379 2380 netif_info(pf, hw, netdev, "link test\n"); 2381 status = i40e_get_link_status(&pf->hw, &link_up); 2382 if (status) { 2383 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2384 *data = 1; 2385 return *data; 2386 } 2387 2388 if (link_up) 2389 *data = 0; 2390 else 2391 *data = 1; 2392 2393 return *data; 2394 } 2395 2396 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2397 { 2398 struct i40e_netdev_priv *np = netdev_priv(netdev); 2399 struct i40e_pf *pf = np->vsi->back; 2400 2401 netif_info(pf, hw, netdev, "register test\n"); 2402 *data = i40e_diag_reg_test(&pf->hw); 2403 2404 return *data; 2405 } 2406 2407 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2408 { 2409 struct i40e_netdev_priv *np = netdev_priv(netdev); 2410 struct i40e_pf *pf = np->vsi->back; 2411 2412 netif_info(pf, hw, netdev, "eeprom test\n"); 2413 *data = i40e_diag_eeprom_test(&pf->hw); 2414 2415 /* forcebly clear the NVM Update state machine */ 2416 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2417 2418 return *data; 2419 } 2420 2421 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2422 { 2423 struct i40e_netdev_priv *np = netdev_priv(netdev); 2424 struct i40e_pf *pf = np->vsi->back; 2425 u16 swc_old = pf->sw_int_count; 2426 2427 netif_info(pf, hw, netdev, "interrupt test\n"); 2428 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2429 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2430 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2431 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2432 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2433 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2434 usleep_range(1000, 2000); 2435 *data = (swc_old == pf->sw_int_count); 2436 2437 return *data; 2438 } 2439 2440 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2441 { 2442 struct i40e_vf *vfs = pf->vf; 2443 int i; 2444 2445 for (i = 0; i < pf->num_alloc_vfs; i++) 2446 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2447 return true; 2448 return false; 2449 } 2450 2451 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2452 { 2453 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2454 } 2455 2456 static void i40e_diag_test(struct net_device *netdev, 2457 struct ethtool_test *eth_test, u64 *data) 2458 { 2459 struct i40e_netdev_priv *np = netdev_priv(netdev); 2460 bool if_running = netif_running(netdev); 2461 struct i40e_pf *pf = np->vsi->back; 2462 2463 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2464 /* Offline tests */ 2465 netif_info(pf, drv, netdev, "offline testing starting\n"); 2466 2467 set_bit(__I40E_TESTING, pf->state); 2468 2469 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2470 dev_warn(&pf->pdev->dev, 2471 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2472 data[I40E_ETH_TEST_REG] = 1; 2473 data[I40E_ETH_TEST_EEPROM] = 1; 2474 data[I40E_ETH_TEST_INTR] = 1; 2475 data[I40E_ETH_TEST_LINK] = 1; 2476 eth_test->flags |= ETH_TEST_FL_FAILED; 2477 clear_bit(__I40E_TESTING, pf->state); 2478 goto skip_ol_tests; 2479 } 2480 2481 /* If the device is online then take it offline */ 2482 if (if_running) 2483 /* indicate we're in test mode */ 2484 i40e_close(netdev); 2485 else 2486 /* This reset does not affect link - if it is 2487 * changed to a type of reset that does affect 2488 * link then the following link test would have 2489 * to be moved to before the reset 2490 */ 2491 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2492 2493 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2494 eth_test->flags |= ETH_TEST_FL_FAILED; 2495 2496 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2497 eth_test->flags |= ETH_TEST_FL_FAILED; 2498 2499 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2500 eth_test->flags |= ETH_TEST_FL_FAILED; 2501 2502 /* run reg test last, a reset is required after it */ 2503 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2504 eth_test->flags |= ETH_TEST_FL_FAILED; 2505 2506 clear_bit(__I40E_TESTING, pf->state); 2507 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2508 2509 if (if_running) 2510 i40e_open(netdev); 2511 } else { 2512 /* Online tests */ 2513 netif_info(pf, drv, netdev, "online testing starting\n"); 2514 2515 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2516 eth_test->flags |= ETH_TEST_FL_FAILED; 2517 2518 /* Offline only tests, not run in online; pass by default */ 2519 data[I40E_ETH_TEST_REG] = 0; 2520 data[I40E_ETH_TEST_EEPROM] = 0; 2521 data[I40E_ETH_TEST_INTR] = 0; 2522 } 2523 2524 skip_ol_tests: 2525 2526 netif_info(pf, drv, netdev, "testing finished\n"); 2527 } 2528 2529 static void i40e_get_wol(struct net_device *netdev, 2530 struct ethtool_wolinfo *wol) 2531 { 2532 struct i40e_netdev_priv *np = netdev_priv(netdev); 2533 struct i40e_pf *pf = np->vsi->back; 2534 struct i40e_hw *hw = &pf->hw; 2535 u16 wol_nvm_bits; 2536 2537 /* NVM bit on means WoL disabled for the port */ 2538 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2539 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2540 wol->supported = 0; 2541 wol->wolopts = 0; 2542 } else { 2543 wol->supported = WAKE_MAGIC; 2544 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2545 } 2546 } 2547 2548 /** 2549 * i40e_set_wol - set the WakeOnLAN configuration 2550 * @netdev: the netdev in question 2551 * @wol: the ethtool WoL setting data 2552 **/ 2553 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2554 { 2555 struct i40e_netdev_priv *np = netdev_priv(netdev); 2556 struct i40e_pf *pf = np->vsi->back; 2557 struct i40e_vsi *vsi = np->vsi; 2558 struct i40e_hw *hw = &pf->hw; 2559 u16 wol_nvm_bits; 2560 2561 /* WoL not supported if this isn't the controlling PF on the port */ 2562 if (hw->partition_id != 1) { 2563 i40e_partition_setting_complaint(pf); 2564 return -EOPNOTSUPP; 2565 } 2566 2567 if (vsi != pf->vsi[pf->lan_vsi]) 2568 return -EOPNOTSUPP; 2569 2570 /* NVM bit on means WoL disabled for the port */ 2571 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2572 if (BIT(hw->port) & wol_nvm_bits) 2573 return -EOPNOTSUPP; 2574 2575 /* only magic packet is supported */ 2576 if (wol->wolopts & ~WAKE_MAGIC) 2577 return -EOPNOTSUPP; 2578 2579 /* is this a new value? */ 2580 if (pf->wol_en != !!wol->wolopts) { 2581 pf->wol_en = !!wol->wolopts; 2582 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2583 } 2584 2585 return 0; 2586 } 2587 2588 static int i40e_set_phys_id(struct net_device *netdev, 2589 enum ethtool_phys_id_state state) 2590 { 2591 struct i40e_netdev_priv *np = netdev_priv(netdev); 2592 i40e_status ret = 0; 2593 struct i40e_pf *pf = np->vsi->back; 2594 struct i40e_hw *hw = &pf->hw; 2595 int blink_freq = 2; 2596 u16 temp_status; 2597 2598 switch (state) { 2599 case ETHTOOL_ID_ACTIVE: 2600 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2601 pf->led_status = i40e_led_get(hw); 2602 } else { 2603 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2604 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2605 NULL); 2606 ret = i40e_led_get_phy(hw, &temp_status, 2607 &pf->phy_led_val); 2608 pf->led_status = temp_status; 2609 } 2610 return blink_freq; 2611 case ETHTOOL_ID_ON: 2612 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2613 i40e_led_set(hw, 0xf, false); 2614 else 2615 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2616 break; 2617 case ETHTOOL_ID_OFF: 2618 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2619 i40e_led_set(hw, 0x0, false); 2620 else 2621 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2622 break; 2623 case ETHTOOL_ID_INACTIVE: 2624 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2625 i40e_led_set(hw, pf->led_status, false); 2626 } else { 2627 ret = i40e_led_set_phy(hw, false, pf->led_status, 2628 (pf->phy_led_val | 2629 I40E_PHY_LED_MODE_ORIG)); 2630 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2631 i40e_aq_set_phy_debug(hw, 0, NULL); 2632 } 2633 break; 2634 default: 2635 break; 2636 } 2637 if (ret) 2638 return -ENOENT; 2639 else 2640 return 0; 2641 } 2642 2643 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2644 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2645 * 125us (8000 interrupts per second) == ITR(62) 2646 */ 2647 2648 /** 2649 * __i40e_get_coalesce - get per-queue coalesce settings 2650 * @netdev: the netdev to check 2651 * @ec: ethtool coalesce data structure 2652 * @queue: which queue to pick 2653 * 2654 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2655 * are per queue. If queue is <0 then we default to queue 0 as the 2656 * representative value. 2657 **/ 2658 static int __i40e_get_coalesce(struct net_device *netdev, 2659 struct ethtool_coalesce *ec, 2660 int queue) 2661 { 2662 struct i40e_netdev_priv *np = netdev_priv(netdev); 2663 struct i40e_ring *rx_ring, *tx_ring; 2664 struct i40e_vsi *vsi = np->vsi; 2665 2666 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2667 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2668 2669 /* rx and tx usecs has per queue value. If user doesn't specify the 2670 * queue, return queue 0's value to represent. 2671 */ 2672 if (queue < 0) 2673 queue = 0; 2674 else if (queue >= vsi->num_queue_pairs) 2675 return -EINVAL; 2676 2677 rx_ring = vsi->rx_rings[queue]; 2678 tx_ring = vsi->tx_rings[queue]; 2679 2680 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2681 ec->use_adaptive_rx_coalesce = 1; 2682 2683 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2684 ec->use_adaptive_tx_coalesce = 1; 2685 2686 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2687 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2688 2689 /* we use the _usecs_high to store/set the interrupt rate limit 2690 * that the hardware supports, that almost but not quite 2691 * fits the original intent of the ethtool variable, 2692 * the rx_coalesce_usecs_high limits total interrupts 2693 * per second from both tx/rx sources. 2694 */ 2695 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2696 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2697 2698 return 0; 2699 } 2700 2701 /** 2702 * i40e_get_coalesce - get a netdev's coalesce settings 2703 * @netdev: the netdev to check 2704 * @ec: ethtool coalesce data structure 2705 * 2706 * Gets the coalesce settings for a particular netdev. Note that if user has 2707 * modified per-queue settings, this only guarantees to represent queue 0. See 2708 * __i40e_get_coalesce for more details. 2709 **/ 2710 static int i40e_get_coalesce(struct net_device *netdev, 2711 struct ethtool_coalesce *ec) 2712 { 2713 return __i40e_get_coalesce(netdev, ec, -1); 2714 } 2715 2716 /** 2717 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2718 * @netdev: netdev structure 2719 * @ec: ethtool's coalesce settings 2720 * @queue: the particular queue to read 2721 * 2722 * Will read a specific queue's coalesce settings 2723 **/ 2724 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2725 struct ethtool_coalesce *ec) 2726 { 2727 return __i40e_get_coalesce(netdev, ec, queue); 2728 } 2729 2730 /** 2731 * i40e_set_itr_per_queue - set ITR values for specific queue 2732 * @vsi: the VSI to set values for 2733 * @ec: coalesce settings from ethtool 2734 * @queue: the queue to modify 2735 * 2736 * Change the ITR settings for a specific queue. 2737 **/ 2738 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2739 struct ethtool_coalesce *ec, 2740 int queue) 2741 { 2742 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2743 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2744 struct i40e_pf *pf = vsi->back; 2745 struct i40e_hw *hw = &pf->hw; 2746 struct i40e_q_vector *q_vector; 2747 u16 intrl; 2748 2749 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2750 2751 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2752 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2753 2754 if (ec->use_adaptive_rx_coalesce) 2755 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2756 else 2757 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2758 2759 if (ec->use_adaptive_tx_coalesce) 2760 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2761 else 2762 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2763 2764 q_vector = rx_ring->q_vector; 2765 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2766 2767 q_vector = tx_ring->q_vector; 2768 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2769 2770 /* The interrupt handler itself will take care of programming 2771 * the Tx and Rx ITR values based on the values we have entered 2772 * into the q_vector, no need to write the values now. 2773 */ 2774 2775 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2776 i40e_flush(hw); 2777 } 2778 2779 /** 2780 * __i40e_set_coalesce - set coalesce settings for particular queue 2781 * @netdev: the netdev to change 2782 * @ec: ethtool coalesce settings 2783 * @queue: the queue to change 2784 * 2785 * Sets the coalesce settings for a particular queue. 2786 **/ 2787 static int __i40e_set_coalesce(struct net_device *netdev, 2788 struct ethtool_coalesce *ec, 2789 int queue) 2790 { 2791 struct i40e_netdev_priv *np = netdev_priv(netdev); 2792 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2793 struct i40e_vsi *vsi = np->vsi; 2794 struct i40e_pf *pf = vsi->back; 2795 int i; 2796 2797 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2798 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2799 2800 if (queue < 0) { 2801 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2802 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2803 } else if (queue < vsi->num_queue_pairs) { 2804 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2805 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2806 } else { 2807 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2808 vsi->num_queue_pairs - 1); 2809 return -EINVAL; 2810 } 2811 2812 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2813 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2814 2815 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2816 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2817 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2818 return -EINVAL; 2819 } 2820 2821 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2822 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2823 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2824 return -EINVAL; 2825 } 2826 2827 if (ec->rx_coalesce_usecs != cur_rx_itr && 2828 ec->use_adaptive_rx_coalesce) { 2829 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2830 return -EINVAL; 2831 } 2832 2833 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2834 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2835 return -EINVAL; 2836 } 2837 2838 if (ec->tx_coalesce_usecs != cur_tx_itr && 2839 ec->use_adaptive_tx_coalesce) { 2840 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2841 return -EINVAL; 2842 } 2843 2844 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2845 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2846 return -EINVAL; 2847 } 2848 2849 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2850 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2851 2852 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2853 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2854 2855 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2856 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2857 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2858 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2859 vsi->int_rate_limit); 2860 } 2861 2862 /* rx and tx usecs has per queue value. If user doesn't specify the 2863 * queue, apply to all queues. 2864 */ 2865 if (queue < 0) { 2866 for (i = 0; i < vsi->num_queue_pairs; i++) 2867 i40e_set_itr_per_queue(vsi, ec, i); 2868 } else { 2869 i40e_set_itr_per_queue(vsi, ec, queue); 2870 } 2871 2872 return 0; 2873 } 2874 2875 /** 2876 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2877 * @netdev: the netdev to change 2878 * @ec: ethtool coalesce settings 2879 * 2880 * This will set each queue to the same coalesce settings. 2881 **/ 2882 static int i40e_set_coalesce(struct net_device *netdev, 2883 struct ethtool_coalesce *ec) 2884 { 2885 return __i40e_set_coalesce(netdev, ec, -1); 2886 } 2887 2888 /** 2889 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2890 * @netdev: the netdev to change 2891 * @ec: ethtool's coalesce settings 2892 * @queue: the queue to change 2893 * 2894 * Sets the specified queue's coalesce settings. 2895 **/ 2896 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2897 struct ethtool_coalesce *ec) 2898 { 2899 return __i40e_set_coalesce(netdev, ec, queue); 2900 } 2901 2902 /** 2903 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2904 * @pf: pointer to the physical function struct 2905 * @cmd: ethtool rxnfc command 2906 * 2907 * Returns Success if the flow is supported, else Invalid Input. 2908 **/ 2909 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2910 { 2911 struct i40e_hw *hw = &pf->hw; 2912 u8 flow_pctype = 0; 2913 u64 i_set = 0; 2914 2915 cmd->data = 0; 2916 2917 switch (cmd->flow_type) { 2918 case TCP_V4_FLOW: 2919 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2920 break; 2921 case UDP_V4_FLOW: 2922 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2923 break; 2924 case TCP_V6_FLOW: 2925 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2926 break; 2927 case UDP_V6_FLOW: 2928 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2929 break; 2930 case SCTP_V4_FLOW: 2931 case AH_ESP_V4_FLOW: 2932 case AH_V4_FLOW: 2933 case ESP_V4_FLOW: 2934 case IPV4_FLOW: 2935 case SCTP_V6_FLOW: 2936 case AH_ESP_V6_FLOW: 2937 case AH_V6_FLOW: 2938 case ESP_V6_FLOW: 2939 case IPV6_FLOW: 2940 /* Default is src/dest for IP, no matter the L4 hashing */ 2941 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2942 break; 2943 default: 2944 return -EINVAL; 2945 } 2946 2947 /* Read flow based hash input set register */ 2948 if (flow_pctype) { 2949 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2950 flow_pctype)) | 2951 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2952 flow_pctype)) << 32); 2953 } 2954 2955 /* Process bits of hash input set */ 2956 if (i_set) { 2957 if (i_set & I40E_L4_SRC_MASK) 2958 cmd->data |= RXH_L4_B_0_1; 2959 if (i_set & I40E_L4_DST_MASK) 2960 cmd->data |= RXH_L4_B_2_3; 2961 2962 if (cmd->flow_type == TCP_V4_FLOW || 2963 cmd->flow_type == UDP_V4_FLOW) { 2964 if (i_set & I40E_L3_SRC_MASK) 2965 cmd->data |= RXH_IP_SRC; 2966 if (i_set & I40E_L3_DST_MASK) 2967 cmd->data |= RXH_IP_DST; 2968 } else if (cmd->flow_type == TCP_V6_FLOW || 2969 cmd->flow_type == UDP_V6_FLOW) { 2970 if (i_set & I40E_L3_V6_SRC_MASK) 2971 cmd->data |= RXH_IP_SRC; 2972 if (i_set & I40E_L3_V6_DST_MASK) 2973 cmd->data |= RXH_IP_DST; 2974 } 2975 } 2976 2977 return 0; 2978 } 2979 2980 /** 2981 * i40e_check_mask - Check whether a mask field is set 2982 * @mask: the full mask value 2983 * @field: mask of the field to check 2984 * 2985 * If the given mask is fully set, return positive value. If the mask for the 2986 * field is fully unset, return zero. Otherwise return a negative error code. 2987 **/ 2988 static int i40e_check_mask(u64 mask, u64 field) 2989 { 2990 u64 value = mask & field; 2991 2992 if (value == field) 2993 return 1; 2994 else if (!value) 2995 return 0; 2996 else 2997 return -1; 2998 } 2999 3000 /** 3001 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3002 * @fsp: pointer to rx flow specification 3003 * @data: pointer to userdef data structure for storage 3004 * 3005 * Read the user-defined data and deconstruct the value into a structure. No 3006 * other code should read the user-defined data, so as to ensure that every 3007 * place consistently reads the value correctly. 3008 * 3009 * The user-defined field is a 64bit Big Endian format value, which we 3010 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3011 * be defined starting from the highest bits, while small bit field values 3012 * shall be defined starting from the lowest bits. 3013 * 3014 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3015 * and the filter should be rejected. The data structure will always be 3016 * modified even if FLOW_EXT is not set. 3017 * 3018 **/ 3019 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3020 struct i40e_rx_flow_userdef *data) 3021 { 3022 u64 value, mask; 3023 int valid; 3024 3025 /* Zero memory first so it's always consistent. */ 3026 memset(data, 0, sizeof(*data)); 3027 3028 if (!(fsp->flow_type & FLOW_EXT)) 3029 return 0; 3030 3031 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3032 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3033 3034 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3035 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3036 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3037 3038 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3039 if (valid < 0) { 3040 return -EINVAL; 3041 } else if (valid) { 3042 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3043 data->flex_offset = 3044 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 3045 data->flex_filter = true; 3046 } 3047 3048 return 0; 3049 } 3050 3051 /** 3052 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3053 * @fsp: pointer to rx_flow specification 3054 * @data: pointer to return userdef data 3055 * 3056 * Reads the userdef data structure and properly fills in the user defined 3057 * fields of the rx_flow_spec. 3058 **/ 3059 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3060 struct i40e_rx_flow_userdef *data) 3061 { 3062 u64 value = 0, mask = 0; 3063 3064 if (data->flex_filter) { 3065 value |= data->flex_word; 3066 value |= (u64)data->flex_offset << 16; 3067 mask |= I40E_USERDEF_FLEX_FILTER; 3068 } 3069 3070 if (value || mask) 3071 fsp->flow_type |= FLOW_EXT; 3072 3073 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3074 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3075 } 3076 3077 /** 3078 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3079 * @pf: Pointer to the physical function struct 3080 * @cmd: The command to get or set Rx flow classification rules 3081 * @rule_locs: Array of used rule locations 3082 * 3083 * This function populates both the total and actual rule count of 3084 * the ethtool flow classification command 3085 * 3086 * Returns 0 on success or -EMSGSIZE if entry not found 3087 **/ 3088 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3089 struct ethtool_rxnfc *cmd, 3090 u32 *rule_locs) 3091 { 3092 struct i40e_fdir_filter *rule; 3093 struct hlist_node *node2; 3094 int cnt = 0; 3095 3096 /* report total rule count */ 3097 cmd->data = i40e_get_fd_cnt_all(pf); 3098 3099 hlist_for_each_entry_safe(rule, node2, 3100 &pf->fdir_filter_list, fdir_node) { 3101 if (cnt == cmd->rule_cnt) 3102 return -EMSGSIZE; 3103 3104 rule_locs[cnt] = rule->fd_id; 3105 cnt++; 3106 } 3107 3108 cmd->rule_cnt = cnt; 3109 3110 return 0; 3111 } 3112 3113 /** 3114 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3115 * @pf: Pointer to the physical function struct 3116 * @cmd: The command to get or set Rx flow classification rules 3117 * 3118 * This function looks up a filter based on the Rx flow classification 3119 * command and fills the flow spec info for it if found 3120 * 3121 * Returns 0 on success or -EINVAL if filter not found 3122 **/ 3123 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3124 struct ethtool_rxnfc *cmd) 3125 { 3126 struct ethtool_rx_flow_spec *fsp = 3127 (struct ethtool_rx_flow_spec *)&cmd->fs; 3128 struct i40e_rx_flow_userdef userdef = {0}; 3129 struct i40e_fdir_filter *rule = NULL; 3130 struct hlist_node *node2; 3131 u64 input_set; 3132 u16 index; 3133 3134 hlist_for_each_entry_safe(rule, node2, 3135 &pf->fdir_filter_list, fdir_node) { 3136 if (fsp->location <= rule->fd_id) 3137 break; 3138 } 3139 3140 if (!rule || fsp->location != rule->fd_id) 3141 return -EINVAL; 3142 3143 fsp->flow_type = rule->flow_type; 3144 if (fsp->flow_type == IP_USER_FLOW) { 3145 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3146 fsp->h_u.usr_ip4_spec.proto = 0; 3147 fsp->m_u.usr_ip4_spec.proto = 0; 3148 } 3149 3150 /* Reverse the src and dest notion, since the HW views them from 3151 * Tx perspective where as the user expects it from Rx filter view. 3152 */ 3153 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3154 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3155 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3156 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3157 3158 switch (rule->flow_type) { 3159 case SCTP_V4_FLOW: 3160 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3161 break; 3162 case TCP_V4_FLOW: 3163 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3164 break; 3165 case UDP_V4_FLOW: 3166 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3167 break; 3168 case IP_USER_FLOW: 3169 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3170 break; 3171 default: 3172 /* If we have stored a filter with a flow type not listed here 3173 * it is almost certainly a driver bug. WARN(), and then 3174 * assign the input_set as if all fields are enabled to avoid 3175 * reading unassigned memory. 3176 */ 3177 WARN(1, "Missing input set index for flow_type %d\n", 3178 rule->flow_type); 3179 input_set = 0xFFFFFFFFFFFFFFFFULL; 3180 goto no_input_set; 3181 } 3182 3183 input_set = i40e_read_fd_input_set(pf, index); 3184 3185 no_input_set: 3186 if (input_set & I40E_L3_SRC_MASK) 3187 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3188 3189 if (input_set & I40E_L3_DST_MASK) 3190 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3191 3192 if (input_set & I40E_L4_SRC_MASK) 3193 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3194 3195 if (input_set & I40E_L4_DST_MASK) 3196 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3197 3198 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3199 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3200 else 3201 fsp->ring_cookie = rule->q_index; 3202 3203 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3204 struct i40e_vsi *vsi; 3205 3206 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3207 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3208 /* VFs are zero-indexed by the driver, but ethtool 3209 * expects them to be one-indexed, so add one here 3210 */ 3211 u64 ring_vf = vsi->vf_id + 1; 3212 3213 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3214 fsp->ring_cookie |= ring_vf; 3215 } 3216 } 3217 3218 if (rule->flex_filter) { 3219 userdef.flex_filter = true; 3220 userdef.flex_word = be16_to_cpu(rule->flex_word); 3221 userdef.flex_offset = rule->flex_offset; 3222 } 3223 3224 i40e_fill_rx_flow_user_data(fsp, &userdef); 3225 3226 return 0; 3227 } 3228 3229 /** 3230 * i40e_get_rxnfc - command to get RX flow classification rules 3231 * @netdev: network interface device structure 3232 * @cmd: ethtool rxnfc command 3233 * @rule_locs: pointer to store rule data 3234 * 3235 * Returns Success if the command is supported. 3236 **/ 3237 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3238 u32 *rule_locs) 3239 { 3240 struct i40e_netdev_priv *np = netdev_priv(netdev); 3241 struct i40e_vsi *vsi = np->vsi; 3242 struct i40e_pf *pf = vsi->back; 3243 int ret = -EOPNOTSUPP; 3244 3245 switch (cmd->cmd) { 3246 case ETHTOOL_GRXRINGS: 3247 cmd->data = vsi->rss_size; 3248 ret = 0; 3249 break; 3250 case ETHTOOL_GRXFH: 3251 ret = i40e_get_rss_hash_opts(pf, cmd); 3252 break; 3253 case ETHTOOL_GRXCLSRLCNT: 3254 cmd->rule_cnt = pf->fdir_pf_active_filters; 3255 /* report total rule count */ 3256 cmd->data = i40e_get_fd_cnt_all(pf); 3257 ret = 0; 3258 break; 3259 case ETHTOOL_GRXCLSRULE: 3260 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3261 break; 3262 case ETHTOOL_GRXCLSRLALL: 3263 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3264 break; 3265 default: 3266 break; 3267 } 3268 3269 return ret; 3270 } 3271 3272 /** 3273 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3274 * @nfc: pointer to user request 3275 * @i_setc: bits currently set 3276 * 3277 * Returns value of bits to be set per user request 3278 **/ 3279 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3280 { 3281 u64 i_set = i_setc; 3282 u64 src_l3 = 0, dst_l3 = 0; 3283 3284 if (nfc->data & RXH_L4_B_0_1) 3285 i_set |= I40E_L4_SRC_MASK; 3286 else 3287 i_set &= ~I40E_L4_SRC_MASK; 3288 if (nfc->data & RXH_L4_B_2_3) 3289 i_set |= I40E_L4_DST_MASK; 3290 else 3291 i_set &= ~I40E_L4_DST_MASK; 3292 3293 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3294 src_l3 = I40E_L3_V6_SRC_MASK; 3295 dst_l3 = I40E_L3_V6_DST_MASK; 3296 } else if (nfc->flow_type == TCP_V4_FLOW || 3297 nfc->flow_type == UDP_V4_FLOW) { 3298 src_l3 = I40E_L3_SRC_MASK; 3299 dst_l3 = I40E_L3_DST_MASK; 3300 } else { 3301 /* Any other flow type are not supported here */ 3302 return i_set; 3303 } 3304 3305 if (nfc->data & RXH_IP_SRC) 3306 i_set |= src_l3; 3307 else 3308 i_set &= ~src_l3; 3309 if (nfc->data & RXH_IP_DST) 3310 i_set |= dst_l3; 3311 else 3312 i_set &= ~dst_l3; 3313 3314 return i_set; 3315 } 3316 3317 /** 3318 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3319 * @pf: pointer to the physical function struct 3320 * @nfc: ethtool rxnfc command 3321 * 3322 * Returns Success if the flow input set is supported. 3323 **/ 3324 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3325 { 3326 struct i40e_hw *hw = &pf->hw; 3327 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3328 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3329 u8 flow_pctype = 0; 3330 u64 i_set, i_setc; 3331 3332 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3333 dev_err(&pf->pdev->dev, 3334 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3335 return -EOPNOTSUPP; 3336 } 3337 3338 /* RSS does not support anything other than hashing 3339 * to queues on src and dst IPs and ports 3340 */ 3341 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3342 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3343 return -EINVAL; 3344 3345 switch (nfc->flow_type) { 3346 case TCP_V4_FLOW: 3347 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3348 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3349 hena |= 3350 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3351 break; 3352 case TCP_V6_FLOW: 3353 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3354 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3355 hena |= 3356 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3357 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3358 hena |= 3359 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3360 break; 3361 case UDP_V4_FLOW: 3362 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3363 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3364 hena |= 3365 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3366 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3367 3368 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3369 break; 3370 case UDP_V6_FLOW: 3371 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3372 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3373 hena |= 3374 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3375 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3376 3377 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3378 break; 3379 case AH_ESP_V4_FLOW: 3380 case AH_V4_FLOW: 3381 case ESP_V4_FLOW: 3382 case SCTP_V4_FLOW: 3383 if ((nfc->data & RXH_L4_B_0_1) || 3384 (nfc->data & RXH_L4_B_2_3)) 3385 return -EINVAL; 3386 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3387 break; 3388 case AH_ESP_V6_FLOW: 3389 case AH_V6_FLOW: 3390 case ESP_V6_FLOW: 3391 case SCTP_V6_FLOW: 3392 if ((nfc->data & RXH_L4_B_0_1) || 3393 (nfc->data & RXH_L4_B_2_3)) 3394 return -EINVAL; 3395 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3396 break; 3397 case IPV4_FLOW: 3398 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3399 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3400 break; 3401 case IPV6_FLOW: 3402 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3403 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3404 break; 3405 default: 3406 return -EINVAL; 3407 } 3408 3409 if (flow_pctype) { 3410 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3411 flow_pctype)) | 3412 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3413 flow_pctype)) << 32); 3414 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3415 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3416 (u32)i_set); 3417 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3418 (u32)(i_set >> 32)); 3419 hena |= BIT_ULL(flow_pctype); 3420 } 3421 3422 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3423 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3424 i40e_flush(hw); 3425 3426 return 0; 3427 } 3428 3429 /** 3430 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3431 * @vsi: Pointer to the targeted VSI 3432 * @input: The filter to update or NULL to indicate deletion 3433 * @sw_idx: Software index to the filter 3434 * @cmd: The command to get or set Rx flow classification rules 3435 * 3436 * This function updates (or deletes) a Flow Director entry from 3437 * the hlist of the corresponding PF 3438 * 3439 * Returns 0 on success 3440 **/ 3441 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3442 struct i40e_fdir_filter *input, 3443 u16 sw_idx, 3444 struct ethtool_rxnfc *cmd) 3445 { 3446 struct i40e_fdir_filter *rule, *parent; 3447 struct i40e_pf *pf = vsi->back; 3448 struct hlist_node *node2; 3449 int err = -EINVAL; 3450 3451 parent = NULL; 3452 rule = NULL; 3453 3454 hlist_for_each_entry_safe(rule, node2, 3455 &pf->fdir_filter_list, fdir_node) { 3456 /* hash found, or no matching entry */ 3457 if (rule->fd_id >= sw_idx) 3458 break; 3459 parent = rule; 3460 } 3461 3462 /* if there is an old rule occupying our place remove it */ 3463 if (rule && (rule->fd_id == sw_idx)) { 3464 /* Remove this rule, since we're either deleting it, or 3465 * replacing it. 3466 */ 3467 err = i40e_add_del_fdir(vsi, rule, false); 3468 hlist_del(&rule->fdir_node); 3469 kfree(rule); 3470 pf->fdir_pf_active_filters--; 3471 } 3472 3473 /* If we weren't given an input, this is a delete, so just return the 3474 * error code indicating if there was an entry at the requested slot 3475 */ 3476 if (!input) 3477 return err; 3478 3479 /* Otherwise, install the new rule as requested */ 3480 INIT_HLIST_NODE(&input->fdir_node); 3481 3482 /* add filter to the list */ 3483 if (parent) 3484 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3485 else 3486 hlist_add_head(&input->fdir_node, 3487 &pf->fdir_filter_list); 3488 3489 /* update counts */ 3490 pf->fdir_pf_active_filters++; 3491 3492 return 0; 3493 } 3494 3495 /** 3496 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3497 * @pf: pointer to PF structure 3498 * 3499 * This function searches the list of filters and determines which FLX_PIT 3500 * entries are still required. It will prune any entries which are no longer 3501 * in use after the deletion. 3502 **/ 3503 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3504 { 3505 struct i40e_flex_pit *entry, *tmp; 3506 struct i40e_fdir_filter *rule; 3507 3508 /* First, we'll check the l3 table */ 3509 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3510 bool found = false; 3511 3512 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3513 if (rule->flow_type != IP_USER_FLOW) 3514 continue; 3515 if (rule->flex_filter && 3516 rule->flex_offset == entry->src_offset) { 3517 found = true; 3518 break; 3519 } 3520 } 3521 3522 /* If we didn't find the filter, then we can prune this entry 3523 * from the list. 3524 */ 3525 if (!found) { 3526 list_del(&entry->list); 3527 kfree(entry); 3528 } 3529 } 3530 3531 /* Followed by the L4 table */ 3532 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3533 bool found = false; 3534 3535 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3536 /* Skip this filter if it's L3, since we already 3537 * checked those in the above loop 3538 */ 3539 if (rule->flow_type == IP_USER_FLOW) 3540 continue; 3541 if (rule->flex_filter && 3542 rule->flex_offset == entry->src_offset) { 3543 found = true; 3544 break; 3545 } 3546 } 3547 3548 /* If we didn't find the filter, then we can prune this entry 3549 * from the list. 3550 */ 3551 if (!found) { 3552 list_del(&entry->list); 3553 kfree(entry); 3554 } 3555 } 3556 } 3557 3558 /** 3559 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3560 * @vsi: Pointer to the targeted VSI 3561 * @cmd: The command to get or set Rx flow classification rules 3562 * 3563 * The function removes a Flow Director filter entry from the 3564 * hlist of the corresponding PF 3565 * 3566 * Returns 0 on success 3567 */ 3568 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3569 struct ethtool_rxnfc *cmd) 3570 { 3571 struct ethtool_rx_flow_spec *fsp = 3572 (struct ethtool_rx_flow_spec *)&cmd->fs; 3573 struct i40e_pf *pf = vsi->back; 3574 int ret = 0; 3575 3576 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3577 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3578 return -EBUSY; 3579 3580 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3581 return -EBUSY; 3582 3583 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3584 3585 i40e_prune_flex_pit_list(pf); 3586 3587 i40e_fdir_check_and_reenable(pf); 3588 return ret; 3589 } 3590 3591 /** 3592 * i40e_unused_pit_index - Find an unused PIT index for given list 3593 * @pf: the PF data structure 3594 * 3595 * Find the first unused flexible PIT index entry. We search both the L3 and 3596 * L4 flexible PIT lists so that the returned index is unique and unused by 3597 * either currently programmed L3 or L4 filters. We use a bit field as storage 3598 * to track which indexes are already used. 3599 **/ 3600 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3601 { 3602 unsigned long available_index = 0xFF; 3603 struct i40e_flex_pit *entry; 3604 3605 /* We need to make sure that the new index isn't in use by either L3 3606 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3607 * L4 to use the same index. 3608 */ 3609 3610 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3611 clear_bit(entry->pit_index, &available_index); 3612 3613 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3614 clear_bit(entry->pit_index, &available_index); 3615 3616 return find_first_bit(&available_index, 8); 3617 } 3618 3619 /** 3620 * i40e_find_flex_offset - Find an existing flex src_offset 3621 * @flex_pit_list: L3 or L4 flex PIT list 3622 * @src_offset: new src_offset to find 3623 * 3624 * Searches the flex_pit_list for an existing offset. If no offset is 3625 * currently programmed, then this will return an ERR_PTR if there is no space 3626 * to add a new offset, otherwise it returns NULL. 3627 **/ 3628 static 3629 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3630 u16 src_offset) 3631 { 3632 struct i40e_flex_pit *entry; 3633 int size = 0; 3634 3635 /* Search for the src_offset first. If we find a matching entry 3636 * already programmed, we can simply re-use it. 3637 */ 3638 list_for_each_entry(entry, flex_pit_list, list) { 3639 size++; 3640 if (entry->src_offset == src_offset) 3641 return entry; 3642 } 3643 3644 /* If we haven't found an entry yet, then the provided src offset has 3645 * not yet been programmed. We will program the src offset later on, 3646 * but we need to indicate whether there is enough space to do so 3647 * here. We'll make use of ERR_PTR for this purpose. 3648 */ 3649 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3650 return ERR_PTR(-ENOSPC); 3651 3652 return NULL; 3653 } 3654 3655 /** 3656 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3657 * @flex_pit_list: L3 or L4 flex PIT list 3658 * @src_offset: new src_offset to add 3659 * @pit_index: the PIT index to program 3660 * 3661 * This function programs the new src_offset to the list. It is expected that 3662 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3663 * that this offset is not programmed, and that the list has enough space to 3664 * store another offset. 3665 * 3666 * Returns 0 on success, and negative value on error. 3667 **/ 3668 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3669 u16 src_offset, 3670 u8 pit_index) 3671 { 3672 struct i40e_flex_pit *new_pit, *entry; 3673 3674 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3675 if (!new_pit) 3676 return -ENOMEM; 3677 3678 new_pit->src_offset = src_offset; 3679 new_pit->pit_index = pit_index; 3680 3681 /* We need to insert this item such that the list is sorted by 3682 * src_offset in ascending order. 3683 */ 3684 list_for_each_entry(entry, flex_pit_list, list) { 3685 if (new_pit->src_offset < entry->src_offset) { 3686 list_add_tail(&new_pit->list, &entry->list); 3687 return 0; 3688 } 3689 3690 /* If we found an entry with our offset already programmed we 3691 * can simply return here, after freeing the memory. However, 3692 * if the pit_index does not match we need to report an error. 3693 */ 3694 if (new_pit->src_offset == entry->src_offset) { 3695 int err = 0; 3696 3697 /* If the PIT index is not the same we can't re-use 3698 * the entry, so we must report an error. 3699 */ 3700 if (new_pit->pit_index != entry->pit_index) 3701 err = -EINVAL; 3702 3703 kfree(new_pit); 3704 return err; 3705 } 3706 } 3707 3708 /* If we reached here, then we haven't yet added the item. This means 3709 * that we should add the item at the end of the list. 3710 */ 3711 list_add_tail(&new_pit->list, flex_pit_list); 3712 return 0; 3713 } 3714 3715 /** 3716 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3717 * @pf: Pointer to the PF structure 3718 * @flex_pit_list: list of flexible src offsets in use 3719 * @flex_pit_start: index to first entry for this section of the table 3720 * 3721 * In order to handle flexible data, the hardware uses a table of values 3722 * called the FLX_PIT table. This table is used to indicate which sections of 3723 * the input correspond to what PIT index values. Unfortunately, hardware is 3724 * very restrictive about programming this table. Entries must be ordered by 3725 * src_offset in ascending order, without duplicates. Additionally, unused 3726 * entries must be set to the unused index value, and must have valid size and 3727 * length according to the src_offset ordering. 3728 * 3729 * This function will reprogram the FLX_PIT register from a book-keeping 3730 * structure that we guarantee is already ordered correctly, and has no more 3731 * than 3 entries. 3732 * 3733 * To make things easier, we only support flexible values of one word length, 3734 * rather than allowing variable length flexible values. 3735 **/ 3736 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3737 struct list_head *flex_pit_list, 3738 int flex_pit_start) 3739 { 3740 struct i40e_flex_pit *entry = NULL; 3741 u16 last_offset = 0; 3742 int i = 0, j = 0; 3743 3744 /* First, loop over the list of flex PIT entries, and reprogram the 3745 * registers. 3746 */ 3747 list_for_each_entry(entry, flex_pit_list, list) { 3748 /* We have to be careful when programming values for the 3749 * largest SRC_OFFSET value. It is possible that adding 3750 * additional empty values at the end would overflow the space 3751 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3752 * we check here and add the empty values prior to adding the 3753 * largest value. 3754 * 3755 * To determine this, we will use a loop from i+1 to 3, which 3756 * will determine whether the unused entries would have valid 3757 * SRC_OFFSET. Note that there cannot be extra entries past 3758 * this value, because the only valid values would have been 3759 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3760 * have been added to the list in the first place. 3761 */ 3762 for (j = i + 1; j < 3; j++) { 3763 u16 offset = entry->src_offset + j; 3764 int index = flex_pit_start + i; 3765 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3766 1, 3767 offset - 3); 3768 3769 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3770 i40e_write_rx_ctl(&pf->hw, 3771 I40E_PRTQF_FLX_PIT(index), 3772 value); 3773 i++; 3774 } 3775 } 3776 3777 /* Now, we can program the actual value into the table */ 3778 i40e_write_rx_ctl(&pf->hw, 3779 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3780 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3781 1, 3782 entry->src_offset)); 3783 i++; 3784 } 3785 3786 /* In order to program the last entries in the table, we need to 3787 * determine the valid offset. If the list is empty, we'll just start 3788 * with 0. Otherwise, we'll start with the last item offset and add 1. 3789 * This ensures that all entries have valid sizes. If we don't do this 3790 * correctly, the hardware will disable flexible field parsing. 3791 */ 3792 if (!list_empty(flex_pit_list)) 3793 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3794 3795 for (; i < 3; i++, last_offset++) { 3796 i40e_write_rx_ctl(&pf->hw, 3797 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3798 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3799 1, 3800 last_offset)); 3801 } 3802 } 3803 3804 /** 3805 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3806 * @pf: pointer to the PF structure 3807 * 3808 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3809 * internal helper function for implementation details. 3810 **/ 3811 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3812 { 3813 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3814 I40E_FLEX_PIT_IDX_START_L3); 3815 3816 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3817 I40E_FLEX_PIT_IDX_START_L4); 3818 3819 /* We also need to program the L3 and L4 GLQF ORT register */ 3820 i40e_write_rx_ctl(&pf->hw, 3821 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3822 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3823 3, 1)); 3824 3825 i40e_write_rx_ctl(&pf->hw, 3826 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3827 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3828 3, 1)); 3829 } 3830 3831 /** 3832 * i40e_flow_str - Converts a flow_type into a human readable string 3833 * @fsp: the flow specification 3834 * 3835 * Currently only flow types we support are included here, and the string 3836 * value attempts to match what ethtool would use to configure this flow type. 3837 **/ 3838 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3839 { 3840 switch (fsp->flow_type & ~FLOW_EXT) { 3841 case TCP_V4_FLOW: 3842 return "tcp4"; 3843 case UDP_V4_FLOW: 3844 return "udp4"; 3845 case SCTP_V4_FLOW: 3846 return "sctp4"; 3847 case IP_USER_FLOW: 3848 return "ip4"; 3849 default: 3850 return "unknown"; 3851 } 3852 } 3853 3854 /** 3855 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3856 * @pit_index: PIT index to convert 3857 * 3858 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3859 * of range. 3860 **/ 3861 static u64 i40e_pit_index_to_mask(int pit_index) 3862 { 3863 switch (pit_index) { 3864 case 0: 3865 return I40E_FLEX_50_MASK; 3866 case 1: 3867 return I40E_FLEX_51_MASK; 3868 case 2: 3869 return I40E_FLEX_52_MASK; 3870 case 3: 3871 return I40E_FLEX_53_MASK; 3872 case 4: 3873 return I40E_FLEX_54_MASK; 3874 case 5: 3875 return I40E_FLEX_55_MASK; 3876 case 6: 3877 return I40E_FLEX_56_MASK; 3878 case 7: 3879 return I40E_FLEX_57_MASK; 3880 default: 3881 return 0; 3882 } 3883 } 3884 3885 /** 3886 * i40e_print_input_set - Show changes between two input sets 3887 * @vsi: the vsi being configured 3888 * @old: the old input set 3889 * @new: the new input set 3890 * 3891 * Print the difference between old and new input sets by showing which series 3892 * of words are toggled on or off. Only displays the bits we actually support 3893 * changing. 3894 **/ 3895 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3896 { 3897 struct i40e_pf *pf = vsi->back; 3898 bool old_value, new_value; 3899 int i; 3900 3901 old_value = !!(old & I40E_L3_SRC_MASK); 3902 new_value = !!(new & I40E_L3_SRC_MASK); 3903 if (old_value != new_value) 3904 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3905 old_value ? "ON" : "OFF", 3906 new_value ? "ON" : "OFF"); 3907 3908 old_value = !!(old & I40E_L3_DST_MASK); 3909 new_value = !!(new & I40E_L3_DST_MASK); 3910 if (old_value != new_value) 3911 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3912 old_value ? "ON" : "OFF", 3913 new_value ? "ON" : "OFF"); 3914 3915 old_value = !!(old & I40E_L4_SRC_MASK); 3916 new_value = !!(new & I40E_L4_SRC_MASK); 3917 if (old_value != new_value) 3918 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3919 old_value ? "ON" : "OFF", 3920 new_value ? "ON" : "OFF"); 3921 3922 old_value = !!(old & I40E_L4_DST_MASK); 3923 new_value = !!(new & I40E_L4_DST_MASK); 3924 if (old_value != new_value) 3925 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3926 old_value ? "ON" : "OFF", 3927 new_value ? "ON" : "OFF"); 3928 3929 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3930 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3931 if (old_value != new_value) 3932 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3933 old_value ? "ON" : "OFF", 3934 new_value ? "ON" : "OFF"); 3935 3936 /* Show change of flexible filter entries */ 3937 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3938 u64 flex_mask = i40e_pit_index_to_mask(i); 3939 3940 old_value = !!(old & flex_mask); 3941 new_value = !!(new & flex_mask); 3942 if (old_value != new_value) 3943 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3944 i, 3945 old_value ? "ON" : "OFF", 3946 new_value ? "ON" : "OFF"); 3947 } 3948 3949 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3950 old); 3951 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3952 new); 3953 } 3954 3955 /** 3956 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3957 * @vsi: pointer to the targeted VSI 3958 * @fsp: pointer to Rx flow specification 3959 * @userdef: userdefined data from flow specification 3960 * 3961 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3962 * for partial matches exists with a few limitations. First, hardware only 3963 * supports masking by word boundary (2 bytes) and not per individual bit. 3964 * Second, hardware is limited to using one mask for a flow type and cannot 3965 * use a separate mask for each filter. 3966 * 3967 * To support these limitations, if we already have a configured filter for 3968 * the specified type, this function enforces that new filters of the type 3969 * match the configured input set. Otherwise, if we do not have a filter of 3970 * the specified type, we allow the input set to be updated to match the 3971 * desired filter. 3972 * 3973 * To help ensure that administrators understand why filters weren't displayed 3974 * as supported, we print a diagnostic message displaying how the input set 3975 * would change and warning to delete the preexisting filters if required. 3976 * 3977 * Returns 0 on successful input set match, and a negative return code on 3978 * failure. 3979 **/ 3980 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3981 struct ethtool_rx_flow_spec *fsp, 3982 struct i40e_rx_flow_userdef *userdef) 3983 { 3984 struct i40e_pf *pf = vsi->back; 3985 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3986 struct ethtool_usrip4_spec *usr_ip4_spec; 3987 u64 current_mask, new_mask; 3988 bool new_flex_offset = false; 3989 bool flex_l3 = false; 3990 u16 *fdir_filter_count; 3991 u16 index, src_offset = 0; 3992 u8 pit_index = 0; 3993 int err; 3994 3995 switch (fsp->flow_type & ~FLOW_EXT) { 3996 case SCTP_V4_FLOW: 3997 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3998 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3999 break; 4000 case TCP_V4_FLOW: 4001 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4002 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4003 break; 4004 case UDP_V4_FLOW: 4005 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4006 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4007 break; 4008 case IP_USER_FLOW: 4009 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4010 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4011 flex_l3 = true; 4012 break; 4013 default: 4014 return -EOPNOTSUPP; 4015 } 4016 4017 /* Read the current input set from register memory. */ 4018 current_mask = i40e_read_fd_input_set(pf, index); 4019 new_mask = current_mask; 4020 4021 /* Determine, if any, the required changes to the input set in order 4022 * to support the provided mask. 4023 * 4024 * Hardware only supports masking at word (2 byte) granularity and does 4025 * not support full bitwise masking. This implementation simplifies 4026 * even further and only supports fully enabled or fully disabled 4027 * masks for each field, even though we could split the ip4src and 4028 * ip4dst fields. 4029 */ 4030 switch (fsp->flow_type & ~FLOW_EXT) { 4031 case SCTP_V4_FLOW: 4032 new_mask &= ~I40E_VERIFY_TAG_MASK; 4033 /* Fall through */ 4034 case TCP_V4_FLOW: 4035 case UDP_V4_FLOW: 4036 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4037 4038 /* IPv4 source address */ 4039 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4040 new_mask |= I40E_L3_SRC_MASK; 4041 else if (!tcp_ip4_spec->ip4src) 4042 new_mask &= ~I40E_L3_SRC_MASK; 4043 else 4044 return -EOPNOTSUPP; 4045 4046 /* IPv4 destination address */ 4047 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4048 new_mask |= I40E_L3_DST_MASK; 4049 else if (!tcp_ip4_spec->ip4dst) 4050 new_mask &= ~I40E_L3_DST_MASK; 4051 else 4052 return -EOPNOTSUPP; 4053 4054 /* L4 source port */ 4055 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4056 new_mask |= I40E_L4_SRC_MASK; 4057 else if (!tcp_ip4_spec->psrc) 4058 new_mask &= ~I40E_L4_SRC_MASK; 4059 else 4060 return -EOPNOTSUPP; 4061 4062 /* L4 destination port */ 4063 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4064 new_mask |= I40E_L4_DST_MASK; 4065 else if (!tcp_ip4_spec->pdst) 4066 new_mask &= ~I40E_L4_DST_MASK; 4067 else 4068 return -EOPNOTSUPP; 4069 4070 /* Filtering on Type of Service is not supported. */ 4071 if (tcp_ip4_spec->tos) 4072 return -EOPNOTSUPP; 4073 4074 break; 4075 case IP_USER_FLOW: 4076 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4077 4078 /* IPv4 source address */ 4079 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4080 new_mask |= I40E_L3_SRC_MASK; 4081 else if (!usr_ip4_spec->ip4src) 4082 new_mask &= ~I40E_L3_SRC_MASK; 4083 else 4084 return -EOPNOTSUPP; 4085 4086 /* IPv4 destination address */ 4087 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4088 new_mask |= I40E_L3_DST_MASK; 4089 else if (!usr_ip4_spec->ip4dst) 4090 new_mask &= ~I40E_L3_DST_MASK; 4091 else 4092 return -EOPNOTSUPP; 4093 4094 /* First 4 bytes of L4 header */ 4095 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4096 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4097 else if (!usr_ip4_spec->l4_4_bytes) 4098 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4099 else 4100 return -EOPNOTSUPP; 4101 4102 /* Filtering on Type of Service is not supported. */ 4103 if (usr_ip4_spec->tos) 4104 return -EOPNOTSUPP; 4105 4106 /* Filtering on IP version is not supported */ 4107 if (usr_ip4_spec->ip_ver) 4108 return -EINVAL; 4109 4110 /* Filtering on L4 protocol is not supported */ 4111 if (usr_ip4_spec->proto) 4112 return -EINVAL; 4113 4114 break; 4115 default: 4116 return -EOPNOTSUPP; 4117 } 4118 4119 /* First, clear all flexible filter entries */ 4120 new_mask &= ~I40E_FLEX_INPUT_MASK; 4121 4122 /* If we have a flexible filter, try to add this offset to the correct 4123 * flexible filter PIT list. Once finished, we can update the mask. 4124 * If the src_offset changed, we will get a new mask value which will 4125 * trigger an input set change. 4126 */ 4127 if (userdef->flex_filter) { 4128 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4129 4130 /* Flexible offset must be even, since the flexible payload 4131 * must be aligned on 2-byte boundary. 4132 */ 4133 if (userdef->flex_offset & 0x1) { 4134 dev_warn(&pf->pdev->dev, 4135 "Flexible data offset must be 2-byte aligned\n"); 4136 return -EINVAL; 4137 } 4138 4139 src_offset = userdef->flex_offset >> 1; 4140 4141 /* FLX_PIT source offset value is only so large */ 4142 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4143 dev_warn(&pf->pdev->dev, 4144 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4145 return -EINVAL; 4146 } 4147 4148 /* See if this offset has already been programmed. If we get 4149 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4150 * if we get a NULL pointer, this means we will need to add 4151 * the offset. 4152 */ 4153 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4154 src_offset); 4155 if (IS_ERR(flex_pit)) 4156 return PTR_ERR(flex_pit); 4157 4158 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4159 * packet types, and thus we need to program both L3 and L4 4160 * flexible values. These must have identical flexible index, 4161 * as otherwise we can't correctly program the input set. So 4162 * we'll find both an L3 and L4 index and make sure they are 4163 * the same. 4164 */ 4165 if (flex_l3) { 4166 l3_flex_pit = 4167 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4168 src_offset); 4169 if (IS_ERR(l3_flex_pit)) 4170 return PTR_ERR(l3_flex_pit); 4171 4172 if (flex_pit) { 4173 /* If we already had a matching L4 entry, we 4174 * need to make sure that the L3 entry we 4175 * obtained uses the same index. 4176 */ 4177 if (l3_flex_pit) { 4178 if (l3_flex_pit->pit_index != 4179 flex_pit->pit_index) { 4180 return -EINVAL; 4181 } 4182 } else { 4183 new_flex_offset = true; 4184 } 4185 } else { 4186 flex_pit = l3_flex_pit; 4187 } 4188 } 4189 4190 /* If we didn't find an existing flex offset, we need to 4191 * program a new one. However, we don't immediately program it 4192 * here because we will wait to program until after we check 4193 * that it is safe to change the input set. 4194 */ 4195 if (!flex_pit) { 4196 new_flex_offset = true; 4197 pit_index = i40e_unused_pit_index(pf); 4198 } else { 4199 pit_index = flex_pit->pit_index; 4200 } 4201 4202 /* Update the mask with the new offset */ 4203 new_mask |= i40e_pit_index_to_mask(pit_index); 4204 } 4205 4206 /* If the mask and flexible filter offsets for this filter match the 4207 * currently programmed values we don't need any input set change, so 4208 * this filter is safe to install. 4209 */ 4210 if (new_mask == current_mask && !new_flex_offset) 4211 return 0; 4212 4213 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4214 i40e_flow_str(fsp)); 4215 i40e_print_input_set(vsi, current_mask, new_mask); 4216 if (new_flex_offset) { 4217 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4218 pit_index, src_offset); 4219 } 4220 4221 /* Hardware input sets are global across multiple ports, so even the 4222 * main port cannot change them when in MFP mode as this would impact 4223 * any filters on the other ports. 4224 */ 4225 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4226 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4227 return -EOPNOTSUPP; 4228 } 4229 4230 /* This filter requires us to update the input set. However, hardware 4231 * only supports one input set per flow type, and does not support 4232 * separate masks for each filter. This means that we can only support 4233 * a single mask for all filters of a specific type. 4234 * 4235 * If we have preexisting filters, they obviously depend on the 4236 * current programmed input set. Display a diagnostic message in this 4237 * case explaining why the filter could not be accepted. 4238 */ 4239 if (*fdir_filter_count) { 4240 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4241 i40e_flow_str(fsp), 4242 *fdir_filter_count); 4243 return -EOPNOTSUPP; 4244 } 4245 4246 i40e_write_fd_input_set(pf, index, new_mask); 4247 4248 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4249 * frames. If we're programming the input set for IPv4/Other, we also 4250 * need to program the IPv4/Fragmented input set. Since we don't have 4251 * separate support, we'll always assume and enforce that the two flow 4252 * types must have matching input sets. 4253 */ 4254 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4255 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4256 new_mask); 4257 4258 /* Add the new offset and update table, if necessary */ 4259 if (new_flex_offset) { 4260 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4261 pit_index); 4262 if (err) 4263 return err; 4264 4265 if (flex_l3) { 4266 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4267 src_offset, 4268 pit_index); 4269 if (err) 4270 return err; 4271 } 4272 4273 i40e_reprogram_flex_pit(pf); 4274 } 4275 4276 return 0; 4277 } 4278 4279 /** 4280 * i40e_match_fdir_filter - Return true of two filters match 4281 * @a: pointer to filter struct 4282 * @b: pointer to filter struct 4283 * 4284 * Returns true if the two filters match exactly the same criteria. I.e. they 4285 * match the same flow type and have the same parameters. We don't need to 4286 * check any input-set since all filters of the same flow type must use the 4287 * same input set. 4288 **/ 4289 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4290 struct i40e_fdir_filter *b) 4291 { 4292 /* The filters do not much if any of these criteria differ. */ 4293 if (a->dst_ip != b->dst_ip || 4294 a->src_ip != b->src_ip || 4295 a->dst_port != b->dst_port || 4296 a->src_port != b->src_port || 4297 a->flow_type != b->flow_type || 4298 a->ip4_proto != b->ip4_proto) 4299 return false; 4300 4301 return true; 4302 } 4303 4304 /** 4305 * i40e_disallow_matching_filters - Check that new filters differ 4306 * @vsi: pointer to the targeted VSI 4307 * @input: new filter to check 4308 * 4309 * Due to hardware limitations, it is not possible for two filters that match 4310 * similar criteria to be programmed at the same time. This is true for a few 4311 * reasons: 4312 * 4313 * (a) all filters matching a particular flow type must use the same input 4314 * set, that is they must match the same criteria. 4315 * (b) different flow types will never match the same packet, as the flow type 4316 * is decided by hardware before checking which rules apply. 4317 * (c) hardware has no way to distinguish which order filters apply in. 4318 * 4319 * Due to this, we can't really support using the location data to order 4320 * filters in the hardware parsing. It is technically possible for the user to 4321 * request two filters matching the same criteria but which select different 4322 * queues. In this case, rather than keep both filters in the list, we reject 4323 * the 2nd filter when the user requests adding it. 4324 * 4325 * This avoids needing to track location for programming the filter to 4326 * hardware, and ensures that we avoid some strange scenarios involving 4327 * deleting filters which match the same criteria. 4328 **/ 4329 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4330 struct i40e_fdir_filter *input) 4331 { 4332 struct i40e_pf *pf = vsi->back; 4333 struct i40e_fdir_filter *rule; 4334 struct hlist_node *node2; 4335 4336 /* Loop through every filter, and check that it doesn't match */ 4337 hlist_for_each_entry_safe(rule, node2, 4338 &pf->fdir_filter_list, fdir_node) { 4339 /* Don't check the filters match if they share the same fd_id, 4340 * since the new filter is actually just updating the target 4341 * of the old filter. 4342 */ 4343 if (rule->fd_id == input->fd_id) 4344 continue; 4345 4346 /* If any filters match, then print a warning message to the 4347 * kernel message buffer and bail out. 4348 */ 4349 if (i40e_match_fdir_filter(rule, input)) { 4350 dev_warn(&pf->pdev->dev, 4351 "Existing user defined filter %d already matches this flow.\n", 4352 rule->fd_id); 4353 return -EINVAL; 4354 } 4355 } 4356 4357 return 0; 4358 } 4359 4360 /** 4361 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4362 * @vsi: pointer to the targeted VSI 4363 * @cmd: command to get or set RX flow classification rules 4364 * 4365 * Add Flow Director filters for a specific flow spec based on their 4366 * protocol. Returns 0 if the filters were successfully added. 4367 **/ 4368 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4369 struct ethtool_rxnfc *cmd) 4370 { 4371 struct i40e_rx_flow_userdef userdef; 4372 struct ethtool_rx_flow_spec *fsp; 4373 struct i40e_fdir_filter *input; 4374 u16 dest_vsi = 0, q_index = 0; 4375 struct i40e_pf *pf; 4376 int ret = -EINVAL; 4377 u8 dest_ctl; 4378 4379 if (!vsi) 4380 return -EINVAL; 4381 pf = vsi->back; 4382 4383 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4384 return -EOPNOTSUPP; 4385 4386 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4387 return -ENOSPC; 4388 4389 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4390 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4391 return -EBUSY; 4392 4393 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4394 return -EBUSY; 4395 4396 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4397 4398 /* Parse the user-defined field */ 4399 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4400 return -EINVAL; 4401 4402 /* Extended MAC field is not supported */ 4403 if (fsp->flow_type & FLOW_MAC_EXT) 4404 return -EINVAL; 4405 4406 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4407 if (ret) 4408 return ret; 4409 4410 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4411 pf->hw.func_caps.fd_filters_guaranteed)) { 4412 return -EINVAL; 4413 } 4414 4415 /* ring_cookie is either the drop index, or is a mask of the queue 4416 * index and VF id we wish to target. 4417 */ 4418 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4419 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4420 } else { 4421 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4422 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4423 4424 if (!vf) { 4425 if (ring >= vsi->num_queue_pairs) 4426 return -EINVAL; 4427 dest_vsi = vsi->id; 4428 } else { 4429 /* VFs are zero-indexed, so we subtract one here */ 4430 vf--; 4431 4432 if (vf >= pf->num_alloc_vfs) 4433 return -EINVAL; 4434 if (ring >= pf->vf[vf].num_queue_pairs) 4435 return -EINVAL; 4436 dest_vsi = pf->vf[vf].lan_vsi_id; 4437 } 4438 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4439 q_index = ring; 4440 } 4441 4442 input = kzalloc(sizeof(*input), GFP_KERNEL); 4443 4444 if (!input) 4445 return -ENOMEM; 4446 4447 input->fd_id = fsp->location; 4448 input->q_index = q_index; 4449 input->dest_vsi = dest_vsi; 4450 input->dest_ctl = dest_ctl; 4451 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4452 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4453 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4454 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4455 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4456 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4457 4458 /* Reverse the src and dest notion, since the HW expects them to be from 4459 * Tx perspective where as the input from user is from Rx filter view. 4460 */ 4461 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4462 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4463 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4464 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4465 4466 if (userdef.flex_filter) { 4467 input->flex_filter = true; 4468 input->flex_word = cpu_to_be16(userdef.flex_word); 4469 input->flex_offset = userdef.flex_offset; 4470 } 4471 4472 /* Avoid programming two filters with identical match criteria. */ 4473 ret = i40e_disallow_matching_filters(vsi, input); 4474 if (ret) 4475 goto free_filter_memory; 4476 4477 /* Add the input filter to the fdir_input_list, possibly replacing 4478 * a previous filter. Do not free the input structure after adding it 4479 * to the list as this would cause a use-after-free bug. 4480 */ 4481 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4482 ret = i40e_add_del_fdir(vsi, input, true); 4483 if (ret) 4484 goto remove_sw_rule; 4485 return 0; 4486 4487 remove_sw_rule: 4488 hlist_del(&input->fdir_node); 4489 pf->fdir_pf_active_filters--; 4490 free_filter_memory: 4491 kfree(input); 4492 return ret; 4493 } 4494 4495 /** 4496 * i40e_set_rxnfc - command to set RX flow classification rules 4497 * @netdev: network interface device structure 4498 * @cmd: ethtool rxnfc command 4499 * 4500 * Returns Success if the command is supported. 4501 **/ 4502 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4503 { 4504 struct i40e_netdev_priv *np = netdev_priv(netdev); 4505 struct i40e_vsi *vsi = np->vsi; 4506 struct i40e_pf *pf = vsi->back; 4507 int ret = -EOPNOTSUPP; 4508 4509 switch (cmd->cmd) { 4510 case ETHTOOL_SRXFH: 4511 ret = i40e_set_rss_hash_opt(pf, cmd); 4512 break; 4513 case ETHTOOL_SRXCLSRLINS: 4514 ret = i40e_add_fdir_ethtool(vsi, cmd); 4515 break; 4516 case ETHTOOL_SRXCLSRLDEL: 4517 ret = i40e_del_fdir_entry(vsi, cmd); 4518 break; 4519 default: 4520 break; 4521 } 4522 4523 return ret; 4524 } 4525 4526 /** 4527 * i40e_max_channels - get Max number of combined channels supported 4528 * @vsi: vsi pointer 4529 **/ 4530 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4531 { 4532 /* TODO: This code assumes DCB and FD is disabled for now. */ 4533 return vsi->alloc_queue_pairs; 4534 } 4535 4536 /** 4537 * i40e_get_channels - Get the current channels enabled and max supported etc. 4538 * @dev: network interface device structure 4539 * @ch: ethtool channels structure 4540 * 4541 * We don't support separate tx and rx queues as channels. The other count 4542 * represents how many queues are being used for control. max_combined counts 4543 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4544 * q_vectors since we support a lot more queue pairs than q_vectors. 4545 **/ 4546 static void i40e_get_channels(struct net_device *dev, 4547 struct ethtool_channels *ch) 4548 { 4549 struct i40e_netdev_priv *np = netdev_priv(dev); 4550 struct i40e_vsi *vsi = np->vsi; 4551 struct i40e_pf *pf = vsi->back; 4552 4553 /* report maximum channels */ 4554 ch->max_combined = i40e_max_channels(vsi); 4555 4556 /* report info for other vector */ 4557 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4558 ch->max_other = ch->other_count; 4559 4560 /* Note: This code assumes DCB is disabled for now. */ 4561 ch->combined_count = vsi->num_queue_pairs; 4562 } 4563 4564 /** 4565 * i40e_set_channels - Set the new channels count. 4566 * @dev: network interface device structure 4567 * @ch: ethtool channels structure 4568 * 4569 * The new channels count may not be the same as requested by the user 4570 * since it gets rounded down to a power of 2 value. 4571 **/ 4572 static int i40e_set_channels(struct net_device *dev, 4573 struct ethtool_channels *ch) 4574 { 4575 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4576 struct i40e_netdev_priv *np = netdev_priv(dev); 4577 unsigned int count = ch->combined_count; 4578 struct i40e_vsi *vsi = np->vsi; 4579 struct i40e_pf *pf = vsi->back; 4580 struct i40e_fdir_filter *rule; 4581 struct hlist_node *node2; 4582 int new_count; 4583 int err = 0; 4584 4585 /* We do not support setting channels for any other VSI at present */ 4586 if (vsi->type != I40E_VSI_MAIN) 4587 return -EINVAL; 4588 4589 /* We do not support setting channels via ethtool when TCs are 4590 * configured through mqprio 4591 */ 4592 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4593 return -EINVAL; 4594 4595 /* verify they are not requesting separate vectors */ 4596 if (!count || ch->rx_count || ch->tx_count) 4597 return -EINVAL; 4598 4599 /* verify other_count has not changed */ 4600 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4601 return -EINVAL; 4602 4603 /* verify the number of channels does not exceed hardware limits */ 4604 if (count > i40e_max_channels(vsi)) 4605 return -EINVAL; 4606 4607 /* verify that the number of channels does not invalidate any current 4608 * flow director rules 4609 */ 4610 hlist_for_each_entry_safe(rule, node2, 4611 &pf->fdir_filter_list, fdir_node) { 4612 if (rule->dest_ctl != drop && count <= rule->q_index) { 4613 dev_warn(&pf->pdev->dev, 4614 "Existing user defined filter %d assigns flow to queue %d\n", 4615 rule->fd_id, rule->q_index); 4616 err = -EINVAL; 4617 } 4618 } 4619 4620 if (err) { 4621 dev_err(&pf->pdev->dev, 4622 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4623 count); 4624 return err; 4625 } 4626 4627 /* update feature limits from largest to smallest supported values */ 4628 /* TODO: Flow director limit, DCB etc */ 4629 4630 /* use rss_reconfig to rebuild with new queue count and update traffic 4631 * class queue mapping 4632 */ 4633 new_count = i40e_reconfig_rss_queues(pf, count); 4634 if (new_count > 0) 4635 return 0; 4636 else 4637 return -EINVAL; 4638 } 4639 4640 /** 4641 * i40e_get_rxfh_key_size - get the RSS hash key size 4642 * @netdev: network interface device structure 4643 * 4644 * Returns the table size. 4645 **/ 4646 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4647 { 4648 return I40E_HKEY_ARRAY_SIZE; 4649 } 4650 4651 /** 4652 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4653 * @netdev: network interface device structure 4654 * 4655 * Returns the table size. 4656 **/ 4657 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4658 { 4659 return I40E_HLUT_ARRAY_SIZE; 4660 } 4661 4662 /** 4663 * i40e_get_rxfh - get the rx flow hash indirection table 4664 * @netdev: network interface device structure 4665 * @indir: indirection table 4666 * @key: hash key 4667 * @hfunc: hash function 4668 * 4669 * Reads the indirection table directly from the hardware. Returns 0 on 4670 * success. 4671 **/ 4672 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4673 u8 *hfunc) 4674 { 4675 struct i40e_netdev_priv *np = netdev_priv(netdev); 4676 struct i40e_vsi *vsi = np->vsi; 4677 u8 *lut, *seed = NULL; 4678 int ret; 4679 u16 i; 4680 4681 if (hfunc) 4682 *hfunc = ETH_RSS_HASH_TOP; 4683 4684 if (!indir) 4685 return 0; 4686 4687 seed = key; 4688 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4689 if (!lut) 4690 return -ENOMEM; 4691 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4692 if (ret) 4693 goto out; 4694 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4695 indir[i] = (u32)(lut[i]); 4696 4697 out: 4698 kfree(lut); 4699 4700 return ret; 4701 } 4702 4703 /** 4704 * i40e_set_rxfh - set the rx flow hash indirection table 4705 * @netdev: network interface device structure 4706 * @indir: indirection table 4707 * @key: hash key 4708 * @hfunc: hash function to use 4709 * 4710 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4711 * returns 0 after programming the table. 4712 **/ 4713 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4714 const u8 *key, const u8 hfunc) 4715 { 4716 struct i40e_netdev_priv *np = netdev_priv(netdev); 4717 struct i40e_vsi *vsi = np->vsi; 4718 struct i40e_pf *pf = vsi->back; 4719 u8 *seed = NULL; 4720 u16 i; 4721 4722 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4723 return -EOPNOTSUPP; 4724 4725 if (key) { 4726 if (!vsi->rss_hkey_user) { 4727 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4728 GFP_KERNEL); 4729 if (!vsi->rss_hkey_user) 4730 return -ENOMEM; 4731 } 4732 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4733 seed = vsi->rss_hkey_user; 4734 } 4735 if (!vsi->rss_lut_user) { 4736 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4737 if (!vsi->rss_lut_user) 4738 return -ENOMEM; 4739 } 4740 4741 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4742 if (indir) 4743 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4744 vsi->rss_lut_user[i] = (u8)(indir[i]); 4745 else 4746 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4747 vsi->rss_size); 4748 4749 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4750 I40E_HLUT_ARRAY_SIZE); 4751 } 4752 4753 /** 4754 * i40e_get_priv_flags - report device private flags 4755 * @dev: network interface device structure 4756 * 4757 * The get string set count and the string set should be matched for each 4758 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4759 * array. 4760 * 4761 * Returns a u32 bitmap of flags. 4762 **/ 4763 static u32 i40e_get_priv_flags(struct net_device *dev) 4764 { 4765 struct i40e_netdev_priv *np = netdev_priv(dev); 4766 struct i40e_vsi *vsi = np->vsi; 4767 struct i40e_pf *pf = vsi->back; 4768 u32 i, j, ret_flags = 0; 4769 4770 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4771 const struct i40e_priv_flags *priv_flags; 4772 4773 priv_flags = &i40e_gstrings_priv_flags[i]; 4774 4775 if (priv_flags->flag & pf->flags) 4776 ret_flags |= BIT(i); 4777 } 4778 4779 if (pf->hw.pf_id != 0) 4780 return ret_flags; 4781 4782 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4783 const struct i40e_priv_flags *priv_flags; 4784 4785 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4786 4787 if (priv_flags->flag & pf->flags) 4788 ret_flags |= BIT(i + j); 4789 } 4790 4791 return ret_flags; 4792 } 4793 4794 /** 4795 * i40e_set_priv_flags - set private flags 4796 * @dev: network interface device structure 4797 * @flags: bit flags to be set 4798 **/ 4799 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4800 { 4801 struct i40e_netdev_priv *np = netdev_priv(dev); 4802 struct i40e_vsi *vsi = np->vsi; 4803 struct i40e_pf *pf = vsi->back; 4804 u64 orig_flags, new_flags, changed_flags; 4805 u32 i, j; 4806 4807 orig_flags = READ_ONCE(pf->flags); 4808 new_flags = orig_flags; 4809 4810 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4811 const struct i40e_priv_flags *priv_flags; 4812 4813 priv_flags = &i40e_gstrings_priv_flags[i]; 4814 4815 if (flags & BIT(i)) 4816 new_flags |= priv_flags->flag; 4817 else 4818 new_flags &= ~(priv_flags->flag); 4819 4820 /* If this is a read-only flag, it can't be changed */ 4821 if (priv_flags->read_only && 4822 ((orig_flags ^ new_flags) & ~BIT(i))) 4823 return -EOPNOTSUPP; 4824 } 4825 4826 if (pf->hw.pf_id != 0) 4827 goto flags_complete; 4828 4829 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4830 const struct i40e_priv_flags *priv_flags; 4831 4832 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4833 4834 if (flags & BIT(i + j)) 4835 new_flags |= priv_flags->flag; 4836 else 4837 new_flags &= ~(priv_flags->flag); 4838 4839 /* If this is a read-only flag, it can't be changed */ 4840 if (priv_flags->read_only && 4841 ((orig_flags ^ new_flags) & ~BIT(i))) 4842 return -EOPNOTSUPP; 4843 } 4844 4845 flags_complete: 4846 changed_flags = orig_flags ^ new_flags; 4847 4848 /* Before we finalize any flag changes, we need to perform some 4849 * checks to ensure that the changes are supported and safe. 4850 */ 4851 4852 /* ATR eviction is not supported on all devices */ 4853 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4854 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4855 return -EOPNOTSUPP; 4856 4857 /* If the driver detected FW LLDP was disabled on init, this flag could 4858 * be set, however we do not support _changing_ the flag: 4859 * - on XL710 if NPAR is enabled or FW API version < 1.7 4860 * - on X722 with FW API version < 1.6 4861 * There are situations where older FW versions/NPAR enabled PFs could 4862 * disable LLDP, however we _must_ not allow the user to enable/disable 4863 * LLDP with this flag on unsupported FW versions. 4864 */ 4865 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4866 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 4867 dev_warn(&pf->pdev->dev, 4868 "Device does not support changing FW LLDP\n"); 4869 return -EOPNOTSUPP; 4870 } 4871 } 4872 4873 if (((changed_flags & I40E_FLAG_RS_FEC) || 4874 (changed_flags & I40E_FLAG_BASE_R_FEC)) && 4875 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 4876 pf->hw.device_id != I40E_DEV_ID_25G_B) { 4877 dev_warn(&pf->pdev->dev, 4878 "Device does not support changing FEC configuration\n"); 4879 return -EOPNOTSUPP; 4880 } 4881 4882 /* Now that we've checked to ensure that the new flags are valid, load 4883 * them into place. Since we only modify flags either (a) during 4884 * initialization or (b) while holding the RTNL lock, we don't need 4885 * anything fancy here. 4886 */ 4887 pf->flags = new_flags; 4888 4889 /* Process any additional changes needed as a result of flag changes. 4890 * The changed_flags value reflects the list of bits that were 4891 * changed in the code above. 4892 */ 4893 4894 /* Flush current ATR settings if ATR was disabled */ 4895 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4896 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4897 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4898 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4899 } 4900 4901 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4902 u16 sw_flags = 0, valid_flags = 0; 4903 int ret; 4904 4905 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4906 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4907 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4908 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4909 0, NULL); 4910 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4911 dev_info(&pf->pdev->dev, 4912 "couldn't set switch config bits, err %s aq_err %s\n", 4913 i40e_stat_str(&pf->hw, ret), 4914 i40e_aq_str(&pf->hw, 4915 pf->hw.aq.asq_last_status)); 4916 /* not a fatal problem, just keep going */ 4917 } 4918 } 4919 4920 if ((changed_flags & I40E_FLAG_RS_FEC) || 4921 (changed_flags & I40E_FLAG_BASE_R_FEC)) { 4922 u8 fec_cfg = 0; 4923 4924 if (pf->flags & I40E_FLAG_RS_FEC && 4925 pf->flags & I40E_FLAG_BASE_R_FEC) { 4926 fec_cfg = I40E_AQ_SET_FEC_AUTO; 4927 } else if (pf->flags & I40E_FLAG_RS_FEC) { 4928 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 4929 I40E_AQ_SET_FEC_ABILITY_RS); 4930 } else if (pf->flags & I40E_FLAG_BASE_R_FEC) { 4931 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 4932 I40E_AQ_SET_FEC_ABILITY_KR); 4933 } 4934 if (i40e_set_fec_cfg(dev, fec_cfg)) 4935 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 4936 } 4937 4938 if ((changed_flags & pf->flags & 4939 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4940 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4941 dev_warn(&pf->pdev->dev, 4942 "Turning on link-down-on-close flag may affect other partitions\n"); 4943 4944 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4945 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4946 struct i40e_dcbx_config *dcbcfg; 4947 4948 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4949 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4950 /* reset local_dcbx_config to default */ 4951 dcbcfg = &pf->hw.local_dcbx_config; 4952 dcbcfg->etscfg.willing = 1; 4953 dcbcfg->etscfg.maxtcs = 0; 4954 dcbcfg->etscfg.tcbwtable[0] = 100; 4955 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4956 dcbcfg->etscfg.tcbwtable[i] = 0; 4957 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4958 dcbcfg->etscfg.prioritytable[i] = 0; 4959 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4960 dcbcfg->pfc.willing = 1; 4961 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4962 } else { 4963 i40e_aq_start_lldp(&pf->hw, NULL); 4964 } 4965 } 4966 4967 /* Issue reset to cause things to take effect, as additional bits 4968 * are added we will need to create a mask of bits requiring reset 4969 */ 4970 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4971 I40E_FLAG_LEGACY_RX | 4972 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4973 I40E_FLAG_DISABLE_FW_LLDP)) 4974 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4975 4976 return 0; 4977 } 4978 4979 /** 4980 * i40e_get_module_info - get (Q)SFP+ module type info 4981 * @netdev: network interface device structure 4982 * @modinfo: module EEPROM size and layout information structure 4983 **/ 4984 static int i40e_get_module_info(struct net_device *netdev, 4985 struct ethtool_modinfo *modinfo) 4986 { 4987 struct i40e_netdev_priv *np = netdev_priv(netdev); 4988 struct i40e_vsi *vsi = np->vsi; 4989 struct i40e_pf *pf = vsi->back; 4990 struct i40e_hw *hw = &pf->hw; 4991 u32 sff8472_comp = 0; 4992 u32 sff8472_swap = 0; 4993 u32 sff8636_rev = 0; 4994 i40e_status status; 4995 u32 type = 0; 4996 4997 /* Check if firmware supports reading module EEPROM. */ 4998 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4999 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5000 return -EINVAL; 5001 } 5002 5003 status = i40e_update_link_info(hw); 5004 if (status) 5005 return -EIO; 5006 5007 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5008 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5009 return -EINVAL; 5010 } 5011 5012 type = hw->phy.link_info.module_type[0]; 5013 5014 switch (type) { 5015 case I40E_MODULE_TYPE_SFP: 5016 status = i40e_aq_get_phy_register(hw, 5017 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5018 I40E_I2C_EEPROM_DEV_ADDR, 5019 I40E_MODULE_SFF_8472_COMP, 5020 &sff8472_comp, NULL); 5021 if (status) 5022 return -EIO; 5023 5024 status = i40e_aq_get_phy_register(hw, 5025 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5026 I40E_I2C_EEPROM_DEV_ADDR, 5027 I40E_MODULE_SFF_8472_SWAP, 5028 &sff8472_swap, NULL); 5029 if (status) 5030 return -EIO; 5031 5032 /* Check if the module requires address swap to access 5033 * the other EEPROM memory page. 5034 */ 5035 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5036 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5037 modinfo->type = ETH_MODULE_SFF_8079; 5038 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5039 } else if (sff8472_comp == 0x00) { 5040 /* Module is not SFF-8472 compliant */ 5041 modinfo->type = ETH_MODULE_SFF_8079; 5042 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5043 } else { 5044 modinfo->type = ETH_MODULE_SFF_8472; 5045 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5046 } 5047 break; 5048 case I40E_MODULE_TYPE_QSFP_PLUS: 5049 /* Read from memory page 0. */ 5050 status = i40e_aq_get_phy_register(hw, 5051 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5052 0, 5053 I40E_MODULE_REVISION_ADDR, 5054 &sff8636_rev, NULL); 5055 if (status) 5056 return -EIO; 5057 /* Determine revision compliance byte */ 5058 if (sff8636_rev > 0x02) { 5059 /* Module is SFF-8636 compliant */ 5060 modinfo->type = ETH_MODULE_SFF_8636; 5061 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5062 } else { 5063 modinfo->type = ETH_MODULE_SFF_8436; 5064 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5065 } 5066 break; 5067 case I40E_MODULE_TYPE_QSFP28: 5068 modinfo->type = ETH_MODULE_SFF_8636; 5069 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5070 break; 5071 default: 5072 netdev_err(vsi->netdev, "Module type unrecognized\n"); 5073 return -EINVAL; 5074 } 5075 return 0; 5076 } 5077 5078 /** 5079 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5080 * @netdev: network interface device structure 5081 * @ee: EEPROM dump request structure 5082 * @data: buffer to be filled with EEPROM contents 5083 **/ 5084 static int i40e_get_module_eeprom(struct net_device *netdev, 5085 struct ethtool_eeprom *ee, 5086 u8 *data) 5087 { 5088 struct i40e_netdev_priv *np = netdev_priv(netdev); 5089 struct i40e_vsi *vsi = np->vsi; 5090 struct i40e_pf *pf = vsi->back; 5091 struct i40e_hw *hw = &pf->hw; 5092 bool is_sfp = false; 5093 i40e_status status; 5094 u32 value = 0; 5095 int i; 5096 5097 if (!ee || !ee->len || !data) 5098 return -EINVAL; 5099 5100 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5101 is_sfp = true; 5102 5103 for (i = 0; i < ee->len; i++) { 5104 u32 offset = i + ee->offset; 5105 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5106 5107 /* Check if we need to access the other memory page */ 5108 if (is_sfp) { 5109 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5110 offset -= ETH_MODULE_SFF_8079_LEN; 5111 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5112 } 5113 } else { 5114 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5115 /* Compute memory page number and offset. */ 5116 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5117 addr++; 5118 } 5119 } 5120 5121 status = i40e_aq_get_phy_register(hw, 5122 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5123 addr, offset, &value, NULL); 5124 if (status) 5125 return -EIO; 5126 data[i] = value; 5127 } 5128 return 0; 5129 } 5130 5131 static const struct ethtool_ops i40e_ethtool_ops = { 5132 .get_drvinfo = i40e_get_drvinfo, 5133 .get_regs_len = i40e_get_regs_len, 5134 .get_regs = i40e_get_regs, 5135 .nway_reset = i40e_nway_reset, 5136 .get_link = ethtool_op_get_link, 5137 .get_wol = i40e_get_wol, 5138 .set_wol = i40e_set_wol, 5139 .set_eeprom = i40e_set_eeprom, 5140 .get_eeprom_len = i40e_get_eeprom_len, 5141 .get_eeprom = i40e_get_eeprom, 5142 .get_ringparam = i40e_get_ringparam, 5143 .set_ringparam = i40e_set_ringparam, 5144 .get_pauseparam = i40e_get_pauseparam, 5145 .set_pauseparam = i40e_set_pauseparam, 5146 .get_msglevel = i40e_get_msglevel, 5147 .set_msglevel = i40e_set_msglevel, 5148 .get_rxnfc = i40e_get_rxnfc, 5149 .set_rxnfc = i40e_set_rxnfc, 5150 .self_test = i40e_diag_test, 5151 .get_strings = i40e_get_strings, 5152 .set_phys_id = i40e_set_phys_id, 5153 .get_sset_count = i40e_get_sset_count, 5154 .get_ethtool_stats = i40e_get_ethtool_stats, 5155 .get_coalesce = i40e_get_coalesce, 5156 .set_coalesce = i40e_set_coalesce, 5157 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5158 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5159 .get_rxfh = i40e_get_rxfh, 5160 .set_rxfh = i40e_set_rxfh, 5161 .get_channels = i40e_get_channels, 5162 .set_channels = i40e_set_channels, 5163 .get_module_info = i40e_get_module_info, 5164 .get_module_eeprom = i40e_get_module_eeprom, 5165 .get_ts_info = i40e_get_ts_info, 5166 .get_priv_flags = i40e_get_priv_flags, 5167 .set_priv_flags = i40e_set_priv_flags, 5168 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5169 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5170 .get_link_ksettings = i40e_get_link_ksettings, 5171 .set_link_ksettings = i40e_set_link_ksettings, 5172 .get_fecparam = i40e_get_fec_param, 5173 .set_fecparam = i40e_set_fec_param, 5174 }; 5175 5176 void i40e_set_ethtool_ops(struct net_device *netdev) 5177 { 5178 netdev->ethtool_ops = &i40e_ethtool_ops; 5179 } 5180